drivers/net/bnxt/bnxt_ethdev.c

   1 /* SPDX-License-Identifier: BSD-3-Clause
   2  * Copyright(c) 2014-2018 Broadcom
   3  * All rights reserved.
   4  */
   5
   6 #include <inttypes.h>
   7 #include <stdbool.h>
   8
   9 #include <rte_dev.h>
  10 #include <rte_ethdev_driver.h>
  11 #include <rte_ethdev_pci.h>
  12 #include <rte_malloc.h>
  13 #include <rte_cycles.h>
  14
  15 #include "bnxt.h"
  16 #include "bnxt_cpr.h"
  17 #include "bnxt_filter.h"
  18 #include "bnxt_hwrm.h"
  19 #include "bnxt_irq.h"
  20 #include "bnxt_ring.h"
  21 #include "bnxt_rxq.h"
  22 #include "bnxt_rxr.h"
  23 #include "bnxt_stats.h"
  24 #include "bnxt_txq.h"
  25 #include "bnxt_txr.h"
  26 #include "bnxt_vnic.h"
  27 #include "hsi_struct_def_dpdk.h"
  28 #include "bnxt_nvm_defs.h"
  29
  30 #define DRV_MODULE_NAME         "bnxt"
  31 static const char bnxt_version[] =
  32         "Broadcom Cumulus driver " DRV_MODULE_NAME "\n";
  33 int bnxt_logtype_driver;
  34
  35 #define PCI_VENDOR_ID_BROADCOM 0x14E4
  36
  37 #define BROADCOM_DEV_ID_STRATUS_NIC_VF 0x1609
  38 #define BROADCOM_DEV_ID_STRATUS_NIC 0x1614
  39 #define BROADCOM_DEV_ID_57414_VF 0x16c1
  40 #define BROADCOM_DEV_ID_57301 0x16c8
  41 #define BROADCOM_DEV_ID_57302 0x16c9
  42 #define BROADCOM_DEV_ID_57304_PF 0x16ca
  43 #define BROADCOM_DEV_ID_57304_VF 0x16cb
  44 #define BROADCOM_DEV_ID_57417_MF 0x16cc
  45 #define BROADCOM_DEV_ID_NS2 0x16cd
  46 #define BROADCOM_DEV_ID_57311 0x16ce
  47 #define BROADCOM_DEV_ID_57312 0x16cf
  48 #define BROADCOM_DEV_ID_57402 0x16d0
  49 #define BROADCOM_DEV_ID_57404 0x16d1
  50 #define BROADCOM_DEV_ID_57406_PF 0x16d2
  51 #define BROADCOM_DEV_ID_57406_VF 0x16d3
  52 #define BROADCOM_DEV_ID_57402_MF 0x16d4
  53 #define BROADCOM_DEV_ID_57407_RJ45 0x16d5
  54 #define BROADCOM_DEV_ID_57412 0x16d6
  55 #define BROADCOM_DEV_ID_57414 0x16d7
  56 #define BROADCOM_DEV_ID_57416_RJ45 0x16d8
  57 #define BROADCOM_DEV_ID_57417_RJ45 0x16d9
  58 #define BROADCOM_DEV_ID_5741X_VF 0x16dc
  59 #define BROADCOM_DEV_ID_57412_MF 0x16de
  60 #define BROADCOM_DEV_ID_57314 0x16df
  61 #define BROADCOM_DEV_ID_57317_RJ45 0x16e0
  62 #define BROADCOM_DEV_ID_5731X_VF 0x16e1
  63 #define BROADCOM_DEV_ID_57417_SFP 0x16e2
  64 #define BROADCOM_DEV_ID_57416_SFP 0x16e3
  65 #define BROADCOM_DEV_ID_57317_SFP 0x16e4
  66 #define BROADCOM_DEV_ID_57404_MF 0x16e7
  67 #define BROADCOM_DEV_ID_57406_MF 0x16e8
  68 #define BROADCOM_DEV_ID_57407_SFP 0x16e9
  69 #define BROADCOM_DEV_ID_57407_MF 0x16ea
  70 #define BROADCOM_DEV_ID_57414_MF 0x16ec
  71 #define BROADCOM_DEV_ID_57416_MF 0x16ee
  72
  73 static const struct rte_pci_id bnxt_pci_id_map[] = {
  74         { RTE_PCI_DEVICE(PCI_VENDOR_ID_BROADCOM,
  75                          BROADCOM_DEV_ID_STRATUS_NIC_VF) },
  76         { RTE_PCI_DEVICE(PCI_VENDOR_ID_BROADCOM, BROADCOM_DEV_ID_STRATUS_NIC) },
  77         { RTE_PCI_DEVICE(PCI_VENDOR_ID_BROADCOM, BROADCOM_DEV_ID_57414_VF) },
  78         { RTE_PCI_DEVICE(PCI_VENDOR_ID_BROADCOM, BROADCOM_DEV_ID_57301) },
  79         { RTE_PCI_DEVICE(PCI_VENDOR_ID_BROADCOM, BROADCOM_DEV_ID_57302) },
  80         { RTE_PCI_DEVICE(PCI_VENDOR_ID_BROADCOM, BROADCOM_DEV_ID_57304_PF) },
  81         { RTE_PCI_DEVICE(PCI_VENDOR_ID_BROADCOM, BROADCOM_DEV_ID_57304_VF) },
  82         { RTE_PCI_DEVICE(PCI_VENDOR_ID_BROADCOM, BROADCOM_DEV_ID_NS2) },
  83         { RTE_PCI_DEVICE(PCI_VENDOR_ID_BROADCOM, BROADCOM_DEV_ID_57402) },
  84         { RTE_PCI_DEVICE(PCI_VENDOR_ID_BROADCOM, BROADCOM_DEV_ID_57404) },
  85         { RTE_PCI_DEVICE(PCI_VENDOR_ID_BROADCOM, BROADCOM_DEV_ID_57406_PF) },
  86         { RTE_PCI_DEVICE(PCI_VENDOR_ID_BROADCOM, BROADCOM_DEV_ID_57406_VF) },
  87         { RTE_PCI_DEVICE(PCI_VENDOR_ID_BROADCOM, BROADCOM_DEV_ID_57402_MF) },
  88         { RTE_PCI_DEVICE(PCI_VENDOR_ID_BROADCOM, BROADCOM_DEV_ID_57407_RJ45) },
  89         { RTE_PCI_DEVICE(PCI_VENDOR_ID_BROADCOM, BROADCOM_DEV_ID_57404_MF) },
  90         { RTE_PCI_DEVICE(PCI_VENDOR_ID_BROADCOM, BROADCOM_DEV_ID_57406_MF) },
  91         { RTE_PCI_DEVICE(PCI_VENDOR_ID_BROADCOM, BROADCOM_DEV_ID_57407_SFP) },
  92         { RTE_PCI_DEVICE(PCI_VENDOR_ID_BROADCOM, BROADCOM_DEV_ID_57407_MF) },
  93         { RTE_PCI_DEVICE(PCI_VENDOR_ID_BROADCOM, BROADCOM_DEV_ID_5741X_VF) },
  94         { RTE_PCI_DEVICE(PCI_VENDOR_ID_BROADCOM, BROADCOM_DEV_ID_5731X_VF) },
  95         { RTE_PCI_DEVICE(PCI_VENDOR_ID_BROADCOM, BROADCOM_DEV_ID_57314) },
  96         { RTE_PCI_DEVICE(PCI_VENDOR_ID_BROADCOM, BROADCOM_DEV_ID_57417_MF) },
  97         { RTE_PCI_DEVICE(PCI_VENDOR_ID_BROADCOM, BROADCOM_DEV_ID_57311) },
  98         { RTE_PCI_DEVICE(PCI_VENDOR_ID_BROADCOM, BROADCOM_DEV_ID_57312) },
  99         { RTE_PCI_DEVICE(PCI_VENDOR_ID_BROADCOM, BROADCOM_DEV_ID_57412) },
 100         { RTE_PCI_DEVICE(PCI_VENDOR_ID_BROADCOM, BROADCOM_DEV_ID_57414) },
 101         { RTE_PCI_DEVICE(PCI_VENDOR_ID_BROADCOM, BROADCOM_DEV_ID_57416_RJ45) },
 102         { RTE_PCI_DEVICE(PCI_VENDOR_ID_BROADCOM, BROADCOM_DEV_ID_57417_RJ45) },
 103         { RTE_PCI_DEVICE(PCI_VENDOR_ID_BROADCOM, BROADCOM_DEV_ID_57412_MF) },
 104         { RTE_PCI_DEVICE(PCI_VENDOR_ID_BROADCOM, BROADCOM_DEV_ID_57317_RJ45) },
 105         { RTE_PCI_DEVICE(PCI_VENDOR_ID_BROADCOM, BROADCOM_DEV_ID_57417_SFP) },
 106         { RTE_PCI_DEVICE(PCI_VENDOR_ID_BROADCOM, BROADCOM_DEV_ID_57416_SFP) },
 107         { RTE_PCI_DEVICE(PCI_VENDOR_ID_BROADCOM, BROADCOM_DEV_ID_57317_SFP) },
 108         { RTE_PCI_DEVICE(PCI_VENDOR_ID_BROADCOM, BROADCOM_DEV_ID_57414_MF) },
 109         { RTE_PCI_DEVICE(PCI_VENDOR_ID_BROADCOM, BROADCOM_DEV_ID_57416_MF) },
 110         { .vendor_id = 0, /* sentinel */ },
 111 };
 112
 113 #define BNXT_ETH_RSS_SUPPORT (  \
 114         ETH_RSS_IPV4 |          \
 115         ETH_RSS_NONFRAG_IPV4_TCP |      \
 116         ETH_RSS_NONFRAG_IPV4_UDP |      \
 117         ETH_RSS_IPV6 |          \
 118         ETH_RSS_NONFRAG_IPV6_TCP |      \
 119         ETH_RSS_NONFRAG_IPV6_UDP)
 120
 121 #define BNXT_DEV_TX_OFFLOAD_SUPPORT (DEV_TX_OFFLOAD_VLAN_INSERT | \
 122                                      DEV_TX_OFFLOAD_IPV4_CKSUM | \
 123                                      DEV_TX_OFFLOAD_TCP_CKSUM | \
 124                                      DEV_TX_OFFLOAD_UDP_CKSUM | \
 125                                      DEV_TX_OFFLOAD_TCP_TSO | \
 126                                      DEV_TX_OFFLOAD_OUTER_IPV4_CKSUM | \
 127                                      DEV_TX_OFFLOAD_VXLAN_TNL_TSO | \
 128                                      DEV_TX_OFFLOAD_GRE_TNL_TSO | \
 129                                      DEV_TX_OFFLOAD_IPIP_TNL_TSO | \
 130                                      DEV_TX_OFFLOAD_GENEVE_TNL_TSO | \
 131                                      DEV_TX_OFFLOAD_MULTI_SEGS)
 132
 133 #define BNXT_DEV_RX_OFFLOAD_SUPPORT (DEV_RX_OFFLOAD_VLAN_FILTER | \
 134                                      DEV_RX_OFFLOAD_VLAN_STRIP | \
 135                                      DEV_RX_OFFLOAD_IPV4_CKSUM | \
 136                                      DEV_RX_OFFLOAD_UDP_CKSUM | \
 137                                      DEV_RX_OFFLOAD_TCP_CKSUM | \
 138                                      DEV_RX_OFFLOAD_OUTER_IPV4_CKSUM | \
 139                                      DEV_RX_OFFLOAD_JUMBO_FRAME | \
 140                                      DEV_RX_OFFLOAD_CRC_STRIP | \
 141                                      DEV_RX_OFFLOAD_TCP_LRO)
 142
 143 static int bnxt_vlan_offload_set_op(struct rte_eth_dev *dev, int mask);
 144 static void bnxt_print_link_info(struct rte_eth_dev *eth_dev);
 145
 146 /***********************/
 147
 148 /*
 149  * High level utility functions
 150  */
 151
 152 static void bnxt_free_mem(struct bnxt *bp)
 153 {
 154         bnxt_free_filter_mem(bp);
 155         bnxt_free_vnic_attributes(bp);
 156         bnxt_free_vnic_mem(bp);
 157
 158         bnxt_free_stats(bp);
 159         bnxt_free_tx_rings(bp);
 160         bnxt_free_rx_rings(bp);
 161         bnxt_free_def_cp_ring(bp);
 162 }
 163
 164 static int bnxt_alloc_mem(struct bnxt *bp)
 165 {
 166         int rc;
 167
 168         /* Default completion ring */
 169         rc = bnxt_init_def_ring_struct(bp, SOCKET_ID_ANY);
 170         if (rc)
 171                 goto alloc_mem_err;
 172
 173         rc = bnxt_alloc_rings(bp, 0, NULL, NULL,
 174                               bp->def_cp_ring, "def_cp");
 175         if (rc)
 176                 goto alloc_mem_err;
 177
 178         rc = bnxt_alloc_vnic_mem(bp);
 179         if (rc)
 180                 goto alloc_mem_err;
 181
 182         rc = bnxt_alloc_vnic_attributes(bp);
 183         if (rc)
 184                 goto alloc_mem_err;
 185
 186         rc = bnxt_alloc_filter_mem(bp);
 187         if (rc)
 188                 goto alloc_mem_err;
 189
 190         return 0;
 191
 192 alloc_mem_err:
 193         bnxt_free_mem(bp);
 194         return rc;
 195 }
 196
 197 static int bnxt_init_chip(struct bnxt *bp)
 198 {
 199         unsigned int i;
 200         struct rte_eth_link new;
 201         struct rte_pci_device *pci_dev = RTE_ETH_DEV_TO_PCI(bp->eth_dev);
 202         struct rte_intr_handle *intr_handle = &pci_dev->intr_handle;
 203         uint32_t intr_vector = 0;
 204         uint32_t queue_id, base = BNXT_MISC_VEC_ID;
 205         uint32_t vec = BNXT_MISC_VEC_ID;
 206         int rc;
 207
 208         /* disable uio/vfio intr/eventfd mapping */
 209         rte_intr_disable(intr_handle);
 210
 211         if (bp->eth_dev->data->mtu > ETHER_MTU) {
 212                 bp->eth_dev->data->dev_conf.rxmode.offloads |=
 213                         DEV_RX_OFFLOAD_JUMBO_FRAME;
 214                 bp->flags |= BNXT_FLAG_JUMBO;
 215         } else {
 216                 bp->eth_dev->data->dev_conf.rxmode.offloads &=
 217                         ~DEV_RX_OFFLOAD_JUMBO_FRAME;
 218                 bp->flags &= ~BNXT_FLAG_JUMBO;
 219         }
 220
 221         rc = bnxt_alloc_all_hwrm_stat_ctxs(bp);
 222         if (rc) {
 223                 PMD_DRV_LOG(ERR, "HWRM stat ctx alloc failure rc: %x\n", rc);
 224                 goto err_out;
 225         }
 226
 227         rc = bnxt_alloc_hwrm_rings(bp);
 228         if (rc) {
 229                 PMD_DRV_LOG(ERR, "HWRM ring alloc failure rc: %x\n", rc);
 230                 goto err_out;
 231         }
 232
 233         rc = bnxt_alloc_all_hwrm_ring_grps(bp);
 234         if (rc) {
 235                 PMD_DRV_LOG(ERR, "HWRM ring grp alloc failure: %x\n", rc);
 236                 goto err_out;
 237         }
 238
 239         rc = bnxt_mq_rx_configure(bp);
 240         if (rc) {
 241                 PMD_DRV_LOG(ERR, "MQ mode configure failure rc: %x\n", rc);
 242                 goto err_out;
 243         }
 244
 245         /* VNIC configuration */
 246         for (i = 0; i < bp->nr_vnics; i++) {
 247                 struct bnxt_vnic_info *vnic = &bp->vnic_info[i];
 248
 249                 rc = bnxt_hwrm_vnic_alloc(bp, vnic);
 250                 if (rc) {
 251                         PMD_DRV_LOG(ERR, "HWRM vnic %d alloc failure rc: %x\n",
 252                                 i, rc);
 253                         goto err_out;
 254                 }
 255
 256                 rc = bnxt_hwrm_vnic_ctx_alloc(bp, vnic);
 257                 if (rc) {
 258                         PMD_DRV_LOG(ERR,
 259                                 "HWRM vnic %d ctx alloc failure rc: %x\n",
 260                                 i, rc);
 261                         goto err_out;
 262                 }
 263
 264                 rc = bnxt_hwrm_vnic_cfg(bp, vnic);
 265                 if (rc) {
 266                         PMD_DRV_LOG(ERR, "HWRM vnic %d cfg failure rc: %x\n",
 267                                 i, rc);
 268                         goto err_out;
 269                 }
 270
 271                 rc = bnxt_set_hwrm_vnic_filters(bp, vnic);
 272                 if (rc) {
 273                         PMD_DRV_LOG(ERR,
 274                                 "HWRM vnic %d filter failure rc: %x\n",
 275                                 i, rc);
 276                         goto err_out;
 277                 }
 278
 279                 rc = bnxt_vnic_rss_configure(bp, vnic);
 280                 if (rc) {
 281                         PMD_DRV_LOG(ERR,
 282                                     "HWRM vnic set RSS failure rc: %x\n", rc);
 283                         goto err_out;
 284                 }
 285
 286                 bnxt_hwrm_vnic_plcmode_cfg(bp, vnic);
 287
 288                 if (bp->eth_dev->data->dev_conf.rxmode.offloads &
 289                     DEV_RX_OFFLOAD_TCP_LRO)
 290                         bnxt_hwrm_vnic_tpa_cfg(bp, vnic, 1);
 291                 else
 292                         bnxt_hwrm_vnic_tpa_cfg(bp, vnic, 0);
 293         }
 294         rc = bnxt_hwrm_cfa_l2_set_rx_mask(bp, &bp->vnic_info[0], 0, NULL);
 295         if (rc) {
 296                 PMD_DRV_LOG(ERR,
 297                         "HWRM cfa l2 rx mask failure rc: %x\n", rc);
 298                 goto err_out;
 299         }
 300
 301         /* check and configure queue intr-vector mapping */
 302         if ((rte_intr_cap_multiple(intr_handle) ||
 303              !RTE_ETH_DEV_SRIOV(bp->eth_dev).active) &&
 304             bp->eth_dev->data->dev_conf.intr_conf.rxq != 0) {
 305                 intr_vector = bp->eth_dev->data->nb_rx_queues;
 306                 PMD_DRV_LOG(DEBUG, "intr_vector = %d\n", intr_vector);
 307                 if (intr_vector > bp->rx_cp_nr_rings) {
 308                         PMD_DRV_LOG(ERR, "At most %d intr queues supported",
 309                                         bp->rx_cp_nr_rings);
 310                         return -ENOTSUP;
 311                 }
 312                 if (rte_intr_efd_enable(intr_handle, intr_vector))
 313                         return -1;
 314         }
 315
 316         if (rte_intr_dp_is_en(intr_handle) && !intr_handle->intr_vec) {
 317                 intr_handle->intr_vec =
 318                         rte_zmalloc("intr_vec",
 319                                     bp->eth_dev->data->nb_rx_queues *
 320                                     sizeof(int), 0);
 321                 if (intr_handle->intr_vec == NULL) {
 322                         PMD_DRV_LOG(ERR, "Failed to allocate %d rx_queues"
 323                                 " intr_vec", bp->eth_dev->data->nb_rx_queues);
 324                         return -ENOMEM;
 325                 }
 326                 PMD_DRV_LOG(DEBUG, "intr_handle->intr_vec = %p "
 327                         "intr_handle->nb_efd = %d intr_handle->max_intr = %d\n",
 328                          intr_handle->intr_vec, intr_handle->nb_efd,
 329                         intr_handle->max_intr);
 330         }
 331
 332         for (queue_id = 0; queue_id < bp->eth_dev->data->nb_rx_queues;
 333              queue_id++) {
 334                 intr_handle->intr_vec[queue_id] = vec;
 335                 if (vec < base + intr_handle->nb_efd - 1)
 336                         vec++;
 337         }
 338
 339         /* enable uio/vfio intr/eventfd mapping */
 340         rte_intr_enable(intr_handle);
 341
 342         rc = bnxt_get_hwrm_link_config(bp, &new);
 343         if (rc) {
 344                 PMD_DRV_LOG(ERR, "HWRM Get link config failure rc: %x\n", rc);
 345                 goto err_out;
 346         }
 347
 348         if (!bp->link_info.link_up) {
 349                 rc = bnxt_set_hwrm_link_config(bp, true);
 350                 if (rc) {
 351                         PMD_DRV_LOG(ERR,
 352                                 "HWRM link config failure rc: %x\n", rc);
 353                         goto err_out;
 354                 }
 355         }
 356         bnxt_print_link_info(bp->eth_dev);
 357
 358         return 0;
 359
 360 err_out:
 361         bnxt_free_all_hwrm_resources(bp);
 362
 363         /* Some of the error status returned by FW may not be from errno.h */
 364         if (rc > 0)
 365                 rc = -EIO;
 366
 367         return rc;
 368 }
 369
 370 static int bnxt_shutdown_nic(struct bnxt *bp)
 371 {
 372         bnxt_free_all_hwrm_resources(bp);
 373         bnxt_free_all_filters(bp);
 374         bnxt_free_all_vnics(bp);
 375         return 0;
 376 }
 377
 378 static int bnxt_init_nic(struct bnxt *bp)
 379 {
 380         int rc;
 381
 382         rc = bnxt_init_ring_grps(bp);
 383         if (rc)
 384                 return rc;
 385
 386         bnxt_init_vnics(bp);
 387         bnxt_init_filters(bp);
 388
 389         rc = bnxt_init_chip(bp);
 390         if (rc)
 391                 return rc;
 392
 393         return 0;
 394 }
 395
 396 /*
 397  * Device configuration and status function
 398  */
 399
 400 static void bnxt_dev_info_get_op(struct rte_eth_dev *eth_dev,
 401                                   struct rte_eth_dev_info *dev_info)
 402 {
 403         struct bnxt *bp = (struct bnxt *)eth_dev->data->dev_private;
 404         uint16_t max_vnics, i, j, vpool, vrxq;
 405         unsigned int max_rx_rings;
 406
 407         /* MAC Specifics */
 408         dev_info->max_mac_addrs = bp->max_l2_ctx;
 409         dev_info->max_hash_mac_addrs = 0;
 410
 411         /* PF/VF specifics */
 412         if (BNXT_PF(bp))
 413                 dev_info->max_vfs = bp->pdev->max_vfs;
 414         max_rx_rings = RTE_MIN(bp->max_vnics, RTE_MIN(bp->max_l2_ctx,
 415                                                 RTE_MIN(bp->max_rsscos_ctx,
 416                                                 bp->max_stat_ctx)));
 417         /* For the sake of symmetry, max_rx_queues = max_tx_queues */
 418         dev_info->max_rx_queues = max_rx_rings;
 419         dev_info->max_tx_queues = max_rx_rings;
 420         dev_info->reta_size = bp->max_rsscos_ctx;
 421         dev_info->hash_key_size = 40;
 422         max_vnics = bp->max_vnics;
 423
 424         /* Fast path specifics */
 425         dev_info->min_rx_bufsize = 1;
 426         dev_info->max_rx_pktlen = BNXT_MAX_MTU + ETHER_HDR_LEN + ETHER_CRC_LEN
 427                                   + VLAN_TAG_SIZE;
 428
 429         dev_info->rx_offload_capa = BNXT_DEV_RX_OFFLOAD_SUPPORT;
 430         if (bp->flags & BNXT_FLAG_PTP_SUPPORTED)
 431                 dev_info->rx_offload_capa |= DEV_RX_OFFLOAD_TIMESTAMP;
 432         dev_info->tx_offload_capa = BNXT_DEV_TX_OFFLOAD_SUPPORT;
 433         dev_info->flow_type_rss_offloads = BNXT_ETH_RSS_SUPPORT;
 434
 435         /* *INDENT-OFF* */
 436         dev_info->default_rxconf = (struct rte_eth_rxconf) {
 437                 .rx_thresh = {
 438                         .pthresh = 8,
 439                         .hthresh = 8,
 440                         .wthresh = 0,
 441                 },
 442                 .rx_free_thresh = 32,
 443                 /* If no descriptors available, pkts are dropped by default */
 444                 .rx_drop_en = 1,
 445         };
 446
 447         dev_info->default_txconf = (struct rte_eth_txconf) {
 448                 .tx_thresh = {
 449                         .pthresh = 32,
 450                         .hthresh = 0,
 451                         .wthresh = 0,
 452                 },
 453                 .tx_free_thresh = 32,
 454                 .tx_rs_thresh = 32,
 455         };
 456         eth_dev->data->dev_conf.intr_conf.lsc = 1;
 457
 458         eth_dev->data->dev_conf.intr_conf.rxq = 1;
 459
 460         /* *INDENT-ON* */
 461
 462         /*
 463          * TODO: default_rxconf, default_txconf, rx_desc_lim, and tx_desc_lim
 464          *       need further investigation.
 465          */
 466
 467         /* VMDq resources */
 468         vpool = 64; /* ETH_64_POOLS */
 469         vrxq = 128; /* ETH_VMDQ_DCB_NUM_QUEUES */
 470         for (i = 0; i < 4; vpool >>= 1, i++) {
 471                 if (max_vnics > vpool) {
 472                         for (j = 0; j < 5; vrxq >>= 1, j++) {
 473                                 if (dev_info->max_rx_queues > vrxq) {
 474                                         if (vpool > vrxq)
 475                                                 vpool = vrxq;
 476                                         goto found;
 477                                 }
 478                         }
 479                         /* Not enough resources to support VMDq */
 480                         break;
 481                 }
 482         }
 483         /* Not enough resources to support VMDq */
 484         vpool = 0;
 485         vrxq = 0;
 486 found:
 487         dev_info->max_vmdq_pools = vpool;
 488         dev_info->vmdq_queue_num = vrxq;
 489
 490         dev_info->vmdq_pool_base = 0;
 491         dev_info->vmdq_queue_base = 0;
 492 }
 493
 494 /* Configure the device based on the configuration provided */
 495 static int bnxt_dev_configure_op(struct rte_eth_dev *eth_dev)
 496 {
 497         struct bnxt *bp = (struct bnxt *)eth_dev->data->dev_private;
 498         uint64_t tx_offloads = eth_dev->data->dev_conf.txmode.offloads;
 499         uint64_t rx_offloads = eth_dev->data->dev_conf.rxmode.offloads;
 500
 501         if (tx_offloads != (tx_offloads & BNXT_DEV_TX_OFFLOAD_SUPPORT)) {
 502                 PMD_DRV_LOG
 503                         (ERR,
 504                          "Tx offloads requested 0x%" PRIx64 " supported 0x%x\n",
 505                          tx_offloads, BNXT_DEV_TX_OFFLOAD_SUPPORT);
 506                 return -ENOTSUP;
 507         }
 508
 509         if (rx_offloads != (rx_offloads & BNXT_DEV_RX_OFFLOAD_SUPPORT)) {
 510                 PMD_DRV_LOG
 511                         (ERR,
 512                          "Rx offloads requested 0x%" PRIx64 " supported 0x%x\n",
 513                             rx_offloads, BNXT_DEV_RX_OFFLOAD_SUPPORT);
 514                 return -ENOTSUP;
 515         }
 516
 517         bp->rx_queues = (void *)eth_dev->data->rx_queues;
 518         bp->tx_queues = (void *)eth_dev->data->tx_queues;
 519
 520         /* Inherit new configurations */
 521         if (eth_dev->data->nb_rx_queues > bp->max_rx_rings ||
 522             eth_dev->data->nb_tx_queues > bp->max_tx_rings ||
 523             eth_dev->data->nb_rx_queues + eth_dev->data->nb_tx_queues + 1 >
 524             bp->max_cp_rings ||
 525             eth_dev->data->nb_rx_queues + eth_dev->data->nb_tx_queues >
 526             bp->max_stat_ctx ||
 527             (uint32_t)(eth_dev->data->nb_rx_queues + 1) > bp->max_ring_grps) {
 528                 PMD_DRV_LOG(ERR,
 529                         "Insufficient resources to support requested config\n");
 530                 PMD_DRV_LOG(ERR,
 531                         "Num Queues Requested: Tx %d, Rx %d\n",
 532                         eth_dev->data->nb_tx_queues,
 533                         eth_dev->data->nb_rx_queues);
 534                 PMD_DRV_LOG(ERR,
 535                         "Res available: TxQ %d, RxQ %d, CQ %d Stat %d, Grp %d\n",
 536                         bp->max_tx_rings, bp->max_rx_rings, bp->max_cp_rings,
 537                         bp->max_stat_ctx, bp->max_ring_grps);
 538                 return -ENOSPC;
 539         }
 540
 541         bp->rx_nr_rings = eth_dev->data->nb_rx_queues;
 542         bp->tx_nr_rings = eth_dev->data->nb_tx_queues;
 543         bp->rx_cp_nr_rings = bp->rx_nr_rings;
 544         bp->tx_cp_nr_rings = bp->tx_nr_rings;
 545
 546         if (rx_offloads & DEV_RX_OFFLOAD_JUMBO_FRAME)
 547                 eth_dev->data->mtu =
 548                                 eth_dev->data->dev_conf.rxmode.max_rx_pkt_len -
 549                                 ETHER_HDR_LEN - ETHER_CRC_LEN - VLAN_TAG_SIZE;
 550         return 0;
 551 }
 552
 553 static void bnxt_print_link_info(struct rte_eth_dev *eth_dev)
 554 {
 555         struct rte_eth_link *link = &eth_dev->data->dev_link;
 556
 557         if (link->link_status)
 558                 PMD_DRV_LOG(INFO, "Port %d Link Up - speed %u Mbps - %s\n",
 559                         eth_dev->data->port_id,
 560                         (uint32_t)link->link_speed,
 561                         (link->link_duplex == ETH_LINK_FULL_DUPLEX) ?
 562                         ("full-duplex") : ("half-duplex\n"));
 563         else
 564                 PMD_DRV_LOG(INFO, "Port %d Link Down\n",
 565                         eth_dev->data->port_id);
 566 }
 567
 568 static int bnxt_dev_lsc_intr_setup(struct rte_eth_dev *eth_dev)
 569 {
 570         bnxt_print_link_info(eth_dev);
 571         return 0;
 572 }
 573
 574 static int bnxt_dev_start_op(struct rte_eth_dev *eth_dev)
 575 {
 576         struct bnxt *bp = (struct bnxt *)eth_dev->data->dev_private;
 577         uint64_t rx_offloads = eth_dev->data->dev_conf.rxmode.offloads;
 578         int vlan_mask = 0;
 579         int rc;
 580
 581         if (bp->rx_cp_nr_rings > RTE_ETHDEV_QUEUE_STAT_CNTRS) {
 582                 PMD_DRV_LOG(ERR,
 583                         "RxQ cnt %d > CONFIG_RTE_ETHDEV_QUEUE_STAT_CNTRS %d\n",
 584                         bp->rx_cp_nr_rings, RTE_ETHDEV_QUEUE_STAT_CNTRS);
 585         }
 586         bp->dev_stopped = 0;
 587
 588         rc = bnxt_init_nic(bp);
 589         if (rc)
 590                 goto error;
 591
 592         bnxt_link_update_op(eth_dev, 1);
 593
 594         if (rx_offloads & DEV_RX_OFFLOAD_VLAN_FILTER)
 595                 vlan_mask |= ETH_VLAN_FILTER_MASK;
 596         if (rx_offloads & DEV_RX_OFFLOAD_VLAN_STRIP)
 597                 vlan_mask |= ETH_VLAN_STRIP_MASK;
 598         rc = bnxt_vlan_offload_set_op(eth_dev, vlan_mask);
 599         if (rc)
 600                 goto error;
 601
 602         bp->flags |= BNXT_FLAG_INIT_DONE;
 603         return 0;
 604
 605 error:
 606         bnxt_shutdown_nic(bp);
 607         bnxt_free_tx_mbufs(bp);
 608         bnxt_free_rx_mbufs(bp);
 609         return rc;
 610 }
 611
 612 static int bnxt_dev_set_link_up_op(struct rte_eth_dev *eth_dev)
 613 {
 614         struct bnxt *bp = (struct bnxt *)eth_dev->data->dev_private;
 615         int rc = 0;
 616
 617         if (!bp->link_info.link_up)
 618                 rc = bnxt_set_hwrm_link_config(bp, true);
 619         if (!rc)
 620                 eth_dev->data->dev_link.link_status = 1;
 621
 622         bnxt_print_link_info(eth_dev);
 623         return 0;
 624 }
 625
 626 static int bnxt_dev_set_link_down_op(struct rte_eth_dev *eth_dev)
 627 {
 628         struct bnxt *bp = (struct bnxt *)eth_dev->data->dev_private;
 629
 630         eth_dev->data->dev_link.link_status = 0;
 631         bnxt_set_hwrm_link_config(bp, false);
 632         bp->link_info.link_up = 0;
 633
 634         return 0;
 635 }
 636
 637 /* Unload the driver, release resources */
 638 static void bnxt_dev_stop_op(struct rte_eth_dev *eth_dev)
 639 {
 640         struct bnxt *bp = (struct bnxt *)eth_dev->data->dev_private;
 641
 642         if (bp->eth_dev->data->dev_started) {
 643                 /* TBD: STOP HW queues DMA */
 644                 eth_dev->data->dev_link.link_status = 0;
 645         }
 646         bnxt_set_hwrm_link_config(bp, false);
 647         bnxt_hwrm_port_clr_stats(bp);
 648         bp->flags &= ~BNXT_FLAG_INIT_DONE;
 649         bnxt_shutdown_nic(bp);
 650         bp->dev_stopped = 1;
 651 }
 652
 653 static void bnxt_dev_close_op(struct rte_eth_dev *eth_dev)
 654 {
 655         struct bnxt *bp = (struct bnxt *)eth_dev->data->dev_private;
 656
 657         if (bp->dev_stopped == 0)
 658                 bnxt_dev_stop_op(eth_dev);
 659
 660         bnxt_free_tx_mbufs(bp);
 661         bnxt_free_rx_mbufs(bp);
 662         bnxt_free_mem(bp);
 663         if (eth_dev->data->mac_addrs != NULL) {
 664                 rte_free(eth_dev->data->mac_addrs);
 665                 eth_dev->data->mac_addrs = NULL;
 666         }
 667         if (bp->grp_info != NULL) {
 668                 rte_free(bp->grp_info);
 669                 bp->grp_info = NULL;
 670         }
 671 }
 672
 673 static void bnxt_mac_addr_remove_op(struct rte_eth_dev *eth_dev,
 674                                     uint32_t index)
 675 {
 676         struct bnxt *bp = (struct bnxt *)eth_dev->data->dev_private;
 677         uint64_t pool_mask = eth_dev->data->mac_pool_sel[index];
 678         struct bnxt_vnic_info *vnic;
 679         struct bnxt_filter_info *filter, *temp_filter;
 680         uint32_t pool = RTE_MIN(MAX_FF_POOLS, ETH_64_POOLS);
 681         uint32_t i;
 682
 683         /*
 684          * Loop through all VNICs from the specified filter flow pools to
 685          * remove the corresponding MAC addr filter
 686          */
 687         for (i = 0; i < pool; i++) {
 688                 if (!(pool_mask & (1ULL << i)))
 689                         continue;
 690
 691                 STAILQ_FOREACH(vnic, &bp->ff_pool[i], next) {
 692                         filter = STAILQ_FIRST(&vnic->filter);
 693                         while (filter) {
 694                                 temp_filter = STAILQ_NEXT(filter, next);
 695                                 if (filter->mac_index == index) {
 696                                         STAILQ_REMOVE(&vnic->filter, filter,
 697                                                       bnxt_filter_info, next);
 698                                         bnxt_hwrm_clear_l2_filter(bp, filter);
 699                                         filter->mac_index = INVALID_MAC_INDEX;
 700                                         memset(&filter->l2_addr, 0,
 701                                                ETHER_ADDR_LEN);
 702                                         STAILQ_INSERT_TAIL(
 703                                                         &bp->free_filter_list,
 704                                                         filter, next);
 705                                 }
 706                                 filter = temp_filter;
 707                         }
 708                 }
 709         }
 710 }
 711
 712 static int bnxt_mac_addr_add_op(struct rte_eth_dev *eth_dev,
 713                                 struct ether_addr *mac_addr,
 714                                 uint32_t index, uint32_t pool)
 715 {
 716         struct bnxt *bp = (struct bnxt *)eth_dev->data->dev_private;
 717         struct bnxt_vnic_info *vnic = STAILQ_FIRST(&bp->ff_pool[pool]);
 718         struct bnxt_filter_info *filter;
 719
 720         if (BNXT_VF(bp)) {
 721                 PMD_DRV_LOG(ERR, "Cannot add MAC address to a VF interface\n");
 722                 return -ENOTSUP;
 723         }
 724
 725         if (!vnic) {
 726                 PMD_DRV_LOG(ERR, "VNIC not found for pool %d!\n", pool);
 727                 return -EINVAL;
 728         }
 729         /* Attach requested MAC address to the new l2_filter */
 730         STAILQ_FOREACH(filter, &vnic->filter, next) {
 731                 if (filter->mac_index == index) {
 732                         PMD_DRV_LOG(ERR,
 733                                 "MAC addr already existed for pool %d\n", pool);
 734                         return 0;
 735                 }
 736         }
 737         filter = bnxt_alloc_filter(bp);
 738         if (!filter) {
 739                 PMD_DRV_LOG(ERR, "L2 filter alloc failed\n");
 740                 return -ENODEV;
 741         }
 742         STAILQ_INSERT_TAIL(&vnic->filter, filter, next);
 743         filter->mac_index = index;
 744         memcpy(filter->l2_addr, mac_addr, ETHER_ADDR_LEN);
 745         return bnxt_hwrm_set_l2_filter(bp, vnic->fw_vnic_id, filter);
 746 }
 747
 748 int bnxt_link_update_op(struct rte_eth_dev *eth_dev, int wait_to_complete)
 749 {
 750         int rc = 0;
 751         struct bnxt *bp = (struct bnxt *)eth_dev->data->dev_private;
 752         struct rte_eth_link new;
 753         unsigned int cnt = BNXT_LINK_WAIT_CNT;
 754
 755         memset(&new, 0, sizeof(new));
 756         do {
 757                 /* Retrieve link info from hardware */
 758                 rc = bnxt_get_hwrm_link_config(bp, &new);
 759                 if (rc) {
 760                         new.link_speed = ETH_LINK_SPEED_100M;
 761                         new.link_duplex = ETH_LINK_FULL_DUPLEX;
 762                         PMD_DRV_LOG(ERR,
 763                                 "Failed to retrieve link rc = 0x%x!\n", rc);
 764                         goto out;
 765                 }
 766                 rte_delay_ms(BNXT_LINK_WAIT_INTERVAL);
 767
 768                 if (!wait_to_complete)
 769                         break;
 770         } while (!new.link_status && cnt--);
 771
 772 out:
 773         /* Timed out or success */
 774         if (new.link_status != eth_dev->data->dev_link.link_status ||
 775         new.link_speed != eth_dev->data->dev_link.link_speed) {
 776                 memcpy(&eth_dev->data->dev_link, &new,
 777                         sizeof(struct rte_eth_link));
 778                 bnxt_print_link_info(eth_dev);
 779         }
 780
 781         return rc;
 782 }
 783
 784 static void bnxt_promiscuous_enable_op(struct rte_eth_dev *eth_dev)
 785 {
 786         struct bnxt *bp = (struct bnxt *)eth_dev->data->dev_private;
 787         struct bnxt_vnic_info *vnic;
 788
 789         if (bp->vnic_info == NULL)
 790                 return;
 791
 792         vnic = &bp->vnic_info[0];
 793
 794         vnic->flags |= BNXT_VNIC_INFO_PROMISC;
 795         bnxt_hwrm_cfa_l2_set_rx_mask(bp, vnic, 0, NULL);
 796 }
 797
 798 static void bnxt_promiscuous_disable_op(struct rte_eth_dev *eth_dev)
 799 {
 800         struct bnxt *bp = (struct bnxt *)eth_dev->data->dev_private;
 801         struct bnxt_vnic_info *vnic;
 802
 803         if (bp->vnic_info == NULL)
 804                 return;
 805
 806         vnic = &bp->vnic_info[0];
 807
 808         vnic->flags &= ~BNXT_VNIC_INFO_PROMISC;
 809         bnxt_hwrm_cfa_l2_set_rx_mask(bp, vnic, 0, NULL);
 810 }
 811
 812 static void bnxt_allmulticast_enable_op(struct rte_eth_dev *eth_dev)
 813 {
 814         struct bnxt *bp = (struct bnxt *)eth_dev->data->dev_private;
 815         struct bnxt_vnic_info *vnic;
 816
 817         if (bp->vnic_info == NULL)
 818                 return;
 819
 820         vnic = &bp->vnic_info[0];
 821
 822         vnic->flags |= BNXT_VNIC_INFO_ALLMULTI;
 823         bnxt_hwrm_cfa_l2_set_rx_mask(bp, vnic, 0, NULL);
 824 }
 825
 826 static void bnxt_allmulticast_disable_op(struct rte_eth_dev *eth_dev)
 827 {
 828         struct bnxt *bp = (struct bnxt *)eth_dev->data->dev_private;
 829         struct bnxt_vnic_info *vnic;
 830
 831         if (bp->vnic_info == NULL)
 832                 return;
 833
 834         vnic = &bp->vnic_info[0];
 835
 836         vnic->flags &= ~BNXT_VNIC_INFO_ALLMULTI;
 837         bnxt_hwrm_cfa_l2_set_rx_mask(bp, vnic, 0, NULL);
 838 }
 839
 840 static int bnxt_reta_update_op(struct rte_eth_dev *eth_dev,
 841                             struct rte_eth_rss_reta_entry64 *reta_conf,
 842                             uint16_t reta_size)
 843 {
 844         struct bnxt *bp = (struct bnxt *)eth_dev->data->dev_private;
 845         struct rte_eth_conf *dev_conf = &bp->eth_dev->data->dev_conf;
 846         struct bnxt_vnic_info *vnic;
 847         int i;
 848
 849         if (!(dev_conf->rxmode.mq_mode & ETH_MQ_RX_RSS_FLAG))
 850                 return -EINVAL;
 851
 852         if (reta_size != HW_HASH_INDEX_SIZE) {
 853                 PMD_DRV_LOG(ERR, "The configured hash table lookup size "
 854                         "(%d) must equal the size supported by the hardware "
 855                         "(%d)\n", reta_size, HW_HASH_INDEX_SIZE);
 856                 return -EINVAL;
 857         }
 858         /* Update the RSS VNIC(s) */
 859         for (i = 0; i < MAX_FF_POOLS; i++) {
 860                 STAILQ_FOREACH(vnic, &bp->ff_pool[i], next) {
 861                         memcpy(vnic->rss_table, reta_conf, reta_size);
 862
 863                         bnxt_hwrm_vnic_rss_cfg(bp, vnic);
 864                 }
 865         }
 866         return 0;
 867 }
 868
 869 static int bnxt_reta_query_op(struct rte_eth_dev *eth_dev,
 870                               struct rte_eth_rss_reta_entry64 *reta_conf,
 871                               uint16_t reta_size)
 872 {
 873         struct bnxt *bp = (struct bnxt *)eth_dev->data->dev_private;
 874         struct bnxt_vnic_info *vnic = &bp->vnic_info[0];
 875         struct rte_intr_handle *intr_handle
 876                 = &bp->pdev->intr_handle;
 877
 878         /* Retrieve from the default VNIC */
 879         if (!vnic)
 880                 return -EINVAL;
 881         if (!vnic->rss_table)
 882                 return -EINVAL;
 883
 884         if (reta_size != HW_HASH_INDEX_SIZE) {
 885                 PMD_DRV_LOG(ERR, "The configured hash table lookup size "
 886                         "(%d) must equal the size supported by the hardware "
 887                         "(%d)\n", reta_size, HW_HASH_INDEX_SIZE);
 888                 return -EINVAL;
 889         }
 890         /* EW - need to revisit here copying from uint64_t to uint16_t */
 891         memcpy(reta_conf, vnic->rss_table, reta_size);
 892
 893         if (rte_intr_allow_others(intr_handle)) {
 894                 if (eth_dev->data->dev_conf.intr_conf.lsc != 0)
 895                         bnxt_dev_lsc_intr_setup(eth_dev);
 896         }
 897
 898         return 0;
 899 }
 900
 901 static int bnxt_rss_hash_update_op(struct rte_eth_dev *eth_dev,
 902                                    struct rte_eth_rss_conf *rss_conf)
 903 {
 904         struct bnxt *bp = (struct bnxt *)eth_dev->data->dev_private;
 905         struct rte_eth_conf *dev_conf = &bp->eth_dev->data->dev_conf;
 906         struct bnxt_vnic_info *vnic;
 907         uint16_t hash_type = 0;
 908         int i;
 909
 910         /*
 911          * If RSS enablement were different than dev_configure,
 912          * then return -EINVAL
 913          */
 914         if (dev_conf->rxmode.mq_mode & ETH_MQ_RX_RSS_FLAG) {
 915                 if (!rss_conf->rss_hf)
 916                         PMD_DRV_LOG(ERR, "Hash type NONE\n");
 917         } else {
 918                 if (rss_conf->rss_hf & BNXT_ETH_RSS_SUPPORT)
 919                         return -EINVAL;
 920         }
 921
 922         bp->flags |= BNXT_FLAG_UPDATE_HASH;
 923         memcpy(&bp->rss_conf, rss_conf, sizeof(*rss_conf));
 924
 925         if (rss_conf->rss_hf & ETH_RSS_IPV4)
 926                 hash_type |= HWRM_VNIC_RSS_CFG_INPUT_HASH_TYPE_IPV4;
 927         if (rss_conf->rss_hf & ETH_RSS_NONFRAG_IPV4_TCP)
 928                 hash_type |= HWRM_VNIC_RSS_CFG_INPUT_HASH_TYPE_TCP_IPV4;
 929         if (rss_conf->rss_hf & ETH_RSS_NONFRAG_IPV4_UDP)
 930                 hash_type |= HWRM_VNIC_RSS_CFG_INPUT_HASH_TYPE_UDP_IPV4;
 931         if (rss_conf->rss_hf & ETH_RSS_IPV6)
 932                 hash_type |= HWRM_VNIC_RSS_CFG_INPUT_HASH_TYPE_IPV6;
 933         if (rss_conf->rss_hf & ETH_RSS_NONFRAG_IPV6_TCP)
 934                 hash_type |= HWRM_VNIC_RSS_CFG_INPUT_HASH_TYPE_TCP_IPV6;
 935         if (rss_conf->rss_hf & ETH_RSS_NONFRAG_IPV6_UDP)
 936                 hash_type |= HWRM_VNIC_RSS_CFG_INPUT_HASH_TYPE_UDP_IPV6;
 937
 938         /* Update the RSS VNIC(s) */
 939         for (i = 0; i < MAX_FF_POOLS; i++) {
 940                 STAILQ_FOREACH(vnic, &bp->ff_pool[i], next) {
 941                         vnic->hash_type = hash_type;
 942
 943                         /*
 944                          * Use the supplied key if the key length is
 945                          * acceptable and the rss_key is not NULL
 946                          */
 947                         if (rss_conf->rss_key &&
 948                             rss_conf->rss_key_len <= HW_HASH_KEY_SIZE)
 949                                 memcpy(vnic->rss_hash_key, rss_conf->rss_key,
 950                                        rss_conf->rss_key_len);
 951
 952                         bnxt_hwrm_vnic_rss_cfg(bp, vnic);
 953                 }
 954         }
 955         return 0;
 956 }
 957
 958 static int bnxt_rss_hash_conf_get_op(struct rte_eth_dev *eth_dev,
 959                                      struct rte_eth_rss_conf *rss_conf)
 960 {
 961         struct bnxt *bp = (struct bnxt *)eth_dev->data->dev_private;
 962         struct bnxt_vnic_info *vnic = &bp->vnic_info[0];
 963         int len;
 964         uint32_t hash_types;
 965
 966         /* RSS configuration is the same for all VNICs */
 967         if (vnic && vnic->rss_hash_key) {
 968                 if (rss_conf->rss_key) {
 969                         len = rss_conf->rss_key_len <= HW_HASH_KEY_SIZE ?
 970                               rss_conf->rss_key_len : HW_HASH_KEY_SIZE;
 971                         memcpy(rss_conf->rss_key, vnic->rss_hash_key, len);
 972                 }
 973
 974                 hash_types = vnic->hash_type;
 975                 rss_conf->rss_hf = 0;
 976                 if (hash_types & HWRM_VNIC_RSS_CFG_INPUT_HASH_TYPE_IPV4) {
 977                         rss_conf->rss_hf |= ETH_RSS_IPV4;
 978                         hash_types &= ~HWRM_VNIC_RSS_CFG_INPUT_HASH_TYPE_IPV4;
 979                 }
 980                 if (hash_types & HWRM_VNIC_RSS_CFG_INPUT_HASH_TYPE_TCP_IPV4) {
 981                         rss_conf->rss_hf |= ETH_RSS_NONFRAG_IPV4_TCP;
 982                         hash_types &=
 983                                 ~HWRM_VNIC_RSS_CFG_INPUT_HASH_TYPE_TCP_IPV4;
 984                 }
 985                 if (hash_types & HWRM_VNIC_RSS_CFG_INPUT_HASH_TYPE_UDP_IPV4) {
 986                         rss_conf->rss_hf |= ETH_RSS_NONFRAG_IPV4_UDP;
 987                         hash_types &=
 988                                 ~HWRM_VNIC_RSS_CFG_INPUT_HASH_TYPE_UDP_IPV4;
 989                 }
 990                 if (hash_types & HWRM_VNIC_RSS_CFG_INPUT_HASH_TYPE_IPV6) {
 991                         rss_conf->rss_hf |= ETH_RSS_IPV6;
 992                         hash_types &= ~HWRM_VNIC_RSS_CFG_INPUT_HASH_TYPE_IPV6;
 993                 }
 994                 if (hash_types & HWRM_VNIC_RSS_CFG_INPUT_HASH_TYPE_TCP_IPV6) {
 995                         rss_conf->rss_hf |= ETH_RSS_NONFRAG_IPV6_TCP;
 996                         hash_types &=
 997                                 ~HWRM_VNIC_RSS_CFG_INPUT_HASH_TYPE_TCP_IPV6;
 998                 }
 999                 if (hash_types & HWRM_VNIC_RSS_CFG_INPUT_HASH_TYPE_UDP_IPV6) {
1000                         rss_conf->rss_hf |= ETH_RSS_NONFRAG_IPV6_UDP;
1001                         hash_types &=
1002                                 ~HWRM_VNIC_RSS_CFG_INPUT_HASH_TYPE_UDP_IPV6;
1003                 }
1004                 if (hash_types) {
1005                         PMD_DRV_LOG(ERR,
1006                                 "Unknwon RSS config from firmware (%08x), RSS disabled",
1007                                 vnic->hash_type);
1008                         return -ENOTSUP;
1009                 }
1010         } else {
1011                 rss_conf->rss_hf = 0;
1012         }
1013         return 0;
1014 }
1015
1016 static int bnxt_flow_ctrl_get_op(struct rte_eth_dev *dev,
1017                                struct rte_eth_fc_conf *fc_conf)
1018 {
1019         struct bnxt *bp = (struct bnxt *)dev->data->dev_private;
1020         struct rte_eth_link link_info;
1021         int rc;
1022
1023         rc = bnxt_get_hwrm_link_config(bp, &link_info);
1024         if (rc)
1025                 return rc;
1026
1027         memset(fc_conf, 0, sizeof(*fc_conf));
1028         if (bp->link_info.auto_pause)
1029                 fc_conf->autoneg = 1;
1030         switch (bp->link_info.pause) {
1031         case 0:
1032                 fc_conf->mode = RTE_FC_NONE;
1033                 break;
1034         case HWRM_PORT_PHY_QCFG_OUTPUT_PAUSE_TX:
1035                 fc_conf->mode = RTE_FC_TX_PAUSE;
1036                 break;
1037         case HWRM_PORT_PHY_QCFG_OUTPUT_PAUSE_RX:
1038                 fc_conf->mode = RTE_FC_RX_PAUSE;
1039                 break;
1040         case (HWRM_PORT_PHY_QCFG_OUTPUT_PAUSE_TX |
1041                         HWRM_PORT_PHY_QCFG_OUTPUT_PAUSE_RX):
1042                 fc_conf->mode = RTE_FC_FULL;
1043                 break;
1044         }
1045         return 0;
1046 }
1047
1048 static int bnxt_flow_ctrl_set_op(struct rte_eth_dev *dev,
1049                                struct rte_eth_fc_conf *fc_conf)
1050 {
1051         struct bnxt *bp = (struct bnxt *)dev->data->dev_private;
1052
1053         if (!BNXT_SINGLE_PF(bp) || BNXT_VF(bp)) {
1054                 PMD_DRV_LOG(ERR, "Flow Control Settings cannot be modified\n");
1055                 return -ENOTSUP;
1056         }
1057
1058         switch (fc_conf->mode) {
1059         case RTE_FC_NONE:
1060                 bp->link_info.auto_pause = 0;
1061                 bp->link_info.force_pause = 0;
1062                 break;
1063         case RTE_FC_RX_PAUSE:
1064                 if (fc_conf->autoneg) {
1065                         bp->link_info.auto_pause =
1066                                         HWRM_PORT_PHY_CFG_INPUT_AUTO_PAUSE_RX;
1067                         bp->link_info.force_pause = 0;
1068                 } else {
1069                         bp->link_info.auto_pause = 0;
1070                         bp->link_info.force_pause =
1071                                         HWRM_PORT_PHY_CFG_INPUT_FORCE_PAUSE_RX;
1072                 }
1073                 break;
1074         case RTE_FC_TX_PAUSE:
1075                 if (fc_conf->autoneg) {
1076                         bp->link_info.auto_pause =
1077                                         HWRM_PORT_PHY_CFG_INPUT_AUTO_PAUSE_TX;
1078                         bp->link_info.force_pause = 0;
1079                 } else {
1080                         bp->link_info.auto_pause = 0;
1081                         bp->link_info.force_pause =
1082                                         HWRM_PORT_PHY_CFG_INPUT_FORCE_PAUSE_TX;
1083                 }
1084                 break;
1085         case RTE_FC_FULL:
1086                 if (fc_conf->autoneg) {
1087                         bp->link_info.auto_pause =
1088                                         HWRM_PORT_PHY_CFG_INPUT_AUTO_PAUSE_TX |
1089                                         HWRM_PORT_PHY_CFG_INPUT_AUTO_PAUSE_RX;
1090                         bp->link_info.force_pause = 0;
1091                 } else {
1092                         bp->link_info.auto_pause = 0;
1093                         bp->link_info.force_pause =
1094                                         HWRM_PORT_PHY_CFG_INPUT_FORCE_PAUSE_TX |
1095                                         HWRM_PORT_PHY_CFG_INPUT_FORCE_PAUSE_RX;
1096                 }
1097                 break;
1098         }
1099         return bnxt_set_hwrm_link_config(bp, true);
1100 }
1101
1102 /* Add UDP tunneling port */
1103 static int
1104 bnxt_udp_tunnel_port_add_op(struct rte_eth_dev *eth_dev,
1105                          struct rte_eth_udp_tunnel *udp_tunnel)
1106 {
1107         struct bnxt *bp = (struct bnxt *)eth_dev->data->dev_private;
1108         uint16_t tunnel_type = 0;
1109         int rc = 0;
1110
1111         switch (udp_tunnel->prot_type) {
1112         case RTE_TUNNEL_TYPE_VXLAN:
1113                 if (bp->vxlan_port_cnt) {
1114                         PMD_DRV_LOG(ERR, "Tunnel Port %d already programmed\n",
1115                                 udp_tunnel->udp_port);
1116                         if (bp->vxlan_port != udp_tunnel->udp_port) {
1117                                 PMD_DRV_LOG(ERR, "Only one port allowed\n");
1118                                 return -ENOSPC;
1119                         }
1120                         bp->vxlan_port_cnt++;
1121                         return 0;
1122                 }
1123                 tunnel_type =
1124                         HWRM_TUNNEL_DST_PORT_ALLOC_INPUT_TUNNEL_TYPE_VXLAN;
1125                 bp->vxlan_port_cnt++;
1126                 break;
1127         case RTE_TUNNEL_TYPE_GENEVE:
1128                 if (bp->geneve_port_cnt) {
1129                         PMD_DRV_LOG(ERR, "Tunnel Port %d already programmed\n",
1130                                 udp_tunnel->udp_port);
1131                         if (bp->geneve_port != udp_tunnel->udp_port) {
1132                                 PMD_DRV_LOG(ERR, "Only one port allowed\n");
1133                                 return -ENOSPC;
1134                         }
1135                         bp->geneve_port_cnt++;
1136                         return 0;
1137                 }
1138                 tunnel_type =
1139                         HWRM_TUNNEL_DST_PORT_ALLOC_INPUT_TUNNEL_TYPE_GENEVE;
1140                 bp->geneve_port_cnt++;
1141                 break;
1142         default:
1143                 PMD_DRV_LOG(ERR, "Tunnel type is not supported\n");
1144                 return -ENOTSUP;
1145         }
1146         rc = bnxt_hwrm_tunnel_dst_port_alloc(bp, udp_tunnel->udp_port,
1147                                              tunnel_type);
1148         return rc;
1149 }
1150
1151 static int
1152 bnxt_udp_tunnel_port_del_op(struct rte_eth_dev *eth_dev,
1153                          struct rte_eth_udp_tunnel *udp_tunnel)
1154 {
1155         struct bnxt *bp = (struct bnxt *)eth_dev->data->dev_private;
1156         uint16_t tunnel_type = 0;
1157         uint16_t port = 0;
1158         int rc = 0;
1159
1160         switch (udp_tunnel->prot_type) {
1161         case RTE_TUNNEL_TYPE_VXLAN:
1162                 if (!bp->vxlan_port_cnt) {
1163                         PMD_DRV_LOG(ERR, "No Tunnel port configured yet\n");
1164                         return -EINVAL;
1165                 }
1166                 if (bp->vxlan_port != udp_tunnel->udp_port) {
1167                         PMD_DRV_LOG(ERR, "Req Port: %d. Configured port: %d\n",
1168                                 udp_tunnel->udp_port, bp->vxlan_port);
1169                         return -EINVAL;
1170                 }
1171                 if (--bp->vxlan_port_cnt)
1172                         return 0;
1173
1174                 tunnel_type =
1175                         HWRM_TUNNEL_DST_PORT_FREE_INPUT_TUNNEL_TYPE_VXLAN;
1176                 port = bp->vxlan_fw_dst_port_id;
1177                 break;
1178         case RTE_TUNNEL_TYPE_GENEVE:
1179                 if (!bp->geneve_port_cnt) {
1180                         PMD_DRV_LOG(ERR, "No Tunnel port configured yet\n");
1181                         return -EINVAL;
1182                 }
1183                 if (bp->geneve_port != udp_tunnel->udp_port) {
1184                         PMD_DRV_LOG(ERR, "Req Port: %d. Configured port: %d\n",
1185                                 udp_tunnel->udp_port, bp->geneve_port);
1186                         return -EINVAL;
1187                 }
1188                 if (--bp->geneve_port_cnt)
1189                         return 0;
1190
1191                 tunnel_type =
1192                         HWRM_TUNNEL_DST_PORT_FREE_INPUT_TUNNEL_TYPE_GENEVE;
1193                 port = bp->geneve_fw_dst_port_id;
1194                 break;
1195         default:
1196                 PMD_DRV_LOG(ERR, "Tunnel type is not supported\n");
1197                 return -ENOTSUP;
1198         }
1199
1200         rc = bnxt_hwrm_tunnel_dst_port_free(bp, port, tunnel_type);
1201         if (!rc) {
1202                 if (tunnel_type ==
1203                     HWRM_TUNNEL_DST_PORT_FREE_INPUT_TUNNEL_TYPE_VXLAN)
1204                         bp->vxlan_port = 0;
1205                 if (tunnel_type ==
1206                     HWRM_TUNNEL_DST_PORT_FREE_INPUT_TUNNEL_TYPE_GENEVE)
1207                         bp->geneve_port = 0;
1208         }
1209         return rc;
1210 }
1211
1212 static int bnxt_del_vlan_filter(struct bnxt *bp, uint16_t vlan_id)
1213 {
1214         struct bnxt_filter_info *filter, *temp_filter, *new_filter;
1215         struct bnxt_vnic_info *vnic;
1216         unsigned int i;
1217         int rc = 0;
1218         uint32_t chk = HWRM_CFA_L2_FILTER_ALLOC_INPUT_ENABLES_L2_OVLAN;
1219
1220         /* Cycle through all VNICs */
1221         for (i = 0; i < bp->nr_vnics; i++) {
1222                 /*
1223                  * For each VNIC and each associated filter(s)
1224                  * if VLAN exists && VLAN matches vlan_id
1225                  *      remove the MAC+VLAN filter
1226                  *      add a new MAC only filter
1227                  * else
1228                  *      VLAN filter doesn't exist, just skip and continue
1229                  */
1230                 STAILQ_FOREACH(vnic, &bp->ff_pool[i], next) {
1231                         filter = STAILQ_FIRST(&vnic->filter);
1232                         while (filter) {
1233                                 temp_filter = STAILQ_NEXT(filter, next);
1234
1235                                 if (filter->enables & chk &&
1236                                     filter->l2_ovlan == vlan_id) {
1237                                         /* Must delete the filter */
1238                                         STAILQ_REMOVE(&vnic->filter, filter,
1239                                                       bnxt_filter_info, next);
1240                                         bnxt_hwrm_clear_l2_filter(bp, filter);
1241                                         STAILQ_INSERT_TAIL(
1242                                                         &bp->free_filter_list,
1243                                                         filter, next);
1244
1245                                         /*
1246                                          * Need to examine to see if the MAC
1247                                          * filter already existed or not before
1248                                          * allocating a new one
1249                                          */
1250
1251                                         new_filter = bnxt_alloc_filter(bp);
1252                                         if (!new_filter) {
1253                                                 PMD_DRV_LOG(ERR,
1254                                                         "MAC/VLAN filter alloc failed\n");
1255                                                 rc = -ENOMEM;
1256                                                 goto exit;
1257                                         }
1258                                         STAILQ_INSERT_TAIL(&vnic->filter,
1259                                                            new_filter, next);
1260                                         /* Inherit MAC from previous filter */
1261                                         new_filter->mac_index =
1262                                                         filter->mac_index;
1263                                         memcpy(new_filter->l2_addr,
1264                                                filter->l2_addr, ETHER_ADDR_LEN);
1265                                         /* MAC only filter */
1266                                         rc = bnxt_hwrm_set_l2_filter(bp,
1267                                                         vnic->fw_vnic_id,
1268                                                         new_filter);
1269                                         if (rc)
1270                                                 goto exit;
1271                                         PMD_DRV_LOG(INFO,
1272                                                 "Del Vlan filter for %d\n",
1273                                                 vlan_id);
1274                                 }
1275                                 filter = temp_filter;
1276                         }
1277                 }
1278         }
1279 exit:
1280         return rc;
1281 }
1282
1283 static int bnxt_add_vlan_filter(struct bnxt *bp, uint16_t vlan_id)
1284 {
1285         struct bnxt_filter_info *filter, *temp_filter, *new_filter;
1286         struct bnxt_vnic_info *vnic;
1287         unsigned int i;
1288         int rc = 0;
1289         uint32_t en = HWRM_CFA_L2_FILTER_ALLOC_INPUT_ENABLES_L2_OVLAN |
1290                 HWRM_CFA_L2_FILTER_ALLOC_INPUT_ENABLES_L2_OVLAN_MASK;
1291         uint32_t chk = HWRM_CFA_L2_FILTER_ALLOC_INPUT_ENABLES_L2_OVLAN;
1292
1293         /* Cycle through all VNICs */
1294         for (i = 0; i < bp->nr_vnics; i++) {
1295                 /*
1296                  * For each VNIC and each associated filter(s)
1297                  * if VLAN exists:
1298                  *   if VLAN matches vlan_id
1299                  *      VLAN filter already exists, just skip and continue
1300                  *   else
1301                  *      add a new MAC+VLAN filter
1302                  * else
1303                  *   Remove the old MAC only filter
1304                  *    Add a new MAC+VLAN filter
1305                  */
1306                 STAILQ_FOREACH(vnic, &bp->ff_pool[i], next) {
1307                         filter = STAILQ_FIRST(&vnic->filter);
1308                         while (filter) {
1309                                 temp_filter = STAILQ_NEXT(filter, next);
1310
1311                                 if (filter->enables & chk) {
1312                                         if (filter->l2_ovlan == vlan_id)
1313                                                 goto cont;
1314                                 } else {
1315                                         /* Must delete the MAC filter */
1316                                         STAILQ_REMOVE(&vnic->filter, filter,
1317                                                       bnxt_filter_info, next);
1318                                         bnxt_hwrm_clear_l2_filter(bp, filter);
1319                                         filter->l2_ovlan = 0;
1320                                         STAILQ_INSERT_TAIL(
1321                                                         &bp->free_filter_list,
1322                                                         filter, next);
1323                                 }
1324                                 new_filter = bnxt_alloc_filter(bp);
1325                                 if (!new_filter) {
1326                                         PMD_DRV_LOG(ERR,
1327                                                 "MAC/VLAN filter alloc failed\n");
1328                                         rc = -ENOMEM;
1329                                         goto exit;
1330                                 }
1331                                 STAILQ_INSERT_TAIL(&vnic->filter, new_filter,
1332                                                    next);
1333                                 /* Inherit MAC from the previous filter */
1334                                 new_filter->mac_index = filter->mac_index;
1335                                 memcpy(new_filter->l2_addr, filter->l2_addr,
1336                                        ETHER_ADDR_LEN);
1337                                 /* MAC + VLAN ID filter */
1338                                 new_filter->l2_ovlan = vlan_id;
1339                                 new_filter->l2_ovlan_mask = 0xF000;
1340                                 new_filter->enables |= en;
1341                                 rc = bnxt_hwrm_set_l2_filter(bp,
1342                                                              vnic->fw_vnic_id,
1343                                                              new_filter);
1344                                 if (rc)
1345                                         goto exit;
1346                                 PMD_DRV_LOG(INFO,
1347                                         "Added Vlan filter for %d\n", vlan_id);
1348 cont:
1349                                 filter = temp_filter;
1350                         }
1351                 }
1352         }
1353 exit:
1354         return rc;
1355 }
1356
1357 static int bnxt_vlan_filter_set_op(struct rte_eth_dev *eth_dev,
1358                                    uint16_t vlan_id, int on)
1359 {
1360         struct bnxt *bp = (struct bnxt *)eth_dev->data->dev_private;
1361
1362         /* These operations apply to ALL existing MAC/VLAN filters */
1363         if (on)
1364                 return bnxt_add_vlan_filter(bp, vlan_id);
1365         else
1366                 return bnxt_del_vlan_filter(bp, vlan_id);
1367 }
1368
1369 static int
1370 bnxt_vlan_offload_set_op(struct rte_eth_dev *dev, int mask)
1371 {
1372         struct bnxt *bp = (struct bnxt *)dev->data->dev_private;
1373         uint64_t rx_offloads = dev->data->dev_conf.rxmode.offloads;
1374         unsigned int i;
1375
1376         if (mask & ETH_VLAN_FILTER_MASK) {
1377                 if (!(rx_offloads & DEV_RX_OFFLOAD_VLAN_FILTER)) {
1378                         /* Remove any VLAN filters programmed */
1379                         for (i = 0; i < 4095; i++)
1380                                 bnxt_del_vlan_filter(bp, i);
1381                 }
1382                 PMD_DRV_LOG(DEBUG, "VLAN Filtering: %d\n",
1383                         !!(rx_offloads & DEV_RX_OFFLOAD_VLAN_FILTER));
1384         }
1385
1386         if (mask & ETH_VLAN_STRIP_MASK) {
1387                 /* Enable or disable VLAN stripping */
1388                 for (i = 0; i < bp->nr_vnics; i++) {
1389                         struct bnxt_vnic_info *vnic = &bp->vnic_info[i];
1390                         if (rx_offloads & DEV_RX_OFFLOAD_VLAN_STRIP)
1391                                 vnic->vlan_strip = true;
1392                         else
1393                                 vnic->vlan_strip = false;
1394                         bnxt_hwrm_vnic_cfg(bp, vnic);
1395                 }
1396                 PMD_DRV_LOG(DEBUG, "VLAN Strip Offload: %d\n",
1397                         !!(rx_offloads & DEV_RX_OFFLOAD_VLAN_STRIP));
1398         }
1399
1400         if (mask & ETH_VLAN_EXTEND_MASK)
1401                 PMD_DRV_LOG(ERR, "Extend VLAN Not supported\n");
1402
1403         return 0;
1404 }
1405
1406 static void
1407 bnxt_set_default_mac_addr_op(struct rte_eth_dev *dev, struct ether_addr *addr)
1408 {
1409         struct bnxt *bp = (struct bnxt *)dev->data->dev_private;
1410         /* Default Filter is tied to VNIC 0 */
1411         struct bnxt_vnic_info *vnic = &bp->vnic_info[0];
1412         struct bnxt_filter_info *filter;
1413         int rc;
1414
1415         if (BNXT_VF(bp))
1416                 return;
1417
1418         memcpy(bp->mac_addr, addr, sizeof(bp->mac_addr));
1419
1420         STAILQ_FOREACH(filter, &vnic->filter, next) {
1421                 /* Default Filter is at Index 0 */
1422                 if (filter->mac_index != 0)
1423                         continue;
1424                 rc = bnxt_hwrm_clear_l2_filter(bp, filter);
1425                 if (rc)
1426                         break;
1427                 memcpy(filter->l2_addr, bp->mac_addr, ETHER_ADDR_LEN);
1428                 memset(filter->l2_addr_mask, 0xff, ETHER_ADDR_LEN);
1429                 filter->flags |= HWRM_CFA_L2_FILTER_ALLOC_INPUT_FLAGS_PATH_RX;
1430                 filter->enables |=
1431                         HWRM_CFA_L2_FILTER_ALLOC_INPUT_ENABLES_L2_ADDR |
1432                         HWRM_CFA_L2_FILTER_ALLOC_INPUT_ENABLES_L2_ADDR_MASK;
1433                 rc = bnxt_hwrm_set_l2_filter(bp, vnic->fw_vnic_id, filter);
1434                 if (rc)
1435                         break;
1436                 filter->mac_index = 0;
1437                 PMD_DRV_LOG(DEBUG, "Set MAC addr\n");
1438         }
1439 }
1440
1441 static int
1442 bnxt_dev_set_mc_addr_list_op(struct rte_eth_dev *eth_dev,
1443                           struct ether_addr *mc_addr_set,
1444                           uint32_t nb_mc_addr)
1445 {
1446         struct bnxt *bp = (struct bnxt *)eth_dev->data->dev_private;
1447         char *mc_addr_list = (char *)mc_addr_set;
1448         struct bnxt_vnic_info *vnic;
1449         uint32_t off = 0, i = 0;
1450
1451         vnic = &bp->vnic_info[0];
1452
1453         if (nb_mc_addr > BNXT_MAX_MC_ADDRS) {
1454                 vnic->flags |= BNXT_VNIC_INFO_ALLMULTI;
1455                 goto allmulti;
1456         }
1457
1458         /* TODO Check for Duplicate mcast addresses */
1459         vnic->flags &= ~BNXT_VNIC_INFO_ALLMULTI;
1460         for (i = 0; i < nb_mc_addr; i++) {
1461                 memcpy(vnic->mc_list + off, &mc_addr_list[i], ETHER_ADDR_LEN);
1462                 off += ETHER_ADDR_LEN;
1463         }
1464
1465         vnic->mc_addr_cnt = i;
1466
1467 allmulti:
1468         return bnxt_hwrm_cfa_l2_set_rx_mask(bp, vnic, 0, NULL);
1469 }
1470
1471 static int
1472 bnxt_fw_version_get(struct rte_eth_dev *dev, char *fw_version, size_t fw_size)
1473 {
1474         struct bnxt *bp = (struct bnxt *)dev->data->dev_private;
1475         uint8_t fw_major = (bp->fw_ver >> 24) & 0xff;
1476         uint8_t fw_minor = (bp->fw_ver >> 16) & 0xff;
1477         uint8_t fw_updt = (bp->fw_ver >> 8) & 0xff;
1478         int ret;
1479
1480         ret = snprintf(fw_version, fw_size, "%d.%d.%d",
1481                         fw_major, fw_minor, fw_updt);
1482
1483         ret += 1; /* add the size of '\0' */
1484         if (fw_size < (uint32_t)ret)
1485                 return ret;
1486         else
1487                 return 0;
1488 }
1489
1490 static void
1491 bnxt_rxq_info_get_op(struct rte_eth_dev *dev, uint16_t queue_id,
1492         struct rte_eth_rxq_info *qinfo)
1493 {
1494         struct bnxt_rx_queue *rxq;
1495
1496         rxq = dev->data->rx_queues[queue_id];
1497
1498         qinfo->mp = rxq->mb_pool;
1499         qinfo->scattered_rx = dev->data->scattered_rx;
1500         qinfo->nb_desc = rxq->nb_rx_desc;
1501
1502         qinfo->conf.rx_free_thresh = rxq->rx_free_thresh;
1503         qinfo->conf.rx_drop_en = 0;
1504         qinfo->conf.rx_deferred_start = 0;
1505 }
1506
1507 static void
1508 bnxt_txq_info_get_op(struct rte_eth_dev *dev, uint16_t queue_id,
1509         struct rte_eth_txq_info *qinfo)
1510 {
1511         struct bnxt_tx_queue *txq;
1512
1513         txq = dev->data->tx_queues[queue_id];
1514
1515         qinfo->nb_desc = txq->nb_tx_desc;
1516
1517         qinfo->conf.tx_thresh.pthresh = txq->pthresh;
1518         qinfo->conf.tx_thresh.hthresh = txq->hthresh;
1519         qinfo->conf.tx_thresh.wthresh = txq->wthresh;
1520
1521         qinfo->conf.tx_free_thresh = txq->tx_free_thresh;
1522         qinfo->conf.tx_rs_thresh = 0;
1523         qinfo->conf.txq_flags = txq->txq_flags;
1524         qinfo->conf.tx_deferred_start = txq->tx_deferred_start;
1525 }
1526
1527 static int bnxt_mtu_set_op(struct rte_eth_dev *eth_dev, uint16_t new_mtu)
1528 {
1529         struct bnxt *bp = eth_dev->data->dev_private;
1530         struct rte_eth_dev_info dev_info;
1531         uint32_t max_dev_mtu;
1532         uint32_t rc = 0;
1533         uint32_t i;
1534
1535         bnxt_dev_info_get_op(eth_dev, &dev_info);
1536         max_dev_mtu = dev_info.max_rx_pktlen -
1537                       ETHER_HDR_LEN - ETHER_CRC_LEN - VLAN_TAG_SIZE * 2;
1538
1539         if (new_mtu < ETHER_MIN_MTU || new_mtu > max_dev_mtu) {
1540                 PMD_DRV_LOG(ERR, "MTU requested must be within (%d, %d)\n",
1541                         ETHER_MIN_MTU, max_dev_mtu);
1542                 return -EINVAL;
1543         }
1544
1545
1546         if (new_mtu > ETHER_MTU) {
1547                 bp->flags |= BNXT_FLAG_JUMBO;
1548                 bp->eth_dev->data->dev_conf.rxmode.offloads |=
1549                         DEV_RX_OFFLOAD_JUMBO_FRAME;
1550         } else {
1551                 bp->eth_dev->data->dev_conf.rxmode.offloads &=
1552                         ~DEV_RX_OFFLOAD_JUMBO_FRAME;
1553                 bp->flags &= ~BNXT_FLAG_JUMBO;
1554         }
1555
1556         eth_dev->data->dev_conf.rxmode.max_rx_pkt_len =
1557                 new_mtu + ETHER_HDR_LEN + ETHER_CRC_LEN + VLAN_TAG_SIZE * 2;
1558
1559         eth_dev->data->mtu = new_mtu;
1560         PMD_DRV_LOG(INFO, "New MTU is %d\n", eth_dev->data->mtu);
1561
1562         for (i = 0; i < bp->nr_vnics; i++) {
1563                 struct bnxt_vnic_info *vnic = &bp->vnic_info[i];
1564
1565                 vnic->mru = bp->eth_dev->data->mtu + ETHER_HDR_LEN +
1566                                         ETHER_CRC_LEN + VLAN_TAG_SIZE * 2;
1567                 rc = bnxt_hwrm_vnic_cfg(bp, vnic);
1568                 if (rc)
1569                         break;
1570
1571                 rc = bnxt_hwrm_vnic_plcmode_cfg(bp, vnic);
1572                 if (rc)
1573                         return rc;
1574         }
1575
1576         return rc;
1577 }
1578
1579 static int
1580 bnxt_vlan_pvid_set_op(struct rte_eth_dev *dev, uint16_t pvid, int on)
1581 {
1582         struct bnxt *bp = (struct bnxt *)dev->data->dev_private;
1583         uint16_t vlan = bp->vlan;
1584         int rc;
1585
1586         if (!BNXT_SINGLE_PF(bp) || BNXT_VF(bp)) {
1587                 PMD_DRV_LOG(ERR,
1588                         "PVID cannot be modified for this function\n");
1589                 return -ENOTSUP;
1590         }
1591         bp->vlan = on ? pvid : 0;
1592
1593         rc = bnxt_hwrm_set_default_vlan(bp, 0, 0);
1594         if (rc)
1595                 bp->vlan = vlan;
1596         return rc;
1597 }
1598
1599 static int
1600 bnxt_dev_led_on_op(struct rte_eth_dev *dev)
1601 {
1602         struct bnxt *bp = (struct bnxt *)dev->data->dev_private;
1603
1604         return bnxt_hwrm_port_led_cfg(bp, true);
1605 }
1606
1607 static int
1608 bnxt_dev_led_off_op(struct rte_eth_dev *dev)
1609 {
1610         struct bnxt *bp = (struct bnxt *)dev->data->dev_private;
1611
1612         return bnxt_hwrm_port_led_cfg(bp, false);
1613 }
1614
1615 static uint32_t
1616 bnxt_rx_queue_count_op(struct rte_eth_dev *dev, uint16_t rx_queue_id)
1617 {
1618         uint32_t desc = 0, raw_cons = 0, cons;
1619         struct bnxt_cp_ring_info *cpr;
1620         struct bnxt_rx_queue *rxq;
1621         struct rx_pkt_cmpl *rxcmp;
1622         uint16_t cmp_type;
1623         uint8_t cmp = 1;
1624         bool valid;
1625
1626         rxq = dev->data->rx_queues[rx_queue_id];
1627         cpr = rxq->cp_ring;
1628         valid = cpr->valid;
1629
1630         while (raw_cons < rxq->nb_rx_desc) {
1631                 cons = RING_CMP(cpr->cp_ring_struct, raw_cons);
1632                 rxcmp = (struct rx_pkt_cmpl *)&cpr->cp_desc_ring[cons];
1633
1634                 if (!CMPL_VALID(rxcmp, valid))
1635                         goto nothing_to_do;
1636                 valid = FLIP_VALID(cons, cpr->cp_ring_struct->ring_mask, valid);
1637                 cmp_type = CMP_TYPE(rxcmp);
1638                 if (cmp_type == RX_TPA_END_CMPL_TYPE_RX_TPA_END) {
1639                         cmp = (rte_le_to_cpu_32(
1640                                         ((struct rx_tpa_end_cmpl *)
1641                                          (rxcmp))->agg_bufs_v1) &
1642                                RX_TPA_END_CMPL_AGG_BUFS_MASK) >>
1643                                 RX_TPA_END_CMPL_AGG_BUFS_SFT;
1644                         desc++;
1645                 } else if (cmp_type == 0x11) {
1646                         desc++;
1647                         cmp = (rxcmp->agg_bufs_v1 &
1648                                    RX_PKT_CMPL_AGG_BUFS_MASK) >>
1649                                 RX_PKT_CMPL_AGG_BUFS_SFT;
1650                 } else {
1651                         cmp = 1;
1652                 }
1653 nothing_to_do:
1654                 raw_cons += cmp ? cmp : 2;
1655         }
1656
1657         return desc;
1658 }
1659
1660 static int
1661 bnxt_rx_descriptor_status_op(void *rx_queue, uint16_t offset)
1662 {
1663         struct bnxt_rx_queue *rxq = (struct bnxt_rx_queue *)rx_queue;
1664         struct bnxt_rx_ring_info *rxr;
1665         struct bnxt_cp_ring_info *cpr;
1666         struct bnxt_sw_rx_bd *rx_buf;
1667         struct rx_pkt_cmpl *rxcmp;
1668         uint32_t cons, cp_cons;
1669
1670         if (!rxq)
1671                 return -EINVAL;
1672
1673         cpr = rxq->cp_ring;
1674         rxr = rxq->rx_ring;
1675
1676         if (offset >= rxq->nb_rx_desc)
1677                 return -EINVAL;
1678
1679         cons = RING_CMP(cpr->cp_ring_struct, offset);
1680         cp_cons = cpr->cp_raw_cons;
1681         rxcmp = (struct rx_pkt_cmpl *)&cpr->cp_desc_ring[cons];
1682
1683         if (cons > cp_cons) {
1684                 if (CMPL_VALID(rxcmp, cpr->valid))
1685                         return RTE_ETH_RX_DESC_DONE;
1686         } else {
1687                 if (CMPL_VALID(rxcmp, !cpr->valid))
1688                         return RTE_ETH_RX_DESC_DONE;
1689         }
1690         rx_buf = &rxr->rx_buf_ring[cons];
1691         if (rx_buf->mbuf == NULL)
1692                 return RTE_ETH_RX_DESC_UNAVAIL;
1693
1694
1695         return RTE_ETH_RX_DESC_AVAIL;
1696 }
1697
1698 static int
1699 bnxt_tx_descriptor_status_op(void *tx_queue, uint16_t offset)
1700 {
1701         struct bnxt_tx_queue *txq = (struct bnxt_tx_queue *)tx_queue;
1702         struct bnxt_tx_ring_info *txr;
1703         struct bnxt_cp_ring_info *cpr;
1704         struct bnxt_sw_tx_bd *tx_buf;
1705         struct tx_pkt_cmpl *txcmp;
1706         uint32_t cons, cp_cons;
1707
1708         if (!txq)
1709                 return -EINVAL;
1710
1711         cpr = txq->cp_ring;
1712         txr = txq->tx_ring;
1713
1714         if (offset >= txq->nb_tx_desc)
1715                 return -EINVAL;
1716
1717         cons = RING_CMP(cpr->cp_ring_struct, offset);
1718         txcmp = (struct tx_pkt_cmpl *)&cpr->cp_desc_ring[cons];
1719         cp_cons = cpr->cp_raw_cons;
1720
1721         if (cons > cp_cons) {
1722                 if (CMPL_VALID(txcmp, cpr->valid))
1723                         return RTE_ETH_TX_DESC_UNAVAIL;
1724         } else {
1725                 if (CMPL_VALID(txcmp, !cpr->valid))
1726                         return RTE_ETH_TX_DESC_UNAVAIL;
1727         }
1728         tx_buf = &txr->tx_buf_ring[cons];
1729         if (tx_buf->mbuf == NULL)
1730                 return RTE_ETH_TX_DESC_DONE;
1731
1732         return RTE_ETH_TX_DESC_FULL;
1733 }
1734
1735 static struct bnxt_filter_info *
1736 bnxt_match_and_validate_ether_filter(struct bnxt *bp,
1737                                 struct rte_eth_ethertype_filter *efilter,
1738                                 struct bnxt_vnic_info *vnic0,
1739                                 struct bnxt_vnic_info *vnic,
1740                                 int *ret)
1741 {
1742         struct bnxt_filter_info *mfilter = NULL;
1743         int match = 0;
1744         *ret = 0;
1745
1746         if (efilter->ether_type == ETHER_TYPE_IPv4 ||
1747                 efilter->ether_type == ETHER_TYPE_IPv6) {
1748                 PMD_DRV_LOG(ERR, "invalid ether_type(0x%04x) in"
1749                         " ethertype filter.", efilter->ether_type);
1750                 *ret = -EINVAL;
1751                 goto exit;
1752         }
1753         if (efilter->queue >= bp->rx_nr_rings) {
1754                 PMD_DRV_LOG(ERR, "Invalid queue %d\n", efilter->queue);
1755                 *ret = -EINVAL;
1756                 goto exit;
1757         }
1758
1759         vnic0 = STAILQ_FIRST(&bp->ff_pool[0]);
1760         vnic = STAILQ_FIRST(&bp->ff_pool[efilter->queue]);
1761         if (vnic == NULL) {
1762                 PMD_DRV_LOG(ERR, "Invalid queue %d\n", efilter->queue);
1763                 *ret = -EINVAL;
1764                 goto exit;
1765         }
1766
1767         if (efilter->flags & RTE_ETHTYPE_FLAGS_DROP) {
1768                 STAILQ_FOREACH(mfilter, &vnic0->filter, next) {
1769                         if ((!memcmp(efilter->mac_addr.addr_bytes,
1770                                      mfilter->l2_addr, ETHER_ADDR_LEN) &&
1771                              mfilter->flags ==
1772                              HWRM_CFA_NTUPLE_FILTER_ALLOC_INPUT_FLAGS_DROP &&
1773                              mfilter->ethertype == efilter->ether_type)) {
1774                                 match = 1;
1775                                 break;
1776                         }
1777                 }
1778         } else {
1779                 STAILQ_FOREACH(mfilter, &vnic->filter, next)
1780                         if ((!memcmp(efilter->mac_addr.addr_bytes,
1781                                      mfilter->l2_addr, ETHER_ADDR_LEN) &&
1782                              mfilter->ethertype == efilter->ether_type &&
1783                              mfilter->flags ==
1784                              HWRM_CFA_L2_FILTER_CFG_INPUT_FLAGS_PATH_RX)) {
1785                                 match = 1;
1786                                 break;
1787                         }
1788         }
1789
1790         if (match)
1791                 *ret = -EEXIST;
1792
1793 exit:
1794         return mfilter;
1795 }
1796
1797 static int
1798 bnxt_ethertype_filter(struct rte_eth_dev *dev,
1799                         enum rte_filter_op filter_op,
1800                         void *arg)
1801 {
1802         struct bnxt *bp = (struct bnxt *)dev->data->dev_private;
1803         struct rte_eth_ethertype_filter *efilter =
1804                         (struct rte_eth_ethertype_filter *)arg;
1805         struct bnxt_filter_info *bfilter, *filter1;
1806         struct bnxt_vnic_info *vnic, *vnic0;
1807         int ret;
1808
1809         if (filter_op == RTE_ETH_FILTER_NOP)
1810                 return 0;
1811
1812         if (arg == NULL) {
1813                 PMD_DRV_LOG(ERR, "arg shouldn't be NULL for operation %u.",
1814                             filter_op);
1815                 return -EINVAL;
1816         }
1817
1818         vnic0 = STAILQ_FIRST(&bp->ff_pool[0]);
1819         vnic = STAILQ_FIRST(&bp->ff_pool[efilter->queue]);
1820
1821         switch (filter_op) {
1822         case RTE_ETH_FILTER_ADD:
1823                 bnxt_match_and_validate_ether_filter(bp, efilter,
1824                                                         vnic0, vnic, &ret);
1825                 if (ret < 0)
1826                         return ret;
1827
1828                 bfilter = bnxt_get_unused_filter(bp);
1829                 if (bfilter == NULL) {
1830                         PMD_DRV_LOG(ERR,
1831                                 "Not enough resources for a new filter.\n");
1832                         return -ENOMEM;
1833                 }
1834                 bfilter->filter_type = HWRM_CFA_NTUPLE_FILTER;
1835                 memcpy(bfilter->l2_addr, efilter->mac_addr.addr_bytes,
1836                        ETHER_ADDR_LEN);
1837                 memcpy(bfilter->dst_macaddr, efilter->mac_addr.addr_bytes,
1838                        ETHER_ADDR_LEN);
1839                 bfilter->enables |= NTUPLE_FLTR_ALLOC_INPUT_EN_DST_MACADDR;
1840                 bfilter->ethertype = efilter->ether_type;
1841                 bfilter->enables |= NTUPLE_FLTR_ALLOC_INPUT_EN_ETHERTYPE;
1842
1843                 filter1 = bnxt_get_l2_filter(bp, bfilter, vnic0);
1844                 if (filter1 == NULL) {
1845                         ret = -1;
1846                         goto cleanup;
1847                 }
1848                 bfilter->enables |=
1849                         HWRM_CFA_NTUPLE_FILTER_ALLOC_INPUT_ENABLES_L2_FILTER_ID;
1850                 bfilter->fw_l2_filter_id = filter1->fw_l2_filter_id;
1851
1852                 bfilter->dst_id = vnic->fw_vnic_id;
1853
1854                 if (efilter->flags & RTE_ETHTYPE_FLAGS_DROP) {
1855                         bfilter->flags =
1856                                 HWRM_CFA_NTUPLE_FILTER_ALLOC_INPUT_FLAGS_DROP;
1857                 }
1858
1859                 ret = bnxt_hwrm_set_ntuple_filter(bp, bfilter->dst_id, bfilter);
1860                 if (ret)
1861                         goto cleanup;
1862                 STAILQ_INSERT_TAIL(&vnic->filter, bfilter, next);
1863                 break;
1864         case RTE_ETH_FILTER_DELETE:
1865                 filter1 = bnxt_match_and_validate_ether_filter(bp, efilter,
1866                                                         vnic0, vnic, &ret);
1867                 if (ret == -EEXIST) {
1868                         ret = bnxt_hwrm_clear_ntuple_filter(bp, filter1);
1869
1870                         STAILQ_REMOVE(&vnic->filter, filter1, bnxt_filter_info,
1871                                       next);
1872                         bnxt_free_filter(bp, filter1);
1873                 } else if (ret == 0) {
1874                         PMD_DRV_LOG(ERR, "No matching filter found\n");
1875                 }
1876                 break;
1877         default:
1878                 PMD_DRV_LOG(ERR, "unsupported operation %u.", filter_op);
1879                 ret = -EINVAL;
1880                 goto error;
1881         }
1882         return ret;
1883 cleanup:
1884         bnxt_free_filter(bp, bfilter);
1885 error:
1886         return ret;
1887 }
1888
1889 static inline int
1890 parse_ntuple_filter(struct bnxt *bp,
1891                     struct rte_eth_ntuple_filter *nfilter,
1892                     struct bnxt_filter_info *bfilter)
1893 {
1894         uint32_t en = 0;
1895
1896         if (nfilter->queue >= bp->rx_nr_rings) {
1897                 PMD_DRV_LOG(ERR, "Invalid queue %d\n", nfilter->queue);
1898                 return -EINVAL;
1899         }
1900
1901         switch (nfilter->dst_port_mask) {
1902         case UINT16_MAX:
1903                 bfilter->dst_port_mask = -1;
1904                 bfilter->dst_port = nfilter->dst_port;
1905                 en |= NTUPLE_FLTR_ALLOC_INPUT_EN_DST_PORT |
1906                         NTUPLE_FLTR_ALLOC_INPUT_EN_DST_PORT_MASK;
1907                 break;
1908         default:
1909                 PMD_DRV_LOG(ERR, "invalid dst_port mask.");
1910                 return -EINVAL;
1911         }
1912
1913         bfilter->ip_addr_type = NTUPLE_FLTR_ALLOC_INPUT_IP_ADDR_TYPE_IPV4;
1914         en |= NTUPLE_FLTR_ALLOC_IN_EN_IP_PROTO;
1915
1916         switch (nfilter->proto_mask) {
1917         case UINT8_MAX:
1918                 if (nfilter->proto == 17) /* IPPROTO_UDP */
1919                         bfilter->ip_protocol = 17;
1920                 else if (nfilter->proto == 6) /* IPPROTO_TCP */
1921                         bfilter->ip_protocol = 6;
1922                 else
1923                         return -EINVAL;
1924                 en |= NTUPLE_FLTR_ALLOC_IN_EN_IP_PROTO;
1925                 break;
1926         default:
1927                 PMD_DRV_LOG(ERR, "invalid protocol mask.");
1928                 return -EINVAL;
1929         }
1930
1931         switch (nfilter->dst_ip_mask) {
1932         case UINT32_MAX:
1933                 bfilter->dst_ipaddr_mask[0] = -1;
1934                 bfilter->dst_ipaddr[0] = nfilter->dst_ip;
1935                 en |= NTUPLE_FLTR_ALLOC_INPUT_EN_DST_IPADDR |
1936                         NTUPLE_FLTR_ALLOC_INPUT_EN_DST_IPADDR_MASK;
1937                 break;
1938         default:
1939                 PMD_DRV_LOG(ERR, "invalid dst_ip mask.");
1940                 return -EINVAL;
1941         }
1942
1943         switch (nfilter->src_ip_mask) {
1944         case UINT32_MAX:
1945                 bfilter->src_ipaddr_mask[0] = -1;
1946                 bfilter->src_ipaddr[0] = nfilter->src_ip;
1947                 en |= NTUPLE_FLTR_ALLOC_INPUT_EN_SRC_IPADDR |
1948                         NTUPLE_FLTR_ALLOC_INPUT_EN_SRC_IPADDR_MASK;
1949                 break;
1950         default:
1951                 PMD_DRV_LOG(ERR, "invalid src_ip mask.");
1952                 return -EINVAL;
1953         }
1954
1955         switch (nfilter->src_port_mask) {
1956         case UINT16_MAX:
1957                 bfilter->src_port_mask = -1;
1958                 bfilter->src_port = nfilter->src_port;
1959                 en |= NTUPLE_FLTR_ALLOC_INPUT_EN_SRC_PORT |
1960                         NTUPLE_FLTR_ALLOC_INPUT_EN_SRC_PORT_MASK;
1961                 break;
1962         default:
1963                 PMD_DRV_LOG(ERR, "invalid src_port mask.");
1964                 return -EINVAL;
1965         }
1966
1967         //TODO Priority
1968         //nfilter->priority = (uint8_t)filter->priority;
1969
1970         bfilter->enables = en;
1971         return 0;
1972 }
1973
1974 static struct bnxt_filter_info*
1975 bnxt_match_ntuple_filter(struct bnxt *bp,
1976                          struct bnxt_filter_info *bfilter,
1977                          struct bnxt_vnic_info **mvnic)
1978 {
1979         struct bnxt_filter_info *mfilter = NULL;
1980         int i;
1981
1982         for (i = bp->nr_vnics - 1; i >= 0; i--) {
1983                 struct bnxt_vnic_info *vnic = &bp->vnic_info[i];
1984                 STAILQ_FOREACH(mfilter, &vnic->filter, next) {
1985                         if (bfilter->src_ipaddr[0] == mfilter->src_ipaddr[0] &&
1986                             bfilter->src_ipaddr_mask[0] ==
1987                             mfilter->src_ipaddr_mask[0] &&
1988                             bfilter->src_port == mfilter->src_port &&
1989                             bfilter->src_port_mask == mfilter->src_port_mask &&
1990                             bfilter->dst_ipaddr[0] == mfilter->dst_ipaddr[0] &&
1991                             bfilter->dst_ipaddr_mask[0] ==
1992                             mfilter->dst_ipaddr_mask[0] &&
1993                             bfilter->dst_port == mfilter->dst_port &&
1994                             bfilter->dst_port_mask == mfilter->dst_port_mask &&
1995                             bfilter->flags == mfilter->flags &&
1996                             bfilter->enables == mfilter->enables) {
1997                                 if (mvnic)
1998                                         *mvnic = vnic;
1999                                 return mfilter;
2000                         }
2001                 }
2002         }
2003         return NULL;
2004 }
2005
2006 static int
2007 bnxt_cfg_ntuple_filter(struct bnxt *bp,
2008                        struct rte_eth_ntuple_filter *nfilter,
2009                        enum rte_filter_op filter_op)
2010 {
2011         struct bnxt_filter_info *bfilter, *mfilter, *filter1;
2012         struct bnxt_vnic_info *vnic, *vnic0, *mvnic;
2013         int ret;
2014
2015         if (nfilter->flags != RTE_5TUPLE_FLAGS) {
2016                 PMD_DRV_LOG(ERR, "only 5tuple is supported.");
2017                 return -EINVAL;
2018         }
2019
2020         if (nfilter->flags & RTE_NTUPLE_FLAGS_TCP_FLAG) {
2021                 PMD_DRV_LOG(ERR, "Ntuple filter: TCP flags not supported\n");
2022                 return -EINVAL;
2023         }
2024
2025         bfilter = bnxt_get_unused_filter(bp);
2026         if (bfilter == NULL) {
2027                 PMD_DRV_LOG(ERR,
2028                         "Not enough resources for a new filter.\n");
2029                 return -ENOMEM;
2030         }
2031         ret = parse_ntuple_filter(bp, nfilter, bfilter);
2032         if (ret < 0)
2033                 goto free_filter;
2034
2035         vnic = STAILQ_FIRST(&bp->ff_pool[nfilter->queue]);
2036         vnic0 = STAILQ_FIRST(&bp->ff_pool[0]);
2037         filter1 = STAILQ_FIRST(&vnic0->filter);
2038         if (filter1 == NULL) {
2039                 ret = -1;
2040                 goto free_filter;
2041         }
2042
2043         bfilter->dst_id = vnic->fw_vnic_id;
2044         bfilter->fw_l2_filter_id = filter1->fw_l2_filter_id;
2045         bfilter->enables |=
2046                 HWRM_CFA_NTUPLE_FILTER_ALLOC_INPUT_ENABLES_L2_FILTER_ID;
2047         bfilter->ethertype = 0x800;
2048         bfilter->enables |= NTUPLE_FLTR_ALLOC_INPUT_EN_ETHERTYPE;
2049
2050         mfilter = bnxt_match_ntuple_filter(bp, bfilter, &mvnic);
2051
2052         if (mfilter != NULL && filter_op == RTE_ETH_FILTER_ADD &&
2053             bfilter->dst_id == mfilter->dst_id) {
2054                 PMD_DRV_LOG(ERR, "filter exists.\n");
2055                 ret = -EEXIST;
2056                 goto free_filter;
2057         } else if (mfilter != NULL && filter_op == RTE_ETH_FILTER_ADD &&
2058                    bfilter->dst_id != mfilter->dst_id) {
2059                 mfilter->dst_id = vnic->fw_vnic_id;
2060                 ret = bnxt_hwrm_set_ntuple_filter(bp, mfilter->dst_id, mfilter);
2061                 STAILQ_REMOVE(&mvnic->filter, mfilter, bnxt_filter_info, next);
2062                 STAILQ_INSERT_TAIL(&vnic->filter, mfilter, next);
2063                 PMD_DRV_LOG(ERR, "filter with matching pattern exists.\n");
2064                 PMD_DRV_LOG(ERR, " Updated it to the new destination queue\n");
2065                 goto free_filter;
2066         }
2067         if (mfilter == NULL && filter_op == RTE_ETH_FILTER_DELETE) {
2068                 PMD_DRV_LOG(ERR, "filter doesn't exist.");
2069                 ret = -ENOENT;
2070                 goto free_filter;
2071         }
2072
2073         if (filter_op == RTE_ETH_FILTER_ADD) {
2074                 bfilter->filter_type = HWRM_CFA_NTUPLE_FILTER;
2075                 ret = bnxt_hwrm_set_ntuple_filter(bp, bfilter->dst_id, bfilter);
2076                 if (ret)
2077                         goto free_filter;
2078                 STAILQ_INSERT_TAIL(&vnic->filter, bfilter, next);
2079         } else {
2080                 if (mfilter == NULL) {
2081                         /* This should not happen. But for Coverity! */
2082                         ret = -ENOENT;
2083                         goto free_filter;
2084                 }
2085                 ret = bnxt_hwrm_clear_ntuple_filter(bp, mfilter);
2086
2087                 STAILQ_REMOVE(&vnic->filter, mfilter, bnxt_filter_info, next);
2088                 bnxt_free_filter(bp, mfilter);
2089                 mfilter->fw_l2_filter_id = -1;
2090                 bnxt_free_filter(bp, bfilter);
2091                 bfilter->fw_l2_filter_id = -1;
2092         }
2093
2094         return 0;
2095 free_filter:
2096         bfilter->fw_l2_filter_id = -1;
2097         bnxt_free_filter(bp, bfilter);
2098         return ret;
2099 }
2100
2101 static int
2102 bnxt_ntuple_filter(struct rte_eth_dev *dev,
2103                         enum rte_filter_op filter_op,
2104                         void *arg)
2105 {
2106         struct bnxt *bp = (struct bnxt *)dev->data->dev_private;
2107         int ret;
2108
2109         if (filter_op == RTE_ETH_FILTER_NOP)
2110                 return 0;
2111
2112         if (arg == NULL) {
2113                 PMD_DRV_LOG(ERR, "arg shouldn't be NULL for operation %u.",
2114                             filter_op);
2115                 return -EINVAL;
2116         }
2117
2118         switch (filter_op) {
2119         case RTE_ETH_FILTER_ADD:
2120                 ret = bnxt_cfg_ntuple_filter(bp,
2121                         (struct rte_eth_ntuple_filter *)arg,
2122                         filter_op);
2123                 break;
2124         case RTE_ETH_FILTER_DELETE:
2125                 ret = bnxt_cfg_ntuple_filter(bp,
2126                         (struct rte_eth_ntuple_filter *)arg,
2127                         filter_op);
2128                 break;
2129         default:
2130                 PMD_DRV_LOG(ERR, "unsupported operation %u.", filter_op);
2131                 ret = -EINVAL;
2132                 break;
2133         }
2134         return ret;
2135 }
2136
2137 static int
2138 bnxt_parse_fdir_filter(struct bnxt *bp,
2139                        struct rte_eth_fdir_filter *fdir,
2140                        struct bnxt_filter_info *filter)
2141 {
2142         enum rte_fdir_mode fdir_mode =
2143                 bp->eth_dev->data->dev_conf.fdir_conf.mode;
2144         struct bnxt_vnic_info *vnic0, *vnic;
2145         struct bnxt_filter_info *filter1;
2146         uint32_t en = 0;
2147         int i;
2148
2149         if (fdir_mode == RTE_FDIR_MODE_PERFECT_TUNNEL)
2150                 return -EINVAL;
2151
2152         filter->l2_ovlan = fdir->input.flow_ext.vlan_tci;
2153         en |= EM_FLOW_ALLOC_INPUT_EN_OVLAN_VID;
2154
2155         switch (fdir->input.flow_type) {
2156         case RTE_ETH_FLOW_IPV4:
2157         case RTE_ETH_FLOW_NONFRAG_IPV4_OTHER:
2158                 /* FALLTHROUGH */
2159                 filter->src_ipaddr[0] = fdir->input.flow.ip4_flow.src_ip;
2160                 en |= NTUPLE_FLTR_ALLOC_INPUT_EN_SRC_IPADDR;
2161                 filter->dst_ipaddr[0] = fdir->input.flow.ip4_flow.dst_ip;
2162                 en |= NTUPLE_FLTR_ALLOC_INPUT_EN_DST_IPADDR;
2163                 filter->ip_protocol = fdir->input.flow.ip4_flow.proto;
2164                 en |= NTUPLE_FLTR_ALLOC_IN_EN_IP_PROTO;
2165                 filter->ip_addr_type =
2166                         NTUPLE_FLTR_ALLOC_INPUT_IP_ADDR_TYPE_IPV4;
2167                 filter->src_ipaddr_mask[0] = 0xffffffff;
2168                 en |= NTUPLE_FLTR_ALLOC_INPUT_EN_SRC_IPADDR_MASK;
2169                 filter->dst_ipaddr_mask[0] = 0xffffffff;
2170                 en |= NTUPLE_FLTR_ALLOC_INPUT_EN_DST_IPADDR_MASK;
2171                 filter->ethertype = 0x800;
2172                 filter->enables |= NTUPLE_FLTR_ALLOC_INPUT_EN_ETHERTYPE;
2173                 break;
2174         case RTE_ETH_FLOW_NONFRAG_IPV4_TCP:
2175                 filter->src_port = fdir->input.flow.tcp4_flow.src_port;
2176                 en |= NTUPLE_FLTR_ALLOC_INPUT_EN_SRC_PORT;
2177                 filter->dst_port = fdir->input.flow.tcp4_flow.dst_port;
2178                 en |= NTUPLE_FLTR_ALLOC_INPUT_EN_DST_PORT;
2179                 filter->dst_port_mask = 0xffff;
2180                 en |= NTUPLE_FLTR_ALLOC_INPUT_EN_DST_PORT_MASK;
2181                 filter->src_port_mask = 0xffff;
2182                 en |= NTUPLE_FLTR_ALLOC_INPUT_EN_SRC_PORT_MASK;
2183                 filter->src_ipaddr[0] = fdir->input.flow.tcp4_flow.ip.src_ip;
2184                 en |= NTUPLE_FLTR_ALLOC_INPUT_EN_SRC_IPADDR;
2185                 filter->dst_ipaddr[0] = fdir->input.flow.tcp4_flow.ip.dst_ip;
2186                 en |= NTUPLE_FLTR_ALLOC_INPUT_EN_DST_IPADDR;
2187                 filter->ip_protocol = 6;
2188                 en |= NTUPLE_FLTR_ALLOC_IN_EN_IP_PROTO;
2189                 filter->ip_addr_type =
2190                         NTUPLE_FLTR_ALLOC_INPUT_IP_ADDR_TYPE_IPV4;
2191                 filter->src_ipaddr_mask[0] = 0xffffffff;
2192                 en |= NTUPLE_FLTR_ALLOC_INPUT_EN_SRC_IPADDR_MASK;
2193                 filter->dst_ipaddr_mask[0] = 0xffffffff;
2194                 en |= NTUPLE_FLTR_ALLOC_INPUT_EN_DST_IPADDR_MASK;
2195                 filter->ethertype = 0x800;
2196                 filter->enables |= NTUPLE_FLTR_ALLOC_INPUT_EN_ETHERTYPE;
2197                 break;
2198         case RTE_ETH_FLOW_NONFRAG_IPV4_UDP:
2199                 filter->src_port = fdir->input.flow.udp4_flow.src_port;
2200                 en |= NTUPLE_FLTR_ALLOC_INPUT_EN_SRC_PORT;
2201                 filter->dst_port = fdir->input.flow.udp4_flow.dst_port;
2202                 en |= NTUPLE_FLTR_ALLOC_INPUT_EN_DST_PORT;
2203                 filter->dst_port_mask = 0xffff;
2204                 en |= NTUPLE_FLTR_ALLOC_INPUT_EN_DST_PORT_MASK;
2205                 filter->src_port_mask = 0xffff;
2206                 en |= NTUPLE_FLTR_ALLOC_INPUT_EN_SRC_PORT_MASK;
2207                 filter->src_ipaddr[0] = fdir->input.flow.udp4_flow.ip.src_ip;
2208                 en |= NTUPLE_FLTR_ALLOC_INPUT_EN_SRC_IPADDR;
2209                 filter->dst_ipaddr[0] = fdir->input.flow.udp4_flow.ip.dst_ip;
2210                 en |= NTUPLE_FLTR_ALLOC_INPUT_EN_DST_IPADDR;
2211                 filter->ip_protocol = 17;
2212                 en |= NTUPLE_FLTR_ALLOC_IN_EN_IP_PROTO;
2213                 filter->ip_addr_type =
2214                         NTUPLE_FLTR_ALLOC_INPUT_IP_ADDR_TYPE_IPV4;
2215                 filter->src_ipaddr_mask[0] = 0xffffffff;
2216                 en |= NTUPLE_FLTR_ALLOC_INPUT_EN_SRC_IPADDR_MASK;
2217                 filter->dst_ipaddr_mask[0] = 0xffffffff;
2218                 en |= NTUPLE_FLTR_ALLOC_INPUT_EN_DST_IPADDR_MASK;
2219                 filter->ethertype = 0x800;
2220                 filter->enables |= NTUPLE_FLTR_ALLOC_INPUT_EN_ETHERTYPE;
2221                 break;
2222         case RTE_ETH_FLOW_IPV6:
2223         case RTE_ETH_FLOW_NONFRAG_IPV6_OTHER:
2224                 /* FALLTHROUGH */
2225                 filter->ip_addr_type =
2226                         NTUPLE_FLTR_ALLOC_INPUT_IP_ADDR_TYPE_IPV6;
2227                 filter->ip_protocol = fdir->input.flow.ipv6_flow.proto;
2228                 en |= NTUPLE_FLTR_ALLOC_IN_EN_IP_PROTO;
2229                 rte_memcpy(filter->src_ipaddr,
2230                            fdir->input.flow.ipv6_flow.src_ip, 16);
2231                 en |= NTUPLE_FLTR_ALLOC_INPUT_EN_SRC_IPADDR;
2232                 rte_memcpy(filter->dst_ipaddr,
2233                            fdir->input.flow.ipv6_flow.dst_ip, 16);
2234                 en |= NTUPLE_FLTR_ALLOC_INPUT_EN_DST_IPADDR;
2235                 memset(filter->dst_ipaddr_mask, 0xff, 16);
2236                 en |= NTUPLE_FLTR_ALLOC_INPUT_EN_DST_IPADDR_MASK;
2237                 memset(filter->src_ipaddr_mask, 0xff, 16);
2238                 en |= NTUPLE_FLTR_ALLOC_INPUT_EN_SRC_IPADDR_MASK;
2239                 filter->ethertype = 0x86dd;
2240                 filter->enables |= NTUPLE_FLTR_ALLOC_INPUT_EN_ETHERTYPE;
2241                 break;
2242         case RTE_ETH_FLOW_NONFRAG_IPV6_TCP:
2243                 filter->src_port = fdir->input.flow.tcp6_flow.src_port;
2244                 en |= NTUPLE_FLTR_ALLOC_INPUT_EN_SRC_PORT;
2245                 filter->dst_port = fdir->input.flow.tcp6_flow.dst_port;
2246                 en |= NTUPLE_FLTR_ALLOC_INPUT_EN_DST_PORT;
2247                 filter->dst_port_mask = 0xffff;
2248                 en |= NTUPLE_FLTR_ALLOC_INPUT_EN_DST_PORT_MASK;
2249                 filter->src_port_mask = 0xffff;
2250                 en |= NTUPLE_FLTR_ALLOC_INPUT_EN_SRC_PORT_MASK;
2251                 filter->ip_addr_type =
2252                         NTUPLE_FLTR_ALLOC_INPUT_IP_ADDR_TYPE_IPV6;
2253                 filter->ip_protocol = fdir->input.flow.tcp6_flow.ip.proto;
2254                 en |= NTUPLE_FLTR_ALLOC_IN_EN_IP_PROTO;
2255                 rte_memcpy(filter->src_ipaddr,
2256                            fdir->input.flow.tcp6_flow.ip.src_ip, 16);
2257                 en |= NTUPLE_FLTR_ALLOC_INPUT_EN_SRC_IPADDR;
2258                 rte_memcpy(filter->dst_ipaddr,
2259                            fdir->input.flow.tcp6_flow.ip.dst_ip, 16);
2260                 en |= NTUPLE_FLTR_ALLOC_INPUT_EN_DST_IPADDR;
2261                 memset(filter->dst_ipaddr_mask, 0xff, 16);
2262                 en |= NTUPLE_FLTR_ALLOC_INPUT_EN_DST_IPADDR_MASK;
2263                 memset(filter->src_ipaddr_mask, 0xff, 16);
2264                 en |= NTUPLE_FLTR_ALLOC_INPUT_EN_SRC_IPADDR_MASK;
2265                 filter->ethertype = 0x86dd;
2266                 filter->enables |= NTUPLE_FLTR_ALLOC_INPUT_EN_ETHERTYPE;
2267                 break;
2268         case RTE_ETH_FLOW_NONFRAG_IPV6_UDP:
2269                 filter->src_port = fdir->input.flow.udp6_flow.src_port;
2270                 en |= NTUPLE_FLTR_ALLOC_INPUT_EN_SRC_PORT;
2271                 filter->dst_port = fdir->input.flow.udp6_flow.dst_port;
2272                 en |= NTUPLE_FLTR_ALLOC_INPUT_EN_DST_PORT;
2273                 filter->dst_port_mask = 0xffff;
2274                 en |= NTUPLE_FLTR_ALLOC_INPUT_EN_DST_PORT_MASK;
2275                 filter->src_port_mask = 0xffff;
2276                 en |= NTUPLE_FLTR_ALLOC_INPUT_EN_SRC_PORT_MASK;
2277                 filter->ip_addr_type =
2278                         NTUPLE_FLTR_ALLOC_INPUT_IP_ADDR_TYPE_IPV6;
2279                 filter->ip_protocol = fdir->input.flow.udp6_flow.ip.proto;
2280                 en |= NTUPLE_FLTR_ALLOC_IN_EN_IP_PROTO;
2281                 rte_memcpy(filter->src_ipaddr,
2282                            fdir->input.flow.udp6_flow.ip.src_ip, 16);
2283                 en |= NTUPLE_FLTR_ALLOC_INPUT_EN_SRC_IPADDR;
2284                 rte_memcpy(filter->dst_ipaddr,
2285                            fdir->input.flow.udp6_flow.ip.dst_ip, 16);
2286                 en |= NTUPLE_FLTR_ALLOC_INPUT_EN_DST_IPADDR;
2287                 memset(filter->dst_ipaddr_mask, 0xff, 16);
2288                 en |= NTUPLE_FLTR_ALLOC_INPUT_EN_DST_IPADDR_MASK;
2289                 memset(filter->src_ipaddr_mask, 0xff, 16);
2290                 en |= NTUPLE_FLTR_ALLOC_INPUT_EN_SRC_IPADDR_MASK;
2291                 filter->ethertype = 0x86dd;
2292                 filter->enables |= NTUPLE_FLTR_ALLOC_INPUT_EN_ETHERTYPE;
2293                 break;
2294         case RTE_ETH_FLOW_L2_PAYLOAD:
2295                 filter->ethertype = fdir->input.flow.l2_flow.ether_type;
2296                 en |= NTUPLE_FLTR_ALLOC_INPUT_EN_ETHERTYPE;
2297                 break;
2298         case RTE_ETH_FLOW_VXLAN:
2299                 if (fdir->action.behavior == RTE_ETH_FDIR_REJECT)
2300                         return -EINVAL;
2301                 filter->vni = fdir->input.flow.tunnel_flow.tunnel_id;
2302                 filter->tunnel_type =
2303                         CFA_NTUPLE_FILTER_ALLOC_REQ_TUNNEL_TYPE_VXLAN;
2304                 en |= HWRM_CFA_NTUPLE_FILTER_ALLOC_INPUT_ENABLES_TUNNEL_TYPE;
2305                 break;
2306         case RTE_ETH_FLOW_NVGRE:
2307                 if (fdir->action.behavior == RTE_ETH_FDIR_REJECT)
2308                         return -EINVAL;
2309                 filter->vni = fdir->input.flow.tunnel_flow.tunnel_id;
2310                 filter->tunnel_type =
2311                         CFA_NTUPLE_FILTER_ALLOC_REQ_TUNNEL_TYPE_NVGRE;
2312                 en |= HWRM_CFA_NTUPLE_FILTER_ALLOC_INPUT_ENABLES_TUNNEL_TYPE;
2313                 break;
2314         case RTE_ETH_FLOW_UNKNOWN:
2315         case RTE_ETH_FLOW_RAW:
2316         case RTE_ETH_FLOW_FRAG_IPV4:
2317         case RTE_ETH_FLOW_NONFRAG_IPV4_SCTP:
2318         case RTE_ETH_FLOW_FRAG_IPV6:
2319         case RTE_ETH_FLOW_NONFRAG_IPV6_SCTP:
2320         case RTE_ETH_FLOW_IPV6_EX:
2321         case RTE_ETH_FLOW_IPV6_TCP_EX:
2322         case RTE_ETH_FLOW_IPV6_UDP_EX:
2323         case RTE_ETH_FLOW_GENEVE:
2324                 /* FALLTHROUGH */
2325         default:
2326                 return -EINVAL;
2327         }
2328
2329         vnic0 = STAILQ_FIRST(&bp->ff_pool[0]);
2330         vnic = STAILQ_FIRST(&bp->ff_pool[fdir->action.rx_queue]);
2331         if (vnic == NULL) {
2332                 PMD_DRV_LOG(ERR, "Invalid queue %d\n", fdir->action.rx_queue);
2333                 return -EINVAL;
2334         }
2335
2336
2337         if (fdir_mode == RTE_FDIR_MODE_PERFECT_MAC_VLAN) {
2338                 rte_memcpy(filter->dst_macaddr,
2339                         fdir->input.flow.mac_vlan_flow.mac_addr.addr_bytes, 6);
2340                         en |= NTUPLE_FLTR_ALLOC_INPUT_EN_DST_MACADDR;
2341         }
2342
2343         if (fdir->action.behavior == RTE_ETH_FDIR_REJECT) {
2344                 filter->flags = HWRM_CFA_NTUPLE_FILTER_ALLOC_INPUT_FLAGS_DROP;
2345                 filter1 = STAILQ_FIRST(&vnic0->filter);
2346                 //filter1 = bnxt_get_l2_filter(bp, filter, vnic0);
2347         } else {
2348                 filter->dst_id = vnic->fw_vnic_id;
2349                 for (i = 0; i < ETHER_ADDR_LEN; i++)
2350                         if (filter->dst_macaddr[i] == 0x00)
2351                                 filter1 = STAILQ_FIRST(&vnic0->filter);
2352                         else
2353                                 filter1 = bnxt_get_l2_filter(bp, filter, vnic);
2354         }
2355
2356         if (filter1 == NULL)
2357                 return -EINVAL;
2358
2359         en |= HWRM_CFA_NTUPLE_FILTER_ALLOC_INPUT_ENABLES_L2_FILTER_ID;
2360         filter->fw_l2_filter_id = filter1->fw_l2_filter_id;
2361
2362         filter->enables = en;
2363
2364         return 0;
2365 }
2366
2367 static struct bnxt_filter_info *
2368 bnxt_match_fdir(struct bnxt *bp, struct bnxt_filter_info *nf,
2369                 struct bnxt_vnic_info **mvnic)
2370 {
2371         struct bnxt_filter_info *mf = NULL;
2372         int i;
2373
2374         for (i = bp->nr_vnics - 1; i >= 0; i--) {
2375                 struct bnxt_vnic_info *vnic = &bp->vnic_info[i];
2376
2377                 STAILQ_FOREACH(mf, &vnic->filter, next) {
2378                         if (mf->filter_type == nf->filter_type &&
2379                             mf->flags == nf->flags &&
2380                             mf->src_port == nf->src_port &&
2381                             mf->src_port_mask == nf->src_port_mask &&
2382                             mf->dst_port == nf->dst_port &&
2383                             mf->dst_port_mask == nf->dst_port_mask &&
2384                             mf->ip_protocol == nf->ip_protocol &&
2385                             mf->ip_addr_type == nf->ip_addr_type &&
2386                             mf->ethertype == nf->ethertype &&
2387                             mf->vni == nf->vni &&
2388                             mf->tunnel_type == nf->tunnel_type &&
2389                             mf->l2_ovlan == nf->l2_ovlan &&
2390                             mf->l2_ovlan_mask == nf->l2_ovlan_mask &&
2391                             mf->l2_ivlan == nf->l2_ivlan &&
2392                             mf->l2_ivlan_mask == nf->l2_ivlan_mask &&
2393                             !memcmp(mf->l2_addr, nf->l2_addr, ETHER_ADDR_LEN) &&
2394                             !memcmp(mf->l2_addr_mask, nf->l2_addr_mask,
2395                                     ETHER_ADDR_LEN) &&
2396                             !memcmp(mf->src_macaddr, nf->src_macaddr,
2397                                     ETHER_ADDR_LEN) &&
2398                             !memcmp(mf->dst_macaddr, nf->dst_macaddr,
2399                                     ETHER_ADDR_LEN) &&
2400                             !memcmp(mf->src_ipaddr, nf->src_ipaddr,
2401                                     sizeof(nf->src_ipaddr)) &&
2402                             !memcmp(mf->src_ipaddr_mask, nf->src_ipaddr_mask,
2403                                     sizeof(nf->src_ipaddr_mask)) &&
2404                             !memcmp(mf->dst_ipaddr, nf->dst_ipaddr,
2405                                     sizeof(nf->dst_ipaddr)) &&
2406                             !memcmp(mf->dst_ipaddr_mask, nf->dst_ipaddr_mask,
2407                                     sizeof(nf->dst_ipaddr_mask))) {
2408                                 if (mvnic)
2409                                         *mvnic = vnic;
2410                                 return mf;
2411                         }
2412                 }
2413         }
2414         return NULL;
2415 }
2416
2417 static int
2418 bnxt_fdir_filter(struct rte_eth_dev *dev,
2419                  enum rte_filter_op filter_op,
2420                  void *arg)
2421 {
2422         struct bnxt *bp = (struct bnxt *)dev->data->dev_private;
2423         struct rte_eth_fdir_filter *fdir  = (struct rte_eth_fdir_filter *)arg;
2424         struct bnxt_filter_info *filter, *match;
2425         struct bnxt_vnic_info *vnic, *mvnic;
2426         int ret = 0, i;
2427
2428         if (filter_op == RTE_ETH_FILTER_NOP)
2429                 return 0;
2430
2431         if (arg == NULL && filter_op != RTE_ETH_FILTER_FLUSH)
2432                 return -EINVAL;
2433
2434         switch (filter_op) {
2435         case RTE_ETH_FILTER_ADD:
2436         case RTE_ETH_FILTER_DELETE:
2437                 filter = bnxt_get_unused_filter(bp);
2438                 if (filter == NULL) {
2439                         PMD_DRV_LOG(ERR,
2440                                 "Not enough resources for a new flow.\n");
2441                         return -ENOMEM;
2442                 }
2443
2444                 ret = bnxt_parse_fdir_filter(bp, fdir, filter);
2445                 if (ret != 0)
2446                         goto free_filter;
2447                 filter->filter_type = HWRM_CFA_NTUPLE_FILTER;
2448
2449                 if (fdir->action.behavior == RTE_ETH_FDIR_REJECT)
2450                         vnic = STAILQ_FIRST(&bp->ff_pool[0]);
2451                 else
2452                         vnic = STAILQ_FIRST(&bp->ff_pool[fdir->action.rx_queue]);
2453
2454                 match = bnxt_match_fdir(bp, filter, &mvnic);
2455                 if (match != NULL && filter_op == RTE_ETH_FILTER_ADD) {
2456                         if (match->dst_id == vnic->fw_vnic_id) {
2457                                 PMD_DRV_LOG(ERR, "Flow already exists.\n");
2458                                 ret = -EEXIST;
2459                                 goto free_filter;
2460                         } else {
2461                                 match->dst_id = vnic->fw_vnic_id;
2462                                 ret = bnxt_hwrm_set_ntuple_filter(bp,
2463                                                                   match->dst_id,
2464                                                                   match);
2465                                 STAILQ_REMOVE(&mvnic->filter, match,
2466                                               bnxt_filter_info, next);
2467                                 STAILQ_INSERT_TAIL(&vnic->filter, match, next);
2468                                 PMD_DRV_LOG(ERR,
2469                                         "Filter with matching pattern exist\n");
2470                                 PMD_DRV_LOG(ERR,
2471                                         "Updated it to new destination q\n");
2472                                 goto free_filter;
2473                         }
2474                 }
2475                 if (match == NULL && filter_op == RTE_ETH_FILTER_DELETE) {
2476                         PMD_DRV_LOG(ERR, "Flow does not exist.\n");
2477                         ret = -ENOENT;
2478                         goto free_filter;
2479                 }
2480
2481                 if (filter_op == RTE_ETH_FILTER_ADD) {
2482                         ret = bnxt_hwrm_set_ntuple_filter(bp,
2483                                                           filter->dst_id,
2484                                                           filter);
2485                         if (ret)
2486                                 goto free_filter;
2487                         STAILQ_INSERT_TAIL(&vnic->filter, filter, next);
2488                 } else {
2489                         ret = bnxt_hwrm_clear_ntuple_filter(bp, match);
2490                         STAILQ_REMOVE(&vnic->filter, match,
2491                                       bnxt_filter_info, next);
2492                         bnxt_free_filter(bp, match);
2493                         filter->fw_l2_filter_id = -1;
2494                         bnxt_free_filter(bp, filter);
2495                 }
2496                 break;
2497         case RTE_ETH_FILTER_FLUSH:
2498                 for (i = bp->nr_vnics - 1; i >= 0; i--) {
2499                         struct bnxt_vnic_info *vnic = &bp->vnic_info[i];
2500
2501                         STAILQ_FOREACH(filter, &vnic->filter, next) {
2502                                 if (filter->filter_type ==
2503                                     HWRM_CFA_NTUPLE_FILTER) {
2504                                         ret =
2505                                         bnxt_hwrm_clear_ntuple_filter(bp,
2506                                                                       filter);
2507                                         STAILQ_REMOVE(&vnic->filter, filter,
2508                                                       bnxt_filter_info, next);
2509                                 }
2510                         }
2511                 }
2512                 return ret;
2513         case RTE_ETH_FILTER_UPDATE:
2514         case RTE_ETH_FILTER_STATS:
2515         case RTE_ETH_FILTER_INFO:
2516                 PMD_DRV_LOG(ERR, "operation %u not implemented", filter_op);
2517                 break;
2518         default:
2519                 PMD_DRV_LOG(ERR, "unknown operation %u", filter_op);
2520                 ret = -EINVAL;
2521                 break;
2522         }
2523         return ret;
2524
2525 free_filter:
2526         filter->fw_l2_filter_id = -1;
2527         bnxt_free_filter(bp, filter);
2528         return ret;
2529 }
2530
2531 static int
2532 bnxt_filter_ctrl_op(struct rte_eth_dev *dev __rte_unused,
2533                     enum rte_filter_type filter_type,
2534                     enum rte_filter_op filter_op, void *arg)
2535 {
2536         int ret = 0;
2537
2538         switch (filter_type) {
2539         case RTE_ETH_FILTER_TUNNEL:
2540                 PMD_DRV_LOG(ERR,
2541                         "filter type: %d: To be implemented\n", filter_type);
2542                 break;
2543         case RTE_ETH_FILTER_FDIR:
2544                 ret = bnxt_fdir_filter(dev, filter_op, arg);
2545                 break;
2546         case RTE_ETH_FILTER_NTUPLE:
2547                 ret = bnxt_ntuple_filter(dev, filter_op, arg);
2548                 break;
2549         case RTE_ETH_FILTER_ETHERTYPE:
2550                 ret = bnxt_ethertype_filter(dev, filter_op, arg);
2551                 break;
2552         case RTE_ETH_FILTER_GENERIC:
2553                 if (filter_op != RTE_ETH_FILTER_GET)
2554                         return -EINVAL;
2555                 *(const void **)arg = &bnxt_flow_ops;
2556                 break;
2557         default:
2558                 PMD_DRV_LOG(ERR,
2559                         "Filter type (%d) not supported", filter_type);
2560                 ret = -EINVAL;
2561                 break;
2562         }
2563         return ret;
2564 }
2565
2566 static const uint32_t *
2567 bnxt_dev_supported_ptypes_get_op(struct rte_eth_dev *dev)
2568 {
2569         static const uint32_t ptypes[] = {
2570                 RTE_PTYPE_L2_ETHER_VLAN,
2571                 RTE_PTYPE_L3_IPV4_EXT_UNKNOWN,
2572                 RTE_PTYPE_L3_IPV6_EXT_UNKNOWN,
2573                 RTE_PTYPE_L4_ICMP,
2574                 RTE_PTYPE_L4_TCP,
2575                 RTE_PTYPE_L4_UDP,
2576                 RTE_PTYPE_INNER_L3_IPV4_EXT_UNKNOWN,
2577                 RTE_PTYPE_INNER_L3_IPV6_EXT_UNKNOWN,
2578                 RTE_PTYPE_INNER_L4_ICMP,
2579                 RTE_PTYPE_INNER_L4_TCP,
2580                 RTE_PTYPE_INNER_L4_UDP,
2581                 RTE_PTYPE_UNKNOWN
2582         };
2583
2584         if (dev->rx_pkt_burst == bnxt_recv_pkts)
2585                 return ptypes;
2586         return NULL;
2587 }
2588
2589 static int bnxt_map_regs(struct bnxt *bp, uint32_t *reg_arr, int count,
2590                          int reg_win)
2591 {
2592         uint32_t reg_base = *reg_arr & 0xfffff000;
2593         uint32_t win_off;
2594         int i;
2595
2596         for (i = 0; i < count; i++) {
2597                 if ((reg_arr[i] & 0xfffff000) != reg_base)
2598                         return -ERANGE;
2599         }
2600         win_off = BNXT_GRCPF_REG_WINDOW_BASE_OUT + (reg_win - 1) * 4;
2601         rte_cpu_to_le_32(rte_write32(reg_base, (uint8_t *)bp->bar0 + win_off));
2602         return 0;
2603 }
2604
2605 static int bnxt_map_ptp_regs(struct bnxt *bp)
2606 {
2607         struct bnxt_ptp_cfg *ptp = bp->ptp_cfg;
2608         uint32_t *reg_arr;
2609         int rc, i;
2610
2611         reg_arr = ptp->rx_regs;
2612         rc = bnxt_map_regs(bp, reg_arr, BNXT_PTP_RX_REGS, 5);
2613         if (rc)
2614                 return rc;
2615
2616         reg_arr = ptp->tx_regs;
2617         rc = bnxt_map_regs(bp, reg_arr, BNXT_PTP_TX_REGS, 6);
2618         if (rc)
2619                 return rc;
2620
2621         for (i = 0; i < BNXT_PTP_RX_REGS; i++)
2622                 ptp->rx_mapped_regs[i] = 0x5000 + (ptp->rx_regs[i] & 0xfff);
2623
2624         for (i = 0; i < BNXT_PTP_TX_REGS; i++)
2625                 ptp->tx_mapped_regs[i] = 0x6000 + (ptp->tx_regs[i] & 0xfff);
2626
2627         return 0;
2628 }
2629
2630 static void bnxt_unmap_ptp_regs(struct bnxt *bp)
2631 {
2632         rte_cpu_to_le_32(rte_write32(0, (uint8_t *)bp->bar0 +
2633                          BNXT_GRCPF_REG_WINDOW_BASE_OUT + 16));
2634         rte_cpu_to_le_32(rte_write32(0, (uint8_t *)bp->bar0 +
2635                          BNXT_GRCPF_REG_WINDOW_BASE_OUT + 20));
2636 }
2637
2638 static uint64_t bnxt_cc_read(struct bnxt *bp)
2639 {
2640         uint64_t ns;
2641
2642         ns = rte_le_to_cpu_32(rte_read32((uint8_t *)bp->bar0 +
2643                               BNXT_GRCPF_REG_SYNC_TIME));
2644         ns |= (uint64_t)(rte_le_to_cpu_32(rte_read32((uint8_t *)bp->bar0 +
2645                                           BNXT_GRCPF_REG_SYNC_TIME + 4))) << 32;
2646         return ns;
2647 }
2648
2649 static int bnxt_get_tx_ts(struct bnxt *bp, uint64_t *ts)
2650 {
2651         struct bnxt_ptp_cfg *ptp = bp->ptp_cfg;
2652         uint32_t fifo;
2653
2654         fifo = rte_le_to_cpu_32(rte_read32((uint8_t *)bp->bar0 +
2655                                 ptp->tx_mapped_regs[BNXT_PTP_TX_FIFO]));
2656         if (fifo & BNXT_PTP_TX_FIFO_EMPTY)
2657                 return -EAGAIN;
2658
2659         fifo = rte_le_to_cpu_32(rte_read32((uint8_t *)bp->bar0 +
2660                                 ptp->tx_mapped_regs[BNXT_PTP_TX_FIFO]));
2661         *ts = rte_le_to_cpu_32(rte_read32((uint8_t *)bp->bar0 +
2662                                 ptp->tx_mapped_regs[BNXT_PTP_TX_TS_L]));
2663         *ts |= (uint64_t)rte_le_to_cpu_32(rte_read32((uint8_t *)bp->bar0 +
2664                                 ptp->tx_mapped_regs[BNXT_PTP_TX_TS_H])) << 32;
2665
2666         return 0;
2667 }
2668
2669 static int bnxt_get_rx_ts(struct bnxt *bp, uint64_t *ts)
2670 {
2671         struct bnxt_ptp_cfg *ptp = bp->ptp_cfg;
2672         struct bnxt_pf_info *pf = &bp->pf;
2673         uint16_t port_id;
2674         uint32_t fifo;
2675
2676         if (!ptp)
2677                 return -ENODEV;
2678
2679         fifo = rte_le_to_cpu_32(rte_read32((uint8_t *)bp->bar0 +
2680                                 ptp->rx_mapped_regs[BNXT_PTP_RX_FIFO]));
2681         if (!(fifo & BNXT_PTP_RX_FIFO_PENDING))
2682                 return -EAGAIN;
2683
2684         port_id = pf->port_id;
2685         rte_cpu_to_le_32(rte_write32(1 << port_id, (uint8_t *)bp->bar0 +
2686                ptp->rx_mapped_regs[BNXT_PTP_RX_FIFO_ADV]));
2687
2688         fifo = rte_le_to_cpu_32(rte_read32((uint8_t *)bp->bar0 +
2689                                    ptp->rx_mapped_regs[BNXT_PTP_RX_FIFO]));
2690         if (fifo & BNXT_PTP_RX_FIFO_PENDING) {
2691 /*              bnxt_clr_rx_ts(bp);       TBD  */
2692                 return -EBUSY;
2693         }
2694
2695         *ts = rte_le_to_cpu_32(rte_read32((uint8_t *)bp->bar0 +
2696                                 ptp->rx_mapped_regs[BNXT_PTP_RX_TS_L]));
2697         *ts |= (uint64_t)rte_le_to_cpu_32(rte_read32((uint8_t *)bp->bar0 +
2698                                 ptp->rx_mapped_regs[BNXT_PTP_RX_TS_H])) << 32;
2699
2700         return 0;
2701 }
2702
2703 static int
2704 bnxt_timesync_write_time(struct rte_eth_dev *dev, const struct timespec *ts)
2705 {
2706         uint64_t ns;
2707         struct bnxt *bp = (struct bnxt *)dev->data->dev_private;
2708         struct bnxt_ptp_cfg *ptp = bp->ptp_cfg;
2709
2710         if (!ptp)
2711                 return 0;
2712
2713         ns = rte_timespec_to_ns(ts);
2714         /* Set the timecounters to a new value. */
2715         ptp->tc.nsec = ns;
2716
2717         return 0;
2718 }
2719
2720 static int
2721 bnxt_timesync_read_time(struct rte_eth_dev *dev, struct timespec *ts)
2722 {
2723         uint64_t ns, systime_cycles;
2724         struct bnxt *bp = (struct bnxt *)dev->data->dev_private;
2725         struct bnxt_ptp_cfg *ptp = bp->ptp_cfg;
2726
2727         if (!ptp)
2728                 return 0;
2729
2730         systime_cycles = bnxt_cc_read(bp);
2731         ns = rte_timecounter_update(&ptp->tc, systime_cycles);
2732         *ts = rte_ns_to_timespec(ns);
2733
2734         return 0;
2735 }
2736 static int
2737 bnxt_timesync_enable(struct rte_eth_dev *dev)
2738 {
2739         struct bnxt *bp = (struct bnxt *)dev->data->dev_private;
2740         struct bnxt_ptp_cfg *ptp = bp->ptp_cfg;
2741         uint32_t shift = 0;
2742
2743         if (!ptp)
2744                 return 0;
2745
2746         ptp->rx_filter = 1;
2747         ptp->tx_tstamp_en = 1;
2748         ptp->rxctl = BNXT_PTP_MSG_EVENTS;
2749
2750         if (!bnxt_hwrm_ptp_cfg(bp))
2751                 bnxt_map_ptp_regs(bp);
2752
2753         memset(&ptp->tc, 0, sizeof(struct rte_timecounter));
2754         memset(&ptp->rx_tstamp_tc, 0, sizeof(struct rte_timecounter));
2755         memset(&ptp->tx_tstamp_tc, 0, sizeof(struct rte_timecounter));
2756
2757         ptp->tc.cc_mask = BNXT_CYCLECOUNTER_MASK;
2758         ptp->tc.cc_shift = shift;
2759         ptp->tc.nsec_mask = (1ULL << shift) - 1;
2760
2761         ptp->rx_tstamp_tc.cc_mask = BNXT_CYCLECOUNTER_MASK;
2762         ptp->rx_tstamp_tc.cc_shift = shift;
2763         ptp->rx_tstamp_tc.nsec_mask = (1ULL << shift) - 1;
2764
2765         ptp->tx_tstamp_tc.cc_mask = BNXT_CYCLECOUNTER_MASK;
2766         ptp->tx_tstamp_tc.cc_shift = shift;
2767         ptp->tx_tstamp_tc.nsec_mask = (1ULL << shift) - 1;
2768
2769         return 0;
2770 }
2771
2772 static int
2773 bnxt_timesync_disable(struct rte_eth_dev *dev)
2774 {
2775         struct bnxt *bp = (struct bnxt *)dev->data->dev_private;
2776         struct bnxt_ptp_cfg *ptp = bp->ptp_cfg;
2777
2778         if (!ptp)
2779                 return 0;
2780
2781         ptp->rx_filter = 0;
2782         ptp->tx_tstamp_en = 0;
2783         ptp->rxctl = 0;
2784
2785         bnxt_hwrm_ptp_cfg(bp);
2786
2787         bnxt_unmap_ptp_regs(bp);
2788
2789         return 0;
2790 }
2791
2792 static int
2793 bnxt_timesync_read_rx_timestamp(struct rte_eth_dev *dev,
2794                                  struct timespec *timestamp,
2795                                  uint32_t flags __rte_unused)
2796 {
2797         struct bnxt *bp = (struct bnxt *)dev->data->dev_private;
2798         struct bnxt_ptp_cfg *ptp = bp->ptp_cfg;
2799         uint64_t rx_tstamp_cycles = 0;
2800         uint64_t ns;
2801
2802         if (!ptp)
2803                 return 0;
2804
2805         bnxt_get_rx_ts(bp, &rx_tstamp_cycles);
2806         ns = rte_timecounter_update(&ptp->rx_tstamp_tc, rx_tstamp_cycles);
2807         *timestamp = rte_ns_to_timespec(ns);
2808         return  0;
2809 }
2810
2811 static int
2812 bnxt_timesync_read_tx_timestamp(struct rte_eth_dev *dev,
2813                                  struct timespec *timestamp)
2814 {
2815         struct bnxt *bp = (struct bnxt *)dev->data->dev_private;
2816         struct bnxt_ptp_cfg *ptp = bp->ptp_cfg;
2817         uint64_t tx_tstamp_cycles = 0;
2818         uint64_t ns;
2819
2820         if (!ptp)
2821                 return 0;
2822
2823         bnxt_get_tx_ts(bp, &tx_tstamp_cycles);
2824         ns = rte_timecounter_update(&ptp->tx_tstamp_tc, tx_tstamp_cycles);
2825         *timestamp = rte_ns_to_timespec(ns);
2826
2827         return 0;
2828 }
2829
2830 static int
2831 bnxt_timesync_adjust_time(struct rte_eth_dev *dev, int64_t delta)
2832 {
2833         struct bnxt *bp = (struct bnxt *)dev->data->dev_private;
2834         struct bnxt_ptp_cfg *ptp = bp->ptp_cfg;
2835
2836         if (!ptp)
2837                 return 0;
2838
2839         ptp->tc.nsec += delta;
2840
2841         return 0;
2842 }
2843
2844 static int
2845 bnxt_get_eeprom_length_op(struct rte_eth_dev *dev)
2846 {
2847         struct bnxt *bp = (struct bnxt *)dev->data->dev_private;
2848         int rc;
2849         uint32_t dir_entries;
2850         uint32_t entry_length;
2851
2852         PMD_DRV_LOG(INFO, "%04x:%02x:%02x:%02x\n",
2853                 bp->pdev->addr.domain, bp->pdev->addr.bus,
2854                 bp->pdev->addr.devid, bp->pdev->addr.function);
2855
2856         rc = bnxt_hwrm_nvm_get_dir_info(bp, &dir_entries, &entry_length);
2857         if (rc != 0)
2858                 return rc;
2859
2860         return dir_entries * entry_length;
2861 }
2862
2863 static int
2864 bnxt_get_eeprom_op(struct rte_eth_dev *dev,
2865                 struct rte_dev_eeprom_info *in_eeprom)
2866 {
2867         struct bnxt *bp = (struct bnxt *)dev->data->dev_private;
2868         uint32_t index;
2869         uint32_t offset;
2870
2871         PMD_DRV_LOG(INFO, "%04x:%02x:%02x:%02x in_eeprom->offset = %d "
2872                 "len = %d\n", bp->pdev->addr.domain,
2873                 bp->pdev->addr.bus, bp->pdev->addr.devid,
2874                 bp->pdev->addr.function, in_eeprom->offset, in_eeprom->length);
2875
2876         if (in_eeprom->offset == 0) /* special offset value to get directory */
2877                 return bnxt_get_nvram_directory(bp, in_eeprom->length,
2878                                                 in_eeprom->data);
2879
2880         index = in_eeprom->offset >> 24;
2881         offset = in_eeprom->offset & 0xffffff;
2882
2883         if (index != 0)
2884                 return bnxt_hwrm_get_nvram_item(bp, index - 1, offset,
2885                                            in_eeprom->length, in_eeprom->data);
2886
2887         return 0;
2888 }
2889
2890 static bool bnxt_dir_type_is_ape_bin_format(uint16_t dir_type)
2891 {
2892         switch (dir_type) {
2893         case BNX_DIR_TYPE_CHIMP_PATCH:
2894         case BNX_DIR_TYPE_BOOTCODE:
2895         case BNX_DIR_TYPE_BOOTCODE_2:
2896         case BNX_DIR_TYPE_APE_FW:
2897         case BNX_DIR_TYPE_APE_PATCH:
2898         case BNX_DIR_TYPE_KONG_FW:
2899         case BNX_DIR_TYPE_KONG_PATCH:
2900         case BNX_DIR_TYPE_BONO_FW:
2901         case BNX_DIR_TYPE_BONO_PATCH:
2902                 return true;
2903         }
2904
2905         return false;
2906 }
2907
2908 static bool bnxt_dir_type_is_other_exec_format(uint16_t dir_type)
2909 {
2910         switch (dir_type) {
2911         case BNX_DIR_TYPE_AVS:
2912         case BNX_DIR_TYPE_EXP_ROM_MBA:
2913         case BNX_DIR_TYPE_PCIE:
2914         case BNX_DIR_TYPE_TSCF_UCODE:
2915         case BNX_DIR_TYPE_EXT_PHY:
2916         case BNX_DIR_TYPE_CCM:
2917         case BNX_DIR_TYPE_ISCSI_BOOT:
2918         case BNX_DIR_TYPE_ISCSI_BOOT_IPV6:
2919         case BNX_DIR_TYPE_ISCSI_BOOT_IPV4N6:
2920                 return true;
2921         }
2922
2923         return false;
2924 }
2925
2926 static bool bnxt_dir_type_is_executable(uint16_t dir_type)
2927 {
2928         return bnxt_dir_type_is_ape_bin_format(dir_type) ||
2929                 bnxt_dir_type_is_other_exec_format(dir_type);
2930 }
2931
2932 static int
2933 bnxt_set_eeprom_op(struct rte_eth_dev *dev,
2934                 struct rte_dev_eeprom_info *in_eeprom)
2935 {
2936         struct bnxt *bp = (struct bnxt *)dev->data->dev_private;
2937         uint8_t index, dir_op;
2938         uint16_t type, ext, ordinal, attr;
2939
2940         PMD_DRV_LOG(INFO, "%04x:%02x:%02x:%02x in_eeprom->offset = %d "
2941                 "len = %d\n", bp->pdev->addr.domain,
2942                 bp->pdev->addr.bus, bp->pdev->addr.devid,
2943                 bp->pdev->addr.function, in_eeprom->offset, in_eeprom->length);
2944
2945         if (!BNXT_PF(bp)) {
2946                 PMD_DRV_LOG(ERR, "NVM write not supported from a VF\n");
2947                 return -EINVAL;
2948         }
2949
2950         type = in_eeprom->magic >> 16;
2951
2952         if (type == 0xffff) { /* special value for directory operations */
2953                 index = in_eeprom->magic & 0xff;
2954                 dir_op = in_eeprom->magic >> 8;
2955                 if (index == 0)
2956                         return -EINVAL;
2957                 switch (dir_op) {
2958                 case 0x0e: /* erase */
2959                         if (in_eeprom->offset != ~in_eeprom->magic)
2960                                 return -EINVAL;
2961                         return bnxt_hwrm_erase_nvram_directory(bp, index - 1);
2962                 default:
2963                         return -EINVAL;
2964                 }
2965         }
2966
2967         /* Create or re-write an NVM item: */
2968         if (bnxt_dir_type_is_executable(type) == true)
2969                 return -EOPNOTSUPP;
2970         ext = in_eeprom->magic & 0xffff;
2971         ordinal = in_eeprom->offset >> 16;
2972         attr = in_eeprom->offset & 0xffff;
2973
2974         return bnxt_hwrm_flash_nvram(bp, type, ordinal, ext, attr,
2975                                      in_eeprom->data, in_eeprom->length);
2976         return 0;
2977 }
2978
2979 /*
2980  * Initialization
2981  */
2982
2983 static const struct eth_dev_ops bnxt_dev_ops = {
2984         .dev_infos_get = bnxt_dev_info_get_op,
2985         .dev_close = bnxt_dev_close_op,
2986         .dev_configure = bnxt_dev_configure_op,
2987         .dev_start = bnxt_dev_start_op,
2988         .dev_stop = bnxt_dev_stop_op,
2989         .dev_set_link_up = bnxt_dev_set_link_up_op,
2990         .dev_set_link_down = bnxt_dev_set_link_down_op,
2991         .stats_get = bnxt_stats_get_op,
2992         .stats_reset = bnxt_stats_reset_op,
2993         .rx_queue_setup = bnxt_rx_queue_setup_op,
2994         .rx_queue_release = bnxt_rx_queue_release_op,
2995         .tx_queue_setup = bnxt_tx_queue_setup_op,
2996         .tx_queue_release = bnxt_tx_queue_release_op,
2997         .rx_queue_intr_enable = bnxt_rx_queue_intr_enable_op,
2998         .rx_queue_intr_disable = bnxt_rx_queue_intr_disable_op,
2999         .reta_update = bnxt_reta_update_op,
3000         .reta_query = bnxt_reta_query_op,
3001         .rss_hash_update = bnxt_rss_hash_update_op,
3002         .rss_hash_conf_get = bnxt_rss_hash_conf_get_op,
3003         .link_update = bnxt_link_update_op,
3004         .promiscuous_enable = bnxt_promiscuous_enable_op,
3005         .promiscuous_disable = bnxt_promiscuous_disable_op,
3006         .allmulticast_enable = bnxt_allmulticast_enable_op,
3007         .allmulticast_disable = bnxt_allmulticast_disable_op,
3008         .mac_addr_add = bnxt_mac_addr_add_op,
3009         .mac_addr_remove = bnxt_mac_addr_remove_op,
3010         .flow_ctrl_get = bnxt_flow_ctrl_get_op,
3011         .flow_ctrl_set = bnxt_flow_ctrl_set_op,
3012         .udp_tunnel_port_add  = bnxt_udp_tunnel_port_add_op,
3013         .udp_tunnel_port_del  = bnxt_udp_tunnel_port_del_op,
3014         .vlan_filter_set = bnxt_vlan_filter_set_op,
3015         .vlan_offload_set = bnxt_vlan_offload_set_op,
3016         .vlan_pvid_set = bnxt_vlan_pvid_set_op,
3017         .mtu_set = bnxt_mtu_set_op,
3018         .mac_addr_set = bnxt_set_default_mac_addr_op,
3019         .xstats_get = bnxt_dev_xstats_get_op,
3020         .xstats_get_names = bnxt_dev_xstats_get_names_op,
3021         .xstats_reset = bnxt_dev_xstats_reset_op,
3022         .fw_version_get = bnxt_fw_version_get,
3023         .set_mc_addr_list = bnxt_dev_set_mc_addr_list_op,
3024         .rxq_info_get = bnxt_rxq_info_get_op,
3025         .txq_info_get = bnxt_txq_info_get_op,
3026         .dev_led_on = bnxt_dev_led_on_op,
3027         .dev_led_off = bnxt_dev_led_off_op,
3028         .xstats_get_by_id = bnxt_dev_xstats_get_by_id_op,
3029         .xstats_get_names_by_id = bnxt_dev_xstats_get_names_by_id_op,
3030         .rx_queue_count = bnxt_rx_queue_count_op,
3031         .rx_descriptor_status = bnxt_rx_descriptor_status_op,
3032         .tx_descriptor_status = bnxt_tx_descriptor_status_op,
3033         .rx_queue_start = bnxt_rx_queue_start,
3034         .rx_queue_stop = bnxt_rx_queue_stop,
3035         .tx_queue_start = bnxt_tx_queue_start,
3036         .tx_queue_stop = bnxt_tx_queue_stop,
3037         .filter_ctrl = bnxt_filter_ctrl_op,
3038         .dev_supported_ptypes_get = bnxt_dev_supported_ptypes_get_op,
3039         .get_eeprom_length    = bnxt_get_eeprom_length_op,
3040         .get_eeprom           = bnxt_get_eeprom_op,
3041         .set_eeprom           = bnxt_set_eeprom_op,
3042         .timesync_enable      = bnxt_timesync_enable,
3043         .timesync_disable     = bnxt_timesync_disable,
3044         .timesync_read_time   = bnxt_timesync_read_time,
3045         .timesync_write_time   = bnxt_timesync_write_time,
3046         .timesync_adjust_time = bnxt_timesync_adjust_time,
3047         .timesync_read_rx_timestamp = bnxt_timesync_read_rx_timestamp,
3048         .timesync_read_tx_timestamp = bnxt_timesync_read_tx_timestamp,
3049 };
3050
3051 static bool bnxt_vf_pciid(uint16_t id)
3052 {
3053         if (id == BROADCOM_DEV_ID_57304_VF ||
3054             id == BROADCOM_DEV_ID_57406_VF ||
3055             id == BROADCOM_DEV_ID_5731X_VF ||
3056             id == BROADCOM_DEV_ID_5741X_VF ||
3057             id == BROADCOM_DEV_ID_57414_VF ||
3058             id == BROADCOM_DEV_ID_STRATUS_NIC_VF)
3059                 return true;
3060         return false;
3061 }
3062
3063 static int bnxt_init_board(struct rte_eth_dev *eth_dev)
3064 {
3065         struct bnxt *bp = eth_dev->data->dev_private;
3066         struct rte_pci_device *pci_dev = RTE_ETH_DEV_TO_PCI(eth_dev);
3067         int rc;
3068
3069         /* enable device (incl. PCI PM wakeup), and bus-mastering */
3070         if (!pci_dev->mem_resource[0].addr) {
3071                 PMD_DRV_LOG(ERR,
3072                         "Cannot find PCI device base address, aborting\n");
3073                 rc = -ENODEV;
3074                 goto init_err_disable;
3075         }
3076
3077         bp->eth_dev = eth_dev;
3078         bp->pdev = pci_dev;
3079
3080         bp->bar0 = (void *)pci_dev->mem_resource[0].addr;
3081         if (!bp->bar0) {
3082                 PMD_DRV_LOG(ERR, "Cannot map device registers, aborting\n");
3083                 rc = -ENOMEM;
3084                 goto init_err_release;
3085         }
3086         return 0;
3087
3088 init_err_release:
3089         if (bp->bar0)
3090                 bp->bar0 = NULL;
3091
3092 init_err_disable:
3093
3094         return rc;
3095 }
3096
3097 static int bnxt_dev_uninit(struct rte_eth_dev *eth_dev);
3098
3099 #define ALLOW_FUNC(x)   \
3100         { \
3101                 typeof(x) arg = (x); \
3102                 bp->pf.vf_req_fwd[((arg) >> 5)] &= \
3103                 ~rte_cpu_to_le_32(1 << ((arg) & 0x1f)); \
3104         }
3105 static int
3106 bnxt_dev_init(struct rte_eth_dev *eth_dev)
3107 {
3108         struct rte_pci_device *pci_dev = RTE_ETH_DEV_TO_PCI(eth_dev);
3109         char mz_name[RTE_MEMZONE_NAMESIZE];
3110         const struct rte_memzone *mz = NULL;
3111         static int version_printed;
3112         uint32_t total_alloc_len;
3113         rte_iova_t mz_phys_addr;
3114         struct bnxt *bp;
3115         int rc;
3116
3117         if (version_printed++ == 0)
3118                 PMD_DRV_LOG(INFO, "%s\n", bnxt_version);
3119
3120         rte_eth_copy_pci_info(eth_dev, pci_dev);
3121
3122         bp = eth_dev->data->dev_private;
3123
3124         rte_atomic64_init(&bp->rx_mbuf_alloc_fail);
3125         bp->dev_stopped = 1;
3126
3127         if (rte_eal_process_type() != RTE_PROC_PRIMARY)
3128                 goto skip_init;
3129
3130         if (bnxt_vf_pciid(pci_dev->id.device_id))
3131                 bp->flags |= BNXT_FLAG_VF;
3132
3133         rc = bnxt_init_board(eth_dev);
3134         if (rc) {
3135                 PMD_DRV_LOG(ERR,
3136                         "Board initialization failed rc: %x\n", rc);
3137                 goto error;
3138         }
3139 skip_init:
3140         eth_dev->dev_ops = &bnxt_dev_ops;
3141         if (rte_eal_process_type() != RTE_PROC_PRIMARY)
3142                 return 0;
3143         eth_dev->rx_pkt_burst = &bnxt_recv_pkts;
3144         eth_dev->tx_pkt_burst = &bnxt_xmit_pkts;
3145
3146         if (BNXT_PF(bp) && pci_dev->id.device_id != BROADCOM_DEV_ID_NS2) {
3147                 snprintf(mz_name, RTE_MEMZONE_NAMESIZE,
3148                          "bnxt_%04x:%02x:%02x:%02x-%s", pci_dev->addr.domain,
3149                          pci_dev->addr.bus, pci_dev->addr.devid,
3150                          pci_dev->addr.function, "rx_port_stats");
3151                 mz_name[RTE_MEMZONE_NAMESIZE - 1] = 0;
3152                 mz = rte_memzone_lookup(mz_name);
3153                 total_alloc_len = RTE_CACHE_LINE_ROUNDUP(
3154                                 sizeof(struct rx_port_stats) + 512);
3155                 if (!mz) {
3156                         mz = rte_memzone_reserve(mz_name, total_alloc_len,
3157                                         SOCKET_ID_ANY,
3158                                         RTE_MEMZONE_2MB |
3159                                         RTE_MEMZONE_SIZE_HINT_ONLY |
3160                                         RTE_MEMZONE_IOVA_CONTIG);
3161                         if (mz == NULL)
3162                                 return -ENOMEM;
3163                 }
3164                 memset(mz->addr, 0, mz->len);
3165                 mz_phys_addr = mz->iova;
3166                 if ((unsigned long)mz->addr == mz_phys_addr) {
3167                         PMD_DRV_LOG(WARNING,
3168                                 "Memzone physical address same as virtual.\n");
3169                         PMD_DRV_LOG(WARNING,
3170                                 "Using rte_mem_virt2iova()\n");
3171                         mz_phys_addr = rte_mem_virt2iova(mz->addr);
3172                         if (mz_phys_addr == 0) {
3173                                 PMD_DRV_LOG(ERR,
3174                                 "unable to map address to physical memory\n");
3175                                 return -ENOMEM;
3176                         }
3177                 }
3178
3179                 bp->rx_mem_zone = (const void *)mz;
3180                 bp->hw_rx_port_stats = mz->addr;
3181                 bp->hw_rx_port_stats_map = mz_phys_addr;
3182
3183                 snprintf(mz_name, RTE_MEMZONE_NAMESIZE,
3184                          "bnxt_%04x:%02x:%02x:%02x-%s", pci_dev->addr.domain,
3185                          pci_dev->addr.bus, pci_dev->addr.devid,
3186                          pci_dev->addr.function, "tx_port_stats");
3187                 mz_name[RTE_MEMZONE_NAMESIZE - 1] = 0;
3188                 mz = rte_memzone_lookup(mz_name);
3189                 total_alloc_len = RTE_CACHE_LINE_ROUNDUP(
3190                                 sizeof(struct tx_port_stats) + 512);
3191                 if (!mz) {
3192                         mz = rte_memzone_reserve(mz_name,
3193                                         total_alloc_len,
3194                                         SOCKET_ID_ANY,
3195                                         RTE_MEMZONE_2MB |
3196                                         RTE_MEMZONE_SIZE_HINT_ONLY |
3197                                         RTE_MEMZONE_IOVA_CONTIG);
3198                         if (mz == NULL)
3199                                 return -ENOMEM;
3200                 }
3201                 memset(mz->addr, 0, mz->len);
3202                 mz_phys_addr = mz->iova;
3203                 if ((unsigned long)mz->addr == mz_phys_addr) {
3204                         PMD_DRV_LOG(WARNING,
3205                                 "Memzone physical address same as virtual.\n");
3206                         PMD_DRV_LOG(WARNING,
3207                                 "Using rte_mem_virt2iova()\n");
3208                         mz_phys_addr = rte_mem_virt2iova(mz->addr);
3209                         if (mz_phys_addr == 0) {
3210                                 PMD_DRV_LOG(ERR,
3211                                 "unable to map address to physical memory\n");
3212                                 return -ENOMEM;
3213                         }
3214                 }
3215
3216                 bp->tx_mem_zone = (const void *)mz;
3217                 bp->hw_tx_port_stats = mz->addr;
3218                 bp->hw_tx_port_stats_map = mz_phys_addr;
3219
3220                 bp->flags |= BNXT_FLAG_PORT_STATS;
3221         }
3222
3223         rc = bnxt_alloc_hwrm_resources(bp);
3224         if (rc) {
3225                 PMD_DRV_LOG(ERR,
3226                         "hwrm resource allocation failure rc: %x\n", rc);
3227                 goto error_free;
3228         }
3229         rc = bnxt_hwrm_ver_get(bp);
3230         if (rc)
3231                 goto error_free;
3232         rc = bnxt_hwrm_queue_qportcfg(bp);
3233         if (rc) {
3234                 PMD_DRV_LOG(ERR, "hwrm queue qportcfg failed\n");
3235                 goto error_free;
3236         }
3237
3238         rc = bnxt_hwrm_func_qcfg(bp);
3239         if (rc) {
3240                 PMD_DRV_LOG(ERR, "hwrm func qcfg failed\n");
3241                 goto error_free;
3242         }
3243
3244         /* Get the MAX capabilities for this function */
3245         rc = bnxt_hwrm_func_qcaps(bp);
3246         if (rc) {
3247                 PMD_DRV_LOG(ERR, "hwrm query capability failure rc: %x\n", rc);
3248                 goto error_free;
3249         }
3250         if (bp->max_tx_rings == 0) {
3251                 PMD_DRV_LOG(ERR, "No TX rings available!\n");
3252                 rc = -EBUSY;
3253                 goto error_free;
3254         }
3255         eth_dev->data->mac_addrs = rte_zmalloc("bnxt_mac_addr_tbl",
3256                                         ETHER_ADDR_LEN * bp->max_l2_ctx, 0);
3257         if (eth_dev->data->mac_addrs == NULL) {
3258                 PMD_DRV_LOG(ERR,
3259                         "Failed to alloc %u bytes needed to store MAC addr tbl",
3260                         ETHER_ADDR_LEN * bp->max_l2_ctx);
3261                 rc = -ENOMEM;
3262                 goto error_free;
3263         }
3264
3265         if (check_zero_bytes(bp->dflt_mac_addr, ETHER_ADDR_LEN)) {
3266                 PMD_DRV_LOG(ERR,
3267                             "Invalid MAC addr %02X:%02X:%02X:%02X:%02X:%02X\n",
3268                             bp->dflt_mac_addr[0], bp->dflt_mac_addr[1],
3269                             bp->dflt_mac_addr[2], bp->dflt_mac_addr[3],
3270                             bp->dflt_mac_addr[4], bp->dflt_mac_addr[5]);
3271                 rc = -EINVAL;
3272                 goto error_free;
3273         }
3274         /* Copy the permanent MAC from the qcap response address now. */
3275         memcpy(bp->mac_addr, bp->dflt_mac_addr, sizeof(bp->mac_addr));
3276         memcpy(&eth_dev->data->mac_addrs[0], bp->mac_addr, ETHER_ADDR_LEN);
3277
3278         if (bp->max_ring_grps < bp->rx_cp_nr_rings) {
3279                 /* 1 ring is for default completion ring */
3280                 PMD_DRV_LOG(ERR, "Insufficient resource: Ring Group\n");
3281                 rc = -ENOSPC;
3282                 goto error_free;
3283         }
3284
3285         bp->grp_info = rte_zmalloc("bnxt_grp_info",
3286                                 sizeof(*bp->grp_info) * bp->max_ring_grps, 0);
3287         if (!bp->grp_info) {
3288                 PMD_DRV_LOG(ERR,
3289                         "Failed to alloc %zu bytes to store group info table\n",
3290                         sizeof(*bp->grp_info) * bp->max_ring_grps);
3291                 rc = -ENOMEM;
3292                 goto error_free;
3293         }
3294
3295         /* Forward all requests if firmware is new enough */
3296         if (((bp->fw_ver >= ((20 << 24) | (6 << 16) | (100 << 8))) &&
3297             (bp->fw_ver < ((20 << 24) | (7 << 16)))) ||
3298             ((bp->fw_ver >= ((20 << 24) | (8 << 16))))) {
3299                 memset(bp->pf.vf_req_fwd, 0xff, sizeof(bp->pf.vf_req_fwd));
3300         } else {
3301                 PMD_DRV_LOG(WARNING,
3302                         "Firmware too old for VF mailbox functionality\n");
3303                 memset(bp->pf.vf_req_fwd, 0, sizeof(bp->pf.vf_req_fwd));
3304         }
3305
3306         /*
3307          * The following are used for driver cleanup.  If we disallow these,
3308          * VF drivers can't clean up cleanly.
3309          */
3310         ALLOW_FUNC(HWRM_FUNC_DRV_UNRGTR);
3311         ALLOW_FUNC(HWRM_VNIC_FREE);
3312         ALLOW_FUNC(HWRM_RING_FREE);
3313         ALLOW_FUNC(HWRM_RING_GRP_FREE);
3314         ALLOW_FUNC(HWRM_VNIC_RSS_COS_LB_CTX_FREE);
3315         ALLOW_FUNC(HWRM_CFA_L2_FILTER_FREE);
3316         ALLOW_FUNC(HWRM_STAT_CTX_FREE);
3317         ALLOW_FUNC(HWRM_PORT_PHY_QCFG);
3318         ALLOW_FUNC(HWRM_VNIC_TPA_CFG);
3319         rc = bnxt_hwrm_func_driver_register(bp);
3320         if (rc) {
3321                 PMD_DRV_LOG(ERR,
3322                         "Failed to register driver");
3323                 rc = -EBUSY;
3324                 goto error_free;
3325         }
3326
3327         PMD_DRV_LOG(INFO,
3328                 DRV_MODULE_NAME " found at mem %" PRIx64 ", node addr %pM\n",
3329                 pci_dev->mem_resource[0].phys_addr,
3330                 pci_dev->mem_resource[0].addr);
3331
3332         rc = bnxt_hwrm_func_reset(bp);
3333         if (rc) {
3334                 PMD_DRV_LOG(ERR, "hwrm chip reset failure rc: %x\n", rc);
3335                 rc = -EIO;
3336                 goto error_free;
3337         }
3338
3339         if (BNXT_PF(bp)) {
3340                 //if (bp->pf.active_vfs) {
3341                         // TODO: Deallocate VF resources?
3342                 //}
3343                 if (bp->pdev->max_vfs) {
3344                         rc = bnxt_hwrm_allocate_vfs(bp, bp->pdev->max_vfs);
3345                         if (rc) {
3346                                 PMD_DRV_LOG(ERR, "Failed to allocate VFs\n");
3347                                 goto error_free;
3348                         }
3349                 } else {
3350                         rc = bnxt_hwrm_allocate_pf_only(bp);
3351                         if (rc) {
3352                                 PMD_DRV_LOG(ERR,
3353                                         "Failed to allocate PF resources\n");
3354                                 goto error_free;
3355                         }
3356                 }
3357         }
3358
3359         bnxt_hwrm_port_led_qcaps(bp);
3360
3361         rc = bnxt_setup_int(bp);
3362         if (rc)
3363                 goto error_free;
3364
3365         rc = bnxt_alloc_mem(bp);
3366         if (rc)
3367                 goto error_free_int;
3368
3369         rc = bnxt_request_int(bp);
3370         if (rc)
3371                 goto error_free_int;
3372
3373         rc = bnxt_alloc_def_cp_ring(bp);
3374         if (rc)
3375                 goto error_free_int;
3376
3377         bnxt_enable_int(bp);
3378
3379         return 0;
3380
3381 error_free_int:
3382         bnxt_disable_int(bp);
3383         bnxt_free_def_cp_ring(bp);
3384         bnxt_hwrm_func_buf_unrgtr(bp);
3385         bnxt_free_int(bp);
3386         bnxt_free_mem(bp);
3387 error_free:
3388         bnxt_dev_uninit(eth_dev);
3389 error:
3390         return rc;
3391 }
3392
3393 static int
3394 bnxt_dev_uninit(struct rte_eth_dev *eth_dev) {
3395         struct bnxt *bp = eth_dev->data->dev_private;
3396         int rc;
3397
3398         if (rte_eal_process_type() != RTE_PROC_PRIMARY)
3399                 return -EPERM;
3400
3401         bnxt_disable_int(bp);
3402         bnxt_free_int(bp);
3403         bnxt_free_mem(bp);
3404         if (eth_dev->data->mac_addrs != NULL) {
3405                 rte_free(eth_dev->data->mac_addrs);
3406                 eth_dev->data->mac_addrs = NULL;
3407         }
3408         if (bp->grp_info != NULL) {
3409                 rte_free(bp->grp_info);
3410                 bp->grp_info = NULL;
3411         }
3412         rc = bnxt_hwrm_func_driver_unregister(bp, 0);
3413         bnxt_free_hwrm_resources(bp);
3414         rte_memzone_free((const struct rte_memzone *)bp->tx_mem_zone);
3415         rte_memzone_free((const struct rte_memzone *)bp->rx_mem_zone);
3416         if (bp->dev_stopped == 0)
3417                 bnxt_dev_close_op(eth_dev);
3418         if (bp->pf.vf_info)
3419                 rte_free(bp->pf.vf_info);
3420         eth_dev->dev_ops = NULL;
3421         eth_dev->rx_pkt_burst = NULL;
3422         eth_dev->tx_pkt_burst = NULL;
3423
3424         return rc;
3425 }
3426
3427 static int bnxt_pci_probe(struct rte_pci_driver *pci_drv __rte_unused,
3428         struct rte_pci_device *pci_dev)
3429 {
3430         return rte_eth_dev_pci_generic_probe(pci_dev, sizeof(struct bnxt),
3431                 bnxt_dev_init);
3432 }
3433
3434 static int bnxt_pci_remove(struct rte_pci_device *pci_dev)
3435 {
3436         return rte_eth_dev_pci_generic_remove(pci_dev, bnxt_dev_uninit);
3437 }
3438
3439 static struct rte_pci_driver bnxt_rte_pmd = {
3440         .id_table = bnxt_pci_id_map,
3441         .drv_flags = RTE_PCI_DRV_NEED_MAPPING |
3442                 RTE_PCI_DRV_INTR_LSC,
3443         .probe = bnxt_pci_probe,
3444         .remove = bnxt_pci_remove,
3445 };
3446
3447 static bool
3448 is_device_supported(struct rte_eth_dev *dev, struct rte_pci_driver *drv)
3449 {
3450         if (strcmp(dev->device->driver->name, drv->driver.name))
3451                 return false;
3452
3453         return true;
3454 }
3455
3456 bool is_bnxt_supported(struct rte_eth_dev *dev)
3457 {
3458         return is_device_supported(dev, &bnxt_rte_pmd);
3459 }
3460
3461 RTE_INIT(bnxt_init_log);
3462 static void
3463 bnxt_init_log(void)
3464 {
3465         bnxt_logtype_driver = rte_log_register("pmd.bnxt.driver");
3466         if (bnxt_logtype_driver >= 0)
3467                 rte_log_set_level(bnxt_logtype_driver, RTE_LOG_NOTICE);
3468 }
3469
3470 RTE_PMD_REGISTER_PCI(net_bnxt, bnxt_rte_pmd);
3471 RTE_PMD_REGISTER_PCI_TABLE(net_bnxt, bnxt_pci_id_map);
3472 RTE_PMD_REGISTER_KMOD_DEP(net_bnxt, "* igb_uio | uio_pci_generic | vfio-pci");