drivers/net/bnxt/bnxt_ethdev.c

   1 /* SPDX-License-Identifier: BSD-3-Clause
   2  * Copyright(c) 2014-2018 Broadcom
   3  * All rights reserved.
   4  */
   5
   6 #include <inttypes.h>
   7 #include <stdbool.h>
   8
   9 #include <rte_dev.h>
  10 #include <rte_ethdev_driver.h>
  11 #include <rte_ethdev_pci.h>
  12 #include <rte_malloc.h>
  13 #include <rte_cycles.h>
  14
  15 #include "bnxt.h"
  16 #include "bnxt_cpr.h"
  17 #include "bnxt_filter.h"
  18 #include "bnxt_hwrm.h"
  19 #include "bnxt_irq.h"
  20 #include "bnxt_ring.h"
  21 #include "bnxt_rxq.h"
  22 #include "bnxt_rxr.h"
  23 #include "bnxt_stats.h"
  24 #include "bnxt_txq.h"
  25 #include "bnxt_txr.h"
  26 #include "bnxt_vnic.h"
  27 #include "hsi_struct_def_dpdk.h"
  28 #include "bnxt_nvm_defs.h"
  29
  30 #define DRV_MODULE_NAME         "bnxt"
  31 static const char bnxt_version[] =
  32         "Broadcom NetXtreme driver " DRV_MODULE_NAME "\n";
  33 int bnxt_logtype_driver;
  34
  35 #define PCI_VENDOR_ID_BROADCOM 0x14E4
  36
  37 #define BROADCOM_DEV_ID_STRATUS_NIC_VF1 0x1606
  38 #define BROADCOM_DEV_ID_STRATUS_NIC_VF2 0x1609
  39 #define BROADCOM_DEV_ID_STRATUS_NIC 0x1614
  40 #define BROADCOM_DEV_ID_57414_VF 0x16c1
  41 #define BROADCOM_DEV_ID_57301 0x16c8
  42 #define BROADCOM_DEV_ID_57302 0x16c9
  43 #define BROADCOM_DEV_ID_57304_PF 0x16ca
  44 #define BROADCOM_DEV_ID_57304_VF 0x16cb
  45 #define BROADCOM_DEV_ID_57417_MF 0x16cc
  46 #define BROADCOM_DEV_ID_NS2 0x16cd
  47 #define BROADCOM_DEV_ID_57311 0x16ce
  48 #define BROADCOM_DEV_ID_57312 0x16cf
  49 #define BROADCOM_DEV_ID_57402 0x16d0
  50 #define BROADCOM_DEV_ID_57404 0x16d1
  51 #define BROADCOM_DEV_ID_57406_PF 0x16d2
  52 #define BROADCOM_DEV_ID_57406_VF 0x16d3
  53 #define BROADCOM_DEV_ID_57402_MF 0x16d4
  54 #define BROADCOM_DEV_ID_57407_RJ45 0x16d5
  55 #define BROADCOM_DEV_ID_57412 0x16d6
  56 #define BROADCOM_DEV_ID_57414 0x16d7
  57 #define BROADCOM_DEV_ID_57416_RJ45 0x16d8
  58 #define BROADCOM_DEV_ID_57417_RJ45 0x16d9
  59 #define BROADCOM_DEV_ID_5741X_VF 0x16dc
  60 #define BROADCOM_DEV_ID_57412_MF 0x16de
  61 #define BROADCOM_DEV_ID_57314 0x16df
  62 #define BROADCOM_DEV_ID_57317_RJ45 0x16e0
  63 #define BROADCOM_DEV_ID_5731X_VF 0x16e1
  64 #define BROADCOM_DEV_ID_57417_SFP 0x16e2
  65 #define BROADCOM_DEV_ID_57416_SFP 0x16e3
  66 #define BROADCOM_DEV_ID_57317_SFP 0x16e4
  67 #define BROADCOM_DEV_ID_57404_MF 0x16e7
  68 #define BROADCOM_DEV_ID_57406_MF 0x16e8
  69 #define BROADCOM_DEV_ID_57407_SFP 0x16e9
  70 #define BROADCOM_DEV_ID_57407_MF 0x16ea
  71 #define BROADCOM_DEV_ID_57414_MF 0x16ec
  72 #define BROADCOM_DEV_ID_57416_MF 0x16ee
  73 #define BROADCOM_DEV_ID_58802 0xd802
  74 #define BROADCOM_DEV_ID_58804 0xd804
  75 #define BROADCOM_DEV_ID_58808 0x16f0
  76
  77 static const struct rte_pci_id bnxt_pci_id_map[] = {
  78         { RTE_PCI_DEVICE(PCI_VENDOR_ID_BROADCOM,
  79                          BROADCOM_DEV_ID_STRATUS_NIC_VF1) },
  80         { RTE_PCI_DEVICE(PCI_VENDOR_ID_BROADCOM,
  81                          BROADCOM_DEV_ID_STRATUS_NIC_VF2) },
  82         { RTE_PCI_DEVICE(PCI_VENDOR_ID_BROADCOM, BROADCOM_DEV_ID_STRATUS_NIC) },
  83         { RTE_PCI_DEVICE(PCI_VENDOR_ID_BROADCOM, BROADCOM_DEV_ID_57414_VF) },
  84         { RTE_PCI_DEVICE(PCI_VENDOR_ID_BROADCOM, BROADCOM_DEV_ID_57301) },
  85         { RTE_PCI_DEVICE(PCI_VENDOR_ID_BROADCOM, BROADCOM_DEV_ID_57302) },
  86         { RTE_PCI_DEVICE(PCI_VENDOR_ID_BROADCOM, BROADCOM_DEV_ID_57304_PF) },
  87         { RTE_PCI_DEVICE(PCI_VENDOR_ID_BROADCOM, BROADCOM_DEV_ID_57304_VF) },
  88         { RTE_PCI_DEVICE(PCI_VENDOR_ID_BROADCOM, BROADCOM_DEV_ID_NS2) },
  89         { RTE_PCI_DEVICE(PCI_VENDOR_ID_BROADCOM, BROADCOM_DEV_ID_57402) },
  90         { RTE_PCI_DEVICE(PCI_VENDOR_ID_BROADCOM, BROADCOM_DEV_ID_57404) },
  91         { RTE_PCI_DEVICE(PCI_VENDOR_ID_BROADCOM, BROADCOM_DEV_ID_57406_PF) },
  92         { RTE_PCI_DEVICE(PCI_VENDOR_ID_BROADCOM, BROADCOM_DEV_ID_57406_VF) },
  93         { RTE_PCI_DEVICE(PCI_VENDOR_ID_BROADCOM, BROADCOM_DEV_ID_57402_MF) },
  94         { RTE_PCI_DEVICE(PCI_VENDOR_ID_BROADCOM, BROADCOM_DEV_ID_57407_RJ45) },
  95         { RTE_PCI_DEVICE(PCI_VENDOR_ID_BROADCOM, BROADCOM_DEV_ID_57404_MF) },
  96         { RTE_PCI_DEVICE(PCI_VENDOR_ID_BROADCOM, BROADCOM_DEV_ID_57406_MF) },
  97         { RTE_PCI_DEVICE(PCI_VENDOR_ID_BROADCOM, BROADCOM_DEV_ID_57407_SFP) },
  98         { RTE_PCI_DEVICE(PCI_VENDOR_ID_BROADCOM, BROADCOM_DEV_ID_57407_MF) },
  99         { RTE_PCI_DEVICE(PCI_VENDOR_ID_BROADCOM, BROADCOM_DEV_ID_5741X_VF) },
 100         { RTE_PCI_DEVICE(PCI_VENDOR_ID_BROADCOM, BROADCOM_DEV_ID_5731X_VF) },
 101         { RTE_PCI_DEVICE(PCI_VENDOR_ID_BROADCOM, BROADCOM_DEV_ID_57314) },
 102         { RTE_PCI_DEVICE(PCI_VENDOR_ID_BROADCOM, BROADCOM_DEV_ID_57417_MF) },
 103         { RTE_PCI_DEVICE(PCI_VENDOR_ID_BROADCOM, BROADCOM_DEV_ID_57311) },
 104         { RTE_PCI_DEVICE(PCI_VENDOR_ID_BROADCOM, BROADCOM_DEV_ID_57312) },
 105         { RTE_PCI_DEVICE(PCI_VENDOR_ID_BROADCOM, BROADCOM_DEV_ID_57412) },
 106         { RTE_PCI_DEVICE(PCI_VENDOR_ID_BROADCOM, BROADCOM_DEV_ID_57414) },
 107         { RTE_PCI_DEVICE(PCI_VENDOR_ID_BROADCOM, BROADCOM_DEV_ID_57416_RJ45) },
 108         { RTE_PCI_DEVICE(PCI_VENDOR_ID_BROADCOM, BROADCOM_DEV_ID_57417_RJ45) },
 109         { RTE_PCI_DEVICE(PCI_VENDOR_ID_BROADCOM, BROADCOM_DEV_ID_57412_MF) },
 110         { RTE_PCI_DEVICE(PCI_VENDOR_ID_BROADCOM, BROADCOM_DEV_ID_57317_RJ45) },
 111         { RTE_PCI_DEVICE(PCI_VENDOR_ID_BROADCOM, BROADCOM_DEV_ID_57417_SFP) },
 112         { RTE_PCI_DEVICE(PCI_VENDOR_ID_BROADCOM, BROADCOM_DEV_ID_57416_SFP) },
 113         { RTE_PCI_DEVICE(PCI_VENDOR_ID_BROADCOM, BROADCOM_DEV_ID_57317_SFP) },
 114         { RTE_PCI_DEVICE(PCI_VENDOR_ID_BROADCOM, BROADCOM_DEV_ID_57414_MF) },
 115         { RTE_PCI_DEVICE(PCI_VENDOR_ID_BROADCOM, BROADCOM_DEV_ID_57416_MF) },
 116         { RTE_PCI_DEVICE(PCI_VENDOR_ID_BROADCOM, BROADCOM_DEV_ID_58802) },
 117         { RTE_PCI_DEVICE(PCI_VENDOR_ID_BROADCOM, BROADCOM_DEV_ID_58804) },
 118         { RTE_PCI_DEVICE(PCI_VENDOR_ID_BROADCOM, BROADCOM_DEV_ID_58808) },
 119         { .vendor_id = 0, /* sentinel */ },
 120 };
 121
 122 #define BNXT_ETH_RSS_SUPPORT (  \
 123         ETH_RSS_IPV4 |          \
 124         ETH_RSS_NONFRAG_IPV4_TCP |      \
 125         ETH_RSS_NONFRAG_IPV4_UDP |      \
 126         ETH_RSS_IPV6 |          \
 127         ETH_RSS_NONFRAG_IPV6_TCP |      \
 128         ETH_RSS_NONFRAG_IPV6_UDP)
 129
 130 #define BNXT_DEV_TX_OFFLOAD_SUPPORT (DEV_TX_OFFLOAD_VLAN_INSERT | \
 131                                      DEV_TX_OFFLOAD_IPV4_CKSUM | \
 132                                      DEV_TX_OFFLOAD_TCP_CKSUM | \
 133                                      DEV_TX_OFFLOAD_UDP_CKSUM | \
 134                                      DEV_TX_OFFLOAD_TCP_TSO | \
 135                                      DEV_TX_OFFLOAD_OUTER_IPV4_CKSUM | \
 136                                      DEV_TX_OFFLOAD_VXLAN_TNL_TSO | \
 137                                      DEV_TX_OFFLOAD_GRE_TNL_TSO | \
 138                                      DEV_TX_OFFLOAD_IPIP_TNL_TSO | \
 139                                      DEV_TX_OFFLOAD_GENEVE_TNL_TSO | \
 140                                      DEV_TX_OFFLOAD_MULTI_SEGS)
 141
 142 #define BNXT_DEV_RX_OFFLOAD_SUPPORT (DEV_RX_OFFLOAD_VLAN_FILTER | \
 143                                      DEV_RX_OFFLOAD_VLAN_STRIP | \
 144                                      DEV_RX_OFFLOAD_IPV4_CKSUM | \
 145                                      DEV_RX_OFFLOAD_UDP_CKSUM | \
 146                                      DEV_RX_OFFLOAD_TCP_CKSUM | \
 147                                      DEV_RX_OFFLOAD_OUTER_IPV4_CKSUM | \
 148                                      DEV_RX_OFFLOAD_JUMBO_FRAME | \
 149                                      DEV_RX_OFFLOAD_CRC_STRIP | \
 150                                      DEV_RX_OFFLOAD_TCP_LRO)
 151
 152 static int bnxt_vlan_offload_set_op(struct rte_eth_dev *dev, int mask);
 153 static void bnxt_print_link_info(struct rte_eth_dev *eth_dev);
 154 static int bnxt_mtu_set_op(struct rte_eth_dev *eth_dev, uint16_t new_mtu);
 155
 156 /***********************/
 157
 158 /*
 159  * High level utility functions
 160  */
 161
 162 static void bnxt_free_mem(struct bnxt *bp)
 163 {
 164         bnxt_free_filter_mem(bp);
 165         bnxt_free_vnic_attributes(bp);
 166         bnxt_free_vnic_mem(bp);
 167
 168         bnxt_free_stats(bp);
 169         bnxt_free_tx_rings(bp);
 170         bnxt_free_rx_rings(bp);
 171         bnxt_free_def_cp_ring(bp);
 172 }
 173
 174 static int bnxt_alloc_mem(struct bnxt *bp)
 175 {
 176         int rc;
 177
 178         /* Default completion ring */
 179         rc = bnxt_init_def_ring_struct(bp, SOCKET_ID_ANY);
 180         if (rc)
 181                 goto alloc_mem_err;
 182
 183         rc = bnxt_alloc_rings(bp, 0, NULL, NULL,
 184                               bp->def_cp_ring, "def_cp");
 185         if (rc)
 186                 goto alloc_mem_err;
 187
 188         rc = bnxt_alloc_vnic_mem(bp);
 189         if (rc)
 190                 goto alloc_mem_err;
 191
 192         rc = bnxt_alloc_vnic_attributes(bp);
 193         if (rc)
 194                 goto alloc_mem_err;
 195
 196         rc = bnxt_alloc_filter_mem(bp);
 197         if (rc)
 198                 goto alloc_mem_err;
 199
 200         return 0;
 201
 202 alloc_mem_err:
 203         bnxt_free_mem(bp);
 204         return rc;
 205 }
 206
 207 static int bnxt_init_chip(struct bnxt *bp)
 208 {
 209         unsigned int i;
 210         struct rte_eth_link new;
 211         struct rte_pci_device *pci_dev = RTE_ETH_DEV_TO_PCI(bp->eth_dev);
 212         struct rte_intr_handle *intr_handle = &pci_dev->intr_handle;
 213         uint32_t intr_vector = 0;
 214         uint32_t queue_id, base = BNXT_MISC_VEC_ID;
 215         uint32_t vec = BNXT_MISC_VEC_ID;
 216         int rc;
 217
 218         /* disable uio/vfio intr/eventfd mapping */
 219         rte_intr_disable(intr_handle);
 220
 221         if (bp->eth_dev->data->mtu > ETHER_MTU) {
 222                 bp->eth_dev->data->dev_conf.rxmode.offloads |=
 223                         DEV_RX_OFFLOAD_JUMBO_FRAME;
 224                 bp->flags |= BNXT_FLAG_JUMBO;
 225         } else {
 226                 bp->eth_dev->data->dev_conf.rxmode.offloads &=
 227                         ~DEV_RX_OFFLOAD_JUMBO_FRAME;
 228                 bp->flags &= ~BNXT_FLAG_JUMBO;
 229         }
 230
 231         rc = bnxt_alloc_all_hwrm_stat_ctxs(bp);
 232         if (rc) {
 233                 PMD_DRV_LOG(ERR, "HWRM stat ctx alloc failure rc: %x\n", rc);
 234                 goto err_out;
 235         }
 236
 237         rc = bnxt_alloc_hwrm_rings(bp);
 238         if (rc) {
 239                 PMD_DRV_LOG(ERR, "HWRM ring alloc failure rc: %x\n", rc);
 240                 goto err_out;
 241         }
 242
 243         rc = bnxt_alloc_all_hwrm_ring_grps(bp);
 244         if (rc) {
 245                 PMD_DRV_LOG(ERR, "HWRM ring grp alloc failure: %x\n", rc);
 246                 goto err_out;
 247         }
 248
 249         rc = bnxt_mq_rx_configure(bp);
 250         if (rc) {
 251                 PMD_DRV_LOG(ERR, "MQ mode configure failure rc: %x\n", rc);
 252                 goto err_out;
 253         }
 254
 255         /* VNIC configuration */
 256         for (i = 0; i < bp->nr_vnics; i++) {
 257                 struct bnxt_vnic_info *vnic = &bp->vnic_info[i];
 258
 259                 rc = bnxt_hwrm_vnic_alloc(bp, vnic);
 260                 if (rc) {
 261                         PMD_DRV_LOG(ERR, "HWRM vnic %d alloc failure rc: %x\n",
 262                                 i, rc);
 263                         goto err_out;
 264                 }
 265
 266                 rc = bnxt_hwrm_vnic_ctx_alloc(bp, vnic);
 267                 if (rc) {
 268                         PMD_DRV_LOG(ERR,
 269                                 "HWRM vnic %d ctx alloc failure rc: %x\n",
 270                                 i, rc);
 271                         goto err_out;
 272                 }
 273
 274                 rc = bnxt_hwrm_vnic_cfg(bp, vnic);
 275                 if (rc) {
 276                         PMD_DRV_LOG(ERR, "HWRM vnic %d cfg failure rc: %x\n",
 277                                 i, rc);
 278                         goto err_out;
 279                 }
 280
 281                 rc = bnxt_set_hwrm_vnic_filters(bp, vnic);
 282                 if (rc) {
 283                         PMD_DRV_LOG(ERR,
 284                                 "HWRM vnic %d filter failure rc: %x\n",
 285                                 i, rc);
 286                         goto err_out;
 287                 }
 288
 289                 rc = bnxt_vnic_rss_configure(bp, vnic);
 290                 if (rc) {
 291                         PMD_DRV_LOG(ERR,
 292                                     "HWRM vnic set RSS failure rc: %x\n", rc);
 293                         goto err_out;
 294                 }
 295
 296                 bnxt_hwrm_vnic_plcmode_cfg(bp, vnic);
 297
 298                 if (bp->eth_dev->data->dev_conf.rxmode.offloads &
 299                     DEV_RX_OFFLOAD_TCP_LRO)
 300                         bnxt_hwrm_vnic_tpa_cfg(bp, vnic, 1);
 301                 else
 302                         bnxt_hwrm_vnic_tpa_cfg(bp, vnic, 0);
 303         }
 304         rc = bnxt_hwrm_cfa_l2_set_rx_mask(bp, &bp->vnic_info[0], 0, NULL);
 305         if (rc) {
 306                 PMD_DRV_LOG(ERR,
 307                         "HWRM cfa l2 rx mask failure rc: %x\n", rc);
 308                 goto err_out;
 309         }
 310
 311         /* check and configure queue intr-vector mapping */
 312         if ((rte_intr_cap_multiple(intr_handle) ||
 313              !RTE_ETH_DEV_SRIOV(bp->eth_dev).active) &&
 314             bp->eth_dev->data->dev_conf.intr_conf.rxq != 0) {
 315                 intr_vector = bp->eth_dev->data->nb_rx_queues;
 316                 PMD_DRV_LOG(DEBUG, "intr_vector = %d\n", intr_vector);
 317                 if (intr_vector > bp->rx_cp_nr_rings) {
 318                         PMD_DRV_LOG(ERR, "At most %d intr queues supported",
 319                                         bp->rx_cp_nr_rings);
 320                         return -ENOTSUP;
 321                 }
 322                 if (rte_intr_efd_enable(intr_handle, intr_vector))
 323                         return -1;
 324         }
 325
 326         if (rte_intr_dp_is_en(intr_handle) && !intr_handle->intr_vec) {
 327                 intr_handle->intr_vec =
 328                         rte_zmalloc("intr_vec",
 329                                     bp->eth_dev->data->nb_rx_queues *
 330                                     sizeof(int), 0);
 331                 if (intr_handle->intr_vec == NULL) {
 332                         PMD_DRV_LOG(ERR, "Failed to allocate %d rx_queues"
 333                                 " intr_vec", bp->eth_dev->data->nb_rx_queues);
 334                         return -ENOMEM;
 335                 }
 336                 PMD_DRV_LOG(DEBUG, "intr_handle->intr_vec = %p "
 337                         "intr_handle->nb_efd = %d intr_handle->max_intr = %d\n",
 338                          intr_handle->intr_vec, intr_handle->nb_efd,
 339                         intr_handle->max_intr);
 340         }
 341
 342         for (queue_id = 0; queue_id < bp->eth_dev->data->nb_rx_queues;
 343              queue_id++) {
 344                 intr_handle->intr_vec[queue_id] = vec;
 345                 if (vec < base + intr_handle->nb_efd - 1)
 346                         vec++;
 347         }
 348
 349         /* enable uio/vfio intr/eventfd mapping */
 350         rte_intr_enable(intr_handle);
 351
 352         rc = bnxt_get_hwrm_link_config(bp, &new);
 353         if (rc) {
 354                 PMD_DRV_LOG(ERR, "HWRM Get link config failure rc: %x\n", rc);
 355                 goto err_out;
 356         }
 357
 358         if (!bp->link_info.link_up) {
 359                 rc = bnxt_set_hwrm_link_config(bp, true);
 360                 if (rc) {
 361                         PMD_DRV_LOG(ERR,
 362                                 "HWRM link config failure rc: %x\n", rc);
 363                         goto err_out;
 364                 }
 365         }
 366         bnxt_print_link_info(bp->eth_dev);
 367
 368         return 0;
 369
 370 err_out:
 371         bnxt_free_all_hwrm_resources(bp);
 372
 373         /* Some of the error status returned by FW may not be from errno.h */
 374         if (rc > 0)
 375                 rc = -EIO;
 376
 377         return rc;
 378 }
 379
 380 static int bnxt_shutdown_nic(struct bnxt *bp)
 381 {
 382         bnxt_free_all_hwrm_resources(bp);
 383         bnxt_free_all_filters(bp);
 384         bnxt_free_all_vnics(bp);
 385         return 0;
 386 }
 387
 388 static int bnxt_init_nic(struct bnxt *bp)
 389 {
 390         int rc;
 391
 392         rc = bnxt_init_ring_grps(bp);
 393         if (rc)
 394                 return rc;
 395
 396         bnxt_init_vnics(bp);
 397         bnxt_init_filters(bp);
 398
 399         return 0;
 400 }
 401
 402 /*
 403  * Device configuration and status function
 404  */
 405
 406 static void bnxt_dev_info_get_op(struct rte_eth_dev *eth_dev,
 407                                   struct rte_eth_dev_info *dev_info)
 408 {
 409         struct bnxt *bp = (struct bnxt *)eth_dev->data->dev_private;
 410         uint16_t max_vnics, i, j, vpool, vrxq;
 411         unsigned int max_rx_rings;
 412
 413         /* MAC Specifics */
 414         dev_info->max_mac_addrs = bp->max_l2_ctx;
 415         dev_info->max_hash_mac_addrs = 0;
 416
 417         /* PF/VF specifics */
 418         if (BNXT_PF(bp))
 419                 dev_info->max_vfs = bp->pdev->max_vfs;
 420         max_rx_rings = RTE_MIN(bp->max_vnics, RTE_MIN(bp->max_l2_ctx,
 421                                                 RTE_MIN(bp->max_rsscos_ctx,
 422                                                 bp->max_stat_ctx)));
 423         /* For the sake of symmetry, max_rx_queues = max_tx_queues */
 424         dev_info->max_rx_queues = max_rx_rings;
 425         dev_info->max_tx_queues = max_rx_rings;
 426         dev_info->reta_size = bp->max_rsscos_ctx;
 427         dev_info->hash_key_size = 40;
 428         max_vnics = bp->max_vnics;
 429
 430         /* Fast path specifics */
 431         dev_info->min_rx_bufsize = 1;
 432         dev_info->max_rx_pktlen = BNXT_MAX_MTU + ETHER_HDR_LEN + ETHER_CRC_LEN
 433                                   + VLAN_TAG_SIZE;
 434
 435         dev_info->rx_offload_capa = BNXT_DEV_RX_OFFLOAD_SUPPORT;
 436         if (bp->flags & BNXT_FLAG_PTP_SUPPORTED)
 437                 dev_info->rx_offload_capa |= DEV_RX_OFFLOAD_TIMESTAMP;
 438         dev_info->tx_offload_capa = BNXT_DEV_TX_OFFLOAD_SUPPORT;
 439         dev_info->flow_type_rss_offloads = BNXT_ETH_RSS_SUPPORT;
 440
 441         /* *INDENT-OFF* */
 442         dev_info->default_rxconf = (struct rte_eth_rxconf) {
 443                 .rx_thresh = {
 444                         .pthresh = 8,
 445                         .hthresh = 8,
 446                         .wthresh = 0,
 447                 },
 448                 .rx_free_thresh = 32,
 449                 /* If no descriptors available, pkts are dropped by default */
 450                 .rx_drop_en = 1,
 451         };
 452
 453         dev_info->default_txconf = (struct rte_eth_txconf) {
 454                 .tx_thresh = {
 455                         .pthresh = 32,
 456                         .hthresh = 0,
 457                         .wthresh = 0,
 458                 },
 459                 .tx_free_thresh = 32,
 460                 .tx_rs_thresh = 32,
 461         };
 462         eth_dev->data->dev_conf.intr_conf.lsc = 1;
 463
 464         eth_dev->data->dev_conf.intr_conf.rxq = 1;
 465
 466         /* *INDENT-ON* */
 467
 468         /*
 469          * TODO: default_rxconf, default_txconf, rx_desc_lim, and tx_desc_lim
 470          *       need further investigation.
 471          */
 472
 473         /* VMDq resources */
 474         vpool = 64; /* ETH_64_POOLS */
 475         vrxq = 128; /* ETH_VMDQ_DCB_NUM_QUEUES */
 476         for (i = 0; i < 4; vpool >>= 1, i++) {
 477                 if (max_vnics > vpool) {
 478                         for (j = 0; j < 5; vrxq >>= 1, j++) {
 479                                 if (dev_info->max_rx_queues > vrxq) {
 480                                         if (vpool > vrxq)
 481                                                 vpool = vrxq;
 482                                         goto found;
 483                                 }
 484                         }
 485                         /* Not enough resources to support VMDq */
 486                         break;
 487                 }
 488         }
 489         /* Not enough resources to support VMDq */
 490         vpool = 0;
 491         vrxq = 0;
 492 found:
 493         dev_info->max_vmdq_pools = vpool;
 494         dev_info->vmdq_queue_num = vrxq;
 495
 496         dev_info->vmdq_pool_base = 0;
 497         dev_info->vmdq_queue_base = 0;
 498 }
 499
 500 /* Configure the device based on the configuration provided */
 501 static int bnxt_dev_configure_op(struct rte_eth_dev *eth_dev)
 502 {
 503         struct bnxt *bp = (struct bnxt *)eth_dev->data->dev_private;
 504         uint64_t rx_offloads = eth_dev->data->dev_conf.rxmode.offloads;
 505
 506         bp->rx_queues = (void *)eth_dev->data->rx_queues;
 507         bp->tx_queues = (void *)eth_dev->data->tx_queues;
 508
 509         /* Inherit new configurations */
 510         if (eth_dev->data->nb_rx_queues > bp->max_rx_rings ||
 511             eth_dev->data->nb_tx_queues > bp->max_tx_rings ||
 512             eth_dev->data->nb_rx_queues + eth_dev->data->nb_tx_queues + 1 >
 513             bp->max_cp_rings ||
 514             eth_dev->data->nb_rx_queues + eth_dev->data->nb_tx_queues >
 515             bp->max_stat_ctx ||
 516             (uint32_t)(eth_dev->data->nb_rx_queues + 1) > bp->max_ring_grps) {
 517                 PMD_DRV_LOG(ERR,
 518                         "Insufficient resources to support requested config\n");
 519                 PMD_DRV_LOG(ERR,
 520                         "Num Queues Requested: Tx %d, Rx %d\n",
 521                         eth_dev->data->nb_tx_queues,
 522                         eth_dev->data->nb_rx_queues);
 523                 PMD_DRV_LOG(ERR,
 524                         "Res available: TxQ %d, RxQ %d, CQ %d Stat %d, Grp %d\n",
 525                         bp->max_tx_rings, bp->max_rx_rings, bp->max_cp_rings,
 526                         bp->max_stat_ctx, bp->max_ring_grps);
 527                 return -ENOSPC;
 528         }
 529
 530         bp->rx_nr_rings = eth_dev->data->nb_rx_queues;
 531         bp->tx_nr_rings = eth_dev->data->nb_tx_queues;
 532         bp->rx_cp_nr_rings = bp->rx_nr_rings;
 533         bp->tx_cp_nr_rings = bp->tx_nr_rings;
 534
 535         if (rx_offloads & DEV_RX_OFFLOAD_JUMBO_FRAME) {
 536                 eth_dev->data->mtu =
 537                                 eth_dev->data->dev_conf.rxmode.max_rx_pkt_len -
 538                                 ETHER_HDR_LEN - ETHER_CRC_LEN - VLAN_TAG_SIZE *
 539                                 BNXT_NUM_VLANS;
 540                 bnxt_mtu_set_op(eth_dev, eth_dev->data->mtu);
 541         }
 542         return 0;
 543 }
 544
 545 static void bnxt_print_link_info(struct rte_eth_dev *eth_dev)
 546 {
 547         struct rte_eth_link *link = &eth_dev->data->dev_link;
 548
 549         if (link->link_status)
 550                 PMD_DRV_LOG(INFO, "Port %d Link Up - speed %u Mbps - %s\n",
 551                         eth_dev->data->port_id,
 552                         (uint32_t)link->link_speed,
 553                         (link->link_duplex == ETH_LINK_FULL_DUPLEX) ?
 554                         ("full-duplex") : ("half-duplex\n"));
 555         else
 556                 PMD_DRV_LOG(INFO, "Port %d Link Down\n",
 557                         eth_dev->data->port_id);
 558 }
 559
 560 static int bnxt_dev_lsc_intr_setup(struct rte_eth_dev *eth_dev)
 561 {
 562         bnxt_print_link_info(eth_dev);
 563         return 0;
 564 }
 565
 566 static int bnxt_dev_start_op(struct rte_eth_dev *eth_dev)
 567 {
 568         struct bnxt *bp = (struct bnxt *)eth_dev->data->dev_private;
 569         uint64_t rx_offloads = eth_dev->data->dev_conf.rxmode.offloads;
 570         int vlan_mask = 0;
 571         int rc;
 572
 573         if (bp->rx_cp_nr_rings > RTE_ETHDEV_QUEUE_STAT_CNTRS) {
 574                 PMD_DRV_LOG(ERR,
 575                         "RxQ cnt %d > CONFIG_RTE_ETHDEV_QUEUE_STAT_CNTRS %d\n",
 576                         bp->rx_cp_nr_rings, RTE_ETHDEV_QUEUE_STAT_CNTRS);
 577         }
 578         bp->dev_stopped = 0;
 579
 580         rc = bnxt_init_chip(bp);
 581         if (rc)
 582                 goto error;
 583
 584         bnxt_link_update_op(eth_dev, 1);
 585
 586         if (rx_offloads & DEV_RX_OFFLOAD_VLAN_FILTER)
 587                 vlan_mask |= ETH_VLAN_FILTER_MASK;
 588         if (rx_offloads & DEV_RX_OFFLOAD_VLAN_STRIP)
 589                 vlan_mask |= ETH_VLAN_STRIP_MASK;
 590         rc = bnxt_vlan_offload_set_op(eth_dev, vlan_mask);
 591         if (rc)
 592                 goto error;
 593
 594         bp->flags |= BNXT_FLAG_INIT_DONE;
 595         return 0;
 596
 597 error:
 598         bnxt_shutdown_nic(bp);
 599         bnxt_free_tx_mbufs(bp);
 600         bnxt_free_rx_mbufs(bp);
 601         return rc;
 602 }
 603
 604 static int bnxt_dev_set_link_up_op(struct rte_eth_dev *eth_dev)
 605 {
 606         struct bnxt *bp = (struct bnxt *)eth_dev->data->dev_private;
 607         int rc = 0;
 608
 609         if (!bp->link_info.link_up)
 610                 rc = bnxt_set_hwrm_link_config(bp, true);
 611         if (!rc)
 612                 eth_dev->data->dev_link.link_status = 1;
 613
 614         bnxt_print_link_info(eth_dev);
 615         return 0;
 616 }
 617
 618 static int bnxt_dev_set_link_down_op(struct rte_eth_dev *eth_dev)
 619 {
 620         struct bnxt *bp = (struct bnxt *)eth_dev->data->dev_private;
 621
 622         eth_dev->data->dev_link.link_status = 0;
 623         bnxt_set_hwrm_link_config(bp, false);
 624         bp->link_info.link_up = 0;
 625
 626         return 0;
 627 }
 628
 629 /* Unload the driver, release resources */
 630 static void bnxt_dev_stop_op(struct rte_eth_dev *eth_dev)
 631 {
 632         struct bnxt *bp = (struct bnxt *)eth_dev->data->dev_private;
 633
 634         bp->flags &= ~BNXT_FLAG_INIT_DONE;
 635         if (bp->eth_dev->data->dev_started) {
 636                 /* TBD: STOP HW queues DMA */
 637                 eth_dev->data->dev_link.link_status = 0;
 638         }
 639         bnxt_set_hwrm_link_config(bp, false);
 640         bnxt_hwrm_port_clr_stats(bp);
 641         bnxt_free_tx_mbufs(bp);
 642         bnxt_free_rx_mbufs(bp);
 643         bnxt_shutdown_nic(bp);
 644         bp->dev_stopped = 1;
 645 }
 646
 647 static void bnxt_dev_close_op(struct rte_eth_dev *eth_dev)
 648 {
 649         struct bnxt *bp = (struct bnxt *)eth_dev->data->dev_private;
 650
 651         if (bp->dev_stopped == 0)
 652                 bnxt_dev_stop_op(eth_dev);
 653
 654         bnxt_free_mem(bp);
 655         if (eth_dev->data->mac_addrs != NULL) {
 656                 rte_free(eth_dev->data->mac_addrs);
 657                 eth_dev->data->mac_addrs = NULL;
 658         }
 659         if (bp->grp_info != NULL) {
 660                 rte_free(bp->grp_info);
 661                 bp->grp_info = NULL;
 662         }
 663 }
 664
 665 static void bnxt_mac_addr_remove_op(struct rte_eth_dev *eth_dev,
 666                                     uint32_t index)
 667 {
 668         struct bnxt *bp = (struct bnxt *)eth_dev->data->dev_private;
 669         uint64_t pool_mask = eth_dev->data->mac_pool_sel[index];
 670         struct bnxt_vnic_info *vnic;
 671         struct bnxt_filter_info *filter, *temp_filter;
 672         uint32_t pool = RTE_MIN(MAX_FF_POOLS, ETH_64_POOLS);
 673         uint32_t i;
 674
 675         /*
 676          * Loop through all VNICs from the specified filter flow pools to
 677          * remove the corresponding MAC addr filter
 678          */
 679         for (i = 0; i < pool; i++) {
 680                 if (!(pool_mask & (1ULL << i)))
 681                         continue;
 682
 683                 STAILQ_FOREACH(vnic, &bp->ff_pool[i], next) {
 684                         filter = STAILQ_FIRST(&vnic->filter);
 685                         while (filter) {
 686                                 temp_filter = STAILQ_NEXT(filter, next);
 687                                 if (filter->mac_index == index) {
 688                                         STAILQ_REMOVE(&vnic->filter, filter,
 689                                                       bnxt_filter_info, next);
 690                                         bnxt_hwrm_clear_l2_filter(bp, filter);
 691                                         filter->mac_index = INVALID_MAC_INDEX;
 692                                         memset(&filter->l2_addr, 0,
 693                                                ETHER_ADDR_LEN);
 694                                         STAILQ_INSERT_TAIL(
 695                                                         &bp->free_filter_list,
 696                                                         filter, next);
 697                                 }
 698                                 filter = temp_filter;
 699                         }
 700                 }
 701         }
 702 }
 703
 704 static int bnxt_mac_addr_add_op(struct rte_eth_dev *eth_dev,
 705                                 struct ether_addr *mac_addr,
 706                                 uint32_t index, uint32_t pool)
 707 {
 708         struct bnxt *bp = (struct bnxt *)eth_dev->data->dev_private;
 709         struct bnxt_vnic_info *vnic = STAILQ_FIRST(&bp->ff_pool[pool]);
 710         struct bnxt_filter_info *filter;
 711
 712         if (BNXT_VF(bp)) {
 713                 PMD_DRV_LOG(ERR, "Cannot add MAC address to a VF interface\n");
 714                 return -ENOTSUP;
 715         }
 716
 717         if (!vnic) {
 718                 PMD_DRV_LOG(ERR, "VNIC not found for pool %d!\n", pool);
 719                 return -EINVAL;
 720         }
 721         /* Attach requested MAC address to the new l2_filter */
 722         STAILQ_FOREACH(filter, &vnic->filter, next) {
 723                 if (filter->mac_index == index) {
 724                         PMD_DRV_LOG(ERR,
 725                                 "MAC addr already existed for pool %d\n", pool);
 726                         return 0;
 727                 }
 728         }
 729         filter = bnxt_alloc_filter(bp);
 730         if (!filter) {
 731                 PMD_DRV_LOG(ERR, "L2 filter alloc failed\n");
 732                 return -ENODEV;
 733         }
 734         STAILQ_INSERT_TAIL(&vnic->filter, filter, next);
 735         filter->mac_index = index;
 736         memcpy(filter->l2_addr, mac_addr, ETHER_ADDR_LEN);
 737         return bnxt_hwrm_set_l2_filter(bp, vnic->fw_vnic_id, filter);
 738 }
 739
 740 int bnxt_link_update_op(struct rte_eth_dev *eth_dev, int wait_to_complete)
 741 {
 742         int rc = 0;
 743         struct bnxt *bp = (struct bnxt *)eth_dev->data->dev_private;
 744         struct rte_eth_link new;
 745         unsigned int cnt = BNXT_LINK_WAIT_CNT;
 746
 747         memset(&new, 0, sizeof(new));
 748         do {
 749                 /* Retrieve link info from hardware */
 750                 rc = bnxt_get_hwrm_link_config(bp, &new);
 751                 if (rc) {
 752                         new.link_speed = ETH_LINK_SPEED_100M;
 753                         new.link_duplex = ETH_LINK_FULL_DUPLEX;
 754                         PMD_DRV_LOG(ERR,
 755                                 "Failed to retrieve link rc = 0x%x!\n", rc);
 756                         goto out;
 757                 }
 758                 rte_delay_ms(BNXT_LINK_WAIT_INTERVAL);
 759
 760                 if (!wait_to_complete)
 761                         break;
 762         } while (!new.link_status && cnt--);
 763
 764 out:
 765         /* Timed out or success */
 766         if (new.link_status != eth_dev->data->dev_link.link_status ||
 767         new.link_speed != eth_dev->data->dev_link.link_speed) {
 768                 memcpy(&eth_dev->data->dev_link, &new,
 769                         sizeof(struct rte_eth_link));
 770
 771                 _rte_eth_dev_callback_process(eth_dev,
 772                                               RTE_ETH_EVENT_INTR_LSC,
 773                                               NULL);
 774
 775                 bnxt_print_link_info(eth_dev);
 776         }
 777
 778         return rc;
 779 }
 780
 781 static void bnxt_promiscuous_enable_op(struct rte_eth_dev *eth_dev)
 782 {
 783         struct bnxt *bp = (struct bnxt *)eth_dev->data->dev_private;
 784         struct bnxt_vnic_info *vnic;
 785
 786         if (bp->vnic_info == NULL)
 787                 return;
 788
 789         vnic = &bp->vnic_info[0];
 790
 791         vnic->flags |= BNXT_VNIC_INFO_PROMISC;
 792         bnxt_hwrm_cfa_l2_set_rx_mask(bp, vnic, 0, NULL);
 793 }
 794
 795 static void bnxt_promiscuous_disable_op(struct rte_eth_dev *eth_dev)
 796 {
 797         struct bnxt *bp = (struct bnxt *)eth_dev->data->dev_private;
 798         struct bnxt_vnic_info *vnic;
 799
 800         if (bp->vnic_info == NULL)
 801                 return;
 802
 803         vnic = &bp->vnic_info[0];
 804
 805         vnic->flags &= ~BNXT_VNIC_INFO_PROMISC;
 806         bnxt_hwrm_cfa_l2_set_rx_mask(bp, vnic, 0, NULL);
 807 }
 808
 809 static void bnxt_allmulticast_enable_op(struct rte_eth_dev *eth_dev)
 810 {
 811         struct bnxt *bp = (struct bnxt *)eth_dev->data->dev_private;
 812         struct bnxt_vnic_info *vnic;
 813
 814         if (bp->vnic_info == NULL)
 815                 return;
 816
 817         vnic = &bp->vnic_info[0];
 818
 819         vnic->flags |= BNXT_VNIC_INFO_ALLMULTI;
 820         bnxt_hwrm_cfa_l2_set_rx_mask(bp, vnic, 0, NULL);
 821 }
 822
 823 static void bnxt_allmulticast_disable_op(struct rte_eth_dev *eth_dev)
 824 {
 825         struct bnxt *bp = (struct bnxt *)eth_dev->data->dev_private;
 826         struct bnxt_vnic_info *vnic;
 827
 828         if (bp->vnic_info == NULL)
 829                 return;
 830
 831         vnic = &bp->vnic_info[0];
 832
 833         vnic->flags &= ~BNXT_VNIC_INFO_ALLMULTI;
 834         bnxt_hwrm_cfa_l2_set_rx_mask(bp, vnic, 0, NULL);
 835 }
 836
 837 static int bnxt_reta_update_op(struct rte_eth_dev *eth_dev,
 838                             struct rte_eth_rss_reta_entry64 *reta_conf,
 839                             uint16_t reta_size)
 840 {
 841         struct bnxt *bp = (struct bnxt *)eth_dev->data->dev_private;
 842         struct rte_eth_conf *dev_conf = &bp->eth_dev->data->dev_conf;
 843         struct bnxt_vnic_info *vnic;
 844         int i;
 845
 846         if (!(dev_conf->rxmode.mq_mode & ETH_MQ_RX_RSS_FLAG))
 847                 return -EINVAL;
 848
 849         if (reta_size != HW_HASH_INDEX_SIZE) {
 850                 PMD_DRV_LOG(ERR, "The configured hash table lookup size "
 851                         "(%d) must equal the size supported by the hardware "
 852                         "(%d)\n", reta_size, HW_HASH_INDEX_SIZE);
 853                 return -EINVAL;
 854         }
 855         /* Update the RSS VNIC(s) */
 856         for (i = 0; i < MAX_FF_POOLS; i++) {
 857                 STAILQ_FOREACH(vnic, &bp->ff_pool[i], next) {
 858                         memcpy(vnic->rss_table, reta_conf, reta_size);
 859
 860                         bnxt_hwrm_vnic_rss_cfg(bp, vnic);
 861                 }
 862         }
 863         return 0;
 864 }
 865
 866 static int bnxt_reta_query_op(struct rte_eth_dev *eth_dev,
 867                               struct rte_eth_rss_reta_entry64 *reta_conf,
 868                               uint16_t reta_size)
 869 {
 870         struct bnxt *bp = (struct bnxt *)eth_dev->data->dev_private;
 871         struct bnxt_vnic_info *vnic = &bp->vnic_info[0];
 872         struct rte_intr_handle *intr_handle
 873                 = &bp->pdev->intr_handle;
 874
 875         /* Retrieve from the default VNIC */
 876         if (!vnic)
 877                 return -EINVAL;
 878         if (!vnic->rss_table)
 879                 return -EINVAL;
 880
 881         if (reta_size != HW_HASH_INDEX_SIZE) {
 882                 PMD_DRV_LOG(ERR, "The configured hash table lookup size "
 883                         "(%d) must equal the size supported by the hardware "
 884                         "(%d)\n", reta_size, HW_HASH_INDEX_SIZE);
 885                 return -EINVAL;
 886         }
 887         /* EW - need to revisit here copying from uint64_t to uint16_t */
 888         memcpy(reta_conf, vnic->rss_table, reta_size);
 889
 890         if (rte_intr_allow_others(intr_handle)) {
 891                 if (eth_dev->data->dev_conf.intr_conf.lsc != 0)
 892                         bnxt_dev_lsc_intr_setup(eth_dev);
 893         }
 894
 895         return 0;
 896 }
 897
 898 static int bnxt_rss_hash_update_op(struct rte_eth_dev *eth_dev,
 899                                    struct rte_eth_rss_conf *rss_conf)
 900 {
 901         struct bnxt *bp = (struct bnxt *)eth_dev->data->dev_private;
 902         struct rte_eth_conf *dev_conf = &bp->eth_dev->data->dev_conf;
 903         struct bnxt_vnic_info *vnic;
 904         uint16_t hash_type = 0;
 905         int i;
 906
 907         /*
 908          * If RSS enablement were different than dev_configure,
 909          * then return -EINVAL
 910          */
 911         if (dev_conf->rxmode.mq_mode & ETH_MQ_RX_RSS_FLAG) {
 912                 if (!rss_conf->rss_hf)
 913                         PMD_DRV_LOG(ERR, "Hash type NONE\n");
 914         } else {
 915                 if (rss_conf->rss_hf & BNXT_ETH_RSS_SUPPORT)
 916                         return -EINVAL;
 917         }
 918
 919         bp->flags |= BNXT_FLAG_UPDATE_HASH;
 920         memcpy(&bp->rss_conf, rss_conf, sizeof(*rss_conf));
 921
 922         if (rss_conf->rss_hf & ETH_RSS_IPV4)
 923                 hash_type |= HWRM_VNIC_RSS_CFG_INPUT_HASH_TYPE_IPV4;
 924         if (rss_conf->rss_hf & ETH_RSS_NONFRAG_IPV4_TCP)
 925                 hash_type |= HWRM_VNIC_RSS_CFG_INPUT_HASH_TYPE_TCP_IPV4;
 926         if (rss_conf->rss_hf & ETH_RSS_NONFRAG_IPV4_UDP)
 927                 hash_type |= HWRM_VNIC_RSS_CFG_INPUT_HASH_TYPE_UDP_IPV4;
 928         if (rss_conf->rss_hf & ETH_RSS_IPV6)
 929                 hash_type |= HWRM_VNIC_RSS_CFG_INPUT_HASH_TYPE_IPV6;
 930         if (rss_conf->rss_hf & ETH_RSS_NONFRAG_IPV6_TCP)
 931                 hash_type |= HWRM_VNIC_RSS_CFG_INPUT_HASH_TYPE_TCP_IPV6;
 932         if (rss_conf->rss_hf & ETH_RSS_NONFRAG_IPV6_UDP)
 933                 hash_type |= HWRM_VNIC_RSS_CFG_INPUT_HASH_TYPE_UDP_IPV6;
 934
 935         /* Update the RSS VNIC(s) */
 936         for (i = 0; i < MAX_FF_POOLS; i++) {
 937                 STAILQ_FOREACH(vnic, &bp->ff_pool[i], next) {
 938                         vnic->hash_type = hash_type;
 939
 940                         /*
 941                          * Use the supplied key if the key length is
 942                          * acceptable and the rss_key is not NULL
 943                          */
 944                         if (rss_conf->rss_key &&
 945                             rss_conf->rss_key_len <= HW_HASH_KEY_SIZE)
 946                                 memcpy(vnic->rss_hash_key, rss_conf->rss_key,
 947                                        rss_conf->rss_key_len);
 948
 949                         bnxt_hwrm_vnic_rss_cfg(bp, vnic);
 950                 }
 951         }
 952         return 0;
 953 }
 954
 955 static int bnxt_rss_hash_conf_get_op(struct rte_eth_dev *eth_dev,
 956                                      struct rte_eth_rss_conf *rss_conf)
 957 {
 958         struct bnxt *bp = (struct bnxt *)eth_dev->data->dev_private;
 959         struct bnxt_vnic_info *vnic = &bp->vnic_info[0];
 960         int len;
 961         uint32_t hash_types;
 962
 963         /* RSS configuration is the same for all VNICs */
 964         if (vnic && vnic->rss_hash_key) {
 965                 if (rss_conf->rss_key) {
 966                         len = rss_conf->rss_key_len <= HW_HASH_KEY_SIZE ?
 967                               rss_conf->rss_key_len : HW_HASH_KEY_SIZE;
 968                         memcpy(rss_conf->rss_key, vnic->rss_hash_key, len);
 969                 }
 970
 971                 hash_types = vnic->hash_type;
 972                 rss_conf->rss_hf = 0;
 973                 if (hash_types & HWRM_VNIC_RSS_CFG_INPUT_HASH_TYPE_IPV4) {
 974                         rss_conf->rss_hf |= ETH_RSS_IPV4;
 975                         hash_types &= ~HWRM_VNIC_RSS_CFG_INPUT_HASH_TYPE_IPV4;
 976                 }
 977                 if (hash_types & HWRM_VNIC_RSS_CFG_INPUT_HASH_TYPE_TCP_IPV4) {
 978                         rss_conf->rss_hf |= ETH_RSS_NONFRAG_IPV4_TCP;
 979                         hash_types &=
 980                                 ~HWRM_VNIC_RSS_CFG_INPUT_HASH_TYPE_TCP_IPV4;
 981                 }
 982                 if (hash_types & HWRM_VNIC_RSS_CFG_INPUT_HASH_TYPE_UDP_IPV4) {
 983                         rss_conf->rss_hf |= ETH_RSS_NONFRAG_IPV4_UDP;
 984                         hash_types &=
 985                                 ~HWRM_VNIC_RSS_CFG_INPUT_HASH_TYPE_UDP_IPV4;
 986                 }
 987                 if (hash_types & HWRM_VNIC_RSS_CFG_INPUT_HASH_TYPE_IPV6) {
 988                         rss_conf->rss_hf |= ETH_RSS_IPV6;
 989                         hash_types &= ~HWRM_VNIC_RSS_CFG_INPUT_HASH_TYPE_IPV6;
 990                 }
 991                 if (hash_types & HWRM_VNIC_RSS_CFG_INPUT_HASH_TYPE_TCP_IPV6) {
 992                         rss_conf->rss_hf |= ETH_RSS_NONFRAG_IPV6_TCP;
 993                         hash_types &=
 994                                 ~HWRM_VNIC_RSS_CFG_INPUT_HASH_TYPE_TCP_IPV6;
 995                 }
 996                 if (hash_types & HWRM_VNIC_RSS_CFG_INPUT_HASH_TYPE_UDP_IPV6) {
 997                         rss_conf->rss_hf |= ETH_RSS_NONFRAG_IPV6_UDP;
 998                         hash_types &=
 999                                 ~HWRM_VNIC_RSS_CFG_INPUT_HASH_TYPE_UDP_IPV6;
1000                 }
1001                 if (hash_types) {
1002                         PMD_DRV_LOG(ERR,
1003                                 "Unknwon RSS config from firmware (%08x), RSS disabled",
1004                                 vnic->hash_type);
1005                         return -ENOTSUP;
1006                 }
1007         } else {
1008                 rss_conf->rss_hf = 0;
1009         }
1010         return 0;
1011 }
1012
1013 static int bnxt_flow_ctrl_get_op(struct rte_eth_dev *dev,
1014                                struct rte_eth_fc_conf *fc_conf)
1015 {
1016         struct bnxt *bp = (struct bnxt *)dev->data->dev_private;
1017         struct rte_eth_link link_info;
1018         int rc;
1019
1020         rc = bnxt_get_hwrm_link_config(bp, &link_info);
1021         if (rc)
1022                 return rc;
1023
1024         memset(fc_conf, 0, sizeof(*fc_conf));
1025         if (bp->link_info.auto_pause)
1026                 fc_conf->autoneg = 1;
1027         switch (bp->link_info.pause) {
1028         case 0:
1029                 fc_conf->mode = RTE_FC_NONE;
1030                 break;
1031         case HWRM_PORT_PHY_QCFG_OUTPUT_PAUSE_TX:
1032                 fc_conf->mode = RTE_FC_TX_PAUSE;
1033                 break;
1034         case HWRM_PORT_PHY_QCFG_OUTPUT_PAUSE_RX:
1035                 fc_conf->mode = RTE_FC_RX_PAUSE;
1036                 break;
1037         case (HWRM_PORT_PHY_QCFG_OUTPUT_PAUSE_TX |
1038                         HWRM_PORT_PHY_QCFG_OUTPUT_PAUSE_RX):
1039                 fc_conf->mode = RTE_FC_FULL;
1040                 break;
1041         }
1042         return 0;
1043 }
1044
1045 static int bnxt_flow_ctrl_set_op(struct rte_eth_dev *dev,
1046                                struct rte_eth_fc_conf *fc_conf)
1047 {
1048         struct bnxt *bp = (struct bnxt *)dev->data->dev_private;
1049
1050         if (!BNXT_SINGLE_PF(bp) || BNXT_VF(bp)) {
1051                 PMD_DRV_LOG(ERR, "Flow Control Settings cannot be modified\n");
1052                 return -ENOTSUP;
1053         }
1054
1055         switch (fc_conf->mode) {
1056         case RTE_FC_NONE:
1057                 bp->link_info.auto_pause = 0;
1058                 bp->link_info.force_pause = 0;
1059                 break;
1060         case RTE_FC_RX_PAUSE:
1061                 if (fc_conf->autoneg) {
1062                         bp->link_info.auto_pause =
1063                                         HWRM_PORT_PHY_CFG_INPUT_AUTO_PAUSE_RX;
1064                         bp->link_info.force_pause = 0;
1065                 } else {
1066                         bp->link_info.auto_pause = 0;
1067                         bp->link_info.force_pause =
1068                                         HWRM_PORT_PHY_CFG_INPUT_FORCE_PAUSE_RX;
1069                 }
1070                 break;
1071         case RTE_FC_TX_PAUSE:
1072                 if (fc_conf->autoneg) {
1073                         bp->link_info.auto_pause =
1074                                         HWRM_PORT_PHY_CFG_INPUT_AUTO_PAUSE_TX;
1075                         bp->link_info.force_pause = 0;
1076                 } else {
1077                         bp->link_info.auto_pause = 0;
1078                         bp->link_info.force_pause =
1079                                         HWRM_PORT_PHY_CFG_INPUT_FORCE_PAUSE_TX;
1080                 }
1081                 break;
1082         case RTE_FC_FULL:
1083                 if (fc_conf->autoneg) {
1084                         bp->link_info.auto_pause =
1085                                         HWRM_PORT_PHY_CFG_INPUT_AUTO_PAUSE_TX |
1086                                         HWRM_PORT_PHY_CFG_INPUT_AUTO_PAUSE_RX;
1087                         bp->link_info.force_pause = 0;
1088                 } else {
1089                         bp->link_info.auto_pause = 0;
1090                         bp->link_info.force_pause =
1091                                         HWRM_PORT_PHY_CFG_INPUT_FORCE_PAUSE_TX |
1092                                         HWRM_PORT_PHY_CFG_INPUT_FORCE_PAUSE_RX;
1093                 }
1094                 break;
1095         }
1096         return bnxt_set_hwrm_link_config(bp, true);
1097 }
1098
1099 /* Add UDP tunneling port */
1100 static int
1101 bnxt_udp_tunnel_port_add_op(struct rte_eth_dev *eth_dev,
1102                          struct rte_eth_udp_tunnel *udp_tunnel)
1103 {
1104         struct bnxt *bp = (struct bnxt *)eth_dev->data->dev_private;
1105         uint16_t tunnel_type = 0;
1106         int rc = 0;
1107
1108         switch (udp_tunnel->prot_type) {
1109         case RTE_TUNNEL_TYPE_VXLAN:
1110                 if (bp->vxlan_port_cnt) {
1111                         PMD_DRV_LOG(ERR, "Tunnel Port %d already programmed\n",
1112                                 udp_tunnel->udp_port);
1113                         if (bp->vxlan_port != udp_tunnel->udp_port) {
1114                                 PMD_DRV_LOG(ERR, "Only one port allowed\n");
1115                                 return -ENOSPC;
1116                         }
1117                         bp->vxlan_port_cnt++;
1118                         return 0;
1119                 }
1120                 tunnel_type =
1121                         HWRM_TUNNEL_DST_PORT_ALLOC_INPUT_TUNNEL_TYPE_VXLAN;
1122                 bp->vxlan_port_cnt++;
1123                 break;
1124         case RTE_TUNNEL_TYPE_GENEVE:
1125                 if (bp->geneve_port_cnt) {
1126                         PMD_DRV_LOG(ERR, "Tunnel Port %d already programmed\n",
1127                                 udp_tunnel->udp_port);
1128                         if (bp->geneve_port != udp_tunnel->udp_port) {
1129                                 PMD_DRV_LOG(ERR, "Only one port allowed\n");
1130                                 return -ENOSPC;
1131                         }
1132                         bp->geneve_port_cnt++;
1133                         return 0;
1134                 }
1135                 tunnel_type =
1136                         HWRM_TUNNEL_DST_PORT_ALLOC_INPUT_TUNNEL_TYPE_GENEVE;
1137                 bp->geneve_port_cnt++;
1138                 break;
1139         default:
1140                 PMD_DRV_LOG(ERR, "Tunnel type is not supported\n");
1141                 return -ENOTSUP;
1142         }
1143         rc = bnxt_hwrm_tunnel_dst_port_alloc(bp, udp_tunnel->udp_port,
1144                                              tunnel_type);
1145         return rc;
1146 }
1147
1148 static int
1149 bnxt_udp_tunnel_port_del_op(struct rte_eth_dev *eth_dev,
1150                          struct rte_eth_udp_tunnel *udp_tunnel)
1151 {
1152         struct bnxt *bp = (struct bnxt *)eth_dev->data->dev_private;
1153         uint16_t tunnel_type = 0;
1154         uint16_t port = 0;
1155         int rc = 0;
1156
1157         switch (udp_tunnel->prot_type) {
1158         case RTE_TUNNEL_TYPE_VXLAN:
1159                 if (!bp->vxlan_port_cnt) {
1160                         PMD_DRV_LOG(ERR, "No Tunnel port configured yet\n");
1161                         return -EINVAL;
1162                 }
1163                 if (bp->vxlan_port != udp_tunnel->udp_port) {
1164                         PMD_DRV_LOG(ERR, "Req Port: %d. Configured port: %d\n",
1165                                 udp_tunnel->udp_port, bp->vxlan_port);
1166                         return -EINVAL;
1167                 }
1168                 if (--bp->vxlan_port_cnt)
1169                         return 0;
1170
1171                 tunnel_type =
1172                         HWRM_TUNNEL_DST_PORT_FREE_INPUT_TUNNEL_TYPE_VXLAN;
1173                 port = bp->vxlan_fw_dst_port_id;
1174                 break;
1175         case RTE_TUNNEL_TYPE_GENEVE:
1176                 if (!bp->geneve_port_cnt) {
1177                         PMD_DRV_LOG(ERR, "No Tunnel port configured yet\n");
1178                         return -EINVAL;
1179                 }
1180                 if (bp->geneve_port != udp_tunnel->udp_port) {
1181                         PMD_DRV_LOG(ERR, "Req Port: %d. Configured port: %d\n",
1182                                 udp_tunnel->udp_port, bp->geneve_port);
1183                         return -EINVAL;
1184                 }
1185                 if (--bp->geneve_port_cnt)
1186                         return 0;
1187
1188                 tunnel_type =
1189                         HWRM_TUNNEL_DST_PORT_FREE_INPUT_TUNNEL_TYPE_GENEVE;
1190                 port = bp->geneve_fw_dst_port_id;
1191                 break;
1192         default:
1193                 PMD_DRV_LOG(ERR, "Tunnel type is not supported\n");
1194                 return -ENOTSUP;
1195         }
1196
1197         rc = bnxt_hwrm_tunnel_dst_port_free(bp, port, tunnel_type);
1198         if (!rc) {
1199                 if (tunnel_type ==
1200                     HWRM_TUNNEL_DST_PORT_FREE_INPUT_TUNNEL_TYPE_VXLAN)
1201                         bp->vxlan_port = 0;
1202                 if (tunnel_type ==
1203                     HWRM_TUNNEL_DST_PORT_FREE_INPUT_TUNNEL_TYPE_GENEVE)
1204                         bp->geneve_port = 0;
1205         }
1206         return rc;
1207 }
1208
1209 static int bnxt_del_vlan_filter(struct bnxt *bp, uint16_t vlan_id)
1210 {
1211         struct bnxt_filter_info *filter, *temp_filter, *new_filter;
1212         struct bnxt_vnic_info *vnic;
1213         unsigned int i;
1214         int rc = 0;
1215         uint32_t chk = HWRM_CFA_L2_FILTER_ALLOC_INPUT_ENABLES_L2_OVLAN;
1216
1217         /* Cycle through all VNICs */
1218         for (i = 0; i < bp->nr_vnics; i++) {
1219                 /*
1220                  * For each VNIC and each associated filter(s)
1221                  * if VLAN exists && VLAN matches vlan_id
1222                  *      remove the MAC+VLAN filter
1223                  *      add a new MAC only filter
1224                  * else
1225                  *      VLAN filter doesn't exist, just skip and continue
1226                  */
1227                 STAILQ_FOREACH(vnic, &bp->ff_pool[i], next) {
1228                         filter = STAILQ_FIRST(&vnic->filter);
1229                         while (filter) {
1230                                 temp_filter = STAILQ_NEXT(filter, next);
1231
1232                                 if (filter->enables & chk &&
1233                                     filter->l2_ovlan == vlan_id) {
1234                                         /* Must delete the filter */
1235                                         STAILQ_REMOVE(&vnic->filter, filter,
1236                                                       bnxt_filter_info, next);
1237                                         bnxt_hwrm_clear_l2_filter(bp, filter);
1238                                         STAILQ_INSERT_TAIL(
1239                                                         &bp->free_filter_list,
1240                                                         filter, next);
1241
1242                                         /*
1243                                          * Need to examine to see if the MAC
1244                                          * filter already existed or not before
1245                                          * allocating a new one
1246                                          */
1247
1248                                         new_filter = bnxt_alloc_filter(bp);
1249                                         if (!new_filter) {
1250                                                 PMD_DRV_LOG(ERR,
1251                                                         "MAC/VLAN filter alloc failed\n");
1252                                                 rc = -ENOMEM;
1253                                                 goto exit;
1254                                         }
1255                                         STAILQ_INSERT_TAIL(&vnic->filter,
1256                                                            new_filter, next);
1257                                         /* Inherit MAC from previous filter */
1258                                         new_filter->mac_index =
1259                                                         filter->mac_index;
1260                                         memcpy(new_filter->l2_addr,
1261                                                filter->l2_addr, ETHER_ADDR_LEN);
1262                                         /* MAC only filter */
1263                                         rc = bnxt_hwrm_set_l2_filter(bp,
1264                                                         vnic->fw_vnic_id,
1265                                                         new_filter);
1266                                         if (rc)
1267                                                 goto exit;
1268                                         PMD_DRV_LOG(INFO,
1269                                                 "Del Vlan filter for %d\n",
1270                                                 vlan_id);
1271                                 }
1272                                 filter = temp_filter;
1273                         }
1274                 }
1275         }
1276 exit:
1277         return rc;
1278 }
1279
1280 static int bnxt_add_vlan_filter(struct bnxt *bp, uint16_t vlan_id)
1281 {
1282         struct bnxt_filter_info *filter, *temp_filter, *new_filter;
1283         struct bnxt_vnic_info *vnic;
1284         unsigned int i;
1285         int rc = 0;
1286         uint32_t en = HWRM_CFA_L2_FILTER_ALLOC_INPUT_ENABLES_L2_OVLAN |
1287                 HWRM_CFA_L2_FILTER_ALLOC_INPUT_ENABLES_L2_OVLAN_MASK;
1288         uint32_t chk = HWRM_CFA_L2_FILTER_ALLOC_INPUT_ENABLES_L2_OVLAN;
1289
1290         /* Cycle through all VNICs */
1291         for (i = 0; i < bp->nr_vnics; i++) {
1292                 /*
1293                  * For each VNIC and each associated filter(s)
1294                  * if VLAN exists:
1295                  *   if VLAN matches vlan_id
1296                  *      VLAN filter already exists, just skip and continue
1297                  *   else
1298                  *      add a new MAC+VLAN filter
1299                  * else
1300                  *   Remove the old MAC only filter
1301                  *    Add a new MAC+VLAN filter
1302                  */
1303                 STAILQ_FOREACH(vnic, &bp->ff_pool[i], next) {
1304                         filter = STAILQ_FIRST(&vnic->filter);
1305                         while (filter) {
1306                                 temp_filter = STAILQ_NEXT(filter, next);
1307
1308                                 if (filter->enables & chk) {
1309                                         if (filter->l2_ovlan == vlan_id)
1310                                                 goto cont;
1311                                 } else {
1312                                         /* Must delete the MAC filter */
1313                                         STAILQ_REMOVE(&vnic->filter, filter,
1314                                                       bnxt_filter_info, next);
1315                                         bnxt_hwrm_clear_l2_filter(bp, filter);
1316                                         filter->l2_ovlan = 0;
1317                                         STAILQ_INSERT_TAIL(
1318                                                         &bp->free_filter_list,
1319                                                         filter, next);
1320                                 }
1321                                 new_filter = bnxt_alloc_filter(bp);
1322                                 if (!new_filter) {
1323                                         PMD_DRV_LOG(ERR,
1324                                                 "MAC/VLAN filter alloc failed\n");
1325                                         rc = -ENOMEM;
1326                                         goto exit;
1327                                 }
1328                                 STAILQ_INSERT_TAIL(&vnic->filter, new_filter,
1329                                                    next);
1330                                 /* Inherit MAC from the previous filter */
1331                                 new_filter->mac_index = filter->mac_index;
1332                                 memcpy(new_filter->l2_addr, filter->l2_addr,
1333                                        ETHER_ADDR_LEN);
1334                                 /* MAC + VLAN ID filter */
1335                                 new_filter->l2_ovlan = vlan_id;
1336                                 new_filter->l2_ovlan_mask = 0xF000;
1337                                 new_filter->enables |= en;
1338                                 rc = bnxt_hwrm_set_l2_filter(bp,
1339                                                              vnic->fw_vnic_id,
1340                                                              new_filter);
1341                                 if (rc)
1342                                         goto exit;
1343                                 PMD_DRV_LOG(INFO,
1344                                         "Added Vlan filter for %d\n", vlan_id);
1345 cont:
1346                                 filter = temp_filter;
1347                         }
1348                 }
1349         }
1350 exit:
1351         return rc;
1352 }
1353
1354 static int bnxt_vlan_filter_set_op(struct rte_eth_dev *eth_dev,
1355                                    uint16_t vlan_id, int on)
1356 {
1357         struct bnxt *bp = (struct bnxt *)eth_dev->data->dev_private;
1358
1359         /* These operations apply to ALL existing MAC/VLAN filters */
1360         if (on)
1361                 return bnxt_add_vlan_filter(bp, vlan_id);
1362         else
1363                 return bnxt_del_vlan_filter(bp, vlan_id);
1364 }
1365
1366 static int
1367 bnxt_vlan_offload_set_op(struct rte_eth_dev *dev, int mask)
1368 {
1369         struct bnxt *bp = (struct bnxt *)dev->data->dev_private;
1370         uint64_t rx_offloads = dev->data->dev_conf.rxmode.offloads;
1371         unsigned int i;
1372
1373         if (mask & ETH_VLAN_FILTER_MASK) {
1374                 if (!(rx_offloads & DEV_RX_OFFLOAD_VLAN_FILTER)) {
1375                         /* Remove any VLAN filters programmed */
1376                         for (i = 0; i < 4095; i++)
1377                                 bnxt_del_vlan_filter(bp, i);
1378                 }
1379                 PMD_DRV_LOG(DEBUG, "VLAN Filtering: %d\n",
1380                         !!(rx_offloads & DEV_RX_OFFLOAD_VLAN_FILTER));
1381         }
1382
1383         if (mask & ETH_VLAN_STRIP_MASK) {
1384                 /* Enable or disable VLAN stripping */
1385                 for (i = 0; i < bp->nr_vnics; i++) {
1386                         struct bnxt_vnic_info *vnic = &bp->vnic_info[i];
1387                         if (rx_offloads & DEV_RX_OFFLOAD_VLAN_STRIP)
1388                                 vnic->vlan_strip = true;
1389                         else
1390                                 vnic->vlan_strip = false;
1391                         bnxt_hwrm_vnic_cfg(bp, vnic);
1392                 }
1393                 PMD_DRV_LOG(DEBUG, "VLAN Strip Offload: %d\n",
1394                         !!(rx_offloads & DEV_RX_OFFLOAD_VLAN_STRIP));
1395         }
1396
1397         if (mask & ETH_VLAN_EXTEND_MASK)
1398                 PMD_DRV_LOG(ERR, "Extend VLAN Not supported\n");
1399
1400         return 0;
1401 }
1402
1403 static int
1404 bnxt_set_default_mac_addr_op(struct rte_eth_dev *dev, struct ether_addr *addr)
1405 {
1406         struct bnxt *bp = (struct bnxt *)dev->data->dev_private;
1407         /* Default Filter is tied to VNIC 0 */
1408         struct bnxt_vnic_info *vnic = &bp->vnic_info[0];
1409         struct bnxt_filter_info *filter;
1410         int rc;
1411
1412         if (BNXT_VF(bp))
1413                 return -EPERM;
1414
1415         memcpy(bp->mac_addr, addr, sizeof(bp->mac_addr));
1416
1417         STAILQ_FOREACH(filter, &vnic->filter, next) {
1418                 /* Default Filter is at Index 0 */
1419                 if (filter->mac_index != 0)
1420                         continue;
1421                 rc = bnxt_hwrm_clear_l2_filter(bp, filter);
1422                 if (rc)
1423                         return rc;
1424                 memcpy(filter->l2_addr, bp->mac_addr, ETHER_ADDR_LEN);
1425                 memset(filter->l2_addr_mask, 0xff, ETHER_ADDR_LEN);
1426                 filter->flags |= HWRM_CFA_L2_FILTER_ALLOC_INPUT_FLAGS_PATH_RX;
1427                 filter->enables |=
1428                         HWRM_CFA_L2_FILTER_ALLOC_INPUT_ENABLES_L2_ADDR |
1429                         HWRM_CFA_L2_FILTER_ALLOC_INPUT_ENABLES_L2_ADDR_MASK;
1430                 rc = bnxt_hwrm_set_l2_filter(bp, vnic->fw_vnic_id, filter);
1431                 if (rc)
1432                         return rc;
1433                 filter->mac_index = 0;
1434                 PMD_DRV_LOG(DEBUG, "Set MAC addr\n");
1435         }
1436
1437         return 0;
1438 }
1439
1440 static int
1441 bnxt_dev_set_mc_addr_list_op(struct rte_eth_dev *eth_dev,
1442                           struct ether_addr *mc_addr_set,
1443                           uint32_t nb_mc_addr)
1444 {
1445         struct bnxt *bp = (struct bnxt *)eth_dev->data->dev_private;
1446         char *mc_addr_list = (char *)mc_addr_set;
1447         struct bnxt_vnic_info *vnic;
1448         uint32_t off = 0, i = 0;
1449
1450         vnic = &bp->vnic_info[0];
1451
1452         if (nb_mc_addr > BNXT_MAX_MC_ADDRS) {
1453                 vnic->flags |= BNXT_VNIC_INFO_ALLMULTI;
1454                 goto allmulti;
1455         }
1456
1457         /* TODO Check for Duplicate mcast addresses */
1458         vnic->flags &= ~BNXT_VNIC_INFO_ALLMULTI;
1459         for (i = 0; i < nb_mc_addr; i++) {
1460                 memcpy(vnic->mc_list + off, &mc_addr_list[i], ETHER_ADDR_LEN);
1461                 off += ETHER_ADDR_LEN;
1462         }
1463
1464         vnic->mc_addr_cnt = i;
1465
1466 allmulti:
1467         return bnxt_hwrm_cfa_l2_set_rx_mask(bp, vnic, 0, NULL);
1468 }
1469
1470 static int
1471 bnxt_fw_version_get(struct rte_eth_dev *dev, char *fw_version, size_t fw_size)
1472 {
1473         struct bnxt *bp = (struct bnxt *)dev->data->dev_private;
1474         uint8_t fw_major = (bp->fw_ver >> 24) & 0xff;
1475         uint8_t fw_minor = (bp->fw_ver >> 16) & 0xff;
1476         uint8_t fw_updt = (bp->fw_ver >> 8) & 0xff;
1477         int ret;
1478
1479         ret = snprintf(fw_version, fw_size, "%d.%d.%d",
1480                         fw_major, fw_minor, fw_updt);
1481
1482         ret += 1; /* add the size of '\0' */
1483         if (fw_size < (uint32_t)ret)
1484                 return ret;
1485         else
1486                 return 0;
1487 }
1488
1489 static void
1490 bnxt_rxq_info_get_op(struct rte_eth_dev *dev, uint16_t queue_id,
1491         struct rte_eth_rxq_info *qinfo)
1492 {
1493         struct bnxt_rx_queue *rxq;
1494
1495         rxq = dev->data->rx_queues[queue_id];
1496
1497         qinfo->mp = rxq->mb_pool;
1498         qinfo->scattered_rx = dev->data->scattered_rx;
1499         qinfo->nb_desc = rxq->nb_rx_desc;
1500
1501         qinfo->conf.rx_free_thresh = rxq->rx_free_thresh;
1502         qinfo->conf.rx_drop_en = 0;
1503         qinfo->conf.rx_deferred_start = 0;
1504 }
1505
1506 static void
1507 bnxt_txq_info_get_op(struct rte_eth_dev *dev, uint16_t queue_id,
1508         struct rte_eth_txq_info *qinfo)
1509 {
1510         struct bnxt_tx_queue *txq;
1511
1512         txq = dev->data->tx_queues[queue_id];
1513
1514         qinfo->nb_desc = txq->nb_tx_desc;
1515
1516         qinfo->conf.tx_thresh.pthresh = txq->pthresh;
1517         qinfo->conf.tx_thresh.hthresh = txq->hthresh;
1518         qinfo->conf.tx_thresh.wthresh = txq->wthresh;
1519
1520         qinfo->conf.tx_free_thresh = txq->tx_free_thresh;
1521         qinfo->conf.tx_rs_thresh = 0;
1522         qinfo->conf.tx_deferred_start = txq->tx_deferred_start;
1523 }
1524
1525 static int bnxt_mtu_set_op(struct rte_eth_dev *eth_dev, uint16_t new_mtu)
1526 {
1527         struct bnxt *bp = eth_dev->data->dev_private;
1528         struct rte_eth_dev_info dev_info;
1529         uint32_t max_dev_mtu;
1530         uint32_t rc = 0;
1531         uint32_t i;
1532
1533         bnxt_dev_info_get_op(eth_dev, &dev_info);
1534         max_dev_mtu = dev_info.max_rx_pktlen -
1535                       ETHER_HDR_LEN - ETHER_CRC_LEN - VLAN_TAG_SIZE * 2;
1536
1537         if (new_mtu < ETHER_MIN_MTU || new_mtu > max_dev_mtu) {
1538                 PMD_DRV_LOG(ERR, "MTU requested must be within (%d, %d)\n",
1539                         ETHER_MIN_MTU, max_dev_mtu);
1540                 return -EINVAL;
1541         }
1542
1543
1544         if (new_mtu > ETHER_MTU) {
1545                 bp->flags |= BNXT_FLAG_JUMBO;
1546                 bp->eth_dev->data->dev_conf.rxmode.offloads |=
1547                         DEV_RX_OFFLOAD_JUMBO_FRAME;
1548         } else {
1549                 bp->eth_dev->data->dev_conf.rxmode.offloads &=
1550                         ~DEV_RX_OFFLOAD_JUMBO_FRAME;
1551                 bp->flags &= ~BNXT_FLAG_JUMBO;
1552         }
1553
1554         eth_dev->data->dev_conf.rxmode.max_rx_pkt_len =
1555                 new_mtu + ETHER_HDR_LEN + ETHER_CRC_LEN + VLAN_TAG_SIZE * 2;
1556
1557         eth_dev->data->mtu = new_mtu;
1558         PMD_DRV_LOG(INFO, "New MTU is %d\n", eth_dev->data->mtu);
1559
1560         for (i = 0; i < bp->nr_vnics; i++) {
1561                 struct bnxt_vnic_info *vnic = &bp->vnic_info[i];
1562
1563                 vnic->mru = bp->eth_dev->data->mtu + ETHER_HDR_LEN +
1564                                         ETHER_CRC_LEN + VLAN_TAG_SIZE * 2;
1565                 rc = bnxt_hwrm_vnic_cfg(bp, vnic);
1566                 if (rc)
1567                         break;
1568
1569                 rc = bnxt_hwrm_vnic_plcmode_cfg(bp, vnic);
1570                 if (rc)
1571                         return rc;
1572         }
1573
1574         return rc;
1575 }
1576
1577 static int
1578 bnxt_vlan_pvid_set_op(struct rte_eth_dev *dev, uint16_t pvid, int on)
1579 {
1580         struct bnxt *bp = (struct bnxt *)dev->data->dev_private;
1581         uint16_t vlan = bp->vlan;
1582         int rc;
1583
1584         if (!BNXT_SINGLE_PF(bp) || BNXT_VF(bp)) {
1585                 PMD_DRV_LOG(ERR,
1586                         "PVID cannot be modified for this function\n");
1587                 return -ENOTSUP;
1588         }
1589         bp->vlan = on ? pvid : 0;
1590
1591         rc = bnxt_hwrm_set_default_vlan(bp, 0, 0);
1592         if (rc)
1593                 bp->vlan = vlan;
1594         return rc;
1595 }
1596
1597 static int
1598 bnxt_dev_led_on_op(struct rte_eth_dev *dev)
1599 {
1600         struct bnxt *bp = (struct bnxt *)dev->data->dev_private;
1601
1602         return bnxt_hwrm_port_led_cfg(bp, true);
1603 }
1604
1605 static int
1606 bnxt_dev_led_off_op(struct rte_eth_dev *dev)
1607 {
1608         struct bnxt *bp = (struct bnxt *)dev->data->dev_private;
1609
1610         return bnxt_hwrm_port_led_cfg(bp, false);
1611 }
1612
1613 static uint32_t
1614 bnxt_rx_queue_count_op(struct rte_eth_dev *dev, uint16_t rx_queue_id)
1615 {
1616         uint32_t desc = 0, raw_cons = 0, cons;
1617         struct bnxt_cp_ring_info *cpr;
1618         struct bnxt_rx_queue *rxq;
1619         struct rx_pkt_cmpl *rxcmp;
1620         uint16_t cmp_type;
1621         uint8_t cmp = 1;
1622         bool valid;
1623
1624         rxq = dev->data->rx_queues[rx_queue_id];
1625         cpr = rxq->cp_ring;
1626         valid = cpr->valid;
1627
1628         while (raw_cons < rxq->nb_rx_desc) {
1629                 cons = RING_CMP(cpr->cp_ring_struct, raw_cons);
1630                 rxcmp = (struct rx_pkt_cmpl *)&cpr->cp_desc_ring[cons];
1631
1632                 if (!CMPL_VALID(rxcmp, valid))
1633                         goto nothing_to_do;
1634                 valid = FLIP_VALID(cons, cpr->cp_ring_struct->ring_mask, valid);
1635                 cmp_type = CMP_TYPE(rxcmp);
1636                 if (cmp_type == RX_TPA_END_CMPL_TYPE_RX_TPA_END) {
1637                         cmp = (rte_le_to_cpu_32(
1638                                         ((struct rx_tpa_end_cmpl *)
1639                                          (rxcmp))->agg_bufs_v1) &
1640                                RX_TPA_END_CMPL_AGG_BUFS_MASK) >>
1641                                 RX_TPA_END_CMPL_AGG_BUFS_SFT;
1642                         desc++;
1643                 } else if (cmp_type == 0x11) {
1644                         desc++;
1645                         cmp = (rxcmp->agg_bufs_v1 &
1646                                    RX_PKT_CMPL_AGG_BUFS_MASK) >>
1647                                 RX_PKT_CMPL_AGG_BUFS_SFT;
1648                 } else {
1649                         cmp = 1;
1650                 }
1651 nothing_to_do:
1652                 raw_cons += cmp ? cmp : 2;
1653         }
1654
1655         return desc;
1656 }
1657
1658 static int
1659 bnxt_rx_descriptor_status_op(void *rx_queue, uint16_t offset)
1660 {
1661         struct bnxt_rx_queue *rxq = (struct bnxt_rx_queue *)rx_queue;
1662         struct bnxt_rx_ring_info *rxr;
1663         struct bnxt_cp_ring_info *cpr;
1664         struct bnxt_sw_rx_bd *rx_buf;
1665         struct rx_pkt_cmpl *rxcmp;
1666         uint32_t cons, cp_cons;
1667
1668         if (!rxq)
1669                 return -EINVAL;
1670
1671         cpr = rxq->cp_ring;
1672         rxr = rxq->rx_ring;
1673
1674         if (offset >= rxq->nb_rx_desc)
1675                 return -EINVAL;
1676
1677         cons = RING_CMP(cpr->cp_ring_struct, offset);
1678         cp_cons = cpr->cp_raw_cons;
1679         rxcmp = (struct rx_pkt_cmpl *)&cpr->cp_desc_ring[cons];
1680
1681         if (cons > cp_cons) {
1682                 if (CMPL_VALID(rxcmp, cpr->valid))
1683                         return RTE_ETH_RX_DESC_DONE;
1684         } else {
1685                 if (CMPL_VALID(rxcmp, !cpr->valid))
1686                         return RTE_ETH_RX_DESC_DONE;
1687         }
1688         rx_buf = &rxr->rx_buf_ring[cons];
1689         if (rx_buf->mbuf == NULL)
1690                 return RTE_ETH_RX_DESC_UNAVAIL;
1691
1692
1693         return RTE_ETH_RX_DESC_AVAIL;
1694 }
1695
1696 static int
1697 bnxt_tx_descriptor_status_op(void *tx_queue, uint16_t offset)
1698 {
1699         struct bnxt_tx_queue *txq = (struct bnxt_tx_queue *)tx_queue;
1700         struct bnxt_tx_ring_info *txr;
1701         struct bnxt_cp_ring_info *cpr;
1702         struct bnxt_sw_tx_bd *tx_buf;
1703         struct tx_pkt_cmpl *txcmp;
1704         uint32_t cons, cp_cons;
1705
1706         if (!txq)
1707                 return -EINVAL;
1708
1709         cpr = txq->cp_ring;
1710         txr = txq->tx_ring;
1711
1712         if (offset >= txq->nb_tx_desc)
1713                 return -EINVAL;
1714
1715         cons = RING_CMP(cpr->cp_ring_struct, offset);
1716         txcmp = (struct tx_pkt_cmpl *)&cpr->cp_desc_ring[cons];
1717         cp_cons = cpr->cp_raw_cons;
1718
1719         if (cons > cp_cons) {
1720                 if (CMPL_VALID(txcmp, cpr->valid))
1721                         return RTE_ETH_TX_DESC_UNAVAIL;
1722         } else {
1723                 if (CMPL_VALID(txcmp, !cpr->valid))
1724                         return RTE_ETH_TX_DESC_UNAVAIL;
1725         }
1726         tx_buf = &txr->tx_buf_ring[cons];
1727         if (tx_buf->mbuf == NULL)
1728                 return RTE_ETH_TX_DESC_DONE;
1729
1730         return RTE_ETH_TX_DESC_FULL;
1731 }
1732
1733 static struct bnxt_filter_info *
1734 bnxt_match_and_validate_ether_filter(struct bnxt *bp,
1735                                 struct rte_eth_ethertype_filter *efilter,
1736                                 struct bnxt_vnic_info *vnic0,
1737                                 struct bnxt_vnic_info *vnic,
1738                                 int *ret)
1739 {
1740         struct bnxt_filter_info *mfilter = NULL;
1741         int match = 0;
1742         *ret = 0;
1743
1744         if (efilter->ether_type == ETHER_TYPE_IPv4 ||
1745                 efilter->ether_type == ETHER_TYPE_IPv6) {
1746                 PMD_DRV_LOG(ERR, "invalid ether_type(0x%04x) in"
1747                         " ethertype filter.", efilter->ether_type);
1748                 *ret = -EINVAL;
1749                 goto exit;
1750         }
1751         if (efilter->queue >= bp->rx_nr_rings) {
1752                 PMD_DRV_LOG(ERR, "Invalid queue %d\n", efilter->queue);
1753                 *ret = -EINVAL;
1754                 goto exit;
1755         }
1756
1757         vnic0 = STAILQ_FIRST(&bp->ff_pool[0]);
1758         vnic = STAILQ_FIRST(&bp->ff_pool[efilter->queue]);
1759         if (vnic == NULL) {
1760                 PMD_DRV_LOG(ERR, "Invalid queue %d\n", efilter->queue);
1761                 *ret = -EINVAL;
1762                 goto exit;
1763         }
1764
1765         if (efilter->flags & RTE_ETHTYPE_FLAGS_DROP) {
1766                 STAILQ_FOREACH(mfilter, &vnic0->filter, next) {
1767                         if ((!memcmp(efilter->mac_addr.addr_bytes,
1768                                      mfilter->l2_addr, ETHER_ADDR_LEN) &&
1769                              mfilter->flags ==
1770                              HWRM_CFA_NTUPLE_FILTER_ALLOC_INPUT_FLAGS_DROP &&
1771                              mfilter->ethertype == efilter->ether_type)) {
1772                                 match = 1;
1773                                 break;
1774                         }
1775                 }
1776         } else {
1777                 STAILQ_FOREACH(mfilter, &vnic->filter, next)
1778                         if ((!memcmp(efilter->mac_addr.addr_bytes,
1779                                      mfilter->l2_addr, ETHER_ADDR_LEN) &&
1780                              mfilter->ethertype == efilter->ether_type &&
1781                              mfilter->flags ==
1782                              HWRM_CFA_L2_FILTER_CFG_INPUT_FLAGS_PATH_RX)) {
1783                                 match = 1;
1784                                 break;
1785                         }
1786         }
1787
1788         if (match)
1789                 *ret = -EEXIST;
1790
1791 exit:
1792         return mfilter;
1793 }
1794
1795 static int
1796 bnxt_ethertype_filter(struct rte_eth_dev *dev,
1797                         enum rte_filter_op filter_op,
1798                         void *arg)
1799 {
1800         struct bnxt *bp = (struct bnxt *)dev->data->dev_private;
1801         struct rte_eth_ethertype_filter *efilter =
1802                         (struct rte_eth_ethertype_filter *)arg;
1803         struct bnxt_filter_info *bfilter, *filter1;
1804         struct bnxt_vnic_info *vnic, *vnic0;
1805         int ret;
1806
1807         if (filter_op == RTE_ETH_FILTER_NOP)
1808                 return 0;
1809
1810         if (arg == NULL) {
1811                 PMD_DRV_LOG(ERR, "arg shouldn't be NULL for operation %u.",
1812                             filter_op);
1813                 return -EINVAL;
1814         }
1815
1816         vnic0 = STAILQ_FIRST(&bp->ff_pool[0]);
1817         vnic = STAILQ_FIRST(&bp->ff_pool[efilter->queue]);
1818
1819         switch (filter_op) {
1820         case RTE_ETH_FILTER_ADD:
1821                 bnxt_match_and_validate_ether_filter(bp, efilter,
1822                                                         vnic0, vnic, &ret);
1823                 if (ret < 0)
1824                         return ret;
1825
1826                 bfilter = bnxt_get_unused_filter(bp);
1827                 if (bfilter == NULL) {
1828                         PMD_DRV_LOG(ERR,
1829                                 "Not enough resources for a new filter.\n");
1830                         return -ENOMEM;
1831                 }
1832                 bfilter->filter_type = HWRM_CFA_NTUPLE_FILTER;
1833                 memcpy(bfilter->l2_addr, efilter->mac_addr.addr_bytes,
1834                        ETHER_ADDR_LEN);
1835                 memcpy(bfilter->dst_macaddr, efilter->mac_addr.addr_bytes,
1836                        ETHER_ADDR_LEN);
1837                 bfilter->enables |= NTUPLE_FLTR_ALLOC_INPUT_EN_DST_MACADDR;
1838                 bfilter->ethertype = efilter->ether_type;
1839                 bfilter->enables |= NTUPLE_FLTR_ALLOC_INPUT_EN_ETHERTYPE;
1840
1841                 filter1 = bnxt_get_l2_filter(bp, bfilter, vnic0);
1842                 if (filter1 == NULL) {
1843                         ret = -1;
1844                         goto cleanup;
1845                 }
1846                 bfilter->enables |=
1847                         HWRM_CFA_NTUPLE_FILTER_ALLOC_INPUT_ENABLES_L2_FILTER_ID;
1848                 bfilter->fw_l2_filter_id = filter1->fw_l2_filter_id;
1849
1850                 bfilter->dst_id = vnic->fw_vnic_id;
1851
1852                 if (efilter->flags & RTE_ETHTYPE_FLAGS_DROP) {
1853                         bfilter->flags =
1854                                 HWRM_CFA_NTUPLE_FILTER_ALLOC_INPUT_FLAGS_DROP;
1855                 }
1856
1857                 ret = bnxt_hwrm_set_ntuple_filter(bp, bfilter->dst_id, bfilter);
1858                 if (ret)
1859                         goto cleanup;
1860                 STAILQ_INSERT_TAIL(&vnic->filter, bfilter, next);
1861                 break;
1862         case RTE_ETH_FILTER_DELETE:
1863                 filter1 = bnxt_match_and_validate_ether_filter(bp, efilter,
1864                                                         vnic0, vnic, &ret);
1865                 if (ret == -EEXIST) {
1866                         ret = bnxt_hwrm_clear_ntuple_filter(bp, filter1);
1867
1868                         STAILQ_REMOVE(&vnic->filter, filter1, bnxt_filter_info,
1869                                       next);
1870                         bnxt_free_filter(bp, filter1);
1871                 } else if (ret == 0) {
1872                         PMD_DRV_LOG(ERR, "No matching filter found\n");
1873                 }
1874                 break;
1875         default:
1876                 PMD_DRV_LOG(ERR, "unsupported operation %u.", filter_op);
1877                 ret = -EINVAL;
1878                 goto error;
1879         }
1880         return ret;
1881 cleanup:
1882         bnxt_free_filter(bp, bfilter);
1883 error:
1884         return ret;
1885 }
1886
1887 static inline int
1888 parse_ntuple_filter(struct bnxt *bp,
1889                     struct rte_eth_ntuple_filter *nfilter,
1890                     struct bnxt_filter_info *bfilter)
1891 {
1892         uint32_t en = 0;
1893
1894         if (nfilter->queue >= bp->rx_nr_rings) {
1895                 PMD_DRV_LOG(ERR, "Invalid queue %d\n", nfilter->queue);
1896                 return -EINVAL;
1897         }
1898
1899         switch (nfilter->dst_port_mask) {
1900         case UINT16_MAX:
1901                 bfilter->dst_port_mask = -1;
1902                 bfilter->dst_port = nfilter->dst_port;
1903                 en |= NTUPLE_FLTR_ALLOC_INPUT_EN_DST_PORT |
1904                         NTUPLE_FLTR_ALLOC_INPUT_EN_DST_PORT_MASK;
1905                 break;
1906         default:
1907                 PMD_DRV_LOG(ERR, "invalid dst_port mask.");
1908                 return -EINVAL;
1909         }
1910
1911         bfilter->ip_addr_type = NTUPLE_FLTR_ALLOC_INPUT_IP_ADDR_TYPE_IPV4;
1912         en |= NTUPLE_FLTR_ALLOC_IN_EN_IP_PROTO;
1913
1914         switch (nfilter->proto_mask) {
1915         case UINT8_MAX:
1916                 if (nfilter->proto == 17) /* IPPROTO_UDP */
1917                         bfilter->ip_protocol = 17;
1918                 else if (nfilter->proto == 6) /* IPPROTO_TCP */
1919                         bfilter->ip_protocol = 6;
1920                 else
1921                         return -EINVAL;
1922                 en |= NTUPLE_FLTR_ALLOC_IN_EN_IP_PROTO;
1923                 break;
1924         default:
1925                 PMD_DRV_LOG(ERR, "invalid protocol mask.");
1926                 return -EINVAL;
1927         }
1928
1929         switch (nfilter->dst_ip_mask) {
1930         case UINT32_MAX:
1931                 bfilter->dst_ipaddr_mask[0] = -1;
1932                 bfilter->dst_ipaddr[0] = nfilter->dst_ip;
1933                 en |= NTUPLE_FLTR_ALLOC_INPUT_EN_DST_IPADDR |
1934                         NTUPLE_FLTR_ALLOC_INPUT_EN_DST_IPADDR_MASK;
1935                 break;
1936         default:
1937                 PMD_DRV_LOG(ERR, "invalid dst_ip mask.");
1938                 return -EINVAL;
1939         }
1940
1941         switch (nfilter->src_ip_mask) {
1942         case UINT32_MAX:
1943                 bfilter->src_ipaddr_mask[0] = -1;
1944                 bfilter->src_ipaddr[0] = nfilter->src_ip;
1945                 en |= NTUPLE_FLTR_ALLOC_INPUT_EN_SRC_IPADDR |
1946                         NTUPLE_FLTR_ALLOC_INPUT_EN_SRC_IPADDR_MASK;
1947                 break;
1948         default:
1949                 PMD_DRV_LOG(ERR, "invalid src_ip mask.");
1950                 return -EINVAL;
1951         }
1952
1953         switch (nfilter->src_port_mask) {
1954         case UINT16_MAX:
1955                 bfilter->src_port_mask = -1;
1956                 bfilter->src_port = nfilter->src_port;
1957                 en |= NTUPLE_FLTR_ALLOC_INPUT_EN_SRC_PORT |
1958                         NTUPLE_FLTR_ALLOC_INPUT_EN_SRC_PORT_MASK;
1959                 break;
1960         default:
1961                 PMD_DRV_LOG(ERR, "invalid src_port mask.");
1962                 return -EINVAL;
1963         }
1964
1965         //TODO Priority
1966         //nfilter->priority = (uint8_t)filter->priority;
1967
1968         bfilter->enables = en;
1969         return 0;
1970 }
1971
1972 static struct bnxt_filter_info*
1973 bnxt_match_ntuple_filter(struct bnxt *bp,
1974                          struct bnxt_filter_info *bfilter,
1975                          struct bnxt_vnic_info **mvnic)
1976 {
1977         struct bnxt_filter_info *mfilter = NULL;
1978         int i;
1979
1980         for (i = bp->nr_vnics - 1; i >= 0; i--) {
1981                 struct bnxt_vnic_info *vnic = &bp->vnic_info[i];
1982                 STAILQ_FOREACH(mfilter, &vnic->filter, next) {
1983                         if (bfilter->src_ipaddr[0] == mfilter->src_ipaddr[0] &&
1984                             bfilter->src_ipaddr_mask[0] ==
1985                             mfilter->src_ipaddr_mask[0] &&
1986                             bfilter->src_port == mfilter->src_port &&
1987                             bfilter->src_port_mask == mfilter->src_port_mask &&
1988                             bfilter->dst_ipaddr[0] == mfilter->dst_ipaddr[0] &&
1989                             bfilter->dst_ipaddr_mask[0] ==
1990                             mfilter->dst_ipaddr_mask[0] &&
1991                             bfilter->dst_port == mfilter->dst_port &&
1992                             bfilter->dst_port_mask == mfilter->dst_port_mask &&
1993                             bfilter->flags == mfilter->flags &&
1994                             bfilter->enables == mfilter->enables) {
1995                                 if (mvnic)
1996                                         *mvnic = vnic;
1997                                 return mfilter;
1998                         }
1999                 }
2000         }
2001         return NULL;
2002 }
2003
2004 static int
2005 bnxt_cfg_ntuple_filter(struct bnxt *bp,
2006                        struct rte_eth_ntuple_filter *nfilter,
2007                        enum rte_filter_op filter_op)
2008 {
2009         struct bnxt_filter_info *bfilter, *mfilter, *filter1;
2010         struct bnxt_vnic_info *vnic, *vnic0, *mvnic;
2011         int ret;
2012
2013         if (nfilter->flags != RTE_5TUPLE_FLAGS) {
2014                 PMD_DRV_LOG(ERR, "only 5tuple is supported.");
2015                 return -EINVAL;
2016         }
2017
2018         if (nfilter->flags & RTE_NTUPLE_FLAGS_TCP_FLAG) {
2019                 PMD_DRV_LOG(ERR, "Ntuple filter: TCP flags not supported\n");
2020                 return -EINVAL;
2021         }
2022
2023         bfilter = bnxt_get_unused_filter(bp);
2024         if (bfilter == NULL) {
2025                 PMD_DRV_LOG(ERR,
2026                         "Not enough resources for a new filter.\n");
2027                 return -ENOMEM;
2028         }
2029         ret = parse_ntuple_filter(bp, nfilter, bfilter);
2030         if (ret < 0)
2031                 goto free_filter;
2032
2033         vnic = STAILQ_FIRST(&bp->ff_pool[nfilter->queue]);
2034         vnic0 = STAILQ_FIRST(&bp->ff_pool[0]);
2035         filter1 = STAILQ_FIRST(&vnic0->filter);
2036         if (filter1 == NULL) {
2037                 ret = -1;
2038                 goto free_filter;
2039         }
2040
2041         bfilter->dst_id = vnic->fw_vnic_id;
2042         bfilter->fw_l2_filter_id = filter1->fw_l2_filter_id;
2043         bfilter->enables |=
2044                 HWRM_CFA_NTUPLE_FILTER_ALLOC_INPUT_ENABLES_L2_FILTER_ID;
2045         bfilter->ethertype = 0x800;
2046         bfilter->enables |= NTUPLE_FLTR_ALLOC_INPUT_EN_ETHERTYPE;
2047
2048         mfilter = bnxt_match_ntuple_filter(bp, bfilter, &mvnic);
2049
2050         if (mfilter != NULL && filter_op == RTE_ETH_FILTER_ADD &&
2051             bfilter->dst_id == mfilter->dst_id) {
2052                 PMD_DRV_LOG(ERR, "filter exists.\n");
2053                 ret = -EEXIST;
2054                 goto free_filter;
2055         } else if (mfilter != NULL && filter_op == RTE_ETH_FILTER_ADD &&
2056                    bfilter->dst_id != mfilter->dst_id) {
2057                 mfilter->dst_id = vnic->fw_vnic_id;
2058                 ret = bnxt_hwrm_set_ntuple_filter(bp, mfilter->dst_id, mfilter);
2059                 STAILQ_REMOVE(&mvnic->filter, mfilter, bnxt_filter_info, next);
2060                 STAILQ_INSERT_TAIL(&vnic->filter, mfilter, next);
2061                 PMD_DRV_LOG(ERR, "filter with matching pattern exists.\n");
2062                 PMD_DRV_LOG(ERR, " Updated it to the new destination queue\n");
2063                 goto free_filter;
2064         }
2065         if (mfilter == NULL && filter_op == RTE_ETH_FILTER_DELETE) {
2066                 PMD_DRV_LOG(ERR, "filter doesn't exist.");
2067                 ret = -ENOENT;
2068                 goto free_filter;
2069         }
2070
2071         if (filter_op == RTE_ETH_FILTER_ADD) {
2072                 bfilter->filter_type = HWRM_CFA_NTUPLE_FILTER;
2073                 ret = bnxt_hwrm_set_ntuple_filter(bp, bfilter->dst_id, bfilter);
2074                 if (ret)
2075                         goto free_filter;
2076                 STAILQ_INSERT_TAIL(&vnic->filter, bfilter, next);
2077         } else {
2078                 if (mfilter == NULL) {
2079                         /* This should not happen. But for Coverity! */
2080                         ret = -ENOENT;
2081                         goto free_filter;
2082                 }
2083                 ret = bnxt_hwrm_clear_ntuple_filter(bp, mfilter);
2084
2085                 STAILQ_REMOVE(&vnic->filter, mfilter, bnxt_filter_info, next);
2086                 bnxt_free_filter(bp, mfilter);
2087                 mfilter->fw_l2_filter_id = -1;
2088                 bnxt_free_filter(bp, bfilter);
2089                 bfilter->fw_l2_filter_id = -1;
2090         }
2091
2092         return 0;
2093 free_filter:
2094         bfilter->fw_l2_filter_id = -1;
2095         bnxt_free_filter(bp, bfilter);
2096         return ret;
2097 }
2098
2099 static int
2100 bnxt_ntuple_filter(struct rte_eth_dev *dev,
2101                         enum rte_filter_op filter_op,
2102                         void *arg)
2103 {
2104         struct bnxt *bp = (struct bnxt *)dev->data->dev_private;
2105         int ret;
2106
2107         if (filter_op == RTE_ETH_FILTER_NOP)
2108                 return 0;
2109
2110         if (arg == NULL) {
2111                 PMD_DRV_LOG(ERR, "arg shouldn't be NULL for operation %u.",
2112                             filter_op);
2113                 return -EINVAL;
2114         }
2115
2116         switch (filter_op) {
2117         case RTE_ETH_FILTER_ADD:
2118                 ret = bnxt_cfg_ntuple_filter(bp,
2119                         (struct rte_eth_ntuple_filter *)arg,
2120                         filter_op);
2121                 break;
2122         case RTE_ETH_FILTER_DELETE:
2123                 ret = bnxt_cfg_ntuple_filter(bp,
2124                         (struct rte_eth_ntuple_filter *)arg,
2125                         filter_op);
2126                 break;
2127         default:
2128                 PMD_DRV_LOG(ERR, "unsupported operation %u.", filter_op);
2129                 ret = -EINVAL;
2130                 break;
2131         }
2132         return ret;
2133 }
2134
2135 static int
2136 bnxt_parse_fdir_filter(struct bnxt *bp,
2137                        struct rte_eth_fdir_filter *fdir,
2138                        struct bnxt_filter_info *filter)
2139 {
2140         enum rte_fdir_mode fdir_mode =
2141                 bp->eth_dev->data->dev_conf.fdir_conf.mode;
2142         struct bnxt_vnic_info *vnic0, *vnic;
2143         struct bnxt_filter_info *filter1;
2144         uint32_t en = 0;
2145         int i;
2146
2147         if (fdir_mode == RTE_FDIR_MODE_PERFECT_TUNNEL)
2148                 return -EINVAL;
2149
2150         filter->l2_ovlan = fdir->input.flow_ext.vlan_tci;
2151         en |= EM_FLOW_ALLOC_INPUT_EN_OVLAN_VID;
2152
2153         switch (fdir->input.flow_type) {
2154         case RTE_ETH_FLOW_IPV4:
2155         case RTE_ETH_FLOW_NONFRAG_IPV4_OTHER:
2156                 /* FALLTHROUGH */
2157                 filter->src_ipaddr[0] = fdir->input.flow.ip4_flow.src_ip;
2158                 en |= NTUPLE_FLTR_ALLOC_INPUT_EN_SRC_IPADDR;
2159                 filter->dst_ipaddr[0] = fdir->input.flow.ip4_flow.dst_ip;
2160                 en |= NTUPLE_FLTR_ALLOC_INPUT_EN_DST_IPADDR;
2161                 filter->ip_protocol = fdir->input.flow.ip4_flow.proto;
2162                 en |= NTUPLE_FLTR_ALLOC_IN_EN_IP_PROTO;
2163                 filter->ip_addr_type =
2164                         NTUPLE_FLTR_ALLOC_INPUT_IP_ADDR_TYPE_IPV4;
2165                 filter->src_ipaddr_mask[0] = 0xffffffff;
2166                 en |= NTUPLE_FLTR_ALLOC_INPUT_EN_SRC_IPADDR_MASK;
2167                 filter->dst_ipaddr_mask[0] = 0xffffffff;
2168                 en |= NTUPLE_FLTR_ALLOC_INPUT_EN_DST_IPADDR_MASK;
2169                 filter->ethertype = 0x800;
2170                 filter->enables |= NTUPLE_FLTR_ALLOC_INPUT_EN_ETHERTYPE;
2171                 break;
2172         case RTE_ETH_FLOW_NONFRAG_IPV4_TCP:
2173                 filter->src_port = fdir->input.flow.tcp4_flow.src_port;
2174                 en |= NTUPLE_FLTR_ALLOC_INPUT_EN_SRC_PORT;
2175                 filter->dst_port = fdir->input.flow.tcp4_flow.dst_port;
2176                 en |= NTUPLE_FLTR_ALLOC_INPUT_EN_DST_PORT;
2177                 filter->dst_port_mask = 0xffff;
2178                 en |= NTUPLE_FLTR_ALLOC_INPUT_EN_DST_PORT_MASK;
2179                 filter->src_port_mask = 0xffff;
2180                 en |= NTUPLE_FLTR_ALLOC_INPUT_EN_SRC_PORT_MASK;
2181                 filter->src_ipaddr[0] = fdir->input.flow.tcp4_flow.ip.src_ip;
2182                 en |= NTUPLE_FLTR_ALLOC_INPUT_EN_SRC_IPADDR;
2183                 filter->dst_ipaddr[0] = fdir->input.flow.tcp4_flow.ip.dst_ip;
2184                 en |= NTUPLE_FLTR_ALLOC_INPUT_EN_DST_IPADDR;
2185                 filter->ip_protocol = 6;
2186                 en |= NTUPLE_FLTR_ALLOC_IN_EN_IP_PROTO;
2187                 filter->ip_addr_type =
2188                         NTUPLE_FLTR_ALLOC_INPUT_IP_ADDR_TYPE_IPV4;
2189                 filter->src_ipaddr_mask[0] = 0xffffffff;
2190                 en |= NTUPLE_FLTR_ALLOC_INPUT_EN_SRC_IPADDR_MASK;
2191                 filter->dst_ipaddr_mask[0] = 0xffffffff;
2192                 en |= NTUPLE_FLTR_ALLOC_INPUT_EN_DST_IPADDR_MASK;
2193                 filter->ethertype = 0x800;
2194                 filter->enables |= NTUPLE_FLTR_ALLOC_INPUT_EN_ETHERTYPE;
2195                 break;
2196         case RTE_ETH_FLOW_NONFRAG_IPV4_UDP:
2197                 filter->src_port = fdir->input.flow.udp4_flow.src_port;
2198                 en |= NTUPLE_FLTR_ALLOC_INPUT_EN_SRC_PORT;
2199                 filter->dst_port = fdir->input.flow.udp4_flow.dst_port;
2200                 en |= NTUPLE_FLTR_ALLOC_INPUT_EN_DST_PORT;
2201                 filter->dst_port_mask = 0xffff;
2202                 en |= NTUPLE_FLTR_ALLOC_INPUT_EN_DST_PORT_MASK;
2203                 filter->src_port_mask = 0xffff;
2204                 en |= NTUPLE_FLTR_ALLOC_INPUT_EN_SRC_PORT_MASK;
2205                 filter->src_ipaddr[0] = fdir->input.flow.udp4_flow.ip.src_ip;
2206                 en |= NTUPLE_FLTR_ALLOC_INPUT_EN_SRC_IPADDR;
2207                 filter->dst_ipaddr[0] = fdir->input.flow.udp4_flow.ip.dst_ip;
2208                 en |= NTUPLE_FLTR_ALLOC_INPUT_EN_DST_IPADDR;
2209                 filter->ip_protocol = 17;
2210                 en |= NTUPLE_FLTR_ALLOC_IN_EN_IP_PROTO;
2211                 filter->ip_addr_type =
2212                         NTUPLE_FLTR_ALLOC_INPUT_IP_ADDR_TYPE_IPV4;
2213                 filter->src_ipaddr_mask[0] = 0xffffffff;
2214                 en |= NTUPLE_FLTR_ALLOC_INPUT_EN_SRC_IPADDR_MASK;
2215                 filter->dst_ipaddr_mask[0] = 0xffffffff;
2216                 en |= NTUPLE_FLTR_ALLOC_INPUT_EN_DST_IPADDR_MASK;
2217                 filter->ethertype = 0x800;
2218                 filter->enables |= NTUPLE_FLTR_ALLOC_INPUT_EN_ETHERTYPE;
2219                 break;
2220         case RTE_ETH_FLOW_IPV6:
2221         case RTE_ETH_FLOW_NONFRAG_IPV6_OTHER:
2222                 /* FALLTHROUGH */
2223                 filter->ip_addr_type =
2224                         NTUPLE_FLTR_ALLOC_INPUT_IP_ADDR_TYPE_IPV6;
2225                 filter->ip_protocol = fdir->input.flow.ipv6_flow.proto;
2226                 en |= NTUPLE_FLTR_ALLOC_IN_EN_IP_PROTO;
2227                 rte_memcpy(filter->src_ipaddr,
2228                            fdir->input.flow.ipv6_flow.src_ip, 16);
2229                 en |= NTUPLE_FLTR_ALLOC_INPUT_EN_SRC_IPADDR;
2230                 rte_memcpy(filter->dst_ipaddr,
2231                            fdir->input.flow.ipv6_flow.dst_ip, 16);
2232                 en |= NTUPLE_FLTR_ALLOC_INPUT_EN_DST_IPADDR;
2233                 memset(filter->dst_ipaddr_mask, 0xff, 16);
2234                 en |= NTUPLE_FLTR_ALLOC_INPUT_EN_DST_IPADDR_MASK;
2235                 memset(filter->src_ipaddr_mask, 0xff, 16);
2236                 en |= NTUPLE_FLTR_ALLOC_INPUT_EN_SRC_IPADDR_MASK;
2237                 filter->ethertype = 0x86dd;
2238                 filter->enables |= NTUPLE_FLTR_ALLOC_INPUT_EN_ETHERTYPE;
2239                 break;
2240         case RTE_ETH_FLOW_NONFRAG_IPV6_TCP:
2241                 filter->src_port = fdir->input.flow.tcp6_flow.src_port;
2242                 en |= NTUPLE_FLTR_ALLOC_INPUT_EN_SRC_PORT;
2243                 filter->dst_port = fdir->input.flow.tcp6_flow.dst_port;
2244                 en |= NTUPLE_FLTR_ALLOC_INPUT_EN_DST_PORT;
2245                 filter->dst_port_mask = 0xffff;
2246                 en |= NTUPLE_FLTR_ALLOC_INPUT_EN_DST_PORT_MASK;
2247                 filter->src_port_mask = 0xffff;
2248                 en |= NTUPLE_FLTR_ALLOC_INPUT_EN_SRC_PORT_MASK;
2249                 filter->ip_addr_type =
2250                         NTUPLE_FLTR_ALLOC_INPUT_IP_ADDR_TYPE_IPV6;
2251                 filter->ip_protocol = fdir->input.flow.tcp6_flow.ip.proto;
2252                 en |= NTUPLE_FLTR_ALLOC_IN_EN_IP_PROTO;
2253                 rte_memcpy(filter->src_ipaddr,
2254                            fdir->input.flow.tcp6_flow.ip.src_ip, 16);
2255                 en |= NTUPLE_FLTR_ALLOC_INPUT_EN_SRC_IPADDR;
2256                 rte_memcpy(filter->dst_ipaddr,
2257                            fdir->input.flow.tcp6_flow.ip.dst_ip, 16);
2258                 en |= NTUPLE_FLTR_ALLOC_INPUT_EN_DST_IPADDR;
2259                 memset(filter->dst_ipaddr_mask, 0xff, 16);
2260                 en |= NTUPLE_FLTR_ALLOC_INPUT_EN_DST_IPADDR_MASK;
2261                 memset(filter->src_ipaddr_mask, 0xff, 16);
2262                 en |= NTUPLE_FLTR_ALLOC_INPUT_EN_SRC_IPADDR_MASK;
2263                 filter->ethertype = 0x86dd;
2264                 filter->enables |= NTUPLE_FLTR_ALLOC_INPUT_EN_ETHERTYPE;
2265                 break;
2266         case RTE_ETH_FLOW_NONFRAG_IPV6_UDP:
2267                 filter->src_port = fdir->input.flow.udp6_flow.src_port;
2268                 en |= NTUPLE_FLTR_ALLOC_INPUT_EN_SRC_PORT;
2269                 filter->dst_port = fdir->input.flow.udp6_flow.dst_port;
2270                 en |= NTUPLE_FLTR_ALLOC_INPUT_EN_DST_PORT;
2271                 filter->dst_port_mask = 0xffff;
2272                 en |= NTUPLE_FLTR_ALLOC_INPUT_EN_DST_PORT_MASK;
2273                 filter->src_port_mask = 0xffff;
2274                 en |= NTUPLE_FLTR_ALLOC_INPUT_EN_SRC_PORT_MASK;
2275                 filter->ip_addr_type =
2276                         NTUPLE_FLTR_ALLOC_INPUT_IP_ADDR_TYPE_IPV6;
2277                 filter->ip_protocol = fdir->input.flow.udp6_flow.ip.proto;
2278                 en |= NTUPLE_FLTR_ALLOC_IN_EN_IP_PROTO;
2279                 rte_memcpy(filter->src_ipaddr,
2280                            fdir->input.flow.udp6_flow.ip.src_ip, 16);
2281                 en |= NTUPLE_FLTR_ALLOC_INPUT_EN_SRC_IPADDR;
2282                 rte_memcpy(filter->dst_ipaddr,
2283                            fdir->input.flow.udp6_flow.ip.dst_ip, 16);
2284                 en |= NTUPLE_FLTR_ALLOC_INPUT_EN_DST_IPADDR;
2285                 memset(filter->dst_ipaddr_mask, 0xff, 16);
2286                 en |= NTUPLE_FLTR_ALLOC_INPUT_EN_DST_IPADDR_MASK;
2287                 memset(filter->src_ipaddr_mask, 0xff, 16);
2288                 en |= NTUPLE_FLTR_ALLOC_INPUT_EN_SRC_IPADDR_MASK;
2289                 filter->ethertype = 0x86dd;
2290                 filter->enables |= NTUPLE_FLTR_ALLOC_INPUT_EN_ETHERTYPE;
2291                 break;
2292         case RTE_ETH_FLOW_L2_PAYLOAD:
2293                 filter->ethertype = fdir->input.flow.l2_flow.ether_type;
2294                 en |= NTUPLE_FLTR_ALLOC_INPUT_EN_ETHERTYPE;
2295                 break;
2296         case RTE_ETH_FLOW_VXLAN:
2297                 if (fdir->action.behavior == RTE_ETH_FDIR_REJECT)
2298                         return -EINVAL;
2299                 filter->vni = fdir->input.flow.tunnel_flow.tunnel_id;
2300                 filter->tunnel_type =
2301                         CFA_NTUPLE_FILTER_ALLOC_REQ_TUNNEL_TYPE_VXLAN;
2302                 en |= HWRM_CFA_NTUPLE_FILTER_ALLOC_INPUT_ENABLES_TUNNEL_TYPE;
2303                 break;
2304         case RTE_ETH_FLOW_NVGRE:
2305                 if (fdir->action.behavior == RTE_ETH_FDIR_REJECT)
2306                         return -EINVAL;
2307                 filter->vni = fdir->input.flow.tunnel_flow.tunnel_id;
2308                 filter->tunnel_type =
2309                         CFA_NTUPLE_FILTER_ALLOC_REQ_TUNNEL_TYPE_NVGRE;
2310                 en |= HWRM_CFA_NTUPLE_FILTER_ALLOC_INPUT_ENABLES_TUNNEL_TYPE;
2311                 break;
2312         case RTE_ETH_FLOW_UNKNOWN:
2313         case RTE_ETH_FLOW_RAW:
2314         case RTE_ETH_FLOW_FRAG_IPV4:
2315         case RTE_ETH_FLOW_NONFRAG_IPV4_SCTP:
2316         case RTE_ETH_FLOW_FRAG_IPV6:
2317         case RTE_ETH_FLOW_NONFRAG_IPV6_SCTP:
2318         case RTE_ETH_FLOW_IPV6_EX:
2319         case RTE_ETH_FLOW_IPV6_TCP_EX:
2320         case RTE_ETH_FLOW_IPV6_UDP_EX:
2321         case RTE_ETH_FLOW_GENEVE:
2322                 /* FALLTHROUGH */
2323         default:
2324                 return -EINVAL;
2325         }
2326
2327         vnic0 = STAILQ_FIRST(&bp->ff_pool[0]);
2328         vnic = STAILQ_FIRST(&bp->ff_pool[fdir->action.rx_queue]);
2329         if (vnic == NULL) {
2330                 PMD_DRV_LOG(ERR, "Invalid queue %d\n", fdir->action.rx_queue);
2331                 return -EINVAL;
2332         }
2333
2334
2335         if (fdir_mode == RTE_FDIR_MODE_PERFECT_MAC_VLAN) {
2336                 rte_memcpy(filter->dst_macaddr,
2337                         fdir->input.flow.mac_vlan_flow.mac_addr.addr_bytes, 6);
2338                         en |= NTUPLE_FLTR_ALLOC_INPUT_EN_DST_MACADDR;
2339         }
2340
2341         if (fdir->action.behavior == RTE_ETH_FDIR_REJECT) {
2342                 filter->flags = HWRM_CFA_NTUPLE_FILTER_ALLOC_INPUT_FLAGS_DROP;
2343                 filter1 = STAILQ_FIRST(&vnic0->filter);
2344                 //filter1 = bnxt_get_l2_filter(bp, filter, vnic0);
2345         } else {
2346                 filter->dst_id = vnic->fw_vnic_id;
2347                 for (i = 0; i < ETHER_ADDR_LEN; i++)
2348                         if (filter->dst_macaddr[i] == 0x00)
2349                                 filter1 = STAILQ_FIRST(&vnic0->filter);
2350                         else
2351                                 filter1 = bnxt_get_l2_filter(bp, filter, vnic);
2352         }
2353
2354         if (filter1 == NULL)
2355                 return -EINVAL;
2356
2357         en |= HWRM_CFA_NTUPLE_FILTER_ALLOC_INPUT_ENABLES_L2_FILTER_ID;
2358         filter->fw_l2_filter_id = filter1->fw_l2_filter_id;
2359
2360         filter->enables = en;
2361
2362         return 0;
2363 }
2364
2365 static struct bnxt_filter_info *
2366 bnxt_match_fdir(struct bnxt *bp, struct bnxt_filter_info *nf,
2367                 struct bnxt_vnic_info **mvnic)
2368 {
2369         struct bnxt_filter_info *mf = NULL;
2370         int i;
2371
2372         for (i = bp->nr_vnics - 1; i >= 0; i--) {
2373                 struct bnxt_vnic_info *vnic = &bp->vnic_info[i];
2374
2375                 STAILQ_FOREACH(mf, &vnic->filter, next) {
2376                         if (mf->filter_type == nf->filter_type &&
2377                             mf->flags == nf->flags &&
2378                             mf->src_port == nf->src_port &&
2379                             mf->src_port_mask == nf->src_port_mask &&
2380                             mf->dst_port == nf->dst_port &&
2381                             mf->dst_port_mask == nf->dst_port_mask &&
2382                             mf->ip_protocol == nf->ip_protocol &&
2383                             mf->ip_addr_type == nf->ip_addr_type &&
2384                             mf->ethertype == nf->ethertype &&
2385                             mf->vni == nf->vni &&
2386                             mf->tunnel_type == nf->tunnel_type &&
2387                             mf->l2_ovlan == nf->l2_ovlan &&
2388                             mf->l2_ovlan_mask == nf->l2_ovlan_mask &&
2389                             mf->l2_ivlan == nf->l2_ivlan &&
2390                             mf->l2_ivlan_mask == nf->l2_ivlan_mask &&
2391                             !memcmp(mf->l2_addr, nf->l2_addr, ETHER_ADDR_LEN) &&
2392                             !memcmp(mf->l2_addr_mask, nf->l2_addr_mask,
2393                                     ETHER_ADDR_LEN) &&
2394                             !memcmp(mf->src_macaddr, nf->src_macaddr,
2395                                     ETHER_ADDR_LEN) &&
2396                             !memcmp(mf->dst_macaddr, nf->dst_macaddr,
2397                                     ETHER_ADDR_LEN) &&
2398                             !memcmp(mf->src_ipaddr, nf->src_ipaddr,
2399                                     sizeof(nf->src_ipaddr)) &&
2400                             !memcmp(mf->src_ipaddr_mask, nf->src_ipaddr_mask,
2401                                     sizeof(nf->src_ipaddr_mask)) &&
2402                             !memcmp(mf->dst_ipaddr, nf->dst_ipaddr,
2403                                     sizeof(nf->dst_ipaddr)) &&
2404                             !memcmp(mf->dst_ipaddr_mask, nf->dst_ipaddr_mask,
2405                                     sizeof(nf->dst_ipaddr_mask))) {
2406                                 if (mvnic)
2407                                         *mvnic = vnic;
2408                                 return mf;
2409                         }
2410                 }
2411         }
2412         return NULL;
2413 }
2414
2415 static int
2416 bnxt_fdir_filter(struct rte_eth_dev *dev,
2417                  enum rte_filter_op filter_op,
2418                  void *arg)
2419 {
2420         struct bnxt *bp = (struct bnxt *)dev->data->dev_private;
2421         struct rte_eth_fdir_filter *fdir  = (struct rte_eth_fdir_filter *)arg;
2422         struct bnxt_filter_info *filter, *match;
2423         struct bnxt_vnic_info *vnic, *mvnic;
2424         int ret = 0, i;
2425
2426         if (filter_op == RTE_ETH_FILTER_NOP)
2427                 return 0;
2428
2429         if (arg == NULL && filter_op != RTE_ETH_FILTER_FLUSH)
2430                 return -EINVAL;
2431
2432         switch (filter_op) {
2433         case RTE_ETH_FILTER_ADD:
2434         case RTE_ETH_FILTER_DELETE:
2435                 filter = bnxt_get_unused_filter(bp);
2436                 if (filter == NULL) {
2437                         PMD_DRV_LOG(ERR,
2438                                 "Not enough resources for a new flow.\n");
2439                         return -ENOMEM;
2440                 }
2441
2442                 ret = bnxt_parse_fdir_filter(bp, fdir, filter);
2443                 if (ret != 0)
2444                         goto free_filter;
2445                 filter->filter_type = HWRM_CFA_NTUPLE_FILTER;
2446
2447                 if (fdir->action.behavior == RTE_ETH_FDIR_REJECT)
2448                         vnic = STAILQ_FIRST(&bp->ff_pool[0]);
2449                 else
2450                         vnic = STAILQ_FIRST(&bp->ff_pool[fdir->action.rx_queue]);
2451
2452                 match = bnxt_match_fdir(bp, filter, &mvnic);
2453                 if (match != NULL && filter_op == RTE_ETH_FILTER_ADD) {
2454                         if (match->dst_id == vnic->fw_vnic_id) {
2455                                 PMD_DRV_LOG(ERR, "Flow already exists.\n");
2456                                 ret = -EEXIST;
2457                                 goto free_filter;
2458                         } else {
2459                                 match->dst_id = vnic->fw_vnic_id;
2460                                 ret = bnxt_hwrm_set_ntuple_filter(bp,
2461                                                                   match->dst_id,
2462                                                                   match);
2463                                 STAILQ_REMOVE(&mvnic->filter, match,
2464                                               bnxt_filter_info, next);
2465                                 STAILQ_INSERT_TAIL(&vnic->filter, match, next);
2466                                 PMD_DRV_LOG(ERR,
2467                                         "Filter with matching pattern exist\n");
2468                                 PMD_DRV_LOG(ERR,
2469                                         "Updated it to new destination q\n");
2470                                 goto free_filter;
2471                         }
2472                 }
2473                 if (match == NULL && filter_op == RTE_ETH_FILTER_DELETE) {
2474                         PMD_DRV_LOG(ERR, "Flow does not exist.\n");
2475                         ret = -ENOENT;
2476                         goto free_filter;
2477                 }
2478
2479                 if (filter_op == RTE_ETH_FILTER_ADD) {
2480                         ret = bnxt_hwrm_set_ntuple_filter(bp,
2481                                                           filter->dst_id,
2482                                                           filter);
2483                         if (ret)
2484                                 goto free_filter;
2485                         STAILQ_INSERT_TAIL(&vnic->filter, filter, next);
2486                 } else {
2487                         ret = bnxt_hwrm_clear_ntuple_filter(bp, match);
2488                         STAILQ_REMOVE(&vnic->filter, match,
2489                                       bnxt_filter_info, next);
2490                         bnxt_free_filter(bp, match);
2491                         filter->fw_l2_filter_id = -1;
2492                         bnxt_free_filter(bp, filter);
2493                 }
2494                 break;
2495         case RTE_ETH_FILTER_FLUSH:
2496                 for (i = bp->nr_vnics - 1; i >= 0; i--) {
2497                         struct bnxt_vnic_info *vnic = &bp->vnic_info[i];
2498
2499                         STAILQ_FOREACH(filter, &vnic->filter, next) {
2500                                 if (filter->filter_type ==
2501                                     HWRM_CFA_NTUPLE_FILTER) {
2502                                         ret =
2503                                         bnxt_hwrm_clear_ntuple_filter(bp,
2504                                                                       filter);
2505                                         STAILQ_REMOVE(&vnic->filter, filter,
2506                                                       bnxt_filter_info, next);
2507                                 }
2508                         }
2509                 }
2510                 return ret;
2511         case RTE_ETH_FILTER_UPDATE:
2512         case RTE_ETH_FILTER_STATS:
2513         case RTE_ETH_FILTER_INFO:
2514                 PMD_DRV_LOG(ERR, "operation %u not implemented", filter_op);
2515                 break;
2516         default:
2517                 PMD_DRV_LOG(ERR, "unknown operation %u", filter_op);
2518                 ret = -EINVAL;
2519                 break;
2520         }
2521         return ret;
2522
2523 free_filter:
2524         filter->fw_l2_filter_id = -1;
2525         bnxt_free_filter(bp, filter);
2526         return ret;
2527 }
2528
2529 static int
2530 bnxt_filter_ctrl_op(struct rte_eth_dev *dev __rte_unused,
2531                     enum rte_filter_type filter_type,
2532                     enum rte_filter_op filter_op, void *arg)
2533 {
2534         int ret = 0;
2535
2536         switch (filter_type) {
2537         case RTE_ETH_FILTER_TUNNEL:
2538                 PMD_DRV_LOG(ERR,
2539                         "filter type: %d: To be implemented\n", filter_type);
2540                 break;
2541         case RTE_ETH_FILTER_FDIR:
2542                 ret = bnxt_fdir_filter(dev, filter_op, arg);
2543                 break;
2544         case RTE_ETH_FILTER_NTUPLE:
2545                 ret = bnxt_ntuple_filter(dev, filter_op, arg);
2546                 break;
2547         case RTE_ETH_FILTER_ETHERTYPE:
2548                 ret = bnxt_ethertype_filter(dev, filter_op, arg);
2549                 break;
2550         case RTE_ETH_FILTER_GENERIC:
2551                 if (filter_op != RTE_ETH_FILTER_GET)
2552                         return -EINVAL;
2553                 *(const void **)arg = &bnxt_flow_ops;
2554                 break;
2555         default:
2556                 PMD_DRV_LOG(ERR,
2557                         "Filter type (%d) not supported", filter_type);
2558                 ret = -EINVAL;
2559                 break;
2560         }
2561         return ret;
2562 }
2563
2564 static const uint32_t *
2565 bnxt_dev_supported_ptypes_get_op(struct rte_eth_dev *dev)
2566 {
2567         static const uint32_t ptypes[] = {
2568                 RTE_PTYPE_L2_ETHER_VLAN,
2569                 RTE_PTYPE_L3_IPV4_EXT_UNKNOWN,
2570                 RTE_PTYPE_L3_IPV6_EXT_UNKNOWN,
2571                 RTE_PTYPE_L4_ICMP,
2572                 RTE_PTYPE_L4_TCP,
2573                 RTE_PTYPE_L4_UDP,
2574                 RTE_PTYPE_INNER_L3_IPV4_EXT_UNKNOWN,
2575                 RTE_PTYPE_INNER_L3_IPV6_EXT_UNKNOWN,
2576                 RTE_PTYPE_INNER_L4_ICMP,
2577                 RTE_PTYPE_INNER_L4_TCP,
2578                 RTE_PTYPE_INNER_L4_UDP,
2579                 RTE_PTYPE_UNKNOWN
2580         };
2581
2582         if (dev->rx_pkt_burst == bnxt_recv_pkts)
2583                 return ptypes;
2584         return NULL;
2585 }
2586
2587 static int bnxt_map_regs(struct bnxt *bp, uint32_t *reg_arr, int count,
2588                          int reg_win)
2589 {
2590         uint32_t reg_base = *reg_arr & 0xfffff000;
2591         uint32_t win_off;
2592         int i;
2593
2594         for (i = 0; i < count; i++) {
2595                 if ((reg_arr[i] & 0xfffff000) != reg_base)
2596                         return -ERANGE;
2597         }
2598         win_off = BNXT_GRCPF_REG_WINDOW_BASE_OUT + (reg_win - 1) * 4;
2599         rte_cpu_to_le_32(rte_write32(reg_base, (uint8_t *)bp->bar0 + win_off));
2600         return 0;
2601 }
2602
2603 static int bnxt_map_ptp_regs(struct bnxt *bp)
2604 {
2605         struct bnxt_ptp_cfg *ptp = bp->ptp_cfg;
2606         uint32_t *reg_arr;
2607         int rc, i;
2608
2609         reg_arr = ptp->rx_regs;
2610         rc = bnxt_map_regs(bp, reg_arr, BNXT_PTP_RX_REGS, 5);
2611         if (rc)
2612                 return rc;
2613
2614         reg_arr = ptp->tx_regs;
2615         rc = bnxt_map_regs(bp, reg_arr, BNXT_PTP_TX_REGS, 6);
2616         if (rc)
2617                 return rc;
2618
2619         for (i = 0; i < BNXT_PTP_RX_REGS; i++)
2620                 ptp->rx_mapped_regs[i] = 0x5000 + (ptp->rx_regs[i] & 0xfff);
2621
2622         for (i = 0; i < BNXT_PTP_TX_REGS; i++)
2623                 ptp->tx_mapped_regs[i] = 0x6000 + (ptp->tx_regs[i] & 0xfff);
2624
2625         return 0;
2626 }
2627
2628 static void bnxt_unmap_ptp_regs(struct bnxt *bp)
2629 {
2630         rte_cpu_to_le_32(rte_write32(0, (uint8_t *)bp->bar0 +
2631                          BNXT_GRCPF_REG_WINDOW_BASE_OUT + 16));
2632         rte_cpu_to_le_32(rte_write32(0, (uint8_t *)bp->bar0 +
2633                          BNXT_GRCPF_REG_WINDOW_BASE_OUT + 20));
2634 }
2635
2636 static uint64_t bnxt_cc_read(struct bnxt *bp)
2637 {
2638         uint64_t ns;
2639
2640         ns = rte_le_to_cpu_32(rte_read32((uint8_t *)bp->bar0 +
2641                               BNXT_GRCPF_REG_SYNC_TIME));
2642         ns |= (uint64_t)(rte_le_to_cpu_32(rte_read32((uint8_t *)bp->bar0 +
2643                                           BNXT_GRCPF_REG_SYNC_TIME + 4))) << 32;
2644         return ns;
2645 }
2646
2647 static int bnxt_get_tx_ts(struct bnxt *bp, uint64_t *ts)
2648 {
2649         struct bnxt_ptp_cfg *ptp = bp->ptp_cfg;
2650         uint32_t fifo;
2651
2652         fifo = rte_le_to_cpu_32(rte_read32((uint8_t *)bp->bar0 +
2653                                 ptp->tx_mapped_regs[BNXT_PTP_TX_FIFO]));
2654         if (fifo & BNXT_PTP_TX_FIFO_EMPTY)
2655                 return -EAGAIN;
2656
2657         fifo = rte_le_to_cpu_32(rte_read32((uint8_t *)bp->bar0 +
2658                                 ptp->tx_mapped_regs[BNXT_PTP_TX_FIFO]));
2659         *ts = rte_le_to_cpu_32(rte_read32((uint8_t *)bp->bar0 +
2660                                 ptp->tx_mapped_regs[BNXT_PTP_TX_TS_L]));
2661         *ts |= (uint64_t)rte_le_to_cpu_32(rte_read32((uint8_t *)bp->bar0 +
2662                                 ptp->tx_mapped_regs[BNXT_PTP_TX_TS_H])) << 32;
2663
2664         return 0;
2665 }
2666
2667 static int bnxt_get_rx_ts(struct bnxt *bp, uint64_t *ts)
2668 {
2669         struct bnxt_ptp_cfg *ptp = bp->ptp_cfg;
2670         struct bnxt_pf_info *pf = &bp->pf;
2671         uint16_t port_id;
2672         uint32_t fifo;
2673
2674         if (!ptp)
2675                 return -ENODEV;
2676
2677         fifo = rte_le_to_cpu_32(rte_read32((uint8_t *)bp->bar0 +
2678                                 ptp->rx_mapped_regs[BNXT_PTP_RX_FIFO]));
2679         if (!(fifo & BNXT_PTP_RX_FIFO_PENDING))
2680                 return -EAGAIN;
2681
2682         port_id = pf->port_id;
2683         rte_cpu_to_le_32(rte_write32(1 << port_id, (uint8_t *)bp->bar0 +
2684                ptp->rx_mapped_regs[BNXT_PTP_RX_FIFO_ADV]));
2685
2686         fifo = rte_le_to_cpu_32(rte_read32((uint8_t *)bp->bar0 +
2687                                    ptp->rx_mapped_regs[BNXT_PTP_RX_FIFO]));
2688         if (fifo & BNXT_PTP_RX_FIFO_PENDING) {
2689 /*              bnxt_clr_rx_ts(bp);       TBD  */
2690                 return -EBUSY;
2691         }
2692
2693         *ts = rte_le_to_cpu_32(rte_read32((uint8_t *)bp->bar0 +
2694                                 ptp->rx_mapped_regs[BNXT_PTP_RX_TS_L]));
2695         *ts |= (uint64_t)rte_le_to_cpu_32(rte_read32((uint8_t *)bp->bar0 +
2696                                 ptp->rx_mapped_regs[BNXT_PTP_RX_TS_H])) << 32;
2697
2698         return 0;
2699 }
2700
2701 static int
2702 bnxt_timesync_write_time(struct rte_eth_dev *dev, const struct timespec *ts)
2703 {
2704         uint64_t ns;
2705         struct bnxt *bp = (struct bnxt *)dev->data->dev_private;
2706         struct bnxt_ptp_cfg *ptp = bp->ptp_cfg;
2707
2708         if (!ptp)
2709                 return 0;
2710
2711         ns = rte_timespec_to_ns(ts);
2712         /* Set the timecounters to a new value. */
2713         ptp->tc.nsec = ns;
2714
2715         return 0;
2716 }
2717
2718 static int
2719 bnxt_timesync_read_time(struct rte_eth_dev *dev, struct timespec *ts)
2720 {
2721         uint64_t ns, systime_cycles;
2722         struct bnxt *bp = (struct bnxt *)dev->data->dev_private;
2723         struct bnxt_ptp_cfg *ptp = bp->ptp_cfg;
2724
2725         if (!ptp)
2726                 return 0;
2727
2728         systime_cycles = bnxt_cc_read(bp);
2729         ns = rte_timecounter_update(&ptp->tc, systime_cycles);
2730         *ts = rte_ns_to_timespec(ns);
2731
2732         return 0;
2733 }
2734 static int
2735 bnxt_timesync_enable(struct rte_eth_dev *dev)
2736 {
2737         struct bnxt *bp = (struct bnxt *)dev->data->dev_private;
2738         struct bnxt_ptp_cfg *ptp = bp->ptp_cfg;
2739         uint32_t shift = 0;
2740
2741         if (!ptp)
2742                 return 0;
2743
2744         ptp->rx_filter = 1;
2745         ptp->tx_tstamp_en = 1;
2746         ptp->rxctl = BNXT_PTP_MSG_EVENTS;
2747
2748         if (!bnxt_hwrm_ptp_cfg(bp))
2749                 bnxt_map_ptp_regs(bp);
2750
2751         memset(&ptp->tc, 0, sizeof(struct rte_timecounter));
2752         memset(&ptp->rx_tstamp_tc, 0, sizeof(struct rte_timecounter));
2753         memset(&ptp->tx_tstamp_tc, 0, sizeof(struct rte_timecounter));
2754
2755         ptp->tc.cc_mask = BNXT_CYCLECOUNTER_MASK;
2756         ptp->tc.cc_shift = shift;
2757         ptp->tc.nsec_mask = (1ULL << shift) - 1;
2758
2759         ptp->rx_tstamp_tc.cc_mask = BNXT_CYCLECOUNTER_MASK;
2760         ptp->rx_tstamp_tc.cc_shift = shift;
2761         ptp->rx_tstamp_tc.nsec_mask = (1ULL << shift) - 1;
2762
2763         ptp->tx_tstamp_tc.cc_mask = BNXT_CYCLECOUNTER_MASK;
2764         ptp->tx_tstamp_tc.cc_shift = shift;
2765         ptp->tx_tstamp_tc.nsec_mask = (1ULL << shift) - 1;
2766
2767         return 0;
2768 }
2769
2770 static int
2771 bnxt_timesync_disable(struct rte_eth_dev *dev)
2772 {
2773         struct bnxt *bp = (struct bnxt *)dev->data->dev_private;
2774         struct bnxt_ptp_cfg *ptp = bp->ptp_cfg;
2775
2776         if (!ptp)
2777                 return 0;
2778
2779         ptp->rx_filter = 0;
2780         ptp->tx_tstamp_en = 0;
2781         ptp->rxctl = 0;
2782
2783         bnxt_hwrm_ptp_cfg(bp);
2784
2785         bnxt_unmap_ptp_regs(bp);
2786
2787         return 0;
2788 }
2789
2790 static int
2791 bnxt_timesync_read_rx_timestamp(struct rte_eth_dev *dev,
2792                                  struct timespec *timestamp,
2793                                  uint32_t flags __rte_unused)
2794 {
2795         struct bnxt *bp = (struct bnxt *)dev->data->dev_private;
2796         struct bnxt_ptp_cfg *ptp = bp->ptp_cfg;
2797         uint64_t rx_tstamp_cycles = 0;
2798         uint64_t ns;
2799
2800         if (!ptp)
2801                 return 0;
2802
2803         bnxt_get_rx_ts(bp, &rx_tstamp_cycles);
2804         ns = rte_timecounter_update(&ptp->rx_tstamp_tc, rx_tstamp_cycles);
2805         *timestamp = rte_ns_to_timespec(ns);
2806         return  0;
2807 }
2808
2809 static int
2810 bnxt_timesync_read_tx_timestamp(struct rte_eth_dev *dev,
2811                                  struct timespec *timestamp)
2812 {
2813         struct bnxt *bp = (struct bnxt *)dev->data->dev_private;
2814         struct bnxt_ptp_cfg *ptp = bp->ptp_cfg;
2815         uint64_t tx_tstamp_cycles = 0;
2816         uint64_t ns;
2817
2818         if (!ptp)
2819                 return 0;
2820
2821         bnxt_get_tx_ts(bp, &tx_tstamp_cycles);
2822         ns = rte_timecounter_update(&ptp->tx_tstamp_tc, tx_tstamp_cycles);
2823         *timestamp = rte_ns_to_timespec(ns);
2824
2825         return 0;
2826 }
2827
2828 static int
2829 bnxt_timesync_adjust_time(struct rte_eth_dev *dev, int64_t delta)
2830 {
2831         struct bnxt *bp = (struct bnxt *)dev->data->dev_private;
2832         struct bnxt_ptp_cfg *ptp = bp->ptp_cfg;
2833
2834         if (!ptp)
2835                 return 0;
2836
2837         ptp->tc.nsec += delta;
2838
2839         return 0;
2840 }
2841
2842 static int
2843 bnxt_get_eeprom_length_op(struct rte_eth_dev *dev)
2844 {
2845         struct bnxt *bp = (struct bnxt *)dev->data->dev_private;
2846         int rc;
2847         uint32_t dir_entries;
2848         uint32_t entry_length;
2849
2850         PMD_DRV_LOG(INFO, "%04x:%02x:%02x:%02x\n",
2851                 bp->pdev->addr.domain, bp->pdev->addr.bus,
2852                 bp->pdev->addr.devid, bp->pdev->addr.function);
2853
2854         rc = bnxt_hwrm_nvm_get_dir_info(bp, &dir_entries, &entry_length);
2855         if (rc != 0)
2856                 return rc;
2857
2858         return dir_entries * entry_length;
2859 }
2860
2861 static int
2862 bnxt_get_eeprom_op(struct rte_eth_dev *dev,
2863                 struct rte_dev_eeprom_info *in_eeprom)
2864 {
2865         struct bnxt *bp = (struct bnxt *)dev->data->dev_private;
2866         uint32_t index;
2867         uint32_t offset;
2868
2869         PMD_DRV_LOG(INFO, "%04x:%02x:%02x:%02x in_eeprom->offset = %d "
2870                 "len = %d\n", bp->pdev->addr.domain,
2871                 bp->pdev->addr.bus, bp->pdev->addr.devid,
2872                 bp->pdev->addr.function, in_eeprom->offset, in_eeprom->length);
2873
2874         if (in_eeprom->offset == 0) /* special offset value to get directory */
2875                 return bnxt_get_nvram_directory(bp, in_eeprom->length,
2876                                                 in_eeprom->data);
2877
2878         index = in_eeprom->offset >> 24;
2879         offset = in_eeprom->offset & 0xffffff;
2880
2881         if (index != 0)
2882                 return bnxt_hwrm_get_nvram_item(bp, index - 1, offset,
2883                                            in_eeprom->length, in_eeprom->data);
2884
2885         return 0;
2886 }
2887
2888 static bool bnxt_dir_type_is_ape_bin_format(uint16_t dir_type)
2889 {
2890         switch (dir_type) {
2891         case BNX_DIR_TYPE_CHIMP_PATCH:
2892         case BNX_DIR_TYPE_BOOTCODE:
2893         case BNX_DIR_TYPE_BOOTCODE_2:
2894         case BNX_DIR_TYPE_APE_FW:
2895         case BNX_DIR_TYPE_APE_PATCH:
2896         case BNX_DIR_TYPE_KONG_FW:
2897         case BNX_DIR_TYPE_KONG_PATCH:
2898         case BNX_DIR_TYPE_BONO_FW:
2899         case BNX_DIR_TYPE_BONO_PATCH:
2900                 return true;
2901         }
2902
2903         return false;
2904 }
2905
2906 static bool bnxt_dir_type_is_other_exec_format(uint16_t dir_type)
2907 {
2908         switch (dir_type) {
2909         case BNX_DIR_TYPE_AVS:
2910         case BNX_DIR_TYPE_EXP_ROM_MBA:
2911         case BNX_DIR_TYPE_PCIE:
2912         case BNX_DIR_TYPE_TSCF_UCODE:
2913         case BNX_DIR_TYPE_EXT_PHY:
2914         case BNX_DIR_TYPE_CCM:
2915         case BNX_DIR_TYPE_ISCSI_BOOT:
2916         case BNX_DIR_TYPE_ISCSI_BOOT_IPV6:
2917         case BNX_DIR_TYPE_ISCSI_BOOT_IPV4N6:
2918                 return true;
2919         }
2920
2921         return false;
2922 }
2923
2924 static bool bnxt_dir_type_is_executable(uint16_t dir_type)
2925 {
2926         return bnxt_dir_type_is_ape_bin_format(dir_type) ||
2927                 bnxt_dir_type_is_other_exec_format(dir_type);
2928 }
2929
2930 static int
2931 bnxt_set_eeprom_op(struct rte_eth_dev *dev,
2932                 struct rte_dev_eeprom_info *in_eeprom)
2933 {
2934         struct bnxt *bp = (struct bnxt *)dev->data->dev_private;
2935         uint8_t index, dir_op;
2936         uint16_t type, ext, ordinal, attr;
2937
2938         PMD_DRV_LOG(INFO, "%04x:%02x:%02x:%02x in_eeprom->offset = %d "
2939                 "len = %d\n", bp->pdev->addr.domain,
2940                 bp->pdev->addr.bus, bp->pdev->addr.devid,
2941                 bp->pdev->addr.function, in_eeprom->offset, in_eeprom->length);
2942
2943         if (!BNXT_PF(bp)) {
2944                 PMD_DRV_LOG(ERR, "NVM write not supported from a VF\n");
2945                 return -EINVAL;
2946         }
2947
2948         type = in_eeprom->magic >> 16;
2949
2950         if (type == 0xffff) { /* special value for directory operations */
2951                 index = in_eeprom->magic & 0xff;
2952                 dir_op = in_eeprom->magic >> 8;
2953                 if (index == 0)
2954                         return -EINVAL;
2955                 switch (dir_op) {
2956                 case 0x0e: /* erase */
2957                         if (in_eeprom->offset != ~in_eeprom->magic)
2958                                 return -EINVAL;
2959                         return bnxt_hwrm_erase_nvram_directory(bp, index - 1);
2960                 default:
2961                         return -EINVAL;
2962                 }
2963         }
2964
2965         /* Create or re-write an NVM item: */
2966         if (bnxt_dir_type_is_executable(type) == true)
2967                 return -EOPNOTSUPP;
2968         ext = in_eeprom->magic & 0xffff;
2969         ordinal = in_eeprom->offset >> 16;
2970         attr = in_eeprom->offset & 0xffff;
2971
2972         return bnxt_hwrm_flash_nvram(bp, type, ordinal, ext, attr,
2973                                      in_eeprom->data, in_eeprom->length);
2974         return 0;
2975 }
2976
2977 /*
2978  * Initialization
2979  */
2980
2981 static const struct eth_dev_ops bnxt_dev_ops = {
2982         .dev_infos_get = bnxt_dev_info_get_op,
2983         .dev_close = bnxt_dev_close_op,
2984         .dev_configure = bnxt_dev_configure_op,
2985         .dev_start = bnxt_dev_start_op,
2986         .dev_stop = bnxt_dev_stop_op,
2987         .dev_set_link_up = bnxt_dev_set_link_up_op,
2988         .dev_set_link_down = bnxt_dev_set_link_down_op,
2989         .stats_get = bnxt_stats_get_op,
2990         .stats_reset = bnxt_stats_reset_op,
2991         .rx_queue_setup = bnxt_rx_queue_setup_op,
2992         .rx_queue_release = bnxt_rx_queue_release_op,
2993         .tx_queue_setup = bnxt_tx_queue_setup_op,
2994         .tx_queue_release = bnxt_tx_queue_release_op,
2995         .rx_queue_intr_enable = bnxt_rx_queue_intr_enable_op,
2996         .rx_queue_intr_disable = bnxt_rx_queue_intr_disable_op,
2997         .reta_update = bnxt_reta_update_op,
2998         .reta_query = bnxt_reta_query_op,
2999         .rss_hash_update = bnxt_rss_hash_update_op,
3000         .rss_hash_conf_get = bnxt_rss_hash_conf_get_op,
3001         .link_update = bnxt_link_update_op,
3002         .promiscuous_enable = bnxt_promiscuous_enable_op,
3003         .promiscuous_disable = bnxt_promiscuous_disable_op,
3004         .allmulticast_enable = bnxt_allmulticast_enable_op,
3005         .allmulticast_disable = bnxt_allmulticast_disable_op,
3006         .mac_addr_add = bnxt_mac_addr_add_op,
3007         .mac_addr_remove = bnxt_mac_addr_remove_op,
3008         .flow_ctrl_get = bnxt_flow_ctrl_get_op,
3009         .flow_ctrl_set = bnxt_flow_ctrl_set_op,
3010         .udp_tunnel_port_add  = bnxt_udp_tunnel_port_add_op,
3011         .udp_tunnel_port_del  = bnxt_udp_tunnel_port_del_op,
3012         .vlan_filter_set = bnxt_vlan_filter_set_op,
3013         .vlan_offload_set = bnxt_vlan_offload_set_op,
3014         .vlan_pvid_set = bnxt_vlan_pvid_set_op,
3015         .mtu_set = bnxt_mtu_set_op,
3016         .mac_addr_set = bnxt_set_default_mac_addr_op,
3017         .xstats_get = bnxt_dev_xstats_get_op,
3018         .xstats_get_names = bnxt_dev_xstats_get_names_op,
3019         .xstats_reset = bnxt_dev_xstats_reset_op,
3020         .fw_version_get = bnxt_fw_version_get,
3021         .set_mc_addr_list = bnxt_dev_set_mc_addr_list_op,
3022         .rxq_info_get = bnxt_rxq_info_get_op,
3023         .txq_info_get = bnxt_txq_info_get_op,
3024         .dev_led_on = bnxt_dev_led_on_op,
3025         .dev_led_off = bnxt_dev_led_off_op,
3026         .xstats_get_by_id = bnxt_dev_xstats_get_by_id_op,
3027         .xstats_get_names_by_id = bnxt_dev_xstats_get_names_by_id_op,
3028         .rx_queue_count = bnxt_rx_queue_count_op,
3029         .rx_descriptor_status = bnxt_rx_descriptor_status_op,
3030         .tx_descriptor_status = bnxt_tx_descriptor_status_op,
3031         .rx_queue_start = bnxt_rx_queue_start,
3032         .rx_queue_stop = bnxt_rx_queue_stop,
3033         .tx_queue_start = bnxt_tx_queue_start,
3034         .tx_queue_stop = bnxt_tx_queue_stop,
3035         .filter_ctrl = bnxt_filter_ctrl_op,
3036         .dev_supported_ptypes_get = bnxt_dev_supported_ptypes_get_op,
3037         .get_eeprom_length    = bnxt_get_eeprom_length_op,
3038         .get_eeprom           = bnxt_get_eeprom_op,
3039         .set_eeprom           = bnxt_set_eeprom_op,
3040         .timesync_enable      = bnxt_timesync_enable,
3041         .timesync_disable     = bnxt_timesync_disable,
3042         .timesync_read_time   = bnxt_timesync_read_time,
3043         .timesync_write_time   = bnxt_timesync_write_time,
3044         .timesync_adjust_time = bnxt_timesync_adjust_time,
3045         .timesync_read_rx_timestamp = bnxt_timesync_read_rx_timestamp,
3046         .timesync_read_tx_timestamp = bnxt_timesync_read_tx_timestamp,
3047 };
3048
3049 static bool bnxt_vf_pciid(uint16_t id)
3050 {
3051         if (id == BROADCOM_DEV_ID_57304_VF ||
3052             id == BROADCOM_DEV_ID_57406_VF ||
3053             id == BROADCOM_DEV_ID_5731X_VF ||
3054             id == BROADCOM_DEV_ID_5741X_VF ||
3055             id == BROADCOM_DEV_ID_57414_VF ||
3056             id == BROADCOM_DEV_ID_STRATUS_NIC_VF1 ||
3057             id == BROADCOM_DEV_ID_STRATUS_NIC_VF2)
3058                 return true;
3059         return false;
3060 }
3061
3062 static int bnxt_init_board(struct rte_eth_dev *eth_dev)
3063 {
3064         struct bnxt *bp = eth_dev->data->dev_private;
3065         struct rte_pci_device *pci_dev = RTE_ETH_DEV_TO_PCI(eth_dev);
3066         int rc;
3067
3068         /* enable device (incl. PCI PM wakeup), and bus-mastering */
3069         if (!pci_dev->mem_resource[0].addr) {
3070                 PMD_DRV_LOG(ERR,
3071                         "Cannot find PCI device base address, aborting\n");
3072                 rc = -ENODEV;
3073                 goto init_err_disable;
3074         }
3075
3076         bp->eth_dev = eth_dev;
3077         bp->pdev = pci_dev;
3078
3079         bp->bar0 = (void *)pci_dev->mem_resource[0].addr;
3080         if (!bp->bar0) {
3081                 PMD_DRV_LOG(ERR, "Cannot map device registers, aborting\n");
3082                 rc = -ENOMEM;
3083                 goto init_err_release;
3084         }
3085
3086         if (!pci_dev->mem_resource[2].addr) {
3087                 PMD_DRV_LOG(ERR,
3088                             "Cannot find PCI device BAR 2 address, aborting\n");
3089                 rc = -ENODEV;
3090                 goto init_err_release;
3091         } else {
3092                 bp->doorbell_base = (void *)pci_dev->mem_resource[2].addr;
3093         }
3094
3095         return 0;
3096
3097 init_err_release:
3098         if (bp->bar0)
3099                 bp->bar0 = NULL;
3100         if (bp->doorbell_base)
3101                 bp->doorbell_base = NULL;
3102
3103 init_err_disable:
3104
3105         return rc;
3106 }
3107
3108 static int bnxt_dev_uninit(struct rte_eth_dev *eth_dev);
3109
3110 #define ALLOW_FUNC(x)   \
3111         { \
3112                 typeof(x) arg = (x); \
3113                 bp->pf.vf_req_fwd[((arg) >> 5)] &= \
3114                 ~rte_cpu_to_le_32(1 << ((arg) & 0x1f)); \
3115         }
3116 static int
3117 bnxt_dev_init(struct rte_eth_dev *eth_dev)
3118 {
3119         struct rte_pci_device *pci_dev = RTE_ETH_DEV_TO_PCI(eth_dev);
3120         char mz_name[RTE_MEMZONE_NAMESIZE];
3121         const struct rte_memzone *mz = NULL;
3122         static int version_printed;
3123         uint32_t total_alloc_len;
3124         rte_iova_t mz_phys_addr;
3125         struct bnxt *bp;
3126         int rc;
3127
3128         if (version_printed++ == 0)
3129                 PMD_DRV_LOG(INFO, "%s\n", bnxt_version);
3130
3131         rte_eth_copy_pci_info(eth_dev, pci_dev);
3132
3133         bp = eth_dev->data->dev_private;
3134
3135         bp->dev_stopped = 1;
3136
3137         if (rte_eal_process_type() != RTE_PROC_PRIMARY)
3138                 goto skip_init;
3139
3140         if (bnxt_vf_pciid(pci_dev->id.device_id))
3141                 bp->flags |= BNXT_FLAG_VF;
3142
3143         rc = bnxt_init_board(eth_dev);
3144         if (rc) {
3145                 PMD_DRV_LOG(ERR,
3146                         "Board initialization failed rc: %x\n", rc);
3147                 goto error;
3148         }
3149 skip_init:
3150         eth_dev->dev_ops = &bnxt_dev_ops;
3151         if (rte_eal_process_type() != RTE_PROC_PRIMARY)
3152                 return 0;
3153         eth_dev->rx_pkt_burst = &bnxt_recv_pkts;
3154         eth_dev->tx_pkt_burst = &bnxt_xmit_pkts;
3155
3156         if (BNXT_PF(bp) && pci_dev->id.device_id != BROADCOM_DEV_ID_NS2) {
3157                 snprintf(mz_name, RTE_MEMZONE_NAMESIZE,
3158                          "bnxt_%04x:%02x:%02x:%02x-%s", pci_dev->addr.domain,
3159                          pci_dev->addr.bus, pci_dev->addr.devid,
3160                          pci_dev->addr.function, "rx_port_stats");
3161                 mz_name[RTE_MEMZONE_NAMESIZE - 1] = 0;
3162                 mz = rte_memzone_lookup(mz_name);
3163                 total_alloc_len = RTE_CACHE_LINE_ROUNDUP(
3164                                 sizeof(struct rx_port_stats) + 512);
3165                 if (!mz) {
3166                         mz = rte_memzone_reserve(mz_name, total_alloc_len,
3167                                         SOCKET_ID_ANY,
3168                                         RTE_MEMZONE_2MB |
3169                                         RTE_MEMZONE_SIZE_HINT_ONLY |
3170                                         RTE_MEMZONE_IOVA_CONTIG);
3171                         if (mz == NULL)
3172                                 return -ENOMEM;
3173                 }
3174                 memset(mz->addr, 0, mz->len);
3175                 mz_phys_addr = mz->iova;
3176                 if ((unsigned long)mz->addr == mz_phys_addr) {
3177                         PMD_DRV_LOG(WARNING,
3178                                 "Memzone physical address same as virtual.\n");
3179                         PMD_DRV_LOG(WARNING,
3180                                 "Using rte_mem_virt2iova()\n");
3181                         mz_phys_addr = rte_mem_virt2iova(mz->addr);
3182                         if (mz_phys_addr == 0) {
3183                                 PMD_DRV_LOG(ERR,
3184                                 "unable to map address to physical memory\n");
3185                                 return -ENOMEM;
3186                         }
3187                 }
3188
3189                 bp->rx_mem_zone = (const void *)mz;
3190                 bp->hw_rx_port_stats = mz->addr;
3191                 bp->hw_rx_port_stats_map = mz_phys_addr;
3192
3193                 snprintf(mz_name, RTE_MEMZONE_NAMESIZE,
3194                          "bnxt_%04x:%02x:%02x:%02x-%s", pci_dev->addr.domain,
3195                          pci_dev->addr.bus, pci_dev->addr.devid,
3196                          pci_dev->addr.function, "tx_port_stats");
3197                 mz_name[RTE_MEMZONE_NAMESIZE - 1] = 0;
3198                 mz = rte_memzone_lookup(mz_name);
3199                 total_alloc_len = RTE_CACHE_LINE_ROUNDUP(
3200                                 sizeof(struct tx_port_stats) + 512);
3201                 if (!mz) {
3202                         mz = rte_memzone_reserve(mz_name,
3203                                         total_alloc_len,
3204                                         SOCKET_ID_ANY,
3205                                         RTE_MEMZONE_2MB |
3206                                         RTE_MEMZONE_SIZE_HINT_ONLY |
3207                                         RTE_MEMZONE_IOVA_CONTIG);
3208                         if (mz == NULL)
3209                                 return -ENOMEM;
3210                 }
3211                 memset(mz->addr, 0, mz->len);
3212                 mz_phys_addr = mz->iova;
3213                 if ((unsigned long)mz->addr == mz_phys_addr) {
3214                         PMD_DRV_LOG(WARNING,
3215                                 "Memzone physical address same as virtual.\n");
3216                         PMD_DRV_LOG(WARNING,
3217                                 "Using rte_mem_virt2iova()\n");
3218                         mz_phys_addr = rte_mem_virt2iova(mz->addr);
3219                         if (mz_phys_addr == 0) {
3220                                 PMD_DRV_LOG(ERR,
3221                                 "unable to map address to physical memory\n");
3222                                 return -ENOMEM;
3223                         }
3224                 }
3225
3226                 bp->tx_mem_zone = (const void *)mz;
3227                 bp->hw_tx_port_stats = mz->addr;
3228                 bp->hw_tx_port_stats_map = mz_phys_addr;
3229
3230                 bp->flags |= BNXT_FLAG_PORT_STATS;
3231         }
3232
3233         rc = bnxt_alloc_hwrm_resources(bp);
3234         if (rc) {
3235                 PMD_DRV_LOG(ERR,
3236                         "hwrm resource allocation failure rc: %x\n", rc);
3237                 goto error_free;
3238         }
3239         rc = bnxt_hwrm_ver_get(bp);
3240         if (rc)
3241                 goto error_free;
3242         rc = bnxt_hwrm_queue_qportcfg(bp);
3243         if (rc) {
3244                 PMD_DRV_LOG(ERR, "hwrm queue qportcfg failed\n");
3245                 goto error_free;
3246         }
3247
3248         rc = bnxt_hwrm_func_qcfg(bp);
3249         if (rc) {
3250                 PMD_DRV_LOG(ERR, "hwrm func qcfg failed\n");
3251                 goto error_free;
3252         }
3253
3254         /* Get the MAX capabilities for this function */
3255         rc = bnxt_hwrm_func_qcaps(bp);
3256         if (rc) {
3257                 PMD_DRV_LOG(ERR, "hwrm query capability failure rc: %x\n", rc);
3258                 goto error_free;
3259         }
3260         if (bp->max_tx_rings == 0) {
3261                 PMD_DRV_LOG(ERR, "No TX rings available!\n");
3262                 rc = -EBUSY;
3263                 goto error_free;
3264         }
3265         eth_dev->data->mac_addrs = rte_zmalloc("bnxt_mac_addr_tbl",
3266                                         ETHER_ADDR_LEN * bp->max_l2_ctx, 0);
3267         if (eth_dev->data->mac_addrs == NULL) {
3268                 PMD_DRV_LOG(ERR,
3269                         "Failed to alloc %u bytes needed to store MAC addr tbl",
3270                         ETHER_ADDR_LEN * bp->max_l2_ctx);
3271                 rc = -ENOMEM;
3272                 goto error_free;
3273         }
3274
3275         if (bnxt_check_zero_bytes(bp->dflt_mac_addr, ETHER_ADDR_LEN)) {
3276                 PMD_DRV_LOG(ERR,
3277                             "Invalid MAC addr %02X:%02X:%02X:%02X:%02X:%02X\n",
3278                             bp->dflt_mac_addr[0], bp->dflt_mac_addr[1],
3279                             bp->dflt_mac_addr[2], bp->dflt_mac_addr[3],
3280                             bp->dflt_mac_addr[4], bp->dflt_mac_addr[5]);
3281                 rc = -EINVAL;
3282                 goto error_free;
3283         }
3284         /* Copy the permanent MAC from the qcap response address now. */
3285         memcpy(bp->mac_addr, bp->dflt_mac_addr, sizeof(bp->mac_addr));
3286         memcpy(&eth_dev->data->mac_addrs[0], bp->mac_addr, ETHER_ADDR_LEN);
3287
3288         if (bp->max_ring_grps < bp->rx_cp_nr_rings) {
3289                 /* 1 ring is for default completion ring */
3290                 PMD_DRV_LOG(ERR, "Insufficient resource: Ring Group\n");
3291                 rc = -ENOSPC;
3292                 goto error_free;
3293         }
3294
3295         bp->grp_info = rte_zmalloc("bnxt_grp_info",
3296                                 sizeof(*bp->grp_info) * bp->max_ring_grps, 0);
3297         if (!bp->grp_info) {
3298                 PMD_DRV_LOG(ERR,
3299                         "Failed to alloc %zu bytes to store group info table\n",
3300                         sizeof(*bp->grp_info) * bp->max_ring_grps);
3301                 rc = -ENOMEM;
3302                 goto error_free;
3303         }
3304
3305         /* Forward all requests if firmware is new enough */
3306         if (((bp->fw_ver >= ((20 << 24) | (6 << 16) | (100 << 8))) &&
3307             (bp->fw_ver < ((20 << 24) | (7 << 16)))) ||
3308             ((bp->fw_ver >= ((20 << 24) | (8 << 16))))) {
3309                 memset(bp->pf.vf_req_fwd, 0xff, sizeof(bp->pf.vf_req_fwd));
3310         } else {
3311                 PMD_DRV_LOG(WARNING,
3312                         "Firmware too old for VF mailbox functionality\n");
3313                 memset(bp->pf.vf_req_fwd, 0, sizeof(bp->pf.vf_req_fwd));
3314         }
3315
3316         /*
3317          * The following are used for driver cleanup.  If we disallow these,
3318          * VF drivers can't clean up cleanly.
3319          */
3320         ALLOW_FUNC(HWRM_FUNC_DRV_UNRGTR);
3321         ALLOW_FUNC(HWRM_VNIC_FREE);
3322         ALLOW_FUNC(HWRM_RING_FREE);
3323         ALLOW_FUNC(HWRM_RING_GRP_FREE);
3324         ALLOW_FUNC(HWRM_VNIC_RSS_COS_LB_CTX_FREE);
3325         ALLOW_FUNC(HWRM_CFA_L2_FILTER_FREE);
3326         ALLOW_FUNC(HWRM_STAT_CTX_FREE);
3327         ALLOW_FUNC(HWRM_PORT_PHY_QCFG);
3328         ALLOW_FUNC(HWRM_VNIC_TPA_CFG);
3329         rc = bnxt_hwrm_func_driver_register(bp);
3330         if (rc) {
3331                 PMD_DRV_LOG(ERR,
3332                         "Failed to register driver");
3333                 rc = -EBUSY;
3334                 goto error_free;
3335         }
3336
3337         PMD_DRV_LOG(INFO,
3338                 DRV_MODULE_NAME " found at mem %" PRIx64 ", node addr %pM\n",
3339                 pci_dev->mem_resource[0].phys_addr,
3340                 pci_dev->mem_resource[0].addr);
3341
3342         rc = bnxt_hwrm_func_reset(bp);
3343         if (rc) {
3344                 PMD_DRV_LOG(ERR, "hwrm chip reset failure rc: %x\n", rc);
3345                 rc = -EIO;
3346                 goto error_free;
3347         }
3348
3349         if (BNXT_PF(bp)) {
3350                 //if (bp->pf.active_vfs) {
3351                         // TODO: Deallocate VF resources?
3352                 //}
3353                 if (bp->pdev->max_vfs) {
3354                         rc = bnxt_hwrm_allocate_vfs(bp, bp->pdev->max_vfs);
3355                         if (rc) {
3356                                 PMD_DRV_LOG(ERR, "Failed to allocate VFs\n");
3357                                 goto error_free;
3358                         }
3359                 } else {
3360                         rc = bnxt_hwrm_allocate_pf_only(bp);
3361                         if (rc) {
3362                                 PMD_DRV_LOG(ERR,
3363                                         "Failed to allocate PF resources\n");
3364                                 goto error_free;
3365                         }
3366                 }
3367         }
3368
3369         bnxt_hwrm_port_led_qcaps(bp);
3370
3371         rc = bnxt_setup_int(bp);
3372         if (rc)
3373                 goto error_free;
3374
3375         rc = bnxt_alloc_mem(bp);
3376         if (rc)
3377                 goto error_free_int;
3378
3379         rc = bnxt_request_int(bp);
3380         if (rc)
3381                 goto error_free_int;
3382
3383         rc = bnxt_alloc_def_cp_ring(bp);
3384         if (rc)
3385                 goto error_free_int;
3386
3387         bnxt_enable_int(bp);
3388         bnxt_init_nic(bp);
3389
3390         return 0;
3391
3392 error_free_int:
3393         bnxt_disable_int(bp);
3394         bnxt_free_def_cp_ring(bp);
3395         bnxt_hwrm_func_buf_unrgtr(bp);
3396         bnxt_free_int(bp);
3397         bnxt_free_mem(bp);
3398 error_free:
3399         bnxt_dev_uninit(eth_dev);
3400 error:
3401         return rc;
3402 }
3403
3404 static int
3405 bnxt_dev_uninit(struct rte_eth_dev *eth_dev) {
3406         struct bnxt *bp = eth_dev->data->dev_private;
3407         int rc;
3408
3409         if (rte_eal_process_type() != RTE_PROC_PRIMARY)
3410                 return -EPERM;
3411
3412         bnxt_disable_int(bp);
3413         bnxt_free_int(bp);
3414         bnxt_free_mem(bp);
3415         if (eth_dev->data->mac_addrs != NULL) {
3416                 rte_free(eth_dev->data->mac_addrs);
3417                 eth_dev->data->mac_addrs = NULL;
3418         }
3419         if (bp->grp_info != NULL) {
3420                 rte_free(bp->grp_info);
3421                 bp->grp_info = NULL;
3422         }
3423         rc = bnxt_hwrm_func_driver_unregister(bp, 0);
3424         bnxt_free_hwrm_resources(bp);
3425         rte_memzone_free((const struct rte_memzone *)bp->tx_mem_zone);
3426         rte_memzone_free((const struct rte_memzone *)bp->rx_mem_zone);
3427         if (bp->dev_stopped == 0)
3428                 bnxt_dev_close_op(eth_dev);
3429         if (bp->pf.vf_info)
3430                 rte_free(bp->pf.vf_info);
3431         eth_dev->dev_ops = NULL;
3432         eth_dev->rx_pkt_burst = NULL;
3433         eth_dev->tx_pkt_burst = NULL;
3434
3435         return rc;
3436 }
3437
3438 static int bnxt_pci_probe(struct rte_pci_driver *pci_drv __rte_unused,
3439         struct rte_pci_device *pci_dev)
3440 {
3441         return rte_eth_dev_pci_generic_probe(pci_dev, sizeof(struct bnxt),
3442                 bnxt_dev_init);
3443 }
3444
3445 static int bnxt_pci_remove(struct rte_pci_device *pci_dev)
3446 {
3447         return rte_eth_dev_pci_generic_remove(pci_dev, bnxt_dev_uninit);
3448 }
3449
3450 static struct rte_pci_driver bnxt_rte_pmd = {
3451         .id_table = bnxt_pci_id_map,
3452         .drv_flags = RTE_PCI_DRV_NEED_MAPPING |
3453                 RTE_PCI_DRV_INTR_LSC,
3454         .probe = bnxt_pci_probe,
3455         .remove = bnxt_pci_remove,
3456 };
3457
3458 static bool
3459 is_device_supported(struct rte_eth_dev *dev, struct rte_pci_driver *drv)
3460 {
3461         if (strcmp(dev->device->driver->name, drv->driver.name))
3462                 return false;
3463
3464         return true;
3465 }
3466
3467 bool is_bnxt_supported(struct rte_eth_dev *dev)
3468 {
3469         return is_device_supported(dev, &bnxt_rte_pmd);
3470 }
3471
3472 RTE_INIT(bnxt_init_log);
3473 static void
3474 bnxt_init_log(void)
3475 {
3476         bnxt_logtype_driver = rte_log_register("pmd.bnxt.driver");
3477         if (bnxt_logtype_driver >= 0)
3478                 rte_log_set_level(bnxt_logtype_driver, RTE_LOG_INFO);
3479 }
3480
3481 RTE_PMD_REGISTER_PCI(net_bnxt, bnxt_rte_pmd);
3482 RTE_PMD_REGISTER_PCI_TABLE(net_bnxt, bnxt_pci_id_map);
3483 RTE_PMD_REGISTER_KMOD_DEP(net_bnxt, "* igb_uio | uio_pci_generic | vfio-pci");