drivers/net/bnxt/bnxt_ethdev.c

   1 /*-
   2  *   BSD LICENSE
   3  *
   4  *   Copyright(c) Broadcom Limited.
   5  *   All rights reserved.
   6  *
   7  *   Redistribution and use in source and binary forms, with or without
   8  *   modification, are permitted provided that the following conditions
   9  *   are met:
  10  *
  11  *     * Redistributions of source code must retain the above copyright
  12  *       notice, this list of conditions and the following disclaimer.
  13  *     * Redistributions in binary form must reproduce the above copyright
  14  *       notice, this list of conditions and the following disclaimer in
  15  *       the documentation and/or other materials provided with the
  16  *       distribution.
  17  *     * Neither the name of Broadcom Corporation nor the names of its
  18  *       contributors may be used to endorse or promote products derived
  19  *       from this software without specific prior written permission.
  20  *
  21  *   THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
  22  *   "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
  23  *   LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
  24  *   A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
  25  *   OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
  26  *   SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
  27  *   LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
  28  *   DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
  29  *   THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
  30  *   (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
  31  *   OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
  32  */
  33
  34 #include <inttypes.h>
  35 #include <stdbool.h>
  36
  37 #include <rte_dev.h>
  38 #include <rte_ethdev.h>
  39 #include <rte_ethdev_pci.h>
  40 #include <rte_malloc.h>
  41 #include <rte_cycles.h>
  42
  43 #include "bnxt.h"
  44 #include "bnxt_cpr.h"
  45 #include "bnxt_filter.h"
  46 #include "bnxt_hwrm.h"
  47 #include "bnxt_irq.h"
  48 #include "bnxt_ring.h"
  49 #include "bnxt_rxq.h"
  50 #include "bnxt_rxr.h"
  51 #include "bnxt_stats.h"
  52 #include "bnxt_txq.h"
  53 #include "bnxt_txr.h"
  54 #include "bnxt_vnic.h"
  55 #include "hsi_struct_def_dpdk.h"
  56
  57 #define DRV_MODULE_NAME         "bnxt"
  58 static const char bnxt_version[] =
  59         "Broadcom Cumulus driver " DRV_MODULE_NAME "\n";
  60
  61 #define PCI_VENDOR_ID_BROADCOM 0x14E4
  62
  63 #define BROADCOM_DEV_ID_STRATUS_NIC 0x1614
  64 #define BROADCOM_DEV_ID_57414_VF 0x16c1
  65 #define BROADCOM_DEV_ID_57301 0x16c8
  66 #define BROADCOM_DEV_ID_57302 0x16c9
  67 #define BROADCOM_DEV_ID_57304_PF 0x16ca
  68 #define BROADCOM_DEV_ID_57304_VF 0x16cb
  69 #define BROADCOM_DEV_ID_57417_MF 0x16cc
  70 #define BROADCOM_DEV_ID_NS2 0x16cd
  71 #define BROADCOM_DEV_ID_57311 0x16ce
  72 #define BROADCOM_DEV_ID_57312 0x16cf
  73 #define BROADCOM_DEV_ID_57402 0x16d0
  74 #define BROADCOM_DEV_ID_57404 0x16d1
  75 #define BROADCOM_DEV_ID_57406_PF 0x16d2
  76 #define BROADCOM_DEV_ID_57406_VF 0x16d3
  77 #define BROADCOM_DEV_ID_57402_MF 0x16d4
  78 #define BROADCOM_DEV_ID_57407_RJ45 0x16d5
  79 #define BROADCOM_DEV_ID_57412 0x16d6
  80 #define BROADCOM_DEV_ID_57414 0x16d7
  81 #define BROADCOM_DEV_ID_57416_RJ45 0x16d8
  82 #define BROADCOM_DEV_ID_57417_RJ45 0x16d9
  83 #define BROADCOM_DEV_ID_5741X_VF 0x16dc
  84 #define BROADCOM_DEV_ID_57412_MF 0x16de
  85 #define BROADCOM_DEV_ID_57314 0x16df
  86 #define BROADCOM_DEV_ID_57317_RJ45 0x16e0
  87 #define BROADCOM_DEV_ID_5731X_VF 0x16e1
  88 #define BROADCOM_DEV_ID_57417_SFP 0x16e2
  89 #define BROADCOM_DEV_ID_57416_SFP 0x16e3
  90 #define BROADCOM_DEV_ID_57317_SFP 0x16e4
  91 #define BROADCOM_DEV_ID_57404_MF 0x16e7
  92 #define BROADCOM_DEV_ID_57406_MF 0x16e8
  93 #define BROADCOM_DEV_ID_57407_SFP 0x16e9
  94 #define BROADCOM_DEV_ID_57407_MF 0x16ea
  95 #define BROADCOM_DEV_ID_57414_MF 0x16ec
  96 #define BROADCOM_DEV_ID_57416_MF 0x16ee
  97
  98 static const struct rte_pci_id bnxt_pci_id_map[] = {
  99         { RTE_PCI_DEVICE(PCI_VENDOR_ID_BROADCOM, BROADCOM_DEV_ID_STRATUS_NIC) },
 100         { RTE_PCI_DEVICE(PCI_VENDOR_ID_BROADCOM, BROADCOM_DEV_ID_57414_VF) },
 101         { RTE_PCI_DEVICE(PCI_VENDOR_ID_BROADCOM, BROADCOM_DEV_ID_57301) },
 102         { RTE_PCI_DEVICE(PCI_VENDOR_ID_BROADCOM, BROADCOM_DEV_ID_57302) },
 103         { RTE_PCI_DEVICE(PCI_VENDOR_ID_BROADCOM, BROADCOM_DEV_ID_57304_PF) },
 104         { RTE_PCI_DEVICE(PCI_VENDOR_ID_BROADCOM, BROADCOM_DEV_ID_57304_VF) },
 105         { RTE_PCI_DEVICE(PCI_VENDOR_ID_BROADCOM, BROADCOM_DEV_ID_NS2) },
 106         { RTE_PCI_DEVICE(PCI_VENDOR_ID_BROADCOM, BROADCOM_DEV_ID_57402) },
 107         { RTE_PCI_DEVICE(PCI_VENDOR_ID_BROADCOM, BROADCOM_DEV_ID_57404) },
 108         { RTE_PCI_DEVICE(PCI_VENDOR_ID_BROADCOM, BROADCOM_DEV_ID_57406_PF) },
 109         { RTE_PCI_DEVICE(PCI_VENDOR_ID_BROADCOM, BROADCOM_DEV_ID_57406_VF) },
 110         { RTE_PCI_DEVICE(PCI_VENDOR_ID_BROADCOM, BROADCOM_DEV_ID_57402_MF) },
 111         { RTE_PCI_DEVICE(PCI_VENDOR_ID_BROADCOM, BROADCOM_DEV_ID_57407_RJ45) },
 112         { RTE_PCI_DEVICE(PCI_VENDOR_ID_BROADCOM, BROADCOM_DEV_ID_57404_MF) },
 113         { RTE_PCI_DEVICE(PCI_VENDOR_ID_BROADCOM, BROADCOM_DEV_ID_57406_MF) },
 114         { RTE_PCI_DEVICE(PCI_VENDOR_ID_BROADCOM, BROADCOM_DEV_ID_57407_SFP) },
 115         { RTE_PCI_DEVICE(PCI_VENDOR_ID_BROADCOM, BROADCOM_DEV_ID_57407_MF) },
 116         { RTE_PCI_DEVICE(PCI_VENDOR_ID_BROADCOM, BROADCOM_DEV_ID_5741X_VF) },
 117         { RTE_PCI_DEVICE(PCI_VENDOR_ID_BROADCOM, BROADCOM_DEV_ID_5731X_VF) },
 118         { RTE_PCI_DEVICE(PCI_VENDOR_ID_BROADCOM, BROADCOM_DEV_ID_57314) },
 119         { RTE_PCI_DEVICE(PCI_VENDOR_ID_BROADCOM, BROADCOM_DEV_ID_57417_MF) },
 120         { RTE_PCI_DEVICE(PCI_VENDOR_ID_BROADCOM, BROADCOM_DEV_ID_57311) },
 121         { RTE_PCI_DEVICE(PCI_VENDOR_ID_BROADCOM, BROADCOM_DEV_ID_57312) },
 122         { RTE_PCI_DEVICE(PCI_VENDOR_ID_BROADCOM, BROADCOM_DEV_ID_57412) },
 123         { RTE_PCI_DEVICE(PCI_VENDOR_ID_BROADCOM, BROADCOM_DEV_ID_57414) },
 124         { RTE_PCI_DEVICE(PCI_VENDOR_ID_BROADCOM, BROADCOM_DEV_ID_57416_RJ45) },
 125         { RTE_PCI_DEVICE(PCI_VENDOR_ID_BROADCOM, BROADCOM_DEV_ID_57417_RJ45) },
 126         { RTE_PCI_DEVICE(PCI_VENDOR_ID_BROADCOM, BROADCOM_DEV_ID_57412_MF) },
 127         { RTE_PCI_DEVICE(PCI_VENDOR_ID_BROADCOM, BROADCOM_DEV_ID_57317_RJ45) },
 128         { RTE_PCI_DEVICE(PCI_VENDOR_ID_BROADCOM, BROADCOM_DEV_ID_57417_SFP) },
 129         { RTE_PCI_DEVICE(PCI_VENDOR_ID_BROADCOM, BROADCOM_DEV_ID_57416_SFP) },
 130         { RTE_PCI_DEVICE(PCI_VENDOR_ID_BROADCOM, BROADCOM_DEV_ID_57317_SFP) },
 131         { RTE_PCI_DEVICE(PCI_VENDOR_ID_BROADCOM, BROADCOM_DEV_ID_57414_MF) },
 132         { RTE_PCI_DEVICE(PCI_VENDOR_ID_BROADCOM, BROADCOM_DEV_ID_57416_MF) },
 133         { .vendor_id = 0, /* sentinel */ },
 134 };
 135
 136 #define BNXT_ETH_RSS_SUPPORT (  \
 137         ETH_RSS_IPV4 |          \
 138         ETH_RSS_NONFRAG_IPV4_TCP |      \
 139         ETH_RSS_NONFRAG_IPV4_UDP |      \
 140         ETH_RSS_IPV6 |          \
 141         ETH_RSS_NONFRAG_IPV6_TCP |      \
 142         ETH_RSS_NONFRAG_IPV6_UDP)
 143
 144 /***********************/
 145
 146 /*
 147  * High level utility functions
 148  */
 149
 150 static void bnxt_free_mem(struct bnxt *bp)
 151 {
 152         bnxt_free_filter_mem(bp);
 153         bnxt_free_vnic_attributes(bp);
 154         bnxt_free_vnic_mem(bp);
 155
 156         bnxt_free_stats(bp);
 157         bnxt_free_tx_rings(bp);
 158         bnxt_free_rx_rings(bp);
 159         bnxt_free_def_cp_ring(bp);
 160 }
 161
 162 static int bnxt_alloc_mem(struct bnxt *bp)
 163 {
 164         int rc;
 165
 166         /* Default completion ring */
 167         rc = bnxt_init_def_ring_struct(bp, SOCKET_ID_ANY);
 168         if (rc)
 169                 goto alloc_mem_err;
 170
 171         rc = bnxt_alloc_rings(bp, 0, NULL, NULL,
 172                               bp->def_cp_ring, "def_cp");
 173         if (rc)
 174                 goto alloc_mem_err;
 175
 176         rc = bnxt_alloc_vnic_mem(bp);
 177         if (rc)
 178                 goto alloc_mem_err;
 179
 180         rc = bnxt_alloc_vnic_attributes(bp);
 181         if (rc)
 182                 goto alloc_mem_err;
 183
 184         rc = bnxt_alloc_filter_mem(bp);
 185         if (rc)
 186                 goto alloc_mem_err;
 187
 188         return 0;
 189
 190 alloc_mem_err:
 191         bnxt_free_mem(bp);
 192         return rc;
 193 }
 194
 195 static int bnxt_init_chip(struct bnxt *bp)
 196 {
 197         unsigned int i, rss_idx, fw_idx;
 198         struct rte_eth_link new;
 199         int rc;
 200
 201         rc = bnxt_alloc_all_hwrm_stat_ctxs(bp);
 202         if (rc) {
 203                 RTE_LOG(ERR, PMD, "HWRM stat ctx alloc failure rc: %x\n", rc);
 204                 goto err_out;
 205         }
 206
 207         rc = bnxt_alloc_hwrm_rings(bp);
 208         if (rc) {
 209                 RTE_LOG(ERR, PMD, "HWRM ring alloc failure rc: %x\n", rc);
 210                 goto err_out;
 211         }
 212
 213         rc = bnxt_alloc_all_hwrm_ring_grps(bp);
 214         if (rc) {
 215                 RTE_LOG(ERR, PMD, "HWRM ring grp alloc failure: %x\n", rc);
 216                 goto err_out;
 217         }
 218
 219         rc = bnxt_mq_rx_configure(bp);
 220         if (rc) {
 221                 RTE_LOG(ERR, PMD, "MQ mode configure failure rc: %x\n", rc);
 222                 goto err_out;
 223         }
 224
 225         /* VNIC configuration */
 226         for (i = 0; i < bp->nr_vnics; i++) {
 227                 struct bnxt_vnic_info *vnic = &bp->vnic_info[i];
 228
 229                 rc = bnxt_hwrm_vnic_alloc(bp, vnic);
 230                 if (rc) {
 231                         RTE_LOG(ERR, PMD, "HWRM vnic alloc failure rc: %x\n",
 232                                 rc);
 233                         goto err_out;
 234                 }
 235
 236                 rc = bnxt_hwrm_vnic_ctx_alloc(bp, vnic);
 237                 if (rc) {
 238                         RTE_LOG(ERR, PMD,
 239                                 "HWRM vnic ctx alloc failure rc: %x\n", rc);
 240                         goto err_out;
 241                 }
 242
 243                 rc = bnxt_hwrm_vnic_cfg(bp, vnic);
 244                 if (rc) {
 245                         RTE_LOG(ERR, PMD, "HWRM vnic cfg failure rc: %x\n", rc);
 246                         goto err_out;
 247                 }
 248
 249                 rc = bnxt_set_hwrm_vnic_filters(bp, vnic);
 250                 if (rc) {
 251                         RTE_LOG(ERR, PMD, "HWRM vnic filter failure rc: %x\n",
 252                                 rc);
 253                         goto err_out;
 254                 }
 255                 if (vnic->rss_table && vnic->hash_type) {
 256                         /*
 257                          * Fill the RSS hash & redirection table with
 258                          * ring group ids for all VNICs
 259                          */
 260                         for (rss_idx = 0, fw_idx = 0;
 261                              rss_idx < HW_HASH_INDEX_SIZE;
 262                              rss_idx++, fw_idx++) {
 263                                 if (vnic->fw_grp_ids[fw_idx] ==
 264                                     INVALID_HW_RING_ID)
 265                                         fw_idx = 0;
 266                                 vnic->rss_table[rss_idx] =
 267                                                 vnic->fw_grp_ids[fw_idx];
 268                         }
 269                         rc = bnxt_hwrm_vnic_rss_cfg(bp, vnic);
 270                         if (rc) {
 271                                 RTE_LOG(ERR, PMD,
 272                                         "HWRM vnic set RSS failure rc: %x\n",
 273                                         rc);
 274                                 goto err_out;
 275                         }
 276                 }
 277         }
 278         rc = bnxt_hwrm_cfa_l2_set_rx_mask(bp, &bp->vnic_info[0]);
 279         if (rc) {
 280                 RTE_LOG(ERR, PMD,
 281                         "HWRM cfa l2 rx mask failure rc: %x\n", rc);
 282                 goto err_out;
 283         }
 284
 285         rc = bnxt_get_hwrm_link_config(bp, &new);
 286         if (rc) {
 287                 RTE_LOG(ERR, PMD, "HWRM Get link config failure rc: %x\n", rc);
 288                 goto err_out;
 289         }
 290
 291         if (!bp->link_info.link_up) {
 292                 rc = bnxt_set_hwrm_link_config(bp, true);
 293                 if (rc) {
 294                         RTE_LOG(ERR, PMD,
 295                                 "HWRM link config failure rc: %x\n", rc);
 296                         goto err_out;
 297                 }
 298         }
 299
 300         return 0;
 301
 302 err_out:
 303         bnxt_free_all_hwrm_resources(bp);
 304
 305         return rc;
 306 }
 307
 308 static int bnxt_shutdown_nic(struct bnxt *bp)
 309 {
 310         bnxt_free_all_hwrm_resources(bp);
 311         bnxt_free_all_filters(bp);
 312         bnxt_free_all_vnics(bp);
 313         return 0;
 314 }
 315
 316 static int bnxt_init_nic(struct bnxt *bp)
 317 {
 318         int rc;
 319
 320         bnxt_init_ring_grps(bp);
 321         bnxt_init_vnics(bp);
 322         bnxt_init_filters(bp);
 323
 324         rc = bnxt_init_chip(bp);
 325         if (rc)
 326                 return rc;
 327
 328         return 0;
 329 }
 330
 331 /*
 332  * Device configuration and status function
 333  */
 334
 335 static void bnxt_dev_info_get_op(struct rte_eth_dev *eth_dev,
 336                                   struct rte_eth_dev_info *dev_info)
 337 {
 338         struct bnxt *bp = (struct bnxt *)eth_dev->data->dev_private;
 339         uint16_t max_vnics, i, j, vpool, vrxq;
 340
 341         dev_info->pci_dev = RTE_ETH_DEV_TO_PCI(eth_dev);
 342
 343         /* MAC Specifics */
 344         dev_info->max_mac_addrs = MAX_NUM_MAC_ADDR;
 345         dev_info->max_hash_mac_addrs = 0;
 346
 347         /* PF/VF specifics */
 348         if (BNXT_PF(bp))
 349                 dev_info->max_vfs = bp->pdev->max_vfs;
 350         dev_info->max_rx_queues = bp->max_rx_rings;
 351         dev_info->max_tx_queues = bp->max_tx_rings;
 352         dev_info->reta_size = bp->max_rsscos_ctx;
 353         max_vnics = bp->max_vnics;
 354
 355         /* Fast path specifics */
 356         dev_info->min_rx_bufsize = 1;
 357         dev_info->max_rx_pktlen = BNXT_MAX_MTU + ETHER_HDR_LEN + ETHER_CRC_LEN
 358                                   + VLAN_TAG_SIZE;
 359         dev_info->rx_offload_capa = 0;
 360         dev_info->tx_offload_capa = DEV_TX_OFFLOAD_IPV4_CKSUM |
 361                                         DEV_TX_OFFLOAD_TCP_CKSUM |
 362                                         DEV_TX_OFFLOAD_UDP_CKSUM |
 363                                         DEV_TX_OFFLOAD_TCP_TSO;
 364
 365         /* *INDENT-OFF* */
 366         dev_info->default_rxconf = (struct rte_eth_rxconf) {
 367                 .rx_thresh = {
 368                         .pthresh = 8,
 369                         .hthresh = 8,
 370                         .wthresh = 0,
 371                 },
 372                 .rx_free_thresh = 32,
 373                 .rx_drop_en = 0,
 374         };
 375
 376         dev_info->default_txconf = (struct rte_eth_txconf) {
 377                 .tx_thresh = {
 378                         .pthresh = 32,
 379                         .hthresh = 0,
 380                         .wthresh = 0,
 381                 },
 382                 .tx_free_thresh = 32,
 383                 .tx_rs_thresh = 32,
 384                 .txq_flags = ETH_TXQ_FLAGS_NOMULTSEGS |
 385                              ETH_TXQ_FLAGS_NOOFFLOADS,
 386         };
 387         eth_dev->data->dev_conf.intr_conf.lsc = 1;
 388
 389         /* *INDENT-ON* */
 390
 391         /*
 392          * TODO: default_rxconf, default_txconf, rx_desc_lim, and tx_desc_lim
 393          *       need further investigation.
 394          */
 395
 396         /* VMDq resources */
 397         vpool = 64; /* ETH_64_POOLS */
 398         vrxq = 128; /* ETH_VMDQ_DCB_NUM_QUEUES */
 399         for (i = 0; i < 4; vpool >>= 1, i++) {
 400                 if (max_vnics > vpool) {
 401                         for (j = 0; j < 5; vrxq >>= 1, j++) {
 402                                 if (dev_info->max_rx_queues > vrxq) {
 403                                         if (vpool > vrxq)
 404                                                 vpool = vrxq;
 405                                         goto found;
 406                                 }
 407                         }
 408                         /* Not enough resources to support VMDq */
 409                         break;
 410                 }
 411         }
 412         /* Not enough resources to support VMDq */
 413         vpool = 0;
 414         vrxq = 0;
 415 found:
 416         dev_info->max_vmdq_pools = vpool;
 417         dev_info->vmdq_queue_num = vrxq;
 418
 419         dev_info->vmdq_pool_base = 0;
 420         dev_info->vmdq_queue_base = 0;
 421 }
 422
 423 /* Configure the device based on the configuration provided */
 424 static int bnxt_dev_configure_op(struct rte_eth_dev *eth_dev)
 425 {
 426         struct bnxt *bp = (struct bnxt *)eth_dev->data->dev_private;
 427
 428         bp->rx_queues = (void *)eth_dev->data->rx_queues;
 429         bp->tx_queues = (void *)eth_dev->data->tx_queues;
 430
 431         /* Inherit new configurations */
 432         bp->rx_nr_rings = eth_dev->data->nb_rx_queues;
 433         bp->tx_nr_rings = eth_dev->data->nb_tx_queues;
 434         bp->rx_cp_nr_rings = bp->rx_nr_rings;
 435         bp->tx_cp_nr_rings = bp->tx_nr_rings;
 436
 437         if (eth_dev->data->dev_conf.rxmode.jumbo_frame)
 438                 eth_dev->data->mtu =
 439                                 eth_dev->data->dev_conf.rxmode.max_rx_pkt_len -
 440                                 ETHER_HDR_LEN - ETHER_CRC_LEN - VLAN_TAG_SIZE;
 441         return 0;
 442 }
 443
 444 static inline int
 445 rte_bnxt_atomic_write_link_status(struct rte_eth_dev *eth_dev,
 446                                 struct rte_eth_link *link)
 447 {
 448         struct rte_eth_link *dst = &eth_dev->data->dev_link;
 449         struct rte_eth_link *src = link;
 450
 451         if (rte_atomic64_cmpset((uint64_t *)dst, *(uint64_t *)dst,
 452                                         *(uint64_t *)src) == 0)
 453                 return 1;
 454
 455         return 0;
 456 }
 457
 458 static void bnxt_print_link_info(struct rte_eth_dev *eth_dev)
 459 {
 460         struct rte_eth_link *link = &eth_dev->data->dev_link;
 461
 462         if (link->link_status)
 463                 RTE_LOG(INFO, PMD, "Port %d Link Up - speed %u Mbps - %s\n",
 464                         (uint8_t)(eth_dev->data->port_id),
 465                         (uint32_t)link->link_speed,
 466                         (link->link_duplex == ETH_LINK_FULL_DUPLEX) ?
 467                         ("full-duplex") : ("half-duplex\n"));
 468         else
 469                 RTE_LOG(INFO, PMD, "Port %d Link Down\n",
 470                         (uint8_t)(eth_dev->data->port_id));
 471 }
 472
 473 static int bnxt_dev_lsc_intr_setup(struct rte_eth_dev *eth_dev)
 474 {
 475         bnxt_print_link_info(eth_dev);
 476         return 0;
 477 }
 478
 479 static int bnxt_dev_start_op(struct rte_eth_dev *eth_dev)
 480 {
 481         struct bnxt *bp = (struct bnxt *)eth_dev->data->dev_private;
 482         int rc;
 483
 484         bp->dev_stopped = 0;
 485
 486         rc = bnxt_init_nic(bp);
 487         if (rc)
 488                 goto error;
 489
 490         bnxt_link_update_op(eth_dev, 0);
 491         return 0;
 492
 493 error:
 494         bnxt_shutdown_nic(bp);
 495         bnxt_free_tx_mbufs(bp);
 496         bnxt_free_rx_mbufs(bp);
 497         return rc;
 498 }
 499
 500 static int bnxt_dev_set_link_up_op(struct rte_eth_dev *eth_dev)
 501 {
 502         struct bnxt *bp = (struct bnxt *)eth_dev->data->dev_private;
 503
 504         eth_dev->data->dev_link.link_status = 1;
 505         bnxt_set_hwrm_link_config(bp, true);
 506         return 0;
 507 }
 508
 509 static int bnxt_dev_set_link_down_op(struct rte_eth_dev *eth_dev)
 510 {
 511         struct bnxt *bp = (struct bnxt *)eth_dev->data->dev_private;
 512
 513         eth_dev->data->dev_link.link_status = 0;
 514         bnxt_set_hwrm_link_config(bp, false);
 515         return 0;
 516 }
 517
 518 /* Unload the driver, release resources */
 519 static void bnxt_dev_stop_op(struct rte_eth_dev *eth_dev)
 520 {
 521         struct bnxt *bp = (struct bnxt *)eth_dev->data->dev_private;
 522
 523         if (bp->eth_dev->data->dev_started) {
 524                 /* TBD: STOP HW queues DMA */
 525                 eth_dev->data->dev_link.link_status = 0;
 526         }
 527         bnxt_set_hwrm_link_config(bp, false);
 528         bnxt_shutdown_nic(bp);
 529         bp->dev_stopped = 1;
 530 }
 531
 532 static void bnxt_dev_close_op(struct rte_eth_dev *eth_dev)
 533 {
 534         struct bnxt *bp = (struct bnxt *)eth_dev->data->dev_private;
 535
 536         if (bp->dev_stopped == 0)
 537                 bnxt_dev_stop_op(eth_dev);
 538
 539         bnxt_free_tx_mbufs(bp);
 540         bnxt_free_rx_mbufs(bp);
 541         bnxt_free_mem(bp);
 542         if (eth_dev->data->mac_addrs != NULL) {
 543                 rte_free(eth_dev->data->mac_addrs);
 544                 eth_dev->data->mac_addrs = NULL;
 545         }
 546         if (bp->grp_info != NULL) {
 547                 rte_free(bp->grp_info);
 548                 bp->grp_info = NULL;
 549         }
 550 }
 551
 552 static void bnxt_mac_addr_remove_op(struct rte_eth_dev *eth_dev,
 553                                     uint32_t index)
 554 {
 555         struct bnxt *bp = (struct bnxt *)eth_dev->data->dev_private;
 556         uint64_t pool_mask = eth_dev->data->mac_pool_sel[index];
 557         struct bnxt_vnic_info *vnic;
 558         struct bnxt_filter_info *filter, *temp_filter;
 559         int i;
 560
 561         /*
 562          * Loop through all VNICs from the specified filter flow pools to
 563          * remove the corresponding MAC addr filter
 564          */
 565         for (i = 0; i < MAX_FF_POOLS; i++) {
 566                 if (!(pool_mask & (1ULL << i)))
 567                         continue;
 568
 569                 STAILQ_FOREACH(vnic, &bp->ff_pool[i], next) {
 570                         filter = STAILQ_FIRST(&vnic->filter);
 571                         while (filter) {
 572                                 temp_filter = STAILQ_NEXT(filter, next);
 573                                 if (filter->mac_index == index) {
 574                                         STAILQ_REMOVE(&vnic->filter, filter,
 575                                                       bnxt_filter_info, next);
 576                                         bnxt_hwrm_clear_filter(bp, filter);
 577                                         filter->mac_index = INVALID_MAC_INDEX;
 578                                         memset(&filter->l2_addr, 0,
 579                                                ETHER_ADDR_LEN);
 580                                         STAILQ_INSERT_TAIL(
 581                                                         &bp->free_filter_list,
 582                                                         filter, next);
 583                                 }
 584                                 filter = temp_filter;
 585                         }
 586                 }
 587         }
 588 }
 589
 590 static int bnxt_mac_addr_add_op(struct rte_eth_dev *eth_dev,
 591                                 struct ether_addr *mac_addr,
 592                                 uint32_t index, uint32_t pool)
 593 {
 594         struct bnxt *bp = (struct bnxt *)eth_dev->data->dev_private;
 595         struct bnxt_vnic_info *vnic = STAILQ_FIRST(&bp->ff_pool[pool]);
 596         struct bnxt_filter_info *filter;
 597
 598         if (BNXT_VF(bp)) {
 599                 RTE_LOG(ERR, PMD, "Cannot add MAC address to a VF interface\n");
 600                 return -ENOTSUP;
 601         }
 602
 603         if (!vnic) {
 604                 RTE_LOG(ERR, PMD, "VNIC not found for pool %d!\n", pool);
 605                 return -EINVAL;
 606         }
 607         /* Attach requested MAC address to the new l2_filter */
 608         STAILQ_FOREACH(filter, &vnic->filter, next) {
 609                 if (filter->mac_index == index) {
 610                         RTE_LOG(ERR, PMD,
 611                                 "MAC addr already existed for pool %d\n", pool);
 612                         return -EINVAL;
 613                 }
 614         }
 615         filter = bnxt_alloc_filter(bp);
 616         if (!filter) {
 617                 RTE_LOG(ERR, PMD, "L2 filter alloc failed\n");
 618                 return -ENODEV;
 619         }
 620         STAILQ_INSERT_TAIL(&vnic->filter, filter, next);
 621         filter->mac_index = index;
 622         memcpy(filter->l2_addr, mac_addr, ETHER_ADDR_LEN);
 623         return bnxt_hwrm_set_filter(bp, vnic, filter);
 624 }
 625
 626 int bnxt_link_update_op(struct rte_eth_dev *eth_dev, int wait_to_complete)
 627 {
 628         int rc = 0;
 629         struct bnxt *bp = (struct bnxt *)eth_dev->data->dev_private;
 630         struct rte_eth_link new;
 631         unsigned int cnt = BNXT_LINK_WAIT_CNT;
 632
 633         memset(&new, 0, sizeof(new));
 634         do {
 635                 /* Retrieve link info from hardware */
 636                 rc = bnxt_get_hwrm_link_config(bp, &new);
 637                 if (rc) {
 638                         new.link_speed = ETH_LINK_SPEED_100M;
 639                         new.link_duplex = ETH_LINK_FULL_DUPLEX;
 640                         RTE_LOG(ERR, PMD,
 641                                 "Failed to retrieve link rc = 0x%x!", rc);
 642                         goto out;
 643                 }
 644                 rte_delay_ms(BNXT_LINK_WAIT_INTERVAL);
 645
 646                 if (!wait_to_complete)
 647                         break;
 648         } while (!new.link_status && cnt--);
 649
 650 out:
 651         /* Timed out or success */
 652         if (new.link_status != eth_dev->data->dev_link.link_status ||
 653         new.link_speed != eth_dev->data->dev_link.link_speed) {
 654                 rte_bnxt_atomic_write_link_status(eth_dev, &new);
 655                 bnxt_print_link_info(eth_dev);
 656         }
 657
 658         return rc;
 659 }
 660
 661 static void bnxt_promiscuous_enable_op(struct rte_eth_dev *eth_dev)
 662 {
 663         struct bnxt *bp = (struct bnxt *)eth_dev->data->dev_private;
 664         struct bnxt_vnic_info *vnic;
 665
 666         if (bp->vnic_info == NULL)
 667                 return;
 668
 669         vnic = &bp->vnic_info[0];
 670
 671         vnic->flags |= BNXT_VNIC_INFO_PROMISC;
 672         bnxt_hwrm_cfa_l2_set_rx_mask(bp, vnic);
 673 }
 674
 675 static void bnxt_promiscuous_disable_op(struct rte_eth_dev *eth_dev)
 676 {
 677         struct bnxt *bp = (struct bnxt *)eth_dev->data->dev_private;
 678         struct bnxt_vnic_info *vnic;
 679
 680         if (bp->vnic_info == NULL)
 681                 return;
 682
 683         vnic = &bp->vnic_info[0];
 684
 685         vnic->flags &= ~BNXT_VNIC_INFO_PROMISC;
 686         bnxt_hwrm_cfa_l2_set_rx_mask(bp, vnic);
 687 }
 688
 689 static void bnxt_allmulticast_enable_op(struct rte_eth_dev *eth_dev)
 690 {
 691         struct bnxt *bp = (struct bnxt *)eth_dev->data->dev_private;
 692         struct bnxt_vnic_info *vnic;
 693
 694         if (bp->vnic_info == NULL)
 695                 return;
 696
 697         vnic = &bp->vnic_info[0];
 698
 699         vnic->flags |= BNXT_VNIC_INFO_ALLMULTI;
 700         bnxt_hwrm_cfa_l2_set_rx_mask(bp, vnic);
 701 }
 702
 703 static void bnxt_allmulticast_disable_op(struct rte_eth_dev *eth_dev)
 704 {
 705         struct bnxt *bp = (struct bnxt *)eth_dev->data->dev_private;
 706         struct bnxt_vnic_info *vnic;
 707
 708         if (bp->vnic_info == NULL)
 709                 return;
 710
 711         vnic = &bp->vnic_info[0];
 712
 713         vnic->flags &= ~BNXT_VNIC_INFO_ALLMULTI;
 714         bnxt_hwrm_cfa_l2_set_rx_mask(bp, vnic);
 715 }
 716
 717 static int bnxt_reta_update_op(struct rte_eth_dev *eth_dev,
 718                             struct rte_eth_rss_reta_entry64 *reta_conf,
 719                             uint16_t reta_size)
 720 {
 721         struct bnxt *bp = (struct bnxt *)eth_dev->data->dev_private;
 722         struct rte_eth_conf *dev_conf = &bp->eth_dev->data->dev_conf;
 723         struct bnxt_vnic_info *vnic;
 724         int i;
 725
 726         if (!(dev_conf->rxmode.mq_mode & ETH_MQ_RX_RSS_FLAG))
 727                 return -EINVAL;
 728
 729         if (reta_size != HW_HASH_INDEX_SIZE) {
 730                 RTE_LOG(ERR, PMD, "The configured hash table lookup size "
 731                         "(%d) must equal the size supported by the hardware "
 732                         "(%d)\n", reta_size, HW_HASH_INDEX_SIZE);
 733                 return -EINVAL;
 734         }
 735         /* Update the RSS VNIC(s) */
 736         for (i = 0; i < MAX_FF_POOLS; i++) {
 737                 STAILQ_FOREACH(vnic, &bp->ff_pool[i], next) {
 738                         memcpy(vnic->rss_table, reta_conf, reta_size);
 739
 740                         bnxt_hwrm_vnic_rss_cfg(bp, vnic);
 741                 }
 742         }
 743         return 0;
 744 }
 745
 746 static int bnxt_reta_query_op(struct rte_eth_dev *eth_dev,
 747                               struct rte_eth_rss_reta_entry64 *reta_conf,
 748                               uint16_t reta_size)
 749 {
 750         struct bnxt *bp = (struct bnxt *)eth_dev->data->dev_private;
 751         struct bnxt_vnic_info *vnic = &bp->vnic_info[0];
 752         struct rte_intr_handle *intr_handle
 753                 = &bp->pdev->intr_handle;
 754
 755         /* Retrieve from the default VNIC */
 756         if (!vnic)
 757                 return -EINVAL;
 758         if (!vnic->rss_table)
 759                 return -EINVAL;
 760
 761         if (reta_size != HW_HASH_INDEX_SIZE) {
 762                 RTE_LOG(ERR, PMD, "The configured hash table lookup size "
 763                         "(%d) must equal the size supported by the hardware "
 764                         "(%d)\n", reta_size, HW_HASH_INDEX_SIZE);
 765                 return -EINVAL;
 766         }
 767         /* EW - need to revisit here copying from u64 to u16 */
 768         memcpy(reta_conf, vnic->rss_table, reta_size);
 769
 770         if (rte_intr_allow_others(intr_handle)) {
 771                 if (eth_dev->data->dev_conf.intr_conf.lsc != 0)
 772                         bnxt_dev_lsc_intr_setup(eth_dev);
 773         }
 774
 775         return 0;
 776 }
 777
 778 static int bnxt_rss_hash_update_op(struct rte_eth_dev *eth_dev,
 779                                    struct rte_eth_rss_conf *rss_conf)
 780 {
 781         struct bnxt *bp = (struct bnxt *)eth_dev->data->dev_private;
 782         struct rte_eth_conf *dev_conf = &bp->eth_dev->data->dev_conf;
 783         struct bnxt_vnic_info *vnic;
 784         uint16_t hash_type = 0;
 785         int i;
 786
 787         /*
 788          * If RSS enablement were different than dev_configure,
 789          * then return -EINVAL
 790          */
 791         if (dev_conf->rxmode.mq_mode & ETH_MQ_RX_RSS_FLAG) {
 792                 if (!rss_conf->rss_hf)
 793                         return -EINVAL;
 794         } else {
 795                 if (rss_conf->rss_hf & BNXT_ETH_RSS_SUPPORT)
 796                         return -EINVAL;
 797         }
 798         if (rss_conf->rss_hf & ETH_RSS_IPV4)
 799                 hash_type |= HWRM_VNIC_RSS_CFG_INPUT_HASH_TYPE_IPV4;
 800         if (rss_conf->rss_hf & ETH_RSS_NONFRAG_IPV4_TCP)
 801                 hash_type |= HWRM_VNIC_RSS_CFG_INPUT_HASH_TYPE_TCP_IPV4;
 802         if (rss_conf->rss_hf & ETH_RSS_NONFRAG_IPV4_UDP)
 803                 hash_type |= HWRM_VNIC_RSS_CFG_INPUT_HASH_TYPE_UDP_IPV4;
 804         if (rss_conf->rss_hf & ETH_RSS_IPV6)
 805                 hash_type |= HWRM_VNIC_RSS_CFG_INPUT_HASH_TYPE_IPV6;
 806         if (rss_conf->rss_hf & ETH_RSS_NONFRAG_IPV6_TCP)
 807                 hash_type |= HWRM_VNIC_RSS_CFG_INPUT_HASH_TYPE_TCP_IPV6;
 808         if (rss_conf->rss_hf & ETH_RSS_NONFRAG_IPV6_UDP)
 809                 hash_type |= HWRM_VNIC_RSS_CFG_INPUT_HASH_TYPE_UDP_IPV6;
 810
 811         /* Update the RSS VNIC(s) */
 812         for (i = 0; i < MAX_FF_POOLS; i++) {
 813                 STAILQ_FOREACH(vnic, &bp->ff_pool[i], next) {
 814                         vnic->hash_type = hash_type;
 815
 816                         /*
 817                          * Use the supplied key if the key length is
 818                          * acceptable and the rss_key is not NULL
 819                          */
 820                         if (rss_conf->rss_key &&
 821                             rss_conf->rss_key_len <= HW_HASH_KEY_SIZE)
 822                                 memcpy(vnic->rss_hash_key, rss_conf->rss_key,
 823                                        rss_conf->rss_key_len);
 824
 825                         bnxt_hwrm_vnic_rss_cfg(bp, vnic);
 826                 }
 827         }
 828         return 0;
 829 }
 830
 831 static int bnxt_rss_hash_conf_get_op(struct rte_eth_dev *eth_dev,
 832                                      struct rte_eth_rss_conf *rss_conf)
 833 {
 834         struct bnxt *bp = (struct bnxt *)eth_dev->data->dev_private;
 835         struct bnxt_vnic_info *vnic = &bp->vnic_info[0];
 836         int len;
 837         uint32_t hash_types;
 838
 839         /* RSS configuration is the same for all VNICs */
 840         if (vnic && vnic->rss_hash_key) {
 841                 if (rss_conf->rss_key) {
 842                         len = rss_conf->rss_key_len <= HW_HASH_KEY_SIZE ?
 843                               rss_conf->rss_key_len : HW_HASH_KEY_SIZE;
 844                         memcpy(rss_conf->rss_key, vnic->rss_hash_key, len);
 845                 }
 846
 847                 hash_types = vnic->hash_type;
 848                 rss_conf->rss_hf = 0;
 849                 if (hash_types & HWRM_VNIC_RSS_CFG_INPUT_HASH_TYPE_IPV4) {
 850                         rss_conf->rss_hf |= ETH_RSS_IPV4;
 851                         hash_types &= ~HWRM_VNIC_RSS_CFG_INPUT_HASH_TYPE_IPV4;
 852                 }
 853                 if (hash_types & HWRM_VNIC_RSS_CFG_INPUT_HASH_TYPE_TCP_IPV4) {
 854                         rss_conf->rss_hf |= ETH_RSS_NONFRAG_IPV4_TCP;
 855                         hash_types &=
 856                                 ~HWRM_VNIC_RSS_CFG_INPUT_HASH_TYPE_TCP_IPV4;
 857                 }
 858                 if (hash_types & HWRM_VNIC_RSS_CFG_INPUT_HASH_TYPE_UDP_IPV4) {
 859                         rss_conf->rss_hf |= ETH_RSS_NONFRAG_IPV4_UDP;
 860                         hash_types &=
 861                                 ~HWRM_VNIC_RSS_CFG_INPUT_HASH_TYPE_UDP_IPV4;
 862                 }
 863                 if (hash_types & HWRM_VNIC_RSS_CFG_INPUT_HASH_TYPE_IPV6) {
 864                         rss_conf->rss_hf |= ETH_RSS_IPV6;
 865                         hash_types &= ~HWRM_VNIC_RSS_CFG_INPUT_HASH_TYPE_IPV6;
 866                 }
 867                 if (hash_types & HWRM_VNIC_RSS_CFG_INPUT_HASH_TYPE_TCP_IPV6) {
 868                         rss_conf->rss_hf |= ETH_RSS_NONFRAG_IPV6_TCP;
 869                         hash_types &=
 870                                 ~HWRM_VNIC_RSS_CFG_INPUT_HASH_TYPE_TCP_IPV6;
 871                 }
 872                 if (hash_types & HWRM_VNIC_RSS_CFG_INPUT_HASH_TYPE_UDP_IPV6) {
 873                         rss_conf->rss_hf |= ETH_RSS_NONFRAG_IPV6_UDP;
 874                         hash_types &=
 875                                 ~HWRM_VNIC_RSS_CFG_INPUT_HASH_TYPE_UDP_IPV6;
 876                 }
 877                 if (hash_types) {
 878                         RTE_LOG(ERR, PMD,
 879                                 "Unknwon RSS config from firmware (%08x), RSS disabled",
 880                                 vnic->hash_type);
 881                         return -ENOTSUP;
 882                 }
 883         } else {
 884                 rss_conf->rss_hf = 0;
 885         }
 886         return 0;
 887 }
 888
 889 static int bnxt_flow_ctrl_get_op(struct rte_eth_dev *dev,
 890                                struct rte_eth_fc_conf *fc_conf)
 891 {
 892         struct bnxt *bp = (struct bnxt *)dev->data->dev_private;
 893         struct rte_eth_link link_info;
 894         int rc;
 895
 896         rc = bnxt_get_hwrm_link_config(bp, &link_info);
 897         if (rc)
 898                 return rc;
 899
 900         memset(fc_conf, 0, sizeof(*fc_conf));
 901         if (bp->link_info.auto_pause)
 902                 fc_conf->autoneg = 1;
 903         switch (bp->link_info.pause) {
 904         case 0:
 905                 fc_conf->mode = RTE_FC_NONE;
 906                 break;
 907         case HWRM_PORT_PHY_QCFG_OUTPUT_PAUSE_TX:
 908                 fc_conf->mode = RTE_FC_TX_PAUSE;
 909                 break;
 910         case HWRM_PORT_PHY_QCFG_OUTPUT_PAUSE_RX:
 911                 fc_conf->mode = RTE_FC_RX_PAUSE;
 912                 break;
 913         case (HWRM_PORT_PHY_QCFG_OUTPUT_PAUSE_TX |
 914                         HWRM_PORT_PHY_QCFG_OUTPUT_PAUSE_RX):
 915                 fc_conf->mode = RTE_FC_FULL;
 916                 break;
 917         }
 918         return 0;
 919 }
 920
 921 static int bnxt_flow_ctrl_set_op(struct rte_eth_dev *dev,
 922                                struct rte_eth_fc_conf *fc_conf)
 923 {
 924         struct bnxt *bp = (struct bnxt *)dev->data->dev_private;
 925
 926         if (BNXT_NPAR_PF(bp) || BNXT_VF(bp)) {
 927                 RTE_LOG(ERR, PMD, "Flow Control Settings cannot be modified\n");
 928                 return -ENOTSUP;
 929         }
 930
 931         switch (fc_conf->mode) {
 932         case RTE_FC_NONE:
 933                 bp->link_info.auto_pause = 0;
 934                 bp->link_info.force_pause = 0;
 935                 break;
 936         case RTE_FC_RX_PAUSE:
 937                 if (fc_conf->autoneg) {
 938                         bp->link_info.auto_pause =
 939                                         HWRM_PORT_PHY_CFG_INPUT_AUTO_PAUSE_RX;
 940                         bp->link_info.force_pause = 0;
 941                 } else {
 942                         bp->link_info.auto_pause = 0;
 943                         bp->link_info.force_pause =
 944                                         HWRM_PORT_PHY_CFG_INPUT_FORCE_PAUSE_RX;
 945                 }
 946                 break;
 947         case RTE_FC_TX_PAUSE:
 948                 if (fc_conf->autoneg) {
 949                         bp->link_info.auto_pause =
 950                                         HWRM_PORT_PHY_CFG_INPUT_AUTO_PAUSE_TX;
 951                         bp->link_info.force_pause = 0;
 952                 } else {
 953                         bp->link_info.auto_pause = 0;
 954                         bp->link_info.force_pause =
 955                                         HWRM_PORT_PHY_CFG_INPUT_FORCE_PAUSE_TX;
 956                 }
 957                 break;
 958         case RTE_FC_FULL:
 959                 if (fc_conf->autoneg) {
 960                         bp->link_info.auto_pause =
 961                                         HWRM_PORT_PHY_CFG_INPUT_AUTO_PAUSE_TX |
 962                                         HWRM_PORT_PHY_CFG_INPUT_AUTO_PAUSE_RX;
 963                         bp->link_info.force_pause = 0;
 964                 } else {
 965                         bp->link_info.auto_pause = 0;
 966                         bp->link_info.force_pause =
 967                                         HWRM_PORT_PHY_CFG_INPUT_FORCE_PAUSE_TX |
 968                                         HWRM_PORT_PHY_CFG_INPUT_FORCE_PAUSE_RX;
 969                 }
 970                 break;
 971         }
 972         return bnxt_set_hwrm_link_config(bp, true);
 973 }
 974
 975 /*
 976  * Initialization
 977  */
 978
 979 static const struct eth_dev_ops bnxt_dev_ops = {
 980         .dev_infos_get = bnxt_dev_info_get_op,
 981         .dev_close = bnxt_dev_close_op,
 982         .dev_configure = bnxt_dev_configure_op,
 983         .dev_start = bnxt_dev_start_op,
 984         .dev_stop = bnxt_dev_stop_op,
 985         .dev_set_link_up = bnxt_dev_set_link_up_op,
 986         .dev_set_link_down = bnxt_dev_set_link_down_op,
 987         .stats_get = bnxt_stats_get_op,
 988         .stats_reset = bnxt_stats_reset_op,
 989         .rx_queue_setup = bnxt_rx_queue_setup_op,
 990         .rx_queue_release = bnxt_rx_queue_release_op,
 991         .tx_queue_setup = bnxt_tx_queue_setup_op,
 992         .tx_queue_release = bnxt_tx_queue_release_op,
 993         .reta_update = bnxt_reta_update_op,
 994         .reta_query = bnxt_reta_query_op,
 995         .rss_hash_update = bnxt_rss_hash_update_op,
 996         .rss_hash_conf_get = bnxt_rss_hash_conf_get_op,
 997         .link_update = bnxt_link_update_op,
 998         .promiscuous_enable = bnxt_promiscuous_enable_op,
 999         .promiscuous_disable = bnxt_promiscuous_disable_op,
1000         .allmulticast_enable = bnxt_allmulticast_enable_op,
1001         .allmulticast_disable = bnxt_allmulticast_disable_op,
1002         .mac_addr_add = bnxt_mac_addr_add_op,
1003         .mac_addr_remove = bnxt_mac_addr_remove_op,
1004         .flow_ctrl_get = bnxt_flow_ctrl_get_op,
1005         .flow_ctrl_set = bnxt_flow_ctrl_set_op,
1006 };
1007
1008 static bool bnxt_vf_pciid(uint16_t id)
1009 {
1010         if (id == BROADCOM_DEV_ID_57304_VF ||
1011             id == BROADCOM_DEV_ID_57406_VF ||
1012             id == BROADCOM_DEV_ID_5731X_VF ||
1013             id == BROADCOM_DEV_ID_5741X_VF)
1014                 return true;
1015         return false;
1016 }
1017
1018 static int bnxt_init_board(struct rte_eth_dev *eth_dev)
1019 {
1020         struct bnxt *bp = eth_dev->data->dev_private;
1021         struct rte_pci_device *pci_dev = RTE_ETH_DEV_TO_PCI(eth_dev);
1022         int rc;
1023
1024         /* enable device (incl. PCI PM wakeup), and bus-mastering */
1025         if (!pci_dev->mem_resource[0].addr) {
1026                 RTE_LOG(ERR, PMD,
1027                         "Cannot find PCI device base address, aborting\n");
1028                 rc = -ENODEV;
1029                 goto init_err_disable;
1030         }
1031
1032         bp->eth_dev = eth_dev;
1033         bp->pdev = pci_dev;
1034
1035         bp->bar0 = (void *)pci_dev->mem_resource[0].addr;
1036         if (!bp->bar0) {
1037                 RTE_LOG(ERR, PMD, "Cannot map device registers, aborting\n");
1038                 rc = -ENOMEM;
1039                 goto init_err_release;
1040         }
1041         return 0;
1042
1043 init_err_release:
1044         if (bp->bar0)
1045                 bp->bar0 = NULL;
1046
1047 init_err_disable:
1048
1049         return rc;
1050 }
1051
1052 static int bnxt_dev_uninit(struct rte_eth_dev *eth_dev);
1053
1054 #define ALLOW_FUNC(x)   \
1055         { \
1056                 typeof(x) arg = (x); \
1057                 bp->pf.vf_req_fwd[((arg) >> 5)] &= \
1058                 ~rte_cpu_to_le_32(1 << ((arg) & 0x1f)); \
1059         }
1060 static int
1061 bnxt_dev_init(struct rte_eth_dev *eth_dev)
1062 {
1063         struct rte_pci_device *pci_dev = RTE_ETH_DEV_TO_PCI(eth_dev);
1064         static int version_printed;
1065         struct bnxt *bp;
1066         int rc;
1067
1068         if (version_printed++ == 0)
1069                 RTE_LOG(INFO, PMD, "%s", bnxt_version);
1070
1071         rte_eth_copy_pci_info(eth_dev, pci_dev);
1072         eth_dev->data->dev_flags |= RTE_ETH_DEV_DETACHABLE;
1073
1074         bp = eth_dev->data->dev_private;
1075         bp->dev_stopped = 1;
1076
1077         if (bnxt_vf_pciid(pci_dev->id.device_id))
1078                 bp->flags |= BNXT_FLAG_VF;
1079
1080         rc = bnxt_init_board(eth_dev);
1081         if (rc) {
1082                 RTE_LOG(ERR, PMD,
1083                         "Board initialization failed rc: %x\n", rc);
1084                 goto error;
1085         }
1086         eth_dev->dev_ops = &bnxt_dev_ops;
1087         eth_dev->rx_pkt_burst = &bnxt_recv_pkts;
1088         eth_dev->tx_pkt_burst = &bnxt_xmit_pkts;
1089
1090         rc = bnxt_alloc_hwrm_resources(bp);
1091         if (rc) {
1092                 RTE_LOG(ERR, PMD,
1093                         "hwrm resource allocation failure rc: %x\n", rc);
1094                 goto error_free;
1095         }
1096         rc = bnxt_hwrm_ver_get(bp);
1097         if (rc)
1098                 goto error_free;
1099         bnxt_hwrm_queue_qportcfg(bp);
1100
1101         bnxt_hwrm_func_qcfg(bp);
1102
1103         /* Get the MAX capabilities for this function */
1104         rc = bnxt_hwrm_func_qcaps(bp);
1105         if (rc) {
1106                 RTE_LOG(ERR, PMD, "hwrm query capability failure rc: %x\n", rc);
1107                 goto error_free;
1108         }
1109         if (bp->max_tx_rings == 0) {
1110                 RTE_LOG(ERR, PMD, "No TX rings available!\n");
1111                 rc = -EBUSY;
1112                 goto error_free;
1113         }
1114         eth_dev->data->mac_addrs = rte_zmalloc("bnxt_mac_addr_tbl",
1115                                         ETHER_ADDR_LEN * MAX_NUM_MAC_ADDR, 0);
1116         if (eth_dev->data->mac_addrs == NULL) {
1117                 RTE_LOG(ERR, PMD,
1118                         "Failed to alloc %u bytes needed to store MAC addr tbl",
1119                         ETHER_ADDR_LEN * MAX_NUM_MAC_ADDR);
1120                 rc = -ENOMEM;
1121                 goto error_free;
1122         }
1123         /* Copy the permanent MAC from the qcap response address now. */
1124         memcpy(bp->mac_addr, bp->dflt_mac_addr, sizeof(bp->mac_addr));
1125         memcpy(&eth_dev->data->mac_addrs[0], bp->mac_addr, ETHER_ADDR_LEN);
1126         bp->grp_info = rte_zmalloc("bnxt_grp_info",
1127                                 sizeof(*bp->grp_info) * bp->max_ring_grps, 0);
1128         if (!bp->grp_info) {
1129                 RTE_LOG(ERR, PMD,
1130                         "Failed to alloc %zu bytes needed to store group info table\n",
1131                         sizeof(*bp->grp_info) * bp->max_ring_grps);
1132                 rc = -ENOMEM;
1133                 goto error_free;
1134         }
1135
1136         /* Forward all requests if firmware is new enough */
1137         if (((bp->fw_ver >= ((20 << 24) | (6 << 16) | (100 << 8))) &&
1138             (bp->fw_ver < ((20 << 24) | (7 << 16)))) ||
1139             ((bp->fw_ver >= ((20 << 24) | (8 << 16))))) {
1140                 memset(bp->pf.vf_req_fwd, 0xff, sizeof(bp->pf.vf_req_fwd));
1141         } else {
1142                 RTE_LOG(WARNING, PMD,
1143                         "Firmware too old for VF mailbox functionality\n");
1144                 memset(bp->pf.vf_req_fwd, 0, sizeof(bp->pf.vf_req_fwd));
1145         }
1146
1147         /*
1148          * The following are used for driver cleanup.  If we disallow these,
1149          * VF drivers can't clean up cleanly.
1150          */
1151         ALLOW_FUNC(HWRM_FUNC_DRV_UNRGTR);
1152         ALLOW_FUNC(HWRM_VNIC_FREE);
1153         ALLOW_FUNC(HWRM_RING_FREE);
1154         ALLOW_FUNC(HWRM_RING_GRP_FREE);
1155         ALLOW_FUNC(HWRM_VNIC_RSS_COS_LB_CTX_FREE);
1156         ALLOW_FUNC(HWRM_CFA_L2_FILTER_FREE);
1157         ALLOW_FUNC(HWRM_STAT_CTX_FREE);
1158         rc = bnxt_hwrm_func_driver_register(bp);
1159         if (rc) {
1160                 RTE_LOG(ERR, PMD,
1161                         "Failed to register driver");
1162                 rc = -EBUSY;
1163                 goto error_free;
1164         }
1165
1166         RTE_LOG(INFO, PMD,
1167                 DRV_MODULE_NAME " found at mem %" PRIx64 ", node addr %pM\n",
1168                 pci_dev->mem_resource[0].phys_addr,
1169                 pci_dev->mem_resource[0].addr);
1170
1171         rc = bnxt_hwrm_func_reset(bp);
1172         if (rc) {
1173                 RTE_LOG(ERR, PMD, "hwrm chip reset failure rc: %x\n", rc);
1174                 rc = -1;
1175                 goto error_free;
1176         }
1177
1178         if (BNXT_PF(bp)) {
1179                 //if (bp->pf.active_vfs) {
1180                         // TODO: Deallocate VF resources?
1181                 //}
1182                 if (bp->pdev->max_vfs) {
1183                         rc = bnxt_hwrm_allocate_vfs(bp, bp->pdev->max_vfs);
1184                         if (rc) {
1185                                 RTE_LOG(ERR, PMD, "Failed to allocate VFs\n");
1186                                 goto error_free;
1187                         }
1188                 } else {
1189                         rc = bnxt_hwrm_allocate_pf_only(bp);
1190                         if (rc) {
1191                                 RTE_LOG(ERR, PMD,
1192                                         "Failed to allocate PF resources\n");
1193                                 goto error_free;
1194                         }
1195                 }
1196         }
1197
1198         rc = bnxt_setup_int(bp);
1199         if (rc)
1200                 goto error_free;
1201
1202         rc = bnxt_alloc_mem(bp);
1203         if (rc)
1204                 goto error_free_int;
1205
1206         rc = bnxt_request_int(bp);
1207         if (rc)
1208                 goto error_free_int;
1209
1210         bnxt_enable_int(bp);
1211
1212         return 0;
1213
1214 error_free_int:
1215         bnxt_disable_int(bp);
1216         bnxt_free_def_cp_ring(bp);
1217         bnxt_hwrm_func_buf_unrgtr(bp);
1218         bnxt_free_int(bp);
1219         bnxt_free_mem(bp);
1220 error_free:
1221         bnxt_dev_uninit(eth_dev);
1222 error:
1223         return rc;
1224 }
1225
1226 static int
1227 bnxt_dev_uninit(struct rte_eth_dev *eth_dev) {
1228         struct bnxt *bp = eth_dev->data->dev_private;
1229         int rc;
1230
1231         bnxt_disable_int(bp);
1232         bnxt_free_int(bp);
1233         bnxt_free_mem(bp);
1234         if (eth_dev->data->mac_addrs != NULL) {
1235                 rte_free(eth_dev->data->mac_addrs);
1236                 eth_dev->data->mac_addrs = NULL;
1237         }
1238         if (bp->grp_info != NULL) {
1239                 rte_free(bp->grp_info);
1240                 bp->grp_info = NULL;
1241         }
1242         rc = bnxt_hwrm_func_driver_unregister(bp, 0);
1243         bnxt_free_hwrm_resources(bp);
1244         if (bp->dev_stopped == 0)
1245                 bnxt_dev_close_op(eth_dev);
1246         if (bp->pf.vf_info)
1247                 rte_free(bp->pf.vf_info);
1248         eth_dev->dev_ops = NULL;
1249         eth_dev->rx_pkt_burst = NULL;
1250         eth_dev->tx_pkt_burst = NULL;
1251
1252         return rc;
1253 }
1254
1255 int bnxt_rcv_msg_from_vf(struct bnxt *bp, uint16_t vf_id, void *msg)
1256 {
1257         struct rte_pmd_bnxt_mb_event_param cb_param;
1258
1259         cb_param.retval = RTE_PMD_BNXT_MB_EVENT_PROCEED;
1260         cb_param.vf_id = vf_id;
1261         cb_param.msg = msg;
1262
1263         _rte_eth_dev_callback_process(bp->eth_dev, RTE_ETH_EVENT_VF_MBOX,
1264                         &cb_param);
1265
1266         /* Default to approve */
1267         if (cb_param.retval == RTE_PMD_BNXT_MB_EVENT_PROCEED)
1268                 cb_param.retval = RTE_PMD_BNXT_MB_EVENT_NOOP_ACK;
1269
1270         return cb_param.retval == RTE_PMD_BNXT_MB_EVENT_NOOP_ACK ? true : false;
1271 }
1272
1273 static int bnxt_pci_probe(struct rte_pci_driver *pci_drv __rte_unused,
1274         struct rte_pci_device *pci_dev)
1275 {
1276         return rte_eth_dev_pci_generic_probe(pci_dev, sizeof(struct bnxt),
1277                 bnxt_dev_init);
1278 }
1279
1280 static int bnxt_pci_remove(struct rte_pci_device *pci_dev)
1281 {
1282         return rte_eth_dev_pci_generic_remove(pci_dev, bnxt_dev_uninit);
1283 }
1284
1285 static struct rte_pci_driver bnxt_rte_pmd = {
1286         .id_table = bnxt_pci_id_map,
1287         .drv_flags = RTE_PCI_DRV_NEED_MAPPING |
1288                 RTE_PCI_DRV_INTR_LSC,
1289         .probe = bnxt_pci_probe,
1290         .remove = bnxt_pci_remove,
1291 };
1292
1293 RTE_PMD_REGISTER_PCI(net_bnxt, bnxt_rte_pmd);
1294 RTE_PMD_REGISTER_PCI_TABLE(net_bnxt, bnxt_pci_id_map);
1295 RTE_PMD_REGISTER_KMOD_DEP(net_bnxt, "* igb_uio | uio_pci_generic | vfio-pci");