drivers/net/bnxt/bnxt_ring.c

   1 /* SPDX-License-Identifier: BSD-3-Clause
   2  * Copyright(c) 2014-2018 Broadcom
   3  * All rights reserved.
   4  */
   5
   6 #include <rte_bitmap.h>
   7 #include <rte_memzone.h>
   8 #include <rte_malloc.h>
   9 #include <unistd.h>
  10
  11 #include "bnxt.h"
  12 #include "bnxt_hwrm.h"
  13 #include "bnxt_ring.h"
  14 #include "bnxt_rxq.h"
  15 #include "bnxt_rxr.h"
  16 #include "bnxt_txq.h"
  17 #include "bnxt_txr.h"
  18
  19 #include "hsi_struct_def_dpdk.h"
  20
  21 /*
  22  * Generic ring handling
  23  */
  24
  25 void bnxt_free_ring(struct bnxt_ring *ring)
  26 {
  27         if (!ring)
  28                 return;
  29
  30         if (ring->vmem_size && *ring->vmem) {
  31                 memset((char *)*ring->vmem, 0, ring->vmem_size);
  32                 *ring->vmem = NULL;
  33         }
  34         ring->mem_zone = NULL;
  35 }
  36
  37 /*
  38  * Ring groups
  39  */
  40
  41 int bnxt_init_ring_grps(struct bnxt *bp)
  42 {
  43         unsigned int i;
  44
  45         for (i = 0; i < bp->max_ring_grps; i++)
  46                 memset(&bp->grp_info[i], (uint8_t)HWRM_NA_SIGNATURE,
  47                        sizeof(struct bnxt_ring_grp_info));
  48
  49         return 0;
  50 }
  51
  52 int bnxt_alloc_ring_grps(struct bnxt *bp)
  53 {
  54         if (bp->max_tx_rings == 0) {
  55                 PMD_DRV_LOG(ERR, "No TX rings available!\n");
  56                 return -EBUSY;
  57         }
  58
  59         /* THOR does not support ring groups.
  60          * But we will use the array to save RSS context IDs.
  61          */
  62         if (BNXT_CHIP_THOR(bp)) {
  63                 bp->max_ring_grps = BNXT_MAX_RSS_CTXTS_THOR;
  64         } else if (bp->max_ring_grps < bp->rx_cp_nr_rings) {
  65                 /* 1 ring is for default completion ring */
  66                 PMD_DRV_LOG(ERR, "Insufficient resource: Ring Group\n");
  67                 return -ENOSPC;
  68         }
  69
  70         if (BNXT_HAS_RING_GRPS(bp)) {
  71                 bp->grp_info = rte_zmalloc("bnxt_grp_info",
  72                                            sizeof(*bp->grp_info) *
  73                                            bp->max_ring_grps, 0);
  74                 if (!bp->grp_info) {
  75                         PMD_DRV_LOG(ERR,
  76                                     "Failed to alloc grp info tbl.\n");
  77                         return -ENOMEM;
  78                 }
  79         }
  80
  81         return 0;
  82 }
  83
  84 /*
  85  * Allocates a completion ring with vmem and stats optionally also allocating
  86  * a TX and/or RX ring.  Passing NULL as tx_ring_info and/or rx_ring_info
  87  * to not allocate them.
  88  *
  89  * Order in the allocation is:
  90  * stats - Always non-zero length
  91  * cp vmem - Always zero-length, supported for the bnxt_ring abstraction
  92  * tx vmem - Only non-zero length if tx_ring_info is not NULL
  93  * rx vmem - Only non-zero length if rx_ring_info is not NULL
  94  * cp bd ring - Always non-zero length
  95  * tx bd ring - Only non-zero length if tx_ring_info is not NULL
  96  * rx bd ring - Only non-zero length if rx_ring_info is not NULL
  97  */
  98 int bnxt_alloc_rings(struct bnxt *bp, uint16_t qidx,
  99                             struct bnxt_tx_queue *txq,
 100                             struct bnxt_rx_queue *rxq,
 101                             struct bnxt_cp_ring_info *cp_ring_info,
 102                             struct bnxt_cp_ring_info *nq_ring_info,
 103                             const char *suffix)
 104 {
 105         struct bnxt_ring *cp_ring = cp_ring_info->cp_ring_struct;
 106         struct bnxt_rx_ring_info *rx_ring_info = rxq ? rxq->rx_ring : NULL;
 107         struct bnxt_tx_ring_info *tx_ring_info = txq ? txq->tx_ring : NULL;
 108         struct bnxt_ring *tx_ring;
 109         struct bnxt_ring *rx_ring;
 110         struct rte_pci_device *pdev = bp->pdev;
 111         uint64_t rx_offloads = bp->eth_dev->data->dev_conf.rxmode.offloads;
 112         const struct rte_memzone *mz = NULL;
 113         char mz_name[RTE_MEMZONE_NAMESIZE];
 114         rte_iova_t mz_phys_addr_base;
 115         rte_iova_t mz_phys_addr;
 116         int sz;
 117
 118         int stats_len = (tx_ring_info || rx_ring_info) ?
 119             RTE_CACHE_LINE_ROUNDUP(sizeof(struct hwrm_stat_ctx_query_output) -
 120                                    sizeof (struct hwrm_resp_hdr)) : 0;
 121         stats_len = RTE_ALIGN(stats_len, 128);
 122
 123         int cp_vmem_start = stats_len;
 124         int cp_vmem_len = RTE_CACHE_LINE_ROUNDUP(cp_ring->vmem_size);
 125         cp_vmem_len = RTE_ALIGN(cp_vmem_len, 128);
 126
 127         int nq_vmem_len = nq_ring_info ?
 128                 RTE_CACHE_LINE_ROUNDUP(cp_ring->vmem_size) : 0;
 129         nq_vmem_len = RTE_ALIGN(nq_vmem_len, 128);
 130
 131         int nq_vmem_start = cp_vmem_start + cp_vmem_len;
 132
 133         int tx_vmem_start = nq_vmem_start + nq_vmem_len;
 134         int tx_vmem_len =
 135             tx_ring_info ? RTE_CACHE_LINE_ROUNDUP(tx_ring_info->
 136                                                 tx_ring_struct->vmem_size) : 0;
 137         tx_vmem_len = RTE_ALIGN(tx_vmem_len, 128);
 138
 139         int rx_vmem_start = tx_vmem_start + tx_vmem_len;
 140         int rx_vmem_len = rx_ring_info ?
 141                 RTE_CACHE_LINE_ROUNDUP(rx_ring_info->
 142                                                 rx_ring_struct->vmem_size) : 0;
 143         rx_vmem_len = RTE_ALIGN(rx_vmem_len, 128);
 144         int ag_vmem_start = 0;
 145         int ag_vmem_len = 0;
 146         int cp_ring_start =  0;
 147         int nq_ring_start = 0;
 148
 149         ag_vmem_start = rx_vmem_start + rx_vmem_len;
 150         ag_vmem_len = rx_ring_info ? RTE_CACHE_LINE_ROUNDUP(
 151                                 rx_ring_info->ag_ring_struct->vmem_size) : 0;
 152         cp_ring_start = ag_vmem_start + ag_vmem_len;
 153         cp_ring_start = RTE_ALIGN(cp_ring_start, 4096);
 154
 155         int cp_ring_len = RTE_CACHE_LINE_ROUNDUP(cp_ring->ring_size *
 156                                                  sizeof(struct cmpl_base));
 157         cp_ring_len = RTE_ALIGN(cp_ring_len, 128);
 158         nq_ring_start = cp_ring_start + cp_ring_len;
 159         nq_ring_start = RTE_ALIGN(nq_ring_start, 4096);
 160
 161         int nq_ring_len = nq_ring_info ? cp_ring_len : 0;
 162
 163         int tx_ring_start = nq_ring_start + nq_ring_len;
 164         tx_ring_start = RTE_ALIGN(tx_ring_start, 4096);
 165         int tx_ring_len = tx_ring_info ?
 166             RTE_CACHE_LINE_ROUNDUP(tx_ring_info->tx_ring_struct->ring_size *
 167                                    sizeof(struct tx_bd_long)) : 0;
 168         tx_ring_len = RTE_ALIGN(tx_ring_len, 4096);
 169
 170         int rx_ring_start = tx_ring_start + tx_ring_len;
 171         rx_ring_start = RTE_ALIGN(rx_ring_start, 4096);
 172         int rx_ring_len =  rx_ring_info ?
 173                 RTE_CACHE_LINE_ROUNDUP(rx_ring_info->rx_ring_struct->ring_size *
 174                 sizeof(struct rx_prod_pkt_bd)) : 0;
 175         rx_ring_len = RTE_ALIGN(rx_ring_len, 4096);
 176
 177         int ag_ring_start = rx_ring_start + rx_ring_len;
 178         ag_ring_start = RTE_ALIGN(ag_ring_start, 4096);
 179         int ag_ring_len = rx_ring_len * AGG_RING_SIZE_FACTOR;
 180         ag_ring_len = RTE_ALIGN(ag_ring_len, 4096);
 181
 182         int ag_bitmap_start = ag_ring_start + ag_ring_len;
 183         int ag_bitmap_len =  rx_ring_info ?
 184                 RTE_CACHE_LINE_ROUNDUP(rte_bitmap_get_memory_footprint(
 185                         rx_ring_info->rx_ring_struct->ring_size *
 186                         AGG_RING_SIZE_FACTOR)) : 0;
 187
 188         int tpa_info_start = ag_bitmap_start + ag_bitmap_len;
 189         int tpa_info_len = 0;
 190
 191         if (rx_ring_info && (rx_offloads & DEV_RX_OFFLOAD_TCP_LRO)) {
 192                 int tpa_max = BNXT_TPA_MAX_AGGS(bp);
 193
 194                 tpa_info_len = tpa_max * sizeof(struct bnxt_tpa_info);
 195                 tpa_info_len = RTE_CACHE_LINE_ROUNDUP(tpa_info_len);
 196         }
 197
 198         int total_alloc_len = tpa_info_start;
 199         total_alloc_len += tpa_info_len;
 200
 201         snprintf(mz_name, RTE_MEMZONE_NAMESIZE,
 202                  "bnxt_%04x:%02x:%02x:%02x-%04x_%s", pdev->addr.domain,
 203                  pdev->addr.bus, pdev->addr.devid, pdev->addr.function, qidx,
 204                  suffix);
 205         mz_name[RTE_MEMZONE_NAMESIZE - 1] = 0;
 206         mz = rte_memzone_lookup(mz_name);
 207         if (!mz) {
 208                 mz = rte_memzone_reserve_aligned(mz_name, total_alloc_len,
 209                                 SOCKET_ID_ANY,
 210                                 RTE_MEMZONE_2MB |
 211                                 RTE_MEMZONE_SIZE_HINT_ONLY |
 212                                 RTE_MEMZONE_IOVA_CONTIG,
 213                                 getpagesize());
 214                 if (mz == NULL)
 215                         return -ENOMEM;
 216         }
 217         memset(mz->addr, 0, mz->len);
 218         mz_phys_addr_base = mz->iova;
 219         mz_phys_addr = mz->iova;
 220         if ((unsigned long)mz->addr == mz_phys_addr_base) {
 221                 PMD_DRV_LOG(DEBUG,
 222                             "Memzone physical address same as virtual.\n");
 223                 PMD_DRV_LOG(DEBUG, "Using rte_mem_virt2iova()\n");
 224                 for (sz = 0; sz < total_alloc_len; sz += getpagesize())
 225                         rte_mem_lock_page(((char *)mz->addr) + sz);
 226                 mz_phys_addr_base = rte_mem_virt2iova(mz->addr);
 227                 mz_phys_addr = rte_mem_virt2iova(mz->addr);
 228                 if (mz_phys_addr == RTE_BAD_IOVA) {
 229                         PMD_DRV_LOG(ERR,
 230                         "unable to map ring address to physical memory\n");
 231                         return -ENOMEM;
 232                 }
 233         }
 234
 235         if (tx_ring_info) {
 236                 txq->mz = mz;
 237                 tx_ring = tx_ring_info->tx_ring_struct;
 238
 239                 tx_ring->bd = ((char *)mz->addr + tx_ring_start);
 240                 tx_ring_info->tx_desc_ring = (struct tx_bd_long *)tx_ring->bd;
 241                 tx_ring->bd_dma = mz_phys_addr + tx_ring_start;
 242                 tx_ring_info->tx_desc_mapping = tx_ring->bd_dma;
 243                 tx_ring->mem_zone = (const void *)mz;
 244
 245                 if (!tx_ring->bd)
 246                         return -ENOMEM;
 247                 if (tx_ring->vmem_size) {
 248                         tx_ring->vmem =
 249                             (void **)((char *)mz->addr + tx_vmem_start);
 250                         tx_ring_info->tx_buf_ring =
 251                             (struct bnxt_sw_tx_bd *)tx_ring->vmem;
 252                 }
 253         }
 254
 255         if (rx_ring_info) {
 256                 rxq->mz = mz;
 257                 rx_ring = rx_ring_info->rx_ring_struct;
 258
 259                 rx_ring->bd = ((char *)mz->addr + rx_ring_start);
 260                 rx_ring_info->rx_desc_ring =
 261                     (struct rx_prod_pkt_bd *)rx_ring->bd;
 262                 rx_ring->bd_dma = mz_phys_addr + rx_ring_start;
 263                 rx_ring_info->rx_desc_mapping = rx_ring->bd_dma;
 264                 rx_ring->mem_zone = (const void *)mz;
 265
 266                 if (!rx_ring->bd)
 267                         return -ENOMEM;
 268                 if (rx_ring->vmem_size) {
 269                         rx_ring->vmem =
 270                             (void **)((char *)mz->addr + rx_vmem_start);
 271                         rx_ring_info->rx_buf_ring =
 272                             (struct bnxt_sw_rx_bd *)rx_ring->vmem;
 273                 }
 274
 275                 rx_ring = rx_ring_info->ag_ring_struct;
 276
 277                 rx_ring->bd = ((char *)mz->addr + ag_ring_start);
 278                 rx_ring_info->ag_desc_ring =
 279                     (struct rx_prod_pkt_bd *)rx_ring->bd;
 280                 rx_ring->bd_dma = mz->iova + ag_ring_start;
 281                 rx_ring_info->ag_desc_mapping = rx_ring->bd_dma;
 282                 rx_ring->mem_zone = (const void *)mz;
 283
 284                 if (!rx_ring->bd)
 285                         return -ENOMEM;
 286                 if (rx_ring->vmem_size) {
 287                         rx_ring->vmem =
 288                             (void **)((char *)mz->addr + ag_vmem_start);
 289                         rx_ring_info->ag_buf_ring =
 290                             (struct bnxt_sw_rx_bd *)rx_ring->vmem;
 291                 }
 292
 293                 rx_ring_info->ag_bitmap =
 294                     rte_bitmap_init(rx_ring_info->rx_ring_struct->ring_size *
 295                                     AGG_RING_SIZE_FACTOR, (uint8_t *)mz->addr +
 296                                     ag_bitmap_start, ag_bitmap_len);
 297
 298                 /* TPA info */
 299                 if (rx_offloads & DEV_RX_OFFLOAD_TCP_LRO)
 300                         rx_ring_info->tpa_info =
 301                                 ((struct bnxt_tpa_info *)((char *)mz->addr +
 302                                                           tpa_info_start));
 303         }
 304
 305         cp_ring->bd = ((char *)mz->addr + cp_ring_start);
 306         cp_ring->bd_dma = mz_phys_addr + cp_ring_start;
 307         cp_ring_info->cp_desc_ring = cp_ring->bd;
 308         cp_ring_info->cp_desc_mapping = cp_ring->bd_dma;
 309         cp_ring->mem_zone = (const void *)mz;
 310
 311         if (!cp_ring->bd)
 312                 return -ENOMEM;
 313         if (cp_ring->vmem_size)
 314                 *cp_ring->vmem = ((char *)mz->addr + stats_len);
 315         if (stats_len) {
 316                 cp_ring_info->hw_stats = mz->addr;
 317                 cp_ring_info->hw_stats_map = mz_phys_addr;
 318         }
 319         cp_ring_info->hw_stats_ctx_id = HWRM_NA_SIGNATURE;
 320
 321         if (nq_ring_info) {
 322                 struct bnxt_ring *nq_ring = nq_ring_info->cp_ring_struct;
 323
 324                 nq_ring->bd = (char *)mz->addr + nq_ring_start;
 325                 nq_ring->bd_dma = mz_phys_addr + nq_ring_start;
 326                 nq_ring_info->cp_desc_ring = nq_ring->bd;
 327                 nq_ring_info->cp_desc_mapping = nq_ring->bd_dma;
 328                 nq_ring->mem_zone = (const void *)mz;
 329
 330                 if (!nq_ring->bd)
 331                         return -ENOMEM;
 332                 if (nq_ring->vmem_size)
 333                         *nq_ring->vmem = (char *)mz->addr + nq_vmem_start;
 334
 335                 nq_ring_info->hw_stats_ctx_id = HWRM_NA_SIGNATURE;
 336         }
 337
 338         return 0;
 339 }
 340
 341 static void bnxt_init_dflt_coal(struct bnxt_coal *coal)
 342 {
 343         /* Tick values in micro seconds.
 344          * 1 coal_buf x bufs_per_record = 1 completion record.
 345          */
 346         coal->num_cmpl_aggr_int = BNXT_NUM_CMPL_AGGR_INT;
 347         /* This is a 6-bit value and must not be 0, or we'll get non stop IRQ */
 348         coal->num_cmpl_dma_aggr = BNXT_NUM_CMPL_DMA_AGGR;
 349         /* This is a 6-bit value and must not be 0, or we'll get non stop IRQ */
 350         coal->num_cmpl_dma_aggr_during_int = BNXT_NUM_CMPL_DMA_AGGR_DURING_INT;
 351         coal->int_lat_tmr_max = BNXT_INT_LAT_TMR_MAX;
 352         /* min timer set to 1/2 of interrupt timer */
 353         coal->int_lat_tmr_min = BNXT_INT_LAT_TMR_MIN;
 354         /* buf timer set to 1/4 of interrupt timer */
 355         coal->cmpl_aggr_dma_tmr = BNXT_CMPL_AGGR_DMA_TMR;
 356         coal->cmpl_aggr_dma_tmr_during_int = BNXT_CMPL_AGGR_DMA_TMR_DURING_INT;
 357 }
 358
 359 static void bnxt_set_db(struct bnxt *bp,
 360                         struct bnxt_db_info *db,
 361                         uint32_t ring_type,
 362                         uint32_t map_idx,
 363                         uint32_t fid)
 364 {
 365         if (BNXT_CHIP_THOR(bp)) {
 366                 if (BNXT_PF(bp))
 367                         db->doorbell = (char *)bp->doorbell_base + 0x10000;
 368                 else
 369                         db->doorbell = (char *)bp->doorbell_base + 0x4000;
 370                 switch (ring_type) {
 371                 case HWRM_RING_ALLOC_INPUT_RING_TYPE_TX:
 372                         db->db_key64 = DBR_PATH_L2 | DBR_TYPE_SQ;
 373                         break;
 374                 case HWRM_RING_ALLOC_INPUT_RING_TYPE_RX:
 375                 case HWRM_RING_ALLOC_INPUT_RING_TYPE_RX_AGG:
 376                         db->db_key64 = DBR_PATH_L2 | DBR_TYPE_SRQ;
 377                         break;
 378                 case HWRM_RING_ALLOC_INPUT_RING_TYPE_L2_CMPL:
 379                         db->db_key64 = DBR_PATH_L2 | DBR_TYPE_CQ;
 380                         break;
 381                 case HWRM_RING_ALLOC_INPUT_RING_TYPE_NQ:
 382                         db->db_key64 = DBR_PATH_L2;
 383                         break;
 384                 }
 385                 db->db_key64 |= (uint64_t)fid << DBR_XID_SFT;
 386                 db->db_64 = true;
 387         } else {
 388                 db->doorbell = (char *)bp->doorbell_base + map_idx * 0x80;
 389                 switch (ring_type) {
 390                 case HWRM_RING_ALLOC_INPUT_RING_TYPE_TX:
 391                         db->db_key32 = DB_KEY_TX;
 392                         break;
 393                 case HWRM_RING_ALLOC_INPUT_RING_TYPE_RX:
 394                         db->db_key32 = DB_KEY_RX;
 395                         break;
 396                 case HWRM_RING_ALLOC_INPUT_RING_TYPE_L2_CMPL:
 397                         db->db_key32 = DB_KEY_CP;
 398                         break;
 399                 }
 400                 db->db_64 = false;
 401         }
 402 }
 403
 404 static int bnxt_alloc_cmpl_ring(struct bnxt *bp, int queue_index,
 405                                 struct bnxt_cp_ring_info *cpr)
 406 {
 407         struct bnxt_ring *cp_ring = cpr->cp_ring_struct;
 408         uint32_t nq_ring_id = HWRM_NA_SIGNATURE;
 409         int cp_ring_index = queue_index + BNXT_RX_VEC_START;
 410         struct bnxt_cp_ring_info *nqr = bp->rxtx_nq_ring;
 411         uint8_t ring_type;
 412         int rc = 0;
 413
 414         ring_type = HWRM_RING_ALLOC_INPUT_RING_TYPE_L2_CMPL;
 415
 416         if (BNXT_HAS_NQ(bp)) {
 417                 if (nqr) {
 418                         nq_ring_id = nqr->cp_ring_struct->fw_ring_id;
 419                 } else {
 420                         PMD_DRV_LOG(ERR, "NQ ring is NULL\n");
 421                         return -EINVAL;
 422                 }
 423         }
 424
 425         rc = bnxt_hwrm_ring_alloc(bp, cp_ring, ring_type, cp_ring_index,
 426                                   HWRM_NA_SIGNATURE, nq_ring_id, 0);
 427         if (rc)
 428                 return rc;
 429
 430         cpr->cp_cons = 0;
 431         bnxt_set_db(bp, &cpr->cp_db, ring_type, cp_ring_index,
 432                     cp_ring->fw_ring_id);
 433         bnxt_db_cq(cpr);
 434
 435         return 0;
 436 }
 437
 438 int bnxt_alloc_rxtx_nq_ring(struct bnxt *bp)
 439 {
 440         struct bnxt_cp_ring_info *nqr;
 441         struct bnxt_ring *ring;
 442         int ring_index = BNXT_NUM_ASYNC_CPR(bp);
 443         unsigned int socket_id;
 444         uint8_t ring_type;
 445         int rc = 0;
 446
 447         if (!BNXT_HAS_NQ(bp) || bp->rxtx_nq_ring)
 448                 return 0;
 449
 450         socket_id = rte_lcore_to_socket_id(rte_get_master_lcore());
 451
 452         nqr = rte_zmalloc_socket("nqr",
 453                                  sizeof(struct bnxt_cp_ring_info),
 454                                  RTE_CACHE_LINE_SIZE, socket_id);
 455         if (nqr == NULL)
 456                 return -ENOMEM;
 457
 458         ring = rte_zmalloc_socket("bnxt_cp_ring_struct",
 459                                   sizeof(struct bnxt_ring),
 460                                   RTE_CACHE_LINE_SIZE, socket_id);
 461         if (ring == NULL) {
 462                 rte_free(nqr);
 463                 return -ENOMEM;
 464         }
 465
 466         ring->bd = (void *)nqr->cp_desc_ring;
 467         ring->bd_dma = nqr->cp_desc_mapping;
 468         ring->ring_size = rte_align32pow2(DEFAULT_CP_RING_SIZE);
 469         ring->ring_mask = ring->ring_size - 1;
 470         ring->vmem_size = 0;
 471         ring->vmem = NULL;
 472
 473         nqr->cp_ring_struct = ring;
 474         rc = bnxt_alloc_rings(bp, 0, NULL, NULL, nqr, NULL, "l2_nqr");
 475         if (rc) {
 476                 rte_free(ring);
 477                 rte_free(nqr);
 478                 return -ENOMEM;
 479         }
 480
 481         ring_type = HWRM_RING_ALLOC_INPUT_RING_TYPE_NQ;
 482
 483         rc = bnxt_hwrm_ring_alloc(bp, ring, ring_type, ring_index,
 484                                   HWRM_NA_SIGNATURE, HWRM_NA_SIGNATURE, 0);
 485         if (rc) {
 486                 rte_free(ring);
 487                 rte_free(nqr);
 488                 return rc;
 489         }
 490
 491         bnxt_set_db(bp, &nqr->cp_db, ring_type, ring_index,
 492                     ring->fw_ring_id);
 493         bnxt_db_nq(nqr);
 494
 495         bp->rxtx_nq_ring = nqr;
 496
 497         return 0;
 498 }
 499
 500 /* Free RX/TX NQ ring.  */
 501 void bnxt_free_rxtx_nq_ring(struct bnxt *bp)
 502 {
 503         struct bnxt_cp_ring_info *nqr = bp->rxtx_nq_ring;
 504
 505         if (!nqr)
 506                 return;
 507
 508         bnxt_free_nq_ring(bp, nqr);
 509
 510         bnxt_free_ring(nqr->cp_ring_struct);
 511         rte_free(nqr->cp_ring_struct);
 512         nqr->cp_ring_struct = NULL;
 513         rte_free(nqr);
 514         bp->rxtx_nq_ring = NULL;
 515 }
 516
 517 static int bnxt_alloc_rx_ring(struct bnxt *bp, int queue_index)
 518 {
 519         struct bnxt_rx_queue *rxq = bp->rx_queues[queue_index];
 520         struct bnxt_cp_ring_info *cpr = rxq->cp_ring;
 521         struct bnxt_ring *cp_ring = cpr->cp_ring_struct;
 522         struct bnxt_rx_ring_info *rxr = rxq->rx_ring;
 523         struct bnxt_ring *ring = rxr->rx_ring_struct;
 524         uint8_t ring_type;
 525         int rc = 0;
 526
 527         ring_type = HWRM_RING_ALLOC_INPUT_RING_TYPE_RX;
 528
 529         rc = bnxt_hwrm_ring_alloc(bp, ring, ring_type,
 530                                   queue_index, cpr->hw_stats_ctx_id,
 531                                   cp_ring->fw_ring_id, 0);
 532         if (rc)
 533                 return rc;
 534
 535         rxr->rx_prod = 0;
 536         if (BNXT_HAS_RING_GRPS(bp))
 537                 bp->grp_info[queue_index].rx_fw_ring_id = ring->fw_ring_id;
 538         bnxt_set_db(bp, &rxr->rx_db, ring_type, queue_index, ring->fw_ring_id);
 539         bnxt_db_write(&rxr->rx_db, rxr->rx_prod);
 540
 541         return 0;
 542 }
 543
 544 static int bnxt_alloc_rx_agg_ring(struct bnxt *bp, int queue_index)
 545 {
 546         unsigned int map_idx = queue_index + bp->rx_cp_nr_rings;
 547         struct bnxt_rx_queue *rxq = bp->rx_queues[queue_index];
 548         struct bnxt_cp_ring_info *cpr = rxq->cp_ring;
 549         struct bnxt_ring *cp_ring = cpr->cp_ring_struct;
 550         struct bnxt_rx_ring_info *rxr = rxq->rx_ring;
 551         struct bnxt_ring *ring = rxr->ag_ring_struct;
 552         uint32_t hw_stats_ctx_id = HWRM_NA_SIGNATURE;
 553         uint8_t ring_type;
 554         int rc = 0;
 555
 556         ring->fw_rx_ring_id = rxr->rx_ring_struct->fw_ring_id;
 557
 558         if (BNXT_CHIP_THOR(bp)) {
 559                 ring_type = HWRM_RING_ALLOC_INPUT_RING_TYPE_RX_AGG;
 560                 hw_stats_ctx_id = cpr->hw_stats_ctx_id;
 561         } else {
 562                 ring_type = HWRM_RING_ALLOC_INPUT_RING_TYPE_RX;
 563         }
 564
 565         rc = bnxt_hwrm_ring_alloc(bp, ring, ring_type, map_idx,
 566                                   hw_stats_ctx_id, cp_ring->fw_ring_id, 0);
 567
 568         if (rc)
 569                 return rc;
 570
 571         rxr->ag_prod = 0;
 572         if (BNXT_HAS_RING_GRPS(bp))
 573                 bp->grp_info[queue_index].ag_fw_ring_id = ring->fw_ring_id;
 574         bnxt_set_db(bp, &rxr->ag_db, ring_type, map_idx, ring->fw_ring_id);
 575         bnxt_db_write(&rxr->ag_db, rxr->ag_prod);
 576
 577         return 0;
 578 }
 579
 580 int bnxt_alloc_hwrm_rx_ring(struct bnxt *bp, int queue_index)
 581 {
 582         struct bnxt_rx_queue *rxq = bp->rx_queues[queue_index];
 583         struct bnxt_cp_ring_info *cpr = rxq->cp_ring;
 584         struct bnxt_ring *cp_ring = cpr->cp_ring_struct;
 585         struct bnxt_rx_ring_info *rxr = rxq->rx_ring;
 586         int rc;
 587
 588         rc = bnxt_alloc_cmpl_ring(bp, queue_index, cpr);
 589         if (rc)
 590                 goto err_out;
 591
 592         if (BNXT_HAS_RING_GRPS(bp)) {
 593                 bp->grp_info[queue_index].fw_stats_ctx = cpr->hw_stats_ctx_id;
 594                 bp->grp_info[queue_index].cp_fw_ring_id = cp_ring->fw_ring_id;
 595         }
 596
 597         if (!BNXT_NUM_ASYNC_CPR(bp) && !queue_index) {
 598                 /*
 599                  * If a dedicated async event completion ring is not enabled,
 600                  * use the first completion ring from PF or VF as the default
 601                  * completion ring for async event handling.
 602                  */
 603                 bp->async_cp_ring = cpr;
 604                 rc = bnxt_hwrm_set_async_event_cr(bp);
 605                 if (rc)
 606                         goto err_out;
 607         }
 608
 609         rc = bnxt_alloc_rx_ring(bp, queue_index);
 610         if (rc)
 611                 goto err_out;
 612
 613         rc = bnxt_alloc_rx_agg_ring(bp, queue_index);
 614         if (rc)
 615                 goto err_out;
 616
 617         if (rxq->rx_started) {
 618                 if (bnxt_init_one_rx_ring(rxq)) {
 619                         RTE_LOG(ERR, PMD,
 620                                 "bnxt_init_one_rx_ring failed!\n");
 621                         bnxt_rx_queue_release_op(rxq);
 622                         rc = -ENOMEM;
 623                         goto err_out;
 624                 }
 625                 bnxt_db_write(&rxr->rx_db, rxr->rx_prod);
 626                 bnxt_db_write(&rxr->ag_db, rxr->ag_prod);
 627         }
 628         rxq->index = queue_index;
 629 #ifdef RTE_ARCH_X86
 630         bnxt_rxq_vec_setup(rxq);
 631 #endif
 632
 633         return 0;
 634
 635 err_out:
 636         PMD_DRV_LOG(ERR,
 637                     "Failed to allocate receive queue %d, rc %d.\n",
 638                     queue_index, rc);
 639         return rc;
 640 }
 641
 642 /* Initialise all rings to -1, its used to free rings later if allocation
 643  * of few rings fails.
 644  */
 645 static void bnxt_init_all_rings(struct bnxt *bp)
 646 {
 647         unsigned int i = 0;
 648         struct bnxt_rx_queue *rxq;
 649         struct bnxt_ring *cp_ring;
 650         struct bnxt_ring *ring;
 651         struct bnxt_rx_ring_info *rxr;
 652         struct bnxt_tx_queue *txq;
 653
 654         for (i = 0; i < bp->rx_cp_nr_rings; i++) {
 655                 rxq = bp->rx_queues[i];
 656                 /* Rx-compl */
 657                 cp_ring = rxq->cp_ring->cp_ring_struct;
 658                 cp_ring->fw_ring_id = INVALID_HW_RING_ID;
 659                 /* Rx-Reg */
 660                 rxr = rxq->rx_ring;
 661                 ring = rxr->rx_ring_struct;
 662                 ring->fw_ring_id = INVALID_HW_RING_ID;
 663                 /* Rx-AGG */
 664                 ring = rxr->ag_ring_struct;
 665                 ring->fw_ring_id = INVALID_HW_RING_ID;
 666         }
 667         for (i = 0; i < bp->tx_cp_nr_rings; i++) {
 668                 txq = bp->tx_queues[i];
 669                 /* Tx cmpl */
 670                 cp_ring = txq->cp_ring->cp_ring_struct;
 671                 cp_ring->fw_ring_id = INVALID_HW_RING_ID;
 672                 /*Tx Ring */
 673                 ring = txq->tx_ring->tx_ring_struct;
 674                 ring->fw_ring_id = INVALID_HW_RING_ID;
 675         }
 676 }
 677
 678 /* ring_grp usage:
 679  * [0] = default completion ring
 680  * [1 -> +rx_cp_nr_rings] = rx_cp, rx rings
 681  * [1+rx_cp_nr_rings + 1 -> +tx_cp_nr_rings] = tx_cp, tx rings
 682  */
 683 int bnxt_alloc_hwrm_rings(struct bnxt *bp)
 684 {
 685         struct bnxt_coal coal;
 686         unsigned int i;
 687         uint8_t ring_type;
 688         int rc = 0;
 689
 690         bnxt_init_dflt_coal(&coal);
 691         bnxt_init_all_rings(bp);
 692
 693         for (i = 0; i < bp->rx_cp_nr_rings; i++) {
 694                 struct bnxt_rx_queue *rxq = bp->rx_queues[i];
 695                 struct bnxt_cp_ring_info *cpr = rxq->cp_ring;
 696                 struct bnxt_ring *cp_ring = cpr->cp_ring_struct;
 697                 struct bnxt_rx_ring_info *rxr = rxq->rx_ring;
 698
 699                 if (bnxt_alloc_cmpl_ring(bp, i, cpr))
 700                         goto err_out;
 701
 702                 if (BNXT_HAS_RING_GRPS(bp)) {
 703                         bp->grp_info[i].fw_stats_ctx = cpr->hw_stats_ctx_id;
 704                         bp->grp_info[i].cp_fw_ring_id = cp_ring->fw_ring_id;
 705                 }
 706
 707                 bnxt_hwrm_set_ring_coal(bp, &coal, cp_ring->fw_ring_id);
 708                 if (!BNXT_NUM_ASYNC_CPR(bp) && !i) {
 709                         /*
 710                          * If a dedicated async event completion ring is not
 711                          * enabled, use the first completion ring as the default
 712                          * completion ring for async event handling.
 713                          */
 714                         bp->async_cp_ring = cpr;
 715                         rc = bnxt_hwrm_set_async_event_cr(bp);
 716                         if (rc)
 717                                 goto err_out;
 718                 }
 719
 720                 if (bnxt_alloc_rx_ring(bp, i))
 721                         goto err_out;
 722
 723                 if (bnxt_alloc_rx_agg_ring(bp, i))
 724                         goto err_out;
 725
 726                 if (bnxt_init_one_rx_ring(rxq)) {
 727                         PMD_DRV_LOG(ERR, "bnxt_init_one_rx_ring failed!\n");
 728                         bnxt_rx_queue_release_op(rxq);
 729                         return -ENOMEM;
 730                 }
 731                 bnxt_db_write(&rxr->rx_db, rxr->rx_prod);
 732                 bnxt_db_write(&rxr->ag_db, rxr->ag_prod);
 733                 rxq->index = i;
 734 #ifdef RTE_ARCH_X86
 735                 bnxt_rxq_vec_setup(rxq);
 736 #endif
 737         }
 738
 739         for (i = 0; i < bp->tx_cp_nr_rings; i++) {
 740                 struct bnxt_tx_queue *txq = bp->tx_queues[i];
 741                 struct bnxt_cp_ring_info *cpr = txq->cp_ring;
 742                 struct bnxt_ring *cp_ring = cpr->cp_ring_struct;
 743                 struct bnxt_tx_ring_info *txr = txq->tx_ring;
 744                 struct bnxt_ring *ring = txr->tx_ring_struct;
 745                 unsigned int idx = i + bp->rx_cp_nr_rings;
 746                 uint16_t tx_cosq_id = 0;
 747
 748                 if (bnxt_alloc_cmpl_ring(bp, idx, cpr))
 749                         goto err_out;
 750
 751                 if (bp->vnic_cap_flags & BNXT_VNIC_CAP_COS_CLASSIFY)
 752                         tx_cosq_id = bp->tx_cosq_id[i < bp->max_lltc ? i : 0];
 753                 else
 754                         tx_cosq_id = bp->tx_cosq_id[0];
 755                 /* Tx ring */
 756                 ring_type = HWRM_RING_ALLOC_INPUT_RING_TYPE_TX;
 757                 rc = bnxt_hwrm_ring_alloc(bp, ring,
 758                                           ring_type,
 759                                           i, cpr->hw_stats_ctx_id,
 760                                           cp_ring->fw_ring_id,
 761                                           tx_cosq_id);
 762                 if (rc)
 763                         goto err_out;
 764
 765                 bnxt_set_db(bp, &txr->tx_db, ring_type, i, ring->fw_ring_id);
 766                 txq->index = idx;
 767                 bnxt_hwrm_set_ring_coal(bp, &coal, cp_ring->fw_ring_id);
 768         }
 769
 770 err_out:
 771         return rc;
 772 }
 773
 774 /* Allocate dedicated async completion ring. */
 775 int bnxt_alloc_async_cp_ring(struct bnxt *bp)
 776 {
 777         struct bnxt_cp_ring_info *cpr = bp->async_cp_ring;
 778         struct bnxt_ring *cp_ring;
 779         uint8_t ring_type;
 780         int rc;
 781
 782         if (BNXT_NUM_ASYNC_CPR(bp) == 0 || cpr == NULL)
 783                 return 0;
 784
 785         cp_ring = cpr->cp_ring_struct;
 786
 787         if (BNXT_HAS_NQ(bp))
 788                 ring_type = HWRM_RING_ALLOC_INPUT_RING_TYPE_NQ;
 789         else
 790                 ring_type = HWRM_RING_ALLOC_INPUT_RING_TYPE_L2_CMPL;
 791
 792         rc = bnxt_hwrm_ring_alloc(bp, cp_ring, ring_type, 0,
 793                                   HWRM_NA_SIGNATURE, HWRM_NA_SIGNATURE, 0);
 794
 795         if (rc)
 796                 return rc;
 797
 798         cpr->cp_cons = 0;
 799         cpr->valid = 0;
 800         bnxt_set_db(bp, &cpr->cp_db, ring_type, 0,
 801                     cp_ring->fw_ring_id);
 802
 803         if (BNXT_HAS_NQ(bp))
 804                 bnxt_db_nq(cpr);
 805         else
 806                 bnxt_db_cq(cpr);
 807
 808         return bnxt_hwrm_set_async_event_cr(bp);
 809 }
 810
 811 /* Free dedicated async completion ring. */
 812 void bnxt_free_async_cp_ring(struct bnxt *bp)
 813 {
 814         struct bnxt_cp_ring_info *cpr = bp->async_cp_ring;
 815
 816         if (BNXT_NUM_ASYNC_CPR(bp) == 0 || cpr == NULL)
 817                 return;
 818
 819         if (BNXT_HAS_NQ(bp))
 820                 bnxt_free_nq_ring(bp, cpr);
 821         else
 822                 bnxt_free_cp_ring(bp, cpr);
 823
 824         bnxt_free_ring(cpr->cp_ring_struct);
 825         rte_free(cpr->cp_ring_struct);
 826         cpr->cp_ring_struct = NULL;
 827         rte_free(cpr);
 828         bp->async_cp_ring = NULL;
 829 }
 830
 831 int bnxt_alloc_async_ring_struct(struct bnxt *bp)
 832 {
 833         struct bnxt_cp_ring_info *cpr = NULL;
 834         struct bnxt_ring *ring = NULL;
 835         unsigned int socket_id;
 836
 837         if (BNXT_NUM_ASYNC_CPR(bp) == 0)
 838                 return 0;
 839
 840         socket_id = rte_lcore_to_socket_id(rte_get_master_lcore());
 841
 842         cpr = rte_zmalloc_socket("cpr",
 843                                  sizeof(struct bnxt_cp_ring_info),
 844                                  RTE_CACHE_LINE_SIZE, socket_id);
 845         if (cpr == NULL)
 846                 return -ENOMEM;
 847
 848         ring = rte_zmalloc_socket("bnxt_cp_ring_struct",
 849                                   sizeof(struct bnxt_ring),
 850                                   RTE_CACHE_LINE_SIZE, socket_id);
 851         if (ring == NULL) {
 852                 rte_free(cpr);
 853                 return -ENOMEM;
 854         }
 855
 856         ring->bd = (void *)cpr->cp_desc_ring;
 857         ring->bd_dma = cpr->cp_desc_mapping;
 858         ring->ring_size = rte_align32pow2(DEFAULT_CP_RING_SIZE);
 859         ring->ring_mask = ring->ring_size - 1;
 860         ring->vmem_size = 0;
 861         ring->vmem = NULL;
 862
 863         bp->async_cp_ring = cpr;
 864         cpr->cp_ring_struct = ring;
 865
 866         return bnxt_alloc_rings(bp, 0, NULL, NULL,
 867                                 bp->async_cp_ring, NULL,
 868                                 "def_cp");
 869 }