drivers/net/bnxt/bnxt_ring.c

   1 /* SPDX-License-Identifier: BSD-3-Clause
   2  * Copyright(c) 2014-2018 Broadcom
   3  * All rights reserved.
   4  */
   5
   6 #include <rte_bitmap.h>
   7 #include <rte_memzone.h>
   8 #include <rte_malloc.h>
   9 #include <unistd.h>
  10
  11 #include "bnxt.h"
  12 #include "bnxt_hwrm.h"
  13 #include "bnxt_ring.h"
  14 #include "bnxt_rxq.h"
  15 #include "bnxt_rxr.h"
  16 #include "bnxt_txq.h"
  17 #include "bnxt_txr.h"
  18
  19 #include "hsi_struct_def_dpdk.h"
  20
  21 /*
  22  * Generic ring handling
  23  */
  24
  25 void bnxt_free_ring(struct bnxt_ring *ring)
  26 {
  27         if (!ring)
  28                 return;
  29
  30         if (ring->vmem_size && *ring->vmem) {
  31                 memset((char *)*ring->vmem, 0, ring->vmem_size);
  32                 *ring->vmem = NULL;
  33         }
  34         ring->mem_zone = NULL;
  35 }
  36
  37 /*
  38  * Ring groups
  39  */
  40
  41 static void bnxt_init_ring_grps(struct bnxt *bp)
  42 {
  43         unsigned int i;
  44
  45         for (i = 0; i < bp->max_ring_grps; i++)
  46                 memset(&bp->grp_info[i], (uint8_t)HWRM_NA_SIGNATURE,
  47                        sizeof(struct bnxt_ring_grp_info));
  48 }
  49
  50 int bnxt_alloc_ring_grps(struct bnxt *bp)
  51 {
  52         if (bp->max_tx_rings == 0) {
  53                 PMD_DRV_LOG(ERR, "No TX rings available!\n");
  54                 return -EBUSY;
  55         }
  56
  57         /* THOR does not support ring groups.
  58          * But we will use the array to save RSS context IDs.
  59          */
  60         if (BNXT_CHIP_P5(bp)) {
  61                 bp->max_ring_grps = BNXT_MAX_RSS_CTXTS_P5;
  62         } else if (bp->max_ring_grps < bp->rx_cp_nr_rings) {
  63                 /* 1 ring is for default completion ring */
  64                 PMD_DRV_LOG(ERR, "Insufficient resource: Ring Group\n");
  65                 return -ENOSPC;
  66         }
  67
  68         if (BNXT_HAS_RING_GRPS(bp)) {
  69                 bp->grp_info = rte_zmalloc("bnxt_grp_info",
  70                                            sizeof(*bp->grp_info) *
  71                                            bp->max_ring_grps, 0);
  72                 if (!bp->grp_info) {
  73                         PMD_DRV_LOG(ERR,
  74                                     "Failed to alloc grp info tbl.\n");
  75                         return -ENOMEM;
  76                 }
  77                 bnxt_init_ring_grps(bp);
  78         }
  79
  80         return 0;
  81 }
  82
  83 /*
  84  * Allocates a completion ring with vmem and stats optionally also allocating
  85  * a TX and/or RX ring.  Passing NULL as tx_ring_info and/or rx_ring_info
  86  * to not allocate them.
  87  *
  88  * Order in the allocation is:
  89  * stats - Always non-zero length
  90  * cp vmem - Always zero-length, supported for the bnxt_ring abstraction
  91  * tx vmem - Only non-zero length if tx_ring_info is not NULL
  92  * rx vmem - Only non-zero length if rx_ring_info is not NULL
  93  * cp bd ring - Always non-zero length
  94  * tx bd ring - Only non-zero length if tx_ring_info is not NULL
  95  * rx bd ring - Only non-zero length if rx_ring_info is not NULL
  96  */
  97 int bnxt_alloc_rings(struct bnxt *bp, uint16_t qidx,
  98                             struct bnxt_tx_queue *txq,
  99                             struct bnxt_rx_queue *rxq,
 100                             struct bnxt_cp_ring_info *cp_ring_info,
 101                             struct bnxt_cp_ring_info *nq_ring_info,
 102                             const char *suffix)
 103 {
 104         struct bnxt_ring *cp_ring = cp_ring_info->cp_ring_struct;
 105         struct bnxt_rx_ring_info *rx_ring_info = rxq ? rxq->rx_ring : NULL;
 106         struct bnxt_tx_ring_info *tx_ring_info = txq ? txq->tx_ring : NULL;
 107         struct bnxt_ring *tx_ring;
 108         struct bnxt_ring *rx_ring;
 109         struct rte_pci_device *pdev = bp->pdev;
 110         uint64_t rx_offloads = bp->eth_dev->data->dev_conf.rxmode.offloads;
 111         const struct rte_memzone *mz = NULL;
 112         char mz_name[RTE_MEMZONE_NAMESIZE];
 113         rte_iova_t mz_phys_addr;
 114
 115         int stats_len = (tx_ring_info || rx_ring_info) ?
 116             RTE_CACHE_LINE_ROUNDUP(sizeof(struct hwrm_stat_ctx_query_output) -
 117                                    sizeof (struct hwrm_resp_hdr)) : 0;
 118         stats_len = RTE_ALIGN(stats_len, 128);
 119
 120         int cp_vmem_start = stats_len;
 121         int cp_vmem_len = RTE_CACHE_LINE_ROUNDUP(cp_ring->vmem_size);
 122         cp_vmem_len = RTE_ALIGN(cp_vmem_len, 128);
 123
 124         int nq_vmem_len = nq_ring_info ?
 125                 RTE_CACHE_LINE_ROUNDUP(cp_ring->vmem_size) : 0;
 126         nq_vmem_len = RTE_ALIGN(nq_vmem_len, 128);
 127
 128         int nq_vmem_start = cp_vmem_start + cp_vmem_len;
 129
 130         int tx_vmem_start = nq_vmem_start + nq_vmem_len;
 131         int tx_vmem_len =
 132             tx_ring_info ? RTE_CACHE_LINE_ROUNDUP(tx_ring_info->
 133                                                 tx_ring_struct->vmem_size) : 0;
 134         tx_vmem_len = RTE_ALIGN(tx_vmem_len, 128);
 135
 136         int rx_vmem_start = tx_vmem_start + tx_vmem_len;
 137         int rx_vmem_len = rx_ring_info ?
 138                 RTE_CACHE_LINE_ROUNDUP(rx_ring_info->
 139                                                 rx_ring_struct->vmem_size) : 0;
 140         rx_vmem_len = RTE_ALIGN(rx_vmem_len, 128);
 141         int ag_vmem_start = 0;
 142         int ag_vmem_len = 0;
 143         int cp_ring_start =  0;
 144         int nq_ring_start = 0;
 145
 146         ag_vmem_start = rx_vmem_start + rx_vmem_len;
 147         ag_vmem_len = rx_ring_info ? RTE_CACHE_LINE_ROUNDUP(
 148                                 rx_ring_info->ag_ring_struct->vmem_size) : 0;
 149         cp_ring_start = ag_vmem_start + ag_vmem_len;
 150         cp_ring_start = RTE_ALIGN(cp_ring_start, 4096);
 151
 152         int cp_ring_len = RTE_CACHE_LINE_ROUNDUP(cp_ring->ring_size *
 153                                                  sizeof(struct cmpl_base));
 154         cp_ring_len = RTE_ALIGN(cp_ring_len, 128);
 155         nq_ring_start = cp_ring_start + cp_ring_len;
 156         nq_ring_start = RTE_ALIGN(nq_ring_start, 4096);
 157
 158         int nq_ring_len = nq_ring_info ? cp_ring_len : 0;
 159
 160         int tx_ring_start = nq_ring_start + nq_ring_len;
 161         tx_ring_start = RTE_ALIGN(tx_ring_start, 4096);
 162         int tx_ring_len = tx_ring_info ?
 163             RTE_CACHE_LINE_ROUNDUP(tx_ring_info->tx_ring_struct->ring_size *
 164                                    sizeof(struct tx_bd_long)) : 0;
 165         tx_ring_len = RTE_ALIGN(tx_ring_len, 4096);
 166
 167         int rx_ring_start = tx_ring_start + tx_ring_len;
 168         rx_ring_start = RTE_ALIGN(rx_ring_start, 4096);
 169         int rx_ring_len =  rx_ring_info ?
 170                 RTE_CACHE_LINE_ROUNDUP(rx_ring_info->rx_ring_struct->ring_size *
 171                 sizeof(struct rx_prod_pkt_bd)) : 0;
 172         rx_ring_len = RTE_ALIGN(rx_ring_len, 4096);
 173
 174         int ag_ring_start = rx_ring_start + rx_ring_len;
 175         ag_ring_start = RTE_ALIGN(ag_ring_start, 4096);
 176         int ag_ring_len = rx_ring_len * AGG_RING_SIZE_FACTOR;
 177         ag_ring_len = RTE_ALIGN(ag_ring_len, 4096);
 178
 179         int ag_bitmap_start = ag_ring_start + ag_ring_len;
 180         int ag_bitmap_len =  rx_ring_info ?
 181                 RTE_CACHE_LINE_ROUNDUP(rte_bitmap_get_memory_footprint(
 182                         rx_ring_info->rx_ring_struct->ring_size *
 183                         AGG_RING_SIZE_FACTOR)) : 0;
 184
 185         int tpa_info_start = ag_bitmap_start + ag_bitmap_len;
 186         int tpa_info_len = 0;
 187
 188         if (rx_ring_info && (rx_offloads & DEV_RX_OFFLOAD_TCP_LRO)) {
 189                 int tpa_max = BNXT_TPA_MAX_AGGS(bp);
 190
 191                 tpa_info_len = tpa_max * sizeof(struct bnxt_tpa_info);
 192                 tpa_info_len = RTE_CACHE_LINE_ROUNDUP(tpa_info_len);
 193         }
 194
 195         int total_alloc_len = tpa_info_start;
 196         total_alloc_len += tpa_info_len;
 197
 198         snprintf(mz_name, RTE_MEMZONE_NAMESIZE,
 199                  "bnxt_" PCI_PRI_FMT "-%04x_%s", pdev->addr.domain,
 200                  pdev->addr.bus, pdev->addr.devid, pdev->addr.function, qidx,
 201                  suffix);
 202         mz_name[RTE_MEMZONE_NAMESIZE - 1] = 0;
 203         mz = rte_memzone_lookup(mz_name);
 204         if (!mz) {
 205                 mz = rte_memzone_reserve_aligned(mz_name, total_alloc_len,
 206                                 SOCKET_ID_ANY,
 207                                 RTE_MEMZONE_2MB |
 208                                 RTE_MEMZONE_SIZE_HINT_ONLY |
 209                                 RTE_MEMZONE_IOVA_CONTIG,
 210                                 getpagesize());
 211                 if (mz == NULL)
 212                         return -ENOMEM;
 213         }
 214         memset(mz->addr, 0, mz->len);
 215         mz_phys_addr = mz->iova;
 216
 217         if (tx_ring_info) {
 218                 txq->mz = mz;
 219                 tx_ring = tx_ring_info->tx_ring_struct;
 220
 221                 tx_ring->bd = ((char *)mz->addr + tx_ring_start);
 222                 tx_ring_info->tx_desc_ring = (struct tx_bd_long *)tx_ring->bd;
 223                 tx_ring->bd_dma = mz_phys_addr + tx_ring_start;
 224                 tx_ring_info->tx_desc_mapping = tx_ring->bd_dma;
 225                 tx_ring->mem_zone = (const void *)mz;
 226
 227                 if (!tx_ring->bd)
 228                         return -ENOMEM;
 229                 if (tx_ring->vmem_size) {
 230                         tx_ring->vmem =
 231                             (void **)((char *)mz->addr + tx_vmem_start);
 232                         tx_ring_info->tx_buf_ring =
 233                             (struct bnxt_sw_tx_bd *)tx_ring->vmem;
 234                 }
 235         }
 236
 237         if (rx_ring_info) {
 238                 rxq->mz = mz;
 239                 rx_ring = rx_ring_info->rx_ring_struct;
 240
 241                 rx_ring->bd = ((char *)mz->addr + rx_ring_start);
 242                 rx_ring_info->rx_desc_ring =
 243                     (struct rx_prod_pkt_bd *)rx_ring->bd;
 244                 rx_ring->bd_dma = mz_phys_addr + rx_ring_start;
 245                 rx_ring_info->rx_desc_mapping = rx_ring->bd_dma;
 246                 rx_ring->mem_zone = (const void *)mz;
 247
 248                 if (!rx_ring->bd)
 249                         return -ENOMEM;
 250                 if (rx_ring->vmem_size) {
 251                         rx_ring->vmem =
 252                             (void **)((char *)mz->addr + rx_vmem_start);
 253                         rx_ring_info->rx_buf_ring =
 254                             (struct rte_mbuf **)rx_ring->vmem;
 255                 }
 256
 257                 rx_ring = rx_ring_info->ag_ring_struct;
 258
 259                 rx_ring->bd = ((char *)mz->addr + ag_ring_start);
 260                 rx_ring_info->ag_desc_ring =
 261                     (struct rx_prod_pkt_bd *)rx_ring->bd;
 262                 rx_ring->bd_dma = mz->iova + ag_ring_start;
 263                 rx_ring_info->ag_desc_mapping = rx_ring->bd_dma;
 264                 rx_ring->mem_zone = (const void *)mz;
 265
 266                 if (!rx_ring->bd)
 267                         return -ENOMEM;
 268                 if (rx_ring->vmem_size) {
 269                         rx_ring->vmem =
 270                             (void **)((char *)mz->addr + ag_vmem_start);
 271                         rx_ring_info->ag_buf_ring =
 272                             (struct rte_mbuf **)rx_ring->vmem;
 273                 }
 274
 275                 rx_ring_info->ag_bitmap =
 276                     rte_bitmap_init(rx_ring_info->rx_ring_struct->ring_size *
 277                                     AGG_RING_SIZE_FACTOR, (uint8_t *)mz->addr +
 278                                     ag_bitmap_start, ag_bitmap_len);
 279
 280                 /* TPA info */
 281                 if (rx_offloads & DEV_RX_OFFLOAD_TCP_LRO)
 282                         rx_ring_info->tpa_info =
 283                                 ((struct bnxt_tpa_info *)((char *)mz->addr +
 284                                                           tpa_info_start));
 285         }
 286
 287         cp_ring->bd = ((char *)mz->addr + cp_ring_start);
 288         cp_ring->bd_dma = mz_phys_addr + cp_ring_start;
 289         cp_ring_info->cp_desc_ring = cp_ring->bd;
 290         cp_ring_info->cp_desc_mapping = cp_ring->bd_dma;
 291         cp_ring->mem_zone = (const void *)mz;
 292
 293         if (!cp_ring->bd)
 294                 return -ENOMEM;
 295         if (cp_ring->vmem_size)
 296                 *cp_ring->vmem = ((char *)mz->addr + stats_len);
 297         if (stats_len) {
 298                 cp_ring_info->hw_stats = mz->addr;
 299                 cp_ring_info->hw_stats_map = mz_phys_addr;
 300         }
 301         cp_ring_info->hw_stats_ctx_id = HWRM_NA_SIGNATURE;
 302
 303         if (nq_ring_info) {
 304                 struct bnxt_ring *nq_ring = nq_ring_info->cp_ring_struct;
 305
 306                 nq_ring->bd = (char *)mz->addr + nq_ring_start;
 307                 nq_ring->bd_dma = mz_phys_addr + nq_ring_start;
 308                 nq_ring_info->cp_desc_ring = nq_ring->bd;
 309                 nq_ring_info->cp_desc_mapping = nq_ring->bd_dma;
 310                 nq_ring->mem_zone = (const void *)mz;
 311
 312                 if (!nq_ring->bd)
 313                         return -ENOMEM;
 314                 if (nq_ring->vmem_size)
 315                         *nq_ring->vmem = (char *)mz->addr + nq_vmem_start;
 316
 317                 nq_ring_info->hw_stats_ctx_id = HWRM_NA_SIGNATURE;
 318         }
 319
 320         return 0;
 321 }
 322
 323 static void bnxt_init_dflt_coal(struct bnxt_coal *coal)
 324 {
 325         /* Tick values in micro seconds.
 326          * 1 coal_buf x bufs_per_record = 1 completion record.
 327          */
 328         coal->num_cmpl_aggr_int = BNXT_NUM_CMPL_AGGR_INT;
 329         /* This is a 6-bit value and must not be 0, or we'll get non stop IRQ */
 330         coal->num_cmpl_dma_aggr = BNXT_NUM_CMPL_DMA_AGGR;
 331         /* This is a 6-bit value and must not be 0, or we'll get non stop IRQ */
 332         coal->num_cmpl_dma_aggr_during_int = BNXT_NUM_CMPL_DMA_AGGR_DURING_INT;
 333         coal->int_lat_tmr_max = BNXT_INT_LAT_TMR_MAX;
 334         /* min timer set to 1/2 of interrupt timer */
 335         coal->int_lat_tmr_min = BNXT_INT_LAT_TMR_MIN;
 336         /* buf timer set to 1/4 of interrupt timer */
 337         coal->cmpl_aggr_dma_tmr = BNXT_CMPL_AGGR_DMA_TMR;
 338         coal->cmpl_aggr_dma_tmr_during_int = BNXT_CMPL_AGGR_DMA_TMR_DURING_INT;
 339 }
 340
 341 static void bnxt_set_db(struct bnxt *bp,
 342                         struct bnxt_db_info *db,
 343                         uint32_t ring_type,
 344                         uint32_t map_idx,
 345                         uint32_t fid,
 346                         uint32_t ring_mask)
 347 {
 348         if (BNXT_CHIP_P5(bp)) {
 349                 if (BNXT_PF(bp))
 350                         db->doorbell = (char *)bp->doorbell_base + 0x10000;
 351                 else
 352                         db->doorbell = (char *)bp->doorbell_base + 0x4000;
 353                 switch (ring_type) {
 354                 case HWRM_RING_ALLOC_INPUT_RING_TYPE_TX:
 355                         db->db_key64 = DBR_PATH_L2 | DBR_TYPE_SQ;
 356                         break;
 357                 case HWRM_RING_ALLOC_INPUT_RING_TYPE_RX:
 358                 case HWRM_RING_ALLOC_INPUT_RING_TYPE_RX_AGG:
 359                         db->db_key64 = DBR_PATH_L2 | DBR_TYPE_SRQ;
 360                         break;
 361                 case HWRM_RING_ALLOC_INPUT_RING_TYPE_L2_CMPL:
 362                         db->db_key64 = DBR_PATH_L2 | DBR_TYPE_CQ;
 363                         break;
 364                 case HWRM_RING_ALLOC_INPUT_RING_TYPE_NQ:
 365                         db->db_key64 = DBR_PATH_L2;
 366                         break;
 367                 }
 368                 db->db_key64 |= (uint64_t)fid << DBR_XID_SFT;
 369                 db->db_64 = true;
 370         } else {
 371                 db->doorbell = (char *)bp->doorbell_base + map_idx * 0x80;
 372                 switch (ring_type) {
 373                 case HWRM_RING_ALLOC_INPUT_RING_TYPE_TX:
 374                         db->db_key32 = DB_KEY_TX;
 375                         break;
 376                 case HWRM_RING_ALLOC_INPUT_RING_TYPE_RX:
 377                         db->db_key32 = DB_KEY_RX;
 378                         break;
 379                 case HWRM_RING_ALLOC_INPUT_RING_TYPE_L2_CMPL:
 380                         db->db_key32 = DB_KEY_CP;
 381                         break;
 382                 }
 383                 db->db_64 = false;
 384         }
 385         db->db_ring_mask = ring_mask;
 386 }
 387
 388 static int bnxt_alloc_cmpl_ring(struct bnxt *bp, int queue_index,
 389                                 struct bnxt_cp_ring_info *cpr)
 390 {
 391         struct bnxt_ring *cp_ring = cpr->cp_ring_struct;
 392         uint32_t nq_ring_id = HWRM_NA_SIGNATURE;
 393         int cp_ring_index = queue_index + BNXT_RX_VEC_START;
 394         struct bnxt_cp_ring_info *nqr = bp->rxtx_nq_ring;
 395         uint8_t ring_type;
 396         int rc = 0;
 397
 398         ring_type = HWRM_RING_ALLOC_INPUT_RING_TYPE_L2_CMPL;
 399
 400         if (BNXT_HAS_NQ(bp)) {
 401                 if (nqr) {
 402                         nq_ring_id = nqr->cp_ring_struct->fw_ring_id;
 403                 } else {
 404                         PMD_DRV_LOG(ERR, "NQ ring is NULL\n");
 405                         return -EINVAL;
 406                 }
 407         }
 408
 409         rc = bnxt_hwrm_ring_alloc(bp, cp_ring, ring_type, cp_ring_index,
 410                                   HWRM_NA_SIGNATURE, nq_ring_id, 0);
 411         if (rc)
 412                 return rc;
 413
 414         cpr->cp_raw_cons = 0;
 415         bnxt_set_db(bp, &cpr->cp_db, ring_type, cp_ring_index,
 416                     cp_ring->fw_ring_id, cp_ring->ring_mask);
 417         bnxt_db_cq(cpr);
 418
 419         return 0;
 420 }
 421
 422 int bnxt_alloc_rxtx_nq_ring(struct bnxt *bp)
 423 {
 424         struct bnxt_cp_ring_info *nqr;
 425         struct bnxt_ring *ring;
 426         int ring_index = BNXT_NUM_ASYNC_CPR(bp);
 427         unsigned int socket_id;
 428         uint8_t ring_type;
 429         int rc = 0;
 430
 431         if (!BNXT_HAS_NQ(bp) || bp->rxtx_nq_ring)
 432                 return 0;
 433
 434         socket_id = rte_lcore_to_socket_id(rte_get_main_lcore());
 435
 436         nqr = rte_zmalloc_socket("nqr",
 437                                  sizeof(struct bnxt_cp_ring_info),
 438                                  RTE_CACHE_LINE_SIZE, socket_id);
 439         if (nqr == NULL)
 440                 return -ENOMEM;
 441
 442         ring = rte_zmalloc_socket("bnxt_cp_ring_struct",
 443                                   sizeof(struct bnxt_ring),
 444                                   RTE_CACHE_LINE_SIZE, socket_id);
 445         if (ring == NULL) {
 446                 rte_free(nqr);
 447                 return -ENOMEM;
 448         }
 449
 450         ring->bd = (void *)nqr->cp_desc_ring;
 451         ring->bd_dma = nqr->cp_desc_mapping;
 452         ring->ring_size = rte_align32pow2(DEFAULT_CP_RING_SIZE);
 453         ring->ring_mask = ring->ring_size - 1;
 454         ring->vmem_size = 0;
 455         ring->vmem = NULL;
 456         ring->fw_ring_id = INVALID_HW_RING_ID;
 457
 458         nqr->cp_ring_struct = ring;
 459         rc = bnxt_alloc_rings(bp, 0, NULL, NULL, nqr, NULL, "l2_nqr");
 460         if (rc) {
 461                 rte_free(ring);
 462                 rte_free(nqr);
 463                 return -ENOMEM;
 464         }
 465
 466         ring_type = HWRM_RING_ALLOC_INPUT_RING_TYPE_NQ;
 467
 468         rc = bnxt_hwrm_ring_alloc(bp, ring, ring_type, ring_index,
 469                                   HWRM_NA_SIGNATURE, HWRM_NA_SIGNATURE, 0);
 470         if (rc) {
 471                 rte_free(ring);
 472                 rte_free(nqr);
 473                 return rc;
 474         }
 475
 476         bnxt_set_db(bp, &nqr->cp_db, ring_type, ring_index,
 477                     ring->fw_ring_id, ring->ring_mask);
 478         bnxt_db_nq(nqr);
 479
 480         bp->rxtx_nq_ring = nqr;
 481
 482         return 0;
 483 }
 484
 485 /* Free RX/TX NQ ring.  */
 486 void bnxt_free_rxtx_nq_ring(struct bnxt *bp)
 487 {
 488         struct bnxt_cp_ring_info *nqr = bp->rxtx_nq_ring;
 489
 490         if (!nqr)
 491                 return;
 492
 493         bnxt_free_nq_ring(bp, nqr);
 494
 495         bnxt_free_ring(nqr->cp_ring_struct);
 496         rte_free(nqr->cp_ring_struct);
 497         nqr->cp_ring_struct = NULL;
 498         rte_free(nqr);
 499         bp->rxtx_nq_ring = NULL;
 500 }
 501
 502 static int bnxt_alloc_rx_ring(struct bnxt *bp, int queue_index)
 503 {
 504         struct bnxt_rx_queue *rxq = bp->rx_queues[queue_index];
 505         struct bnxt_cp_ring_info *cpr = rxq->cp_ring;
 506         struct bnxt_ring *cp_ring = cpr->cp_ring_struct;
 507         struct bnxt_rx_ring_info *rxr = rxq->rx_ring;
 508         struct bnxt_ring *ring = rxr->rx_ring_struct;
 509         uint8_t ring_type;
 510         int rc = 0;
 511
 512         ring_type = HWRM_RING_ALLOC_INPUT_RING_TYPE_RX;
 513
 514         rc = bnxt_hwrm_ring_alloc(bp, ring, ring_type,
 515                                   queue_index, cpr->hw_stats_ctx_id,
 516                                   cp_ring->fw_ring_id, 0);
 517         if (rc)
 518                 return rc;
 519
 520         rxr->rx_raw_prod = 0;
 521         if (BNXT_HAS_RING_GRPS(bp))
 522                 bp->grp_info[queue_index].rx_fw_ring_id = ring->fw_ring_id;
 523         bnxt_set_db(bp, &rxr->rx_db, ring_type, queue_index, ring->fw_ring_id,
 524                     ring->ring_mask);
 525         bnxt_db_write(&rxr->rx_db, rxr->rx_raw_prod);
 526
 527         return 0;
 528 }
 529
 530 static int bnxt_alloc_rx_agg_ring(struct bnxt *bp, int queue_index)
 531 {
 532         unsigned int map_idx = queue_index + bp->rx_cp_nr_rings;
 533         struct bnxt_rx_queue *rxq = bp->rx_queues[queue_index];
 534         struct bnxt_cp_ring_info *cpr = rxq->cp_ring;
 535         struct bnxt_ring *cp_ring = cpr->cp_ring_struct;
 536         struct bnxt_rx_ring_info *rxr = rxq->rx_ring;
 537         struct bnxt_ring *ring = rxr->ag_ring_struct;
 538         uint32_t hw_stats_ctx_id = HWRM_NA_SIGNATURE;
 539         uint8_t ring_type;
 540         int rc = 0;
 541
 542         ring->fw_rx_ring_id = rxr->rx_ring_struct->fw_ring_id;
 543
 544         if (BNXT_CHIP_P5(bp)) {
 545                 ring_type = HWRM_RING_ALLOC_INPUT_RING_TYPE_RX_AGG;
 546                 hw_stats_ctx_id = cpr->hw_stats_ctx_id;
 547         } else {
 548                 ring_type = HWRM_RING_ALLOC_INPUT_RING_TYPE_RX;
 549         }
 550
 551         rc = bnxt_hwrm_ring_alloc(bp, ring, ring_type, map_idx,
 552                                   hw_stats_ctx_id, cp_ring->fw_ring_id, 0);
 553
 554         if (rc)
 555                 return rc;
 556
 557         rxr->ag_raw_prod = 0;
 558         if (BNXT_HAS_RING_GRPS(bp))
 559                 bp->grp_info[queue_index].ag_fw_ring_id = ring->fw_ring_id;
 560         bnxt_set_db(bp, &rxr->ag_db, ring_type, map_idx, ring->fw_ring_id,
 561                     ring->ring_mask);
 562         bnxt_db_write(&rxr->ag_db, rxr->ag_raw_prod);
 563
 564         return 0;
 565 }
 566
 567 int bnxt_alloc_hwrm_rx_ring(struct bnxt *bp, int queue_index)
 568 {
 569         struct bnxt_rx_queue *rxq = bp->rx_queues[queue_index];
 570         struct bnxt_cp_ring_info *cpr = rxq->cp_ring;
 571         struct bnxt_ring *cp_ring = cpr->cp_ring_struct;
 572         struct bnxt_rx_ring_info *rxr = rxq->rx_ring;
 573         int rc;
 574
 575         rc = bnxt_alloc_cmpl_ring(bp, queue_index, cpr);
 576         if (rc)
 577                 goto err_out;
 578
 579         if (BNXT_HAS_RING_GRPS(bp)) {
 580                 bp->grp_info[queue_index].fw_stats_ctx = cpr->hw_stats_ctx_id;
 581                 bp->grp_info[queue_index].cp_fw_ring_id = cp_ring->fw_ring_id;
 582         }
 583
 584         if (!BNXT_NUM_ASYNC_CPR(bp) && !queue_index) {
 585                 /*
 586                  * If a dedicated async event completion ring is not enabled,
 587                  * use the first completion ring from PF or VF as the default
 588                  * completion ring for async event handling.
 589                  */
 590                 bp->async_cp_ring = cpr;
 591                 rc = bnxt_hwrm_set_async_event_cr(bp);
 592                 if (rc)
 593                         goto err_out;
 594         }
 595
 596         rc = bnxt_alloc_rx_ring(bp, queue_index);
 597         if (rc)
 598                 goto err_out;
 599
 600         rc = bnxt_alloc_rx_agg_ring(bp, queue_index);
 601         if (rc)
 602                 goto err_out;
 603
 604         if (rxq->rx_started) {
 605                 if (bnxt_init_one_rx_ring(rxq)) {
 606                         PMD_DRV_LOG(ERR, "bnxt_init_one_rx_ring failed!\n");
 607                         bnxt_rx_queue_release_op(rxq);
 608                         rc = -ENOMEM;
 609                         goto err_out;
 610                 }
 611                 bnxt_db_write(&rxr->rx_db, rxr->rx_raw_prod);
 612                 bnxt_db_write(&rxr->ag_db, rxr->ag_raw_prod);
 613         }
 614         rxq->index = queue_index;
 615 #if defined(RTE_ARCH_X86) || defined(RTE_ARCH_ARM64)
 616         bnxt_rxq_vec_setup(rxq);
 617 #endif
 618
 619         return 0;
 620
 621 err_out:
 622         PMD_DRV_LOG(ERR,
 623                     "Failed to allocate receive queue %d, rc %d.\n",
 624                     queue_index, rc);
 625         return rc;
 626 }
 627
 628 /* Initialise all rings to -1, its used to free rings later if allocation
 629  * of few rings fails.
 630  */
 631 static void bnxt_init_all_rings(struct bnxt *bp)
 632 {
 633         unsigned int i = 0;
 634         struct bnxt_rx_queue *rxq;
 635         struct bnxt_ring *cp_ring;
 636         struct bnxt_ring *ring;
 637         struct bnxt_rx_ring_info *rxr;
 638         struct bnxt_tx_queue *txq;
 639
 640         for (i = 0; i < bp->rx_cp_nr_rings; i++) {
 641                 rxq = bp->rx_queues[i];
 642                 /* Rx-compl */
 643                 cp_ring = rxq->cp_ring->cp_ring_struct;
 644                 cp_ring->fw_ring_id = INVALID_HW_RING_ID;
 645                 /* Rx-Reg */
 646                 rxr = rxq->rx_ring;
 647                 ring = rxr->rx_ring_struct;
 648                 ring->fw_ring_id = INVALID_HW_RING_ID;
 649                 /* Rx-AGG */
 650                 ring = rxr->ag_ring_struct;
 651                 ring->fw_ring_id = INVALID_HW_RING_ID;
 652         }
 653         for (i = 0; i < bp->tx_cp_nr_rings; i++) {
 654                 txq = bp->tx_queues[i];
 655                 /* Tx cmpl */
 656                 cp_ring = txq->cp_ring->cp_ring_struct;
 657                 cp_ring->fw_ring_id = INVALID_HW_RING_ID;
 658                 /*Tx Ring */
 659                 ring = txq->tx_ring->tx_ring_struct;
 660                 ring->fw_ring_id = INVALID_HW_RING_ID;
 661         }
 662 }
 663
 664 /* ring_grp usage:
 665  * [0] = default completion ring
 666  * [1 -> +rx_cp_nr_rings] = rx_cp, rx rings
 667  * [1+rx_cp_nr_rings + 1 -> +tx_cp_nr_rings] = tx_cp, tx rings
 668  */
 669 int bnxt_alloc_hwrm_rings(struct bnxt *bp)
 670 {
 671         struct bnxt_coal coal;
 672         unsigned int i;
 673         uint8_t ring_type;
 674         int rc = 0;
 675
 676         bnxt_init_dflt_coal(&coal);
 677         bnxt_init_all_rings(bp);
 678
 679         for (i = 0; i < bp->rx_cp_nr_rings; i++) {
 680                 struct bnxt_rx_queue *rxq = bp->rx_queues[i];
 681                 struct bnxt_cp_ring_info *cpr = rxq->cp_ring;
 682                 struct bnxt_ring *cp_ring = cpr->cp_ring_struct;
 683                 struct bnxt_rx_ring_info *rxr = rxq->rx_ring;
 684
 685                 if (bnxt_alloc_cmpl_ring(bp, i, cpr))
 686                         goto err_out;
 687
 688                 if (BNXT_HAS_RING_GRPS(bp)) {
 689                         bp->grp_info[i].fw_stats_ctx = cpr->hw_stats_ctx_id;
 690                         bp->grp_info[i].cp_fw_ring_id = cp_ring->fw_ring_id;
 691                 }
 692
 693                 bnxt_hwrm_set_ring_coal(bp, &coal, cp_ring->fw_ring_id);
 694                 if (!BNXT_NUM_ASYNC_CPR(bp) && !i) {
 695                         /*
 696                          * If a dedicated async event completion ring is not
 697                          * enabled, use the first completion ring as the default
 698                          * completion ring for async event handling.
 699                          */
 700                         bp->async_cp_ring = cpr;
 701                         rc = bnxt_hwrm_set_async_event_cr(bp);
 702                         if (rc)
 703                                 goto err_out;
 704                 }
 705
 706                 if (bnxt_alloc_rx_ring(bp, i))
 707                         goto err_out;
 708
 709                 if (bnxt_alloc_rx_agg_ring(bp, i))
 710                         goto err_out;
 711
 712                 if (bnxt_init_one_rx_ring(rxq)) {
 713                         PMD_DRV_LOG(ERR, "bnxt_init_one_rx_ring failed!\n");
 714                         bnxt_rx_queue_release_op(rxq);
 715                         return -ENOMEM;
 716                 }
 717                 bnxt_db_write(&rxr->rx_db, rxr->rx_raw_prod);
 718                 bnxt_db_write(&rxr->ag_db, rxr->ag_raw_prod);
 719                 rxq->index = i;
 720 #if defined(RTE_ARCH_X86) || defined(RTE_ARCH_ARM64)
 721                 bnxt_rxq_vec_setup(rxq);
 722 #endif
 723         }
 724
 725         for (i = 0; i < bp->tx_cp_nr_rings; i++) {
 726                 struct bnxt_tx_queue *txq = bp->tx_queues[i];
 727                 struct bnxt_cp_ring_info *cpr = txq->cp_ring;
 728                 struct bnxt_ring *cp_ring = cpr->cp_ring_struct;
 729                 struct bnxt_tx_ring_info *txr = txq->tx_ring;
 730                 struct bnxt_ring *ring = txr->tx_ring_struct;
 731                 unsigned int idx = i + bp->rx_cp_nr_rings;
 732                 uint16_t tx_cosq_id = 0;
 733
 734                 if (bnxt_alloc_cmpl_ring(bp, idx, cpr))
 735                         goto err_out;
 736
 737                 if (bp->vnic_cap_flags & BNXT_VNIC_CAP_COS_CLASSIFY)
 738                         tx_cosq_id = bp->tx_cosq_id[i < bp->max_lltc ? i : 0];
 739                 else
 740                         tx_cosq_id = bp->tx_cosq_id[0];
 741                 /* Tx ring */
 742                 ring_type = HWRM_RING_ALLOC_INPUT_RING_TYPE_TX;
 743                 rc = bnxt_hwrm_ring_alloc(bp, ring,
 744                                           ring_type,
 745                                           i, cpr->hw_stats_ctx_id,
 746                                           cp_ring->fw_ring_id,
 747                                           tx_cosq_id);
 748                 if (rc)
 749                         goto err_out;
 750
 751                 bnxt_set_db(bp, &txr->tx_db, ring_type, i, ring->fw_ring_id,
 752                             ring->ring_mask);
 753                 txq->index = idx;
 754                 bnxt_hwrm_set_ring_coal(bp, &coal, cp_ring->fw_ring_id);
 755         }
 756
 757 err_out:
 758         return rc;
 759 }
 760
 761 /* Allocate dedicated async completion ring. */
 762 int bnxt_alloc_async_cp_ring(struct bnxt *bp)
 763 {
 764         struct bnxt_cp_ring_info *cpr = bp->async_cp_ring;
 765         struct bnxt_ring *cp_ring;
 766         uint8_t ring_type;
 767         int rc;
 768
 769         if (BNXT_NUM_ASYNC_CPR(bp) == 0 || cpr == NULL)
 770                 return 0;
 771
 772         cp_ring = cpr->cp_ring_struct;
 773
 774         if (BNXT_HAS_NQ(bp))
 775                 ring_type = HWRM_RING_ALLOC_INPUT_RING_TYPE_NQ;
 776         else
 777                 ring_type = HWRM_RING_ALLOC_INPUT_RING_TYPE_L2_CMPL;
 778
 779         rc = bnxt_hwrm_ring_alloc(bp, cp_ring, ring_type, 0,
 780                                   HWRM_NA_SIGNATURE, HWRM_NA_SIGNATURE, 0);
 781
 782         if (rc)
 783                 return rc;
 784
 785         cpr->cp_raw_cons = 0;
 786         cpr->valid = 0;
 787         bnxt_set_db(bp, &cpr->cp_db, ring_type, 0,
 788                     cp_ring->fw_ring_id, cp_ring->ring_mask);
 789
 790         if (BNXT_HAS_NQ(bp))
 791                 bnxt_db_nq(cpr);
 792         else
 793                 bnxt_db_cq(cpr);
 794
 795         return bnxt_hwrm_set_async_event_cr(bp);
 796 }
 797
 798 /* Free dedicated async completion ring. */
 799 void bnxt_free_async_cp_ring(struct bnxt *bp)
 800 {
 801         struct bnxt_cp_ring_info *cpr = bp->async_cp_ring;
 802
 803         if (BNXT_NUM_ASYNC_CPR(bp) == 0 || cpr == NULL)
 804                 return;
 805
 806         if (BNXT_HAS_NQ(bp))
 807                 bnxt_free_nq_ring(bp, cpr);
 808         else
 809                 bnxt_free_cp_ring(bp, cpr);
 810
 811         bnxt_free_ring(cpr->cp_ring_struct);
 812         rte_free(cpr->cp_ring_struct);
 813         cpr->cp_ring_struct = NULL;
 814         rte_free(cpr);
 815         bp->async_cp_ring = NULL;
 816 }
 817
 818 int bnxt_alloc_async_ring_struct(struct bnxt *bp)
 819 {
 820         struct bnxt_cp_ring_info *cpr = NULL;
 821         struct bnxt_ring *ring = NULL;
 822         unsigned int socket_id;
 823
 824         if (BNXT_NUM_ASYNC_CPR(bp) == 0)
 825                 return 0;
 826
 827         socket_id = rte_lcore_to_socket_id(rte_get_main_lcore());
 828
 829         cpr = rte_zmalloc_socket("cpr",
 830                                  sizeof(struct bnxt_cp_ring_info),
 831                                  RTE_CACHE_LINE_SIZE, socket_id);
 832         if (cpr == NULL)
 833                 return -ENOMEM;
 834
 835         ring = rte_zmalloc_socket("bnxt_cp_ring_struct",
 836                                   sizeof(struct bnxt_ring),
 837                                   RTE_CACHE_LINE_SIZE, socket_id);
 838         if (ring == NULL) {
 839                 rte_free(cpr);
 840                 return -ENOMEM;
 841         }
 842
 843         ring->bd = (void *)cpr->cp_desc_ring;
 844         ring->bd_dma = cpr->cp_desc_mapping;
 845         ring->ring_size = rte_align32pow2(DEFAULT_CP_RING_SIZE);
 846         ring->ring_mask = ring->ring_size - 1;
 847         ring->vmem_size = 0;
 848         ring->vmem = NULL;
 849
 850         bp->async_cp_ring = cpr;
 851         cpr->cp_ring_struct = ring;
 852
 853         return bnxt_alloc_rings(bp, 0, NULL, NULL,
 854                                 bp->async_cp_ring, NULL,
 855                                 "def_cp");
 856 }