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34 #include <rte_memzone.h>
39 #include "bnxt_hwrm.h"
40 #include "bnxt_ring.h"
46 #include "hsi_struct_def_dpdk.h"
49 * Generic ring handling
52 void bnxt_free_ring(struct bnxt_ring *ring)
54 if (ring->vmem_size && *ring->vmem) {
55 memset((char *)*ring->vmem, 0, ring->vmem_size);
58 rte_memzone_free((const struct rte_memzone *)ring->mem_zone);
65 void bnxt_init_ring_grps(struct bnxt *bp)
69 for (i = 0; i < bp->max_ring_grps; i++)
70 memset(&bp->grp_info[i], (uint8_t)HWRM_NA_SIGNATURE,
71 sizeof(struct bnxt_ring_grp_info));
75 * Allocates a completion ring with vmem and stats optionally also allocating
76 * a TX and/or RX ring. Passing NULL as tx_ring_info and/or rx_ring_info
77 * to not allocate them.
79 * Order in the allocation is:
80 * stats - Always non-zero length
81 * cp vmem - Always zero-length, supported for the bnxt_ring abstraction
82 * tx vmem - Only non-zero length if tx_ring_info is not NULL
83 * rx vmem - Only non-zero length if rx_ring_info is not NULL
84 * cp bd ring - Always non-zero length
85 * tx bd ring - Only non-zero length if tx_ring_info is not NULL
86 * rx bd ring - Only non-zero length if rx_ring_info is not NULL
88 int bnxt_alloc_rings(struct bnxt *bp, uint16_t qidx,
89 struct bnxt_tx_ring_info *tx_ring_info,
90 struct bnxt_rx_ring_info *rx_ring_info,
91 struct bnxt_cp_ring_info *cp_ring_info,
94 struct bnxt_ring *cp_ring = cp_ring_info->cp_ring_struct;
95 struct bnxt_ring *tx_ring;
96 struct bnxt_ring *rx_ring;
97 struct rte_pci_device *pdev = bp->pdev;
98 const struct rte_memzone *mz = NULL;
99 char mz_name[RTE_MEMZONE_NAMESIZE];
100 phys_addr_t mz_phys_addr;
103 int stats_len = (tx_ring_info || rx_ring_info) ?
104 RTE_CACHE_LINE_ROUNDUP(sizeof(struct ctx_hw_stats64)) : 0;
106 int cp_vmem_start = stats_len;
107 int cp_vmem_len = RTE_CACHE_LINE_ROUNDUP(cp_ring->vmem_size);
109 int tx_vmem_start = cp_vmem_start + cp_vmem_len;
111 tx_ring_info ? RTE_CACHE_LINE_ROUNDUP(tx_ring_info->
112 tx_ring_struct->vmem_size) : 0;
114 int rx_vmem_start = tx_vmem_start + tx_vmem_len;
115 int rx_vmem_len = rx_ring_info ?
116 RTE_CACHE_LINE_ROUNDUP(rx_ring_info->
117 rx_ring_struct->vmem_size) : 0;
118 int ag_vmem_start = 0;
120 int cp_ring_start = 0;
122 ag_vmem_start = rx_vmem_start + rx_vmem_len;
123 ag_vmem_len = rx_ring_info ? RTE_CACHE_LINE_ROUNDUP(
124 rx_ring_info->ag_ring_struct->vmem_size) : 0;
125 cp_ring_start = ag_vmem_start + ag_vmem_len;
127 int cp_ring_len = RTE_CACHE_LINE_ROUNDUP(cp_ring->ring_size *
128 sizeof(struct cmpl_base));
130 int tx_ring_start = cp_ring_start + cp_ring_len;
131 int tx_ring_len = tx_ring_info ?
132 RTE_CACHE_LINE_ROUNDUP(tx_ring_info->tx_ring_struct->ring_size *
133 sizeof(struct tx_bd_long)) : 0;
135 int rx_ring_start = tx_ring_start + tx_ring_len;
136 int rx_ring_len = rx_ring_info ?
137 RTE_CACHE_LINE_ROUNDUP(rx_ring_info->rx_ring_struct->ring_size *
138 sizeof(struct rx_prod_pkt_bd)) : 0;
140 int total_alloc_len = rx_ring_start + rx_ring_len;
141 int ag_ring_start = 0;
143 ag_ring_start = rx_ring_start + rx_ring_len;
144 total_alloc_len = ag_ring_start + rx_ring_len * AGG_RING_SIZE_FACTOR;
146 snprintf(mz_name, RTE_MEMZONE_NAMESIZE,
147 "bnxt_%04x:%02x:%02x:%02x-%04x_%s", pdev->addr.domain,
148 pdev->addr.bus, pdev->addr.devid, pdev->addr.function, qidx,
150 mz_name[RTE_MEMZONE_NAMESIZE - 1] = 0;
151 mz = rte_memzone_lookup(mz_name);
153 mz = rte_memzone_reserve_aligned(mz_name, total_alloc_len,
156 RTE_MEMZONE_SIZE_HINT_ONLY,
161 memset(mz->addr, 0, mz->len);
162 mz_phys_addr = mz->phys_addr;
163 if ((unsigned long)mz->addr == mz_phys_addr) {
164 RTE_LOG(WARNING, PMD,
165 "Memzone physical address same as virtual.\n");
166 RTE_LOG(WARNING, PMD,
167 "Using rte_mem_virt2phy()\n");
168 for (sz = 0; sz < total_alloc_len; sz += getpagesize())
169 rte_mem_lock_page(((char *)mz->addr) + sz);
170 mz_phys_addr = rte_mem_virt2phy(mz->addr);
171 if (mz_phys_addr == 0) {
173 "unable to map ring address to physical memory\n");
179 tx_ring = tx_ring_info->tx_ring_struct;
181 tx_ring->bd = ((char *)mz->addr + tx_ring_start);
182 tx_ring_info->tx_desc_ring = (struct tx_bd_long *)tx_ring->bd;
183 tx_ring->bd_dma = mz_phys_addr + tx_ring_start;
184 tx_ring_info->tx_desc_mapping = tx_ring->bd_dma;
185 tx_ring->mem_zone = (const void *)mz;
189 if (tx_ring->vmem_size) {
191 (void **)((char *)mz->addr + tx_vmem_start);
192 tx_ring_info->tx_buf_ring =
193 (struct bnxt_sw_tx_bd *)tx_ring->vmem;
198 rx_ring = rx_ring_info->rx_ring_struct;
200 rx_ring->bd = ((char *)mz->addr + rx_ring_start);
201 rx_ring_info->rx_desc_ring =
202 (struct rx_prod_pkt_bd *)rx_ring->bd;
203 rx_ring->bd_dma = mz_phys_addr + rx_ring_start;
204 rx_ring_info->rx_desc_mapping = rx_ring->bd_dma;
205 rx_ring->mem_zone = (const void *)mz;
209 if (rx_ring->vmem_size) {
211 (void **)((char *)mz->addr + rx_vmem_start);
212 rx_ring_info->rx_buf_ring =
213 (struct bnxt_sw_rx_bd *)rx_ring->vmem;
216 rx_ring = rx_ring_info->ag_ring_struct;
218 rx_ring->bd = ((char *)mz->addr + ag_ring_start);
219 rx_ring_info->ag_desc_ring =
220 (struct rx_prod_pkt_bd *)rx_ring->bd;
221 rx_ring->bd_dma = mz->phys_addr + ag_ring_start;
222 rx_ring_info->ag_desc_mapping = rx_ring->bd_dma;
223 rx_ring->mem_zone = (const void *)mz;
227 if (rx_ring->vmem_size) {
229 (void **)((char *)mz->addr + ag_vmem_start);
230 rx_ring_info->ag_buf_ring =
231 (struct bnxt_sw_rx_bd *)rx_ring->vmem;
235 cp_ring->bd = ((char *)mz->addr + cp_ring_start);
236 cp_ring->bd_dma = mz_phys_addr + cp_ring_start;
237 cp_ring_info->cp_desc_ring = cp_ring->bd;
238 cp_ring_info->cp_desc_mapping = cp_ring->bd_dma;
239 cp_ring->mem_zone = (const void *)mz;
243 if (cp_ring->vmem_size)
244 *cp_ring->vmem = ((char *)mz->addr + stats_len);
246 cp_ring_info->hw_stats = mz->addr;
247 cp_ring_info->hw_stats_map = mz_phys_addr;
249 cp_ring_info->hw_stats_ctx_id = HWRM_NA_SIGNATURE;
254 * [0] = default completion ring
255 * [1 -> +rx_cp_nr_rings] = rx_cp, rx rings
256 * [1+rx_cp_nr_rings + 1 -> +tx_cp_nr_rings] = tx_cp, tx rings
258 int bnxt_alloc_hwrm_rings(struct bnxt *bp)
260 struct rte_pci_device *pci_dev = bp->pdev;
264 for (i = 0; i < bp->rx_cp_nr_rings; i++) {
265 struct bnxt_rx_queue *rxq = bp->rx_queues[i];
266 struct bnxt_cp_ring_info *cpr = rxq->cp_ring;
267 struct bnxt_ring *cp_ring = cpr->cp_ring_struct;
268 struct bnxt_rx_ring_info *rxr = rxq->rx_ring;
269 struct bnxt_ring *ring = rxr->rx_ring_struct;
270 unsigned int idx = i + 1;
271 unsigned int map_idx = idx + bp->rx_cp_nr_rings;
273 bp->grp_info[i].fw_stats_ctx = cpr->hw_stats_ctx_id;
276 rc = bnxt_hwrm_ring_alloc(bp, cp_ring,
277 HWRM_RING_ALLOC_INPUT_RING_TYPE_L2_CMPL,
278 idx, HWRM_NA_SIGNATURE,
282 cpr->cp_doorbell = (char *)pci_dev->mem_resource[2].addr +
284 bp->grp_info[i].cp_fw_ring_id = cp_ring->fw_ring_id;
285 B_CP_DIS_DB(cpr, cpr->cp_raw_cons);
288 rc = bnxt_hwrm_ring_alloc(bp, ring,
289 HWRM_RING_ALLOC_INPUT_RING_TYPE_RX,
290 idx, cpr->hw_stats_ctx_id,
291 cp_ring->fw_ring_id);
295 rxr->rx_doorbell = (char *)pci_dev->mem_resource[2].addr +
297 bp->grp_info[i].rx_fw_ring_id = ring->fw_ring_id;
298 B_RX_DB(rxr->rx_doorbell, rxr->rx_prod);
300 ring = rxr->ag_ring_struct;
303 RTE_LOG(ERR, PMD, "Alloc AGG Ring is NULL!\n");
305 rc = bnxt_hwrm_ring_alloc(bp, ring,
306 HWRM_RING_ALLOC_INPUT_RING_TYPE_RX,
307 map_idx, HWRM_NA_SIGNATURE,
308 cp_ring->fw_ring_id);
311 RTE_LOG(DEBUG, PMD, "Alloc AGG Done!\n");
314 (char *)pci_dev->mem_resource[2].addr +
316 bp->grp_info[i].ag_fw_ring_id = ring->fw_ring_id;
317 B_RX_DB(rxr->ag_doorbell, rxr->ag_prod);
319 rxq->rx_buf_use_size = BNXT_MAX_MTU + ETHER_HDR_LEN +
320 ETHER_CRC_LEN + (2 * VLAN_TAG_SIZE);
321 if (bnxt_init_one_rx_ring(rxq)) {
322 RTE_LOG(ERR, PMD, "bnxt_init_one_rx_ring failed!\n");
323 bnxt_rx_queue_release_op(rxq);
326 B_RX_DB(rxr->rx_doorbell, rxr->rx_prod);
327 B_RX_DB(rxr->ag_doorbell, rxr->ag_prod);
331 for (i = 0; i < bp->tx_cp_nr_rings; i++) {
332 struct bnxt_tx_queue *txq = bp->tx_queues[i];
333 struct bnxt_cp_ring_info *cpr = txq->cp_ring;
334 struct bnxt_ring *cp_ring = cpr->cp_ring_struct;
335 struct bnxt_tx_ring_info *txr = txq->tx_ring;
336 struct bnxt_ring *ring = txr->tx_ring_struct;
337 unsigned int idx = i + 1 + bp->rx_cp_nr_rings;
339 /* Account for AGG Rings. AGG ring cnt = Rx Cmpl ring cnt */
340 idx += bp->rx_cp_nr_rings;
343 rc = bnxt_hwrm_ring_alloc(bp, cp_ring,
344 HWRM_RING_ALLOC_INPUT_RING_TYPE_L2_CMPL,
345 idx, HWRM_NA_SIGNATURE,
350 cpr->cp_doorbell = (char *)pci_dev->mem_resource[2].addr +
352 B_CP_DIS_DB(cpr, cpr->cp_raw_cons);
355 rc = bnxt_hwrm_ring_alloc(bp, ring,
356 HWRM_RING_ALLOC_INPUT_RING_TYPE_TX,
357 idx, cpr->hw_stats_ctx_id,
358 cp_ring->fw_ring_id);
362 txr->tx_doorbell = (char *)pci_dev->mem_resource[2].addr +