1 /* SPDX-License-Identifier: BSD-3-Clause
2 * Copyright(c) 2014-2018 Broadcom
6 #include <rte_bitmap.h>
7 #include <rte_memzone.h>
12 #include "bnxt_hwrm.h"
13 #include "bnxt_ring.h"
19 #include "hsi_struct_def_dpdk.h"
22 * Generic ring handling
25 void bnxt_free_ring(struct bnxt_ring *ring)
27 if (ring->vmem_size && *ring->vmem) {
28 memset((char *)*ring->vmem, 0, ring->vmem_size);
31 rte_memzone_free((const struct rte_memzone *)ring->mem_zone);
38 int bnxt_init_ring_grps(struct bnxt *bp)
42 for (i = 0; i < bp->max_ring_grps; i++)
43 memset(&bp->grp_info[i], (uint8_t)HWRM_NA_SIGNATURE,
44 sizeof(struct bnxt_ring_grp_info));
50 * Allocates a completion ring with vmem and stats optionally also allocating
51 * a TX and/or RX ring. Passing NULL as tx_ring_info and/or rx_ring_info
52 * to not allocate them.
54 * Order in the allocation is:
55 * stats - Always non-zero length
56 * cp vmem - Always zero-length, supported for the bnxt_ring abstraction
57 * tx vmem - Only non-zero length if tx_ring_info is not NULL
58 * rx vmem - Only non-zero length if rx_ring_info is not NULL
59 * cp bd ring - Always non-zero length
60 * tx bd ring - Only non-zero length if tx_ring_info is not NULL
61 * rx bd ring - Only non-zero length if rx_ring_info is not NULL
63 int bnxt_alloc_rings(struct bnxt *bp, uint16_t qidx,
64 struct bnxt_tx_ring_info *tx_ring_info,
65 struct bnxt_rx_ring_info *rx_ring_info,
66 struct bnxt_cp_ring_info *cp_ring_info,
69 struct bnxt_ring *cp_ring = cp_ring_info->cp_ring_struct;
70 struct bnxt_ring *tx_ring;
71 struct bnxt_ring *rx_ring;
72 struct rte_pci_device *pdev = bp->pdev;
73 const struct rte_memzone *mz = NULL;
74 char mz_name[RTE_MEMZONE_NAMESIZE];
75 rte_iova_t mz_phys_addr;
78 int stats_len = (tx_ring_info || rx_ring_info) ?
79 RTE_CACHE_LINE_ROUNDUP(sizeof(struct ctx_hw_stats64)) : 0;
81 int cp_vmem_start = stats_len;
82 int cp_vmem_len = RTE_CACHE_LINE_ROUNDUP(cp_ring->vmem_size);
84 int tx_vmem_start = cp_vmem_start + cp_vmem_len;
86 tx_ring_info ? RTE_CACHE_LINE_ROUNDUP(tx_ring_info->
87 tx_ring_struct->vmem_size) : 0;
89 int rx_vmem_start = tx_vmem_start + tx_vmem_len;
90 int rx_vmem_len = rx_ring_info ?
91 RTE_CACHE_LINE_ROUNDUP(rx_ring_info->
92 rx_ring_struct->vmem_size) : 0;
93 int ag_vmem_start = 0;
95 int cp_ring_start = 0;
97 ag_vmem_start = rx_vmem_start + rx_vmem_len;
98 ag_vmem_len = rx_ring_info ? RTE_CACHE_LINE_ROUNDUP(
99 rx_ring_info->ag_ring_struct->vmem_size) : 0;
100 cp_ring_start = ag_vmem_start + ag_vmem_len;
102 int cp_ring_len = RTE_CACHE_LINE_ROUNDUP(cp_ring->ring_size *
103 sizeof(struct cmpl_base));
105 int tx_ring_start = cp_ring_start + cp_ring_len;
106 int tx_ring_len = tx_ring_info ?
107 RTE_CACHE_LINE_ROUNDUP(tx_ring_info->tx_ring_struct->ring_size *
108 sizeof(struct tx_bd_long)) : 0;
110 int rx_ring_start = tx_ring_start + tx_ring_len;
111 int rx_ring_len = rx_ring_info ?
112 RTE_CACHE_LINE_ROUNDUP(rx_ring_info->rx_ring_struct->ring_size *
113 sizeof(struct rx_prod_pkt_bd)) : 0;
115 int ag_ring_start = rx_ring_start + rx_ring_len;
116 int ag_ring_len = rx_ring_len * AGG_RING_SIZE_FACTOR;
118 int ag_bitmap_start = ag_ring_start + ag_ring_len;
119 int ag_bitmap_len = rx_ring_info ?
120 RTE_CACHE_LINE_ROUNDUP(rte_bitmap_get_memory_footprint(
121 rx_ring_info->rx_ring_struct->ring_size *
122 AGG_RING_SIZE_FACTOR)) : 0;
124 int tpa_info_start = ag_bitmap_start + ag_bitmap_len;
125 int tpa_info_len = rx_ring_info ?
126 RTE_CACHE_LINE_ROUNDUP(BNXT_TPA_MAX *
127 sizeof(struct bnxt_tpa_info)) : 0;
129 int total_alloc_len = tpa_info_start;
130 if (bp->eth_dev->data->dev_conf.rxmode.enable_lro)
131 total_alloc_len += tpa_info_len;
133 snprintf(mz_name, RTE_MEMZONE_NAMESIZE,
134 "bnxt_%04x:%02x:%02x:%02x-%04x_%s", pdev->addr.domain,
135 pdev->addr.bus, pdev->addr.devid, pdev->addr.function, qidx,
137 mz_name[RTE_MEMZONE_NAMESIZE - 1] = 0;
138 mz = rte_memzone_lookup(mz_name);
140 mz = rte_memzone_reserve_aligned(mz_name, total_alloc_len,
143 RTE_MEMZONE_SIZE_HINT_ONLY |
144 RTE_MEMZONE_IOVA_CONTIG,
149 memset(mz->addr, 0, mz->len);
150 mz_phys_addr = mz->iova;
151 if ((unsigned long)mz->addr == mz_phys_addr) {
153 "Memzone physical address same as virtual.\n");
155 "Using rte_mem_virt2iova()\n");
156 for (sz = 0; sz < total_alloc_len; sz += getpagesize())
157 rte_mem_lock_page(((char *)mz->addr) + sz);
158 mz_phys_addr = rte_mem_virt2iova(mz->addr);
159 if (mz_phys_addr == 0) {
161 "unable to map ring address to physical memory\n");
167 tx_ring = tx_ring_info->tx_ring_struct;
169 tx_ring->bd = ((char *)mz->addr + tx_ring_start);
170 tx_ring_info->tx_desc_ring = (struct tx_bd_long *)tx_ring->bd;
171 tx_ring->bd_dma = mz_phys_addr + tx_ring_start;
172 tx_ring_info->tx_desc_mapping = tx_ring->bd_dma;
173 tx_ring->mem_zone = (const void *)mz;
177 if (tx_ring->vmem_size) {
179 (void **)((char *)mz->addr + tx_vmem_start);
180 tx_ring_info->tx_buf_ring =
181 (struct bnxt_sw_tx_bd *)tx_ring->vmem;
186 rx_ring = rx_ring_info->rx_ring_struct;
188 rx_ring->bd = ((char *)mz->addr + rx_ring_start);
189 rx_ring_info->rx_desc_ring =
190 (struct rx_prod_pkt_bd *)rx_ring->bd;
191 rx_ring->bd_dma = mz_phys_addr + rx_ring_start;
192 rx_ring_info->rx_desc_mapping = rx_ring->bd_dma;
193 rx_ring->mem_zone = (const void *)mz;
197 if (rx_ring->vmem_size) {
199 (void **)((char *)mz->addr + rx_vmem_start);
200 rx_ring_info->rx_buf_ring =
201 (struct bnxt_sw_rx_bd *)rx_ring->vmem;
204 rx_ring = rx_ring_info->ag_ring_struct;
206 rx_ring->bd = ((char *)mz->addr + ag_ring_start);
207 rx_ring_info->ag_desc_ring =
208 (struct rx_prod_pkt_bd *)rx_ring->bd;
209 rx_ring->bd_dma = mz->iova + ag_ring_start;
210 rx_ring_info->ag_desc_mapping = rx_ring->bd_dma;
211 rx_ring->mem_zone = (const void *)mz;
215 if (rx_ring->vmem_size) {
217 (void **)((char *)mz->addr + ag_vmem_start);
218 rx_ring_info->ag_buf_ring =
219 (struct bnxt_sw_rx_bd *)rx_ring->vmem;
222 rx_ring_info->ag_bitmap =
223 rte_bitmap_init(rx_ring_info->rx_ring_struct->ring_size *
224 AGG_RING_SIZE_FACTOR, (uint8_t *)mz->addr +
225 ag_bitmap_start, ag_bitmap_len);
228 if (bp->eth_dev->data->dev_conf.rxmode.enable_lro)
229 rx_ring_info->tpa_info =
230 ((struct bnxt_tpa_info *)((char *)mz->addr +
234 cp_ring->bd = ((char *)mz->addr + cp_ring_start);
235 cp_ring->bd_dma = mz_phys_addr + cp_ring_start;
236 cp_ring_info->cp_desc_ring = cp_ring->bd;
237 cp_ring_info->cp_desc_mapping = cp_ring->bd_dma;
238 cp_ring->mem_zone = (const void *)mz;
242 if (cp_ring->vmem_size)
243 *cp_ring->vmem = ((char *)mz->addr + stats_len);
245 cp_ring_info->hw_stats = mz->addr;
246 cp_ring_info->hw_stats_map = mz_phys_addr;
248 cp_ring_info->hw_stats_ctx_id = HWRM_NA_SIGNATURE;
253 * [0] = default completion ring
254 * [1 -> +rx_cp_nr_rings] = rx_cp, rx rings
255 * [1+rx_cp_nr_rings + 1 -> +tx_cp_nr_rings] = tx_cp, tx rings
257 int bnxt_alloc_hwrm_rings(struct bnxt *bp)
259 struct rte_pci_device *pci_dev = bp->pdev;
263 for (i = 0; i < bp->rx_cp_nr_rings; i++) {
264 struct bnxt_rx_queue *rxq = bp->rx_queues[i];
265 struct bnxt_cp_ring_info *cpr = rxq->cp_ring;
266 struct bnxt_ring *cp_ring = cpr->cp_ring_struct;
267 struct bnxt_rx_ring_info *rxr = rxq->rx_ring;
268 struct bnxt_ring *ring = rxr->rx_ring_struct;
269 unsigned int idx = i + 1;
270 unsigned int map_idx = idx + bp->rx_cp_nr_rings;
272 bp->grp_info[i].fw_stats_ctx = cpr->hw_stats_ctx_id;
275 rc = bnxt_hwrm_ring_alloc(bp, cp_ring,
276 HWRM_RING_ALLOC_INPUT_RING_TYPE_L2_CMPL,
277 idx, HWRM_NA_SIGNATURE,
281 cpr->cp_doorbell = (char *)pci_dev->mem_resource[2].addr +
283 bp->grp_info[i].cp_fw_ring_id = cp_ring->fw_ring_id;
284 B_CP_DIS_DB(cpr, cpr->cp_raw_cons);
287 rc = bnxt_hwrm_ring_alloc(bp, ring,
288 HWRM_RING_ALLOC_INPUT_RING_TYPE_RX,
289 idx, cpr->hw_stats_ctx_id,
290 cp_ring->fw_ring_id);
294 rxr->rx_doorbell = (char *)pci_dev->mem_resource[2].addr +
296 bp->grp_info[i].rx_fw_ring_id = ring->fw_ring_id;
297 B_RX_DB(rxr->rx_doorbell, rxr->rx_prod);
299 ring = rxr->ag_ring_struct;
302 PMD_DRV_LOG(ERR, "Alloc AGG Ring is NULL!\n");
306 rc = bnxt_hwrm_ring_alloc(bp, ring,
307 HWRM_RING_ALLOC_INPUT_RING_TYPE_RX,
308 map_idx, HWRM_NA_SIGNATURE,
309 cp_ring->fw_ring_id);
312 PMD_DRV_LOG(DEBUG, "Alloc AGG Done!\n");
315 (char *)pci_dev->mem_resource[2].addr +
317 bp->grp_info[i].ag_fw_ring_id = ring->fw_ring_id;
318 B_RX_DB(rxr->ag_doorbell, rxr->ag_prod);
320 rxq->rx_buf_use_size = BNXT_MAX_MTU + ETHER_HDR_LEN +
321 ETHER_CRC_LEN + (2 * VLAN_TAG_SIZE);
322 if (bnxt_init_one_rx_ring(rxq)) {
323 PMD_DRV_LOG(ERR, "bnxt_init_one_rx_ring failed!\n");
324 bnxt_rx_queue_release_op(rxq);
327 B_RX_DB(rxr->rx_doorbell, rxr->rx_prod);
328 B_RX_DB(rxr->ag_doorbell, rxr->ag_prod);
332 for (i = 0; i < bp->tx_cp_nr_rings; i++) {
333 struct bnxt_tx_queue *txq = bp->tx_queues[i];
334 struct bnxt_cp_ring_info *cpr = txq->cp_ring;
335 struct bnxt_ring *cp_ring = cpr->cp_ring_struct;
336 struct bnxt_tx_ring_info *txr = txq->tx_ring;
337 struct bnxt_ring *ring = txr->tx_ring_struct;
338 unsigned int idx = i + 1 + bp->rx_cp_nr_rings;
341 rc = bnxt_hwrm_ring_alloc(bp, cp_ring,
342 HWRM_RING_ALLOC_INPUT_RING_TYPE_L2_CMPL,
343 idx, HWRM_NA_SIGNATURE,
348 cpr->cp_doorbell = (char *)pci_dev->mem_resource[2].addr +
350 B_CP_DIS_DB(cpr, cpr->cp_raw_cons);
353 rc = bnxt_hwrm_ring_alloc(bp, ring,
354 HWRM_RING_ALLOC_INPUT_RING_TYPE_TX,
355 idx, cpr->hw_stats_ctx_id,
356 cp_ring->fw_ring_id);
360 txr->tx_doorbell = (char *)pci_dev->mem_resource[2].addr +