bbcb3b06e7df50f600217414d5436bc47c424d2f
[dpdk.git] / drivers / net / bnxt / bnxt_rxq.c
1 /* SPDX-License-Identifier: BSD-3-Clause
2  * Copyright(c) 2014-2021 Broadcom
3  * All rights reserved.
4  */
5
6 #include <inttypes.h>
7
8 #include <rte_malloc.h>
9
10 #include "bnxt.h"
11 #include "bnxt_filter.h"
12 #include "bnxt_hwrm.h"
13 #include "bnxt_ring.h"
14 #include "bnxt_rxq.h"
15 #include "bnxt_rxr.h"
16 #include "bnxt_vnic.h"
17 #include "hsi_struct_def_dpdk.h"
18
19 /*
20  * RX Queues
21  */
22
23 void bnxt_free_rxq_stats(struct bnxt_rx_queue *rxq)
24 {
25         if (rxq && rxq->cp_ring && rxq->cp_ring->hw_stats)
26                 rxq->cp_ring->hw_stats = NULL;
27 }
28
29 int bnxt_mq_rx_configure(struct bnxt *bp)
30 {
31         struct rte_eth_conf *dev_conf = &bp->eth_dev->data->dev_conf;
32         const struct rte_eth_vmdq_rx_conf *conf =
33                     &dev_conf->rx_adv_conf.vmdq_rx_conf;
34         unsigned int i, j, nb_q_per_grp = 1, ring_idx = 0;
35         int start_grp_id, end_grp_id = 1, rc = 0;
36         struct bnxt_vnic_info *vnic;
37         struct bnxt_filter_info *filter;
38         enum rte_eth_nb_pools pools = 1, max_pools = 0;
39         struct bnxt_rx_queue *rxq;
40
41         bp->nr_vnics = 0;
42
43         /* Multi-queue mode */
44         if (dev_conf->rxmode.mq_mode & ETH_MQ_RX_VMDQ_DCB_RSS) {
45                 /* VMDq ONLY, VMDq+RSS, VMDq+DCB, VMDq+DCB+RSS */
46
47                 switch (dev_conf->rxmode.mq_mode) {
48                 case ETH_MQ_RX_VMDQ_RSS:
49                 case ETH_MQ_RX_VMDQ_ONLY:
50                 case ETH_MQ_RX_VMDQ_DCB_RSS:
51                         /* FALLTHROUGH */
52                         /* ETH_8/64_POOLs */
53                         pools = conf->nb_queue_pools;
54                         /* For each pool, allocate MACVLAN CFA rule & VNIC */
55                         max_pools = RTE_MIN(bp->max_vnics,
56                                             RTE_MIN(bp->max_l2_ctx,
57                                             RTE_MIN(bp->max_rsscos_ctx,
58                                                     ETH_64_POOLS)));
59                         PMD_DRV_LOG(DEBUG,
60                                     "pools = %u max_pools = %u\n",
61                                     pools, max_pools);
62                         if (pools > max_pools)
63                                 pools = max_pools;
64                         break;
65                 case ETH_MQ_RX_RSS:
66                         pools = bp->rx_cosq_cnt ? bp->rx_cosq_cnt : 1;
67                         break;
68                 default:
69                         PMD_DRV_LOG(ERR, "Unsupported mq_mod %d\n",
70                                 dev_conf->rxmode.mq_mode);
71                         rc = -EINVAL;
72                         goto err_out;
73                 }
74         } else if (!dev_conf->rxmode.mq_mode) {
75                 pools = bp->rx_cosq_cnt ? bp->rx_cosq_cnt : pools;
76         }
77
78         pools = RTE_MIN(pools, bp->rx_cp_nr_rings);
79         nb_q_per_grp = bp->rx_cp_nr_rings / pools;
80         PMD_DRV_LOG(DEBUG, "pools = %u nb_q_per_grp = %u\n",
81                     pools, nb_q_per_grp);
82         start_grp_id = 0;
83         end_grp_id = nb_q_per_grp;
84
85         for (i = 0; i < pools; i++) {
86                 vnic = &bp->vnic_info[i];
87                 if (!vnic) {
88                         PMD_DRV_LOG(ERR, "VNIC alloc failed\n");
89                         rc = -ENOMEM;
90                         goto err_out;
91                 }
92                 vnic->flags |= BNXT_VNIC_INFO_BCAST;
93                 bp->nr_vnics++;
94
95                 for (j = 0; j < nb_q_per_grp; j++, ring_idx++) {
96                         rxq = bp->eth_dev->data->rx_queues[ring_idx];
97                         rxq->vnic = vnic;
98                         PMD_DRV_LOG(DEBUG,
99                                     "rxq[%d] = %p vnic[%d] = %p\n",
100                                     ring_idx, rxq, i, vnic);
101                 }
102                 if (i == 0) {
103                         if (dev_conf->rxmode.mq_mode & ETH_MQ_RX_VMDQ_DCB) {
104                                 bp->eth_dev->data->promiscuous = 1;
105                                 vnic->flags |= BNXT_VNIC_INFO_PROMISC;
106                         }
107                         vnic->func_default = true;
108                 }
109                 vnic->start_grp_id = start_grp_id;
110                 vnic->end_grp_id = end_grp_id;
111
112                 if (i) {
113                         if (dev_conf->rxmode.mq_mode & ETH_MQ_RX_VMDQ_DCB ||
114                             !(dev_conf->rxmode.mq_mode & ETH_MQ_RX_RSS))
115                                 vnic->rss_dflt_cr = true;
116                         goto skip_filter_allocation;
117                 }
118                 filter = bnxt_alloc_filter(bp);
119                 if (!filter) {
120                         PMD_DRV_LOG(ERR, "L2 filter alloc failed\n");
121                         rc = -ENOMEM;
122                         goto err_out;
123                 }
124                 filter->mac_index = 0;
125                 filter->flags |= HWRM_CFA_L2_FILTER_ALLOC_INPUT_FLAGS_OUTERMOST;
126                 /*
127                  * TODO: Configure & associate CFA rule for
128                  * each VNIC for each VMDq with MACVLAN, MACVLAN+TC
129                  */
130                 STAILQ_INSERT_TAIL(&vnic->filter, filter, next);
131
132 skip_filter_allocation:
133                 start_grp_id = end_grp_id;
134                 end_grp_id += nb_q_per_grp;
135         }
136
137         bp->rx_num_qs_per_vnic = nb_q_per_grp;
138
139         if (dev_conf->rxmode.mq_mode & ETH_MQ_RX_RSS_FLAG) {
140                 struct rte_eth_rss_conf *rss = &dev_conf->rx_adv_conf.rss_conf;
141
142                 if (bp->flags & BNXT_FLAG_UPDATE_HASH)
143                         bp->flags &= ~BNXT_FLAG_UPDATE_HASH;
144
145                 for (i = 0; i < bp->nr_vnics; i++) {
146                         uint32_t lvl = ETH_RSS_LEVEL(rss->rss_hf);
147
148                         vnic = &bp->vnic_info[i];
149                         vnic->hash_type =
150                                 bnxt_rte_to_hwrm_hash_types(rss->rss_hf);
151                         vnic->hash_mode =
152                                 bnxt_rte_to_hwrm_hash_level(bp,
153                                                             rss->rss_hf,
154                                                             lvl);
155
156                         /*
157                          * Use the supplied key if the key length is
158                          * acceptable and the rss_key is not NULL
159                          */
160                         if (rss->rss_key &&
161                             rss->rss_key_len <= HW_HASH_KEY_SIZE)
162                                 memcpy(vnic->rss_hash_key,
163                                        rss->rss_key, rss->rss_key_len);
164                 }
165         }
166
167         return rc;
168
169 err_out:
170         /* Free allocated vnic/filters */
171
172         return rc;
173 }
174
175 void bnxt_rx_queue_release_mbufs(struct bnxt_rx_queue *rxq)
176 {
177         struct rte_mbuf **sw_ring;
178         struct bnxt_tpa_info *tpa_info;
179         uint16_t i;
180
181         if (!rxq || !rxq->rx_ring)
182                 return;
183
184         sw_ring = rxq->rx_ring->rx_buf_ring;
185         if (sw_ring) {
186 #if defined(RTE_ARCH_X86) || defined(RTE_ARCH_ARM64)
187                 /*
188                  * The vector receive burst function does not set used
189                  * mbuf pointers to NULL, do that here to simplify
190                  * cleanup logic.
191                  */
192                 for (i = 0; i < rxq->rxrearm_nb; i++)
193                         sw_ring[rxq->rxrearm_start + i] = NULL;
194                 rxq->rxrearm_nb = 0;
195 #endif
196                 for (i = 0;
197                      i < rxq->rx_ring->rx_ring_struct->ring_size; i++) {
198                         if (sw_ring[i]) {
199                                 if (sw_ring[i] != &rxq->fake_mbuf)
200                                         rte_pktmbuf_free_seg(sw_ring[i]);
201                                 sw_ring[i] = NULL;
202                         }
203                 }
204         }
205         /* Free up mbufs in Agg ring */
206         sw_ring = rxq->rx_ring->ag_buf_ring;
207         if (sw_ring) {
208                 for (i = 0;
209                      i < rxq->rx_ring->ag_ring_struct->ring_size; i++) {
210                         if (sw_ring[i]) {
211                                 rte_pktmbuf_free_seg(sw_ring[i]);
212                                 sw_ring[i] = NULL;
213                         }
214                 }
215         }
216
217         /* Free up mbufs in TPA */
218         tpa_info = rxq->rx_ring->tpa_info;
219         if (tpa_info) {
220                 int max_aggs = BNXT_TPA_MAX_AGGS(rxq->bp);
221
222                 for (i = 0; i < max_aggs; i++) {
223                         if (tpa_info[i].mbuf) {
224                                 rte_pktmbuf_free_seg(tpa_info[i].mbuf);
225                                 tpa_info[i].mbuf = NULL;
226                         }
227                 }
228         }
229
230 }
231
232 void bnxt_free_rx_mbufs(struct bnxt *bp)
233 {
234         struct bnxt_rx_queue *rxq;
235         int i;
236
237         for (i = 0; i < (int)bp->rx_nr_rings; i++) {
238                 rxq = bp->rx_queues[i];
239                 bnxt_rx_queue_release_mbufs(rxq);
240         }
241 }
242
243 void bnxt_rx_queue_release_op(void *rx_queue)
244 {
245         struct bnxt_rx_queue *rxq = (struct bnxt_rx_queue *)rx_queue;
246
247         if (rxq) {
248                 if (is_bnxt_in_error(rxq->bp))
249                         return;
250
251                 bnxt_free_hwrm_rx_ring(rxq->bp, rxq->queue_id);
252                 bnxt_rx_queue_release_mbufs(rxq);
253
254                 /* Free RX ring hardware descriptors */
255                 if (rxq->rx_ring) {
256                         bnxt_free_ring(rxq->rx_ring->rx_ring_struct);
257                         rte_free(rxq->rx_ring->rx_ring_struct);
258                         /* Free RX Agg ring hardware descriptors */
259                         bnxt_free_ring(rxq->rx_ring->ag_ring_struct);
260                         rte_free(rxq->rx_ring->ag_ring_struct);
261
262                         rte_free(rxq->rx_ring);
263                 }
264                 /* Free RX completion ring hardware descriptors */
265                 if (rxq->cp_ring) {
266                         bnxt_free_ring(rxq->cp_ring->cp_ring_struct);
267                         rte_free(rxq->cp_ring->cp_ring_struct);
268                         rte_free(rxq->cp_ring);
269                 }
270
271                 bnxt_free_rxq_stats(rxq);
272                 rte_memzone_free(rxq->mz);
273                 rxq->mz = NULL;
274
275                 rte_free(rxq);
276         }
277 }
278
279 int bnxt_rx_queue_setup_op(struct rte_eth_dev *eth_dev,
280                                uint16_t queue_idx,
281                                uint16_t nb_desc,
282                                unsigned int socket_id,
283                                const struct rte_eth_rxconf *rx_conf,
284                                struct rte_mempool *mp)
285 {
286         struct bnxt *bp = eth_dev->data->dev_private;
287         uint64_t rx_offloads = eth_dev->data->dev_conf.rxmode.offloads;
288         struct bnxt_rx_queue *rxq;
289         int rc = 0;
290
291         rc = is_bnxt_in_error(bp);
292         if (rc)
293                 return rc;
294
295         if (queue_idx >= bnxt_max_rings(bp)) {
296                 PMD_DRV_LOG(ERR,
297                         "Cannot create Rx ring %d. Only %d rings available\n",
298                         queue_idx, bp->max_rx_rings);
299                 return -EINVAL;
300         }
301
302         if (nb_desc < BNXT_MIN_RING_DESC || nb_desc > MAX_RX_DESC_CNT) {
303                 PMD_DRV_LOG(ERR, "nb_desc %d is invalid\n", nb_desc);
304                 return -EINVAL;
305         }
306
307         if (eth_dev->data->rx_queues) {
308                 rxq = eth_dev->data->rx_queues[queue_idx];
309                 if (rxq)
310                         bnxt_rx_queue_release_op(rxq);
311         }
312         rxq = rte_zmalloc_socket("bnxt_rx_queue", sizeof(struct bnxt_rx_queue),
313                                  RTE_CACHE_LINE_SIZE, socket_id);
314         if (!rxq) {
315                 PMD_DRV_LOG(ERR, "bnxt_rx_queue allocation failed!\n");
316                 return -ENOMEM;
317         }
318         rxq->bp = bp;
319         rxq->mb_pool = mp;
320         rxq->nb_rx_desc = nb_desc;
321         rxq->rx_free_thresh =
322                 RTE_MIN(rte_align32pow2(nb_desc) / 4, RTE_BNXT_MAX_RX_BURST);
323
324         if (rx_conf->rx_drop_en != BNXT_DEFAULT_RX_DROP_EN)
325                 PMD_DRV_LOG(NOTICE,
326                             "Per-queue config of drop-en is not supported.\n");
327         rxq->drop_en = BNXT_DEFAULT_RX_DROP_EN;
328
329         PMD_DRV_LOG(DEBUG, "RX Buf MTU %d\n", eth_dev->data->mtu);
330
331         rc = bnxt_init_rx_ring_struct(rxq, socket_id);
332         if (rc) {
333                 PMD_DRV_LOG(ERR,
334                             "init_rx_ring_struct failed!\n");
335                 goto err;
336         }
337
338         PMD_DRV_LOG(DEBUG, "RX Buf size is %d\n", rxq->rx_buf_size);
339         rxq->queue_id = queue_idx;
340         rxq->port_id = eth_dev->data->port_id;
341         if (rx_offloads & DEV_RX_OFFLOAD_KEEP_CRC)
342                 rxq->crc_len = RTE_ETHER_CRC_LEN;
343         else
344                 rxq->crc_len = 0;
345
346         eth_dev->data->rx_queues[queue_idx] = rxq;
347         /* Allocate RX ring hardware descriptors */
348         rc = bnxt_alloc_rings(bp, socket_id, queue_idx, NULL, rxq, rxq->cp_ring,
349                               NULL, "rxr");
350         if (rc) {
351                 PMD_DRV_LOG(ERR,
352                             "ring_dma_zone_reserve for rx_ring failed!\n");
353                 goto err;
354         }
355         rte_atomic64_init(&rxq->rx_mbuf_alloc_fail);
356
357         /* rxq 0 must not be stopped when used as async CPR */
358         if (!BNXT_NUM_ASYNC_CPR(bp) && queue_idx == 0)
359                 rxq->rx_deferred_start = false;
360         else
361                 rxq->rx_deferred_start = rx_conf->rx_deferred_start;
362
363         rxq->rx_started = rxq->rx_deferred_start ? false : true;
364         rxq->vnic = BNXT_GET_DEFAULT_VNIC(bp);
365
366         /* Configure mtu if it is different from what was configured before */
367         if (!queue_idx)
368                 bnxt_mtu_set_op(eth_dev, eth_dev->data->mtu);
369
370         return 0;
371 err:
372         bnxt_rx_queue_release_op(rxq);
373         return rc;
374 }
375
376 int
377 bnxt_rx_queue_intr_enable_op(struct rte_eth_dev *eth_dev, uint16_t queue_id)
378 {
379         struct bnxt *bp = eth_dev->data->dev_private;
380         struct bnxt_rx_queue *rxq;
381         struct bnxt_cp_ring_info *cpr;
382         int rc = 0;
383
384         rc = is_bnxt_in_error(bp);
385         if (rc)
386                 return rc;
387
388         if (eth_dev->data->rx_queues) {
389                 rxq = eth_dev->data->rx_queues[queue_id];
390                 if (!rxq)
391                         return -EINVAL;
392
393                 cpr = rxq->cp_ring;
394                 B_CP_DB_REARM(cpr, cpr->cp_raw_cons);
395         }
396         return rc;
397 }
398
399 int
400 bnxt_rx_queue_intr_disable_op(struct rte_eth_dev *eth_dev, uint16_t queue_id)
401 {
402         struct bnxt *bp = eth_dev->data->dev_private;
403         struct bnxt_rx_queue *rxq;
404         struct bnxt_cp_ring_info *cpr;
405         int rc = 0;
406
407         rc = is_bnxt_in_error(bp);
408         if (rc)
409                 return rc;
410
411         if (eth_dev->data->rx_queues) {
412                 rxq = eth_dev->data->rx_queues[queue_id];
413                 if (!rxq)
414                         return -EINVAL;
415
416                 cpr = rxq->cp_ring;
417                 B_CP_DB_DISARM(cpr);
418         }
419         return rc;
420 }
421
422 int bnxt_rx_queue_start(struct rte_eth_dev *dev, uint16_t rx_queue_id)
423 {
424         struct bnxt *bp = dev->data->dev_private;
425         struct rte_eth_conf *dev_conf = &bp->eth_dev->data->dev_conf;
426         struct bnxt_rx_queue *rxq = bp->rx_queues[rx_queue_id];
427         struct bnxt_vnic_info *vnic = NULL;
428         int rc = 0;
429
430         rc = is_bnxt_in_error(bp);
431         if (rc)
432                 return rc;
433
434         if (rxq == NULL) {
435                 PMD_DRV_LOG(ERR, "Invalid Rx queue %d\n", rx_queue_id);
436                 return -EINVAL;
437         }
438
439         /* Set the queue state to started here.
440          * We check the status of the queue while posting buffer.
441          * If queue is it started, we do not post buffers for Rx.
442          */
443         rxq->rx_started = true;
444         dev->data->rx_queue_state[rx_queue_id] = RTE_ETH_QUEUE_STATE_STARTED;
445
446         bnxt_free_hwrm_rx_ring(bp, rx_queue_id);
447         rc = bnxt_alloc_hwrm_rx_ring(bp, rx_queue_id);
448         if (rc)
449                 return rc;
450
451         if (BNXT_CHIP_P5(bp)) {
452                 /* Reconfigure default receive ring and MRU. */
453                 bnxt_hwrm_vnic_cfg(bp, rxq->vnic);
454         }
455         PMD_DRV_LOG(INFO, "Rx queue started %d\n", rx_queue_id);
456
457         if (dev_conf->rxmode.mq_mode & ETH_MQ_RX_RSS_FLAG) {
458                 vnic = rxq->vnic;
459
460                 if (BNXT_HAS_RING_GRPS(bp)) {
461                         if (vnic->fw_grp_ids[rx_queue_id] != INVALID_HW_RING_ID)
462                                 return 0;
463
464                         vnic->fw_grp_ids[rx_queue_id] =
465                                         bp->grp_info[rx_queue_id].fw_grp_id;
466                         PMD_DRV_LOG(DEBUG,
467                                     "vnic = %p fw_grp_id = %d\n",
468                                     vnic, bp->grp_info[rx_queue_id].fw_grp_id);
469                 }
470
471                 PMD_DRV_LOG(DEBUG, "Rx Queue Count %d\n", vnic->rx_queue_cnt);
472                 rc = bnxt_vnic_rss_configure(bp, vnic);
473         }
474
475         if (rc != 0) {
476                 dev->data->rx_queue_state[rx_queue_id] =
477                                 RTE_ETH_QUEUE_STATE_STOPPED;
478                 rxq->rx_started = false;
479         }
480
481         PMD_DRV_LOG(INFO,
482                     "queue %d, rx_deferred_start %d, state %d!\n",
483                     rx_queue_id, rxq->rx_deferred_start,
484                     bp->eth_dev->data->rx_queue_state[rx_queue_id]);
485
486         return rc;
487 }
488
489 int bnxt_rx_queue_stop(struct rte_eth_dev *dev, uint16_t rx_queue_id)
490 {
491         struct bnxt *bp = dev->data->dev_private;
492         struct rte_eth_conf *dev_conf = &bp->eth_dev->data->dev_conf;
493         struct bnxt_vnic_info *vnic = NULL;
494         struct bnxt_rx_queue *rxq = NULL;
495         int active_queue_cnt = 0;
496         int i, rc = 0;
497
498         rc = is_bnxt_in_error(bp);
499         if (rc)
500                 return rc;
501
502         /* For the stingray platform and other platforms needing tighter
503          * control of resource utilization, Rx CQ 0 also works as
504          * Default CQ for async notifications
505          */
506         if (!BNXT_NUM_ASYNC_CPR(bp) && !rx_queue_id) {
507                 PMD_DRV_LOG(ERR, "Cannot stop Rx queue id %d\n", rx_queue_id);
508                 return -EINVAL;
509         }
510
511         rxq = bp->rx_queues[rx_queue_id];
512         if (!rxq) {
513                 PMD_DRV_LOG(ERR, "Invalid Rx queue %d\n", rx_queue_id);
514                 return -EINVAL;
515         }
516
517         vnic = rxq->vnic;
518         if (!vnic) {
519                 PMD_DRV_LOG(ERR, "VNIC not initialized for RxQ %d\n",
520                             rx_queue_id);
521                 return -EINVAL;
522         }
523
524         dev->data->rx_queue_state[rx_queue_id] = RTE_ETH_QUEUE_STATE_STOPPED;
525         rxq->rx_started = false;
526         PMD_DRV_LOG(DEBUG, "Rx queue stopped\n");
527
528         if (dev_conf->rxmode.mq_mode & ETH_MQ_RX_RSS_FLAG) {
529                 if (BNXT_HAS_RING_GRPS(bp))
530                         vnic->fw_grp_ids[rx_queue_id] = INVALID_HW_RING_ID;
531
532                 PMD_DRV_LOG(DEBUG, "Rx Queue Count %d\n", vnic->rx_queue_cnt);
533                 rc = bnxt_vnic_rss_configure(bp, vnic);
534         }
535
536         /* Compute current number of active receive queues. */
537         for (i = vnic->start_grp_id; i < vnic->end_grp_id; i++)
538                 if (bp->rx_queues[i]->rx_started)
539                         active_queue_cnt++;
540
541         if (BNXT_CHIP_P5(bp)) {
542                 /*
543                  * For Thor, we need to ensure that the VNIC default receive
544                  * ring corresponds to an active receive queue. When no queue
545                  * is active, we need to temporarily set the MRU to zero so
546                  * that packets are dropped early in the receive pipeline in
547                  * order to prevent the VNIC default receive ring from being
548                  * accessed.
549                  */
550                 if (active_queue_cnt == 0) {
551                         uint16_t saved_mru = vnic->mru;
552
553                         vnic->mru = 0;
554                         /* Reconfigure default receive ring and MRU. */
555                         bnxt_hwrm_vnic_cfg(bp, vnic);
556                         vnic->mru = saved_mru;
557                 } else {
558                         /* Reconfigure default receive ring. */
559                         bnxt_hwrm_vnic_cfg(bp, vnic);
560                 }
561         } else if (active_queue_cnt) {
562                 /*
563                  * If the queue being stopped is the current default queue and
564                  * there are other active queues, pick one of them as the
565                  * default and reconfigure the vnic.
566                  */
567                 if (vnic->dflt_ring_grp == bp->grp_info[rx_queue_id].fw_grp_id) {
568                         for (i = vnic->start_grp_id; i < vnic->end_grp_id; i++) {
569                                 if (bp->rx_queues[i]->rx_started) {
570                                         vnic->dflt_ring_grp =
571                                                 bp->grp_info[i].fw_grp_id;
572                                         bnxt_hwrm_vnic_cfg(bp, vnic);
573                                         break;
574                                 }
575                         }
576                 }
577         }
578
579         if (rc == 0)
580                 bnxt_rx_queue_release_mbufs(rxq);
581
582         return rc;
583 }