net/bnxt: support RSS hash selection
[dpdk.git] / drivers / net / bnxt / bnxt_rxq.c
1 /* SPDX-License-Identifier: BSD-3-Clause
2  * Copyright(c) 2014-2018 Broadcom
3  * All rights reserved.
4  */
5
6 #include <inttypes.h>
7
8 #include <rte_malloc.h>
9
10 #include "bnxt.h"
11 #include "bnxt_filter.h"
12 #include "bnxt_hwrm.h"
13 #include "bnxt_ring.h"
14 #include "bnxt_rxq.h"
15 #include "bnxt_rxr.h"
16 #include "bnxt_vnic.h"
17 #include "hsi_struct_def_dpdk.h"
18
19 /*
20  * RX Queues
21  */
22
23 void bnxt_free_rxq_stats(struct bnxt_rx_queue *rxq)
24 {
25         if (rxq && rxq->cp_ring && rxq->cp_ring->hw_stats)
26                 rxq->cp_ring->hw_stats = NULL;
27 }
28
29 int bnxt_mq_rx_configure(struct bnxt *bp)
30 {
31         struct rte_eth_conf *dev_conf = &bp->eth_dev->data->dev_conf;
32         const struct rte_eth_vmdq_rx_conf *conf =
33                     &dev_conf->rx_adv_conf.vmdq_rx_conf;
34         unsigned int i, j, nb_q_per_grp = 1, ring_idx = 0;
35         int start_grp_id, end_grp_id = 1, rc = 0;
36         struct bnxt_vnic_info *vnic;
37         struct bnxt_filter_info *filter;
38         enum rte_eth_nb_pools pools = 1, max_pools = 0;
39         struct bnxt_rx_queue *rxq;
40
41         bp->nr_vnics = 0;
42
43         /* Single queue mode */
44         if (bp->rx_cp_nr_rings < 2) {
45                 vnic = &bp->vnic_info[0];
46                 if (!vnic) {
47                         PMD_DRV_LOG(ERR, "VNIC alloc failed\n");
48                         rc = -ENOMEM;
49                         goto err_out;
50                 }
51                 vnic->flags |= BNXT_VNIC_INFO_BCAST;
52                 bp->nr_vnics++;
53
54                 rxq = bp->eth_dev->data->rx_queues[0];
55                 rxq->vnic = vnic;
56
57                 vnic->func_default = true;
58                 vnic->start_grp_id = 0;
59                 vnic->end_grp_id = vnic->start_grp_id;
60                 filter = bnxt_alloc_filter(bp);
61                 if (!filter) {
62                         PMD_DRV_LOG(ERR, "L2 filter alloc failed\n");
63                         rc = -ENOMEM;
64                         goto err_out;
65                 }
66                 filter->mac_index = 0;
67                 filter->flags |= HWRM_CFA_L2_FILTER_ALLOC_INPUT_FLAGS_OUTERMOST;
68                 STAILQ_INSERT_TAIL(&vnic->filter, filter, next);
69                 goto out;
70         }
71
72         /* Multi-queue mode */
73         if (dev_conf->rxmode.mq_mode & ETH_MQ_RX_VMDQ_DCB_RSS) {
74                 /* VMDq ONLY, VMDq+RSS, VMDq+DCB, VMDq+DCB+RSS */
75
76                 switch (dev_conf->rxmode.mq_mode) {
77                 case ETH_MQ_RX_VMDQ_RSS:
78                 case ETH_MQ_RX_VMDQ_ONLY:
79                 case ETH_MQ_RX_VMDQ_DCB_RSS:
80                         /* FALLTHROUGH */
81                         /* ETH_8/64_POOLs */
82                         pools = conf->nb_queue_pools;
83                         /* For each pool, allocate MACVLAN CFA rule & VNIC */
84                         max_pools = RTE_MIN(bp->max_vnics,
85                                             RTE_MIN(bp->max_l2_ctx,
86                                             RTE_MIN(bp->max_rsscos_ctx,
87                                                     ETH_64_POOLS)));
88                         PMD_DRV_LOG(DEBUG,
89                                     "pools = %u max_pools = %u\n",
90                                     pools, max_pools);
91                         if (pools > max_pools)
92                                 pools = max_pools;
93                         break;
94                 case ETH_MQ_RX_RSS:
95                         pools = bp->rx_cosq_cnt ? bp->rx_cosq_cnt : 1;
96                         break;
97                 default:
98                         PMD_DRV_LOG(ERR, "Unsupported mq_mod %d\n",
99                                 dev_conf->rxmode.mq_mode);
100                         rc = -EINVAL;
101                         goto err_out;
102                 }
103         } else if (!dev_conf->rxmode.mq_mode) {
104                 pools = bp->rx_cosq_cnt ? bp->rx_cosq_cnt : pools;
105         }
106
107         pools = RTE_MIN(pools, bp->rx_cp_nr_rings);
108         nb_q_per_grp = bp->rx_cp_nr_rings / pools;
109         bp->rx_num_qs_per_vnic = nb_q_per_grp;
110         PMD_DRV_LOG(DEBUG, "pools = %u nb_q_per_grp = %u\n",
111                     pools, nb_q_per_grp);
112         start_grp_id = 0;
113         end_grp_id = nb_q_per_grp;
114
115         for (i = 0; i < pools; i++) {
116                 vnic = &bp->vnic_info[i];
117                 if (!vnic) {
118                         PMD_DRV_LOG(ERR, "VNIC alloc failed\n");
119                         rc = -ENOMEM;
120                         goto err_out;
121                 }
122                 vnic->flags |= BNXT_VNIC_INFO_BCAST;
123                 bp->nr_vnics++;
124
125                 for (j = 0; j < nb_q_per_grp; j++, ring_idx++) {
126                         rxq = bp->eth_dev->data->rx_queues[ring_idx];
127                         rxq->vnic = vnic;
128                         PMD_DRV_LOG(DEBUG,
129                                     "rxq[%d] = %p vnic[%d] = %p\n",
130                                     ring_idx, rxq, i, vnic);
131                 }
132                 if (i == 0) {
133                         if (dev_conf->rxmode.mq_mode & ETH_MQ_RX_VMDQ_DCB) {
134                                 bp->eth_dev->data->promiscuous = 1;
135                                 vnic->flags |= BNXT_VNIC_INFO_PROMISC;
136                         }
137                         vnic->func_default = true;
138                 }
139                 vnic->start_grp_id = start_grp_id;
140                 vnic->end_grp_id = end_grp_id;
141
142                 if (i) {
143                         if (dev_conf->rxmode.mq_mode & ETH_MQ_RX_VMDQ_DCB ||
144                             !(dev_conf->rxmode.mq_mode & ETH_MQ_RX_RSS))
145                                 vnic->rss_dflt_cr = true;
146                         goto skip_filter_allocation;
147                 }
148                 filter = bnxt_alloc_filter(bp);
149                 if (!filter) {
150                         PMD_DRV_LOG(ERR, "L2 filter alloc failed\n");
151                         rc = -ENOMEM;
152                         goto err_out;
153                 }
154                 filter->mac_index = 0;
155                 filter->flags |= HWRM_CFA_L2_FILTER_ALLOC_INPUT_FLAGS_OUTERMOST;
156                 /*
157                  * TODO: Configure & associate CFA rule for
158                  * each VNIC for each VMDq with MACVLAN, MACVLAN+TC
159                  */
160                 STAILQ_INSERT_TAIL(&vnic->filter, filter, next);
161
162 skip_filter_allocation:
163                 start_grp_id = end_grp_id;
164                 end_grp_id += nb_q_per_grp;
165         }
166
167 out:
168         if (dev_conf->rxmode.mq_mode & ETH_MQ_RX_RSS_FLAG) {
169                 struct rte_eth_rss_conf *rss = &dev_conf->rx_adv_conf.rss_conf;
170
171                 if (bp->flags & BNXT_FLAG_UPDATE_HASH)
172                         bp->flags &= ~BNXT_FLAG_UPDATE_HASH;
173
174                 for (i = 0; i < bp->nr_vnics; i++) {
175                         uint32_t lvl = ETH_RSS_LEVEL(rss->rss_hf);
176
177                         vnic = &bp->vnic_info[i];
178                         vnic->hash_type =
179                                 bnxt_rte_to_hwrm_hash_types(rss->rss_hf);
180                         vnic->hash_mode =
181                                 bnxt_rte_to_hwrm_hash_level(bp,
182                                                             rss->rss_hf,
183                                                             lvl);
184
185                         /*
186                          * Use the supplied key if the key length is
187                          * acceptable and the rss_key is not NULL
188                          */
189                         if (rss->rss_key &&
190                             rss->rss_key_len <= HW_HASH_KEY_SIZE)
191                                 memcpy(vnic->rss_hash_key,
192                                        rss->rss_key, rss->rss_key_len);
193                 }
194         }
195
196         return rc;
197
198 err_out:
199         /* Free allocated vnic/filters */
200
201         return rc;
202 }
203
204 void bnxt_rx_queue_release_mbufs(struct bnxt_rx_queue *rxq)
205 {
206         struct rte_mbuf **sw_ring;
207         struct bnxt_tpa_info *tpa_info;
208         uint16_t i;
209
210         if (!rxq)
211                 return;
212
213         rte_spinlock_lock(&rxq->lock);
214
215         sw_ring = rxq->rx_ring->rx_buf_ring;
216         if (sw_ring) {
217                 for (i = 0;
218                      i < rxq->rx_ring->rx_ring_struct->ring_size; i++) {
219                         if (sw_ring[i]) {
220                                 if (sw_ring[i] != &rxq->fake_mbuf)
221                                         rte_pktmbuf_free_seg(sw_ring[i]);
222                                 sw_ring[i] = NULL;
223                         }
224                 }
225         }
226         /* Free up mbufs in Agg ring */
227         sw_ring = rxq->rx_ring->ag_buf_ring;
228         if (sw_ring) {
229                 for (i = 0;
230                      i < rxq->rx_ring->ag_ring_struct->ring_size; i++) {
231                         if (sw_ring[i]) {
232                                 rte_pktmbuf_free_seg(sw_ring[i]);
233                                 sw_ring[i] = NULL;
234                         }
235                 }
236         }
237
238         /* Free up mbufs in TPA */
239         tpa_info = rxq->rx_ring->tpa_info;
240         if (tpa_info) {
241                 int max_aggs = BNXT_TPA_MAX_AGGS(rxq->bp);
242
243                 for (i = 0; i < max_aggs; i++) {
244                         if (tpa_info[i].mbuf) {
245                                 rte_pktmbuf_free_seg(tpa_info[i].mbuf);
246                                 tpa_info[i].mbuf = NULL;
247                         }
248                 }
249         }
250
251         rte_spinlock_unlock(&rxq->lock);
252 }
253
254 void bnxt_free_rx_mbufs(struct bnxt *bp)
255 {
256         struct bnxt_rx_queue *rxq;
257         int i;
258
259         for (i = 0; i < (int)bp->rx_nr_rings; i++) {
260                 rxq = bp->rx_queues[i];
261                 bnxt_rx_queue_release_mbufs(rxq);
262         }
263 }
264
265 void bnxt_rx_queue_release_op(void *rx_queue)
266 {
267         struct bnxt_rx_queue *rxq = (struct bnxt_rx_queue *)rx_queue;
268
269         if (rxq) {
270                 if (is_bnxt_in_error(rxq->bp))
271                         return;
272
273                 bnxt_rx_queue_release_mbufs(rxq);
274
275                 /* Free RX ring hardware descriptors */
276                 bnxt_free_ring(rxq->rx_ring->rx_ring_struct);
277                 /* Free RX Agg ring hardware descriptors */
278                 bnxt_free_ring(rxq->rx_ring->ag_ring_struct);
279
280                 /* Free RX completion ring hardware descriptors */
281                 bnxt_free_ring(rxq->cp_ring->cp_ring_struct);
282
283                 bnxt_free_rxq_stats(rxq);
284                 rte_memzone_free(rxq->mz);
285                 rxq->mz = NULL;
286
287                 rte_free(rxq);
288         }
289 }
290
291 int bnxt_rx_queue_setup_op(struct rte_eth_dev *eth_dev,
292                                uint16_t queue_idx,
293                                uint16_t nb_desc,
294                                unsigned int socket_id,
295                                const struct rte_eth_rxconf *rx_conf,
296                                struct rte_mempool *mp)
297 {
298         struct bnxt *bp = eth_dev->data->dev_private;
299         uint64_t rx_offloads = eth_dev->data->dev_conf.rxmode.offloads;
300         struct bnxt_rx_queue *rxq;
301         int rc = 0;
302         uint8_t queue_state;
303
304         rc = is_bnxt_in_error(bp);
305         if (rc)
306                 return rc;
307
308         if (queue_idx >= BNXT_MAX_RINGS(bp)) {
309                 PMD_DRV_LOG(ERR,
310                         "Cannot create Rx ring %d. Only %d rings available\n",
311                         queue_idx, bp->max_rx_rings);
312                 return -EINVAL;
313         }
314
315         if (nb_desc < BNXT_MIN_RING_DESC || nb_desc > MAX_RX_DESC_CNT) {
316                 PMD_DRV_LOG(ERR, "nb_desc %d is invalid\n", nb_desc);
317                 rc = -EINVAL;
318                 goto out;
319         }
320
321         if (eth_dev->data->rx_queues) {
322                 rxq = eth_dev->data->rx_queues[queue_idx];
323                 if (rxq)
324                         bnxt_rx_queue_release_op(rxq);
325         }
326         rxq = rte_zmalloc_socket("bnxt_rx_queue", sizeof(struct bnxt_rx_queue),
327                                  RTE_CACHE_LINE_SIZE, socket_id);
328         if (!rxq) {
329                 PMD_DRV_LOG(ERR, "bnxt_rx_queue allocation failed!\n");
330                 rc = -ENOMEM;
331                 goto out;
332         }
333         rxq->bp = bp;
334         rxq->mb_pool = mp;
335         rxq->nb_rx_desc = nb_desc;
336         rxq->rx_free_thresh =
337                 RTE_MIN(rte_align32pow2(nb_desc) / 4, RTE_BNXT_MAX_RX_BURST);
338
339         if (rx_conf->rx_drop_en != BNXT_DEFAULT_RX_DROP_EN)
340                 PMD_DRV_LOG(NOTICE,
341                             "Per-queue config of drop-en is not supported.\n");
342         rxq->drop_en = BNXT_DEFAULT_RX_DROP_EN;
343
344         PMD_DRV_LOG(DEBUG, "RX Buf MTU %d\n", eth_dev->data->mtu);
345
346         rc = bnxt_init_rx_ring_struct(rxq, socket_id);
347         if (rc)
348                 goto out;
349
350         PMD_DRV_LOG(DEBUG, "RX Buf size is %d\n", rxq->rx_buf_size);
351         rxq->queue_id = queue_idx;
352         rxq->port_id = eth_dev->data->port_id;
353         if (rx_offloads & DEV_RX_OFFLOAD_KEEP_CRC)
354                 rxq->crc_len = RTE_ETHER_CRC_LEN;
355         else
356                 rxq->crc_len = 0;
357
358         eth_dev->data->rx_queues[queue_idx] = rxq;
359         /* Allocate RX ring hardware descriptors */
360         if (bnxt_alloc_rings(bp, queue_idx, NULL, rxq, rxq->cp_ring, NULL,
361                              "rxr")) {
362                 PMD_DRV_LOG(ERR,
363                         "ring_dma_zone_reserve for rx_ring failed!\n");
364                 bnxt_rx_queue_release_op(rxq);
365                 rc = -ENOMEM;
366                 goto out;
367         }
368         rte_atomic64_init(&rxq->rx_mbuf_alloc_fail);
369
370         /* rxq 0 must not be stopped when used as async CPR */
371         if (!BNXT_NUM_ASYNC_CPR(bp) && queue_idx == 0)
372                 rxq->rx_deferred_start = false;
373         else
374                 rxq->rx_deferred_start = rx_conf->rx_deferred_start;
375
376         if (rxq->rx_deferred_start) {
377                 queue_state = RTE_ETH_QUEUE_STATE_STOPPED;
378                 rxq->rx_started = false;
379         } else {
380                 queue_state = RTE_ETH_QUEUE_STATE_STARTED;
381                 rxq->rx_started = true;
382         }
383         eth_dev->data->rx_queue_state[queue_idx] = queue_state;
384         rte_spinlock_init(&rxq->lock);
385
386         /* Configure mtu if it is different from what was configured before */
387         if (!queue_idx)
388                 bnxt_mtu_set_op(eth_dev, eth_dev->data->mtu);
389
390 out:
391         return rc;
392 }
393
394 int
395 bnxt_rx_queue_intr_enable_op(struct rte_eth_dev *eth_dev, uint16_t queue_id)
396 {
397         struct bnxt *bp = eth_dev->data->dev_private;
398         struct bnxt_rx_queue *rxq;
399         struct bnxt_cp_ring_info *cpr;
400         int rc = 0;
401
402         rc = is_bnxt_in_error(bp);
403         if (rc)
404                 return rc;
405
406         if (eth_dev->data->rx_queues) {
407                 rxq = eth_dev->data->rx_queues[queue_id];
408                 if (!rxq)
409                         return -EINVAL;
410
411                 cpr = rxq->cp_ring;
412                 B_CP_DB_REARM(cpr, cpr->cp_raw_cons);
413         }
414         return rc;
415 }
416
417 int
418 bnxt_rx_queue_intr_disable_op(struct rte_eth_dev *eth_dev, uint16_t queue_id)
419 {
420         struct bnxt *bp = eth_dev->data->dev_private;
421         struct bnxt_rx_queue *rxq;
422         struct bnxt_cp_ring_info *cpr;
423         int rc = 0;
424
425         rc = is_bnxt_in_error(bp);
426         if (rc)
427                 return rc;
428
429         if (eth_dev->data->rx_queues) {
430                 rxq = eth_dev->data->rx_queues[queue_id];
431                 if (!rxq)
432                         return -EINVAL;
433
434                 cpr = rxq->cp_ring;
435                 B_CP_DB_DISARM(cpr);
436         }
437         return rc;
438 }
439
440 int bnxt_rx_queue_start(struct rte_eth_dev *dev, uint16_t rx_queue_id)
441 {
442         struct bnxt *bp = dev->data->dev_private;
443         struct rte_eth_conf *dev_conf = &bp->eth_dev->data->dev_conf;
444         struct bnxt_rx_queue *rxq = bp->rx_queues[rx_queue_id];
445         struct bnxt_vnic_info *vnic = NULL;
446         int rc = 0;
447
448         rc = is_bnxt_in_error(bp);
449         if (rc)
450                 return rc;
451
452         if (rxq == NULL) {
453                 PMD_DRV_LOG(ERR, "Invalid Rx queue %d\n", rx_queue_id);
454                 return -EINVAL;
455         }
456
457         /* Set the queue state to started here.
458          * We check the status of the queue while posting buffer.
459          * If queue is it started, we do not post buffers for Rx.
460          */
461         rxq->rx_started = true;
462         dev->data->rx_queue_state[rx_queue_id] = RTE_ETH_QUEUE_STATE_STARTED;
463
464         bnxt_free_hwrm_rx_ring(bp, rx_queue_id);
465         rc = bnxt_alloc_hwrm_rx_ring(bp, rx_queue_id);
466         if (rc)
467                 return rc;
468
469         if (BNXT_CHIP_THOR(bp)) {
470                 /* Reconfigure default receive ring and MRU. */
471                 bnxt_hwrm_vnic_cfg(bp, rxq->vnic);
472         }
473         PMD_DRV_LOG(INFO, "Rx queue started %d\n", rx_queue_id);
474
475         if (dev_conf->rxmode.mq_mode & ETH_MQ_RX_RSS_FLAG) {
476                 vnic = rxq->vnic;
477
478                 if (BNXT_HAS_RING_GRPS(bp)) {
479                         if (vnic->fw_grp_ids[rx_queue_id] != INVALID_HW_RING_ID)
480                                 return 0;
481
482                         vnic->fw_grp_ids[rx_queue_id] =
483                                         bp->grp_info[rx_queue_id].fw_grp_id;
484                         PMD_DRV_LOG(DEBUG,
485                                     "vnic = %p fw_grp_id = %d\n",
486                                     vnic, bp->grp_info[rx_queue_id].fw_grp_id);
487                 }
488
489                 PMD_DRV_LOG(DEBUG, "Rx Queue Count %d\n", vnic->rx_queue_cnt);
490                 rc = bnxt_vnic_rss_configure(bp, vnic);
491         }
492
493         if (rc != 0) {
494                 dev->data->rx_queue_state[rx_queue_id] =
495                                 RTE_ETH_QUEUE_STATE_STOPPED;
496                 rxq->rx_started = false;
497         }
498
499         PMD_DRV_LOG(INFO,
500                     "queue %d, rx_deferred_start %d, state %d!\n",
501                     rx_queue_id, rxq->rx_deferred_start,
502                     bp->eth_dev->data->rx_queue_state[rx_queue_id]);
503
504         return rc;
505 }
506
507 int bnxt_rx_queue_stop(struct rte_eth_dev *dev, uint16_t rx_queue_id)
508 {
509         struct bnxt *bp = dev->data->dev_private;
510         struct rte_eth_conf *dev_conf = &bp->eth_dev->data->dev_conf;
511         struct bnxt_vnic_info *vnic = NULL;
512         struct bnxt_rx_queue *rxq = NULL;
513         int active_queue_cnt = 0;
514         int i, rc = 0;
515
516         rc = is_bnxt_in_error(bp);
517         if (rc)
518                 return rc;
519
520         /* For the stingray platform and other platforms needing tighter
521          * control of resource utilization, Rx CQ 0 also works as
522          * Default CQ for async notifications
523          */
524         if (!BNXT_NUM_ASYNC_CPR(bp) && !rx_queue_id) {
525                 PMD_DRV_LOG(ERR, "Cannot stop Rx queue id %d\n", rx_queue_id);
526                 return -EINVAL;
527         }
528
529         rxq = bp->rx_queues[rx_queue_id];
530         if (!rxq) {
531                 PMD_DRV_LOG(ERR, "Invalid Rx queue %d\n", rx_queue_id);
532                 return -EINVAL;
533         }
534
535         vnic = rxq->vnic;
536         if (!vnic) {
537                 PMD_DRV_LOG(ERR, "VNIC not initialized for RxQ %d\n",
538                             rx_queue_id);
539                 return -EINVAL;
540         }
541
542         dev->data->rx_queue_state[rx_queue_id] = RTE_ETH_QUEUE_STATE_STOPPED;
543         rxq->rx_started = false;
544         PMD_DRV_LOG(DEBUG, "Rx queue stopped\n");
545
546         if (dev_conf->rxmode.mq_mode & ETH_MQ_RX_RSS_FLAG) {
547                 if (BNXT_HAS_RING_GRPS(bp))
548                         vnic->fw_grp_ids[rx_queue_id] = INVALID_HW_RING_ID;
549
550                 PMD_DRV_LOG(DEBUG, "Rx Queue Count %d\n", vnic->rx_queue_cnt);
551                 rc = bnxt_vnic_rss_configure(bp, vnic);
552         }
553
554         if (BNXT_CHIP_THOR(bp)) {
555                 /* Compute current number of active receive queues. */
556                 for (i = vnic->start_grp_id; i < vnic->end_grp_id; i++)
557                         if (bp->rx_queues[i]->rx_started)
558                                 active_queue_cnt++;
559
560                 /*
561                  * For Thor, we need to ensure that the VNIC default receive
562                  * ring corresponds to an active receive queue. When no queue
563                  * is active, we need to temporarily set the MRU to zero so
564                  * that packets are dropped early in the receive pipeline in
565                  * order to prevent the VNIC default receive ring from being
566                  * accessed.
567                  */
568                 if (active_queue_cnt == 0) {
569                         uint16_t saved_mru = vnic->mru;
570
571                         vnic->mru = 0;
572                         /* Reconfigure default receive ring and MRU. */
573                         bnxt_hwrm_vnic_cfg(bp, vnic);
574                         vnic->mru = saved_mru;
575                 } else {
576                         /* Reconfigure default receive ring. */
577                         bnxt_hwrm_vnic_cfg(bp, vnic);
578                 }
579         }
580
581         if (rc == 0)
582                 bnxt_rx_queue_release_mbufs(rxq);
583
584         return rc;
585 }