drivers/net/bnxt/bnxt_rxr.c

   1 /* SPDX-License-Identifier: BSD-3-Clause
   2  * Copyright(c) 2014-2018 Broadcom
   3  * All rights reserved.
   4  */
   5
   6 #include <inttypes.h>
   7 #include <stdbool.h>
   8
   9 #include <rte_bitmap.h>
  10 #include <rte_byteorder.h>
  11 #include <rte_malloc.h>
  12 #include <rte_memory.h>
  13
  14 #include "bnxt.h"
  15 #include "bnxt_reps.h"
  16 #include "bnxt_ring.h"
  17 #include "bnxt_rxr.h"
  18 #include "bnxt_rxq.h"
  19 #include "hsi_struct_def_dpdk.h"
  20 #ifdef RTE_LIBRTE_IEEE1588
  21 #include "bnxt_hwrm.h"
  22 #endif
  23
  24 #include <bnxt_tf_common.h>
  25 #include <ulp_mark_mgr.h>
  26
  27 /*
  28  * RX Ring handling
  29  */
  30
  31 static inline struct rte_mbuf *__bnxt_alloc_rx_data(struct rte_mempool *mb)
  32 {
  33         struct rte_mbuf *data;
  34
  35         data = rte_mbuf_raw_alloc(mb);
  36
  37         return data;
  38 }
  39
  40 static inline int bnxt_alloc_rx_data(struct bnxt_rx_queue *rxq,
  41                                      struct bnxt_rx_ring_info *rxr,
  42                                      uint16_t raw_prod)
  43 {
  44         uint16_t prod = RING_IDX(rxr->rx_ring_struct, raw_prod);
  45         struct rx_prod_pkt_bd *rxbd;
  46         struct rte_mbuf **rx_buf;
  47         struct rte_mbuf *mbuf;
  48
  49         rxbd = &rxr->rx_desc_ring[prod];
  50         rx_buf = &rxr->rx_buf_ring[prod];
  51         mbuf = __bnxt_alloc_rx_data(rxq->mb_pool);
  52         if (!mbuf) {
  53                 rte_atomic64_inc(&rxq->rx_mbuf_alloc_fail);
  54                 return -ENOMEM;
  55         }
  56
  57         *rx_buf = mbuf;
  58         mbuf->data_off = RTE_PKTMBUF_HEADROOM;
  59
  60         rxbd->address = rte_cpu_to_le_64(rte_mbuf_data_iova_default(mbuf));
  61
  62         return 0;
  63 }
  64
  65 static inline int bnxt_alloc_ag_data(struct bnxt_rx_queue *rxq,
  66                                      struct bnxt_rx_ring_info *rxr,
  67                                      uint16_t raw_prod)
  68 {
  69         uint16_t prod = RING_IDX(rxr->ag_ring_struct, raw_prod);
  70         struct rx_prod_pkt_bd *rxbd;
  71         struct rte_mbuf **rx_buf;
  72         struct rte_mbuf *mbuf;
  73
  74         rxbd = &rxr->ag_desc_ring[prod];
  75         rx_buf = &rxr->ag_buf_ring[prod];
  76         if (rxbd == NULL) {
  77                 PMD_DRV_LOG(ERR, "Jumbo Frame. rxbd is NULL\n");
  78                 return -EINVAL;
  79         }
  80
  81         if (rx_buf == NULL) {
  82                 PMD_DRV_LOG(ERR, "Jumbo Frame. rx_buf is NULL\n");
  83                 return -EINVAL;
  84         }
  85
  86         mbuf = __bnxt_alloc_rx_data(rxq->mb_pool);
  87         if (!mbuf) {
  88                 rte_atomic64_inc(&rxq->rx_mbuf_alloc_fail);
  89                 return -ENOMEM;
  90         }
  91
  92         *rx_buf = mbuf;
  93         mbuf->data_off = RTE_PKTMBUF_HEADROOM;
  94
  95         rxbd->address = rte_cpu_to_le_64(rte_mbuf_data_iova_default(mbuf));
  96
  97         return 0;
  98 }
  99
 100 static inline void bnxt_reuse_rx_mbuf(struct bnxt_rx_ring_info *rxr,
 101                                struct rte_mbuf *mbuf)
 102 {
 103         uint16_t prod, raw_prod = RING_NEXT(rxr->rx_raw_prod);
 104         struct rte_mbuf **prod_rx_buf;
 105         struct rx_prod_pkt_bd *prod_bd;
 106
 107         prod = RING_IDX(rxr->rx_ring_struct, raw_prod);
 108         prod_rx_buf = &rxr->rx_buf_ring[prod];
 109
 110         RTE_ASSERT(*prod_rx_buf == NULL);
 111         RTE_ASSERT(mbuf != NULL);
 112
 113         *prod_rx_buf = mbuf;
 114
 115         prod_bd = &rxr->rx_desc_ring[prod];
 116
 117         prod_bd->address = rte_cpu_to_le_64(rte_mbuf_data_iova_default(mbuf));
 118
 119         rxr->rx_raw_prod = raw_prod;
 120 }
 121
 122 static inline
 123 struct rte_mbuf *bnxt_consume_rx_buf(struct bnxt_rx_ring_info *rxr,
 124                                      uint16_t cons)
 125 {
 126         struct rte_mbuf **cons_rx_buf;
 127         struct rte_mbuf *mbuf;
 128
 129         cons_rx_buf = &rxr->rx_buf_ring[RING_IDX(rxr->rx_ring_struct, cons)];
 130         RTE_ASSERT(*cons_rx_buf != NULL);
 131         mbuf = *cons_rx_buf;
 132         *cons_rx_buf = NULL;
 133
 134         return mbuf;
 135 }
 136
 137 static void bnxt_tpa_start(struct bnxt_rx_queue *rxq,
 138                            struct rx_tpa_start_cmpl *tpa_start,
 139                            struct rx_tpa_start_cmpl_hi *tpa_start1)
 140 {
 141         struct bnxt_rx_ring_info *rxr = rxq->rx_ring;
 142         uint16_t agg_id;
 143         uint16_t data_cons;
 144         struct bnxt_tpa_info *tpa_info;
 145         struct rte_mbuf *mbuf;
 146
 147         agg_id = bnxt_tpa_start_agg_id(rxq->bp, tpa_start);
 148
 149         data_cons = tpa_start->opaque;
 150         tpa_info = &rxr->tpa_info[agg_id];
 151
 152         mbuf = bnxt_consume_rx_buf(rxr, data_cons);
 153
 154         bnxt_reuse_rx_mbuf(rxr, tpa_info->mbuf);
 155
 156         tpa_info->agg_count = 0;
 157         tpa_info->mbuf = mbuf;
 158         tpa_info->len = rte_le_to_cpu_32(tpa_start->len);
 159
 160         mbuf->data_off = RTE_PKTMBUF_HEADROOM;
 161         mbuf->nb_segs = 1;
 162         mbuf->next = NULL;
 163         mbuf->pkt_len = rte_le_to_cpu_32(tpa_start->len);
 164         mbuf->data_len = mbuf->pkt_len;
 165         mbuf->port = rxq->port_id;
 166         mbuf->ol_flags = PKT_RX_LRO;
 167         if (likely(tpa_start->flags_type &
 168                    rte_cpu_to_le_32(RX_TPA_START_CMPL_FLAGS_RSS_VALID))) {
 169                 mbuf->hash.rss = rte_le_to_cpu_32(tpa_start->rss_hash);
 170                 mbuf->ol_flags |= PKT_RX_RSS_HASH;
 171         } else {
 172                 mbuf->hash.fdir.id = rte_le_to_cpu_16(tpa_start1->cfa_code);
 173                 mbuf->ol_flags |= PKT_RX_FDIR | PKT_RX_FDIR_ID;
 174         }
 175         if (tpa_start1->flags2 &
 176             rte_cpu_to_le_32(RX_TPA_START_CMPL_FLAGS2_META_FORMAT_VLAN)) {
 177                 mbuf->vlan_tci = rte_le_to_cpu_32(tpa_start1->metadata);
 178                 mbuf->ol_flags |= PKT_RX_VLAN | PKT_RX_VLAN_STRIPPED;
 179         }
 180         if (likely(tpa_start1->flags2 &
 181                    rte_cpu_to_le_32(RX_TPA_START_CMPL_FLAGS2_L4_CS_CALC)))
 182                 mbuf->ol_flags |= PKT_RX_L4_CKSUM_GOOD;
 183
 184         /* recycle next mbuf */
 185         data_cons = RING_NEXT(data_cons);
 186         bnxt_reuse_rx_mbuf(rxr, bnxt_consume_rx_buf(rxr, data_cons));
 187 }
 188
 189 static int bnxt_agg_bufs_valid(struct bnxt_cp_ring_info *cpr,
 190                 uint8_t agg_bufs, uint32_t raw_cp_cons)
 191 {
 192         uint16_t last_cp_cons;
 193         struct rx_pkt_cmpl *agg_cmpl;
 194
 195         raw_cp_cons = ADV_RAW_CMP(raw_cp_cons, agg_bufs);
 196         last_cp_cons = RING_CMP(cpr->cp_ring_struct, raw_cp_cons);
 197         agg_cmpl = (struct rx_pkt_cmpl *)&cpr->cp_desc_ring[last_cp_cons];
 198         cpr->valid = FLIP_VALID(raw_cp_cons,
 199                                 cpr->cp_ring_struct->ring_mask,
 200                                 cpr->valid);
 201         return CMP_VALID(agg_cmpl, raw_cp_cons, cpr->cp_ring_struct);
 202 }
 203
 204 /* TPA consume agg buffer out of order, allocate connected data only */
 205 static int bnxt_prod_ag_mbuf(struct bnxt_rx_queue *rxq)
 206 {
 207         struct bnxt_rx_ring_info *rxr = rxq->rx_ring;
 208         uint16_t raw_next = RING_NEXT(rxr->ag_raw_prod);
 209         uint16_t bmap_next = RING_IDX(rxr->ag_ring_struct, raw_next);
 210
 211         /* TODO batch allocation for better performance */
 212         while (rte_bitmap_get(rxr->ag_bitmap, bmap_next)) {
 213                 if (unlikely(bnxt_alloc_ag_data(rxq, rxr, raw_next))) {
 214                         PMD_DRV_LOG(ERR, "agg mbuf alloc failed: prod=0x%x\n",
 215                                     raw_next);
 216                         break;
 217                 }
 218                 rte_bitmap_clear(rxr->ag_bitmap, bmap_next);
 219                 rxr->ag_raw_prod = raw_next;
 220                 raw_next = RING_NEXT(raw_next);
 221                 bmap_next = RING_IDX(rxr->ag_ring_struct, raw_next);
 222         }
 223
 224         return 0;
 225 }
 226
 227 static int bnxt_rx_pages(struct bnxt_rx_queue *rxq,
 228                          struct rte_mbuf *mbuf, uint32_t *tmp_raw_cons,
 229                          uint8_t agg_buf, struct bnxt_tpa_info *tpa_info)
 230 {
 231         struct bnxt_cp_ring_info *cpr = rxq->cp_ring;
 232         struct bnxt_rx_ring_info *rxr = rxq->rx_ring;
 233         int i;
 234         uint16_t cp_cons, ag_cons;
 235         struct rx_pkt_cmpl *rxcmp;
 236         struct rte_mbuf *last = mbuf;
 237         bool is_p5_tpa = tpa_info && BNXT_CHIP_P5(rxq->bp);
 238
 239         for (i = 0; i < agg_buf; i++) {
 240                 struct rte_mbuf **ag_buf;
 241                 struct rte_mbuf *ag_mbuf;
 242
 243                 if (is_p5_tpa) {
 244                         rxcmp = (void *)&tpa_info->agg_arr[i];
 245                 } else {
 246                         *tmp_raw_cons = NEXT_RAW_CMP(*tmp_raw_cons);
 247                         cp_cons = RING_CMP(cpr->cp_ring_struct, *tmp_raw_cons);
 248                         rxcmp = (struct rx_pkt_cmpl *)
 249                                         &cpr->cp_desc_ring[cp_cons];
 250                 }
 251
 252 #ifdef BNXT_DEBUG
 253                 bnxt_dump_cmpl(cp_cons, rxcmp);
 254 #endif
 255
 256                 ag_cons = rxcmp->opaque;
 257                 RTE_ASSERT(ag_cons <= rxr->ag_ring_struct->ring_mask);
 258                 ag_buf = &rxr->ag_buf_ring[ag_cons];
 259                 ag_mbuf = *ag_buf;
 260                 RTE_ASSERT(ag_mbuf != NULL);
 261
 262                 ag_mbuf->data_len = rte_le_to_cpu_16(rxcmp->len);
 263
 264                 mbuf->nb_segs++;
 265                 mbuf->pkt_len += ag_mbuf->data_len;
 266
 267                 last->next = ag_mbuf;
 268                 last = ag_mbuf;
 269
 270                 *ag_buf = NULL;
 271
 272                 /*
 273                  * As aggregation buffer consumed out of order in TPA module,
 274                  * use bitmap to track freed slots to be allocated and notified
 275                  * to NIC
 276                  */
 277                 rte_bitmap_set(rxr->ag_bitmap, ag_cons);
 278         }
 279         bnxt_prod_ag_mbuf(rxq);
 280         return 0;
 281 }
 282
 283 static inline struct rte_mbuf *bnxt_tpa_end(
 284                 struct bnxt_rx_queue *rxq,
 285                 uint32_t *raw_cp_cons,
 286                 struct rx_tpa_end_cmpl *tpa_end,
 287                 struct rx_tpa_end_cmpl_hi *tpa_end1)
 288 {
 289         struct bnxt_cp_ring_info *cpr = rxq->cp_ring;
 290         struct bnxt_rx_ring_info *rxr = rxq->rx_ring;
 291         uint16_t agg_id;
 292         struct rte_mbuf *mbuf;
 293         uint8_t agg_bufs;
 294         uint8_t payload_offset;
 295         struct bnxt_tpa_info *tpa_info;
 296
 297         if (BNXT_CHIP_P5(rxq->bp)) {
 298                 struct rx_tpa_v2_end_cmpl *th_tpa_end;
 299                 struct rx_tpa_v2_end_cmpl_hi *th_tpa_end1;
 300
 301                 th_tpa_end = (void *)tpa_end;
 302                 th_tpa_end1 = (void *)tpa_end1;
 303                 agg_id = BNXT_TPA_END_AGG_ID_TH(th_tpa_end);
 304                 agg_bufs = BNXT_TPA_END_AGG_BUFS_TH(th_tpa_end1);
 305                 payload_offset = th_tpa_end1->payload_offset;
 306         } else {
 307                 agg_id = BNXT_TPA_END_AGG_ID(tpa_end);
 308                 agg_bufs = BNXT_TPA_END_AGG_BUFS(tpa_end);
 309                 if (!bnxt_agg_bufs_valid(cpr, agg_bufs, *raw_cp_cons))
 310                         return NULL;
 311                 payload_offset = tpa_end->payload_offset;
 312         }
 313
 314         tpa_info = &rxr->tpa_info[agg_id];
 315         mbuf = tpa_info->mbuf;
 316         RTE_ASSERT(mbuf != NULL);
 317
 318         if (agg_bufs) {
 319                 bnxt_rx_pages(rxq, mbuf, raw_cp_cons, agg_bufs, tpa_info);
 320         }
 321         mbuf->l4_len = payload_offset;
 322
 323         struct rte_mbuf *new_data = __bnxt_alloc_rx_data(rxq->mb_pool);
 324         RTE_ASSERT(new_data != NULL);
 325         if (!new_data) {
 326                 rte_atomic64_inc(&rxq->rx_mbuf_alloc_fail);
 327                 return NULL;
 328         }
 329         tpa_info->mbuf = new_data;
 330
 331         return mbuf;
 332 }
 333
 334 uint32_t bnxt_ptype_table[BNXT_PTYPE_TBL_DIM] __rte_cache_aligned;
 335
 336 static void __rte_cold
 337 bnxt_init_ptype_table(void)
 338 {
 339         uint32_t *pt = bnxt_ptype_table;
 340         static bool initialized;
 341         int ip6, tun, type;
 342         uint32_t l3;
 343         int i;
 344
 345         if (initialized)
 346                 return;
 347
 348         for (i = 0; i < BNXT_PTYPE_TBL_DIM; i++) {
 349                 if (i & (RX_PKT_CMPL_FLAGS2_META_FORMAT_VLAN >> 2))
 350                         pt[i] = RTE_PTYPE_L2_ETHER_VLAN;
 351                 else
 352                         pt[i] = RTE_PTYPE_L2_ETHER;
 353
 354                 ip6 = i & (RX_PKT_CMPL_FLAGS2_IP_TYPE >> 7);
 355                 tun = i & (RX_PKT_CMPL_FLAGS2_T_IP_CS_CALC >> 2);
 356                 type = (i & 0x38) << 9;
 357
 358                 if (!tun && !ip6)
 359                         l3 = RTE_PTYPE_L3_IPV4_EXT_UNKNOWN;
 360                 else if (!tun && ip6)
 361                         l3 = RTE_PTYPE_L3_IPV6_EXT_UNKNOWN;
 362                 else if (tun && !ip6)
 363                         l3 = RTE_PTYPE_INNER_L3_IPV4_EXT_UNKNOWN;
 364                 else
 365                         l3 = RTE_PTYPE_INNER_L3_IPV6_EXT_UNKNOWN;
 366
 367                 switch (type) {
 368                 case RX_PKT_CMPL_FLAGS_ITYPE_ICMP:
 369                         if (tun)
 370                                 pt[i] |= l3 | RTE_PTYPE_INNER_L4_ICMP;
 371                         else
 372                                 pt[i] |= l3 | RTE_PTYPE_L4_ICMP;
 373                         break;
 374                 case RX_PKT_CMPL_FLAGS_ITYPE_TCP:
 375                         if (tun)
 376                                 pt[i] |= l3 | RTE_PTYPE_INNER_L4_TCP;
 377                         else
 378                                 pt[i] |= l3 | RTE_PTYPE_L4_TCP;
 379                         break;
 380                 case RX_PKT_CMPL_FLAGS_ITYPE_UDP:
 381                         if (tun)
 382                                 pt[i] |= l3 | RTE_PTYPE_INNER_L4_UDP;
 383                         else
 384                                 pt[i] |= l3 | RTE_PTYPE_L4_UDP;
 385                         break;
 386                 case RX_PKT_CMPL_FLAGS_ITYPE_IP:
 387                         pt[i] |= l3;
 388                         break;
 389                 }
 390         }
 391         initialized = true;
 392 }
 393
 394 static uint32_t
 395 bnxt_parse_pkt_type(struct rx_pkt_cmpl *rxcmp, struct rx_pkt_cmpl_hi *rxcmp1)
 396 {
 397         uint32_t flags_type, flags2;
 398         uint8_t index;
 399
 400         flags_type = rte_le_to_cpu_16(rxcmp->flags_type);
 401         flags2 = rte_le_to_cpu_32(rxcmp1->flags2);
 402
 403         /*
 404          * Index format:
 405          *     bit 0: RX_PKT_CMPL_FLAGS2_T_IP_CS_CALC
 406          *     bit 1: RX_CMPL_FLAGS2_IP_TYPE
 407          *     bit 2: RX_PKT_CMPL_FLAGS2_META_FORMAT_VLAN
 408          *     bits 3-6: RX_PKT_CMPL_FLAGS_ITYPE
 409          */
 410         index = ((flags_type & RX_PKT_CMPL_FLAGS_ITYPE_MASK) >> 9) |
 411                 ((flags2 & (RX_PKT_CMPL_FLAGS2_META_FORMAT_VLAN |
 412                            RX_PKT_CMPL_FLAGS2_T_IP_CS_CALC)) >> 2) |
 413                 ((flags2 & RX_PKT_CMPL_FLAGS2_IP_TYPE) >> 7);
 414
 415         return bnxt_ptype_table[index];
 416 }
 417
 418 static void __rte_cold
 419 bnxt_init_ol_flags_tables(struct bnxt_rx_queue *rxq)
 420 {
 421         struct bnxt_rx_ring_info *rxr = rxq->rx_ring;
 422         struct rte_eth_conf *dev_conf;
 423         bool outer_cksum_enabled;
 424         uint64_t offloads;
 425         uint32_t *pt;
 426         int i;
 427
 428         dev_conf = &rxq->bp->eth_dev->data->dev_conf;
 429         offloads = dev_conf->rxmode.offloads;
 430
 431         outer_cksum_enabled = !!(offloads & (DEV_RX_OFFLOAD_OUTER_IPV4_CKSUM |
 432                                              DEV_RX_OFFLOAD_OUTER_UDP_CKSUM));
 433
 434         /* Initialize ol_flags table. */
 435         pt = rxr->ol_flags_table;
 436         for (i = 0; i < BNXT_OL_FLAGS_TBL_DIM; i++) {
 437                 pt[i] = 0;
 438
 439                 if (i & RX_PKT_CMPL_FLAGS2_META_FORMAT_VLAN)
 440                         pt[i] |= PKT_RX_VLAN | PKT_RX_VLAN_STRIPPED;
 441
 442                 if (i & (RX_PKT_CMPL_FLAGS2_T_IP_CS_CALC << 3)) {
 443                         /* Tunnel case. */
 444                         if (outer_cksum_enabled) {
 445                                 if (i & RX_PKT_CMPL_FLAGS2_IP_CS_CALC)
 446                                         pt[i] |= PKT_RX_IP_CKSUM_GOOD;
 447
 448                                 if (i & RX_PKT_CMPL_FLAGS2_L4_CS_CALC)
 449                                         pt[i] |= PKT_RX_L4_CKSUM_GOOD;
 450
 451                                 if (i & RX_PKT_CMPL_FLAGS2_T_L4_CS_CALC)
 452                                         pt[i] |= PKT_RX_OUTER_L4_CKSUM_GOOD;
 453                         } else {
 454                                 if (i & RX_PKT_CMPL_FLAGS2_T_IP_CS_CALC)
 455                                         pt[i] |= PKT_RX_IP_CKSUM_GOOD;
 456
 457                                 if (i & RX_PKT_CMPL_FLAGS2_T_L4_CS_CALC)
 458                                         pt[i] |= PKT_RX_L4_CKSUM_GOOD;
 459                         }
 460                 } else {
 461                         /* Non-tunnel case. */
 462                         if (i & RX_PKT_CMPL_FLAGS2_IP_CS_CALC)
 463                                 pt[i] |= PKT_RX_IP_CKSUM_GOOD;
 464
 465                         if (i & RX_PKT_CMPL_FLAGS2_L4_CS_CALC)
 466                                 pt[i] |= PKT_RX_L4_CKSUM_GOOD;
 467                 }
 468         }
 469
 470         /* Initialize checksum error table. */
 471         pt = rxr->ol_flags_err_table;
 472         for (i = 0; i < BNXT_OL_FLAGS_ERR_TBL_DIM; i++) {
 473                 pt[i] = 0;
 474
 475                 if (i & (RX_PKT_CMPL_FLAGS2_T_IP_CS_CALC << 2)) {
 476                         /* Tunnel case. */
 477                         if (outer_cksum_enabled) {
 478                                 if (i & (RX_PKT_CMPL_ERRORS_IP_CS_ERROR >> 4))
 479                                         pt[i] |= PKT_RX_IP_CKSUM_BAD;
 480
 481                                 if (i & (RX_PKT_CMPL_ERRORS_T_IP_CS_ERROR >> 4))
 482                                         pt[i] |= PKT_RX_EIP_CKSUM_BAD;
 483
 484                                 if (i & (RX_PKT_CMPL_ERRORS_L4_CS_ERROR >> 4))
 485                                         pt[i] |= PKT_RX_L4_CKSUM_BAD;
 486
 487                                 if (i & (RX_PKT_CMPL_ERRORS_T_L4_CS_ERROR >> 4))
 488                                         pt[i] |= PKT_RX_OUTER_L4_CKSUM_BAD;
 489                         } else {
 490                                 if (i & (RX_PKT_CMPL_ERRORS_T_IP_CS_ERROR >> 4))
 491                                         pt[i] |= PKT_RX_IP_CKSUM_BAD;
 492
 493                                 if (i & (RX_PKT_CMPL_ERRORS_T_L4_CS_ERROR >> 4))
 494                                         pt[i] |= PKT_RX_L4_CKSUM_BAD;
 495                         }
 496                 } else {
 497                         /* Non-tunnel case. */
 498                         if (i & (RX_PKT_CMPL_ERRORS_IP_CS_ERROR >> 4))
 499                                 pt[i] |= PKT_RX_IP_CKSUM_BAD;
 500
 501                         if (i & (RX_PKT_CMPL_ERRORS_L4_CS_ERROR >> 4))
 502                                 pt[i] |= PKT_RX_L4_CKSUM_BAD;
 503                 }
 504         }
 505 }
 506
 507 static void
 508 bnxt_set_ol_flags(struct bnxt_rx_ring_info *rxr, struct rx_pkt_cmpl *rxcmp,
 509                   struct rx_pkt_cmpl_hi *rxcmp1, struct rte_mbuf *mbuf)
 510 {
 511         uint16_t flags_type, errors, flags;
 512         uint64_t ol_flags;
 513
 514         flags_type = rte_le_to_cpu_16(rxcmp->flags_type);
 515
 516         flags = rte_le_to_cpu_32(rxcmp1->flags2) &
 517                                 (RX_PKT_CMPL_FLAGS2_IP_CS_CALC |
 518                                  RX_PKT_CMPL_FLAGS2_L4_CS_CALC |
 519                                  RX_PKT_CMPL_FLAGS2_T_IP_CS_CALC |
 520                                  RX_PKT_CMPL_FLAGS2_T_L4_CS_CALC |
 521                                  RX_PKT_CMPL_FLAGS2_META_FORMAT_VLAN);
 522
 523         flags |= (flags & RX_PKT_CMPL_FLAGS2_T_IP_CS_CALC) << 3;
 524         errors = rte_le_to_cpu_16(rxcmp1->errors_v2) &
 525                                 (RX_PKT_CMPL_ERRORS_IP_CS_ERROR |
 526                                  RX_PKT_CMPL_ERRORS_L4_CS_ERROR |
 527                                  RX_PKT_CMPL_ERRORS_T_IP_CS_ERROR |
 528                                  RX_PKT_CMPL_ERRORS_T_L4_CS_ERROR);
 529         errors = (errors >> 4) & flags;
 530
 531         ol_flags = rxr->ol_flags_table[flags & ~errors];
 532
 533         if (unlikely(errors)) {
 534                 errors |= (flags & RX_PKT_CMPL_FLAGS2_T_IP_CS_CALC) << 2;
 535                 ol_flags |= rxr->ol_flags_err_table[errors];
 536         }
 537
 538         if (flags_type & RX_PKT_CMPL_FLAGS_RSS_VALID) {
 539                 mbuf->hash.rss = rte_le_to_cpu_32(rxcmp->rss_hash);
 540                 ol_flags |= PKT_RX_RSS_HASH;
 541         }
 542
 543         mbuf->ol_flags = ol_flags;
 544 }
 545
 546 #ifdef RTE_LIBRTE_IEEE1588
 547 static void
 548 bnxt_get_rx_ts_p5(struct bnxt *bp, uint32_t rx_ts_cmpl)
 549 {
 550         uint64_t systime_cycles = 0;
 551
 552         if (!BNXT_CHIP_P5(bp))
 553                 return;
 554
 555         /* On Thor, Rx timestamps are provided directly in the
 556          * Rx completion records to the driver. Only 32 bits of
 557          * the timestamp is present in the completion. Driver needs
 558          * to read the current 48 bit free running timer using the
 559          * HWRM_PORT_TS_QUERY command and combine the upper 16 bits
 560          * from the HWRM response with the lower 32 bits in the
 561          * Rx completion to produce the 48 bit timestamp for the Rx packet
 562          */
 563         bnxt_hwrm_port_ts_query(bp, BNXT_PTP_FLAGS_CURRENT_TIME,
 564                                 &systime_cycles);
 565         bp->ptp_cfg->rx_timestamp = (systime_cycles & 0xFFFF00000000);
 566         bp->ptp_cfg->rx_timestamp |= rx_ts_cmpl;
 567 }
 568 #endif
 569
 570 static uint32_t
 571 bnxt_ulp_set_mark_in_mbuf(struct bnxt *bp, struct rx_pkt_cmpl_hi *rxcmp1,
 572                           struct rte_mbuf *mbuf, uint32_t *vfr_flag)
 573 {
 574         uint32_t cfa_code;
 575         uint32_t meta_fmt;
 576         uint32_t meta;
 577         bool gfid = false;
 578         uint32_t mark_id;
 579         uint32_t flags2;
 580         uint32_t gfid_support = 0;
 581         int rc;
 582
 583         if (BNXT_GFID_ENABLED(bp))
 584                 gfid_support = 1;
 585
 586         cfa_code = rte_le_to_cpu_16(rxcmp1->cfa_code);
 587         flags2 = rte_le_to_cpu_32(rxcmp1->flags2);
 588         meta = rte_le_to_cpu_32(rxcmp1->metadata);
 589
 590         /*
 591          * The flags field holds extra bits of info from [6:4]
 592          * which indicate if the flow is in TCAM or EM or EEM
 593          */
 594         meta_fmt = (flags2 & BNXT_CFA_META_FMT_MASK) >>
 595                 BNXT_CFA_META_FMT_SHFT;
 596
 597         switch (meta_fmt) {
 598         case 0:
 599                 if (gfid_support) {
 600                         /* Not an LFID or GFID, a flush cmd. */
 601                         goto skip_mark;
 602                 } else {
 603                         /* LFID mode, no vlan scenario */
 604                         gfid = false;
 605                 }
 606                 break;
 607         case 4:
 608         case 5:
 609                 /*
 610                  * EM/TCAM case
 611                  * Assume that EM doesn't support Mark due to GFID
 612                  * collisions with EEM.  Simply return without setting the mark
 613                  * in the mbuf.
 614                  */
 615                 if (BNXT_CFA_META_EM_TEST(meta)) {
 616                         /*This is EM hit {EM(1), GFID[27:16], 19'd0 or vtag } */
 617                         gfid = true;
 618                         meta >>= BNXT_RX_META_CFA_CODE_SHIFT;
 619                         cfa_code |= meta << BNXT_CFA_CODE_META_SHIFT;
 620                 } else {
 621                         /*
 622                          * It is a TCAM entry, so it is an LFID.
 623                          * The TCAM IDX and Mode can also be determined
 624                          * by decoding the meta_data. We are not
 625                          * using these for now.
 626                          */
 627                 }
 628                 break;
 629         case 6:
 630         case 7:
 631                 /* EEM Case, only using gfid in EEM for now. */
 632                 gfid = true;
 633
 634                 /*
 635                  * For EEM flows, The first part of cfa_code is 16 bits.
 636                  * The second part is embedded in the
 637                  * metadata field from bit 19 onwards. The driver needs to
 638                  * ignore the first 19 bits of metadata and use the next 12
 639                  * bits as higher 12 bits of cfa_code.
 640                  */
 641                 meta >>= BNXT_RX_META_CFA_CODE_SHIFT;
 642                 cfa_code |= meta << BNXT_CFA_CODE_META_SHIFT;
 643                 break;
 644         default:
 645                 /* For other values, the cfa_code is assumed to be an LFID. */
 646                 break;
 647         }
 648
 649         rc = ulp_mark_db_mark_get(bp->ulp_ctx, gfid,
 650                                   cfa_code, vfr_flag, &mark_id);
 651         if (!rc) {
 652                 /* VF to VFR Rx path. So, skip mark_id injection in mbuf */
 653                 if (vfr_flag && *vfr_flag)
 654                         return mark_id;
 655                 /* Got the mark, write it to the mbuf and return */
 656                 mbuf->hash.fdir.hi = mark_id;
 657                 *bnxt_cfa_code_dynfield(mbuf) = cfa_code & 0xffffffffull;
 658                 mbuf->hash.fdir.id = rxcmp1->cfa_code;
 659                 mbuf->ol_flags |= PKT_RX_FDIR | PKT_RX_FDIR_ID;
 660                 return mark_id;
 661         }
 662
 663 skip_mark:
 664         mbuf->hash.fdir.hi = 0;
 665         mbuf->hash.fdir.id = 0;
 666
 667         return 0;
 668 }
 669
 670 void bnxt_set_mark_in_mbuf(struct bnxt *bp,
 671                            struct rx_pkt_cmpl_hi *rxcmp1,
 672                            struct rte_mbuf *mbuf)
 673 {
 674         uint32_t cfa_code = 0;
 675         uint8_t meta_fmt = 0;
 676         uint16_t flags2 = 0;
 677         uint32_t meta =  0;
 678
 679         cfa_code = rte_le_to_cpu_16(rxcmp1->cfa_code);
 680         if (!cfa_code)
 681                 return;
 682
 683         if (cfa_code && !bp->mark_table[cfa_code].valid)
 684                 return;
 685
 686         flags2 = rte_le_to_cpu_16(rxcmp1->flags2);
 687         meta = rte_le_to_cpu_32(rxcmp1->metadata);
 688         if (meta) {
 689                 meta >>= BNXT_RX_META_CFA_CODE_SHIFT;
 690
 691                 /* The flags field holds extra bits of info from [6:4]
 692                  * which indicate if the flow is in TCAM or EM or EEM
 693                  */
 694                 meta_fmt = (flags2 & BNXT_CFA_META_FMT_MASK) >>
 695                            BNXT_CFA_META_FMT_SHFT;
 696
 697                 /* meta_fmt == 4 => 'b100 => 'b10x => EM.
 698                  * meta_fmt == 5 => 'b101 => 'b10x => EM + VLAN
 699                  * meta_fmt == 6 => 'b110 => 'b11x => EEM
 700                  * meta_fmt == 7 => 'b111 => 'b11x => EEM + VLAN.
 701                  */
 702                 meta_fmt >>= BNXT_CFA_META_FMT_EM_EEM_SHFT;
 703         }
 704
 705         mbuf->hash.fdir.hi = bp->mark_table[cfa_code].mark_id;
 706         mbuf->ol_flags |= PKT_RX_FDIR | PKT_RX_FDIR_ID;
 707 }
 708
 709 static int bnxt_rx_pkt(struct rte_mbuf **rx_pkt,
 710                        struct bnxt_rx_queue *rxq, uint32_t *raw_cons)
 711 {
 712         struct bnxt_cp_ring_info *cpr = rxq->cp_ring;
 713         struct bnxt_rx_ring_info *rxr = rxq->rx_ring;
 714         struct rx_pkt_cmpl *rxcmp;
 715         struct rx_pkt_cmpl_hi *rxcmp1;
 716         uint32_t tmp_raw_cons = *raw_cons;
 717         uint16_t cons, raw_prod, cp_cons =
 718             RING_CMP(cpr->cp_ring_struct, tmp_raw_cons);
 719         struct rte_mbuf *mbuf;
 720         int rc = 0;
 721         uint8_t agg_buf = 0;
 722         uint16_t cmp_type;
 723         uint32_t vfr_flag = 0, mark_id = 0;
 724         struct bnxt *bp = rxq->bp;
 725
 726         rxcmp = (struct rx_pkt_cmpl *)
 727             &cpr->cp_desc_ring[cp_cons];
 728
 729         cmp_type = CMP_TYPE(rxcmp);
 730
 731         if (cmp_type == RX_TPA_V2_ABUF_CMPL_TYPE_RX_TPA_AGG) {
 732                 struct rx_tpa_v2_abuf_cmpl *rx_agg = (void *)rxcmp;
 733                 uint16_t agg_id = rte_cpu_to_le_16(rx_agg->agg_id);
 734                 struct bnxt_tpa_info *tpa_info;
 735
 736                 tpa_info = &rxr->tpa_info[agg_id];
 737                 RTE_ASSERT(tpa_info->agg_count < 16);
 738                 tpa_info->agg_arr[tpa_info->agg_count++] = *rx_agg;
 739                 rc = -EINVAL; /* Continue w/o new mbuf */
 740                 goto next_rx;
 741         }
 742
 743         tmp_raw_cons = NEXT_RAW_CMP(tmp_raw_cons);
 744         cp_cons = RING_CMP(cpr->cp_ring_struct, tmp_raw_cons);
 745         rxcmp1 = (struct rx_pkt_cmpl_hi *)&cpr->cp_desc_ring[cp_cons];
 746
 747         if (!CMP_VALID(rxcmp1, tmp_raw_cons, cpr->cp_ring_struct))
 748                 return -EBUSY;
 749
 750         cpr->valid = FLIP_VALID(cp_cons,
 751                                 cpr->cp_ring_struct->ring_mask,
 752                                 cpr->valid);
 753
 754         if (cmp_type == RX_TPA_START_CMPL_TYPE_RX_TPA_START) {
 755                 bnxt_tpa_start(rxq, (struct rx_tpa_start_cmpl *)rxcmp,
 756                                (struct rx_tpa_start_cmpl_hi *)rxcmp1);
 757                 rc = -EINVAL; /* Continue w/o new mbuf */
 758                 goto next_rx;
 759         } else if (cmp_type == RX_TPA_END_CMPL_TYPE_RX_TPA_END) {
 760                 mbuf = bnxt_tpa_end(rxq, &tmp_raw_cons,
 761                                    (struct rx_tpa_end_cmpl *)rxcmp,
 762                                    (struct rx_tpa_end_cmpl_hi *)rxcmp1);
 763                 if (unlikely(!mbuf))
 764                         return -EBUSY;
 765                 *rx_pkt = mbuf;
 766                 goto next_rx;
 767         } else if (cmp_type != 0x11) {
 768                 rc = -EINVAL;
 769                 goto next_rx;
 770         }
 771
 772         agg_buf = (rxcmp->agg_bufs_v1 & RX_PKT_CMPL_AGG_BUFS_MASK)
 773                         >> RX_PKT_CMPL_AGG_BUFS_SFT;
 774         if (agg_buf && !bnxt_agg_bufs_valid(cpr, agg_buf, tmp_raw_cons))
 775                 return -EBUSY;
 776
 777         raw_prod = rxr->rx_raw_prod;
 778
 779         cons = rxcmp->opaque;
 780         mbuf = bnxt_consume_rx_buf(rxr, cons);
 781         if (mbuf == NULL)
 782                 return -EBUSY;
 783
 784         mbuf->data_off = RTE_PKTMBUF_HEADROOM;
 785         mbuf->nb_segs = 1;
 786         mbuf->next = NULL;
 787         mbuf->pkt_len = rxcmp->len;
 788         mbuf->data_len = mbuf->pkt_len;
 789         mbuf->port = rxq->port_id;
 790
 791         bnxt_set_ol_flags(rxr, rxcmp, rxcmp1, mbuf);
 792
 793 #ifdef RTE_LIBRTE_IEEE1588
 794         if (unlikely((rte_le_to_cpu_16(rxcmp->flags_type) &
 795                       RX_PKT_CMPL_FLAGS_MASK) ==
 796                       RX_PKT_CMPL_FLAGS_ITYPE_PTP_W_TIMESTAMP)) {
 797                 mbuf->ol_flags |= PKT_RX_IEEE1588_PTP | PKT_RX_IEEE1588_TMST;
 798                 bnxt_get_rx_ts_p5(rxq->bp, rxcmp1->reorder);
 799         }
 800 #endif
 801
 802         if (BNXT_TRUFLOW_EN(bp))
 803                 mark_id = bnxt_ulp_set_mark_in_mbuf(rxq->bp, rxcmp1, mbuf,
 804                                                     &vfr_flag);
 805         else
 806                 bnxt_set_mark_in_mbuf(rxq->bp, rxcmp1, mbuf);
 807
 808         if (agg_buf)
 809                 bnxt_rx_pages(rxq, mbuf, &tmp_raw_cons, agg_buf, NULL);
 810
 811         mbuf->packet_type = bnxt_parse_pkt_type(rxcmp, rxcmp1);
 812
 813 #ifdef BNXT_DEBUG
 814         if (rxcmp1->errors_v2 & RX_CMP_L2_ERRORS) {
 815                 /* Re-install the mbuf back to the rx ring */
 816                 bnxt_reuse_rx_mbuf(rxr, cons, mbuf);
 817
 818                 rc = -EIO;
 819                 goto next_rx;
 820         }
 821 #endif
 822         /*
 823          * TODO: Redesign this....
 824          * If the allocation fails, the packet does not get received.
 825          * Simply returning this will result in slowly falling behind
 826          * on the producer ring buffers.
 827          * Instead, "filling up" the producer just before ringing the
 828          * doorbell could be a better solution since it will let the
 829          * producer ring starve until memory is available again pushing
 830          * the drops into hardware and getting them out of the driver
 831          * allowing recovery to a full producer ring.
 832          *
 833          * This could also help with cache usage by preventing per-packet
 834          * calls in favour of a tight loop with the same function being called
 835          * in it.
 836          */
 837         raw_prod = RING_NEXT(raw_prod);
 838         if (bnxt_alloc_rx_data(rxq, rxr, raw_prod)) {
 839                 PMD_DRV_LOG(ERR, "mbuf alloc failed with prod=0x%x\n",
 840                             raw_prod);
 841                 rc = -ENOMEM;
 842                 goto rx;
 843         }
 844         rxr->rx_raw_prod = raw_prod;
 845
 846         if (BNXT_TRUFLOW_EN(bp) && (BNXT_VF_IS_TRUSTED(bp) || BNXT_PF(bp)) &&
 847             vfr_flag) {
 848                 bnxt_vfr_recv(mark_id, rxq->queue_id, mbuf);
 849                 /* Now return an error so that nb_rx_pkts is not
 850                  * incremented.
 851                  * This packet was meant to be given to the representor.
 852                  * So no need to account the packet and give it to
 853                  * parent Rx burst function.
 854                  */
 855                 rc = -ENODEV;
 856                 goto next_rx;
 857         }
 858         /*
 859          * All MBUFs are allocated with the same size under DPDK,
 860          * no optimization for rx_copy_thresh
 861          */
 862 rx:
 863         *rx_pkt = mbuf;
 864
 865 next_rx:
 866
 867         *raw_cons = tmp_raw_cons;
 868
 869         return rc;
 870 }
 871
 872 uint16_t bnxt_recv_pkts(void *rx_queue, struct rte_mbuf **rx_pkts,
 873                                uint16_t nb_pkts)
 874 {
 875         struct bnxt_rx_queue *rxq = rx_queue;
 876         struct bnxt_cp_ring_info *cpr = rxq->cp_ring;
 877         struct bnxt_rx_ring_info *rxr = rxq->rx_ring;
 878         uint16_t rx_raw_prod = rxr->rx_raw_prod;
 879         uint16_t ag_raw_prod = rxr->ag_raw_prod;
 880         uint32_t raw_cons = cpr->cp_raw_cons;
 881         bool alloc_failed = false;
 882         uint32_t cons;
 883         int nb_rx_pkts = 0;
 884         int nb_rep_rx_pkts = 0;
 885         struct rx_pkt_cmpl *rxcmp;
 886         int rc = 0;
 887         bool evt = false;
 888
 889         if (unlikely(is_bnxt_in_error(rxq->bp)))
 890                 return 0;
 891
 892         /* If Rx Q was stopped return */
 893         if (unlikely(!rxq->rx_started))
 894                 return 0;
 895
 896 #if defined(RTE_ARCH_X86) || defined(RTE_ARCH_ARM64)
 897         /*
 898          * Replenish buffers if needed when a transition has been made from
 899          * vector- to non-vector- receive processing.
 900          */
 901         while (unlikely(rxq->rxrearm_nb)) {
 902                 if (!bnxt_alloc_rx_data(rxq, rxr, rxq->rxrearm_start)) {
 903                         rxr->rx_raw_prod = rxq->rxrearm_start;
 904                         bnxt_db_write(&rxr->rx_db, rxr->rx_raw_prod);
 905                         rxq->rxrearm_start++;
 906                         rxq->rxrearm_nb--;
 907                 } else {
 908                         /* Retry allocation on next call. */
 909                         break;
 910                 }
 911         }
 912 #endif
 913
 914         /* Handle RX burst request */
 915         while (1) {
 916                 cons = RING_CMP(cpr->cp_ring_struct, raw_cons);
 917                 rxcmp = (struct rx_pkt_cmpl *)&cpr->cp_desc_ring[cons];
 918
 919                 if (!CMP_VALID(rxcmp, raw_cons, cpr->cp_ring_struct))
 920                         break;
 921                 cpr->valid = FLIP_VALID(cons,
 922                                         cpr->cp_ring_struct->ring_mask,
 923                                         cpr->valid);
 924
 925                 /* TODO: Avoid magic numbers... */
 926                 if ((CMP_TYPE(rxcmp) & 0x30) == 0x10) {
 927                         rc = bnxt_rx_pkt(&rx_pkts[nb_rx_pkts], rxq, &raw_cons);
 928                         if (!rc)
 929                                 nb_rx_pkts++;
 930                         else if (rc == -EBUSY)  /* partial completion */
 931                                 break;
 932                         else if (rc == -ENODEV) /* completion for representor */
 933                                 nb_rep_rx_pkts++;
 934                         else if (rc == -ENOMEM) {
 935                                 nb_rx_pkts++;
 936                                 alloc_failed = true;
 937                         }
 938                 } else if (!BNXT_NUM_ASYNC_CPR(rxq->bp)) {
 939                         evt =
 940                         bnxt_event_hwrm_resp_handler(rxq->bp,
 941                                                      (struct cmpl_base *)rxcmp);
 942                         /* If the async event is Fatal error, return */
 943                         if (unlikely(is_bnxt_in_error(rxq->bp)))
 944                                 goto done;
 945                 }
 946
 947                 raw_cons = NEXT_RAW_CMP(raw_cons);
 948                 if (nb_rx_pkts == nb_pkts || nb_rep_rx_pkts == nb_pkts || evt)
 949                         break;
 950                 /* Post some Rx buf early in case of larger burst processing */
 951                 if (nb_rx_pkts == BNXT_RX_POST_THRESH)
 952                         bnxt_db_write(&rxr->rx_db, rxr->rx_raw_prod);
 953         }
 954
 955         cpr->cp_raw_cons = raw_cons;
 956         if (!nb_rx_pkts && !nb_rep_rx_pkts && !evt) {
 957                 /*
 958                  * For PMD, there is no need to keep on pushing to REARM
 959                  * the doorbell if there are no new completions
 960                  */
 961                 goto done;
 962         }
 963
 964         /* Ring the completion queue doorbell. */
 965         bnxt_db_cq(cpr);
 966
 967         /* Ring the receive descriptor doorbell. */
 968         if (rx_raw_prod != rxr->rx_raw_prod)
 969                 bnxt_db_write(&rxr->rx_db, rxr->rx_raw_prod);
 970
 971         /* Ring the AGG ring DB */
 972         if (ag_raw_prod != rxr->ag_raw_prod)
 973                 bnxt_db_write(&rxr->ag_db, rxr->ag_raw_prod);
 974
 975         /* Attempt to alloc Rx buf in case of a previous allocation failure. */
 976         if (alloc_failed) {
 977                 uint16_t cnt;
 978
 979                 rx_raw_prod = RING_NEXT(rx_raw_prod);
 980                 for (cnt = 0; cnt < nb_rx_pkts + nb_rep_rx_pkts; cnt++) {
 981                         struct rte_mbuf **rx_buf;
 982                         uint16_t ndx;
 983
 984                         ndx = RING_IDX(rxr->rx_ring_struct, rx_raw_prod + cnt);
 985                         rx_buf = &rxr->rx_buf_ring[ndx];
 986
 987                         /* Buffer already allocated for this index. */
 988                         if (*rx_buf != NULL && *rx_buf != &rxq->fake_mbuf)
 989                                 continue;
 990
 991                         /* This slot is empty. Alloc buffer for Rx */
 992                         if (!bnxt_alloc_rx_data(rxq, rxr, rx_raw_prod + cnt)) {
 993                                 rxr->rx_raw_prod = rx_raw_prod + cnt;
 994                                 bnxt_db_write(&rxr->rx_db, rxr->rx_raw_prod);
 995                         } else {
 996                                 PMD_DRV_LOG(ERR, "Alloc  mbuf failed\n");
 997                                 break;
 998                         }
 999                 }
1000         }
1001
1002 done:
1003         return nb_rx_pkts;
1004 }
1005
1006 /*
1007  * Dummy DPDK callback for RX.
1008  *
1009  * This function is used to temporarily replace the real callback during
1010  * unsafe control operations on the queue, or in case of error.
1011  */
1012 uint16_t
1013 bnxt_dummy_recv_pkts(void *rx_queue __rte_unused,
1014                      struct rte_mbuf **rx_pkts __rte_unused,
1015                      uint16_t nb_pkts __rte_unused)
1016 {
1017         return 0;
1018 }
1019
1020 void bnxt_free_rx_rings(struct bnxt *bp)
1021 {
1022         int i;
1023         struct bnxt_rx_queue *rxq;
1024
1025         if (!bp->rx_queues)
1026                 return;
1027
1028         for (i = 0; i < (int)bp->rx_nr_rings; i++) {
1029                 rxq = bp->rx_queues[i];
1030                 if (!rxq)
1031                         continue;
1032
1033                 bnxt_free_ring(rxq->rx_ring->rx_ring_struct);
1034                 rte_free(rxq->rx_ring->rx_ring_struct);
1035
1036                 /* Free the Aggregator ring */
1037                 bnxt_free_ring(rxq->rx_ring->ag_ring_struct);
1038                 rte_free(rxq->rx_ring->ag_ring_struct);
1039                 rxq->rx_ring->ag_ring_struct = NULL;
1040
1041                 rte_free(rxq->rx_ring);
1042
1043                 bnxt_free_ring(rxq->cp_ring->cp_ring_struct);
1044                 rte_free(rxq->cp_ring->cp_ring_struct);
1045                 rte_free(rxq->cp_ring);
1046
1047                 rte_free(rxq);
1048                 bp->rx_queues[i] = NULL;
1049         }
1050 }
1051
1052 int bnxt_init_rx_ring_struct(struct bnxt_rx_queue *rxq, unsigned int socket_id)
1053 {
1054         struct rte_eth_dev *eth_dev = rxq->bp->eth_dev;
1055         struct rte_eth_rxmode *rxmode;
1056         struct bnxt_cp_ring_info *cpr;
1057         struct bnxt_rx_ring_info *rxr;
1058         struct bnxt_ring *ring;
1059         bool use_agg_ring;
1060
1061         rxq->rx_buf_size = BNXT_MAX_PKT_LEN + sizeof(struct rte_mbuf);
1062
1063         rxr = rte_zmalloc_socket("bnxt_rx_ring",
1064                                  sizeof(struct bnxt_rx_ring_info),
1065                                  RTE_CACHE_LINE_SIZE, socket_id);
1066         if (rxr == NULL)
1067                 return -ENOMEM;
1068         rxq->rx_ring = rxr;
1069
1070         ring = rte_zmalloc_socket("bnxt_rx_ring_struct",
1071                                    sizeof(struct bnxt_ring),
1072                                    RTE_CACHE_LINE_SIZE, socket_id);
1073         if (ring == NULL)
1074                 return -ENOMEM;
1075         rxr->rx_ring_struct = ring;
1076         ring->ring_size = rte_align32pow2(rxq->nb_rx_desc);
1077         ring->ring_mask = ring->ring_size - 1;
1078         ring->bd = (void *)rxr->rx_desc_ring;
1079         ring->bd_dma = rxr->rx_desc_mapping;
1080
1081         /* Allocate extra rx ring entries for vector rx. */
1082         ring->vmem_size = sizeof(struct rte_mbuf *) *
1083                                 (ring->ring_size + RTE_BNXT_DESCS_PER_LOOP);
1084
1085         ring->vmem = (void **)&rxr->rx_buf_ring;
1086         ring->fw_ring_id = INVALID_HW_RING_ID;
1087
1088         cpr = rte_zmalloc_socket("bnxt_rx_ring",
1089                                  sizeof(struct bnxt_cp_ring_info),
1090                                  RTE_CACHE_LINE_SIZE, socket_id);
1091         if (cpr == NULL)
1092                 return -ENOMEM;
1093         rxq->cp_ring = cpr;
1094
1095         ring = rte_zmalloc_socket("bnxt_rx_ring_struct",
1096                                    sizeof(struct bnxt_ring),
1097                                    RTE_CACHE_LINE_SIZE, socket_id);
1098         if (ring == NULL)
1099                 return -ENOMEM;
1100         cpr->cp_ring_struct = ring;
1101
1102         rxmode = &eth_dev->data->dev_conf.rxmode;
1103         use_agg_ring = (rxmode->offloads & DEV_RX_OFFLOAD_SCATTER) ||
1104                        (rxmode->offloads & DEV_RX_OFFLOAD_TCP_LRO) ||
1105                        (rxmode->max_rx_pkt_len >
1106                          (uint32_t)(rte_pktmbuf_data_room_size(rxq->mb_pool) -
1107                                     RTE_PKTMBUF_HEADROOM));
1108
1109         /* Allocate two completion slots per entry in desc ring. */
1110         ring->ring_size = rxr->rx_ring_struct->ring_size * 2;
1111
1112         /* Allocate additional slots if aggregation ring is in use. */
1113         if (use_agg_ring)
1114                 ring->ring_size *= AGG_RING_SIZE_FACTOR;
1115
1116         ring->ring_size = rte_align32pow2(ring->ring_size);
1117         ring->ring_mask = ring->ring_size - 1;
1118         ring->bd = (void *)cpr->cp_desc_ring;
1119         ring->bd_dma = cpr->cp_desc_mapping;
1120         ring->vmem_size = 0;
1121         ring->vmem = NULL;
1122         ring->fw_ring_id = INVALID_HW_RING_ID;
1123
1124         /* Allocate Aggregator rings */
1125         ring = rte_zmalloc_socket("bnxt_rx_ring_struct",
1126                                    sizeof(struct bnxt_ring),
1127                                    RTE_CACHE_LINE_SIZE, socket_id);
1128         if (ring == NULL)
1129                 return -ENOMEM;
1130         rxr->ag_ring_struct = ring;
1131         ring->ring_size = rte_align32pow2(rxq->nb_rx_desc *
1132                                           AGG_RING_SIZE_FACTOR);
1133         ring->ring_mask = ring->ring_size - 1;
1134         ring->bd = (void *)rxr->ag_desc_ring;
1135         ring->bd_dma = rxr->ag_desc_mapping;
1136         ring->vmem_size = ring->ring_size * sizeof(struct rte_mbuf *);
1137         ring->vmem = (void **)&rxr->ag_buf_ring;
1138         ring->fw_ring_id = INVALID_HW_RING_ID;
1139
1140         return 0;
1141 }
1142
1143 static void bnxt_init_rxbds(struct bnxt_ring *ring, uint32_t type,
1144                             uint16_t len)
1145 {
1146         uint32_t j;
1147         struct rx_prod_pkt_bd *rx_bd_ring = (struct rx_prod_pkt_bd *)ring->bd;
1148
1149         if (!rx_bd_ring)
1150                 return;
1151         for (j = 0; j < ring->ring_size; j++) {
1152                 rx_bd_ring[j].flags_type = rte_cpu_to_le_16(type);
1153                 rx_bd_ring[j].len = rte_cpu_to_le_16(len);
1154                 rx_bd_ring[j].opaque = j;
1155         }
1156 }
1157
1158 int bnxt_init_one_rx_ring(struct bnxt_rx_queue *rxq)
1159 {
1160         struct bnxt_rx_ring_info *rxr;
1161         struct bnxt_ring *ring;
1162         uint32_t raw_prod, type;
1163         unsigned int i;
1164         uint16_t size;
1165
1166         /* Initialize packet type table. */
1167         bnxt_init_ptype_table();
1168
1169         size = rte_pktmbuf_data_room_size(rxq->mb_pool) - RTE_PKTMBUF_HEADROOM;
1170         size = RTE_MIN(BNXT_MAX_PKT_LEN, size);
1171
1172         type = RX_PROD_PKT_BD_TYPE_RX_PROD_PKT;
1173
1174         rxr = rxq->rx_ring;
1175         ring = rxr->rx_ring_struct;
1176         bnxt_init_rxbds(ring, type, size);
1177
1178         /* Initialize offload flags parsing table. */
1179         bnxt_init_ol_flags_tables(rxq);
1180
1181         raw_prod = rxr->rx_raw_prod;
1182         for (i = 0; i < ring->ring_size; i++) {
1183                 if (unlikely(!rxr->rx_buf_ring[i])) {
1184                         if (bnxt_alloc_rx_data(rxq, rxr, raw_prod) != 0) {
1185                                 PMD_DRV_LOG(WARNING,
1186                                             "init'ed rx ring %d with %d/%d mbufs only\n",
1187                                             rxq->queue_id, i, ring->ring_size);
1188                                 break;
1189                         }
1190                 }
1191                 rxr->rx_raw_prod = raw_prod;
1192                 raw_prod = RING_NEXT(raw_prod);
1193         }
1194
1195         /* Initialize dummy mbuf pointers for vector mode rx. */
1196         for (i = ring->ring_size;
1197              i < ring->ring_size + RTE_BNXT_DESCS_PER_LOOP; i++) {
1198                 rxr->rx_buf_ring[i] = &rxq->fake_mbuf;
1199         }
1200
1201         ring = rxr->ag_ring_struct;
1202         type = RX_PROD_AGG_BD_TYPE_RX_PROD_AGG;
1203         bnxt_init_rxbds(ring, type, size);
1204         raw_prod = rxr->ag_raw_prod;
1205
1206         for (i = 0; i < ring->ring_size; i++) {
1207                 if (unlikely(!rxr->ag_buf_ring[i])) {
1208                         if (bnxt_alloc_ag_data(rxq, rxr, raw_prod) != 0) {
1209                                 PMD_DRV_LOG(WARNING,
1210                                             "init'ed AG ring %d with %d/%d mbufs only\n",
1211                                             rxq->queue_id, i, ring->ring_size);
1212                                 break;
1213                         }
1214                 }
1215                 rxr->ag_raw_prod = raw_prod;
1216                 raw_prod = RING_NEXT(raw_prod);
1217         }
1218         PMD_DRV_LOG(DEBUG, "AGG Done!\n");
1219
1220         if (rxr->tpa_info) {
1221                 unsigned int max_aggs = BNXT_TPA_MAX_AGGS(rxq->bp);
1222
1223                 for (i = 0; i < max_aggs; i++) {
1224                         if (unlikely(!rxr->tpa_info[i].mbuf)) {
1225                                 rxr->tpa_info[i].mbuf =
1226                                         __bnxt_alloc_rx_data(rxq->mb_pool);
1227                                 if (!rxr->tpa_info[i].mbuf) {
1228                                         rte_atomic64_inc(&rxq->rx_mbuf_alloc_fail);
1229                                         return -ENOMEM;
1230                                 }
1231                         }
1232                 }
1233         }
1234         PMD_DRV_LOG(DEBUG, "TPA alloc Done!\n");
1235
1236         return 0;
1237 }