drivers/net/bnxt/bnxt_rxr.c

   1 /* SPDX-License-Identifier: BSD-3-Clause
   2  * Copyright(c) 2014-2018 Broadcom
   3  * All rights reserved.
   4  */
   5
   6 #include <inttypes.h>
   7 #include <stdbool.h>
   8
   9 #include <rte_bitmap.h>
  10 #include <rte_byteorder.h>
  11 #include <rte_malloc.h>
  12 #include <rte_memory.h>
  13
  14 #include "bnxt.h"
  15 #include "bnxt_reps.h"
  16 #include "bnxt_ring.h"
  17 #include "bnxt_rxr.h"
  18 #include "bnxt_rxq.h"
  19 #include "hsi_struct_def_dpdk.h"
  20 #ifdef RTE_LIBRTE_IEEE1588
  21 #include "bnxt_hwrm.h"
  22 #endif
  23
  24 #include <bnxt_tf_common.h>
  25 #include <ulp_mark_mgr.h>
  26
  27 /*
  28  * RX Ring handling
  29  */
  30
  31 static inline struct rte_mbuf *__bnxt_alloc_rx_data(struct rte_mempool *mb)
  32 {
  33         struct rte_mbuf *data;
  34
  35         data = rte_mbuf_raw_alloc(mb);
  36
  37         return data;
  38 }
  39
  40 static inline int bnxt_alloc_rx_data(struct bnxt_rx_queue *rxq,
  41                                      struct bnxt_rx_ring_info *rxr,
  42                                      uint16_t raw_prod)
  43 {
  44         uint16_t prod = RING_IDX(rxr->rx_ring_struct, raw_prod);
  45         struct rx_prod_pkt_bd *rxbd;
  46         struct rte_mbuf **rx_buf;
  47         struct rte_mbuf *mbuf;
  48
  49         rxbd = &rxr->rx_desc_ring[prod];
  50         rx_buf = &rxr->rx_buf_ring[prod];
  51         mbuf = __bnxt_alloc_rx_data(rxq->mb_pool);
  52         if (!mbuf) {
  53                 rte_atomic64_inc(&rxq->rx_mbuf_alloc_fail);
  54                 return -ENOMEM;
  55         }
  56
  57         *rx_buf = mbuf;
  58         mbuf->data_off = RTE_PKTMBUF_HEADROOM;
  59
  60         rxbd->address = rte_cpu_to_le_64(rte_mbuf_data_iova_default(mbuf));
  61
  62         return 0;
  63 }
  64
  65 static inline int bnxt_alloc_ag_data(struct bnxt_rx_queue *rxq,
  66                                      struct bnxt_rx_ring_info *rxr,
  67                                      uint16_t raw_prod)
  68 {
  69         uint16_t prod = RING_IDX(rxr->ag_ring_struct, raw_prod);
  70         struct rx_prod_pkt_bd *rxbd;
  71         struct rte_mbuf **rx_buf;
  72         struct rte_mbuf *mbuf;
  73
  74         rxbd = &rxr->ag_desc_ring[prod];
  75         rx_buf = &rxr->ag_buf_ring[prod];
  76         if (rxbd == NULL) {
  77                 PMD_DRV_LOG(ERR, "Jumbo Frame. rxbd is NULL\n");
  78                 return -EINVAL;
  79         }
  80
  81         if (rx_buf == NULL) {
  82                 PMD_DRV_LOG(ERR, "Jumbo Frame. rx_buf is NULL\n");
  83                 return -EINVAL;
  84         }
  85
  86         mbuf = __bnxt_alloc_rx_data(rxq->mb_pool);
  87         if (!mbuf) {
  88                 rte_atomic64_inc(&rxq->rx_mbuf_alloc_fail);
  89                 return -ENOMEM;
  90         }
  91
  92         *rx_buf = mbuf;
  93         mbuf->data_off = RTE_PKTMBUF_HEADROOM;
  94
  95         rxbd->address = rte_cpu_to_le_64(rte_mbuf_data_iova_default(mbuf));
  96
  97         return 0;
  98 }
  99
 100 static inline void bnxt_reuse_rx_mbuf(struct bnxt_rx_ring_info *rxr,
 101                                struct rte_mbuf *mbuf)
 102 {
 103         uint16_t prod, raw_prod = RING_NEXT(rxr->rx_raw_prod);
 104         struct rte_mbuf **prod_rx_buf;
 105         struct rx_prod_pkt_bd *prod_bd;
 106
 107         prod = RING_IDX(rxr->rx_ring_struct, raw_prod);
 108         prod_rx_buf = &rxr->rx_buf_ring[prod];
 109
 110         RTE_ASSERT(*prod_rx_buf == NULL);
 111         RTE_ASSERT(mbuf != NULL);
 112
 113         *prod_rx_buf = mbuf;
 114
 115         prod_bd = &rxr->rx_desc_ring[prod];
 116
 117         prod_bd->address = rte_cpu_to_le_64(rte_mbuf_data_iova_default(mbuf));
 118
 119         rxr->rx_raw_prod = raw_prod;
 120 }
 121
 122 static inline
 123 struct rte_mbuf *bnxt_consume_rx_buf(struct bnxt_rx_ring_info *rxr,
 124                                      uint16_t cons)
 125 {
 126         struct rte_mbuf **cons_rx_buf;
 127         struct rte_mbuf *mbuf;
 128
 129         cons_rx_buf = &rxr->rx_buf_ring[RING_IDX(rxr->rx_ring_struct, cons)];
 130         RTE_ASSERT(*cons_rx_buf != NULL);
 131         mbuf = *cons_rx_buf;
 132         *cons_rx_buf = NULL;
 133
 134         return mbuf;
 135 }
 136
 137 static void bnxt_tpa_get_metadata(struct bnxt *bp,
 138                                   struct bnxt_tpa_info *tpa_info,
 139                                   struct rx_tpa_start_cmpl *tpa_start,
 140                                   struct rx_tpa_start_cmpl_hi *tpa_start1)
 141 {
 142         tpa_info->cfa_code_valid = 0;
 143         tpa_info->vlan_valid = 0;
 144         tpa_info->hash_valid = 0;
 145         tpa_info->l4_csum_valid = 0;
 146
 147         if (likely(tpa_start->flags_type &
 148                    rte_cpu_to_le_32(RX_TPA_START_CMPL_FLAGS_RSS_VALID))) {
 149                 tpa_info->hash_valid = 1;
 150                 tpa_info->rss_hash = rte_le_to_cpu_32(tpa_start->rss_hash);
 151         }
 152
 153         if (bp->vnic_cap_flags & BNXT_VNIC_CAP_RX_CMPL_V2) {
 154                 struct rx_tpa_start_v2_cmpl *v2_tpa_start = (void *)tpa_start;
 155                 struct rx_tpa_start_v2_cmpl_hi *v2_tpa_start1 =
 156                         (void *)tpa_start1;
 157
 158                 if (v2_tpa_start->agg_id &
 159                     RX_TPA_START_V2_CMPL_METADATA1_VALID) {
 160                         tpa_info->vlan_valid = 1;
 161                         tpa_info->vlan =
 162                                 rte_le_to_cpu_16(v2_tpa_start1->metadata0);
 163                 }
 164
 165                 if (v2_tpa_start1->flags2 & RX_CMP_FLAGS2_L4_CSUM_ALL_OK_MASK)
 166                         tpa_info->l4_csum_valid = 1;
 167
 168                 return;
 169         }
 170
 171         tpa_info->cfa_code_valid = 1;
 172         tpa_info->cfa_code = rte_le_to_cpu_16(tpa_start1->cfa_code);
 173         if (tpa_start1->flags2 &
 174             rte_cpu_to_le_32(RX_TPA_START_CMPL_FLAGS2_META_FORMAT_VLAN)) {
 175                 tpa_info->vlan_valid = 1;
 176                 tpa_info->vlan = rte_le_to_cpu_32(tpa_start1->metadata);
 177         }
 178
 179         if (likely(tpa_start1->flags2 &
 180                    rte_cpu_to_le_32(RX_TPA_START_CMPL_FLAGS2_L4_CS_CALC)))
 181                 tpa_info->l4_csum_valid = 1;
 182 }
 183
 184 static void bnxt_tpa_start(struct bnxt_rx_queue *rxq,
 185                            struct rx_tpa_start_cmpl *tpa_start,
 186                            struct rx_tpa_start_cmpl_hi *tpa_start1)
 187 {
 188         struct bnxt_rx_ring_info *rxr = rxq->rx_ring;
 189         uint16_t agg_id;
 190         uint16_t data_cons;
 191         struct bnxt_tpa_info *tpa_info;
 192         struct rte_mbuf *mbuf;
 193
 194         agg_id = bnxt_tpa_start_agg_id(rxq->bp, tpa_start);
 195
 196         data_cons = tpa_start->opaque;
 197         tpa_info = &rxr->tpa_info[agg_id];
 198
 199         mbuf = bnxt_consume_rx_buf(rxr, data_cons);
 200
 201         bnxt_reuse_rx_mbuf(rxr, tpa_info->mbuf);
 202
 203         tpa_info->agg_count = 0;
 204         tpa_info->mbuf = mbuf;
 205         tpa_info->len = rte_le_to_cpu_32(tpa_start->len);
 206
 207         mbuf->data_off = RTE_PKTMBUF_HEADROOM;
 208         mbuf->nb_segs = 1;
 209         mbuf->next = NULL;
 210         mbuf->pkt_len = rte_le_to_cpu_32(tpa_start->len);
 211         mbuf->data_len = mbuf->pkt_len;
 212         mbuf->port = rxq->port_id;
 213         mbuf->ol_flags = PKT_RX_LRO;
 214
 215         bnxt_tpa_get_metadata(rxq->bp, tpa_info, tpa_start, tpa_start1);
 216
 217         if (likely(tpa_info->hash_valid)) {
 218                 mbuf->hash.rss = tpa_info->rss_hash;
 219                 mbuf->ol_flags |= PKT_RX_RSS_HASH;
 220         } else if (tpa_info->cfa_code_valid) {
 221                 mbuf->hash.fdir.id = tpa_info->cfa_code;
 222                 mbuf->ol_flags |= PKT_RX_FDIR | PKT_RX_FDIR_ID;
 223         }
 224
 225         if (tpa_info->vlan_valid) {
 226                 mbuf->vlan_tci = tpa_info->vlan;
 227                 mbuf->ol_flags |= PKT_RX_VLAN | PKT_RX_VLAN_STRIPPED;
 228         }
 229
 230         if (likely(tpa_info->l4_csum_valid))
 231                 mbuf->ol_flags |= PKT_RX_L4_CKSUM_GOOD;
 232
 233         /* recycle next mbuf */
 234         data_cons = RING_NEXT(data_cons);
 235         bnxt_reuse_rx_mbuf(rxr, bnxt_consume_rx_buf(rxr, data_cons));
 236 }
 237
 238 static int bnxt_agg_bufs_valid(struct bnxt_cp_ring_info *cpr,
 239                 uint8_t agg_bufs, uint32_t raw_cp_cons)
 240 {
 241         uint16_t last_cp_cons;
 242         struct rx_pkt_cmpl *agg_cmpl;
 243
 244         raw_cp_cons = ADV_RAW_CMP(raw_cp_cons, agg_bufs);
 245         last_cp_cons = RING_CMP(cpr->cp_ring_struct, raw_cp_cons);
 246         agg_cmpl = (struct rx_pkt_cmpl *)&cpr->cp_desc_ring[last_cp_cons];
 247         cpr->valid = FLIP_VALID(raw_cp_cons,
 248                                 cpr->cp_ring_struct->ring_mask,
 249                                 cpr->valid);
 250         return CMP_VALID(agg_cmpl, raw_cp_cons, cpr->cp_ring_struct);
 251 }
 252
 253 /* TPA consume agg buffer out of order, allocate connected data only */
 254 static int bnxt_prod_ag_mbuf(struct bnxt_rx_queue *rxq)
 255 {
 256         struct bnxt_rx_ring_info *rxr = rxq->rx_ring;
 257         uint16_t raw_next = RING_NEXT(rxr->ag_raw_prod);
 258         uint16_t bmap_next = RING_IDX(rxr->ag_ring_struct, raw_next);
 259
 260         /* TODO batch allocation for better performance */
 261         while (rte_bitmap_get(rxr->ag_bitmap, bmap_next)) {
 262                 if (unlikely(bnxt_alloc_ag_data(rxq, rxr, raw_next))) {
 263                         PMD_DRV_LOG(ERR, "agg mbuf alloc failed: prod=0x%x\n",
 264                                     raw_next);
 265                         break;
 266                 }
 267                 rte_bitmap_clear(rxr->ag_bitmap, bmap_next);
 268                 rxr->ag_raw_prod = raw_next;
 269                 raw_next = RING_NEXT(raw_next);
 270                 bmap_next = RING_IDX(rxr->ag_ring_struct, raw_next);
 271         }
 272
 273         return 0;
 274 }
 275
 276 static int bnxt_rx_pages(struct bnxt_rx_queue *rxq,
 277                          struct rte_mbuf *mbuf, uint32_t *tmp_raw_cons,
 278                          uint8_t agg_buf, struct bnxt_tpa_info *tpa_info)
 279 {
 280         struct bnxt_cp_ring_info *cpr = rxq->cp_ring;
 281         struct bnxt_rx_ring_info *rxr = rxq->rx_ring;
 282         int i;
 283         uint16_t cp_cons, ag_cons;
 284         struct rx_pkt_cmpl *rxcmp;
 285         struct rte_mbuf *last = mbuf;
 286         bool is_p5_tpa = tpa_info && BNXT_CHIP_P5(rxq->bp);
 287
 288         for (i = 0; i < agg_buf; i++) {
 289                 struct rte_mbuf **ag_buf;
 290                 struct rte_mbuf *ag_mbuf;
 291
 292                 if (is_p5_tpa) {
 293                         rxcmp = (void *)&tpa_info->agg_arr[i];
 294                 } else {
 295                         *tmp_raw_cons = NEXT_RAW_CMP(*tmp_raw_cons);
 296                         cp_cons = RING_CMP(cpr->cp_ring_struct, *tmp_raw_cons);
 297                         rxcmp = (struct rx_pkt_cmpl *)
 298                                         &cpr->cp_desc_ring[cp_cons];
 299                 }
 300
 301 #ifdef BNXT_DEBUG
 302                 bnxt_dump_cmpl(cp_cons, rxcmp);
 303 #endif
 304
 305                 ag_cons = rxcmp->opaque;
 306                 RTE_ASSERT(ag_cons <= rxr->ag_ring_struct->ring_mask);
 307                 ag_buf = &rxr->ag_buf_ring[ag_cons];
 308                 ag_mbuf = *ag_buf;
 309                 RTE_ASSERT(ag_mbuf != NULL);
 310
 311                 ag_mbuf->data_len = rte_le_to_cpu_16(rxcmp->len);
 312
 313                 mbuf->nb_segs++;
 314                 mbuf->pkt_len += ag_mbuf->data_len;
 315
 316                 last->next = ag_mbuf;
 317                 last = ag_mbuf;
 318
 319                 *ag_buf = NULL;
 320
 321                 /*
 322                  * As aggregation buffer consumed out of order in TPA module,
 323                  * use bitmap to track freed slots to be allocated and notified
 324                  * to NIC
 325                  */
 326                 rte_bitmap_set(rxr->ag_bitmap, ag_cons);
 327         }
 328         bnxt_prod_ag_mbuf(rxq);
 329         return 0;
 330 }
 331
 332 static inline struct rte_mbuf *bnxt_tpa_end(
 333                 struct bnxt_rx_queue *rxq,
 334                 uint32_t *raw_cp_cons,
 335                 struct rx_tpa_end_cmpl *tpa_end,
 336                 struct rx_tpa_end_cmpl_hi *tpa_end1)
 337 {
 338         struct bnxt_cp_ring_info *cpr = rxq->cp_ring;
 339         struct bnxt_rx_ring_info *rxr = rxq->rx_ring;
 340         uint16_t agg_id;
 341         struct rte_mbuf *mbuf;
 342         uint8_t agg_bufs;
 343         uint8_t payload_offset;
 344         struct bnxt_tpa_info *tpa_info;
 345
 346         if (BNXT_CHIP_P5(rxq->bp)) {
 347                 struct rx_tpa_v2_end_cmpl *th_tpa_end;
 348                 struct rx_tpa_v2_end_cmpl_hi *th_tpa_end1;
 349
 350                 th_tpa_end = (void *)tpa_end;
 351                 th_tpa_end1 = (void *)tpa_end1;
 352                 agg_id = BNXT_TPA_END_AGG_ID_TH(th_tpa_end);
 353                 agg_bufs = BNXT_TPA_END_AGG_BUFS_TH(th_tpa_end1);
 354                 payload_offset = th_tpa_end1->payload_offset;
 355         } else {
 356                 agg_id = BNXT_TPA_END_AGG_ID(tpa_end);
 357                 agg_bufs = BNXT_TPA_END_AGG_BUFS(tpa_end);
 358                 if (!bnxt_agg_bufs_valid(cpr, agg_bufs, *raw_cp_cons))
 359                         return NULL;
 360                 payload_offset = tpa_end->payload_offset;
 361         }
 362
 363         tpa_info = &rxr->tpa_info[agg_id];
 364         mbuf = tpa_info->mbuf;
 365         RTE_ASSERT(mbuf != NULL);
 366
 367         if (agg_bufs) {
 368                 bnxt_rx_pages(rxq, mbuf, raw_cp_cons, agg_bufs, tpa_info);
 369         }
 370         mbuf->l4_len = payload_offset;
 371
 372         struct rte_mbuf *new_data = __bnxt_alloc_rx_data(rxq->mb_pool);
 373         RTE_ASSERT(new_data != NULL);
 374         if (!new_data) {
 375                 rte_atomic64_inc(&rxq->rx_mbuf_alloc_fail);
 376                 return NULL;
 377         }
 378         tpa_info->mbuf = new_data;
 379
 380         return mbuf;
 381 }
 382
 383 uint32_t bnxt_ptype_table[BNXT_PTYPE_TBL_DIM] __rte_cache_aligned;
 384
 385 static void __rte_cold
 386 bnxt_init_ptype_table(void)
 387 {
 388         uint32_t *pt = bnxt_ptype_table;
 389         static bool initialized;
 390         int ip6, tun, type;
 391         uint32_t l3;
 392         int i;
 393
 394         if (initialized)
 395                 return;
 396
 397         for (i = 0; i < BNXT_PTYPE_TBL_DIM; i++) {
 398                 if (i & (RX_PKT_CMPL_FLAGS2_META_FORMAT_VLAN >> 2))
 399                         pt[i] = RTE_PTYPE_L2_ETHER_VLAN;
 400                 else
 401                         pt[i] = RTE_PTYPE_L2_ETHER;
 402
 403                 ip6 = i & (RX_PKT_CMPL_FLAGS2_IP_TYPE >> 7);
 404                 tun = i & (RX_PKT_CMPL_FLAGS2_T_IP_CS_CALC >> 2);
 405                 type = (i & 0x38) << 9;
 406
 407                 if (!tun && !ip6)
 408                         l3 = RTE_PTYPE_L3_IPV4_EXT_UNKNOWN;
 409                 else if (!tun && ip6)
 410                         l3 = RTE_PTYPE_L3_IPV6_EXT_UNKNOWN;
 411                 else if (tun && !ip6)
 412                         l3 = RTE_PTYPE_INNER_L3_IPV4_EXT_UNKNOWN;
 413                 else
 414                         l3 = RTE_PTYPE_INNER_L3_IPV6_EXT_UNKNOWN;
 415
 416                 switch (type) {
 417                 case RX_PKT_CMPL_FLAGS_ITYPE_ICMP:
 418                         if (tun)
 419                                 pt[i] |= l3 | RTE_PTYPE_INNER_L4_ICMP;
 420                         else
 421                                 pt[i] |= l3 | RTE_PTYPE_L4_ICMP;
 422                         break;
 423                 case RX_PKT_CMPL_FLAGS_ITYPE_TCP:
 424                         if (tun)
 425                                 pt[i] |= l3 | RTE_PTYPE_INNER_L4_TCP;
 426                         else
 427                                 pt[i] |= l3 | RTE_PTYPE_L4_TCP;
 428                         break;
 429                 case RX_PKT_CMPL_FLAGS_ITYPE_UDP:
 430                         if (tun)
 431                                 pt[i] |= l3 | RTE_PTYPE_INNER_L4_UDP;
 432                         else
 433                                 pt[i] |= l3 | RTE_PTYPE_L4_UDP;
 434                         break;
 435                 case RX_PKT_CMPL_FLAGS_ITYPE_IP:
 436                         pt[i] |= l3;
 437                         break;
 438                 }
 439         }
 440         initialized = true;
 441 }
 442
 443 static uint32_t
 444 bnxt_parse_pkt_type(struct rx_pkt_cmpl *rxcmp, struct rx_pkt_cmpl_hi *rxcmp1)
 445 {
 446         uint32_t flags_type, flags2;
 447         uint8_t index;
 448
 449         flags_type = rte_le_to_cpu_16(rxcmp->flags_type);
 450         flags2 = rte_le_to_cpu_32(rxcmp1->flags2);
 451
 452         /*
 453          * Index format:
 454          *     bit 0: RX_PKT_CMPL_FLAGS2_T_IP_CS_CALC
 455          *     bit 1: RX_CMPL_FLAGS2_IP_TYPE
 456          *     bit 2: RX_PKT_CMPL_FLAGS2_META_FORMAT_VLAN
 457          *     bits 3-6: RX_PKT_CMPL_FLAGS_ITYPE
 458          */
 459         index = ((flags_type & RX_PKT_CMPL_FLAGS_ITYPE_MASK) >> 9) |
 460                 ((flags2 & (RX_PKT_CMPL_FLAGS2_META_FORMAT_VLAN |
 461                            RX_PKT_CMPL_FLAGS2_T_IP_CS_CALC)) >> 2) |
 462                 ((flags2 & RX_PKT_CMPL_FLAGS2_IP_TYPE) >> 7);
 463
 464         return bnxt_ptype_table[index];
 465 }
 466
 467 static void __rte_cold
 468 bnxt_init_ol_flags_tables(struct bnxt_rx_queue *rxq)
 469 {
 470         struct bnxt_rx_ring_info *rxr = rxq->rx_ring;
 471         struct rte_eth_conf *dev_conf;
 472         bool outer_cksum_enabled;
 473         uint64_t offloads;
 474         uint32_t *pt;
 475         int i;
 476
 477         dev_conf = &rxq->bp->eth_dev->data->dev_conf;
 478         offloads = dev_conf->rxmode.offloads;
 479
 480         outer_cksum_enabled = !!(offloads & (DEV_RX_OFFLOAD_OUTER_IPV4_CKSUM |
 481                                              DEV_RX_OFFLOAD_OUTER_UDP_CKSUM));
 482
 483         /* Initialize ol_flags table. */
 484         pt = rxr->ol_flags_table;
 485         for (i = 0; i < BNXT_OL_FLAGS_TBL_DIM; i++) {
 486                 pt[i] = 0;
 487
 488                 if (i & RX_PKT_CMPL_FLAGS2_META_FORMAT_VLAN)
 489                         pt[i] |= PKT_RX_VLAN | PKT_RX_VLAN_STRIPPED;
 490
 491                 if (i & (RX_PKT_CMPL_FLAGS2_T_IP_CS_CALC << 3)) {
 492                         /* Tunnel case. */
 493                         if (outer_cksum_enabled) {
 494                                 if (i & RX_PKT_CMPL_FLAGS2_IP_CS_CALC)
 495                                         pt[i] |= PKT_RX_IP_CKSUM_GOOD;
 496
 497                                 if (i & RX_PKT_CMPL_FLAGS2_L4_CS_CALC)
 498                                         pt[i] |= PKT_RX_L4_CKSUM_GOOD;
 499
 500                                 if (i & RX_PKT_CMPL_FLAGS2_T_L4_CS_CALC)
 501                                         pt[i] |= PKT_RX_OUTER_L4_CKSUM_GOOD;
 502                         } else {
 503                                 if (i & RX_PKT_CMPL_FLAGS2_T_IP_CS_CALC)
 504                                         pt[i] |= PKT_RX_IP_CKSUM_GOOD;
 505
 506                                 if (i & RX_PKT_CMPL_FLAGS2_T_L4_CS_CALC)
 507                                         pt[i] |= PKT_RX_L4_CKSUM_GOOD;
 508                         }
 509                 } else {
 510                         /* Non-tunnel case. */
 511                         if (i & RX_PKT_CMPL_FLAGS2_IP_CS_CALC)
 512                                 pt[i] |= PKT_RX_IP_CKSUM_GOOD;
 513
 514                         if (i & RX_PKT_CMPL_FLAGS2_L4_CS_CALC)
 515                                 pt[i] |= PKT_RX_L4_CKSUM_GOOD;
 516                 }
 517         }
 518
 519         /* Initialize checksum error table. */
 520         pt = rxr->ol_flags_err_table;
 521         for (i = 0; i < BNXT_OL_FLAGS_ERR_TBL_DIM; i++) {
 522                 pt[i] = 0;
 523
 524                 if (i & (RX_PKT_CMPL_FLAGS2_T_IP_CS_CALC << 2)) {
 525                         /* Tunnel case. */
 526                         if (outer_cksum_enabled) {
 527                                 if (i & (RX_PKT_CMPL_ERRORS_IP_CS_ERROR >> 4))
 528                                         pt[i] |= PKT_RX_IP_CKSUM_BAD;
 529
 530                                 if (i & (RX_PKT_CMPL_ERRORS_T_IP_CS_ERROR >> 4))
 531                                         pt[i] |= PKT_RX_EIP_CKSUM_BAD;
 532
 533                                 if (i & (RX_PKT_CMPL_ERRORS_L4_CS_ERROR >> 4))
 534                                         pt[i] |= PKT_RX_L4_CKSUM_BAD;
 535
 536                                 if (i & (RX_PKT_CMPL_ERRORS_T_L4_CS_ERROR >> 4))
 537                                         pt[i] |= PKT_RX_OUTER_L4_CKSUM_BAD;
 538                         } else {
 539                                 if (i & (RX_PKT_CMPL_ERRORS_T_IP_CS_ERROR >> 4))
 540                                         pt[i] |= PKT_RX_IP_CKSUM_BAD;
 541
 542                                 if (i & (RX_PKT_CMPL_ERRORS_T_L4_CS_ERROR >> 4))
 543                                         pt[i] |= PKT_RX_L4_CKSUM_BAD;
 544                         }
 545                 } else {
 546                         /* Non-tunnel case. */
 547                         if (i & (RX_PKT_CMPL_ERRORS_IP_CS_ERROR >> 4))
 548                                 pt[i] |= PKT_RX_IP_CKSUM_BAD;
 549
 550                         if (i & (RX_PKT_CMPL_ERRORS_L4_CS_ERROR >> 4))
 551                                 pt[i] |= PKT_RX_L4_CKSUM_BAD;
 552                 }
 553         }
 554 }
 555
 556 static void
 557 bnxt_set_ol_flags(struct bnxt_rx_ring_info *rxr, struct rx_pkt_cmpl *rxcmp,
 558                   struct rx_pkt_cmpl_hi *rxcmp1, struct rte_mbuf *mbuf)
 559 {
 560         uint16_t flags_type, errors, flags;
 561         uint64_t ol_flags;
 562
 563         flags_type = rte_le_to_cpu_16(rxcmp->flags_type);
 564
 565         flags = rte_le_to_cpu_32(rxcmp1->flags2) &
 566                                 (RX_PKT_CMPL_FLAGS2_IP_CS_CALC |
 567                                  RX_PKT_CMPL_FLAGS2_L4_CS_CALC |
 568                                  RX_PKT_CMPL_FLAGS2_T_IP_CS_CALC |
 569                                  RX_PKT_CMPL_FLAGS2_T_L4_CS_CALC |
 570                                  RX_PKT_CMPL_FLAGS2_META_FORMAT_VLAN);
 571
 572         flags |= (flags & RX_PKT_CMPL_FLAGS2_T_IP_CS_CALC) << 3;
 573         errors = rte_le_to_cpu_16(rxcmp1->errors_v2) &
 574                                 (RX_PKT_CMPL_ERRORS_IP_CS_ERROR |
 575                                  RX_PKT_CMPL_ERRORS_L4_CS_ERROR |
 576                                  RX_PKT_CMPL_ERRORS_T_IP_CS_ERROR |
 577                                  RX_PKT_CMPL_ERRORS_T_L4_CS_ERROR);
 578         errors = (errors >> 4) & flags;
 579
 580         ol_flags = rxr->ol_flags_table[flags & ~errors];
 581
 582         if (unlikely(errors)) {
 583                 errors |= (flags & RX_PKT_CMPL_FLAGS2_T_IP_CS_CALC) << 2;
 584                 ol_flags |= rxr->ol_flags_err_table[errors];
 585         }
 586
 587         if (flags_type & RX_PKT_CMPL_FLAGS_RSS_VALID) {
 588                 mbuf->hash.rss = rte_le_to_cpu_32(rxcmp->rss_hash);
 589                 ol_flags |= PKT_RX_RSS_HASH;
 590         }
 591
 592         mbuf->ol_flags = ol_flags;
 593 }
 594
 595 #ifdef RTE_LIBRTE_IEEE1588
 596 static void
 597 bnxt_get_rx_ts_p5(struct bnxt *bp, uint32_t rx_ts_cmpl)
 598 {
 599         uint64_t systime_cycles = 0;
 600
 601         if (!BNXT_CHIP_P5(bp))
 602                 return;
 603
 604         /* On Thor, Rx timestamps are provided directly in the
 605          * Rx completion records to the driver. Only 32 bits of
 606          * the timestamp is present in the completion. Driver needs
 607          * to read the current 48 bit free running timer using the
 608          * HWRM_PORT_TS_QUERY command and combine the upper 16 bits
 609          * from the HWRM response with the lower 32 bits in the
 610          * Rx completion to produce the 48 bit timestamp for the Rx packet
 611          */
 612         bnxt_hwrm_port_ts_query(bp, BNXT_PTP_FLAGS_CURRENT_TIME,
 613                                 &systime_cycles);
 614         bp->ptp_cfg->rx_timestamp = (systime_cycles & 0xFFFF00000000);
 615         bp->ptp_cfg->rx_timestamp |= rx_ts_cmpl;
 616 }
 617 #endif
 618
 619 static uint32_t
 620 bnxt_ulp_set_mark_in_mbuf(struct bnxt *bp, struct rx_pkt_cmpl_hi *rxcmp1,
 621                           struct rte_mbuf *mbuf, uint32_t *vfr_flag)
 622 {
 623         uint32_t cfa_code;
 624         uint32_t meta_fmt;
 625         uint32_t meta;
 626         bool gfid = false;
 627         uint32_t mark_id;
 628         uint32_t flags2;
 629         uint32_t gfid_support = 0;
 630         int rc;
 631
 632         if (BNXT_GFID_ENABLED(bp))
 633                 gfid_support = 1;
 634
 635         cfa_code = rte_le_to_cpu_16(rxcmp1->cfa_code);
 636         flags2 = rte_le_to_cpu_32(rxcmp1->flags2);
 637         meta = rte_le_to_cpu_32(rxcmp1->metadata);
 638
 639         /*
 640          * The flags field holds extra bits of info from [6:4]
 641          * which indicate if the flow is in TCAM or EM or EEM
 642          */
 643         meta_fmt = (flags2 & BNXT_CFA_META_FMT_MASK) >>
 644                 BNXT_CFA_META_FMT_SHFT;
 645
 646         switch (meta_fmt) {
 647         case 0:
 648                 if (gfid_support) {
 649                         /* Not an LFID or GFID, a flush cmd. */
 650                         goto skip_mark;
 651                 } else {
 652                         /* LFID mode, no vlan scenario */
 653                         gfid = false;
 654                 }
 655                 break;
 656         case 4:
 657         case 5:
 658                 /*
 659                  * EM/TCAM case
 660                  * Assume that EM doesn't support Mark due to GFID
 661                  * collisions with EEM.  Simply return without setting the mark
 662                  * in the mbuf.
 663                  */
 664                 if (BNXT_CFA_META_EM_TEST(meta)) {
 665                         /*This is EM hit {EM(1), GFID[27:16], 19'd0 or vtag } */
 666                         gfid = true;
 667                         meta >>= BNXT_RX_META_CFA_CODE_SHIFT;
 668                         cfa_code |= meta << BNXT_CFA_CODE_META_SHIFT;
 669                 } else {
 670                         /*
 671                          * It is a TCAM entry, so it is an LFID.
 672                          * The TCAM IDX and Mode can also be determined
 673                          * by decoding the meta_data. We are not
 674                          * using these for now.
 675                          */
 676                 }
 677                 break;
 678         case 6:
 679         case 7:
 680                 /* EEM Case, only using gfid in EEM for now. */
 681                 gfid = true;
 682
 683                 /*
 684                  * For EEM flows, The first part of cfa_code is 16 bits.
 685                  * The second part is embedded in the
 686                  * metadata field from bit 19 onwards. The driver needs to
 687                  * ignore the first 19 bits of metadata and use the next 12
 688                  * bits as higher 12 bits of cfa_code.
 689                  */
 690                 meta >>= BNXT_RX_META_CFA_CODE_SHIFT;
 691                 cfa_code |= meta << BNXT_CFA_CODE_META_SHIFT;
 692                 break;
 693         default:
 694                 /* For other values, the cfa_code is assumed to be an LFID. */
 695                 break;
 696         }
 697
 698         rc = ulp_mark_db_mark_get(bp->ulp_ctx, gfid,
 699                                   cfa_code, vfr_flag, &mark_id);
 700         if (!rc) {
 701                 /* VF to VFR Rx path. So, skip mark_id injection in mbuf */
 702                 if (vfr_flag && *vfr_flag)
 703                         return mark_id;
 704                 /* Got the mark, write it to the mbuf and return */
 705                 mbuf->hash.fdir.hi = mark_id;
 706                 *bnxt_cfa_code_dynfield(mbuf) = cfa_code & 0xffffffffull;
 707                 mbuf->hash.fdir.id = rxcmp1->cfa_code;
 708                 mbuf->ol_flags |= PKT_RX_FDIR | PKT_RX_FDIR_ID;
 709                 return mark_id;
 710         }
 711
 712 skip_mark:
 713         mbuf->hash.fdir.hi = 0;
 714         mbuf->hash.fdir.id = 0;
 715
 716         return 0;
 717 }
 718
 719 void bnxt_set_mark_in_mbuf(struct bnxt *bp,
 720                            struct rx_pkt_cmpl_hi *rxcmp1,
 721                            struct rte_mbuf *mbuf)
 722 {
 723         uint32_t cfa_code = 0;
 724         uint8_t meta_fmt = 0;
 725         uint16_t flags2 = 0;
 726         uint32_t meta =  0;
 727
 728         cfa_code = rte_le_to_cpu_16(rxcmp1->cfa_code);
 729         if (!cfa_code)
 730                 return;
 731
 732         if (cfa_code && !bp->mark_table[cfa_code].valid)
 733                 return;
 734
 735         flags2 = rte_le_to_cpu_16(rxcmp1->flags2);
 736         meta = rte_le_to_cpu_32(rxcmp1->metadata);
 737         if (meta) {
 738                 meta >>= BNXT_RX_META_CFA_CODE_SHIFT;
 739
 740                 /* The flags field holds extra bits of info from [6:4]
 741                  * which indicate if the flow is in TCAM or EM or EEM
 742                  */
 743                 meta_fmt = (flags2 & BNXT_CFA_META_FMT_MASK) >>
 744                            BNXT_CFA_META_FMT_SHFT;
 745
 746                 /* meta_fmt == 4 => 'b100 => 'b10x => EM.
 747                  * meta_fmt == 5 => 'b101 => 'b10x => EM + VLAN
 748                  * meta_fmt == 6 => 'b110 => 'b11x => EEM
 749                  * meta_fmt == 7 => 'b111 => 'b11x => EEM + VLAN.
 750                  */
 751                 meta_fmt >>= BNXT_CFA_META_FMT_EM_EEM_SHFT;
 752         }
 753
 754         mbuf->hash.fdir.hi = bp->mark_table[cfa_code].mark_id;
 755         mbuf->ol_flags |= PKT_RX_FDIR | PKT_RX_FDIR_ID;
 756 }
 757
 758 static int bnxt_rx_pkt(struct rte_mbuf **rx_pkt,
 759                        struct bnxt_rx_queue *rxq, uint32_t *raw_cons)
 760 {
 761         struct bnxt_cp_ring_info *cpr = rxq->cp_ring;
 762         struct bnxt_rx_ring_info *rxr = rxq->rx_ring;
 763         struct rx_pkt_cmpl *rxcmp;
 764         struct rx_pkt_cmpl_hi *rxcmp1;
 765         uint32_t tmp_raw_cons = *raw_cons;
 766         uint16_t cons, raw_prod, cp_cons =
 767             RING_CMP(cpr->cp_ring_struct, tmp_raw_cons);
 768         struct rte_mbuf *mbuf;
 769         int rc = 0;
 770         uint8_t agg_buf = 0;
 771         uint16_t cmp_type;
 772         uint32_t vfr_flag = 0, mark_id = 0;
 773         struct bnxt *bp = rxq->bp;
 774
 775         rxcmp = (struct rx_pkt_cmpl *)
 776             &cpr->cp_desc_ring[cp_cons];
 777
 778         cmp_type = CMP_TYPE(rxcmp);
 779
 780         if (cmp_type == RX_TPA_V2_ABUF_CMPL_TYPE_RX_TPA_AGG) {
 781                 struct rx_tpa_v2_abuf_cmpl *rx_agg = (void *)rxcmp;
 782                 uint16_t agg_id = rte_cpu_to_le_16(rx_agg->agg_id);
 783                 struct bnxt_tpa_info *tpa_info;
 784
 785                 tpa_info = &rxr->tpa_info[agg_id];
 786                 RTE_ASSERT(tpa_info->agg_count < 16);
 787                 tpa_info->agg_arr[tpa_info->agg_count++] = *rx_agg;
 788                 rc = -EINVAL; /* Continue w/o new mbuf */
 789                 goto next_rx;
 790         }
 791
 792         tmp_raw_cons = NEXT_RAW_CMP(tmp_raw_cons);
 793         cp_cons = RING_CMP(cpr->cp_ring_struct, tmp_raw_cons);
 794         rxcmp1 = (struct rx_pkt_cmpl_hi *)&cpr->cp_desc_ring[cp_cons];
 795
 796         if (!CMP_VALID(rxcmp1, tmp_raw_cons, cpr->cp_ring_struct))
 797                 return -EBUSY;
 798
 799         cpr->valid = FLIP_VALID(cp_cons,
 800                                 cpr->cp_ring_struct->ring_mask,
 801                                 cpr->valid);
 802
 803         if (cmp_type == RX_TPA_START_CMPL_TYPE_RX_TPA_START ||
 804             cmp_type == RX_TPA_START_V2_CMPL_TYPE_RX_TPA_START_V2) {
 805                 bnxt_tpa_start(rxq, (struct rx_tpa_start_cmpl *)rxcmp,
 806                                (struct rx_tpa_start_cmpl_hi *)rxcmp1);
 807                 rc = -EINVAL; /* Continue w/o new mbuf */
 808                 goto next_rx;
 809         } else if (cmp_type == RX_TPA_END_CMPL_TYPE_RX_TPA_END) {
 810                 mbuf = bnxt_tpa_end(rxq, &tmp_raw_cons,
 811                                    (struct rx_tpa_end_cmpl *)rxcmp,
 812                                    (struct rx_tpa_end_cmpl_hi *)rxcmp1);
 813                 if (unlikely(!mbuf))
 814                         return -EBUSY;
 815                 *rx_pkt = mbuf;
 816                 goto next_rx;
 817         } else if ((cmp_type != CMPL_BASE_TYPE_RX_L2) &&
 818                    (cmp_type != CMPL_BASE_TYPE_RX_L2_V2)) {
 819                 rc = -EINVAL;
 820                 goto next_rx;
 821         }
 822
 823         agg_buf = (rxcmp->agg_bufs_v1 & RX_PKT_CMPL_AGG_BUFS_MASK)
 824                         >> RX_PKT_CMPL_AGG_BUFS_SFT;
 825         if (agg_buf && !bnxt_agg_bufs_valid(cpr, agg_buf, tmp_raw_cons))
 826                 return -EBUSY;
 827
 828         raw_prod = rxr->rx_raw_prod;
 829
 830         cons = rxcmp->opaque;
 831         mbuf = bnxt_consume_rx_buf(rxr, cons);
 832         if (mbuf == NULL)
 833                 return -EBUSY;
 834
 835         mbuf->data_off = RTE_PKTMBUF_HEADROOM;
 836         mbuf->nb_segs = 1;
 837         mbuf->next = NULL;
 838         mbuf->pkt_len = rxcmp->len;
 839         mbuf->data_len = mbuf->pkt_len;
 840         mbuf->port = rxq->port_id;
 841
 842 #ifdef RTE_LIBRTE_IEEE1588
 843         if (unlikely((rte_le_to_cpu_16(rxcmp->flags_type) &
 844                       RX_PKT_CMPL_FLAGS_MASK) ==
 845                       RX_PKT_CMPL_FLAGS_ITYPE_PTP_W_TIMESTAMP)) {
 846                 mbuf->ol_flags |= PKT_RX_IEEE1588_PTP | PKT_RX_IEEE1588_TMST;
 847                 bnxt_get_rx_ts_p5(rxq->bp, rxcmp1->reorder);
 848         }
 849 #endif
 850
 851         if (cmp_type == CMPL_BASE_TYPE_RX_L2_V2) {
 852                 bnxt_parse_csum_v2(mbuf, rxcmp1);
 853                 bnxt_parse_pkt_type_v2(mbuf, rxcmp, rxcmp1);
 854                 bnxt_rx_vlan_v2(mbuf, rxcmp, rxcmp1);
 855                 /* TODO Add support for cfa_code parsing */
 856                 goto reuse_rx_mbuf;
 857         }
 858
 859         bnxt_set_ol_flags(rxr, rxcmp, rxcmp1, mbuf);
 860
 861         mbuf->packet_type = bnxt_parse_pkt_type(rxcmp, rxcmp1);
 862
 863         if (BNXT_TRUFLOW_EN(bp))
 864                 mark_id = bnxt_ulp_set_mark_in_mbuf(rxq->bp, rxcmp1, mbuf,
 865                                                     &vfr_flag);
 866         else
 867                 bnxt_set_mark_in_mbuf(rxq->bp, rxcmp1, mbuf);
 868
 869 reuse_rx_mbuf:
 870         if (agg_buf)
 871                 bnxt_rx_pages(rxq, mbuf, &tmp_raw_cons, agg_buf, NULL);
 872
 873 #ifdef BNXT_DEBUG
 874         if (rxcmp1->errors_v2 & RX_CMP_L2_ERRORS) {
 875                 /* Re-install the mbuf back to the rx ring */
 876                 bnxt_reuse_rx_mbuf(rxr, cons, mbuf);
 877
 878                 rc = -EIO;
 879                 goto next_rx;
 880         }
 881 #endif
 882         /*
 883          * TODO: Redesign this....
 884          * If the allocation fails, the packet does not get received.
 885          * Simply returning this will result in slowly falling behind
 886          * on the producer ring buffers.
 887          * Instead, "filling up" the producer just before ringing the
 888          * doorbell could be a better solution since it will let the
 889          * producer ring starve until memory is available again pushing
 890          * the drops into hardware and getting them out of the driver
 891          * allowing recovery to a full producer ring.
 892          *
 893          * This could also help with cache usage by preventing per-packet
 894          * calls in favour of a tight loop with the same function being called
 895          * in it.
 896          */
 897         raw_prod = RING_NEXT(raw_prod);
 898         if (bnxt_alloc_rx_data(rxq, rxr, raw_prod)) {
 899                 PMD_DRV_LOG(ERR, "mbuf alloc failed with prod=0x%x\n",
 900                             raw_prod);
 901                 rc = -ENOMEM;
 902                 goto rx;
 903         }
 904         rxr->rx_raw_prod = raw_prod;
 905
 906         if (BNXT_TRUFLOW_EN(bp) && (BNXT_VF_IS_TRUSTED(bp) || BNXT_PF(bp)) &&
 907             vfr_flag) {
 908                 bnxt_vfr_recv(mark_id, rxq->queue_id, mbuf);
 909                 /* Now return an error so that nb_rx_pkts is not
 910                  * incremented.
 911                  * This packet was meant to be given to the representor.
 912                  * So no need to account the packet and give it to
 913                  * parent Rx burst function.
 914                  */
 915                 rc = -ENODEV;
 916                 goto next_rx;
 917         }
 918         /*
 919          * All MBUFs are allocated with the same size under DPDK,
 920          * no optimization for rx_copy_thresh
 921          */
 922 rx:
 923         *rx_pkt = mbuf;
 924
 925 next_rx:
 926
 927         *raw_cons = tmp_raw_cons;
 928
 929         return rc;
 930 }
 931
 932 uint16_t bnxt_recv_pkts(void *rx_queue, struct rte_mbuf **rx_pkts,
 933                                uint16_t nb_pkts)
 934 {
 935         struct bnxt_rx_queue *rxq = rx_queue;
 936         struct bnxt_cp_ring_info *cpr = rxq->cp_ring;
 937         struct bnxt_rx_ring_info *rxr = rxq->rx_ring;
 938         uint16_t rx_raw_prod = rxr->rx_raw_prod;
 939         uint16_t ag_raw_prod = rxr->ag_raw_prod;
 940         uint32_t raw_cons = cpr->cp_raw_cons;
 941         bool alloc_failed = false;
 942         uint32_t cons;
 943         int nb_rx_pkts = 0;
 944         int nb_rep_rx_pkts = 0;
 945         struct rx_pkt_cmpl *rxcmp;
 946         int rc = 0;
 947         bool evt = false;
 948
 949         if (unlikely(is_bnxt_in_error(rxq->bp)))
 950                 return 0;
 951
 952         /* If Rx Q was stopped return */
 953         if (unlikely(!rxq->rx_started))
 954                 return 0;
 955
 956 #if defined(RTE_ARCH_X86) || defined(RTE_ARCH_ARM64)
 957         /*
 958          * Replenish buffers if needed when a transition has been made from
 959          * vector- to non-vector- receive processing.
 960          */
 961         while (unlikely(rxq->rxrearm_nb)) {
 962                 if (!bnxt_alloc_rx_data(rxq, rxr, rxq->rxrearm_start)) {
 963                         rxr->rx_raw_prod = rxq->rxrearm_start;
 964                         bnxt_db_write(&rxr->rx_db, rxr->rx_raw_prod);
 965                         rxq->rxrearm_start++;
 966                         rxq->rxrearm_nb--;
 967                 } else {
 968                         /* Retry allocation on next call. */
 969                         break;
 970                 }
 971         }
 972 #endif
 973
 974         /* Handle RX burst request */
 975         while (1) {
 976                 cons = RING_CMP(cpr->cp_ring_struct, raw_cons);
 977                 rxcmp = (struct rx_pkt_cmpl *)&cpr->cp_desc_ring[cons];
 978
 979                 if (!CMP_VALID(rxcmp, raw_cons, cpr->cp_ring_struct))
 980                         break;
 981                 cpr->valid = FLIP_VALID(cons,
 982                                         cpr->cp_ring_struct->ring_mask,
 983                                         cpr->valid);
 984
 985                 if ((CMP_TYPE(rxcmp) >= CMPL_BASE_TYPE_RX_TPA_START_V2) &&
 986                      (CMP_TYPE(rxcmp) <= RX_TPA_V2_ABUF_CMPL_TYPE_RX_TPA_AGG)) {
 987                         rc = bnxt_rx_pkt(&rx_pkts[nb_rx_pkts], rxq, &raw_cons);
 988                         if (!rc)
 989                                 nb_rx_pkts++;
 990                         else if (rc == -EBUSY)  /* partial completion */
 991                                 break;
 992                         else if (rc == -ENODEV) /* completion for representor */
 993                                 nb_rep_rx_pkts++;
 994                         else if (rc == -ENOMEM) {
 995                                 nb_rx_pkts++;
 996                                 alloc_failed = true;
 997                         }
 998                 } else if (!BNXT_NUM_ASYNC_CPR(rxq->bp)) {
 999                         evt =
1000                         bnxt_event_hwrm_resp_handler(rxq->bp,
1001                                                      (struct cmpl_base *)rxcmp);
1002                         /* If the async event is Fatal error, return */
1003                         if (unlikely(is_bnxt_in_error(rxq->bp)))
1004                                 goto done;
1005                 }
1006
1007                 raw_cons = NEXT_RAW_CMP(raw_cons);
1008                 if (nb_rx_pkts == nb_pkts || nb_rep_rx_pkts == nb_pkts || evt)
1009                         break;
1010                 /* Post some Rx buf early in case of larger burst processing */
1011                 if (nb_rx_pkts == BNXT_RX_POST_THRESH)
1012                         bnxt_db_write(&rxr->rx_db, rxr->rx_raw_prod);
1013         }
1014
1015         cpr->cp_raw_cons = raw_cons;
1016         if (!nb_rx_pkts && !nb_rep_rx_pkts && !evt) {
1017                 /*
1018                  * For PMD, there is no need to keep on pushing to REARM
1019                  * the doorbell if there are no new completions
1020                  */
1021                 goto done;
1022         }
1023
1024         /* Ring the completion queue doorbell. */
1025         bnxt_db_cq(cpr);
1026
1027         /* Ring the receive descriptor doorbell. */
1028         if (rx_raw_prod != rxr->rx_raw_prod)
1029                 bnxt_db_write(&rxr->rx_db, rxr->rx_raw_prod);
1030
1031         /* Ring the AGG ring DB */
1032         if (ag_raw_prod != rxr->ag_raw_prod)
1033                 bnxt_db_write(&rxr->ag_db, rxr->ag_raw_prod);
1034
1035         /* Attempt to alloc Rx buf in case of a previous allocation failure. */
1036         if (alloc_failed) {
1037                 uint16_t cnt;
1038
1039                 rx_raw_prod = RING_NEXT(rx_raw_prod);
1040                 for (cnt = 0; cnt < nb_rx_pkts + nb_rep_rx_pkts; cnt++) {
1041                         struct rte_mbuf **rx_buf;
1042                         uint16_t ndx;
1043
1044                         ndx = RING_IDX(rxr->rx_ring_struct, rx_raw_prod + cnt);
1045                         rx_buf = &rxr->rx_buf_ring[ndx];
1046
1047                         /* Buffer already allocated for this index. */
1048                         if (*rx_buf != NULL && *rx_buf != &rxq->fake_mbuf)
1049                                 continue;
1050
1051                         /* This slot is empty. Alloc buffer for Rx */
1052                         if (!bnxt_alloc_rx_data(rxq, rxr, rx_raw_prod + cnt)) {
1053                                 rxr->rx_raw_prod = rx_raw_prod + cnt;
1054                                 bnxt_db_write(&rxr->rx_db, rxr->rx_raw_prod);
1055                         } else {
1056                                 PMD_DRV_LOG(ERR, "Alloc  mbuf failed\n");
1057                                 break;
1058                         }
1059                 }
1060         }
1061
1062 done:
1063         return nb_rx_pkts;
1064 }
1065
1066 /*
1067  * Dummy DPDK callback for RX.
1068  *
1069  * This function is used to temporarily replace the real callback during
1070  * unsafe control operations on the queue, or in case of error.
1071  */
1072 uint16_t
1073 bnxt_dummy_recv_pkts(void *rx_queue __rte_unused,
1074                      struct rte_mbuf **rx_pkts __rte_unused,
1075                      uint16_t nb_pkts __rte_unused)
1076 {
1077         return 0;
1078 }
1079
1080 void bnxt_free_rx_rings(struct bnxt *bp)
1081 {
1082         int i;
1083         struct bnxt_rx_queue *rxq;
1084
1085         if (!bp->rx_queues)
1086                 return;
1087
1088         for (i = 0; i < (int)bp->rx_nr_rings; i++) {
1089                 rxq = bp->rx_queues[i];
1090                 if (!rxq)
1091                         continue;
1092
1093                 bnxt_free_ring(rxq->rx_ring->rx_ring_struct);
1094                 rte_free(rxq->rx_ring->rx_ring_struct);
1095
1096                 /* Free the Aggregator ring */
1097                 bnxt_free_ring(rxq->rx_ring->ag_ring_struct);
1098                 rte_free(rxq->rx_ring->ag_ring_struct);
1099                 rxq->rx_ring->ag_ring_struct = NULL;
1100
1101                 rte_free(rxq->rx_ring);
1102
1103                 bnxt_free_ring(rxq->cp_ring->cp_ring_struct);
1104                 rte_free(rxq->cp_ring->cp_ring_struct);
1105                 rte_free(rxq->cp_ring);
1106
1107                 rte_free(rxq);
1108                 bp->rx_queues[i] = NULL;
1109         }
1110 }
1111
1112 int bnxt_init_rx_ring_struct(struct bnxt_rx_queue *rxq, unsigned int socket_id)
1113 {
1114         struct rte_eth_dev *eth_dev = rxq->bp->eth_dev;
1115         struct rte_eth_rxmode *rxmode;
1116         struct bnxt_cp_ring_info *cpr;
1117         struct bnxt_rx_ring_info *rxr;
1118         struct bnxt_ring *ring;
1119         bool use_agg_ring;
1120
1121         rxq->rx_buf_size = BNXT_MAX_PKT_LEN + sizeof(struct rte_mbuf);
1122
1123         rxr = rte_zmalloc_socket("bnxt_rx_ring",
1124                                  sizeof(struct bnxt_rx_ring_info),
1125                                  RTE_CACHE_LINE_SIZE, socket_id);
1126         if (rxr == NULL)
1127                 return -ENOMEM;
1128         rxq->rx_ring = rxr;
1129
1130         ring = rte_zmalloc_socket("bnxt_rx_ring_struct",
1131                                    sizeof(struct bnxt_ring),
1132                                    RTE_CACHE_LINE_SIZE, socket_id);
1133         if (ring == NULL)
1134                 return -ENOMEM;
1135         rxr->rx_ring_struct = ring;
1136         ring->ring_size = rte_align32pow2(rxq->nb_rx_desc);
1137         ring->ring_mask = ring->ring_size - 1;
1138         ring->bd = (void *)rxr->rx_desc_ring;
1139         ring->bd_dma = rxr->rx_desc_mapping;
1140
1141         /* Allocate extra rx ring entries for vector rx. */
1142         ring->vmem_size = sizeof(struct rte_mbuf *) *
1143                                 (ring->ring_size + RTE_BNXT_DESCS_PER_LOOP);
1144
1145         ring->vmem = (void **)&rxr->rx_buf_ring;
1146         ring->fw_ring_id = INVALID_HW_RING_ID;
1147
1148         cpr = rte_zmalloc_socket("bnxt_rx_ring",
1149                                  sizeof(struct bnxt_cp_ring_info),
1150                                  RTE_CACHE_LINE_SIZE, socket_id);
1151         if (cpr == NULL)
1152                 return -ENOMEM;
1153         rxq->cp_ring = cpr;
1154
1155         ring = rte_zmalloc_socket("bnxt_rx_ring_struct",
1156                                    sizeof(struct bnxt_ring),
1157                                    RTE_CACHE_LINE_SIZE, socket_id);
1158         if (ring == NULL)
1159                 return -ENOMEM;
1160         cpr->cp_ring_struct = ring;
1161
1162         rxmode = &eth_dev->data->dev_conf.rxmode;
1163         use_agg_ring = (rxmode->offloads & DEV_RX_OFFLOAD_SCATTER) ||
1164                        (rxmode->offloads & DEV_RX_OFFLOAD_TCP_LRO) ||
1165                        (rxmode->max_rx_pkt_len >
1166                          (uint32_t)(rte_pktmbuf_data_room_size(rxq->mb_pool) -
1167                                     RTE_PKTMBUF_HEADROOM));
1168
1169         /* Allocate two completion slots per entry in desc ring. */
1170         ring->ring_size = rxr->rx_ring_struct->ring_size * 2;
1171
1172         /* Allocate additional slots if aggregation ring is in use. */
1173         if (use_agg_ring)
1174                 ring->ring_size *= AGG_RING_SIZE_FACTOR;
1175
1176         ring->ring_size = rte_align32pow2(ring->ring_size);
1177         ring->ring_mask = ring->ring_size - 1;
1178         ring->bd = (void *)cpr->cp_desc_ring;
1179         ring->bd_dma = cpr->cp_desc_mapping;
1180         ring->vmem_size = 0;
1181         ring->vmem = NULL;
1182         ring->fw_ring_id = INVALID_HW_RING_ID;
1183
1184         /* Allocate Aggregator rings */
1185         ring = rte_zmalloc_socket("bnxt_rx_ring_struct",
1186                                    sizeof(struct bnxt_ring),
1187                                    RTE_CACHE_LINE_SIZE, socket_id);
1188         if (ring == NULL)
1189                 return -ENOMEM;
1190         rxr->ag_ring_struct = ring;
1191         ring->ring_size = rte_align32pow2(rxq->nb_rx_desc *
1192                                           AGG_RING_SIZE_FACTOR);
1193         ring->ring_mask = ring->ring_size - 1;
1194         ring->bd = (void *)rxr->ag_desc_ring;
1195         ring->bd_dma = rxr->ag_desc_mapping;
1196         ring->vmem_size = ring->ring_size * sizeof(struct rte_mbuf *);
1197         ring->vmem = (void **)&rxr->ag_buf_ring;
1198         ring->fw_ring_id = INVALID_HW_RING_ID;
1199
1200         return 0;
1201 }
1202
1203 static void bnxt_init_rxbds(struct bnxt_ring *ring, uint32_t type,
1204                             uint16_t len)
1205 {
1206         uint32_t j;
1207         struct rx_prod_pkt_bd *rx_bd_ring = (struct rx_prod_pkt_bd *)ring->bd;
1208
1209         if (!rx_bd_ring)
1210                 return;
1211         for (j = 0; j < ring->ring_size; j++) {
1212                 rx_bd_ring[j].flags_type = rte_cpu_to_le_16(type);
1213                 rx_bd_ring[j].len = rte_cpu_to_le_16(len);
1214                 rx_bd_ring[j].opaque = j;
1215         }
1216 }
1217
1218 int bnxt_init_one_rx_ring(struct bnxt_rx_queue *rxq)
1219 {
1220         struct bnxt_rx_ring_info *rxr;
1221         struct bnxt_ring *ring;
1222         uint32_t raw_prod, type;
1223         unsigned int i;
1224         uint16_t size;
1225
1226         /* Initialize packet type table. */
1227         bnxt_init_ptype_table();
1228
1229         size = rte_pktmbuf_data_room_size(rxq->mb_pool) - RTE_PKTMBUF_HEADROOM;
1230         size = RTE_MIN(BNXT_MAX_PKT_LEN, size);
1231
1232         type = RX_PROD_PKT_BD_TYPE_RX_PROD_PKT;
1233
1234         rxr = rxq->rx_ring;
1235         ring = rxr->rx_ring_struct;
1236         bnxt_init_rxbds(ring, type, size);
1237
1238         /* Initialize offload flags parsing table. */
1239         bnxt_init_ol_flags_tables(rxq);
1240
1241         raw_prod = rxr->rx_raw_prod;
1242         for (i = 0; i < ring->ring_size; i++) {
1243                 if (unlikely(!rxr->rx_buf_ring[i])) {
1244                         if (bnxt_alloc_rx_data(rxq, rxr, raw_prod) != 0) {
1245                                 PMD_DRV_LOG(WARNING,
1246                                             "init'ed rx ring %d with %d/%d mbufs only\n",
1247                                             rxq->queue_id, i, ring->ring_size);
1248                                 break;
1249                         }
1250                 }
1251                 rxr->rx_raw_prod = raw_prod;
1252                 raw_prod = RING_NEXT(raw_prod);
1253         }
1254
1255         /* Initialize dummy mbuf pointers for vector mode rx. */
1256         for (i = ring->ring_size;
1257              i < ring->ring_size + RTE_BNXT_DESCS_PER_LOOP; i++) {
1258                 rxr->rx_buf_ring[i] = &rxq->fake_mbuf;
1259         }
1260
1261         ring = rxr->ag_ring_struct;
1262         type = RX_PROD_AGG_BD_TYPE_RX_PROD_AGG;
1263         bnxt_init_rxbds(ring, type, size);
1264         raw_prod = rxr->ag_raw_prod;
1265
1266         for (i = 0; i < ring->ring_size; i++) {
1267                 if (unlikely(!rxr->ag_buf_ring[i])) {
1268                         if (bnxt_alloc_ag_data(rxq, rxr, raw_prod) != 0) {
1269                                 PMD_DRV_LOG(WARNING,
1270                                             "init'ed AG ring %d with %d/%d mbufs only\n",
1271                                             rxq->queue_id, i, ring->ring_size);
1272                                 break;
1273                         }
1274                 }
1275                 rxr->ag_raw_prod = raw_prod;
1276                 raw_prod = RING_NEXT(raw_prod);
1277         }
1278         PMD_DRV_LOG(DEBUG, "AGG Done!\n");
1279
1280         if (rxr->tpa_info) {
1281                 unsigned int max_aggs = BNXT_TPA_MAX_AGGS(rxq->bp);
1282
1283                 for (i = 0; i < max_aggs; i++) {
1284                         if (unlikely(!rxr->tpa_info[i].mbuf)) {
1285                                 rxr->tpa_info[i].mbuf =
1286                                         __bnxt_alloc_rx_data(rxq->mb_pool);
1287                                 if (!rxr->tpa_info[i].mbuf) {
1288                                         rte_atomic64_inc(&rxq->rx_mbuf_alloc_fail);
1289                                         return -ENOMEM;
1290                                 }
1291                         }
1292                 }
1293         }
1294         PMD_DRV_LOG(DEBUG, "TPA alloc Done!\n");
1295
1296         return 0;
1297 }