drivers/net/bnxt/bnxt_rxr.c

   1 /* SPDX-License-Identifier: BSD-3-Clause
   2  * Copyright(c) 2014-2018 Broadcom
   3  * All rights reserved.
   4  */
   5
   6 #include <inttypes.h>
   7 #include <stdbool.h>
   8
   9 #include <rte_bitmap.h>
  10 #include <rte_byteorder.h>
  11 #include <rte_malloc.h>
  12 #include <rte_memory.h>
  13
  14 #include "bnxt.h"
  15 #include "bnxt_reps.h"
  16 #include "bnxt_ring.h"
  17 #include "bnxt_rxr.h"
  18 #include "bnxt_rxq.h"
  19 #include "hsi_struct_def_dpdk.h"
  20 #ifdef RTE_LIBRTE_IEEE1588
  21 #include "bnxt_hwrm.h"
  22 #endif
  23
  24 #include <bnxt_tf_common.h>
  25 #include <ulp_mark_mgr.h>
  26
  27 /*
  28  * RX Ring handling
  29  */
  30
  31 static inline struct rte_mbuf *__bnxt_alloc_rx_data(struct rte_mempool *mb)
  32 {
  33         struct rte_mbuf *data;
  34
  35         data = rte_mbuf_raw_alloc(mb);
  36
  37         return data;
  38 }
  39
  40 static inline int bnxt_alloc_rx_data(struct bnxt_rx_queue *rxq,
  41                                      struct bnxt_rx_ring_info *rxr,
  42                                      uint16_t prod)
  43 {
  44         struct rx_prod_pkt_bd *rxbd = &rxr->rx_desc_ring[prod];
  45         struct rte_mbuf **rx_buf = &rxr->rx_buf_ring[prod];
  46         struct rte_mbuf *mbuf;
  47
  48         mbuf = __bnxt_alloc_rx_data(rxq->mb_pool);
  49         if (!mbuf) {
  50                 rte_atomic64_inc(&rxq->rx_mbuf_alloc_fail);
  51                 return -ENOMEM;
  52         }
  53
  54         *rx_buf = mbuf;
  55         mbuf->data_off = RTE_PKTMBUF_HEADROOM;
  56
  57         rxbd->address = rte_cpu_to_le_64(rte_mbuf_data_iova_default(mbuf));
  58
  59         return 0;
  60 }
  61
  62 static inline int bnxt_alloc_ag_data(struct bnxt_rx_queue *rxq,
  63                                      struct bnxt_rx_ring_info *rxr,
  64                                      uint16_t prod)
  65 {
  66         struct rx_prod_pkt_bd *rxbd = &rxr->ag_desc_ring[prod];
  67         struct rte_mbuf **rx_buf = &rxr->ag_buf_ring[prod];
  68         struct rte_mbuf *mbuf;
  69
  70         if (rxbd == NULL) {
  71                 PMD_DRV_LOG(ERR, "Jumbo Frame. rxbd is NULL\n");
  72                 return -EINVAL;
  73         }
  74
  75         if (rx_buf == NULL) {
  76                 PMD_DRV_LOG(ERR, "Jumbo Frame. rx_buf is NULL\n");
  77                 return -EINVAL;
  78         }
  79
  80         mbuf = __bnxt_alloc_rx_data(rxq->mb_pool);
  81         if (!mbuf) {
  82                 rte_atomic64_inc(&rxq->rx_mbuf_alloc_fail);
  83                 return -ENOMEM;
  84         }
  85
  86         *rx_buf = mbuf;
  87         mbuf->data_off = RTE_PKTMBUF_HEADROOM;
  88
  89         rxbd->address = rte_cpu_to_le_64(rte_mbuf_data_iova_default(mbuf));
  90
  91         return 0;
  92 }
  93
  94 static inline void bnxt_reuse_rx_mbuf(struct bnxt_rx_ring_info *rxr,
  95                                struct rte_mbuf *mbuf)
  96 {
  97         uint16_t prod = RING_NEXT(rxr->rx_ring_struct, rxr->rx_prod);
  98         struct rte_mbuf **prod_rx_buf;
  99         struct rx_prod_pkt_bd *prod_bd;
 100
 101         prod_rx_buf = &rxr->rx_buf_ring[prod];
 102
 103         RTE_ASSERT(*prod_rx_buf == NULL);
 104         RTE_ASSERT(mbuf != NULL);
 105
 106         *prod_rx_buf = mbuf;
 107
 108         prod_bd = &rxr->rx_desc_ring[prod];
 109
 110         prod_bd->address = rte_cpu_to_le_64(rte_mbuf_data_iova_default(mbuf));
 111
 112         rxr->rx_prod = prod;
 113 }
 114
 115 static inline
 116 struct rte_mbuf *bnxt_consume_rx_buf(struct bnxt_rx_ring_info *rxr,
 117                                      uint16_t cons)
 118 {
 119         struct rte_mbuf **cons_rx_buf;
 120         struct rte_mbuf *mbuf;
 121
 122         cons_rx_buf = &rxr->rx_buf_ring[cons];
 123         RTE_ASSERT(*cons_rx_buf != NULL);
 124         mbuf = *cons_rx_buf;
 125         *cons_rx_buf = NULL;
 126
 127         return mbuf;
 128 }
 129
 130 static void bnxt_tpa_start(struct bnxt_rx_queue *rxq,
 131                            struct rx_tpa_start_cmpl *tpa_start,
 132                            struct rx_tpa_start_cmpl_hi *tpa_start1)
 133 {
 134         struct bnxt_rx_ring_info *rxr = rxq->rx_ring;
 135         uint16_t agg_id;
 136         uint16_t data_cons;
 137         struct bnxt_tpa_info *tpa_info;
 138         struct rte_mbuf *mbuf;
 139
 140         agg_id = bnxt_tpa_start_agg_id(rxq->bp, tpa_start);
 141
 142         data_cons = tpa_start->opaque;
 143         tpa_info = &rxr->tpa_info[agg_id];
 144
 145         mbuf = bnxt_consume_rx_buf(rxr, data_cons);
 146
 147         bnxt_reuse_rx_mbuf(rxr, tpa_info->mbuf);
 148
 149         tpa_info->agg_count = 0;
 150         tpa_info->mbuf = mbuf;
 151         tpa_info->len = rte_le_to_cpu_32(tpa_start->len);
 152
 153         mbuf->nb_segs = 1;
 154         mbuf->next = NULL;
 155         mbuf->pkt_len = rte_le_to_cpu_32(tpa_start->len);
 156         mbuf->data_len = mbuf->pkt_len;
 157         mbuf->port = rxq->port_id;
 158         mbuf->ol_flags = PKT_RX_LRO;
 159         if (likely(tpa_start->flags_type &
 160                    rte_cpu_to_le_32(RX_TPA_START_CMPL_FLAGS_RSS_VALID))) {
 161                 mbuf->hash.rss = rte_le_to_cpu_32(tpa_start->rss_hash);
 162                 mbuf->ol_flags |= PKT_RX_RSS_HASH;
 163         } else {
 164                 mbuf->hash.fdir.id = rte_le_to_cpu_16(tpa_start1->cfa_code);
 165                 mbuf->ol_flags |= PKT_RX_FDIR | PKT_RX_FDIR_ID;
 166         }
 167         if (tpa_start1->flags2 &
 168             rte_cpu_to_le_32(RX_TPA_START_CMPL_FLAGS2_META_FORMAT_VLAN)) {
 169                 mbuf->vlan_tci = rte_le_to_cpu_32(tpa_start1->metadata);
 170                 mbuf->ol_flags |= PKT_RX_VLAN | PKT_RX_VLAN_STRIPPED;
 171         }
 172         if (likely(tpa_start1->flags2 &
 173                    rte_cpu_to_le_32(RX_TPA_START_CMPL_FLAGS2_L4_CS_CALC)))
 174                 mbuf->ol_flags |= PKT_RX_L4_CKSUM_GOOD;
 175
 176         /* recycle next mbuf */
 177         data_cons = RING_NEXT(rxr->rx_ring_struct, data_cons);
 178         bnxt_reuse_rx_mbuf(rxr, bnxt_consume_rx_buf(rxr, data_cons));
 179 }
 180
 181 static int bnxt_agg_bufs_valid(struct bnxt_cp_ring_info *cpr,
 182                 uint8_t agg_bufs, uint32_t raw_cp_cons)
 183 {
 184         uint16_t last_cp_cons;
 185         struct rx_pkt_cmpl *agg_cmpl;
 186
 187         raw_cp_cons = ADV_RAW_CMP(raw_cp_cons, agg_bufs);
 188         last_cp_cons = RING_CMP(cpr->cp_ring_struct, raw_cp_cons);
 189         agg_cmpl = (struct rx_pkt_cmpl *)&cpr->cp_desc_ring[last_cp_cons];
 190         cpr->valid = FLIP_VALID(raw_cp_cons,
 191                                 cpr->cp_ring_struct->ring_mask,
 192                                 cpr->valid);
 193         return CMP_VALID(agg_cmpl, raw_cp_cons, cpr->cp_ring_struct);
 194 }
 195
 196 /* TPA consume agg buffer out of order, allocate connected data only */
 197 static int bnxt_prod_ag_mbuf(struct bnxt_rx_queue *rxq)
 198 {
 199         struct bnxt_rx_ring_info *rxr = rxq->rx_ring;
 200         uint16_t next = RING_NEXT(rxr->ag_ring_struct, rxr->ag_prod);
 201
 202         /* TODO batch allocation for better performance */
 203         while (rte_bitmap_get(rxr->ag_bitmap, next)) {
 204                 if (unlikely(bnxt_alloc_ag_data(rxq, rxr, next))) {
 205                         PMD_DRV_LOG(ERR,
 206                                 "agg mbuf alloc failed: prod=0x%x\n", next);
 207                         break;
 208                 }
 209                 rte_bitmap_clear(rxr->ag_bitmap, next);
 210                 rxr->ag_prod = next;
 211                 next = RING_NEXT(rxr->ag_ring_struct, next);
 212         }
 213
 214         return 0;
 215 }
 216
 217 static int bnxt_rx_pages(struct bnxt_rx_queue *rxq,
 218                          struct rte_mbuf *mbuf, uint32_t *tmp_raw_cons,
 219                          uint8_t agg_buf, struct bnxt_tpa_info *tpa_info)
 220 {
 221         struct bnxt_cp_ring_info *cpr = rxq->cp_ring;
 222         struct bnxt_rx_ring_info *rxr = rxq->rx_ring;
 223         int i;
 224         uint16_t cp_cons, ag_cons;
 225         struct rx_pkt_cmpl *rxcmp;
 226         struct rte_mbuf *last = mbuf;
 227         bool is_thor_tpa = tpa_info && BNXT_CHIP_THOR(rxq->bp);
 228
 229         for (i = 0; i < agg_buf; i++) {
 230                 struct rte_mbuf **ag_buf;
 231                 struct rte_mbuf *ag_mbuf;
 232
 233                 if (is_thor_tpa) {
 234                         rxcmp = (void *)&tpa_info->agg_arr[i];
 235                 } else {
 236                         *tmp_raw_cons = NEXT_RAW_CMP(*tmp_raw_cons);
 237                         cp_cons = RING_CMP(cpr->cp_ring_struct, *tmp_raw_cons);
 238                         rxcmp = (struct rx_pkt_cmpl *)
 239                                         &cpr->cp_desc_ring[cp_cons];
 240                 }
 241
 242 #ifdef BNXT_DEBUG
 243                 bnxt_dump_cmpl(cp_cons, rxcmp);
 244 #endif
 245
 246                 ag_cons = rxcmp->opaque;
 247                 RTE_ASSERT(ag_cons <= rxr->ag_ring_struct->ring_mask);
 248                 ag_buf = &rxr->ag_buf_ring[ag_cons];
 249                 ag_mbuf = *ag_buf;
 250                 RTE_ASSERT(ag_mbuf != NULL);
 251
 252                 ag_mbuf->data_len = rte_le_to_cpu_16(rxcmp->len);
 253
 254                 mbuf->nb_segs++;
 255                 mbuf->pkt_len += ag_mbuf->data_len;
 256
 257                 last->next = ag_mbuf;
 258                 last = ag_mbuf;
 259
 260                 *ag_buf = NULL;
 261
 262                 /*
 263                  * As aggregation buffer consumed out of order in TPA module,
 264                  * use bitmap to track freed slots to be allocated and notified
 265                  * to NIC
 266                  */
 267                 rte_bitmap_set(rxr->ag_bitmap, ag_cons);
 268         }
 269         bnxt_prod_ag_mbuf(rxq);
 270         return 0;
 271 }
 272
 273 static inline struct rte_mbuf *bnxt_tpa_end(
 274                 struct bnxt_rx_queue *rxq,
 275                 uint32_t *raw_cp_cons,
 276                 struct rx_tpa_end_cmpl *tpa_end,
 277                 struct rx_tpa_end_cmpl_hi *tpa_end1)
 278 {
 279         struct bnxt_cp_ring_info *cpr = rxq->cp_ring;
 280         struct bnxt_rx_ring_info *rxr = rxq->rx_ring;
 281         uint16_t agg_id;
 282         struct rte_mbuf *mbuf;
 283         uint8_t agg_bufs;
 284         uint8_t payload_offset;
 285         struct bnxt_tpa_info *tpa_info;
 286
 287         if (BNXT_CHIP_THOR(rxq->bp)) {
 288                 struct rx_tpa_v2_end_cmpl *th_tpa_end;
 289                 struct rx_tpa_v2_end_cmpl_hi *th_tpa_end1;
 290
 291                 th_tpa_end = (void *)tpa_end;
 292                 th_tpa_end1 = (void *)tpa_end1;
 293                 agg_id = BNXT_TPA_END_AGG_ID_TH(th_tpa_end);
 294                 agg_bufs = BNXT_TPA_END_AGG_BUFS_TH(th_tpa_end1);
 295                 payload_offset = th_tpa_end1->payload_offset;
 296         } else {
 297                 agg_id = BNXT_TPA_END_AGG_ID(tpa_end);
 298                 agg_bufs = BNXT_TPA_END_AGG_BUFS(tpa_end);
 299                 if (!bnxt_agg_bufs_valid(cpr, agg_bufs, *raw_cp_cons))
 300                         return NULL;
 301                 payload_offset = tpa_end->payload_offset;
 302         }
 303
 304         tpa_info = &rxr->tpa_info[agg_id];
 305         mbuf = tpa_info->mbuf;
 306         RTE_ASSERT(mbuf != NULL);
 307
 308         rte_prefetch0(mbuf);
 309         if (agg_bufs) {
 310                 bnxt_rx_pages(rxq, mbuf, raw_cp_cons, agg_bufs, tpa_info);
 311         }
 312         mbuf->l4_len = payload_offset;
 313
 314         struct rte_mbuf *new_data = __bnxt_alloc_rx_data(rxq->mb_pool);
 315         RTE_ASSERT(new_data != NULL);
 316         if (!new_data) {
 317                 rte_atomic64_inc(&rxq->rx_mbuf_alloc_fail);
 318                 return NULL;
 319         }
 320         tpa_info->mbuf = new_data;
 321
 322         return mbuf;
 323 }
 324
 325 static uint32_t
 326 bnxt_parse_pkt_type(struct rx_pkt_cmpl *rxcmp, struct rx_pkt_cmpl_hi *rxcmp1)
 327 {
 328         uint32_t l3, pkt_type = 0;
 329         uint32_t t_ipcs = 0, ip6 = 0, vlan = 0;
 330         uint32_t flags_type;
 331
 332         vlan = !!(rxcmp1->flags2 &
 333                 rte_cpu_to_le_32(RX_PKT_CMPL_FLAGS2_META_FORMAT_VLAN));
 334         pkt_type |= vlan ? RTE_PTYPE_L2_ETHER_VLAN : RTE_PTYPE_L2_ETHER;
 335
 336         t_ipcs = !!(rxcmp1->flags2 &
 337                 rte_cpu_to_le_32(RX_PKT_CMPL_FLAGS2_T_IP_CS_CALC));
 338         ip6 = !!(rxcmp1->flags2 &
 339                  rte_cpu_to_le_32(RX_PKT_CMPL_FLAGS2_IP_TYPE));
 340
 341         flags_type = rxcmp->flags_type &
 342                 rte_cpu_to_le_32(RX_PKT_CMPL_FLAGS_ITYPE_MASK);
 343
 344         if (!t_ipcs && !ip6)
 345                 l3 = RTE_PTYPE_L3_IPV4_EXT_UNKNOWN;
 346         else if (!t_ipcs && ip6)
 347                 l3 = RTE_PTYPE_L3_IPV6_EXT_UNKNOWN;
 348         else if (t_ipcs && !ip6)
 349                 l3 = RTE_PTYPE_INNER_L3_IPV4_EXT_UNKNOWN;
 350         else
 351                 l3 = RTE_PTYPE_INNER_L3_IPV6_EXT_UNKNOWN;
 352
 353         switch (flags_type) {
 354         case RTE_LE32(RX_PKT_CMPL_FLAGS_ITYPE_ICMP):
 355                 if (!t_ipcs)
 356                         pkt_type |= l3 | RTE_PTYPE_L4_ICMP;
 357                 else
 358                         pkt_type |= l3 | RTE_PTYPE_INNER_L4_ICMP;
 359                 break;
 360
 361         case RTE_LE32(RX_PKT_CMPL_FLAGS_ITYPE_TCP):
 362                 if (!t_ipcs)
 363                         pkt_type |= l3 | RTE_PTYPE_L4_TCP;
 364                 else
 365                         pkt_type |= l3 | RTE_PTYPE_INNER_L4_TCP;
 366                 break;
 367
 368         case RTE_LE32(RX_PKT_CMPL_FLAGS_ITYPE_UDP):
 369                 if (!t_ipcs)
 370                         pkt_type |= l3 | RTE_PTYPE_L4_UDP;
 371                 else
 372                         pkt_type |= l3 | RTE_PTYPE_INNER_L4_UDP;
 373                 break;
 374
 375         case RTE_LE32(RX_PKT_CMPL_FLAGS_ITYPE_IP):
 376                 pkt_type |= l3;
 377                 break;
 378         }
 379
 380         return pkt_type;
 381 }
 382
 383 #ifdef RTE_LIBRTE_IEEE1588
 384 static void
 385 bnxt_get_rx_ts_thor(struct bnxt *bp, uint32_t rx_ts_cmpl)
 386 {
 387         uint64_t systime_cycles = 0;
 388
 389         if (!BNXT_CHIP_THOR(bp))
 390                 return;
 391
 392         /* On Thor, Rx timestamps are provided directly in the
 393          * Rx completion records to the driver. Only 32 bits of
 394          * the timestamp is present in the completion. Driver needs
 395          * to read the current 48 bit free running timer using the
 396          * HWRM_PORT_TS_QUERY command and combine the upper 16 bits
 397          * from the HWRM response with the lower 32 bits in the
 398          * Rx completion to produce the 48 bit timestamp for the Rx packet
 399          */
 400         bnxt_hwrm_port_ts_query(bp, BNXT_PTP_FLAGS_CURRENT_TIME,
 401                                 &systime_cycles);
 402         bp->ptp_cfg->rx_timestamp = (systime_cycles & 0xFFFF00000000);
 403         bp->ptp_cfg->rx_timestamp |= rx_ts_cmpl;
 404 }
 405 #endif
 406
 407 static uint32_t
 408 bnxt_ulp_set_mark_in_mbuf(struct bnxt *bp, struct rx_pkt_cmpl_hi *rxcmp1,
 409                           struct rte_mbuf *mbuf, uint32_t *vfr_flag)
 410 {
 411         uint32_t cfa_code;
 412         uint32_t meta_fmt;
 413         uint32_t meta;
 414         bool gfid = false;
 415         uint32_t mark_id;
 416         uint32_t flags2;
 417         uint32_t gfid_support = 0;
 418         int rc;
 419
 420         if (BNXT_GFID_ENABLED(bp))
 421                 gfid_support = 1;
 422
 423         cfa_code = rte_le_to_cpu_16(rxcmp1->cfa_code);
 424         flags2 = rte_le_to_cpu_32(rxcmp1->flags2);
 425         meta = rte_le_to_cpu_32(rxcmp1->metadata);
 426
 427         /*
 428          * The flags field holds extra bits of info from [6:4]
 429          * which indicate if the flow is in TCAM or EM or EEM
 430          */
 431         meta_fmt = (flags2 & BNXT_CFA_META_FMT_MASK) >>
 432                 BNXT_CFA_META_FMT_SHFT;
 433
 434         switch (meta_fmt) {
 435         case 0:
 436                 if (gfid_support) {
 437                         /* Not an LFID or GFID, a flush cmd. */
 438                         goto skip_mark;
 439                 } else {
 440                         /* LFID mode, no vlan scenario */
 441                         gfid = false;
 442                 }
 443                 break;
 444         case 4:
 445         case 5:
 446                 /*
 447                  * EM/TCAM case
 448                  * Assume that EM doesn't support Mark due to GFID
 449                  * collisions with EEM.  Simply return without setting the mark
 450                  * in the mbuf.
 451                  */
 452                 if (BNXT_CFA_META_EM_TEST(meta)) {
 453                         /*This is EM hit {EM(1), GFID[27:16], 19'd0 or vtag } */
 454                         gfid = true;
 455                         meta >>= BNXT_RX_META_CFA_CODE_SHIFT;
 456                         cfa_code |= meta << BNXT_CFA_CODE_META_SHIFT;
 457                 } else {
 458                         /*
 459                          * It is a TCAM entry, so it is an LFID.
 460                          * The TCAM IDX and Mode can also be determined
 461                          * by decoding the meta_data. We are not
 462                          * using these for now.
 463                          */
 464                 }
 465                 break;
 466         case 6:
 467         case 7:
 468                 /* EEM Case, only using gfid in EEM for now. */
 469                 gfid = true;
 470
 471                 /*
 472                  * For EEM flows, The first part of cfa_code is 16 bits.
 473                  * The second part is embedded in the
 474                  * metadata field from bit 19 onwards. The driver needs to
 475                  * ignore the first 19 bits of metadata and use the next 12
 476                  * bits as higher 12 bits of cfa_code.
 477                  */
 478                 meta >>= BNXT_RX_META_CFA_CODE_SHIFT;
 479                 cfa_code |= meta << BNXT_CFA_CODE_META_SHIFT;
 480                 break;
 481         default:
 482                 /* For other values, the cfa_code is assumed to be an LFID. */
 483                 break;
 484         }
 485
 486         rc = ulp_mark_db_mark_get(bp->ulp_ctx, gfid,
 487                                   cfa_code, vfr_flag, &mark_id);
 488         if (!rc) {
 489                 /* VF to VFR Rx path. So, skip mark_id injection in mbuf */
 490                 if (vfr_flag && *vfr_flag)
 491                         return mark_id;
 492                 /* Got the mark, write it to the mbuf and return */
 493                 mbuf->hash.fdir.hi = mark_id;
 494                 mbuf->udata64 = (cfa_code & 0xffffffffull) << 32;
 495                 mbuf->hash.fdir.id = rxcmp1->cfa_code;
 496                 mbuf->ol_flags |= PKT_RX_FDIR | PKT_RX_FDIR_ID;
 497                 return mark_id;
 498         }
 499
 500 skip_mark:
 501         mbuf->hash.fdir.hi = 0;
 502         mbuf->hash.fdir.id = 0;
 503
 504         return 0;
 505 }
 506
 507 void bnxt_set_mark_in_mbuf(struct bnxt *bp,
 508                            struct rx_pkt_cmpl_hi *rxcmp1,
 509                            struct rte_mbuf *mbuf)
 510 {
 511         uint32_t cfa_code = 0;
 512         uint8_t meta_fmt = 0;
 513         uint16_t flags2 = 0;
 514         uint32_t meta =  0;
 515
 516         cfa_code = rte_le_to_cpu_16(rxcmp1->cfa_code);
 517         if (!cfa_code)
 518                 return;
 519
 520         if (cfa_code && !bp->mark_table[cfa_code].valid)
 521                 return;
 522
 523         flags2 = rte_le_to_cpu_16(rxcmp1->flags2);
 524         meta = rte_le_to_cpu_32(rxcmp1->metadata);
 525         if (meta) {
 526                 meta >>= BNXT_RX_META_CFA_CODE_SHIFT;
 527
 528                 /* The flags field holds extra bits of info from [6:4]
 529                  * which indicate if the flow is in TCAM or EM or EEM
 530                  */
 531                 meta_fmt = (flags2 & BNXT_CFA_META_FMT_MASK) >>
 532                            BNXT_CFA_META_FMT_SHFT;
 533
 534                 /* meta_fmt == 4 => 'b100 => 'b10x => EM.
 535                  * meta_fmt == 5 => 'b101 => 'b10x => EM + VLAN
 536                  * meta_fmt == 6 => 'b110 => 'b11x => EEM
 537                  * meta_fmt == 7 => 'b111 => 'b11x => EEM + VLAN.
 538                  */
 539                 meta_fmt >>= BNXT_CFA_META_FMT_EM_EEM_SHFT;
 540         }
 541
 542         mbuf->hash.fdir.hi = bp->mark_table[cfa_code].mark_id;
 543         mbuf->ol_flags |= PKT_RX_FDIR | PKT_RX_FDIR_ID;
 544 }
 545
 546 static int bnxt_rx_pkt(struct rte_mbuf **rx_pkt,
 547                        struct bnxt_rx_queue *rxq, uint32_t *raw_cons)
 548 {
 549         struct bnxt_cp_ring_info *cpr = rxq->cp_ring;
 550         struct bnxt_rx_ring_info *rxr = rxq->rx_ring;
 551         struct rx_pkt_cmpl *rxcmp;
 552         struct rx_pkt_cmpl_hi *rxcmp1;
 553         uint32_t tmp_raw_cons = *raw_cons;
 554         uint16_t cons, prod, cp_cons =
 555             RING_CMP(cpr->cp_ring_struct, tmp_raw_cons);
 556         struct rte_mbuf *mbuf;
 557         int rc = 0;
 558         uint8_t agg_buf = 0;
 559         uint16_t cmp_type;
 560         uint32_t flags2_f = 0, vfr_flag = 0, mark_id = 0;
 561         uint16_t flags_type;
 562         struct bnxt *bp = rxq->bp;
 563
 564         rxcmp = (struct rx_pkt_cmpl *)
 565             &cpr->cp_desc_ring[cp_cons];
 566
 567         cmp_type = CMP_TYPE(rxcmp);
 568
 569         if (cmp_type == RX_TPA_V2_ABUF_CMPL_TYPE_RX_TPA_AGG) {
 570                 struct rx_tpa_v2_abuf_cmpl *rx_agg = (void *)rxcmp;
 571                 uint16_t agg_id = rte_cpu_to_le_16(rx_agg->agg_id);
 572                 struct bnxt_tpa_info *tpa_info;
 573
 574                 tpa_info = &rxr->tpa_info[agg_id];
 575                 RTE_ASSERT(tpa_info->agg_count < 16);
 576                 tpa_info->agg_arr[tpa_info->agg_count++] = *rx_agg;
 577                 rc = -EINVAL; /* Continue w/o new mbuf */
 578                 goto next_rx;
 579         }
 580
 581         tmp_raw_cons = NEXT_RAW_CMP(tmp_raw_cons);
 582         cp_cons = RING_CMP(cpr->cp_ring_struct, tmp_raw_cons);
 583         rxcmp1 = (struct rx_pkt_cmpl_hi *)&cpr->cp_desc_ring[cp_cons];
 584
 585         if (!CMP_VALID(rxcmp1, tmp_raw_cons, cpr->cp_ring_struct))
 586                 return -EBUSY;
 587
 588         cpr->valid = FLIP_VALID(cp_cons,
 589                                 cpr->cp_ring_struct->ring_mask,
 590                                 cpr->valid);
 591
 592         if (cmp_type == RX_TPA_START_CMPL_TYPE_RX_TPA_START) {
 593                 bnxt_tpa_start(rxq, (struct rx_tpa_start_cmpl *)rxcmp,
 594                                (struct rx_tpa_start_cmpl_hi *)rxcmp1);
 595                 rc = -EINVAL; /* Continue w/o new mbuf */
 596                 goto next_rx;
 597         } else if (cmp_type == RX_TPA_END_CMPL_TYPE_RX_TPA_END) {
 598                 mbuf = bnxt_tpa_end(rxq, &tmp_raw_cons,
 599                                    (struct rx_tpa_end_cmpl *)rxcmp,
 600                                    (struct rx_tpa_end_cmpl_hi *)rxcmp1);
 601                 if (unlikely(!mbuf))
 602                         return -EBUSY;
 603                 *rx_pkt = mbuf;
 604                 goto next_rx;
 605         } else if (cmp_type != 0x11) {
 606                 rc = -EINVAL;
 607                 goto next_rx;
 608         }
 609
 610         agg_buf = (rxcmp->agg_bufs_v1 & RX_PKT_CMPL_AGG_BUFS_MASK)
 611                         >> RX_PKT_CMPL_AGG_BUFS_SFT;
 612         if (agg_buf && !bnxt_agg_bufs_valid(cpr, agg_buf, tmp_raw_cons))
 613                 return -EBUSY;
 614
 615         prod = rxr->rx_prod;
 616
 617         cons = rxcmp->opaque;
 618         mbuf = bnxt_consume_rx_buf(rxr, cons);
 619         if (mbuf == NULL)
 620                 return -EBUSY;
 621
 622         rte_prefetch0(mbuf);
 623
 624         mbuf->data_off = RTE_PKTMBUF_HEADROOM;
 625         mbuf->nb_segs = 1;
 626         mbuf->next = NULL;
 627         mbuf->pkt_len = rxcmp->len;
 628         mbuf->data_len = mbuf->pkt_len;
 629         mbuf->port = rxq->port_id;
 630         mbuf->ol_flags = 0;
 631
 632         flags_type = rte_le_to_cpu_16(rxcmp->flags_type);
 633         if (flags_type & RX_PKT_CMPL_FLAGS_RSS_VALID) {
 634                 mbuf->hash.rss = rxcmp->rss_hash;
 635                 mbuf->ol_flags |= PKT_RX_RSS_HASH;
 636         }
 637
 638         if (BNXT_TRUFLOW_EN(bp))
 639                 mark_id = bnxt_ulp_set_mark_in_mbuf(rxq->bp, rxcmp1, mbuf,
 640                                                     &vfr_flag);
 641         else
 642                 bnxt_set_mark_in_mbuf(rxq->bp, rxcmp1, mbuf);
 643
 644 #ifdef RTE_LIBRTE_IEEE1588
 645         if (unlikely((flags_type & RX_PKT_CMPL_FLAGS_MASK) ==
 646                      RX_PKT_CMPL_FLAGS_ITYPE_PTP_W_TIMESTAMP)) {
 647                 mbuf->ol_flags |= PKT_RX_IEEE1588_PTP | PKT_RX_IEEE1588_TMST;
 648                 bnxt_get_rx_ts_thor(rxq->bp, rxcmp1->reorder);
 649         }
 650 #endif
 651         if (agg_buf)
 652                 bnxt_rx_pages(rxq, mbuf, &tmp_raw_cons, agg_buf, NULL);
 653
 654         if (rxcmp1->flags2 & RX_PKT_CMPL_FLAGS2_META_FORMAT_VLAN) {
 655                 mbuf->vlan_tci = rxcmp1->metadata &
 656                         (RX_PKT_CMPL_METADATA_VID_MASK |
 657                         RX_PKT_CMPL_METADATA_DE |
 658                         RX_PKT_CMPL_METADATA_PRI_MASK);
 659                 mbuf->ol_flags |= PKT_RX_VLAN | PKT_RX_VLAN_STRIPPED;
 660         }
 661
 662         flags2_f = flags2_0xf(rxcmp1);
 663         /* IP Checksum */
 664         if (likely(IS_IP_NONTUNNEL_PKT(flags2_f))) {
 665                 if (unlikely(RX_CMP_IP_CS_ERROR(rxcmp1)))
 666                         mbuf->ol_flags |= PKT_RX_IP_CKSUM_BAD;
 667                 else if (unlikely(RX_CMP_IP_CS_UNKNOWN(rxcmp1)))
 668                         mbuf->ol_flags |= PKT_RX_IP_CKSUM_UNKNOWN;
 669                 else
 670                         mbuf->ol_flags |= PKT_RX_IP_CKSUM_GOOD;
 671         } else if (IS_IP_TUNNEL_PKT(flags2_f)) {
 672                 if (unlikely(RX_CMP_IP_OUTER_CS_ERROR(rxcmp1) ||
 673                              RX_CMP_IP_CS_ERROR(rxcmp1)))
 674                         mbuf->ol_flags |= PKT_RX_IP_CKSUM_BAD;
 675                 else if (unlikely(RX_CMP_IP_CS_UNKNOWN(rxcmp1)))
 676                         mbuf->ol_flags |= PKT_RX_IP_CKSUM_UNKNOWN;
 677                 else
 678                         mbuf->ol_flags |= PKT_RX_IP_CKSUM_GOOD;
 679         }
 680
 681         /* L4 Checksum */
 682         if (likely(IS_L4_NONTUNNEL_PKT(flags2_f))) {
 683                 if (unlikely(RX_CMP_L4_INNER_CS_ERR2(rxcmp1)))
 684                         mbuf->ol_flags |= PKT_RX_L4_CKSUM_BAD;
 685                 else
 686                         mbuf->ol_flags |= PKT_RX_L4_CKSUM_GOOD;
 687         } else if (IS_L4_TUNNEL_PKT(flags2_f)) {
 688                 if (unlikely(RX_CMP_L4_INNER_CS_ERR2(rxcmp1)))
 689                         mbuf->ol_flags |= PKT_RX_L4_CKSUM_BAD;
 690                 else
 691                         mbuf->ol_flags |= PKT_RX_L4_CKSUM_GOOD;
 692                 if (unlikely(RX_CMP_L4_OUTER_CS_ERR2(rxcmp1))) {
 693                         mbuf->ol_flags |= PKT_RX_OUTER_L4_CKSUM_BAD;
 694                 } else if (unlikely(IS_L4_TUNNEL_PKT_ONLY_INNER_L4_CS
 695                                     (flags2_f))) {
 696                         mbuf->ol_flags |= PKT_RX_OUTER_L4_CKSUM_UNKNOWN;
 697                 } else {
 698                         mbuf->ol_flags |= PKT_RX_OUTER_L4_CKSUM_GOOD;
 699                 }
 700         } else if (unlikely(RX_CMP_L4_CS_UNKNOWN(rxcmp1))) {
 701                 mbuf->ol_flags |= PKT_RX_L4_CKSUM_UNKNOWN;
 702         }
 703
 704         mbuf->packet_type = bnxt_parse_pkt_type(rxcmp, rxcmp1);
 705
 706 #ifdef BNXT_DEBUG
 707         if (rxcmp1->errors_v2 & RX_CMP_L2_ERRORS) {
 708                 /* Re-install the mbuf back to the rx ring */
 709                 bnxt_reuse_rx_mbuf(rxr, cons, mbuf);
 710
 711                 rc = -EIO;
 712                 goto next_rx;
 713         }
 714 #endif
 715         /*
 716          * TODO: Redesign this....
 717          * If the allocation fails, the packet does not get received.
 718          * Simply returning this will result in slowly falling behind
 719          * on the producer ring buffers.
 720          * Instead, "filling up" the producer just before ringing the
 721          * doorbell could be a better solution since it will let the
 722          * producer ring starve until memory is available again pushing
 723          * the drops into hardware and getting them out of the driver
 724          * allowing recovery to a full producer ring.
 725          *
 726          * This could also help with cache usage by preventing per-packet
 727          * calls in favour of a tight loop with the same function being called
 728          * in it.
 729          */
 730         prod = RING_NEXT(rxr->rx_ring_struct, prod);
 731         if (bnxt_alloc_rx_data(rxq, rxr, prod)) {
 732                 PMD_DRV_LOG(ERR, "mbuf alloc failed with prod=0x%x\n", prod);
 733                 rc = -ENOMEM;
 734                 goto rx;
 735         }
 736         rxr->rx_prod = prod;
 737         /*
 738          * All MBUFs are allocated with the same size under DPDK,
 739          * no optimization for rx_copy_thresh
 740          */
 741 rx:
 742         *rx_pkt = mbuf;
 743
 744         if (BNXT_TRUFLOW_EN(bp) &&
 745             (BNXT_VF_IS_TRUSTED(bp) || BNXT_PF(bp)) &&
 746             vfr_flag) {
 747                 if (!bnxt_vfr_recv(mark_id, rxq->queue_id, mbuf)) {
 748                         /* Now return an error so that nb_rx_pkts is not
 749                          * incremented.
 750                          * This packet was meant to be given to the representor.
 751                          * So no need to account the packet and give it to
 752                          * parent Rx burst function.
 753                          */
 754                         rc = -ENODEV;
 755                 }
 756         }
 757
 758 next_rx:
 759
 760         *raw_cons = tmp_raw_cons;
 761
 762         return rc;
 763 }
 764
 765 uint16_t bnxt_recv_pkts(void *rx_queue, struct rte_mbuf **rx_pkts,
 766                                uint16_t nb_pkts)
 767 {
 768         struct bnxt_rx_queue *rxq = rx_queue;
 769         struct bnxt_cp_ring_info *cpr = rxq->cp_ring;
 770         struct bnxt_rx_ring_info *rxr = rxq->rx_ring;
 771         uint32_t raw_cons = cpr->cp_raw_cons;
 772         uint32_t cons;
 773         int nb_rx_pkts = 0;
 774         int nb_rep_rx_pkts = 0;
 775         struct rx_pkt_cmpl *rxcmp;
 776         uint16_t prod = rxr->rx_prod;
 777         uint16_t ag_prod = rxr->ag_prod;
 778         int rc = 0;
 779         bool evt = false;
 780
 781         if (unlikely(is_bnxt_in_error(rxq->bp)))
 782                 return 0;
 783
 784         /* If Rx Q was stopped return */
 785         if (unlikely(!rxq->rx_started ||
 786                      !rte_spinlock_trylock(&rxq->lock)))
 787                 return 0;
 788
 789 #if defined(RTE_ARCH_X86) || defined(RTE_ARCH_ARM64)
 790         /*
 791          * Replenish buffers if needed when a transition has been made from
 792          * vector- to non-vector- receive processing.
 793          */
 794         while (unlikely(rxq->rxrearm_nb)) {
 795                 if (!bnxt_alloc_rx_data(rxq, rxr, rxq->rxrearm_start)) {
 796                         rxr->rx_prod = rxq->rxrearm_start;
 797                         bnxt_db_write(&rxr->rx_db, rxr->rx_prod);
 798                         rxq->rxrearm_start++;
 799                         rxq->rxrearm_nb--;
 800                 } else {
 801                         /* Retry allocation on next call. */
 802                         break;
 803                 }
 804         }
 805 #endif
 806
 807         /* Handle RX burst request */
 808         while (1) {
 809                 cons = RING_CMP(cpr->cp_ring_struct, raw_cons);
 810                 rte_prefetch0(&cpr->cp_desc_ring[cons]);
 811                 rxcmp = (struct rx_pkt_cmpl *)&cpr->cp_desc_ring[cons];
 812
 813                 if (!CMP_VALID(rxcmp, raw_cons, cpr->cp_ring_struct))
 814                         break;
 815                 cpr->valid = FLIP_VALID(cons,
 816                                         cpr->cp_ring_struct->ring_mask,
 817                                         cpr->valid);
 818
 819                 /* TODO: Avoid magic numbers... */
 820                 if ((CMP_TYPE(rxcmp) & 0x30) == 0x10) {
 821                         rc = bnxt_rx_pkt(&rx_pkts[nb_rx_pkts], rxq, &raw_cons);
 822                         if (likely(!rc) || rc == -ENOMEM)
 823                                 nb_rx_pkts++;
 824                         if (rc == -EBUSY)       /* partial completion */
 825                                 break;
 826                         if (rc == -ENODEV)      /* completion for representor */
 827                                 nb_rep_rx_pkts++;
 828                 } else if (!BNXT_NUM_ASYNC_CPR(rxq->bp)) {
 829                         evt =
 830                         bnxt_event_hwrm_resp_handler(rxq->bp,
 831                                                      (struct cmpl_base *)rxcmp);
 832                         /* If the async event is Fatal error, return */
 833                         if (unlikely(is_bnxt_in_error(rxq->bp)))
 834                                 goto done;
 835                 }
 836
 837                 raw_cons = NEXT_RAW_CMP(raw_cons);
 838                 if (nb_rx_pkts == nb_pkts || evt)
 839                         break;
 840                 /* Post some Rx buf early in case of larger burst processing */
 841                 if (nb_rx_pkts == BNXT_RX_POST_THRESH)
 842                         bnxt_db_write(&rxr->rx_db, rxr->rx_prod);
 843         }
 844
 845         cpr->cp_raw_cons = raw_cons;
 846         if (!nb_rx_pkts && !nb_rep_rx_pkts && !evt) {
 847                 /*
 848                  * For PMD, there is no need to keep on pushing to REARM
 849                  * the doorbell if there are no new completions
 850                  */
 851                 goto done;
 852         }
 853
 854         if (prod != rxr->rx_prod)
 855                 bnxt_db_write(&rxr->rx_db, rxr->rx_prod);
 856
 857         /* Ring the AGG ring DB */
 858         if (ag_prod != rxr->ag_prod)
 859                 bnxt_db_write(&rxr->ag_db, rxr->ag_prod);
 860
 861         bnxt_db_cq(cpr);
 862
 863         /* Attempt to alloc Rx buf in case of a previous allocation failure. */
 864         if (rc == -ENOMEM) {
 865                 int i = RING_NEXT(rxr->rx_ring_struct, prod);
 866                 int cnt = nb_rx_pkts;
 867
 868                 for (; cnt;
 869                         i = RING_NEXT(rxr->rx_ring_struct, i), cnt--) {
 870                         struct rte_mbuf **rx_buf = &rxr->rx_buf_ring[i];
 871
 872                         /* Buffer already allocated for this index. */
 873                         if (*rx_buf != NULL)
 874                                 continue;
 875
 876                         /* This slot is empty. Alloc buffer for Rx */
 877                         if (!bnxt_alloc_rx_data(rxq, rxr, i)) {
 878                                 rxr->rx_prod = i;
 879                                 bnxt_db_write(&rxr->rx_db, rxr->rx_prod);
 880                         } else {
 881                                 PMD_DRV_LOG(ERR, "Alloc  mbuf failed\n");
 882                                 break;
 883                         }
 884                 }
 885         }
 886
 887 done:
 888         rte_spinlock_unlock(&rxq->lock);
 889
 890         return nb_rx_pkts;
 891 }
 892
 893 /*
 894  * Dummy DPDK callback for RX.
 895  *
 896  * This function is used to temporarily replace the real callback during
 897  * unsafe control operations on the queue, or in case of error.
 898  */
 899 uint16_t
 900 bnxt_dummy_recv_pkts(void *rx_queue __rte_unused,
 901                      struct rte_mbuf **rx_pkts __rte_unused,
 902                      uint16_t nb_pkts __rte_unused)
 903 {
 904         return 0;
 905 }
 906
 907 void bnxt_free_rx_rings(struct bnxt *bp)
 908 {
 909         int i;
 910         struct bnxt_rx_queue *rxq;
 911
 912         if (!bp->rx_queues)
 913                 return;
 914
 915         for (i = 0; i < (int)bp->rx_nr_rings; i++) {
 916                 rxq = bp->rx_queues[i];
 917                 if (!rxq)
 918                         continue;
 919
 920                 bnxt_free_ring(rxq->rx_ring->rx_ring_struct);
 921                 rte_free(rxq->rx_ring->rx_ring_struct);
 922
 923                 /* Free the Aggregator ring */
 924                 bnxt_free_ring(rxq->rx_ring->ag_ring_struct);
 925                 rte_free(rxq->rx_ring->ag_ring_struct);
 926                 rxq->rx_ring->ag_ring_struct = NULL;
 927
 928                 rte_free(rxq->rx_ring);
 929
 930                 bnxt_free_ring(rxq->cp_ring->cp_ring_struct);
 931                 rte_free(rxq->cp_ring->cp_ring_struct);
 932                 rte_free(rxq->cp_ring);
 933
 934                 rte_free(rxq);
 935                 bp->rx_queues[i] = NULL;
 936         }
 937 }
 938
 939 int bnxt_init_rx_ring_struct(struct bnxt_rx_queue *rxq, unsigned int socket_id)
 940 {
 941         struct rte_eth_dev *eth_dev = rxq->bp->eth_dev;
 942         struct rte_eth_rxmode *rxmode;
 943         struct bnxt_cp_ring_info *cpr;
 944         struct bnxt_rx_ring_info *rxr;
 945         struct bnxt_ring *ring;
 946         bool use_agg_ring;
 947
 948         rxq->rx_buf_size = BNXT_MAX_PKT_LEN + sizeof(struct rte_mbuf);
 949
 950         rxr = rte_zmalloc_socket("bnxt_rx_ring",
 951                                  sizeof(struct bnxt_rx_ring_info),
 952                                  RTE_CACHE_LINE_SIZE, socket_id);
 953         if (rxr == NULL)
 954                 return -ENOMEM;
 955         rxq->rx_ring = rxr;
 956
 957         ring = rte_zmalloc_socket("bnxt_rx_ring_struct",
 958                                    sizeof(struct bnxt_ring),
 959                                    RTE_CACHE_LINE_SIZE, socket_id);
 960         if (ring == NULL)
 961                 return -ENOMEM;
 962         rxr->rx_ring_struct = ring;
 963         ring->ring_size = rte_align32pow2(rxq->nb_rx_desc);
 964         ring->ring_mask = ring->ring_size - 1;
 965         ring->bd = (void *)rxr->rx_desc_ring;
 966         ring->bd_dma = rxr->rx_desc_mapping;
 967         ring->vmem_size = ring->ring_size * sizeof(struct rte_mbuf *);
 968         ring->vmem = (void **)&rxr->rx_buf_ring;
 969         ring->fw_ring_id = INVALID_HW_RING_ID;
 970
 971         cpr = rte_zmalloc_socket("bnxt_rx_ring",
 972                                  sizeof(struct bnxt_cp_ring_info),
 973                                  RTE_CACHE_LINE_SIZE, socket_id);
 974         if (cpr == NULL)
 975                 return -ENOMEM;
 976         rxq->cp_ring = cpr;
 977
 978         ring = rte_zmalloc_socket("bnxt_rx_ring_struct",
 979                                    sizeof(struct bnxt_ring),
 980                                    RTE_CACHE_LINE_SIZE, socket_id);
 981         if (ring == NULL)
 982                 return -ENOMEM;
 983         cpr->cp_ring_struct = ring;
 984
 985         rxmode = &eth_dev->data->dev_conf.rxmode;
 986         use_agg_ring = (rxmode->offloads & DEV_RX_OFFLOAD_SCATTER) ||
 987                        (rxmode->offloads & DEV_RX_OFFLOAD_TCP_LRO) ||
 988                        (rxmode->max_rx_pkt_len >
 989                          (uint32_t)(rte_pktmbuf_data_room_size(rxq->mb_pool) -
 990                                     RTE_PKTMBUF_HEADROOM));
 991
 992         /* Allocate two completion slots per entry in desc ring. */
 993         ring->ring_size = rxr->rx_ring_struct->ring_size * 2;
 994
 995         /* Allocate additional slots if aggregation ring is in use. */
 996         if (use_agg_ring)
 997                 ring->ring_size *= AGG_RING_SIZE_FACTOR;
 998
 999         ring->ring_size = rte_align32pow2(ring->ring_size);
1000         ring->ring_mask = ring->ring_size - 1;
1001         ring->bd = (void *)cpr->cp_desc_ring;
1002         ring->bd_dma = cpr->cp_desc_mapping;
1003         ring->vmem_size = 0;
1004         ring->vmem = NULL;
1005         ring->fw_ring_id = INVALID_HW_RING_ID;
1006
1007         /* Allocate Aggregator rings */
1008         ring = rte_zmalloc_socket("bnxt_rx_ring_struct",
1009                                    sizeof(struct bnxt_ring),
1010                                    RTE_CACHE_LINE_SIZE, socket_id);
1011         if (ring == NULL)
1012                 return -ENOMEM;
1013         rxr->ag_ring_struct = ring;
1014         ring->ring_size = rte_align32pow2(rxq->nb_rx_desc *
1015                                           AGG_RING_SIZE_FACTOR);
1016         ring->ring_mask = ring->ring_size - 1;
1017         ring->bd = (void *)rxr->ag_desc_ring;
1018         ring->bd_dma = rxr->ag_desc_mapping;
1019         ring->vmem_size = ring->ring_size * sizeof(struct rte_mbuf *);
1020         ring->vmem = (void **)&rxr->ag_buf_ring;
1021         ring->fw_ring_id = INVALID_HW_RING_ID;
1022
1023         return 0;
1024 }
1025
1026 static void bnxt_init_rxbds(struct bnxt_ring *ring, uint32_t type,
1027                             uint16_t len)
1028 {
1029         uint32_t j;
1030         struct rx_prod_pkt_bd *rx_bd_ring = (struct rx_prod_pkt_bd *)ring->bd;
1031
1032         if (!rx_bd_ring)
1033                 return;
1034         for (j = 0; j < ring->ring_size; j++) {
1035                 rx_bd_ring[j].flags_type = rte_cpu_to_le_16(type);
1036                 rx_bd_ring[j].len = rte_cpu_to_le_16(len);
1037                 rx_bd_ring[j].opaque = j;
1038         }
1039 }
1040
1041 int bnxt_init_one_rx_ring(struct bnxt_rx_queue *rxq)
1042 {
1043         struct bnxt_rx_ring_info *rxr;
1044         struct bnxt_ring *ring;
1045         uint32_t prod, type;
1046         unsigned int i;
1047         uint16_t size;
1048
1049         size = rte_pktmbuf_data_room_size(rxq->mb_pool) - RTE_PKTMBUF_HEADROOM;
1050         size = RTE_MIN(BNXT_MAX_PKT_LEN, size);
1051
1052         type = RX_PROD_PKT_BD_TYPE_RX_PROD_PKT | RX_PROD_PKT_BD_FLAGS_EOP_PAD;
1053
1054         rxr = rxq->rx_ring;
1055         ring = rxr->rx_ring_struct;
1056         bnxt_init_rxbds(ring, type, size);
1057
1058         prod = rxr->rx_prod;
1059         for (i = 0; i < ring->ring_size; i++) {
1060                 if (unlikely(!rxr->rx_buf_ring[i])) {
1061                         if (bnxt_alloc_rx_data(rxq, rxr, prod) != 0) {
1062                                 PMD_DRV_LOG(WARNING,
1063                                             "init'ed rx ring %d with %d/%d mbufs only\n",
1064                                             rxq->queue_id, i, ring->ring_size);
1065                                 break;
1066                         }
1067                 }
1068                 rxr->rx_prod = prod;
1069                 prod = RING_NEXT(rxr->rx_ring_struct, prod);
1070         }
1071
1072         ring = rxr->ag_ring_struct;
1073         type = RX_PROD_AGG_BD_TYPE_RX_PROD_AGG;
1074         bnxt_init_rxbds(ring, type, size);
1075         prod = rxr->ag_prod;
1076
1077         for (i = 0; i < ring->ring_size; i++) {
1078                 if (unlikely(!rxr->ag_buf_ring[i])) {
1079                         if (bnxt_alloc_ag_data(rxq, rxr, prod) != 0) {
1080                                 PMD_DRV_LOG(WARNING,
1081                                             "init'ed AG ring %d with %d/%d mbufs only\n",
1082                                             rxq->queue_id, i, ring->ring_size);
1083                                 break;
1084                         }
1085                 }
1086                 rxr->ag_prod = prod;
1087                 prod = RING_NEXT(rxr->ag_ring_struct, prod);
1088         }
1089         PMD_DRV_LOG(DEBUG, "AGG Done!\n");
1090
1091         if (rxr->tpa_info) {
1092                 unsigned int max_aggs = BNXT_TPA_MAX_AGGS(rxq->bp);
1093
1094                 for (i = 0; i < max_aggs; i++) {
1095                         if (unlikely(!rxr->tpa_info[i].mbuf)) {
1096                                 rxr->tpa_info[i].mbuf =
1097                                         __bnxt_alloc_rx_data(rxq->mb_pool);
1098                                 if (!rxr->tpa_info[i].mbuf) {
1099                                         rte_atomic64_inc(&rxq->rx_mbuf_alloc_fail);
1100                                         return -ENOMEM;
1101                                 }
1102                         }
1103                 }
1104         }
1105         PMD_DRV_LOG(DEBUG, "TPA alloc Done!\n");
1106
1107         return 0;
1108 }