net/bnxt: fix resetting mbuf data offset
[dpdk.git] / drivers / net / bnxt / bnxt_rxr.c
1 /* SPDX-License-Identifier: BSD-3-Clause
2  * Copyright(c) 2014-2018 Broadcom
3  * All rights reserved.
4  */
5
6 #include <inttypes.h>
7 #include <stdbool.h>
8
9 #include <rte_bitmap.h>
10 #include <rte_byteorder.h>
11 #include <rte_malloc.h>
12 #include <rte_memory.h>
13
14 #include "bnxt.h"
15 #include "bnxt_reps.h"
16 #include "bnxt_ring.h"
17 #include "bnxt_rxr.h"
18 #include "bnxt_rxq.h"
19 #include "hsi_struct_def_dpdk.h"
20 #ifdef RTE_LIBRTE_IEEE1588
21 #include "bnxt_hwrm.h"
22 #endif
23
24 #include <bnxt_tf_common.h>
25 #include <ulp_mark_mgr.h>
26
27 /*
28  * RX Ring handling
29  */
30
31 static inline struct rte_mbuf *__bnxt_alloc_rx_data(struct rte_mempool *mb)
32 {
33         struct rte_mbuf *data;
34
35         data = rte_mbuf_raw_alloc(mb);
36
37         return data;
38 }
39
40 static inline int bnxt_alloc_rx_data(struct bnxt_rx_queue *rxq,
41                                      struct bnxt_rx_ring_info *rxr,
42                                      uint16_t prod)
43 {
44         struct rx_prod_pkt_bd *rxbd = &rxr->rx_desc_ring[prod];
45         struct rte_mbuf **rx_buf = &rxr->rx_buf_ring[prod];
46         struct rte_mbuf *mbuf;
47
48         mbuf = __bnxt_alloc_rx_data(rxq->mb_pool);
49         if (!mbuf) {
50                 rte_atomic64_inc(&rxq->rx_mbuf_alloc_fail);
51                 return -ENOMEM;
52         }
53
54         *rx_buf = mbuf;
55         mbuf->data_off = RTE_PKTMBUF_HEADROOM;
56
57         rxbd->address = rte_cpu_to_le_64(rte_mbuf_data_iova_default(mbuf));
58
59         return 0;
60 }
61
62 static inline int bnxt_alloc_ag_data(struct bnxt_rx_queue *rxq,
63                                      struct bnxt_rx_ring_info *rxr,
64                                      uint16_t prod)
65 {
66         struct rx_prod_pkt_bd *rxbd = &rxr->ag_desc_ring[prod];
67         struct rte_mbuf **rx_buf = &rxr->ag_buf_ring[prod];
68         struct rte_mbuf *mbuf;
69
70         if (rxbd == NULL) {
71                 PMD_DRV_LOG(ERR, "Jumbo Frame. rxbd is NULL\n");
72                 return -EINVAL;
73         }
74
75         if (rx_buf == NULL) {
76                 PMD_DRV_LOG(ERR, "Jumbo Frame. rx_buf is NULL\n");
77                 return -EINVAL;
78         }
79
80         mbuf = __bnxt_alloc_rx_data(rxq->mb_pool);
81         if (!mbuf) {
82                 rte_atomic64_inc(&rxq->rx_mbuf_alloc_fail);
83                 return -ENOMEM;
84         }
85
86         *rx_buf = mbuf;
87         mbuf->data_off = RTE_PKTMBUF_HEADROOM;
88
89         rxbd->address = rte_cpu_to_le_64(rte_mbuf_data_iova_default(mbuf));
90
91         return 0;
92 }
93
94 static inline void bnxt_reuse_rx_mbuf(struct bnxt_rx_ring_info *rxr,
95                                struct rte_mbuf *mbuf)
96 {
97         uint16_t prod = RING_NEXT(rxr->rx_ring_struct, rxr->rx_prod);
98         struct rte_mbuf **prod_rx_buf;
99         struct rx_prod_pkt_bd *prod_bd;
100
101         prod_rx_buf = &rxr->rx_buf_ring[prod];
102
103         RTE_ASSERT(*prod_rx_buf == NULL);
104         RTE_ASSERT(mbuf != NULL);
105
106         *prod_rx_buf = mbuf;
107
108         prod_bd = &rxr->rx_desc_ring[prod];
109
110         prod_bd->address = rte_cpu_to_le_64(rte_mbuf_data_iova_default(mbuf));
111
112         rxr->rx_prod = prod;
113 }
114
115 static inline
116 struct rte_mbuf *bnxt_consume_rx_buf(struct bnxt_rx_ring_info *rxr,
117                                      uint16_t cons)
118 {
119         struct rte_mbuf **cons_rx_buf;
120         struct rte_mbuf *mbuf;
121
122         cons_rx_buf = &rxr->rx_buf_ring[cons];
123         RTE_ASSERT(*cons_rx_buf != NULL);
124         mbuf = *cons_rx_buf;
125         *cons_rx_buf = NULL;
126
127         return mbuf;
128 }
129
130 static void bnxt_tpa_start(struct bnxt_rx_queue *rxq,
131                            struct rx_tpa_start_cmpl *tpa_start,
132                            struct rx_tpa_start_cmpl_hi *tpa_start1)
133 {
134         struct bnxt_rx_ring_info *rxr = rxq->rx_ring;
135         uint16_t agg_id;
136         uint16_t data_cons;
137         struct bnxt_tpa_info *tpa_info;
138         struct rte_mbuf *mbuf;
139
140         agg_id = bnxt_tpa_start_agg_id(rxq->bp, tpa_start);
141
142         data_cons = tpa_start->opaque;
143         tpa_info = &rxr->tpa_info[agg_id];
144
145         mbuf = bnxt_consume_rx_buf(rxr, data_cons);
146
147         bnxt_reuse_rx_mbuf(rxr, tpa_info->mbuf);
148
149         tpa_info->agg_count = 0;
150         tpa_info->mbuf = mbuf;
151         tpa_info->len = rte_le_to_cpu_32(tpa_start->len);
152
153         mbuf->data_off = RTE_PKTMBUF_HEADROOM;
154         mbuf->nb_segs = 1;
155         mbuf->next = NULL;
156         mbuf->pkt_len = rte_le_to_cpu_32(tpa_start->len);
157         mbuf->data_len = mbuf->pkt_len;
158         mbuf->port = rxq->port_id;
159         mbuf->ol_flags = PKT_RX_LRO;
160         if (likely(tpa_start->flags_type &
161                    rte_cpu_to_le_32(RX_TPA_START_CMPL_FLAGS_RSS_VALID))) {
162                 mbuf->hash.rss = rte_le_to_cpu_32(tpa_start->rss_hash);
163                 mbuf->ol_flags |= PKT_RX_RSS_HASH;
164         } else {
165                 mbuf->hash.fdir.id = rte_le_to_cpu_16(tpa_start1->cfa_code);
166                 mbuf->ol_flags |= PKT_RX_FDIR | PKT_RX_FDIR_ID;
167         }
168         if (tpa_start1->flags2 &
169             rte_cpu_to_le_32(RX_TPA_START_CMPL_FLAGS2_META_FORMAT_VLAN)) {
170                 mbuf->vlan_tci = rte_le_to_cpu_32(tpa_start1->metadata);
171                 mbuf->ol_flags |= PKT_RX_VLAN | PKT_RX_VLAN_STRIPPED;
172         }
173         if (likely(tpa_start1->flags2 &
174                    rte_cpu_to_le_32(RX_TPA_START_CMPL_FLAGS2_L4_CS_CALC)))
175                 mbuf->ol_flags |= PKT_RX_L4_CKSUM_GOOD;
176
177         /* recycle next mbuf */
178         data_cons = RING_NEXT(rxr->rx_ring_struct, data_cons);
179         bnxt_reuse_rx_mbuf(rxr, bnxt_consume_rx_buf(rxr, data_cons));
180 }
181
182 static int bnxt_agg_bufs_valid(struct bnxt_cp_ring_info *cpr,
183                 uint8_t agg_bufs, uint32_t raw_cp_cons)
184 {
185         uint16_t last_cp_cons;
186         struct rx_pkt_cmpl *agg_cmpl;
187
188         raw_cp_cons = ADV_RAW_CMP(raw_cp_cons, agg_bufs);
189         last_cp_cons = RING_CMP(cpr->cp_ring_struct, raw_cp_cons);
190         agg_cmpl = (struct rx_pkt_cmpl *)&cpr->cp_desc_ring[last_cp_cons];
191         cpr->valid = FLIP_VALID(raw_cp_cons,
192                                 cpr->cp_ring_struct->ring_mask,
193                                 cpr->valid);
194         return CMP_VALID(agg_cmpl, raw_cp_cons, cpr->cp_ring_struct);
195 }
196
197 /* TPA consume agg buffer out of order, allocate connected data only */
198 static int bnxt_prod_ag_mbuf(struct bnxt_rx_queue *rxq)
199 {
200         struct bnxt_rx_ring_info *rxr = rxq->rx_ring;
201         uint16_t next = RING_NEXT(rxr->ag_ring_struct, rxr->ag_prod);
202
203         /* TODO batch allocation for better performance */
204         while (rte_bitmap_get(rxr->ag_bitmap, next)) {
205                 if (unlikely(bnxt_alloc_ag_data(rxq, rxr, next))) {
206                         PMD_DRV_LOG(ERR,
207                                 "agg mbuf alloc failed: prod=0x%x\n", next);
208                         break;
209                 }
210                 rte_bitmap_clear(rxr->ag_bitmap, next);
211                 rxr->ag_prod = next;
212                 next = RING_NEXT(rxr->ag_ring_struct, next);
213         }
214
215         return 0;
216 }
217
218 static int bnxt_rx_pages(struct bnxt_rx_queue *rxq,
219                          struct rte_mbuf *mbuf, uint32_t *tmp_raw_cons,
220                          uint8_t agg_buf, struct bnxt_tpa_info *tpa_info)
221 {
222         struct bnxt_cp_ring_info *cpr = rxq->cp_ring;
223         struct bnxt_rx_ring_info *rxr = rxq->rx_ring;
224         int i;
225         uint16_t cp_cons, ag_cons;
226         struct rx_pkt_cmpl *rxcmp;
227         struct rte_mbuf *last = mbuf;
228         bool is_thor_tpa = tpa_info && BNXT_CHIP_THOR(rxq->bp);
229
230         for (i = 0; i < agg_buf; i++) {
231                 struct rte_mbuf **ag_buf;
232                 struct rte_mbuf *ag_mbuf;
233
234                 if (is_thor_tpa) {
235                         rxcmp = (void *)&tpa_info->agg_arr[i];
236                 } else {
237                         *tmp_raw_cons = NEXT_RAW_CMP(*tmp_raw_cons);
238                         cp_cons = RING_CMP(cpr->cp_ring_struct, *tmp_raw_cons);
239                         rxcmp = (struct rx_pkt_cmpl *)
240                                         &cpr->cp_desc_ring[cp_cons];
241                 }
242
243 #ifdef BNXT_DEBUG
244                 bnxt_dump_cmpl(cp_cons, rxcmp);
245 #endif
246
247                 ag_cons = rxcmp->opaque;
248                 RTE_ASSERT(ag_cons <= rxr->ag_ring_struct->ring_mask);
249                 ag_buf = &rxr->ag_buf_ring[ag_cons];
250                 ag_mbuf = *ag_buf;
251                 RTE_ASSERT(ag_mbuf != NULL);
252
253                 ag_mbuf->data_len = rte_le_to_cpu_16(rxcmp->len);
254
255                 mbuf->nb_segs++;
256                 mbuf->pkt_len += ag_mbuf->data_len;
257
258                 last->next = ag_mbuf;
259                 last = ag_mbuf;
260
261                 *ag_buf = NULL;
262
263                 /*
264                  * As aggregation buffer consumed out of order in TPA module,
265                  * use bitmap to track freed slots to be allocated and notified
266                  * to NIC
267                  */
268                 rte_bitmap_set(rxr->ag_bitmap, ag_cons);
269         }
270         bnxt_prod_ag_mbuf(rxq);
271         return 0;
272 }
273
274 static inline struct rte_mbuf *bnxt_tpa_end(
275                 struct bnxt_rx_queue *rxq,
276                 uint32_t *raw_cp_cons,
277                 struct rx_tpa_end_cmpl *tpa_end,
278                 struct rx_tpa_end_cmpl_hi *tpa_end1)
279 {
280         struct bnxt_cp_ring_info *cpr = rxq->cp_ring;
281         struct bnxt_rx_ring_info *rxr = rxq->rx_ring;
282         uint16_t agg_id;
283         struct rte_mbuf *mbuf;
284         uint8_t agg_bufs;
285         uint8_t payload_offset;
286         struct bnxt_tpa_info *tpa_info;
287
288         if (BNXT_CHIP_THOR(rxq->bp)) {
289                 struct rx_tpa_v2_end_cmpl *th_tpa_end;
290                 struct rx_tpa_v2_end_cmpl_hi *th_tpa_end1;
291
292                 th_tpa_end = (void *)tpa_end;
293                 th_tpa_end1 = (void *)tpa_end1;
294                 agg_id = BNXT_TPA_END_AGG_ID_TH(th_tpa_end);
295                 agg_bufs = BNXT_TPA_END_AGG_BUFS_TH(th_tpa_end1);
296                 payload_offset = th_tpa_end1->payload_offset;
297         } else {
298                 agg_id = BNXT_TPA_END_AGG_ID(tpa_end);
299                 agg_bufs = BNXT_TPA_END_AGG_BUFS(tpa_end);
300                 if (!bnxt_agg_bufs_valid(cpr, agg_bufs, *raw_cp_cons))
301                         return NULL;
302                 payload_offset = tpa_end->payload_offset;
303         }
304
305         tpa_info = &rxr->tpa_info[agg_id];
306         mbuf = tpa_info->mbuf;
307         RTE_ASSERT(mbuf != NULL);
308
309         rte_prefetch0(mbuf);
310         if (agg_bufs) {
311                 bnxt_rx_pages(rxq, mbuf, raw_cp_cons, agg_bufs, tpa_info);
312         }
313         mbuf->l4_len = payload_offset;
314
315         struct rte_mbuf *new_data = __bnxt_alloc_rx_data(rxq->mb_pool);
316         RTE_ASSERT(new_data != NULL);
317         if (!new_data) {
318                 rte_atomic64_inc(&rxq->rx_mbuf_alloc_fail);
319                 return NULL;
320         }
321         tpa_info->mbuf = new_data;
322
323         return mbuf;
324 }
325
326 uint32_t bnxt_ptype_table[BNXT_PTYPE_TBL_DIM] __rte_cache_aligned;
327
328 static void __rte_cold
329 bnxt_init_ptype_table(void)
330 {
331         uint32_t *pt = bnxt_ptype_table;
332         static bool initialized;
333         int ip6, tun, type;
334         uint32_t l3;
335         int i;
336
337         if (initialized)
338                 return;
339
340         for (i = 0; i < BNXT_PTYPE_TBL_DIM; i++) {
341                 if (i & (RX_PKT_CMPL_FLAGS2_META_FORMAT_VLAN >> 2))
342                         pt[i] = RTE_PTYPE_L2_ETHER_VLAN;
343                 else
344                         pt[i] = RTE_PTYPE_L2_ETHER;
345
346                 ip6 = i & (RX_PKT_CMPL_FLAGS2_IP_TYPE >> 7);
347                 tun = i & (RX_PKT_CMPL_FLAGS2_T_IP_CS_CALC >> 2);
348                 type = (i & 0x38) << 9;
349
350                 if (!tun && !ip6)
351                         l3 = RTE_PTYPE_L3_IPV4_EXT_UNKNOWN;
352                 else if (!tun && ip6)
353                         l3 = RTE_PTYPE_L3_IPV6_EXT_UNKNOWN;
354                 else if (tun && !ip6)
355                         l3 = RTE_PTYPE_INNER_L3_IPV4_EXT_UNKNOWN;
356                 else
357                         l3 = RTE_PTYPE_INNER_L3_IPV6_EXT_UNKNOWN;
358
359                 switch (type) {
360                 case RX_PKT_CMPL_FLAGS_ITYPE_ICMP:
361                         if (tun)
362                                 pt[i] |= l3 | RTE_PTYPE_INNER_L4_ICMP;
363                         else
364                                 pt[i] |= l3 | RTE_PTYPE_L4_ICMP;
365                         break;
366                 case RX_PKT_CMPL_FLAGS_ITYPE_TCP:
367                         if (tun)
368                                 pt[i] |= l3 | RTE_PTYPE_INNER_L4_TCP;
369                         else
370                                 pt[i] |= l3 | RTE_PTYPE_L4_TCP;
371                         break;
372                 case RX_PKT_CMPL_FLAGS_ITYPE_UDP:
373                         if (tun)
374                                 pt[i] |= l3 | RTE_PTYPE_INNER_L4_UDP;
375                         else
376                                 pt[i] |= l3 | RTE_PTYPE_L4_UDP;
377                         break;
378                 case RX_PKT_CMPL_FLAGS_ITYPE_IP:
379                         pt[i] |= l3;
380                         break;
381                 }
382         }
383         initialized = true;
384 }
385
386 static uint32_t
387 bnxt_parse_pkt_type(struct rx_pkt_cmpl *rxcmp, struct rx_pkt_cmpl_hi *rxcmp1)
388 {
389         uint32_t flags_type, flags2;
390         uint8_t index;
391
392         flags_type = rte_le_to_cpu_16(rxcmp->flags_type);
393         flags2 = rte_le_to_cpu_32(rxcmp1->flags2);
394
395         /*
396          * Index format:
397          *     bit 0: RX_PKT_CMPL_FLAGS2_T_IP_CS_CALC
398          *     bit 1: RX_CMPL_FLAGS2_IP_TYPE
399          *     bit 2: RX_PKT_CMPL_FLAGS2_META_FORMAT_VLAN
400          *     bits 3-6: RX_PKT_CMPL_FLAGS_ITYPE
401          */
402         index = ((flags_type & RX_PKT_CMPL_FLAGS_ITYPE_MASK) >> 9) |
403                 ((flags2 & (RX_PKT_CMPL_FLAGS2_META_FORMAT_VLAN |
404                            RX_PKT_CMPL_FLAGS2_T_IP_CS_CALC)) >> 2) |
405                 ((flags2 & RX_PKT_CMPL_FLAGS2_IP_TYPE) >> 7);
406
407         return bnxt_ptype_table[index];
408 }
409
410 uint32_t
411 bnxt_ol_flags_table[BNXT_OL_FLAGS_TBL_DIM] __rte_cache_aligned;
412
413 uint32_t
414 bnxt_ol_flags_err_table[BNXT_OL_FLAGS_ERR_TBL_DIM] __rte_cache_aligned;
415
416 static void __rte_cold
417 bnxt_init_ol_flags_tables(void)
418 {
419         static bool initialized;
420         uint32_t *pt;
421         int i;
422
423         if (initialized)
424                 return;
425
426         /* Initialize ol_flags table. */
427         pt = bnxt_ol_flags_table;
428         for (i = 0; i < BNXT_OL_FLAGS_TBL_DIM; i++) {
429                 pt[i] = 0;
430                 if (i & RX_PKT_CMPL_FLAGS2_META_FORMAT_VLAN)
431                         pt[i] |= PKT_RX_VLAN | PKT_RX_VLAN_STRIPPED;
432
433                 if (i & RX_PKT_CMPL_FLAGS2_IP_CS_CALC)
434                         pt[i] |= PKT_RX_IP_CKSUM_GOOD;
435
436                 if (i & RX_PKT_CMPL_FLAGS2_L4_CS_CALC)
437                         pt[i] |= PKT_RX_L4_CKSUM_GOOD;
438
439                 if (i & RX_PKT_CMPL_FLAGS2_T_L4_CS_CALC)
440                         pt[i] |= PKT_RX_OUTER_L4_CKSUM_GOOD;
441         }
442
443         /* Initialize checksum error table. */
444         pt = bnxt_ol_flags_err_table;
445         for (i = 0; i < BNXT_OL_FLAGS_ERR_TBL_DIM; i++) {
446                 pt[i] = 0;
447                 if (i & (RX_PKT_CMPL_ERRORS_IP_CS_ERROR >> 4))
448                         pt[i] |= PKT_RX_IP_CKSUM_BAD;
449
450                 if (i & (RX_PKT_CMPL_ERRORS_L4_CS_ERROR >> 4))
451                         pt[i] |= PKT_RX_L4_CKSUM_BAD;
452
453                 if (i & (RX_PKT_CMPL_ERRORS_T_IP_CS_ERROR >> 4))
454                         pt[i] |= PKT_RX_EIP_CKSUM_BAD;
455
456                 if (i & (RX_PKT_CMPL_ERRORS_T_L4_CS_ERROR >> 4))
457                         pt[i] |= PKT_RX_OUTER_L4_CKSUM_BAD;
458         }
459
460         initialized = true;
461 }
462
463 static void
464 bnxt_set_ol_flags(struct rx_pkt_cmpl *rxcmp, struct rx_pkt_cmpl_hi *rxcmp1,
465                   struct rte_mbuf *mbuf)
466 {
467         uint16_t flags_type, errors, flags;
468         uint64_t ol_flags;
469
470         flags_type = rte_le_to_cpu_16(rxcmp->flags_type);
471
472         flags = rte_le_to_cpu_32(rxcmp1->flags2) &
473                                 (RX_PKT_CMPL_FLAGS2_IP_CS_CALC |
474                                  RX_PKT_CMPL_FLAGS2_L4_CS_CALC |
475                                  RX_PKT_CMPL_FLAGS2_T_IP_CS_CALC |
476                                  RX_PKT_CMPL_FLAGS2_T_L4_CS_CALC |
477                                  RX_PKT_CMPL_FLAGS2_META_FORMAT_VLAN);
478
479         errors = rte_le_to_cpu_16(rxcmp1->errors_v2) &
480                                 (RX_PKT_CMPL_ERRORS_IP_CS_ERROR |
481                                  RX_PKT_CMPL_ERRORS_L4_CS_ERROR |
482                                  RX_PKT_CMPL_ERRORS_T_IP_CS_ERROR |
483                                  RX_PKT_CMPL_ERRORS_T_L4_CS_ERROR);
484         errors = (errors >> 4) & flags;
485
486         ol_flags = bnxt_ol_flags_table[flags & ~errors];
487
488         if (errors)
489                 ol_flags |= bnxt_ol_flags_err_table[errors];
490
491         if (flags_type & RX_PKT_CMPL_FLAGS_RSS_VALID) {
492                 mbuf->hash.rss = rte_le_to_cpu_32(rxcmp->rss_hash);
493                 ol_flags |= PKT_RX_RSS_HASH;
494         }
495
496         mbuf->ol_flags = ol_flags;
497 }
498
499 #ifdef RTE_LIBRTE_IEEE1588
500 static void
501 bnxt_get_rx_ts_thor(struct bnxt *bp, uint32_t rx_ts_cmpl)
502 {
503         uint64_t systime_cycles = 0;
504
505         if (!BNXT_CHIP_THOR(bp))
506                 return;
507
508         /* On Thor, Rx timestamps are provided directly in the
509          * Rx completion records to the driver. Only 32 bits of
510          * the timestamp is present in the completion. Driver needs
511          * to read the current 48 bit free running timer using the
512          * HWRM_PORT_TS_QUERY command and combine the upper 16 bits
513          * from the HWRM response with the lower 32 bits in the
514          * Rx completion to produce the 48 bit timestamp for the Rx packet
515          */
516         bnxt_hwrm_port_ts_query(bp, BNXT_PTP_FLAGS_CURRENT_TIME,
517                                 &systime_cycles);
518         bp->ptp_cfg->rx_timestamp = (systime_cycles & 0xFFFF00000000);
519         bp->ptp_cfg->rx_timestamp |= rx_ts_cmpl;
520 }
521 #endif
522
523 static uint32_t
524 bnxt_ulp_set_mark_in_mbuf(struct bnxt *bp, struct rx_pkt_cmpl_hi *rxcmp1,
525                           struct rte_mbuf *mbuf, uint32_t *vfr_flag)
526 {
527         uint32_t cfa_code;
528         uint32_t meta_fmt;
529         uint32_t meta;
530         bool gfid = false;
531         uint32_t mark_id;
532         uint32_t flags2;
533         uint32_t gfid_support = 0;
534         int rc;
535
536         if (BNXT_GFID_ENABLED(bp))
537                 gfid_support = 1;
538
539         cfa_code = rte_le_to_cpu_16(rxcmp1->cfa_code);
540         flags2 = rte_le_to_cpu_32(rxcmp1->flags2);
541         meta = rte_le_to_cpu_32(rxcmp1->metadata);
542
543         /*
544          * The flags field holds extra bits of info from [6:4]
545          * which indicate if the flow is in TCAM or EM or EEM
546          */
547         meta_fmt = (flags2 & BNXT_CFA_META_FMT_MASK) >>
548                 BNXT_CFA_META_FMT_SHFT;
549
550         switch (meta_fmt) {
551         case 0:
552                 if (gfid_support) {
553                         /* Not an LFID or GFID, a flush cmd. */
554                         goto skip_mark;
555                 } else {
556                         /* LFID mode, no vlan scenario */
557                         gfid = false;
558                 }
559                 break;
560         case 4:
561         case 5:
562                 /*
563                  * EM/TCAM case
564                  * Assume that EM doesn't support Mark due to GFID
565                  * collisions with EEM.  Simply return without setting the mark
566                  * in the mbuf.
567                  */
568                 if (BNXT_CFA_META_EM_TEST(meta)) {
569                         /*This is EM hit {EM(1), GFID[27:16], 19'd0 or vtag } */
570                         gfid = true;
571                         meta >>= BNXT_RX_META_CFA_CODE_SHIFT;
572                         cfa_code |= meta << BNXT_CFA_CODE_META_SHIFT;
573                 } else {
574                         /*
575                          * It is a TCAM entry, so it is an LFID.
576                          * The TCAM IDX and Mode can also be determined
577                          * by decoding the meta_data. We are not
578                          * using these for now.
579                          */
580                 }
581                 break;
582         case 6:
583         case 7:
584                 /* EEM Case, only using gfid in EEM for now. */
585                 gfid = true;
586
587                 /*
588                  * For EEM flows, The first part of cfa_code is 16 bits.
589                  * The second part is embedded in the
590                  * metadata field from bit 19 onwards. The driver needs to
591                  * ignore the first 19 bits of metadata and use the next 12
592                  * bits as higher 12 bits of cfa_code.
593                  */
594                 meta >>= BNXT_RX_META_CFA_CODE_SHIFT;
595                 cfa_code |= meta << BNXT_CFA_CODE_META_SHIFT;
596                 break;
597         default:
598                 /* For other values, the cfa_code is assumed to be an LFID. */
599                 break;
600         }
601
602         rc = ulp_mark_db_mark_get(bp->ulp_ctx, gfid,
603                                   cfa_code, vfr_flag, &mark_id);
604         if (!rc) {
605                 /* VF to VFR Rx path. So, skip mark_id injection in mbuf */
606                 if (vfr_flag && *vfr_flag)
607                         return mark_id;
608                 /* Got the mark, write it to the mbuf and return */
609                 mbuf->hash.fdir.hi = mark_id;
610                 *bnxt_cfa_code_dynfield(mbuf) = cfa_code & 0xffffffffull;
611                 mbuf->hash.fdir.id = rxcmp1->cfa_code;
612                 mbuf->ol_flags |= PKT_RX_FDIR | PKT_RX_FDIR_ID;
613                 return mark_id;
614         }
615
616 skip_mark:
617         mbuf->hash.fdir.hi = 0;
618         mbuf->hash.fdir.id = 0;
619
620         return 0;
621 }
622
623 void bnxt_set_mark_in_mbuf(struct bnxt *bp,
624                            struct rx_pkt_cmpl_hi *rxcmp1,
625                            struct rte_mbuf *mbuf)
626 {
627         uint32_t cfa_code = 0;
628         uint8_t meta_fmt = 0;
629         uint16_t flags2 = 0;
630         uint32_t meta =  0;
631
632         cfa_code = rte_le_to_cpu_16(rxcmp1->cfa_code);
633         if (!cfa_code)
634                 return;
635
636         if (cfa_code && !bp->mark_table[cfa_code].valid)
637                 return;
638
639         flags2 = rte_le_to_cpu_16(rxcmp1->flags2);
640         meta = rte_le_to_cpu_32(rxcmp1->metadata);
641         if (meta) {
642                 meta >>= BNXT_RX_META_CFA_CODE_SHIFT;
643
644                 /* The flags field holds extra bits of info from [6:4]
645                  * which indicate if the flow is in TCAM or EM or EEM
646                  */
647                 meta_fmt = (flags2 & BNXT_CFA_META_FMT_MASK) >>
648                            BNXT_CFA_META_FMT_SHFT;
649
650                 /* meta_fmt == 4 => 'b100 => 'b10x => EM.
651                  * meta_fmt == 5 => 'b101 => 'b10x => EM + VLAN
652                  * meta_fmt == 6 => 'b110 => 'b11x => EEM
653                  * meta_fmt == 7 => 'b111 => 'b11x => EEM + VLAN.
654                  */
655                 meta_fmt >>= BNXT_CFA_META_FMT_EM_EEM_SHFT;
656         }
657
658         mbuf->hash.fdir.hi = bp->mark_table[cfa_code].mark_id;
659         mbuf->ol_flags |= PKT_RX_FDIR | PKT_RX_FDIR_ID;
660 }
661
662 static int bnxt_rx_pkt(struct rte_mbuf **rx_pkt,
663                        struct bnxt_rx_queue *rxq, uint32_t *raw_cons)
664 {
665         struct bnxt_cp_ring_info *cpr = rxq->cp_ring;
666         struct bnxt_rx_ring_info *rxr = rxq->rx_ring;
667         struct rx_pkt_cmpl *rxcmp;
668         struct rx_pkt_cmpl_hi *rxcmp1;
669         uint32_t tmp_raw_cons = *raw_cons;
670         uint16_t cons, prod, cp_cons =
671             RING_CMP(cpr->cp_ring_struct, tmp_raw_cons);
672         struct rte_mbuf *mbuf;
673         int rc = 0;
674         uint8_t agg_buf = 0;
675         uint16_t cmp_type;
676         uint32_t vfr_flag = 0, mark_id = 0;
677         struct bnxt *bp = rxq->bp;
678
679         rxcmp = (struct rx_pkt_cmpl *)
680             &cpr->cp_desc_ring[cp_cons];
681
682         cmp_type = CMP_TYPE(rxcmp);
683
684         if (cmp_type == RX_TPA_V2_ABUF_CMPL_TYPE_RX_TPA_AGG) {
685                 struct rx_tpa_v2_abuf_cmpl *rx_agg = (void *)rxcmp;
686                 uint16_t agg_id = rte_cpu_to_le_16(rx_agg->agg_id);
687                 struct bnxt_tpa_info *tpa_info;
688
689                 tpa_info = &rxr->tpa_info[agg_id];
690                 RTE_ASSERT(tpa_info->agg_count < 16);
691                 tpa_info->agg_arr[tpa_info->agg_count++] = *rx_agg;
692                 rc = -EINVAL; /* Continue w/o new mbuf */
693                 goto next_rx;
694         }
695
696         tmp_raw_cons = NEXT_RAW_CMP(tmp_raw_cons);
697         cp_cons = RING_CMP(cpr->cp_ring_struct, tmp_raw_cons);
698         rxcmp1 = (struct rx_pkt_cmpl_hi *)&cpr->cp_desc_ring[cp_cons];
699
700         if (!CMP_VALID(rxcmp1, tmp_raw_cons, cpr->cp_ring_struct))
701                 return -EBUSY;
702
703         cpr->valid = FLIP_VALID(cp_cons,
704                                 cpr->cp_ring_struct->ring_mask,
705                                 cpr->valid);
706
707         if (cmp_type == RX_TPA_START_CMPL_TYPE_RX_TPA_START) {
708                 bnxt_tpa_start(rxq, (struct rx_tpa_start_cmpl *)rxcmp,
709                                (struct rx_tpa_start_cmpl_hi *)rxcmp1);
710                 rc = -EINVAL; /* Continue w/o new mbuf */
711                 goto next_rx;
712         } else if (cmp_type == RX_TPA_END_CMPL_TYPE_RX_TPA_END) {
713                 mbuf = bnxt_tpa_end(rxq, &tmp_raw_cons,
714                                    (struct rx_tpa_end_cmpl *)rxcmp,
715                                    (struct rx_tpa_end_cmpl_hi *)rxcmp1);
716                 if (unlikely(!mbuf))
717                         return -EBUSY;
718                 *rx_pkt = mbuf;
719                 goto next_rx;
720         } else if (cmp_type != 0x11) {
721                 rc = -EINVAL;
722                 goto next_rx;
723         }
724
725         agg_buf = (rxcmp->agg_bufs_v1 & RX_PKT_CMPL_AGG_BUFS_MASK)
726                         >> RX_PKT_CMPL_AGG_BUFS_SFT;
727         if (agg_buf && !bnxt_agg_bufs_valid(cpr, agg_buf, tmp_raw_cons))
728                 return -EBUSY;
729
730         prod = rxr->rx_prod;
731
732         cons = rxcmp->opaque;
733         mbuf = bnxt_consume_rx_buf(rxr, cons);
734         if (mbuf == NULL)
735                 return -EBUSY;
736
737         rte_prefetch0(mbuf);
738
739         mbuf->data_off = RTE_PKTMBUF_HEADROOM;
740         mbuf->nb_segs = 1;
741         mbuf->next = NULL;
742         mbuf->pkt_len = rxcmp->len;
743         mbuf->data_len = mbuf->pkt_len;
744         mbuf->port = rxq->port_id;
745
746         bnxt_set_ol_flags(rxcmp, rxcmp1, mbuf);
747
748 #ifdef RTE_LIBRTE_IEEE1588
749         if (unlikely((rte_le_to_cpu_16(rxcmp->flags_type) &
750                       RX_PKT_CMPL_FLAGS_MASK) ==
751                       RX_PKT_CMPL_FLAGS_ITYPE_PTP_W_TIMESTAMP)) {
752                 mbuf->ol_flags |= PKT_RX_IEEE1588_PTP | PKT_RX_IEEE1588_TMST;
753                 bnxt_get_rx_ts_thor(rxq->bp, rxcmp1->reorder);
754         }
755 #endif
756
757         if (BNXT_TRUFLOW_EN(bp))
758                 mark_id = bnxt_ulp_set_mark_in_mbuf(rxq->bp, rxcmp1, mbuf,
759                                                     &vfr_flag);
760         else
761                 bnxt_set_mark_in_mbuf(rxq->bp, rxcmp1, mbuf);
762
763         if (agg_buf)
764                 bnxt_rx_pages(rxq, mbuf, &tmp_raw_cons, agg_buf, NULL);
765
766         mbuf->packet_type = bnxt_parse_pkt_type(rxcmp, rxcmp1);
767
768 #ifdef BNXT_DEBUG
769         if (rxcmp1->errors_v2 & RX_CMP_L2_ERRORS) {
770                 /* Re-install the mbuf back to the rx ring */
771                 bnxt_reuse_rx_mbuf(rxr, cons, mbuf);
772
773                 rc = -EIO;
774                 goto next_rx;
775         }
776 #endif
777         /*
778          * TODO: Redesign this....
779          * If the allocation fails, the packet does not get received.
780          * Simply returning this will result in slowly falling behind
781          * on the producer ring buffers.
782          * Instead, "filling up" the producer just before ringing the
783          * doorbell could be a better solution since it will let the
784          * producer ring starve until memory is available again pushing
785          * the drops into hardware and getting them out of the driver
786          * allowing recovery to a full producer ring.
787          *
788          * This could also help with cache usage by preventing per-packet
789          * calls in favour of a tight loop with the same function being called
790          * in it.
791          */
792         prod = RING_NEXT(rxr->rx_ring_struct, prod);
793         if (bnxt_alloc_rx_data(rxq, rxr, prod)) {
794                 PMD_DRV_LOG(ERR, "mbuf alloc failed with prod=0x%x\n", prod);
795                 rc = -ENOMEM;
796                 goto rx;
797         }
798         rxr->rx_prod = prod;
799
800         if (BNXT_TRUFLOW_EN(bp) && (BNXT_VF_IS_TRUSTED(bp) || BNXT_PF(bp)) &&
801             vfr_flag) {
802                 bnxt_vfr_recv(mark_id, rxq->queue_id, mbuf);
803                 /* Now return an error so that nb_rx_pkts is not
804                  * incremented.
805                  * This packet was meant to be given to the representor.
806                  * So no need to account the packet and give it to
807                  * parent Rx burst function.
808                  */
809                 rc = -ENODEV;
810                 goto next_rx;
811         }
812         /*
813          * All MBUFs are allocated with the same size under DPDK,
814          * no optimization for rx_copy_thresh
815          */
816 rx:
817         *rx_pkt = mbuf;
818
819 next_rx:
820
821         *raw_cons = tmp_raw_cons;
822
823         return rc;
824 }
825
826 uint16_t bnxt_recv_pkts(void *rx_queue, struct rte_mbuf **rx_pkts,
827                                uint16_t nb_pkts)
828 {
829         struct bnxt_rx_queue *rxq = rx_queue;
830         struct bnxt_cp_ring_info *cpr = rxq->cp_ring;
831         struct bnxt_rx_ring_info *rxr = rxq->rx_ring;
832         uint32_t raw_cons = cpr->cp_raw_cons;
833         uint32_t cons;
834         int nb_rx_pkts = 0;
835         int nb_rep_rx_pkts = 0;
836         struct rx_pkt_cmpl *rxcmp;
837         uint16_t prod = rxr->rx_prod;
838         uint16_t ag_prod = rxr->ag_prod;
839         int rc = 0;
840         bool evt = false;
841
842         if (unlikely(is_bnxt_in_error(rxq->bp)))
843                 return 0;
844
845         /* If Rx Q was stopped return */
846         if (unlikely(!rxq->rx_started ||
847                      !rte_spinlock_trylock(&rxq->lock)))
848                 return 0;
849
850 #if defined(RTE_ARCH_X86) || defined(RTE_ARCH_ARM64)
851         /*
852          * Replenish buffers if needed when a transition has been made from
853          * vector- to non-vector- receive processing.
854          */
855         while (unlikely(rxq->rxrearm_nb)) {
856                 if (!bnxt_alloc_rx_data(rxq, rxr, rxq->rxrearm_start)) {
857                         rxr->rx_prod = rxq->rxrearm_start;
858                         bnxt_db_write(&rxr->rx_db, rxr->rx_prod);
859                         rxq->rxrearm_start++;
860                         rxq->rxrearm_nb--;
861                 } else {
862                         /* Retry allocation on next call. */
863                         break;
864                 }
865         }
866 #endif
867
868         /* Handle RX burst request */
869         while (1) {
870                 cons = RING_CMP(cpr->cp_ring_struct, raw_cons);
871                 rte_prefetch0(&cpr->cp_desc_ring[cons]);
872                 rxcmp = (struct rx_pkt_cmpl *)&cpr->cp_desc_ring[cons];
873
874                 if (!CMP_VALID(rxcmp, raw_cons, cpr->cp_ring_struct))
875                         break;
876                 cpr->valid = FLIP_VALID(cons,
877                                         cpr->cp_ring_struct->ring_mask,
878                                         cpr->valid);
879
880                 /* TODO: Avoid magic numbers... */
881                 if ((CMP_TYPE(rxcmp) & 0x30) == 0x10) {
882                         rc = bnxt_rx_pkt(&rx_pkts[nb_rx_pkts], rxq, &raw_cons);
883                         if (likely(!rc) || rc == -ENOMEM)
884                                 nb_rx_pkts++;
885                         if (rc == -EBUSY)       /* partial completion */
886                                 break;
887                         if (rc == -ENODEV)      /* completion for representor */
888                                 nb_rep_rx_pkts++;
889                 } else if (!BNXT_NUM_ASYNC_CPR(rxq->bp)) {
890                         evt =
891                         bnxt_event_hwrm_resp_handler(rxq->bp,
892                                                      (struct cmpl_base *)rxcmp);
893                         /* If the async event is Fatal error, return */
894                         if (unlikely(is_bnxt_in_error(rxq->bp)))
895                                 goto done;
896                 }
897
898                 raw_cons = NEXT_RAW_CMP(raw_cons);
899                 if (nb_rx_pkts == nb_pkts || evt)
900                         break;
901                 /* Post some Rx buf early in case of larger burst processing */
902                 if (nb_rx_pkts == BNXT_RX_POST_THRESH)
903                         bnxt_db_write(&rxr->rx_db, rxr->rx_prod);
904         }
905
906         cpr->cp_raw_cons = raw_cons;
907         if (!nb_rx_pkts && !nb_rep_rx_pkts && !evt) {
908                 /*
909                  * For PMD, there is no need to keep on pushing to REARM
910                  * the doorbell if there are no new completions
911                  */
912                 goto done;
913         }
914
915         if (prod != rxr->rx_prod)
916                 bnxt_db_write(&rxr->rx_db, rxr->rx_prod);
917
918         /* Ring the AGG ring DB */
919         if (ag_prod != rxr->ag_prod)
920                 bnxt_db_write(&rxr->ag_db, rxr->ag_prod);
921
922         bnxt_db_cq(cpr);
923
924         /* Attempt to alloc Rx buf in case of a previous allocation failure. */
925         if (rc == -ENOMEM) {
926                 int i = RING_NEXT(rxr->rx_ring_struct, prod);
927                 int cnt = nb_rx_pkts;
928
929                 for (; cnt;
930                         i = RING_NEXT(rxr->rx_ring_struct, i), cnt--) {
931                         struct rte_mbuf **rx_buf = &rxr->rx_buf_ring[i];
932
933                         /* Buffer already allocated for this index. */
934                         if (*rx_buf != NULL && *rx_buf != &rxq->fake_mbuf)
935                                 continue;
936
937                         /* This slot is empty. Alloc buffer for Rx */
938                         if (!bnxt_alloc_rx_data(rxq, rxr, i)) {
939                                 rxr->rx_prod = i;
940                                 bnxt_db_write(&rxr->rx_db, rxr->rx_prod);
941                         } else {
942                                 PMD_DRV_LOG(ERR, "Alloc  mbuf failed\n");
943                                 break;
944                         }
945                 }
946         }
947
948 done:
949         rte_spinlock_unlock(&rxq->lock);
950
951         return nb_rx_pkts;
952 }
953
954 /*
955  * Dummy DPDK callback for RX.
956  *
957  * This function is used to temporarily replace the real callback during
958  * unsafe control operations on the queue, or in case of error.
959  */
960 uint16_t
961 bnxt_dummy_recv_pkts(void *rx_queue __rte_unused,
962                      struct rte_mbuf **rx_pkts __rte_unused,
963                      uint16_t nb_pkts __rte_unused)
964 {
965         return 0;
966 }
967
968 void bnxt_free_rx_rings(struct bnxt *bp)
969 {
970         int i;
971         struct bnxt_rx_queue *rxq;
972
973         if (!bp->rx_queues)
974                 return;
975
976         for (i = 0; i < (int)bp->rx_nr_rings; i++) {
977                 rxq = bp->rx_queues[i];
978                 if (!rxq)
979                         continue;
980
981                 bnxt_free_ring(rxq->rx_ring->rx_ring_struct);
982                 rte_free(rxq->rx_ring->rx_ring_struct);
983
984                 /* Free the Aggregator ring */
985                 bnxt_free_ring(rxq->rx_ring->ag_ring_struct);
986                 rte_free(rxq->rx_ring->ag_ring_struct);
987                 rxq->rx_ring->ag_ring_struct = NULL;
988
989                 rte_free(rxq->rx_ring);
990
991                 bnxt_free_ring(rxq->cp_ring->cp_ring_struct);
992                 rte_free(rxq->cp_ring->cp_ring_struct);
993                 rte_free(rxq->cp_ring);
994
995                 rte_free(rxq);
996                 bp->rx_queues[i] = NULL;
997         }
998 }
999
1000 int bnxt_init_rx_ring_struct(struct bnxt_rx_queue *rxq, unsigned int socket_id)
1001 {
1002         struct rte_eth_dev *eth_dev = rxq->bp->eth_dev;
1003         struct rte_eth_rxmode *rxmode;
1004         struct bnxt_cp_ring_info *cpr;
1005         struct bnxt_rx_ring_info *rxr;
1006         struct bnxt_ring *ring;
1007         bool use_agg_ring;
1008
1009         rxq->rx_buf_size = BNXT_MAX_PKT_LEN + sizeof(struct rte_mbuf);
1010
1011         rxr = rte_zmalloc_socket("bnxt_rx_ring",
1012                                  sizeof(struct bnxt_rx_ring_info),
1013                                  RTE_CACHE_LINE_SIZE, socket_id);
1014         if (rxr == NULL)
1015                 return -ENOMEM;
1016         rxq->rx_ring = rxr;
1017
1018         ring = rte_zmalloc_socket("bnxt_rx_ring_struct",
1019                                    sizeof(struct bnxt_ring),
1020                                    RTE_CACHE_LINE_SIZE, socket_id);
1021         if (ring == NULL)
1022                 return -ENOMEM;
1023         rxr->rx_ring_struct = ring;
1024         ring->ring_size = rte_align32pow2(rxq->nb_rx_desc);
1025         ring->ring_mask = ring->ring_size - 1;
1026         ring->bd = (void *)rxr->rx_desc_ring;
1027         ring->bd_dma = rxr->rx_desc_mapping;
1028
1029         /* Allocate extra rx ring entries for vector rx. */
1030         ring->vmem_size = sizeof(struct rte_mbuf *) *
1031                                 (ring->ring_size + RTE_BNXT_DESCS_PER_LOOP);
1032
1033         ring->vmem = (void **)&rxr->rx_buf_ring;
1034         ring->fw_ring_id = INVALID_HW_RING_ID;
1035
1036         cpr = rte_zmalloc_socket("bnxt_rx_ring",
1037                                  sizeof(struct bnxt_cp_ring_info),
1038                                  RTE_CACHE_LINE_SIZE, socket_id);
1039         if (cpr == NULL)
1040                 return -ENOMEM;
1041         rxq->cp_ring = cpr;
1042
1043         ring = rte_zmalloc_socket("bnxt_rx_ring_struct",
1044                                    sizeof(struct bnxt_ring),
1045                                    RTE_CACHE_LINE_SIZE, socket_id);
1046         if (ring == NULL)
1047                 return -ENOMEM;
1048         cpr->cp_ring_struct = ring;
1049
1050         rxmode = &eth_dev->data->dev_conf.rxmode;
1051         use_agg_ring = (rxmode->offloads & DEV_RX_OFFLOAD_SCATTER) ||
1052                        (rxmode->offloads & DEV_RX_OFFLOAD_TCP_LRO) ||
1053                        (rxmode->max_rx_pkt_len >
1054                          (uint32_t)(rte_pktmbuf_data_room_size(rxq->mb_pool) -
1055                                     RTE_PKTMBUF_HEADROOM));
1056
1057         /* Allocate two completion slots per entry in desc ring. */
1058         ring->ring_size = rxr->rx_ring_struct->ring_size * 2;
1059
1060         /* Allocate additional slots if aggregation ring is in use. */
1061         if (use_agg_ring)
1062                 ring->ring_size *= AGG_RING_SIZE_FACTOR;
1063
1064         ring->ring_size = rte_align32pow2(ring->ring_size);
1065         ring->ring_mask = ring->ring_size - 1;
1066         ring->bd = (void *)cpr->cp_desc_ring;
1067         ring->bd_dma = cpr->cp_desc_mapping;
1068         ring->vmem_size = 0;
1069         ring->vmem = NULL;
1070         ring->fw_ring_id = INVALID_HW_RING_ID;
1071
1072         /* Allocate Aggregator rings */
1073         ring = rte_zmalloc_socket("bnxt_rx_ring_struct",
1074                                    sizeof(struct bnxt_ring),
1075                                    RTE_CACHE_LINE_SIZE, socket_id);
1076         if (ring == NULL)
1077                 return -ENOMEM;
1078         rxr->ag_ring_struct = ring;
1079         ring->ring_size = rte_align32pow2(rxq->nb_rx_desc *
1080                                           AGG_RING_SIZE_FACTOR);
1081         ring->ring_mask = ring->ring_size - 1;
1082         ring->bd = (void *)rxr->ag_desc_ring;
1083         ring->bd_dma = rxr->ag_desc_mapping;
1084         ring->vmem_size = ring->ring_size * sizeof(struct rte_mbuf *);
1085         ring->vmem = (void **)&rxr->ag_buf_ring;
1086         ring->fw_ring_id = INVALID_HW_RING_ID;
1087
1088         return 0;
1089 }
1090
1091 static void bnxt_init_rxbds(struct bnxt_ring *ring, uint32_t type,
1092                             uint16_t len)
1093 {
1094         uint32_t j;
1095         struct rx_prod_pkt_bd *rx_bd_ring = (struct rx_prod_pkt_bd *)ring->bd;
1096
1097         if (!rx_bd_ring)
1098                 return;
1099         for (j = 0; j < ring->ring_size; j++) {
1100                 rx_bd_ring[j].flags_type = rte_cpu_to_le_16(type);
1101                 rx_bd_ring[j].len = rte_cpu_to_le_16(len);
1102                 rx_bd_ring[j].opaque = j;
1103         }
1104 }
1105
1106 int bnxt_init_one_rx_ring(struct bnxt_rx_queue *rxq)
1107 {
1108         struct bnxt_rx_ring_info *rxr;
1109         struct bnxt_ring *ring;
1110         uint32_t prod, type;
1111         unsigned int i;
1112         uint16_t size;
1113
1114         /* Initialize packet type table. */
1115         bnxt_init_ptype_table();
1116
1117         /* Initialize offload flags parsing table. */
1118         bnxt_init_ol_flags_tables();
1119
1120         size = rte_pktmbuf_data_room_size(rxq->mb_pool) - RTE_PKTMBUF_HEADROOM;
1121         size = RTE_MIN(BNXT_MAX_PKT_LEN, size);
1122
1123         type = RX_PROD_PKT_BD_TYPE_RX_PROD_PKT | RX_PROD_PKT_BD_FLAGS_EOP_PAD;
1124
1125         rxr = rxq->rx_ring;
1126         ring = rxr->rx_ring_struct;
1127         bnxt_init_rxbds(ring, type, size);
1128
1129         prod = rxr->rx_prod;
1130         for (i = 0; i < ring->ring_size; i++) {
1131                 if (unlikely(!rxr->rx_buf_ring[i])) {
1132                         if (bnxt_alloc_rx_data(rxq, rxr, prod) != 0) {
1133                                 PMD_DRV_LOG(WARNING,
1134                                             "init'ed rx ring %d with %d/%d mbufs only\n",
1135                                             rxq->queue_id, i, ring->ring_size);
1136                                 break;
1137                         }
1138                 }
1139                 rxr->rx_prod = prod;
1140                 prod = RING_NEXT(rxr->rx_ring_struct, prod);
1141         }
1142
1143         /* Initialize dummy mbuf pointers for vector mode rx. */
1144         for (i = ring->ring_size;
1145              i < ring->ring_size + RTE_BNXT_DESCS_PER_LOOP; i++) {
1146                 rxr->rx_buf_ring[i] = &rxq->fake_mbuf;
1147         }
1148
1149         ring = rxr->ag_ring_struct;
1150         type = RX_PROD_AGG_BD_TYPE_RX_PROD_AGG;
1151         bnxt_init_rxbds(ring, type, size);
1152         prod = rxr->ag_prod;
1153
1154         for (i = 0; i < ring->ring_size; i++) {
1155                 if (unlikely(!rxr->ag_buf_ring[i])) {
1156                         if (bnxt_alloc_ag_data(rxq, rxr, prod) != 0) {
1157                                 PMD_DRV_LOG(WARNING,
1158                                             "init'ed AG ring %d with %d/%d mbufs only\n",
1159                                             rxq->queue_id, i, ring->ring_size);
1160                                 break;
1161                         }
1162                 }
1163                 rxr->ag_prod = prod;
1164                 prod = RING_NEXT(rxr->ag_ring_struct, prod);
1165         }
1166         PMD_DRV_LOG(DEBUG, "AGG Done!\n");
1167
1168         if (rxr->tpa_info) {
1169                 unsigned int max_aggs = BNXT_TPA_MAX_AGGS(rxq->bp);
1170
1171                 for (i = 0; i < max_aggs; i++) {
1172                         if (unlikely(!rxr->tpa_info[i].mbuf)) {
1173                                 rxr->tpa_info[i].mbuf =
1174                                         __bnxt_alloc_rx_data(rxq->mb_pool);
1175                                 if (!rxr->tpa_info[i].mbuf) {
1176                                         rte_atomic64_inc(&rxq->rx_mbuf_alloc_fail);
1177                                         return -ENOMEM;
1178                                 }
1179                         }
1180                 }
1181         }
1182         PMD_DRV_LOG(DEBUG, "TPA alloc Done!\n");
1183
1184         return 0;
1185 }