drivers/net/bnxt/bnxt_rxr.c

   1 /* SPDX-License-Identifier: BSD-3-Clause
   2  * Copyright(c) 2014-2018 Broadcom
   3  * All rights reserved.
   4  */
   5
   6 #include <inttypes.h>
   7 #include <stdbool.h>
   8
   9 #include <rte_bitmap.h>
  10 #include <rte_byteorder.h>
  11 #include <rte_malloc.h>
  12 #include <rte_memory.h>
  13
  14 #include "bnxt.h"
  15 #include "bnxt_reps.h"
  16 #include "bnxt_ring.h"
  17 #include "bnxt_rxr.h"
  18 #include "bnxt_rxq.h"
  19 #include "hsi_struct_def_dpdk.h"
  20 #ifdef RTE_LIBRTE_IEEE1588
  21 #include "bnxt_hwrm.h"
  22 #endif
  23
  24 #include <bnxt_tf_common.h>
  25 #include <ulp_mark_mgr.h>
  26
  27 /*
  28  * RX Ring handling
  29  */
  30
  31 static inline struct rte_mbuf *__bnxt_alloc_rx_data(struct rte_mempool *mb)
  32 {
  33         struct rte_mbuf *data;
  34
  35         data = rte_mbuf_raw_alloc(mb);
  36
  37         return data;
  38 }
  39
  40 static inline int bnxt_alloc_rx_data(struct bnxt_rx_queue *rxq,
  41                                      struct bnxt_rx_ring_info *rxr,
  42                                      uint16_t raw_prod)
  43 {
  44         uint16_t prod = RING_IDX(rxr->rx_ring_struct, raw_prod);
  45         struct rx_prod_pkt_bd *rxbd;
  46         struct rte_mbuf **rx_buf;
  47         struct rte_mbuf *mbuf;
  48
  49         rxbd = &rxr->rx_desc_ring[prod];
  50         rx_buf = &rxr->rx_buf_ring[prod];
  51         mbuf = __bnxt_alloc_rx_data(rxq->mb_pool);
  52         if (!mbuf) {
  53                 rte_atomic64_inc(&rxq->rx_mbuf_alloc_fail);
  54                 return -ENOMEM;
  55         }
  56
  57         *rx_buf = mbuf;
  58         mbuf->data_off = RTE_PKTMBUF_HEADROOM;
  59
  60         rxbd->address = rte_cpu_to_le_64(rte_mbuf_data_iova_default(mbuf));
  61
  62         return 0;
  63 }
  64
  65 static inline int bnxt_alloc_ag_data(struct bnxt_rx_queue *rxq,
  66                                      struct bnxt_rx_ring_info *rxr,
  67                                      uint16_t raw_prod)
  68 {
  69         uint16_t prod = RING_IDX(rxr->ag_ring_struct, raw_prod);
  70         struct rx_prod_pkt_bd *rxbd;
  71         struct rte_mbuf **rx_buf;
  72         struct rte_mbuf *mbuf;
  73
  74         rxbd = &rxr->ag_desc_ring[prod];
  75         rx_buf = &rxr->ag_buf_ring[prod];
  76         if (rxbd == NULL) {
  77                 PMD_DRV_LOG(ERR, "Jumbo Frame. rxbd is NULL\n");
  78                 return -EINVAL;
  79         }
  80
  81         if (rx_buf == NULL) {
  82                 PMD_DRV_LOG(ERR, "Jumbo Frame. rx_buf is NULL\n");
  83                 return -EINVAL;
  84         }
  85
  86         mbuf = __bnxt_alloc_rx_data(rxq->mb_pool);
  87         if (!mbuf) {
  88                 rte_atomic64_inc(&rxq->rx_mbuf_alloc_fail);
  89                 return -ENOMEM;
  90         }
  91
  92         *rx_buf = mbuf;
  93         mbuf->data_off = RTE_PKTMBUF_HEADROOM;
  94
  95         rxbd->address = rte_cpu_to_le_64(rte_mbuf_data_iova_default(mbuf));
  96
  97         return 0;
  98 }
  99
 100 static inline void bnxt_reuse_rx_mbuf(struct bnxt_rx_ring_info *rxr,
 101                                struct rte_mbuf *mbuf)
 102 {
 103         uint16_t prod, raw_prod = RING_NEXT(rxr->rx_raw_prod);
 104         struct rte_mbuf **prod_rx_buf;
 105         struct rx_prod_pkt_bd *prod_bd;
 106
 107         prod = RING_IDX(rxr->rx_ring_struct, raw_prod);
 108         prod_rx_buf = &rxr->rx_buf_ring[prod];
 109
 110         RTE_ASSERT(*prod_rx_buf == NULL);
 111         RTE_ASSERT(mbuf != NULL);
 112
 113         *prod_rx_buf = mbuf;
 114
 115         prod_bd = &rxr->rx_desc_ring[prod];
 116
 117         prod_bd->address = rte_cpu_to_le_64(rte_mbuf_data_iova_default(mbuf));
 118
 119         rxr->rx_raw_prod = raw_prod;
 120 }
 121
 122 static inline
 123 struct rte_mbuf *bnxt_consume_rx_buf(struct bnxt_rx_ring_info *rxr,
 124                                      uint16_t cons)
 125 {
 126         struct rte_mbuf **cons_rx_buf;
 127         struct rte_mbuf *mbuf;
 128
 129         cons_rx_buf = &rxr->rx_buf_ring[RING_IDX(rxr->rx_ring_struct, cons)];
 130         RTE_ASSERT(*cons_rx_buf != NULL);
 131         mbuf = *cons_rx_buf;
 132         *cons_rx_buf = NULL;
 133
 134         return mbuf;
 135 }
 136
 137 static void bnxt_tpa_start(struct bnxt_rx_queue *rxq,
 138                            struct rx_tpa_start_cmpl *tpa_start,
 139                            struct rx_tpa_start_cmpl_hi *tpa_start1)
 140 {
 141         struct bnxt_rx_ring_info *rxr = rxq->rx_ring;
 142         uint16_t agg_id;
 143         uint16_t data_cons;
 144         struct bnxt_tpa_info *tpa_info;
 145         struct rte_mbuf *mbuf;
 146
 147         agg_id = bnxt_tpa_start_agg_id(rxq->bp, tpa_start);
 148
 149         data_cons = tpa_start->opaque;
 150         tpa_info = &rxr->tpa_info[agg_id];
 151
 152         mbuf = bnxt_consume_rx_buf(rxr, data_cons);
 153
 154         bnxt_reuse_rx_mbuf(rxr, tpa_info->mbuf);
 155
 156         tpa_info->agg_count = 0;
 157         tpa_info->mbuf = mbuf;
 158         tpa_info->len = rte_le_to_cpu_32(tpa_start->len);
 159
 160         mbuf->data_off = RTE_PKTMBUF_HEADROOM;
 161         mbuf->nb_segs = 1;
 162         mbuf->next = NULL;
 163         mbuf->pkt_len = rte_le_to_cpu_32(tpa_start->len);
 164         mbuf->data_len = mbuf->pkt_len;
 165         mbuf->port = rxq->port_id;
 166         mbuf->ol_flags = PKT_RX_LRO;
 167         if (likely(tpa_start->flags_type &
 168                    rte_cpu_to_le_32(RX_TPA_START_CMPL_FLAGS_RSS_VALID))) {
 169                 mbuf->hash.rss = rte_le_to_cpu_32(tpa_start->rss_hash);
 170                 mbuf->ol_flags |= PKT_RX_RSS_HASH;
 171         } else {
 172                 mbuf->hash.fdir.id = rte_le_to_cpu_16(tpa_start1->cfa_code);
 173                 mbuf->ol_flags |= PKT_RX_FDIR | PKT_RX_FDIR_ID;
 174         }
 175         if (tpa_start1->flags2 &
 176             rte_cpu_to_le_32(RX_TPA_START_CMPL_FLAGS2_META_FORMAT_VLAN)) {
 177                 mbuf->vlan_tci = rte_le_to_cpu_32(tpa_start1->metadata);
 178                 mbuf->ol_flags |= PKT_RX_VLAN | PKT_RX_VLAN_STRIPPED;
 179         }
 180         if (likely(tpa_start1->flags2 &
 181                    rte_cpu_to_le_32(RX_TPA_START_CMPL_FLAGS2_L4_CS_CALC)))
 182                 mbuf->ol_flags |= PKT_RX_L4_CKSUM_GOOD;
 183
 184         /* recycle next mbuf */
 185         data_cons = RING_NEXT(data_cons);
 186         bnxt_reuse_rx_mbuf(rxr, bnxt_consume_rx_buf(rxr, data_cons));
 187 }
 188
 189 static int bnxt_agg_bufs_valid(struct bnxt_cp_ring_info *cpr,
 190                 uint8_t agg_bufs, uint32_t raw_cp_cons)
 191 {
 192         uint16_t last_cp_cons;
 193         struct rx_pkt_cmpl *agg_cmpl;
 194
 195         raw_cp_cons = ADV_RAW_CMP(raw_cp_cons, agg_bufs);
 196         last_cp_cons = RING_CMP(cpr->cp_ring_struct, raw_cp_cons);
 197         agg_cmpl = (struct rx_pkt_cmpl *)&cpr->cp_desc_ring[last_cp_cons];
 198         cpr->valid = FLIP_VALID(raw_cp_cons,
 199                                 cpr->cp_ring_struct->ring_mask,
 200                                 cpr->valid);
 201         return CMP_VALID(agg_cmpl, raw_cp_cons, cpr->cp_ring_struct);
 202 }
 203
 204 /* TPA consume agg buffer out of order, allocate connected data only */
 205 static int bnxt_prod_ag_mbuf(struct bnxt_rx_queue *rxq)
 206 {
 207         struct bnxt_rx_ring_info *rxr = rxq->rx_ring;
 208         uint16_t raw_next = RING_NEXT(rxr->ag_raw_prod);
 209         uint16_t bmap_next = RING_IDX(rxr->ag_ring_struct, raw_next);
 210
 211         /* TODO batch allocation for better performance */
 212         while (rte_bitmap_get(rxr->ag_bitmap, bmap_next)) {
 213                 if (unlikely(bnxt_alloc_ag_data(rxq, rxr, raw_next))) {
 214                         PMD_DRV_LOG(ERR, "agg mbuf alloc failed: prod=0x%x\n",
 215                                     raw_next);
 216                         break;
 217                 }
 218                 rte_bitmap_clear(rxr->ag_bitmap, bmap_next);
 219                 rxr->ag_raw_prod = raw_next;
 220                 raw_next = RING_NEXT(raw_next);
 221                 bmap_next = RING_IDX(rxr->ag_ring_struct, raw_next);
 222         }
 223
 224         return 0;
 225 }
 226
 227 static int bnxt_rx_pages(struct bnxt_rx_queue *rxq,
 228                          struct rte_mbuf *mbuf, uint32_t *tmp_raw_cons,
 229                          uint8_t agg_buf, struct bnxt_tpa_info *tpa_info)
 230 {
 231         struct bnxt_cp_ring_info *cpr = rxq->cp_ring;
 232         struct bnxt_rx_ring_info *rxr = rxq->rx_ring;
 233         int i;
 234         uint16_t cp_cons, ag_cons;
 235         struct rx_pkt_cmpl *rxcmp;
 236         struct rte_mbuf *last = mbuf;
 237         bool is_p5_tpa = tpa_info && BNXT_CHIP_P5(rxq->bp);
 238
 239         for (i = 0; i < agg_buf; i++) {
 240                 struct rte_mbuf **ag_buf;
 241                 struct rte_mbuf *ag_mbuf;
 242
 243                 if (is_p5_tpa) {
 244                         rxcmp = (void *)&tpa_info->agg_arr[i];
 245                 } else {
 246                         *tmp_raw_cons = NEXT_RAW_CMP(*tmp_raw_cons);
 247                         cp_cons = RING_CMP(cpr->cp_ring_struct, *tmp_raw_cons);
 248                         rxcmp = (struct rx_pkt_cmpl *)
 249                                         &cpr->cp_desc_ring[cp_cons];
 250                 }
 251
 252 #ifdef BNXT_DEBUG
 253                 bnxt_dump_cmpl(cp_cons, rxcmp);
 254 #endif
 255
 256                 ag_cons = rxcmp->opaque;
 257                 RTE_ASSERT(ag_cons <= rxr->ag_ring_struct->ring_mask);
 258                 ag_buf = &rxr->ag_buf_ring[ag_cons];
 259                 ag_mbuf = *ag_buf;
 260                 RTE_ASSERT(ag_mbuf != NULL);
 261
 262                 ag_mbuf->data_len = rte_le_to_cpu_16(rxcmp->len);
 263
 264                 mbuf->nb_segs++;
 265                 mbuf->pkt_len += ag_mbuf->data_len;
 266
 267                 last->next = ag_mbuf;
 268                 last = ag_mbuf;
 269
 270                 *ag_buf = NULL;
 271
 272                 /*
 273                  * As aggregation buffer consumed out of order in TPA module,
 274                  * use bitmap to track freed slots to be allocated and notified
 275                  * to NIC
 276                  */
 277                 rte_bitmap_set(rxr->ag_bitmap, ag_cons);
 278         }
 279         bnxt_prod_ag_mbuf(rxq);
 280         return 0;
 281 }
 282
 283 static inline struct rte_mbuf *bnxt_tpa_end(
 284                 struct bnxt_rx_queue *rxq,
 285                 uint32_t *raw_cp_cons,
 286                 struct rx_tpa_end_cmpl *tpa_end,
 287                 struct rx_tpa_end_cmpl_hi *tpa_end1)
 288 {
 289         struct bnxt_cp_ring_info *cpr = rxq->cp_ring;
 290         struct bnxt_rx_ring_info *rxr = rxq->rx_ring;
 291         uint16_t agg_id;
 292         struct rte_mbuf *mbuf;
 293         uint8_t agg_bufs;
 294         uint8_t payload_offset;
 295         struct bnxt_tpa_info *tpa_info;
 296
 297         if (BNXT_CHIP_P5(rxq->bp)) {
 298                 struct rx_tpa_v2_end_cmpl *th_tpa_end;
 299                 struct rx_tpa_v2_end_cmpl_hi *th_tpa_end1;
 300
 301                 th_tpa_end = (void *)tpa_end;
 302                 th_tpa_end1 = (void *)tpa_end1;
 303                 agg_id = BNXT_TPA_END_AGG_ID_TH(th_tpa_end);
 304                 agg_bufs = BNXT_TPA_END_AGG_BUFS_TH(th_tpa_end1);
 305                 payload_offset = th_tpa_end1->payload_offset;
 306         } else {
 307                 agg_id = BNXT_TPA_END_AGG_ID(tpa_end);
 308                 agg_bufs = BNXT_TPA_END_AGG_BUFS(tpa_end);
 309                 if (!bnxt_agg_bufs_valid(cpr, agg_bufs, *raw_cp_cons))
 310                         return NULL;
 311                 payload_offset = tpa_end->payload_offset;
 312         }
 313
 314         tpa_info = &rxr->tpa_info[agg_id];
 315         mbuf = tpa_info->mbuf;
 316         RTE_ASSERT(mbuf != NULL);
 317
 318         if (agg_bufs) {
 319                 bnxt_rx_pages(rxq, mbuf, raw_cp_cons, agg_bufs, tpa_info);
 320         }
 321         mbuf->l4_len = payload_offset;
 322
 323         struct rte_mbuf *new_data = __bnxt_alloc_rx_data(rxq->mb_pool);
 324         RTE_ASSERT(new_data != NULL);
 325         if (!new_data) {
 326                 rte_atomic64_inc(&rxq->rx_mbuf_alloc_fail);
 327                 return NULL;
 328         }
 329         tpa_info->mbuf = new_data;
 330
 331         return mbuf;
 332 }
 333
 334 uint32_t bnxt_ptype_table[BNXT_PTYPE_TBL_DIM] __rte_cache_aligned;
 335
 336 static void __rte_cold
 337 bnxt_init_ptype_table(void)
 338 {
 339         uint32_t *pt = bnxt_ptype_table;
 340         static bool initialized;
 341         int ip6, tun, type;
 342         uint32_t l3;
 343         int i;
 344
 345         if (initialized)
 346                 return;
 347
 348         for (i = 0; i < BNXT_PTYPE_TBL_DIM; i++) {
 349                 if (i & (RX_PKT_CMPL_FLAGS2_META_FORMAT_VLAN >> 2))
 350                         pt[i] = RTE_PTYPE_L2_ETHER_VLAN;
 351                 else
 352                         pt[i] = RTE_PTYPE_L2_ETHER;
 353
 354                 ip6 = i & (RX_PKT_CMPL_FLAGS2_IP_TYPE >> 7);
 355                 tun = i & (RX_PKT_CMPL_FLAGS2_T_IP_CS_CALC >> 2);
 356                 type = (i & 0x38) << 9;
 357
 358                 if (!tun && !ip6)
 359                         l3 = RTE_PTYPE_L3_IPV4_EXT_UNKNOWN;
 360                 else if (!tun && ip6)
 361                         l3 = RTE_PTYPE_L3_IPV6_EXT_UNKNOWN;
 362                 else if (tun && !ip6)
 363                         l3 = RTE_PTYPE_INNER_L3_IPV4_EXT_UNKNOWN;
 364                 else
 365                         l3 = RTE_PTYPE_INNER_L3_IPV6_EXT_UNKNOWN;
 366
 367                 switch (type) {
 368                 case RX_PKT_CMPL_FLAGS_ITYPE_ICMP:
 369                         if (tun)
 370                                 pt[i] |= l3 | RTE_PTYPE_INNER_L4_ICMP;
 371                         else
 372                                 pt[i] |= l3 | RTE_PTYPE_L4_ICMP;
 373                         break;
 374                 case RX_PKT_CMPL_FLAGS_ITYPE_TCP:
 375                         if (tun)
 376                                 pt[i] |= l3 | RTE_PTYPE_INNER_L4_TCP;
 377                         else
 378                                 pt[i] |= l3 | RTE_PTYPE_L4_TCP;
 379                         break;
 380                 case RX_PKT_CMPL_FLAGS_ITYPE_UDP:
 381                         if (tun)
 382                                 pt[i] |= l3 | RTE_PTYPE_INNER_L4_UDP;
 383                         else
 384                                 pt[i] |= l3 | RTE_PTYPE_L4_UDP;
 385                         break;
 386                 case RX_PKT_CMPL_FLAGS_ITYPE_IP:
 387                         pt[i] |= l3;
 388                         break;
 389                 }
 390         }
 391         initialized = true;
 392 }
 393
 394 static uint32_t
 395 bnxt_parse_pkt_type(struct rx_pkt_cmpl *rxcmp, struct rx_pkt_cmpl_hi *rxcmp1)
 396 {
 397         uint32_t flags_type, flags2;
 398         uint8_t index;
 399
 400         flags_type = rte_le_to_cpu_16(rxcmp->flags_type);
 401         flags2 = rte_le_to_cpu_32(rxcmp1->flags2);
 402
 403         /*
 404          * Index format:
 405          *     bit 0: RX_PKT_CMPL_FLAGS2_T_IP_CS_CALC
 406          *     bit 1: RX_CMPL_FLAGS2_IP_TYPE
 407          *     bit 2: RX_PKT_CMPL_FLAGS2_META_FORMAT_VLAN
 408          *     bits 3-6: RX_PKT_CMPL_FLAGS_ITYPE
 409          */
 410         index = ((flags_type & RX_PKT_CMPL_FLAGS_ITYPE_MASK) >> 9) |
 411                 ((flags2 & (RX_PKT_CMPL_FLAGS2_META_FORMAT_VLAN |
 412                            RX_PKT_CMPL_FLAGS2_T_IP_CS_CALC)) >> 2) |
 413                 ((flags2 & RX_PKT_CMPL_FLAGS2_IP_TYPE) >> 7);
 414
 415         return bnxt_ptype_table[index];
 416 }
 417
 418 uint32_t
 419 bnxt_ol_flags_table[BNXT_OL_FLAGS_TBL_DIM] __rte_cache_aligned;
 420
 421 uint32_t
 422 bnxt_ol_flags_err_table[BNXT_OL_FLAGS_ERR_TBL_DIM] __rte_cache_aligned;
 423
 424 static void __rte_cold
 425 bnxt_init_ol_flags_tables(void)
 426 {
 427         static bool initialized;
 428         uint32_t *pt;
 429         int i;
 430
 431         if (initialized)
 432                 return;
 433
 434         /* Initialize ol_flags table. */
 435         pt = bnxt_ol_flags_table;
 436         for (i = 0; i < BNXT_OL_FLAGS_TBL_DIM; i++) {
 437                 pt[i] = 0;
 438                 if (i & RX_PKT_CMPL_FLAGS2_META_FORMAT_VLAN)
 439                         pt[i] |= PKT_RX_VLAN | PKT_RX_VLAN_STRIPPED;
 440
 441                 if (i & RX_PKT_CMPL_FLAGS2_IP_CS_CALC)
 442                         pt[i] |= PKT_RX_IP_CKSUM_GOOD;
 443
 444                 if (i & RX_PKT_CMPL_FLAGS2_L4_CS_CALC)
 445                         pt[i] |= PKT_RX_L4_CKSUM_GOOD;
 446
 447                 if (i & RX_PKT_CMPL_FLAGS2_T_L4_CS_CALC)
 448                         pt[i] |= PKT_RX_OUTER_L4_CKSUM_GOOD;
 449         }
 450
 451         /* Initialize checksum error table. */
 452         pt = bnxt_ol_flags_err_table;
 453         for (i = 0; i < BNXT_OL_FLAGS_ERR_TBL_DIM; i++) {
 454                 pt[i] = 0;
 455                 if (i & (RX_PKT_CMPL_ERRORS_IP_CS_ERROR >> 4))
 456                         pt[i] |= PKT_RX_IP_CKSUM_BAD;
 457
 458                 if (i & (RX_PKT_CMPL_ERRORS_L4_CS_ERROR >> 4))
 459                         pt[i] |= PKT_RX_L4_CKSUM_BAD;
 460
 461                 if (i & (RX_PKT_CMPL_ERRORS_T_IP_CS_ERROR >> 4))
 462                         pt[i] |= PKT_RX_EIP_CKSUM_BAD;
 463
 464                 if (i & (RX_PKT_CMPL_ERRORS_T_L4_CS_ERROR >> 4))
 465                         pt[i] |= PKT_RX_OUTER_L4_CKSUM_BAD;
 466         }
 467
 468         initialized = true;
 469 }
 470
 471 static void
 472 bnxt_set_ol_flags(struct rx_pkt_cmpl *rxcmp, struct rx_pkt_cmpl_hi *rxcmp1,
 473                   struct rte_mbuf *mbuf)
 474 {
 475         uint16_t flags_type, errors, flags;
 476         uint64_t ol_flags;
 477
 478         flags_type = rte_le_to_cpu_16(rxcmp->flags_type);
 479
 480         flags = rte_le_to_cpu_32(rxcmp1->flags2) &
 481                                 (RX_PKT_CMPL_FLAGS2_IP_CS_CALC |
 482                                  RX_PKT_CMPL_FLAGS2_L4_CS_CALC |
 483                                  RX_PKT_CMPL_FLAGS2_T_IP_CS_CALC |
 484                                  RX_PKT_CMPL_FLAGS2_T_L4_CS_CALC |
 485                                  RX_PKT_CMPL_FLAGS2_META_FORMAT_VLAN);
 486
 487         errors = rte_le_to_cpu_16(rxcmp1->errors_v2) &
 488                                 (RX_PKT_CMPL_ERRORS_IP_CS_ERROR |
 489                                  RX_PKT_CMPL_ERRORS_L4_CS_ERROR |
 490                                  RX_PKT_CMPL_ERRORS_T_IP_CS_ERROR |
 491                                  RX_PKT_CMPL_ERRORS_T_L4_CS_ERROR);
 492         errors = (errors >> 4) & flags;
 493
 494         ol_flags = bnxt_ol_flags_table[flags & ~errors];
 495
 496         if (errors)
 497                 ol_flags |= bnxt_ol_flags_err_table[errors];
 498
 499         if (flags_type & RX_PKT_CMPL_FLAGS_RSS_VALID) {
 500                 mbuf->hash.rss = rte_le_to_cpu_32(rxcmp->rss_hash);
 501                 ol_flags |= PKT_RX_RSS_HASH;
 502         }
 503
 504         mbuf->ol_flags = ol_flags;
 505 }
 506
 507 #ifdef RTE_LIBRTE_IEEE1588
 508 static void
 509 bnxt_get_rx_ts_p5(struct bnxt *bp, uint32_t rx_ts_cmpl)
 510 {
 511         uint64_t systime_cycles = 0;
 512
 513         if (!BNXT_CHIP_P5(bp))
 514                 return;
 515
 516         /* On Thor, Rx timestamps are provided directly in the
 517          * Rx completion records to the driver. Only 32 bits of
 518          * the timestamp is present in the completion. Driver needs
 519          * to read the current 48 bit free running timer using the
 520          * HWRM_PORT_TS_QUERY command and combine the upper 16 bits
 521          * from the HWRM response with the lower 32 bits in the
 522          * Rx completion to produce the 48 bit timestamp for the Rx packet
 523          */
 524         bnxt_hwrm_port_ts_query(bp, BNXT_PTP_FLAGS_CURRENT_TIME,
 525                                 &systime_cycles);
 526         bp->ptp_cfg->rx_timestamp = (systime_cycles & 0xFFFF00000000);
 527         bp->ptp_cfg->rx_timestamp |= rx_ts_cmpl;
 528 }
 529 #endif
 530
 531 static uint32_t
 532 bnxt_ulp_set_mark_in_mbuf(struct bnxt *bp, struct rx_pkt_cmpl_hi *rxcmp1,
 533                           struct rte_mbuf *mbuf, uint32_t *vfr_flag)
 534 {
 535         uint32_t cfa_code;
 536         uint32_t meta_fmt;
 537         uint32_t meta;
 538         bool gfid = false;
 539         uint32_t mark_id;
 540         uint32_t flags2;
 541         uint32_t gfid_support = 0;
 542         int rc;
 543
 544         if (BNXT_GFID_ENABLED(bp))
 545                 gfid_support = 1;
 546
 547         cfa_code = rte_le_to_cpu_16(rxcmp1->cfa_code);
 548         flags2 = rte_le_to_cpu_32(rxcmp1->flags2);
 549         meta = rte_le_to_cpu_32(rxcmp1->metadata);
 550
 551         /*
 552          * The flags field holds extra bits of info from [6:4]
 553          * which indicate if the flow is in TCAM or EM or EEM
 554          */
 555         meta_fmt = (flags2 & BNXT_CFA_META_FMT_MASK) >>
 556                 BNXT_CFA_META_FMT_SHFT;
 557
 558         switch (meta_fmt) {
 559         case 0:
 560                 if (gfid_support) {
 561                         /* Not an LFID or GFID, a flush cmd. */
 562                         goto skip_mark;
 563                 } else {
 564                         /* LFID mode, no vlan scenario */
 565                         gfid = false;
 566                 }
 567                 break;
 568         case 4:
 569         case 5:
 570                 /*
 571                  * EM/TCAM case
 572                  * Assume that EM doesn't support Mark due to GFID
 573                  * collisions with EEM.  Simply return without setting the mark
 574                  * in the mbuf.
 575                  */
 576                 if (BNXT_CFA_META_EM_TEST(meta)) {
 577                         /*This is EM hit {EM(1), GFID[27:16], 19'd0 or vtag } */
 578                         gfid = true;
 579                         meta >>= BNXT_RX_META_CFA_CODE_SHIFT;
 580                         cfa_code |= meta << BNXT_CFA_CODE_META_SHIFT;
 581                 } else {
 582                         /*
 583                          * It is a TCAM entry, so it is an LFID.
 584                          * The TCAM IDX and Mode can also be determined
 585                          * by decoding the meta_data. We are not
 586                          * using these for now.
 587                          */
 588                 }
 589                 break;
 590         case 6:
 591         case 7:
 592                 /* EEM Case, only using gfid in EEM for now. */
 593                 gfid = true;
 594
 595                 /*
 596                  * For EEM flows, The first part of cfa_code is 16 bits.
 597                  * The second part is embedded in the
 598                  * metadata field from bit 19 onwards. The driver needs to
 599                  * ignore the first 19 bits of metadata and use the next 12
 600                  * bits as higher 12 bits of cfa_code.
 601                  */
 602                 meta >>= BNXT_RX_META_CFA_CODE_SHIFT;
 603                 cfa_code |= meta << BNXT_CFA_CODE_META_SHIFT;
 604                 break;
 605         default:
 606                 /* For other values, the cfa_code is assumed to be an LFID. */
 607                 break;
 608         }
 609
 610         rc = ulp_mark_db_mark_get(bp->ulp_ctx, gfid,
 611                                   cfa_code, vfr_flag, &mark_id);
 612         if (!rc) {
 613                 /* VF to VFR Rx path. So, skip mark_id injection in mbuf */
 614                 if (vfr_flag && *vfr_flag)
 615                         return mark_id;
 616                 /* Got the mark, write it to the mbuf and return */
 617                 mbuf->hash.fdir.hi = mark_id;
 618                 *bnxt_cfa_code_dynfield(mbuf) = cfa_code & 0xffffffffull;
 619                 mbuf->hash.fdir.id = rxcmp1->cfa_code;
 620                 mbuf->ol_flags |= PKT_RX_FDIR | PKT_RX_FDIR_ID;
 621                 return mark_id;
 622         }
 623
 624 skip_mark:
 625         mbuf->hash.fdir.hi = 0;
 626         mbuf->hash.fdir.id = 0;
 627
 628         return 0;
 629 }
 630
 631 void bnxt_set_mark_in_mbuf(struct bnxt *bp,
 632                            struct rx_pkt_cmpl_hi *rxcmp1,
 633                            struct rte_mbuf *mbuf)
 634 {
 635         uint32_t cfa_code = 0;
 636         uint8_t meta_fmt = 0;
 637         uint16_t flags2 = 0;
 638         uint32_t meta =  0;
 639
 640         cfa_code = rte_le_to_cpu_16(rxcmp1->cfa_code);
 641         if (!cfa_code)
 642                 return;
 643
 644         if (cfa_code && !bp->mark_table[cfa_code].valid)
 645                 return;
 646
 647         flags2 = rte_le_to_cpu_16(rxcmp1->flags2);
 648         meta = rte_le_to_cpu_32(rxcmp1->metadata);
 649         if (meta) {
 650                 meta >>= BNXT_RX_META_CFA_CODE_SHIFT;
 651
 652                 /* The flags field holds extra bits of info from [6:4]
 653                  * which indicate if the flow is in TCAM or EM or EEM
 654                  */
 655                 meta_fmt = (flags2 & BNXT_CFA_META_FMT_MASK) >>
 656                            BNXT_CFA_META_FMT_SHFT;
 657
 658                 /* meta_fmt == 4 => 'b100 => 'b10x => EM.
 659                  * meta_fmt == 5 => 'b101 => 'b10x => EM + VLAN
 660                  * meta_fmt == 6 => 'b110 => 'b11x => EEM
 661                  * meta_fmt == 7 => 'b111 => 'b11x => EEM + VLAN.
 662                  */
 663                 meta_fmt >>= BNXT_CFA_META_FMT_EM_EEM_SHFT;
 664         }
 665
 666         mbuf->hash.fdir.hi = bp->mark_table[cfa_code].mark_id;
 667         mbuf->ol_flags |= PKT_RX_FDIR | PKT_RX_FDIR_ID;
 668 }
 669
 670 static int bnxt_rx_pkt(struct rte_mbuf **rx_pkt,
 671                        struct bnxt_rx_queue *rxq, uint32_t *raw_cons)
 672 {
 673         struct bnxt_cp_ring_info *cpr = rxq->cp_ring;
 674         struct bnxt_rx_ring_info *rxr = rxq->rx_ring;
 675         struct rx_pkt_cmpl *rxcmp;
 676         struct rx_pkt_cmpl_hi *rxcmp1;
 677         uint32_t tmp_raw_cons = *raw_cons;
 678         uint16_t cons, raw_prod, cp_cons =
 679             RING_CMP(cpr->cp_ring_struct, tmp_raw_cons);
 680         struct rte_mbuf *mbuf;
 681         int rc = 0;
 682         uint8_t agg_buf = 0;
 683         uint16_t cmp_type;
 684         uint32_t vfr_flag = 0, mark_id = 0;
 685         struct bnxt *bp = rxq->bp;
 686
 687         rxcmp = (struct rx_pkt_cmpl *)
 688             &cpr->cp_desc_ring[cp_cons];
 689
 690         cmp_type = CMP_TYPE(rxcmp);
 691
 692         if (cmp_type == RX_TPA_V2_ABUF_CMPL_TYPE_RX_TPA_AGG) {
 693                 struct rx_tpa_v2_abuf_cmpl *rx_agg = (void *)rxcmp;
 694                 uint16_t agg_id = rte_cpu_to_le_16(rx_agg->agg_id);
 695                 struct bnxt_tpa_info *tpa_info;
 696
 697                 tpa_info = &rxr->tpa_info[agg_id];
 698                 RTE_ASSERT(tpa_info->agg_count < 16);
 699                 tpa_info->agg_arr[tpa_info->agg_count++] = *rx_agg;
 700                 rc = -EINVAL; /* Continue w/o new mbuf */
 701                 goto next_rx;
 702         }
 703
 704         tmp_raw_cons = NEXT_RAW_CMP(tmp_raw_cons);
 705         cp_cons = RING_CMP(cpr->cp_ring_struct, tmp_raw_cons);
 706         rxcmp1 = (struct rx_pkt_cmpl_hi *)&cpr->cp_desc_ring[cp_cons];
 707
 708         if (!CMP_VALID(rxcmp1, tmp_raw_cons, cpr->cp_ring_struct))
 709                 return -EBUSY;
 710
 711         cpr->valid = FLIP_VALID(cp_cons,
 712                                 cpr->cp_ring_struct->ring_mask,
 713                                 cpr->valid);
 714
 715         if (cmp_type == RX_TPA_START_CMPL_TYPE_RX_TPA_START) {
 716                 bnxt_tpa_start(rxq, (struct rx_tpa_start_cmpl *)rxcmp,
 717                                (struct rx_tpa_start_cmpl_hi *)rxcmp1);
 718                 rc = -EINVAL; /* Continue w/o new mbuf */
 719                 goto next_rx;
 720         } else if (cmp_type == RX_TPA_END_CMPL_TYPE_RX_TPA_END) {
 721                 mbuf = bnxt_tpa_end(rxq, &tmp_raw_cons,
 722                                    (struct rx_tpa_end_cmpl *)rxcmp,
 723                                    (struct rx_tpa_end_cmpl_hi *)rxcmp1);
 724                 if (unlikely(!mbuf))
 725                         return -EBUSY;
 726                 *rx_pkt = mbuf;
 727                 goto next_rx;
 728         } else if (cmp_type != 0x11) {
 729                 rc = -EINVAL;
 730                 goto next_rx;
 731         }
 732
 733         agg_buf = (rxcmp->agg_bufs_v1 & RX_PKT_CMPL_AGG_BUFS_MASK)
 734                         >> RX_PKT_CMPL_AGG_BUFS_SFT;
 735         if (agg_buf && !bnxt_agg_bufs_valid(cpr, agg_buf, tmp_raw_cons))
 736                 return -EBUSY;
 737
 738         raw_prod = rxr->rx_raw_prod;
 739
 740         cons = rxcmp->opaque;
 741         mbuf = bnxt_consume_rx_buf(rxr, cons);
 742         if (mbuf == NULL)
 743                 return -EBUSY;
 744
 745         mbuf->data_off = RTE_PKTMBUF_HEADROOM;
 746         mbuf->nb_segs = 1;
 747         mbuf->next = NULL;
 748         mbuf->pkt_len = rxcmp->len;
 749         mbuf->data_len = mbuf->pkt_len;
 750         mbuf->port = rxq->port_id;
 751
 752         bnxt_set_ol_flags(rxcmp, rxcmp1, mbuf);
 753
 754 #ifdef RTE_LIBRTE_IEEE1588
 755         if (unlikely((rte_le_to_cpu_16(rxcmp->flags_type) &
 756                       RX_PKT_CMPL_FLAGS_MASK) ==
 757                       RX_PKT_CMPL_FLAGS_ITYPE_PTP_W_TIMESTAMP)) {
 758                 mbuf->ol_flags |= PKT_RX_IEEE1588_PTP | PKT_RX_IEEE1588_TMST;
 759                 bnxt_get_rx_ts_p5(rxq->bp, rxcmp1->reorder);
 760         }
 761 #endif
 762
 763         if (BNXT_TRUFLOW_EN(bp))
 764                 mark_id = bnxt_ulp_set_mark_in_mbuf(rxq->bp, rxcmp1, mbuf,
 765                                                     &vfr_flag);
 766         else
 767                 bnxt_set_mark_in_mbuf(rxq->bp, rxcmp1, mbuf);
 768
 769         if (agg_buf)
 770                 bnxt_rx_pages(rxq, mbuf, &tmp_raw_cons, agg_buf, NULL);
 771
 772         mbuf->packet_type = bnxt_parse_pkt_type(rxcmp, rxcmp1);
 773
 774 #ifdef BNXT_DEBUG
 775         if (rxcmp1->errors_v2 & RX_CMP_L2_ERRORS) {
 776                 /* Re-install the mbuf back to the rx ring */
 777                 bnxt_reuse_rx_mbuf(rxr, cons, mbuf);
 778
 779                 rc = -EIO;
 780                 goto next_rx;
 781         }
 782 #endif
 783         /*
 784          * TODO: Redesign this....
 785          * If the allocation fails, the packet does not get received.
 786          * Simply returning this will result in slowly falling behind
 787          * on the producer ring buffers.
 788          * Instead, "filling up" the producer just before ringing the
 789          * doorbell could be a better solution since it will let the
 790          * producer ring starve until memory is available again pushing
 791          * the drops into hardware and getting them out of the driver
 792          * allowing recovery to a full producer ring.
 793          *
 794          * This could also help with cache usage by preventing per-packet
 795          * calls in favour of a tight loop with the same function being called
 796          * in it.
 797          */
 798         raw_prod = RING_NEXT(raw_prod);
 799         if (bnxt_alloc_rx_data(rxq, rxr, raw_prod)) {
 800                 PMD_DRV_LOG(ERR, "mbuf alloc failed with prod=0x%x\n",
 801                             raw_prod);
 802                 rc = -ENOMEM;
 803                 goto rx;
 804         }
 805         rxr->rx_raw_prod = raw_prod;
 806
 807         if (BNXT_TRUFLOW_EN(bp) && (BNXT_VF_IS_TRUSTED(bp) || BNXT_PF(bp)) &&
 808             vfr_flag) {
 809                 bnxt_vfr_recv(mark_id, rxq->queue_id, mbuf);
 810                 /* Now return an error so that nb_rx_pkts is not
 811                  * incremented.
 812                  * This packet was meant to be given to the representor.
 813                  * So no need to account the packet and give it to
 814                  * parent Rx burst function.
 815                  */
 816                 rc = -ENODEV;
 817                 goto next_rx;
 818         }
 819         /*
 820          * All MBUFs are allocated with the same size under DPDK,
 821          * no optimization for rx_copy_thresh
 822          */
 823 rx:
 824         *rx_pkt = mbuf;
 825
 826 next_rx:
 827
 828         *raw_cons = tmp_raw_cons;
 829
 830         return rc;
 831 }
 832
 833 uint16_t bnxt_recv_pkts(void *rx_queue, struct rte_mbuf **rx_pkts,
 834                                uint16_t nb_pkts)
 835 {
 836         struct bnxt_rx_queue *rxq = rx_queue;
 837         struct bnxt_cp_ring_info *cpr = rxq->cp_ring;
 838         struct bnxt_rx_ring_info *rxr = rxq->rx_ring;
 839         uint16_t rx_raw_prod = rxr->rx_raw_prod;
 840         uint16_t ag_raw_prod = rxr->ag_raw_prod;
 841         uint32_t raw_cons = cpr->cp_raw_cons;
 842         bool alloc_failed = false;
 843         uint32_t cons;
 844         int nb_rx_pkts = 0;
 845         int nb_rep_rx_pkts = 0;
 846         struct rx_pkt_cmpl *rxcmp;
 847         int rc = 0;
 848         bool evt = false;
 849
 850         if (unlikely(is_bnxt_in_error(rxq->bp)))
 851                 return 0;
 852
 853         /* If Rx Q was stopped return */
 854         if (unlikely(!rxq->rx_started))
 855                 return 0;
 856
 857 #if defined(RTE_ARCH_X86) || defined(RTE_ARCH_ARM64)
 858         /*
 859          * Replenish buffers if needed when a transition has been made from
 860          * vector- to non-vector- receive processing.
 861          */
 862         while (unlikely(rxq->rxrearm_nb)) {
 863                 if (!bnxt_alloc_rx_data(rxq, rxr, rxq->rxrearm_start)) {
 864                         rxr->rx_raw_prod = rxq->rxrearm_start;
 865                         bnxt_db_write(&rxr->rx_db, rxr->rx_raw_prod);
 866                         rxq->rxrearm_start++;
 867                         rxq->rxrearm_nb--;
 868                 } else {
 869                         /* Retry allocation on next call. */
 870                         break;
 871                 }
 872         }
 873 #endif
 874
 875         /* Handle RX burst request */
 876         while (1) {
 877                 cons = RING_CMP(cpr->cp_ring_struct, raw_cons);
 878                 rxcmp = (struct rx_pkt_cmpl *)&cpr->cp_desc_ring[cons];
 879
 880                 if (!CMP_VALID(rxcmp, raw_cons, cpr->cp_ring_struct))
 881                         break;
 882                 cpr->valid = FLIP_VALID(cons,
 883                                         cpr->cp_ring_struct->ring_mask,
 884                                         cpr->valid);
 885
 886                 /* TODO: Avoid magic numbers... */
 887                 if ((CMP_TYPE(rxcmp) & 0x30) == 0x10) {
 888                         rc = bnxt_rx_pkt(&rx_pkts[nb_rx_pkts], rxq, &raw_cons);
 889                         if (!rc)
 890                                 nb_rx_pkts++;
 891                         else if (rc == -EBUSY)  /* partial completion */
 892                                 break;
 893                         else if (rc == -ENODEV) /* completion for representor */
 894                                 nb_rep_rx_pkts++;
 895                         else if (rc == -ENOMEM) {
 896                                 nb_rx_pkts++;
 897                                 alloc_failed = true;
 898                         }
 899                 } else if (!BNXT_NUM_ASYNC_CPR(rxq->bp)) {
 900                         evt =
 901                         bnxt_event_hwrm_resp_handler(rxq->bp,
 902                                                      (struct cmpl_base *)rxcmp);
 903                         /* If the async event is Fatal error, return */
 904                         if (unlikely(is_bnxt_in_error(rxq->bp)))
 905                                 goto done;
 906                 }
 907
 908                 raw_cons = NEXT_RAW_CMP(raw_cons);
 909                 if (nb_rx_pkts == nb_pkts || nb_rep_rx_pkts == nb_pkts || evt)
 910                         break;
 911                 /* Post some Rx buf early in case of larger burst processing */
 912                 if (nb_rx_pkts == BNXT_RX_POST_THRESH)
 913                         bnxt_db_write(&rxr->rx_db, rxr->rx_raw_prod);
 914         }
 915
 916         cpr->cp_raw_cons = raw_cons;
 917         if (!nb_rx_pkts && !nb_rep_rx_pkts && !evt) {
 918                 /*
 919                  * For PMD, there is no need to keep on pushing to REARM
 920                  * the doorbell if there are no new completions
 921                  */
 922                 goto done;
 923         }
 924
 925         /* Ring the completion queue doorbell. */
 926         bnxt_db_cq(cpr);
 927
 928         /* Ring the receive descriptor doorbell. */
 929         if (rx_raw_prod != rxr->rx_raw_prod)
 930                 bnxt_db_write(&rxr->rx_db, rxr->rx_raw_prod);
 931
 932         /* Ring the AGG ring DB */
 933         if (ag_raw_prod != rxr->ag_raw_prod)
 934                 bnxt_db_write(&rxr->ag_db, rxr->ag_raw_prod);
 935
 936         /* Attempt to alloc Rx buf in case of a previous allocation failure. */
 937         if (alloc_failed) {
 938                 uint16_t cnt;
 939
 940                 rx_raw_prod = RING_NEXT(rx_raw_prod);
 941                 for (cnt = 0; cnt < nb_rx_pkts + nb_rep_rx_pkts; cnt++) {
 942                         struct rte_mbuf **rx_buf;
 943                         uint16_t ndx;
 944
 945                         ndx = RING_IDX(rxr->rx_ring_struct, rx_raw_prod + cnt);
 946                         rx_buf = &rxr->rx_buf_ring[ndx];
 947
 948                         /* Buffer already allocated for this index. */
 949                         if (*rx_buf != NULL && *rx_buf != &rxq->fake_mbuf)
 950                                 continue;
 951
 952                         /* This slot is empty. Alloc buffer for Rx */
 953                         if (!bnxt_alloc_rx_data(rxq, rxr, rx_raw_prod + cnt)) {
 954                                 rxr->rx_raw_prod = rx_raw_prod + cnt;
 955                                 bnxt_db_write(&rxr->rx_db, rxr->rx_raw_prod);
 956                         } else {
 957                                 PMD_DRV_LOG(ERR, "Alloc  mbuf failed\n");
 958                                 break;
 959                         }
 960                 }
 961         }
 962
 963 done:
 964         return nb_rx_pkts;
 965 }
 966
 967 /*
 968  * Dummy DPDK callback for RX.
 969  *
 970  * This function is used to temporarily replace the real callback during
 971  * unsafe control operations on the queue, or in case of error.
 972  */
 973 uint16_t
 974 bnxt_dummy_recv_pkts(void *rx_queue __rte_unused,
 975                      struct rte_mbuf **rx_pkts __rte_unused,
 976                      uint16_t nb_pkts __rte_unused)
 977 {
 978         return 0;
 979 }
 980
 981 void bnxt_free_rx_rings(struct bnxt *bp)
 982 {
 983         int i;
 984         struct bnxt_rx_queue *rxq;
 985
 986         if (!bp->rx_queues)
 987                 return;
 988
 989         for (i = 0; i < (int)bp->rx_nr_rings; i++) {
 990                 rxq = bp->rx_queues[i];
 991                 if (!rxq)
 992                         continue;
 993
 994                 bnxt_free_ring(rxq->rx_ring->rx_ring_struct);
 995                 rte_free(rxq->rx_ring->rx_ring_struct);
 996
 997                 /* Free the Aggregator ring */
 998                 bnxt_free_ring(rxq->rx_ring->ag_ring_struct);
 999                 rte_free(rxq->rx_ring->ag_ring_struct);
1000                 rxq->rx_ring->ag_ring_struct = NULL;
1001
1002                 rte_free(rxq->rx_ring);
1003
1004                 bnxt_free_ring(rxq->cp_ring->cp_ring_struct);
1005                 rte_free(rxq->cp_ring->cp_ring_struct);
1006                 rte_free(rxq->cp_ring);
1007
1008                 rte_free(rxq);
1009                 bp->rx_queues[i] = NULL;
1010         }
1011 }
1012
1013 int bnxt_init_rx_ring_struct(struct bnxt_rx_queue *rxq, unsigned int socket_id)
1014 {
1015         struct rte_eth_dev *eth_dev = rxq->bp->eth_dev;
1016         struct rte_eth_rxmode *rxmode;
1017         struct bnxt_cp_ring_info *cpr;
1018         struct bnxt_rx_ring_info *rxr;
1019         struct bnxt_ring *ring;
1020         bool use_agg_ring;
1021
1022         rxq->rx_buf_size = BNXT_MAX_PKT_LEN + sizeof(struct rte_mbuf);
1023
1024         rxr = rte_zmalloc_socket("bnxt_rx_ring",
1025                                  sizeof(struct bnxt_rx_ring_info),
1026                                  RTE_CACHE_LINE_SIZE, socket_id);
1027         if (rxr == NULL)
1028                 return -ENOMEM;
1029         rxq->rx_ring = rxr;
1030
1031         ring = rte_zmalloc_socket("bnxt_rx_ring_struct",
1032                                    sizeof(struct bnxt_ring),
1033                                    RTE_CACHE_LINE_SIZE, socket_id);
1034         if (ring == NULL)
1035                 return -ENOMEM;
1036         rxr->rx_ring_struct = ring;
1037         ring->ring_size = rte_align32pow2(rxq->nb_rx_desc);
1038         ring->ring_mask = ring->ring_size - 1;
1039         ring->bd = (void *)rxr->rx_desc_ring;
1040         ring->bd_dma = rxr->rx_desc_mapping;
1041
1042         /* Allocate extra rx ring entries for vector rx. */
1043         ring->vmem_size = sizeof(struct rte_mbuf *) *
1044                                 (ring->ring_size + RTE_BNXT_DESCS_PER_LOOP);
1045
1046         ring->vmem = (void **)&rxr->rx_buf_ring;
1047         ring->fw_ring_id = INVALID_HW_RING_ID;
1048
1049         cpr = rte_zmalloc_socket("bnxt_rx_ring",
1050                                  sizeof(struct bnxt_cp_ring_info),
1051                                  RTE_CACHE_LINE_SIZE, socket_id);
1052         if (cpr == NULL)
1053                 return -ENOMEM;
1054         rxq->cp_ring = cpr;
1055
1056         ring = rte_zmalloc_socket("bnxt_rx_ring_struct",
1057                                    sizeof(struct bnxt_ring),
1058                                    RTE_CACHE_LINE_SIZE, socket_id);
1059         if (ring == NULL)
1060                 return -ENOMEM;
1061         cpr->cp_ring_struct = ring;
1062
1063         rxmode = &eth_dev->data->dev_conf.rxmode;
1064         use_agg_ring = (rxmode->offloads & DEV_RX_OFFLOAD_SCATTER) ||
1065                        (rxmode->offloads & DEV_RX_OFFLOAD_TCP_LRO) ||
1066                        (rxmode->max_rx_pkt_len >
1067                          (uint32_t)(rte_pktmbuf_data_room_size(rxq->mb_pool) -
1068                                     RTE_PKTMBUF_HEADROOM));
1069
1070         /* Allocate two completion slots per entry in desc ring. */
1071         ring->ring_size = rxr->rx_ring_struct->ring_size * 2;
1072
1073         /* Allocate additional slots if aggregation ring is in use. */
1074         if (use_agg_ring)
1075                 ring->ring_size *= AGG_RING_SIZE_FACTOR;
1076
1077         ring->ring_size = rte_align32pow2(ring->ring_size);
1078         ring->ring_mask = ring->ring_size - 1;
1079         ring->bd = (void *)cpr->cp_desc_ring;
1080         ring->bd_dma = cpr->cp_desc_mapping;
1081         ring->vmem_size = 0;
1082         ring->vmem = NULL;
1083         ring->fw_ring_id = INVALID_HW_RING_ID;
1084
1085         /* Allocate Aggregator rings */
1086         ring = rte_zmalloc_socket("bnxt_rx_ring_struct",
1087                                    sizeof(struct bnxt_ring),
1088                                    RTE_CACHE_LINE_SIZE, socket_id);
1089         if (ring == NULL)
1090                 return -ENOMEM;
1091         rxr->ag_ring_struct = ring;
1092         ring->ring_size = rte_align32pow2(rxq->nb_rx_desc *
1093                                           AGG_RING_SIZE_FACTOR);
1094         ring->ring_mask = ring->ring_size - 1;
1095         ring->bd = (void *)rxr->ag_desc_ring;
1096         ring->bd_dma = rxr->ag_desc_mapping;
1097         ring->vmem_size = ring->ring_size * sizeof(struct rte_mbuf *);
1098         ring->vmem = (void **)&rxr->ag_buf_ring;
1099         ring->fw_ring_id = INVALID_HW_RING_ID;
1100
1101         return 0;
1102 }
1103
1104 static void bnxt_init_rxbds(struct bnxt_ring *ring, uint32_t type,
1105                             uint16_t len)
1106 {
1107         uint32_t j;
1108         struct rx_prod_pkt_bd *rx_bd_ring = (struct rx_prod_pkt_bd *)ring->bd;
1109
1110         if (!rx_bd_ring)
1111                 return;
1112         for (j = 0; j < ring->ring_size; j++) {
1113                 rx_bd_ring[j].flags_type = rte_cpu_to_le_16(type);
1114                 rx_bd_ring[j].len = rte_cpu_to_le_16(len);
1115                 rx_bd_ring[j].opaque = j;
1116         }
1117 }
1118
1119 int bnxt_init_one_rx_ring(struct bnxt_rx_queue *rxq)
1120 {
1121         struct bnxt_rx_ring_info *rxr;
1122         struct bnxt_ring *ring;
1123         uint32_t raw_prod, type;
1124         unsigned int i;
1125         uint16_t size;
1126
1127         /* Initialize packet type table. */
1128         bnxt_init_ptype_table();
1129
1130         /* Initialize offload flags parsing table. */
1131         bnxt_init_ol_flags_tables();
1132
1133         size = rte_pktmbuf_data_room_size(rxq->mb_pool) - RTE_PKTMBUF_HEADROOM;
1134         size = RTE_MIN(BNXT_MAX_PKT_LEN, size);
1135
1136         type = RX_PROD_PKT_BD_TYPE_RX_PROD_PKT;
1137
1138         rxr = rxq->rx_ring;
1139         ring = rxr->rx_ring_struct;
1140         bnxt_init_rxbds(ring, type, size);
1141
1142         raw_prod = rxr->rx_raw_prod;
1143         for (i = 0; i < ring->ring_size; i++) {
1144                 if (unlikely(!rxr->rx_buf_ring[i])) {
1145                         if (bnxt_alloc_rx_data(rxq, rxr, raw_prod) != 0) {
1146                                 PMD_DRV_LOG(WARNING,
1147                                             "init'ed rx ring %d with %d/%d mbufs only\n",
1148                                             rxq->queue_id, i, ring->ring_size);
1149                                 break;
1150                         }
1151                 }
1152                 rxr->rx_raw_prod = raw_prod;
1153                 raw_prod = RING_NEXT(raw_prod);
1154         }
1155
1156         /* Initialize dummy mbuf pointers for vector mode rx. */
1157         for (i = ring->ring_size;
1158              i < ring->ring_size + RTE_BNXT_DESCS_PER_LOOP; i++) {
1159                 rxr->rx_buf_ring[i] = &rxq->fake_mbuf;
1160         }
1161
1162         ring = rxr->ag_ring_struct;
1163         type = RX_PROD_AGG_BD_TYPE_RX_PROD_AGG;
1164         bnxt_init_rxbds(ring, type, size);
1165         raw_prod = rxr->ag_raw_prod;
1166
1167         for (i = 0; i < ring->ring_size; i++) {
1168                 if (unlikely(!rxr->ag_buf_ring[i])) {
1169                         if (bnxt_alloc_ag_data(rxq, rxr, raw_prod) != 0) {
1170                                 PMD_DRV_LOG(WARNING,
1171                                             "init'ed AG ring %d with %d/%d mbufs only\n",
1172                                             rxq->queue_id, i, ring->ring_size);
1173                                 break;
1174                         }
1175                 }
1176                 rxr->ag_raw_prod = raw_prod;
1177                 raw_prod = RING_NEXT(raw_prod);
1178         }
1179         PMD_DRV_LOG(DEBUG, "AGG Done!\n");
1180
1181         if (rxr->tpa_info) {
1182                 unsigned int max_aggs = BNXT_TPA_MAX_AGGS(rxq->bp);
1183
1184                 for (i = 0; i < max_aggs; i++) {
1185                         if (unlikely(!rxr->tpa_info[i].mbuf)) {
1186                                 rxr->tpa_info[i].mbuf =
1187                                         __bnxt_alloc_rx_data(rxq->mb_pool);
1188                                 if (!rxr->tpa_info[i].mbuf) {
1189                                         rte_atomic64_inc(&rxq->rx_mbuf_alloc_fail);
1190                                         return -ENOMEM;
1191                                 }
1192                         }
1193                 }
1194         }
1195         PMD_DRV_LOG(DEBUG, "TPA alloc Done!\n");
1196
1197         return 0;
1198 }