drivers/net/bnxt/bnxt_rxr.h

   1 /* SPDX-License-Identifier: BSD-3-Clause
   2  * Copyright(c) 2014-2018 Broadcom
   3  * All rights reserved.
   4  */
   5
   6 #ifndef _BNXT_RXR_H_
   7 #define _BNXT_RXR_H_
   8 #include "hsi_struct_def_dpdk.h"
   9
  10 #define BNXT_TPA_START_AGG_ID_PRE_TH(cmp) \
  11         ((rte_le_to_cpu_16((cmp)->agg_id) & RX_TPA_START_CMPL_AGG_ID_MASK) >> \
  12          RX_TPA_START_CMPL_AGG_ID_SFT)
  13
  14 #define BNXT_TPA_START_AGG_ID_TH(cmp) \
  15         rte_le_to_cpu_16((cmp)->agg_id)
  16
  17 static inline uint16_t bnxt_tpa_start_agg_id(struct bnxt *bp,
  18                                              struct rx_tpa_start_cmpl *cmp)
  19 {
  20         if (BNXT_CHIP_THOR(bp))
  21                 return BNXT_TPA_START_AGG_ID_TH(cmp);
  22         else
  23                 return BNXT_TPA_START_AGG_ID_PRE_TH(cmp);
  24 }
  25
  26 #define BNXT_TPA_END_AGG_BUFS(cmp) \
  27         (((cmp)->agg_bufs_v1 & RX_TPA_END_CMPL_AGG_BUFS_MASK) \
  28          >> RX_TPA_END_CMPL_AGG_BUFS_SFT)
  29
  30 #define BNXT_TPA_END_AGG_BUFS_TH(cmp) \
  31         ((cmp)->tpa_agg_bufs)
  32
  33 #define BNXT_TPA_END_AGG_ID(cmp) \
  34         (((cmp)->agg_id & RX_TPA_END_CMPL_AGG_ID_MASK) >> \
  35          RX_TPA_END_CMPL_AGG_ID_SFT)
  36
  37 #define BNXT_TPA_END_AGG_ID_TH(cmp) \
  38         rte_le_to_cpu_16((cmp)->agg_id)
  39
  40 #define BNXT_RX_POST_THRESH     32
  41
  42 /* Number of descriptors to process per inner loop in vector mode. */
  43 #define RTE_BNXT_DESCS_PER_LOOP         4U
  44
  45 struct bnxt_tpa_info {
  46         struct rte_mbuf                 *mbuf;
  47         uint16_t                        len;
  48         uint32_t                        agg_count;
  49         struct rx_tpa_v2_abuf_cmpl      agg_arr[TPA_MAX_NUM_SEGS];
  50 };
  51
  52 struct bnxt_rx_ring_info {
  53         uint16_t                rx_prod;
  54         uint16_t                ag_prod;
  55         uint16_t                rx_cons; /* Needed for representor */
  56         struct bnxt_db_info     rx_db;
  57         struct bnxt_db_info     ag_db;
  58
  59         struct rx_prod_pkt_bd   *rx_desc_ring;
  60         struct rx_prod_pkt_bd   *ag_desc_ring;
  61         struct rte_mbuf         **rx_buf_ring; /* sw ring */
  62         struct rte_mbuf         **ag_buf_ring; /* sw ring */
  63
  64         rte_iova_t              rx_desc_mapping;
  65         rte_iova_t              ag_desc_mapping;
  66
  67         struct bnxt_ring        *rx_ring_struct;
  68         struct bnxt_ring        *ag_ring_struct;
  69
  70         /*
  71          * To deal with out of order return from TPA, use free buffer indicator
  72          */
  73         struct rte_bitmap       *ag_bitmap;
  74
  75         struct bnxt_tpa_info *tpa_info;
  76 };
  77
  78 uint16_t bnxt_recv_pkts(void *rx_queue, struct rte_mbuf **rx_pkts,
  79                                uint16_t nb_pkts);
  80 void bnxt_free_rx_rings(struct bnxt *bp);
  81 int bnxt_init_rx_ring_struct(struct bnxt_rx_queue *rxq, unsigned int socket_id);
  82 int bnxt_init_one_rx_ring(struct bnxt_rx_queue *rxq);
  83 int bnxt_rx_queue_start(struct rte_eth_dev *dev, uint16_t rx_queue_id);
  84 int bnxt_rx_queue_stop(struct rte_eth_dev *dev, uint16_t rx_queue_id);
  85
  86 #if defined(RTE_ARCH_X86) || defined(RTE_ARCH_ARM64)
  87 uint16_t bnxt_recv_pkts_vec(void *rx_queue, struct rte_mbuf **rx_pkts,
  88                             uint16_t nb_pkts);
  89 int bnxt_rxq_vec_setup(struct bnxt_rx_queue *rxq);
  90 #endif
  91
  92 void bnxt_set_mark_in_mbuf(struct bnxt *bp,
  93                            struct rx_pkt_cmpl_hi *rxcmp1,
  94                            struct rte_mbuf *mbuf);
  95
  96 typedef uint32_t bnxt_cfa_code_dynfield_t;
  97 extern int bnxt_cfa_code_dynfield_offset;
  98
  99 static inline bnxt_cfa_code_dynfield_t *
 100 bnxt_cfa_code_dynfield(struct rte_mbuf *mbuf)
 101 {
 102         return RTE_MBUF_DYNFIELD(mbuf,
 103                 bnxt_cfa_code_dynfield_offset, bnxt_cfa_code_dynfield_t *);
 104 }
 105
 106 #define BNXT_RX_META_CFA_CODE_SHIFT             19
 107 #define BNXT_CFA_CODE_META_SHIFT                16
 108 #define BNXT_RX_META_CFA_CODE_INT_ACT_REC_BIT   0x8000000
 109 #define BNXT_RX_META_CFA_CODE_EEM_BIT           0x4000000
 110 #define BNXT_CFA_META_FMT_MASK                  0x70
 111 #define BNXT_CFA_META_FMT_SHFT                  4
 112 #define BNXT_CFA_META_FMT_EM_EEM_SHFT           1
 113 #define BNXT_CFA_META_FMT_EEM                   3
 114 #define BNXT_CFA_META_EEM_TCAM_SHIFT            31
 115 #define BNXT_CFA_META_EM_TEST(x) ((x) >> BNXT_CFA_META_EEM_TCAM_SHIFT)
 116
 117 #define BNXT_PTYPE_TBL_DIM      128
 118 extern uint32_t bnxt_ptype_table[BNXT_PTYPE_TBL_DIM];
 119
 120 #define BNXT_OL_FLAGS_TBL_DIM   32
 121 extern uint32_t bnxt_ol_flags_table[BNXT_OL_FLAGS_TBL_DIM];
 122
 123 #define BNXT_OL_FLAGS_ERR_TBL_DIM 16
 124 extern uint32_t bnxt_ol_flags_err_table[BNXT_OL_FLAGS_ERR_TBL_DIM];
 125 #endif