drivers/net/bnxt/bnxt_rxr.h

   1 /* SPDX-License-Identifier: BSD-3-Clause
   2  * Copyright(c) 2014-2018 Broadcom
   3  * All rights reserved.
   4  */
   5
   6 #ifndef _BNXT_RXR_H_
   7 #define _BNXT_RXR_H_
   8 #include "hsi_struct_def_dpdk.h"
   9
  10 #define BNXT_TPA_START_AGG_ID_PRE_TH(cmp) \
  11         ((rte_le_to_cpu_16((cmp)->agg_id) & RX_TPA_START_CMPL_AGG_ID_MASK) >> \
  12          RX_TPA_START_CMPL_AGG_ID_SFT)
  13
  14 #define BNXT_TPA_START_AGG_ID_TH(cmp) \
  15         rte_le_to_cpu_16((cmp)->agg_id)
  16
  17 static inline uint16_t bnxt_tpa_start_agg_id(struct bnxt *bp,
  18                                              struct rx_tpa_start_cmpl *cmp)
  19 {
  20         if (BNXT_CHIP_P5(bp))
  21                 return BNXT_TPA_START_AGG_ID_TH(cmp);
  22         else
  23                 return BNXT_TPA_START_AGG_ID_PRE_TH(cmp);
  24 }
  25
  26 #define BNXT_TPA_END_AGG_BUFS(cmp) \
  27         (((cmp)->agg_bufs_v1 & RX_TPA_END_CMPL_AGG_BUFS_MASK) \
  28          >> RX_TPA_END_CMPL_AGG_BUFS_SFT)
  29
  30 #define BNXT_TPA_END_AGG_BUFS_TH(cmp) \
  31         ((cmp)->tpa_agg_bufs)
  32
  33 #define BNXT_TPA_END_AGG_ID(cmp) \
  34         (((cmp)->agg_id & RX_TPA_END_CMPL_AGG_ID_MASK) >> \
  35          RX_TPA_END_CMPL_AGG_ID_SFT)
  36
  37 #define BNXT_TPA_END_AGG_ID_TH(cmp) \
  38         rte_le_to_cpu_16((cmp)->agg_id)
  39
  40 #define BNXT_RX_POST_THRESH     32
  41
  42 /* Number of descriptors to process per inner loop in vector mode. */
  43 #define RTE_BNXT_DESCS_PER_LOOP         4U
  44
  45 #define BNXT_OL_FLAGS_TBL_DIM   64
  46 #define BNXT_OL_FLAGS_ERR_TBL_DIM 32
  47
  48 struct bnxt_tpa_info {
  49         struct rte_mbuf                 *mbuf;
  50         uint16_t                        len;
  51         uint32_t                        agg_count;
  52         struct rx_tpa_v2_abuf_cmpl      agg_arr[TPA_MAX_NUM_SEGS];
  53
  54         uint32_t                        rss_hash;
  55         uint32_t                        vlan;
  56         uint16_t                        cfa_code;
  57         uint8_t                         hash_valid:1;
  58         uint8_t                         vlan_valid:1;
  59         uint8_t                         cfa_code_valid:1;
  60         uint8_t                         l4_csum_valid:1;
  61 };
  62
  63 struct bnxt_rx_ring_info {
  64         uint16_t                rx_raw_prod;
  65         uint16_t                ag_raw_prod;
  66         uint16_t                rx_cons; /* Needed for representor */
  67         struct bnxt_db_info     rx_db;
  68         struct bnxt_db_info     ag_db;
  69
  70         struct rx_prod_pkt_bd   *rx_desc_ring;
  71         struct rx_prod_pkt_bd   *ag_desc_ring;
  72         struct rte_mbuf         **rx_buf_ring; /* sw ring */
  73         struct rte_mbuf         **ag_buf_ring; /* sw ring */
  74
  75         rte_iova_t              rx_desc_mapping;
  76         rte_iova_t              ag_desc_mapping;
  77
  78         struct bnxt_ring        *rx_ring_struct;
  79         struct bnxt_ring        *ag_ring_struct;
  80
  81         /*
  82          * To deal with out of order return from TPA, use free buffer indicator
  83          */
  84         struct rte_bitmap       *ag_bitmap;
  85
  86         struct bnxt_tpa_info *tpa_info;
  87
  88         uint32_t ol_flags_table[BNXT_OL_FLAGS_TBL_DIM];
  89         uint32_t ol_flags_err_table[BNXT_OL_FLAGS_ERR_TBL_DIM];
  90 };
  91
  92 uint16_t bnxt_recv_pkts(void *rx_queue, struct rte_mbuf **rx_pkts,
  93                                uint16_t nb_pkts);
  94 void bnxt_free_rx_rings(struct bnxt *bp);
  95 int bnxt_init_rx_ring_struct(struct bnxt_rx_queue *rxq, unsigned int socket_id);
  96 int bnxt_init_one_rx_ring(struct bnxt_rx_queue *rxq);
  97 int bnxt_rx_queue_start(struct rte_eth_dev *dev, uint16_t rx_queue_id);
  98 int bnxt_rx_queue_stop(struct rte_eth_dev *dev, uint16_t rx_queue_id);
  99
 100 #if defined(RTE_ARCH_X86) || defined(RTE_ARCH_ARM64)
 101 uint16_t bnxt_recv_pkts_vec(void *rx_queue, struct rte_mbuf **rx_pkts,
 102                             uint16_t nb_pkts);
 103 int bnxt_rxq_vec_setup(struct bnxt_rx_queue *rxq);
 104 #endif
 105
 106 void bnxt_set_mark_in_mbuf(struct bnxt *bp,
 107                            struct rx_pkt_cmpl_hi *rxcmp1,
 108                            struct rte_mbuf *mbuf);
 109
 110 typedef uint32_t bnxt_cfa_code_dynfield_t;
 111 extern int bnxt_cfa_code_dynfield_offset;
 112
 113 static inline bnxt_cfa_code_dynfield_t *
 114 bnxt_cfa_code_dynfield(struct rte_mbuf *mbuf)
 115 {
 116         return RTE_MBUF_DYNFIELD(mbuf,
 117                 bnxt_cfa_code_dynfield_offset, bnxt_cfa_code_dynfield_t *);
 118 }
 119
 120 #define BNXT_RX_META_CFA_CODE_SHIFT             19
 121 #define BNXT_CFA_CODE_META_SHIFT                16
 122 #define BNXT_RX_META_CFA_CODE_INT_ACT_REC_BIT   0x8000000
 123 #define BNXT_RX_META_CFA_CODE_EEM_BIT           0x4000000
 124 #define BNXT_CFA_META_FMT_MASK                  0x70
 125 #define BNXT_CFA_META_FMT_SHFT                  4
 126 #define BNXT_CFA_META_FMT_EM_EEM_SHFT           1
 127 #define BNXT_CFA_META_FMT_EEM                   3
 128 #define BNXT_CFA_META_EEM_TCAM_SHIFT            31
 129 #define BNXT_CFA_META_EM_TEST(x) ((x) >> BNXT_CFA_META_EEM_TCAM_SHIFT)
 130
 131 #define BNXT_PTYPE_TBL_DIM      128
 132 extern uint32_t bnxt_ptype_table[BNXT_PTYPE_TBL_DIM];
 133
 134 /* Stingray2 specific code for RX completion parsing */
 135 #define RX_CMP_VLAN_VALID(rxcmp)        \
 136         (((struct rx_pkt_v2_cmpl *)rxcmp)->metadata1_payload_offset &   \
 137          RX_PKT_V2_CMPL_METADATA1_VALID)
 138
 139 #define RX_CMP_METADATA0_VID(rxcmp1)                            \
 140         ((((struct rx_pkt_v2_cmpl_hi *)rxcmp1)->metadata0) &    \
 141          (RX_PKT_V2_CMPL_HI_METADATA0_VID_MASK |                \
 142           RX_PKT_V2_CMPL_HI_METADATA0_DE  |                     \
 143           RX_PKT_V2_CMPL_HI_METADATA0_PRI_MASK))
 144
 145 static inline void bnxt_rx_vlan_v2(struct rte_mbuf *mbuf,
 146                                    struct rx_pkt_cmpl *rxcmp,
 147                                    struct rx_pkt_cmpl_hi *rxcmp1)
 148 {
 149         if (RX_CMP_VLAN_VALID(rxcmp)) {
 150                 mbuf->vlan_tci = RX_CMP_METADATA0_VID(rxcmp1);
 151                 mbuf->ol_flags |= PKT_RX_VLAN | PKT_RX_VLAN_STRIPPED;
 152         }
 153 }
 154
 155 #define RX_CMP_FLAGS2_CS_ALL_OK_MODE_MASK       (0x1 << 3)
 156 #define RX_CMP_FLAGS2_CS_OK_HDR_CNT_MASK        (0x7 << 10)
 157 #define RX_CMP_FLAGS2_IP_CSUM_ALL_OK_MASK       (0x1 << 13)
 158 #define RX_CMP_FLAGS2_L4_CSUM_ALL_OK_MASK       (0x1 << 14)
 159
 160 #define RX_CMP_V2_CS_OK_HDR_CNT(flags)                          \
 161         (((flags) & RX_CMP_FLAGS2_CS_OK_HDR_CNT_MASK) >>        \
 162          RX_PKT_V2_CMPL_HI_FLAGS2_CS_OK_SFT)
 163
 164 #define RX_CMP_V2_CS_ALL_OK_MODE(flags)                         \
 165         (((flags) & RX_CMP_FLAGS2_CS_ALL_OK_MODE_MASK))
 166
 167 #define RX_CMP_FLAGS2_L3_CS_OK_MASK             (0x7 << 10)
 168 #define RX_CMP_FLAGS2_L4_CS_OK_MASK             (0x38 << 10)
 169 #define RX_CMP_FLAGS2_L3_CS_OK_SFT              10
 170 #define RX_CMP_FLAGS2_L4_CS_OK_SFT              13
 171
 172 #define RX_CMP_V2_L4_CS_OK(flags2)                      \
 173         (((flags2) & RX_CMP_FLAGS2_L4_CS_OK_MASK) >>    \
 174          RX_CMP_FLAGS2_L4_CS_OK_SFT)
 175
 176 #define RX_CMP_V2_L3_CS_OK(flags2)                      \
 177         (((flags2) & RX_CMP_FLAGS2_L3_CS_OK_MASK) >>    \
 178          RX_CMP_FLAGS2_L3_CS_OK_SFT)
 179
 180 #define RX_CMP_V2_L4_CS_ERR(err)                                \
 181         (((err) & RX_PKT_V2_CMPL_HI_ERRORS_PKT_ERROR_MASK)  ==  \
 182          RX_PKT_V2_CMPL_HI_ERRORS_PKT_ERROR_L4_CS_ERROR)
 183
 184 #define RX_CMP_V2_L3_CS_ERR(err)                                \
 185         (((err) & RX_PKT_V2_CMPL_HI_ERRORS_PKT_ERROR_MASK) ==   \
 186          RX_PKT_V2_CMPL_HI_ERRORS_PKT_ERROR_IP_CS_ERROR)
 187
 188 #define RX_CMP_V2_T_IP_CS_ERR(err)                              \
 189         (((err) & RX_PKT_V2_CMPL_HI_ERRORS_T_PKT_ERROR_MASK) == \
 190          RX_PKT_V2_CMPL_HI_ERRORS_T_PKT_ERROR_T_IP_CS_ERROR)
 191
 192 #define RX_CMP_V2_T_L4_CS_ERR(err)                              \
 193         (((err) & RX_PKT_V2_CMPL_HI_ERRORS_T_PKT_ERROR_MASK) == \
 194          RX_PKT_V2_CMPL_HI_ERRORS_T_PKT_ERROR_T_L4_CS_ERROR)
 195
 196 #define RX_CMP_V2_OT_L4_CS_ERR(err)                                     \
 197         (((err) & RX_PKT_V2_CMPL_HI_ERRORS_OT_PKT_ERROR_MASK) ==        \
 198          RX_PKT_V2_CMPL_HI_ERRORS_OT_PKT_ERROR_OT_L4_CS_ERROR)
 199
 200 static inline void bnxt_parse_csum_v2(struct rte_mbuf *mbuf,
 201                                       struct rx_pkt_cmpl_hi *rxcmp1)
 202 {
 203         struct rx_pkt_v2_cmpl_hi *v2_cmp =
 204                 (struct rx_pkt_v2_cmpl_hi *)(rxcmp1);
 205         uint16_t error_v2 = rte_le_to_cpu_16(v2_cmp->errors_v2);
 206         uint32_t flags2 = rte_le_to_cpu_32(v2_cmp->flags2);
 207         uint32_t hdr_cnt = 0, t_pkt = 0;
 208
 209         if (RX_CMP_V2_CS_ALL_OK_MODE(flags2)) {
 210                 hdr_cnt = RX_CMP_V2_CS_OK_HDR_CNT(flags2);
 211                 if (hdr_cnt > 1)
 212                         t_pkt = 1;
 213
 214                 if (unlikely(RX_CMP_V2_L4_CS_ERR(error_v2)))
 215                         mbuf->ol_flags |= PKT_RX_L4_CKSUM_BAD;
 216                 else if (flags2 & RX_CMP_FLAGS2_L4_CSUM_ALL_OK_MASK)
 217                         mbuf->ol_flags |= PKT_RX_L4_CKSUM_GOOD;
 218                 else
 219                         mbuf->ol_flags |= PKT_RX_L4_CKSUM_UNKNOWN;
 220
 221                 if (unlikely(RX_CMP_V2_L3_CS_ERR(error_v2)))
 222                         mbuf->ol_flags |= PKT_RX_IP_CKSUM_BAD;
 223                 else if (flags2 & RX_CMP_FLAGS2_IP_CSUM_ALL_OK_MASK)
 224                         mbuf->ol_flags |= PKT_RX_IP_CKSUM_GOOD;
 225                 else
 226                         mbuf->ol_flags |= PKT_RX_IP_CKSUM_UNKNOWN;
 227         } else {
 228                 hdr_cnt = RX_CMP_V2_L4_CS_OK(flags2);
 229                 if (hdr_cnt > 1)
 230                         t_pkt = 1;
 231
 232                 if (RX_CMP_V2_L4_CS_OK(flags2))
 233                         mbuf->ol_flags |= PKT_RX_L4_CKSUM_GOOD;
 234                 else if (RX_CMP_V2_L4_CS_ERR(error_v2))
 235                         mbuf->ol_flags |= PKT_RX_L4_CKSUM_BAD;
 236                 else
 237                         mbuf->ol_flags |= PKT_RX_L4_CKSUM_UNKNOWN;
 238
 239                 if (RX_CMP_V2_L3_CS_OK(flags2))
 240                         mbuf->ol_flags |= PKT_RX_IP_CKSUM_GOOD;
 241                 else if (RX_CMP_V2_L3_CS_ERR(error_v2))
 242                         mbuf->ol_flags |= PKT_RX_IP_CKSUM_BAD;
 243                 else
 244                         mbuf->ol_flags |= PKT_RX_IP_CKSUM_UNKNOWN;
 245         }
 246
 247         if (t_pkt) {
 248                 if (unlikely(RX_CMP_V2_OT_L4_CS_ERR(error_v2) ||
 249                                         RX_CMP_V2_T_L4_CS_ERR(error_v2)))
 250                         mbuf->ol_flags |= PKT_RX_OUTER_L4_CKSUM_BAD;
 251                 else
 252                         mbuf->ol_flags |= PKT_RX_OUTER_L4_CKSUM_GOOD;
 253
 254                 if (unlikely(RX_CMP_V2_T_IP_CS_ERR(error_v2)))
 255                         mbuf->ol_flags |= PKT_RX_IP_CKSUM_BAD;
 256         }
 257 }
 258
 259 static inline void
 260 bnxt_parse_pkt_type_v2(struct rte_mbuf *mbuf,
 261                        struct rx_pkt_cmpl *rxcmp,
 262                        struct rx_pkt_cmpl_hi *rxcmp1)
 263 {
 264         struct rx_pkt_v2_cmpl *v2_cmp =
 265                 (struct rx_pkt_v2_cmpl *)(rxcmp);
 266         struct rx_pkt_v2_cmpl_hi *v2_cmp1 =
 267                 (struct rx_pkt_v2_cmpl_hi *)(rxcmp1);
 268         uint16_t flags_type = v2_cmp->flags_type &
 269                 rte_cpu_to_le_32(RX_PKT_V2_CMPL_FLAGS_ITYPE_MASK);
 270         uint32_t flags2 = rte_le_to_cpu_32(v2_cmp1->flags2);
 271         uint32_t l3, pkt_type = 0, vlan = 0;
 272         uint32_t ip6 = 0, t_pkt = 0;
 273         uint32_t hdr_cnt, csum_count;
 274
 275         if (RX_CMP_V2_CS_ALL_OK_MODE(flags2)) {
 276                 hdr_cnt = RX_CMP_V2_CS_OK_HDR_CNT(flags2);
 277                 if (hdr_cnt > 1)
 278                         t_pkt = 1;
 279         } else {
 280                 csum_count = RX_CMP_V2_L4_CS_OK(flags2);
 281                 if (csum_count > 1)
 282                         t_pkt = 1;
 283         }
 284
 285         vlan = !!RX_CMP_VLAN_VALID(rxcmp);
 286         pkt_type |= vlan ? RTE_PTYPE_L2_ETHER_VLAN : RTE_PTYPE_L2_ETHER;
 287
 288         ip6 = !!(flags2 & RX_PKT_V2_CMPL_HI_FLAGS2_IP_TYPE);
 289
 290         if (!t_pkt && !ip6)
 291                 l3 = RTE_PTYPE_L3_IPV4_EXT_UNKNOWN;
 292         else if (!t_pkt && ip6)
 293                 l3 = RTE_PTYPE_L3_IPV6_EXT_UNKNOWN;
 294         else if (t_pkt && !ip6)
 295                 l3 = RTE_PTYPE_INNER_L3_IPV4_EXT_UNKNOWN;
 296         else
 297                 l3 = RTE_PTYPE_INNER_L3_IPV6_EXT_UNKNOWN;
 298
 299         switch (flags_type) {
 300         case RTE_LE32(RX_PKT_V2_CMPL_FLAGS_ITYPE_ICMP):
 301                 if (!t_pkt)
 302                         pkt_type |= l3 | RTE_PTYPE_L4_ICMP;
 303                 else
 304                         pkt_type |= l3 | RTE_PTYPE_INNER_L4_ICMP;
 305                 break;
 306         case RTE_LE32(RX_PKT_V2_CMPL_FLAGS_ITYPE_TCP):
 307                 if (!t_pkt)
 308                         pkt_type |= l3 | RTE_PTYPE_L4_TCP;
 309                 else
 310                         pkt_type |= l3 | RTE_PTYPE_INNER_L4_TCP;
 311                 break;
 312         case RTE_LE32(RX_PKT_V2_CMPL_FLAGS_ITYPE_UDP):
 313                 if (!t_pkt)
 314                         pkt_type |= l3 | RTE_PTYPE_L4_UDP;
 315                 else
 316                         pkt_type |= l3 | RTE_PTYPE_INNER_L4_UDP;
 317                 break;
 318         case RTE_LE32(RX_PKT_V2_CMPL_FLAGS_ITYPE_IP):
 319                 pkt_type |= l3;
 320                 break;
 321         }
 322
 323         mbuf->packet_type = pkt_type;
 324 }
 325
 326 #endif /*  _BNXT_RXR_H_ */