e12bf8bb760985d57c99103574215adafd088c86
[dpdk.git] / drivers / net / bnxt / bnxt_rxtx_vec_sse.c
1 /* SPDX-License-Identifier: BSD-3-Clause */
2 /* Copyright(c) 2019-2020 Broadcom All rights reserved. */
3
4 #include <inttypes.h>
5 #include <stdbool.h>
6
7 #include <rte_bitmap.h>
8 #include <rte_byteorder.h>
9 #include <rte_malloc.h>
10 #include <rte_memory.h>
11 #include <rte_vect.h>
12
13 #include "bnxt.h"
14 #include "bnxt_cpr.h"
15 #include "bnxt_ring.h"
16
17 #include "bnxt_txq.h"
18 #include "bnxt_txr.h"
19 #include "bnxt_rxtx_vec_common.h"
20
21 /*
22  * RX Ring handling
23  */
24
25 #define GET_OL_FLAGS(rss_flags, ol_index, errors, pi, ol_flags)                \
26 {                                                                              \
27         uint32_t tmp, of;                                                      \
28                                                                                \
29         of = _mm_extract_epi32((rss_flags), (pi)) |                            \
30                 bnxt_ol_flags_table[_mm_extract_epi32((ol_index), (pi))];      \
31                                                                                \
32         tmp = _mm_extract_epi32((errors), (pi));                               \
33         if (tmp)                                                               \
34                 of |= bnxt_ol_flags_err_table[tmp];                            \
35         (ol_flags) = of;                                                       \
36 }
37
38 #define GET_DESC_FIELDS(rxcmp, rxcmp1, shuf_msk, ptype_idx, pi, ret)           \
39 {                                                                              \
40         uint32_t ptype;                                                        \
41         __m128i r;                                                             \
42                                                                                \
43         /* Set mbuf pkt_len, data_len, and rss_hash fields. */                 \
44         r = _mm_shuffle_epi8((rxcmp), (shuf_msk));                             \
45                                                                                \
46         /* Set packet type. */                                                 \
47         ptype = bnxt_ptype_table[_mm_extract_epi32((ptype_idx), (pi))];        \
48         r = _mm_blend_epi16(r, _mm_set_epi32(0, 0, 0, ptype), 0x3);            \
49                                                                                \
50         /* Set vlan_tci. */                                                    \
51         r = _mm_blend_epi16(r, _mm_slli_si128((rxcmp1), 6), 0x20);             \
52         (ret) = r;                                                             \
53 }
54
55 static inline void
56 descs_to_mbufs(__m128i mm_rxcmp[4], __m128i mm_rxcmp1[4],
57                __m128i mbuf_init, struct rte_mbuf **mbuf)
58 {
59         const __m128i shuf_msk =
60                 _mm_set_epi8(15, 14, 13, 12,          /* rss */
61                              0xFF, 0xFF,              /* vlan_tci (zeroes) */
62                              3, 2,                    /* data_len */
63                              0xFF, 0xFF, 3, 2,        /* pkt_len */
64                              0xFF, 0xFF, 0xFF, 0xFF); /* pkt_type (zeroes) */
65         const __m128i flags_type_mask =
66                 _mm_set1_epi32(RX_PKT_CMPL_FLAGS_ITYPE_MASK);
67         const __m128i flags2_mask1 =
68                 _mm_set1_epi32(RX_PKT_CMPL_FLAGS2_META_FORMAT_VLAN |
69                                RX_PKT_CMPL_FLAGS2_T_IP_CS_CALC);
70         const __m128i flags2_mask2 =
71                 _mm_set1_epi32(RX_PKT_CMPL_FLAGS2_IP_TYPE);
72         const __m128i rss_mask =
73                 _mm_set1_epi32(RX_PKT_CMPL_FLAGS_RSS_VALID);
74         __m128i t0, t1, flags_type, flags2, index, errors, rss_flags;
75         __m128i ptype_idx;
76         uint32_t ol_flags;
77
78         /* Compute packet type table indexes for four packets */
79         t0 = _mm_unpacklo_epi32(mm_rxcmp[0], mm_rxcmp[1]);
80         t1 = _mm_unpacklo_epi32(mm_rxcmp[2], mm_rxcmp[3]);
81         flags_type = _mm_unpacklo_epi64(t0, t1);
82         ptype_idx =
83                 _mm_srli_epi32(_mm_and_si128(flags_type, flags_type_mask), 9);
84
85         t0 = _mm_unpacklo_epi32(mm_rxcmp1[0], mm_rxcmp1[1]);
86         t1 = _mm_unpacklo_epi32(mm_rxcmp1[2], mm_rxcmp1[3]);
87         flags2 = _mm_unpacklo_epi64(t0, t1);
88
89         ptype_idx = _mm_or_si128(ptype_idx,
90                         _mm_srli_epi32(_mm_and_si128(flags2, flags2_mask1), 2));
91         ptype_idx = _mm_or_si128(ptype_idx,
92                         _mm_srli_epi32(_mm_and_si128(flags2, flags2_mask2), 7));
93
94         /* Extract RSS valid flags for four packets. */
95         rss_flags = _mm_srli_epi32(_mm_and_si128(flags_type, rss_mask), 9);
96
97         /* Extract errors_v2 fields for four packets. */
98         t0 = _mm_unpackhi_epi32(mm_rxcmp1[0], mm_rxcmp1[1]);
99         t1 = _mm_unpackhi_epi32(mm_rxcmp1[2], mm_rxcmp1[3]);
100
101         /* Compute ol_flags and checksum error indexes for four packets. */
102         flags2 = _mm_and_si128(flags2, _mm_set1_epi32(0x1F));
103
104         errors = _mm_srli_epi32(_mm_unpacklo_epi64(t0, t1), 4);
105         errors = _mm_and_si128(errors, _mm_set1_epi32(0xF));
106         errors = _mm_and_si128(errors, flags2);
107
108         index = _mm_andnot_si128(errors, flags2);
109
110         /* Update mbuf rearm_data for four packets. */
111         GET_OL_FLAGS(rss_flags, index, errors, 0, ol_flags);
112         _mm_store_si128((void *)&mbuf[0]->rearm_data,
113                         _mm_or_si128(mbuf_init, _mm_set_epi64x(ol_flags, 0)));
114
115         GET_OL_FLAGS(rss_flags, index, errors, 1, ol_flags);
116         _mm_store_si128((void *)&mbuf[1]->rearm_data,
117                         _mm_or_si128(mbuf_init, _mm_set_epi64x(ol_flags, 0)));
118
119         GET_OL_FLAGS(rss_flags, index, errors, 2, ol_flags);
120         _mm_store_si128((void *)&mbuf[2]->rearm_data,
121                         _mm_or_si128(mbuf_init, _mm_set_epi64x(ol_flags, 0)));
122
123         GET_OL_FLAGS(rss_flags, index, errors, 3, ol_flags);
124         _mm_store_si128((void *)&mbuf[3]->rearm_data,
125                         _mm_or_si128(mbuf_init, _mm_set_epi64x(ol_flags, 0)));
126
127         /* Update mbuf rx_descriptor_fields1 for four packes. */
128         GET_DESC_FIELDS(mm_rxcmp[0], mm_rxcmp1[0], shuf_msk, ptype_idx, 0, t0);
129         _mm_store_si128((void *)&mbuf[0]->rx_descriptor_fields1, t0);
130
131         GET_DESC_FIELDS(mm_rxcmp[1], mm_rxcmp1[1], shuf_msk, ptype_idx, 1, t0);
132         _mm_store_si128((void *)&mbuf[1]->rx_descriptor_fields1, t0);
133
134         GET_DESC_FIELDS(mm_rxcmp[2], mm_rxcmp1[2], shuf_msk, ptype_idx, 2, t0);
135         _mm_store_si128((void *)&mbuf[2]->rx_descriptor_fields1, t0);
136
137         GET_DESC_FIELDS(mm_rxcmp[3], mm_rxcmp1[3], shuf_msk, ptype_idx, 3, t0);
138         _mm_store_si128((void *)&mbuf[3]->rx_descriptor_fields1, t0);
139 }
140
141 uint16_t
142 bnxt_recv_pkts_vec(void *rx_queue, struct rte_mbuf **rx_pkts,
143                    uint16_t nb_pkts)
144 {
145         struct bnxt_rx_queue *rxq = rx_queue;
146         const __m128i mbuf_init = _mm_set_epi64x(0, rxq->mbuf_initializer);
147         struct bnxt_cp_ring_info *cpr = rxq->cp_ring;
148         struct bnxt_rx_ring_info *rxr = rxq->rx_ring;
149         uint16_t cp_ring_size = cpr->cp_ring_struct->ring_size;
150         uint16_t rx_ring_size = rxr->rx_ring_struct->ring_size;
151         struct cmpl_base *cp_desc_ring = cpr->cp_desc_ring;
152         uint64_t valid, desc_valid_mask = ~0ULL;
153         const __m128i info3_v_mask = _mm_set1_epi32(CMPL_BASE_V);
154         uint32_t raw_cons = cpr->cp_raw_cons;
155         uint32_t cons, mbcons;
156         int nb_rx_pkts = 0;
157         const __m128i valid_target =
158                 _mm_set1_epi32(!!(raw_cons & cp_ring_size));
159         int i;
160
161         /* If Rx Q was stopped return */
162         if (unlikely(!rxq->rx_started))
163                 return 0;
164
165         if (rxq->rxrearm_nb >= rxq->rx_free_thresh)
166                 bnxt_rxq_rearm(rxq, rxr);
167
168         /* Return no more than RTE_BNXT_MAX_RX_BURST per call. */
169         nb_pkts = RTE_MIN(nb_pkts, RTE_BNXT_MAX_RX_BURST);
170
171         cons = raw_cons & (cp_ring_size - 1);
172         mbcons = (raw_cons / 2) & (rx_ring_size - 1);
173
174         /* Prefetch first four descriptor pairs. */
175         rte_prefetch0(&cp_desc_ring[cons]);
176         rte_prefetch0(&cp_desc_ring[cons + 4]);
177
178         /* Ensure that we do not go past the ends of the rings. */
179         nb_pkts = RTE_MIN(nb_pkts, RTE_MIN(rx_ring_size - mbcons,
180                                            (cp_ring_size - cons) / 2));
181         /*
182          * If we are at the end of the ring, ensure that descriptors after the
183          * last valid entry are not treated as valid. Otherwise, force the
184          * maximum number of packets to receive to be a multiple of the per-
185          * loop count.
186          */
187         if (nb_pkts < RTE_BNXT_DESCS_PER_LOOP)
188                 desc_valid_mask >>= 16 * (RTE_BNXT_DESCS_PER_LOOP - nb_pkts);
189         else
190                 nb_pkts = RTE_ALIGN_FLOOR(nb_pkts, RTE_BNXT_DESCS_PER_LOOP);
191
192         /* Handle RX burst request */
193         for (i = 0; i < nb_pkts; i += RTE_BNXT_DESCS_PER_LOOP,
194                                   cons += RTE_BNXT_DESCS_PER_LOOP * 2,
195                                   mbcons += RTE_BNXT_DESCS_PER_LOOP) {
196                 __m128i rxcmp1[RTE_BNXT_DESCS_PER_LOOP];
197                 __m128i rxcmp[RTE_BNXT_DESCS_PER_LOOP];
198                 __m128i tmp0, tmp1, info3_v;
199                 uint32_t num_valid;
200
201                 /* Copy four mbuf pointers to output array. */
202                 tmp0 = _mm_loadu_si128((void *)&rxr->rx_buf_ring[mbcons]);
203 #ifdef RTE_ARCH_X86_64
204                 tmp1 = _mm_loadu_si128((void *)&rxr->rx_buf_ring[mbcons + 2]);
205 #endif
206                 _mm_storeu_si128((void *)&rx_pkts[i], tmp0);
207 #ifdef RTE_ARCH_X86_64
208                 _mm_storeu_si128((void *)&rx_pkts[i + 2], tmp1);
209 #endif
210
211                 /* Prefetch four descriptor pairs for next iteration. */
212                 if (i + RTE_BNXT_DESCS_PER_LOOP < nb_pkts) {
213                         rte_prefetch0(&cp_desc_ring[cons + 8]);
214                         rte_prefetch0(&cp_desc_ring[cons + 12]);
215                 }
216
217                 /*
218                  * Load the four current descriptors into SSE registers in
219                  * reverse order to ensure consistent state.
220                  */
221                 rxcmp1[3] = _mm_load_si128((void *)&cp_desc_ring[cons + 7]);
222                 rte_compiler_barrier();
223                 rxcmp[3] = _mm_load_si128((void *)&cp_desc_ring[cons + 6]);
224
225                 rxcmp1[2] = _mm_load_si128((void *)&cp_desc_ring[cons + 5]);
226                 rte_compiler_barrier();
227                 rxcmp[2] = _mm_load_si128((void *)&cp_desc_ring[cons + 4]);
228
229                 tmp1 = _mm_unpackhi_epi32(rxcmp1[2], rxcmp1[3]);
230
231                 rxcmp1[1] = _mm_load_si128((void *)&cp_desc_ring[cons + 3]);
232                 rte_compiler_barrier();
233                 rxcmp[1] = _mm_load_si128((void *)&cp_desc_ring[cons + 2]);
234
235                 rxcmp1[0] = _mm_load_si128((void *)&cp_desc_ring[cons + 1]);
236                 rte_compiler_barrier();
237                 rxcmp[0] = _mm_load_si128((void *)&cp_desc_ring[cons + 0]);
238
239                 tmp0 = _mm_unpackhi_epi32(rxcmp1[0], rxcmp1[1]);
240
241                 /* Isolate descriptor valid flags. */
242                 info3_v = _mm_and_si128(_mm_unpacklo_epi64(tmp0, tmp1),
243                                         info3_v_mask);
244                 info3_v = _mm_xor_si128(info3_v, valid_target);
245
246                 /*
247                  * Pack the 128-bit array of valid descriptor flags into 64
248                  * bits and count the number of set bits in order to determine
249                  * the number of valid descriptors.
250                  */
251                 valid = _mm_cvtsi128_si64(_mm_packs_epi32(info3_v, info3_v));
252                 num_valid = __builtin_popcountll(valid & desc_valid_mask);
253
254                 switch (num_valid) {
255                 case 4:
256                         rxr->rx_buf_ring[mbcons + 3] = NULL;
257                         /* FALLTHROUGH */
258                 case 3:
259                         rxr->rx_buf_ring[mbcons + 2] = NULL;
260                         /* FALLTHROUGH */
261                 case 2:
262                         rxr->rx_buf_ring[mbcons + 1] = NULL;
263                         /* FALLTHROUGH */
264                 case 1:
265                         rxr->rx_buf_ring[mbcons + 0] = NULL;
266                         break;
267                 case 0:
268                         goto out;
269                 }
270
271                 descs_to_mbufs(rxcmp, rxcmp1, mbuf_init, &rx_pkts[nb_rx_pkts]);
272                 nb_rx_pkts += num_valid;
273
274                 if (num_valid < RTE_BNXT_DESCS_PER_LOOP)
275                         break;
276         }
277
278 out:
279         if (nb_rx_pkts) {
280                 rxr->rx_prod =
281                         RING_ADV(rxr->rx_ring_struct, rxr->rx_prod, nb_rx_pkts);
282
283                 rxq->rxrearm_nb += nb_rx_pkts;
284                 cpr->cp_raw_cons += 2 * nb_rx_pkts;
285                 cpr->valid =
286                         !!(cpr->cp_raw_cons & cpr->cp_ring_struct->ring_size);
287                 bnxt_db_cq(cpr);
288         }
289
290         return nb_rx_pkts;
291 }
292
293 static void
294 bnxt_handle_tx_cp_vec(struct bnxt_tx_queue *txq)
295 {
296         struct bnxt_cp_ring_info *cpr = txq->cp_ring;
297         uint32_t raw_cons = cpr->cp_raw_cons;
298         uint32_t cons;
299         uint32_t nb_tx_pkts = 0;
300         struct tx_cmpl *txcmp;
301         struct cmpl_base *cp_desc_ring = cpr->cp_desc_ring;
302         struct bnxt_ring *cp_ring_struct = cpr->cp_ring_struct;
303         uint32_t ring_mask = cp_ring_struct->ring_mask;
304
305         do {
306                 cons = RING_CMPL(ring_mask, raw_cons);
307                 txcmp = (struct tx_cmpl *)&cp_desc_ring[cons];
308
309                 if (!CMP_VALID(txcmp, raw_cons, cp_ring_struct))
310                         break;
311
312                 if (likely(CMP_TYPE(txcmp) == TX_CMPL_TYPE_TX_L2))
313                         nb_tx_pkts += txcmp->opaque;
314                 else
315                         RTE_LOG_DP(ERR, PMD,
316                                    "Unhandled CMP type %02x\n",
317                                    CMP_TYPE(txcmp));
318                 raw_cons = NEXT_RAW_CMP(raw_cons);
319         } while (nb_tx_pkts < ring_mask);
320
321         cpr->valid = !!(raw_cons & cp_ring_struct->ring_size);
322         if (nb_tx_pkts) {
323                 if (txq->offloads & DEV_TX_OFFLOAD_MBUF_FAST_FREE)
324                         bnxt_tx_cmp_vec_fast(txq, nb_tx_pkts);
325                 else
326                         bnxt_tx_cmp_vec(txq, nb_tx_pkts);
327                 cpr->cp_raw_cons = raw_cons;
328                 bnxt_db_cq(cpr);
329         }
330 }
331
332 static inline void
333 bnxt_xmit_one(struct rte_mbuf *mbuf, struct tx_bd_long *txbd,
334               struct bnxt_sw_tx_bd *tx_buf)
335 {
336         __m128i desc;
337
338         tx_buf->mbuf = mbuf;
339         tx_buf->nr_bds = 1;
340
341         desc = _mm_set_epi64x(mbuf->buf_iova + mbuf->data_off,
342                               bnxt_xmit_flags_len(mbuf->data_len,
343                                                   TX_BD_FLAGS_NOCMPL));
344         desc = _mm_blend_epi16(desc, _mm_set_epi16(0, 0, 0, 0, 0, 0,
345                                                    mbuf->data_len, 0), 0x02);
346         _mm_store_si128((void *)txbd, desc);
347 }
348
349 static uint16_t
350 bnxt_xmit_fixed_burst_vec(struct bnxt_tx_queue *txq, struct rte_mbuf **tx_pkts,
351                           uint16_t nb_pkts)
352 {
353         struct bnxt_tx_ring_info *txr = txq->tx_ring;
354         uint16_t tx_prod = txr->tx_prod;
355         struct tx_bd_long *txbd;
356         struct bnxt_sw_tx_bd *tx_buf;
357         uint16_t to_send;
358
359         txbd = &txr->tx_desc_ring[tx_prod];
360         tx_buf = &txr->tx_buf_ring[tx_prod];
361
362         /* Prefetch next transmit buffer descriptors. */
363         rte_prefetch0(txbd);
364         rte_prefetch0(txbd + 3);
365
366         nb_pkts = RTE_MIN(nb_pkts, bnxt_tx_avail(txq));
367
368         if (unlikely(nb_pkts == 0))
369                 return 0;
370
371         /* Handle TX burst request */
372         to_send = nb_pkts;
373         while (to_send >= RTE_BNXT_DESCS_PER_LOOP) {
374                 /* Prefetch next transmit buffer descriptors. */
375                 rte_prefetch0(txbd + 4);
376                 rte_prefetch0(txbd + 7);
377
378                 bnxt_xmit_one(tx_pkts[0], txbd++, tx_buf++);
379                 bnxt_xmit_one(tx_pkts[1], txbd++, tx_buf++);
380                 bnxt_xmit_one(tx_pkts[2], txbd++, tx_buf++);
381                 bnxt_xmit_one(tx_pkts[3], txbd++, tx_buf++);
382
383                 to_send -= RTE_BNXT_DESCS_PER_LOOP;
384                 tx_pkts += RTE_BNXT_DESCS_PER_LOOP;
385         }
386
387         while (to_send) {
388                 bnxt_xmit_one(tx_pkts[0], txbd++, tx_buf++);
389                 to_send--;
390                 tx_pkts++;
391         }
392
393         /* Request a completion for the final packet of burst. */
394         rte_compiler_barrier();
395         txbd[-1].opaque = nb_pkts;
396         txbd[-1].flags_type &= ~TX_BD_LONG_FLAGS_NO_CMPL;
397
398         tx_prod = RING_ADV(txr->tx_ring_struct, tx_prod, nb_pkts);
399         bnxt_db_write(&txr->tx_db, tx_prod);
400
401         txr->tx_prod = tx_prod;
402
403         return nb_pkts;
404 }
405
406 uint16_t
407 bnxt_xmit_pkts_vec(void *tx_queue, struct rte_mbuf **tx_pkts,
408                    uint16_t nb_pkts)
409 {
410         int nb_sent = 0;
411         struct bnxt_tx_queue *txq = tx_queue;
412         struct bnxt_tx_ring_info *txr = txq->tx_ring;
413         uint16_t ring_size = txr->tx_ring_struct->ring_size;
414
415         /* Tx queue was stopped; wait for it to be restarted */
416         if (unlikely(!txq->tx_started)) {
417                 PMD_DRV_LOG(DEBUG, "Tx q stopped;return\n");
418                 return 0;
419         }
420
421         /* Handle TX completions */
422         if (bnxt_tx_bds_in_hw(txq) >= txq->tx_free_thresh)
423                 bnxt_handle_tx_cp_vec(txq);
424
425         while (nb_pkts) {
426                 uint16_t ret, num;
427
428                 /*
429                  * Ensure that no more than RTE_BNXT_MAX_TX_BURST packets
430                  * are transmitted before the next completion.
431                  */
432                 num = RTE_MIN(nb_pkts, RTE_BNXT_MAX_TX_BURST);
433
434                 /*
435                  * Ensure that a ring wrap does not occur within a call to
436                  * bnxt_xmit_fixed_burst_vec().
437                  */
438                 num = RTE_MIN(num,
439                               ring_size - (txr->tx_prod & (ring_size - 1)));
440                 ret = bnxt_xmit_fixed_burst_vec(txq, &tx_pkts[nb_sent], num);
441                 nb_sent += ret;
442                 nb_pkts -= ret;
443                 if (ret < num)
444                         break;
445         }
446
447         return nb_sent;
448 }
449
450 int __rte_cold
451 bnxt_rxq_vec_setup(struct bnxt_rx_queue *rxq)
452 {
453         return bnxt_rxq_vec_setup_common(rxq);
454 }