drivers/net/bnxt/hcapi/cfa_p40_tbl.h

   1 /* SPDX-License-Identifier: BSD-3-Clause
   2  * Copyright(c) 2019-2021 Broadcom
   3  * All rights reserved.
   4  */
   5 /*
   6  * Name:  cfa_p40_tbl.h
   7  *
   8  * Description: header for SWE based on Truflow
   9  *
  10  * Date:  12/16/19 17:18:12
  11  *
  12  * Note:  This file was originally generated by tflib_decode.py.
  13  *        Remainder is hand coded due to lack of availability of xml for
  14  *        additional tables at this time (EEM Record and union fields)
  15  *
  16  **/
  17 #ifndef _CFA_P40_TBL_H_
  18 #define _CFA_P40_TBL_H_
  19
  20 #include "cfa_p40_hw.h"
  21
  22 #include "hcapi_cfa_defs.h"
  23
  24 const struct hcapi_cfa_field cfa_p40_prof_l2_ctxt_tcam_layout[] = {
  25         {CFA_P40_PROF_L2_CTXT_TCAM_VALID_BITPOS,
  26          CFA_P40_PROF_L2_CTXT_TCAM_VALID_NUM_BITS},
  27         {CFA_P40_PROF_L2_CTXT_TCAM_KEY_TYPE_BITPOS,
  28          CFA_P40_PROF_L2_CTXT_TCAM_KEY_TYPE_NUM_BITS},
  29         {CFA_P40_PROF_L2_CTXT_TCAM_TUN_HDR_TYPE_BITPOS,
  30          CFA_P40_PROF_L2_CTXT_TCAM_TUN_HDR_TYPE_NUM_BITS},
  31         {CFA_P40_PROF_L2_CTXT_TCAM_T_L2_NUMTAGS_BITPOS,
  32          CFA_P40_PROF_L2_CTXT_TCAM_T_L2_NUMTAGS_NUM_BITS},
  33         {CFA_P40_PROF_L2_CTXT_TCAM_L2_NUMTAGS_BITPOS,
  34          CFA_P40_PROF_L2_CTXT_TCAM_L2_NUMTAGS_NUM_BITS},
  35         {CFA_P40_PROF_L2_CTXT_TCAM_MAC1_BITPOS,
  36          CFA_P40_PROF_L2_CTXT_TCAM_MAC1_NUM_BITS},
  37         {CFA_P40_PROF_L2_CTXT_TCAM_T_OVID_BITPOS,
  38          CFA_P40_PROF_L2_CTXT_TCAM_T_OVID_NUM_BITS},
  39         {CFA_P40_PROF_L2_CTXT_TCAM_T_IVID_BITPOS,
  40          CFA_P40_PROF_L2_CTXT_TCAM_T_IVID_NUM_BITS},
  41         {CFA_P40_PROF_L2_CTXT_TCAM_SPARIF_BITPOS,
  42          CFA_P40_PROF_L2_CTXT_TCAM_SPARIF_NUM_BITS},
  43         {CFA_P40_PROF_L2_CTXT_TCAM_SVIF_BITPOS,
  44          CFA_P40_PROF_L2_CTXT_TCAM_SVIF_NUM_BITS},
  45         {CFA_P40_PROF_L2_CTXT_TCAM_MAC0_BITPOS,
  46          CFA_P40_PROF_L2_CTXT_TCAM_MAC0_NUM_BITS},
  47         {CFA_P40_PROF_L2_CTXT_TCAM_OVID_BITPOS,
  48          CFA_P40_PROF_L2_CTXT_TCAM_OVID_NUM_BITS},
  49         {CFA_P40_PROF_L2_CTXT_TCAM_IVID_BITPOS,
  50          CFA_P40_PROF_L2_CTXT_TCAM_IVID_NUM_BITS},
  51 };
  52
  53 const struct hcapi_cfa_field cfa_p40_act_veb_tcam_layout[] = {
  54         {CFA_P40_ACT_VEB_TCAM_VALID_BITPOS,
  55          CFA_P40_ACT_VEB_TCAM_VALID_NUM_BITS},
  56         {CFA_P40_ACT_VEB_TCAM_RESERVED_BITPOS,
  57          CFA_P40_ACT_VEB_TCAM_RESERVED_NUM_BITS},
  58         {CFA_P40_ACT_VEB_TCAM_PARIF_IN_BITPOS,
  59          CFA_P40_ACT_VEB_TCAM_PARIF_IN_NUM_BITS},
  60         {CFA_P40_ACT_VEB_TCAM_NUM_VTAGS_BITPOS,
  61          CFA_P40_ACT_VEB_TCAM_NUM_VTAGS_NUM_BITS},
  62         {CFA_P40_ACT_VEB_TCAM_MAC_BITPOS,
  63          CFA_P40_ACT_VEB_TCAM_MAC_NUM_BITS},
  64         {CFA_P40_ACT_VEB_TCAM_OVID_BITPOS,
  65          CFA_P40_ACT_VEB_TCAM_OVID_NUM_BITS},
  66         {CFA_P40_ACT_VEB_TCAM_IVID_BITPOS,
  67          CFA_P40_ACT_VEB_TCAM_IVID_NUM_BITS},
  68 };
  69
  70 const struct hcapi_cfa_field cfa_p40_lkup_tcam_record_mem_layout[] = {
  71         {CFA_P40_LKUP_TCAM_RECORD_MEM_VALID_BITPOS,
  72          CFA_P40_LKUP_TCAM_RECORD_MEM_VALID_NUM_BITS},
  73         {CFA_P40_LKUP_TCAM_RECORD_MEM_ACT_REC_PTR_BITPOS,
  74          CFA_P40_LKUP_TCAM_RECORD_MEM_ACT_REC_PTR_NUM_BITS},
  75         {CFA_P40_LKUP_TCAM_RECORD_MEM_STRENGTH_BITPOS,
  76          CFA_P40_LKUP_TCAM_RECORD_MEM_STRENGTH_NUM_BITS},
  77 };
  78
  79 const struct hcapi_cfa_field cfa_p40_prof_ctxt_remap_mem_layout[] = {
  80         {CFA_P40_PROF_CTXT_REMAP_MEM_TPID_ANTI_SPOOF_CTL_BITPOS,
  81          CFA_P40_PROF_CTXT_REMAP_MEM_TPID_ANTI_SPOOF_CTL_NUM_BITS},
  82         {CFA_P40_PROF_CTXT_REMAP_MEM_PRI_ANTI_SPOOF_CTL_BITPOS,
  83          CFA_P40_PROF_CTXT_REMAP_MEM_PRI_ANTI_SPOOF_CTL_NUM_BITS},
  84         {CFA_P40_PROF_CTXT_REMAP_MEM_BYP_SP_LKUP_BITPOS,
  85          CFA_P40_PROF_CTXT_REMAP_MEM_BYP_SP_LKUP_NUM_BITS},
  86         {CFA_P40_PROF_CTXT_REMAP_MEM_SP_REC_PTR_BITPOS,
  87          CFA_P40_PROF_CTXT_REMAP_MEM_SP_REC_PTR_NUM_BITS},
  88         {CFA_P40_PROF_CTXT_REMAP_MEM_BD_ACT_EN_BITPOS,
  89          CFA_P40_PROF_CTXT_REMAP_MEM_BD_ACT_EN_NUM_BITS},
  90         {CFA_P40_PROF_CTXT_REMAP_MEM_DEFAULT_TPID_BITPOS,
  91          CFA_P40_PROF_CTXT_REMAP_MEM_DEFAULT_TPID_NUM_BITS},
  92         {CFA_P40_PROF_CTXT_REMAP_MEM_ALLOWED_TPID_BITPOS,
  93          CFA_P40_PROF_CTXT_REMAP_MEM_ALLOWED_TPID_NUM_BITS},
  94         {CFA_P40_PROF_CTXT_REMAP_MEM_DEFAULT_PRI_BITPOS,
  95          CFA_P40_PROF_CTXT_REMAP_MEM_DEFAULT_PRI_NUM_BITS},
  96         {CFA_P40_PROF_CTXT_REMAP_MEM_ALLOWED_PRI_BITPOS,
  97          CFA_P40_PROF_CTXT_REMAP_MEM_ALLOWED_PRI_NUM_BITS},
  98         {CFA_P40_PROF_CTXT_REMAP_MEM_PARIF_BITPOS,
  99          CFA_P40_PROF_CTXT_REMAP_MEM_PARIF_NUM_BITS},
 100         {CFA_P40_PROF_CTXT_REMAP_MEM_BYP_LKUP_EN_BITPOS,
 101          CFA_P40_PROF_CTXT_REMAP_MEM_BYP_LKUP_EN_NUM_BITS},
 102         /* Fields below not generated through automation */
 103         {CFA_P40_PROF_CTXT_REMAP_MEM_PROF_VNIC_BITPOS,
 104          CFA_P40_PROF_CTXT_REMAP_MEM_PROF_VNIC_NUM_BITS},
 105         {CFA_P40_PROF_CTXT_REMAP_MEM_PROF_FUNC_BITPOS,
 106          CFA_P40_PROF_CTXT_REMAP_MEM_PROF_FUNC_NUM_BITS},
 107         {CFA_P40_PROF_CTXT_REMAP_MEM_L2_CTXT_BITPOS,
 108          CFA_P40_PROF_CTXT_REMAP_MEM_L2_CTXT_NUM_BITS},
 109         {CFA_P40_PROF_CTXT_REMAP_MEM_ARP_BITPOS,
 110          CFA_P40_PROF_CTXT_REMAP_MEM_ARP_NUM_BITS},
 111 };
 112
 113 const struct hcapi_cfa_field cfa_p40_prof_profile_tcam_remap_mem_layout[] = {
 114         {CFA_P40_PROF_PROFILE_TCAM_REMAP_MEM_PL_BYP_LKUP_EN_BITPOS,
 115          CFA_P40_PROF_PROFILE_TCAM_REMAP_MEM_PL_BYP_LKUP_EN_NUM_BITS},
 116         {CFA_P40_PROF_PROFILE_TCAM_REMAP_MEM_EM_SEARCH_ENB_BITPOS,
 117          CFA_P40_PROF_PROFILE_TCAM_REMAP_MEM_EM_SEARCH_ENB_NUM_BITS},
 118         {CFA_P40_PROF_PROFILE_TCAM_REMAP_MEM_EM_PROFILE_ID_BITPOS,
 119          CFA_P40_PROF_PROFILE_TCAM_REMAP_MEM_EM_PROFILE_ID_NUM_BITS},
 120         {CFA_P40_PROF_PROFILE_TCAM_REMAP_MEM_EM_KEY_ID_BITPOS,
 121          CFA_P40_PROF_PROFILE_TCAM_REMAP_MEM_EM_KEY_ID_NUM_BITS},
 122         {CFA_P40_PROF_PROFILE_TCAM_REMAP_MEM_EM_KEY_MASK_BITPOS,
 123          CFA_P40_PROF_PROFILE_TCAM_REMAP_MEM_EM_KEY_MASK_NUM_BITS},
 124         {CFA_P40_PROF_PROFILE_TCAM_REMAP_MEM_TCAM_SEARCH_ENB_BITPOS,
 125          CFA_P40_PROF_PROFILE_TCAM_REMAP_MEM_TCAM_SEARCH_ENB_NUM_BITS},
 126         {CFA_P40_PROF_PROFILE_TCAM_REMAP_MEM_TCAM_PROFILE_ID_BITPOS,
 127          CFA_P40_PROF_PROFILE_TCAM_REMAP_MEM_TCAM_PROFILE_ID_NUM_BITS},
 128         {CFA_P40_PROF_PROFILE_TCAM_REMAP_MEM_TCAM_KEY_ID_BITPOS,
 129          CFA_P40_PROF_PROFILE_TCAM_REMAP_MEM_TCAM_KEY_ID_NUM_BITS},
 130         /* Fields below not generated through automation */
 131         {CFA_P40_PROF_PROFILE_TCAM_REMAP_MEM_BYPASS_OPT_BITPOS,
 132          CFA_P40_PROF_PROFILE_TCAM_REMAP_MEM_BYPASS_OPT_NUM_BITS},
 133         {CFA_P40_PROF_PROFILE_TCAM_REMAP_MEM_ACT_REC_PTR_BITPOS,
 134          CFA_P40_PROF_PROFILE_TCAM_REMAP_MEM_ACT_REC_PTR_NUM_BITS},
 135 };
 136
 137 const struct hcapi_cfa_field cfa_p40_prof_profile_tcam_layout[] = {
 138         {CFA_P40_PROF_PROFILE_TCAM_VALID_BITPOS,
 139          CFA_P40_PROF_PROFILE_TCAM_VALID_NUM_BITS},
 140         {CFA_P40_PROF_PROFILE_TCAM_PKT_TYPE_BITPOS,
 141          CFA_P40_PROF_PROFILE_TCAM_PKT_TYPE_NUM_BITS},
 142         {CFA_P40_PROF_PROFILE_TCAM_RECYCLE_CNT_BITPOS,
 143          CFA_P40_PROF_PROFILE_TCAM_RECYCLE_CNT_NUM_BITS},
 144         {CFA_P40_PROF_PROFILE_TCAM_AGG_ERROR_BITPOS,
 145          CFA_P40_PROF_PROFILE_TCAM_AGG_ERROR_NUM_BITS},
 146         {CFA_P40_PROF_PROFILE_TCAM_PROF_FUNC_BITPOS,
 147          CFA_P40_PROF_PROFILE_TCAM_PROF_FUNC_NUM_BITS},
 148         {CFA_P40_PROF_PROFILE_TCAM_RESERVED_BITPOS,
 149          CFA_P40_PROF_PROFILE_TCAM_RESERVED_NUM_BITS},
 150         {CFA_P40_PROF_PROFILE_TCAM_HREC_NEXT_BITPOS,
 151          CFA_P40_PROF_PROFILE_TCAM_HREC_NEXT_NUM_BITS},
 152         {CFA_P40_PROF_PROFILE_TCAM_TL2_HDR_VALID_BITPOS,
 153          CFA_P40_PROF_PROFILE_TCAM_TL2_HDR_VALID_NUM_BITS},
 154         {CFA_P40_PROF_PROFILE_TCAM_TL2_HDR_TYPE_BITPOS,
 155          CFA_P40_PROF_PROFILE_TCAM_TL2_HDR_TYPE_NUM_BITS},
 156         {CFA_P40_PROF_PROFILE_TCAM_TL2_UC_MC_BC_BITPOS,
 157          CFA_P40_PROF_PROFILE_TCAM_TL2_UC_MC_BC_NUM_BITS},
 158         {CFA_P40_PROF_PROFILE_TCAM_TL2_VTAG_PRESENT_BITPOS,
 159          CFA_P40_PROF_PROFILE_TCAM_TL2_VTAG_PRESENT_NUM_BITS},
 160         {CFA_P40_PROF_PROFILE_TCAM_TL2_TWO_VTAGS_BITPOS,
 161          CFA_P40_PROF_PROFILE_TCAM_TL2_TWO_VTAGS_NUM_BITS},
 162         {CFA_P40_PROF_PROFILE_TCAM_TL3_VALID_BITPOS,
 163          CFA_P40_PROF_PROFILE_TCAM_TL3_VALID_NUM_BITS},
 164         {CFA_P40_PROF_PROFILE_TCAM_TL3_ERROR_BITPOS,
 165          CFA_P40_PROF_PROFILE_TCAM_TL3_ERROR_NUM_BITS},
 166         {CFA_P40_PROF_PROFILE_TCAM_TL3_HDR_TYPE_BITPOS,
 167          CFA_P40_PROF_PROFILE_TCAM_TL3_HDR_TYPE_NUM_BITS},
 168         {CFA_P40_PROF_PROFILE_TCAM_TL3_HDR_ISIP_BITPOS,
 169          CFA_P40_PROF_PROFILE_TCAM_TL3_HDR_ISIP_NUM_BITS},
 170         {CFA_P40_PROF_PROFILE_TCAM_TL3_IPV6_CMP_SRC_BITPOS,
 171          CFA_P40_PROF_PROFILE_TCAM_TL3_IPV6_CMP_SRC_NUM_BITS},
 172         {CFA_P40_PROF_PROFILE_TCAM_TL3_IPV6_CMP_DEST_BITPOS,
 173          CFA_P40_PROF_PROFILE_TCAM_TL3_IPV6_CMP_DEST_NUM_BITS},
 174         {CFA_P40_PROF_PROFILE_TCAM_TL4_HDR_VALID_BITPOS,
 175          CFA_P40_PROF_PROFILE_TCAM_TL4_HDR_VALID_NUM_BITS},
 176         {CFA_P40_PROF_PROFILE_TCAM_TL4_HDR_ERROR_BITPOS,
 177          CFA_P40_PROF_PROFILE_TCAM_TL4_HDR_ERROR_NUM_BITS},
 178         {CFA_P40_PROF_PROFILE_TCAM_TL4_HDR_TYPE_BITPOS,
 179          CFA_P40_PROF_PROFILE_TCAM_TL4_HDR_TYPE_NUM_BITS},
 180         {CFA_P40_PROF_PROFILE_TCAM_TL4_HDR_IS_UDP_TCP_BITPOS,
 181          CFA_P40_PROF_PROFILE_TCAM_TL4_HDR_IS_UDP_TCP_NUM_BITS},
 182         {CFA_P40_PROF_PROFILE_TCAM_TUN_HDR_VALID_BITPOS,
 183          CFA_P40_PROF_PROFILE_TCAM_TUN_HDR_VALID_NUM_BITS},
 184         {CFA_P40_PROF_PROFILE_TCAM_TUN_HDR_ERR_BITPOS,
 185          CFA_P40_PROF_PROFILE_TCAM_TUN_HDR_ERR_NUM_BITS},
 186         {CFA_P40_PROF_PROFILE_TCAM_TUN_HDR_TYPE_BITPOS,
 187          CFA_P40_PROF_PROFILE_TCAM_TUN_HDR_TYPE_NUM_BITS},
 188         {CFA_P40_PROF_PROFILE_TCAM_TUN_HDR_FLAGS_BITPOS,
 189          CFA_P40_PROF_PROFILE_TCAM_TUN_HDR_FLAGS_NUM_BITS},
 190         {CFA_P40_PROF_PROFILE_TCAM_L2_HDR_VALID_BITPOS,
 191          CFA_P40_PROF_PROFILE_TCAM_L2_HDR_VALID_NUM_BITS},
 192         {CFA_P40_PROF_PROFILE_TCAM_L2_HDR_ERROR_BITPOS,
 193          CFA_P40_PROF_PROFILE_TCAM_L2_HDR_ERROR_NUM_BITS},
 194         {CFA_P40_PROF_PROFILE_TCAM_L2_HDR_TYPE_BITPOS,
 195          CFA_P40_PROF_PROFILE_TCAM_L2_HDR_TYPE_NUM_BITS},
 196         {CFA_P40_PROF_PROFILE_TCAM_L2_UC_MC_BC_BITPOS,
 197          CFA_P40_PROF_PROFILE_TCAM_L2_UC_MC_BC_NUM_BITS},
 198         {CFA_P40_PROF_PROFILE_TCAM_L2_VTAG_PRESENT_BITPOS,
 199          CFA_P40_PROF_PROFILE_TCAM_L2_VTAG_PRESENT_NUM_BITS},
 200         {CFA_P40_PROF_PROFILE_TCAM_L2_TWO_VTAGS_BITPOS,
 201          CFA_P40_PROF_PROFILE_TCAM_L2_TWO_VTAGS_NUM_BITS},
 202         {CFA_P40_PROF_PROFILE_TCAM_L3_VALID_BITPOS,
 203          CFA_P40_PROF_PROFILE_TCAM_L3_VALID_NUM_BITS},
 204         {CFA_P40_PROF_PROFILE_TCAM_L3_ERROR_BITPOS,
 205          CFA_P40_PROF_PROFILE_TCAM_L3_ERROR_NUM_BITS},
 206         {CFA_P40_PROF_PROFILE_TCAM_L3_HDR_TYPE_BITPOS,
 207          CFA_P40_PROF_PROFILE_TCAM_L3_HDR_TYPE_NUM_BITS},
 208         {CFA_P40_PROF_PROFILE_TCAM_L3_HDR_ISIP_BITPOS,
 209          CFA_P40_PROF_PROFILE_TCAM_L3_HDR_ISIP_NUM_BITS},
 210         {CFA_P40_PROF_PROFILE_TCAM_L3_IPV6_CMP_SRC_BITPOS,
 211          CFA_P40_PROF_PROFILE_TCAM_L3_IPV6_CMP_SRC_NUM_BITS},
 212         {CFA_P40_PROF_PROFILE_TCAM_L3_IPV6_CMP_DEST_BITPOS,
 213          CFA_P40_PROF_PROFILE_TCAM_L3_IPV6_CMP_DEST_NUM_BITS},
 214         {CFA_P40_PROF_PROFILE_TCAM_L4_HDR_VALID_BITPOS,
 215          CFA_P40_PROF_PROFILE_TCAM_L4_HDR_VALID_NUM_BITS},
 216         {CFA_P40_PROF_PROFILE_TCAM_L4_HDR_ERROR_BITPOS,
 217          CFA_P40_PROF_PROFILE_TCAM_L4_HDR_ERROR_NUM_BITS},
 218         {CFA_P40_PROF_PROFILE_TCAM_L4_HDR_TYPE_BITPOS,
 219          CFA_P40_PROF_PROFILE_TCAM_L4_HDR_TYPE_NUM_BITS},
 220         {CFA_P40_PROF_PROFILE_TCAM_L4_HDR_IS_UDP_TCP_BITPOS,
 221          CFA_P40_PROF_PROFILE_TCAM_L4_HDR_IS_UDP_TCP_NUM_BITS},
 222 };
 223
 224 /**************************************************************************/
 225 /**
 226  * Non-autogenerated fields
 227  */
 228
 229 const struct hcapi_cfa_field cfa_p40_eem_key_tbl_layout[] = {
 230         {CFA_P40_EEM_KEY_TBL_VALID_BITPOS,
 231          CFA_P40_EEM_KEY_TBL_VALID_NUM_BITS},
 232
 233         {CFA_P40_EEM_KEY_TBL_L1_CACHEABLE_BITPOS,
 234          CFA_P40_EEM_KEY_TBL_L1_CACHEABLE_NUM_BITS},
 235
 236         {CFA_P40_EEM_KEY_TBL_STRENGTH_BITPOS,
 237          CFA_P40_EEM_KEY_TBL_STRENGTH_NUM_BITS},
 238
 239         {CFA_P40_EEM_KEY_TBL_KEY_SZ_BITPOS,
 240          CFA_P40_EEM_KEY_TBL_KEY_SZ_NUM_BITS},
 241
 242         {CFA_P40_EEM_KEY_TBL_REC_SZ_BITPOS,
 243          CFA_P40_EEM_KEY_TBL_REC_SZ_NUM_BITS},
 244
 245         {CFA_P40_EEM_KEY_TBL_ACT_REC_INT_BITPOS,
 246          CFA_P40_EEM_KEY_TBL_ACT_REC_INT_NUM_BITS},
 247
 248         {CFA_P40_EEM_KEY_TBL_EXT_FLOW_CTR_BITPOS,
 249          CFA_P40_EEM_KEY_TBL_EXT_FLOW_CTR_NUM_BITS},
 250
 251         {CFA_P40_EEM_KEY_TBL_AR_PTR_BITPOS,
 252          CFA_P40_EEM_KEY_TBL_AR_PTR_NUM_BITS},
 253
 254 };
 255
 256 const struct hcapi_cfa_field cfa_p40_mirror_tbl_layout[] = {
 257         {CFA_P40_MIRROR_TBL_SP_PTR_BITPOS,
 258          CFA_P40_MIRROR_TBL_SP_PTR_NUM_BITS},
 259
 260         {CFA_P40_MIRROR_TBL_IGN_DROP_BITPOS,
 261          CFA_P40_MIRROR_TBL_IGN_DROP_NUM_BITS},
 262
 263         {CFA_P40_MIRROR_TBL_COPY_BITPOS,
 264          CFA_P40_MIRROR_TBL_COPY_NUM_BITS},
 265
 266         {CFA_P40_MIRROR_TBL_EN_BITPOS,
 267          CFA_P40_MIRROR_TBL_EN_NUM_BITS},
 268
 269         {CFA_P40_MIRROR_TBL_AR_PTR_BITPOS,
 270          CFA_P40_MIRROR_TBL_AR_PTR_NUM_BITS},
 271 };
 272
 273 /* P45 Defines */
 274
 275 const struct hcapi_cfa_field cfa_p45_prof_l2_ctxt_tcam_layout[] = {
 276         {CFA_P45_PROF_L2_CTXT_TCAM_VALID_BITPOS,
 277          CFA_P45_PROF_L2_CTXT_TCAM_VALID_NUM_BITS},
 278         {CFA_P45_PROF_L2_CTXT_TCAM_SPARIF_BITPOS,
 279          CFA_P45_PROF_L2_CTXT_TCAM_SPARIF_NUM_BITS},
 280         {CFA_P40_PROF_L2_CTXT_TCAM_KEY_TYPE_BITPOS,
 281          CFA_P40_PROF_L2_CTXT_TCAM_KEY_TYPE_NUM_BITS},
 282         {CFA_P40_PROF_L2_CTXT_TCAM_TUN_HDR_TYPE_BITPOS,
 283          CFA_P40_PROF_L2_CTXT_TCAM_TUN_HDR_TYPE_NUM_BITS},
 284         {CFA_P40_PROF_L2_CTXT_TCAM_T_L2_NUMTAGS_BITPOS,
 285          CFA_P40_PROF_L2_CTXT_TCAM_T_L2_NUMTAGS_NUM_BITS},
 286         {CFA_P40_PROF_L2_CTXT_TCAM_L2_NUMTAGS_BITPOS,
 287          CFA_P40_PROF_L2_CTXT_TCAM_L2_NUMTAGS_NUM_BITS},
 288         {CFA_P40_PROF_L2_CTXT_TCAM_MAC1_BITPOS,
 289          CFA_P40_PROF_L2_CTXT_TCAM_MAC1_NUM_BITS},
 290         {CFA_P40_PROF_L2_CTXT_TCAM_T_OVID_BITPOS,
 291          CFA_P40_PROF_L2_CTXT_TCAM_T_OVID_NUM_BITS},
 292         {CFA_P40_PROF_L2_CTXT_TCAM_T_IVID_BITPOS,
 293          CFA_P40_PROF_L2_CTXT_TCAM_T_IVID_NUM_BITS},
 294         {CFA_P45_PROF_L2_CTXT_TCAM_SVIF_BITPOS,
 295          CFA_P45_PROF_L2_CTXT_TCAM_SVIF_NUM_BITS},
 296         {CFA_P40_PROF_L2_CTXT_TCAM_MAC0_BITPOS,
 297          CFA_P40_PROF_L2_CTXT_TCAM_MAC0_NUM_BITS},
 298         {CFA_P40_PROF_L2_CTXT_TCAM_OVID_BITPOS,
 299          CFA_P40_PROF_L2_CTXT_TCAM_OVID_NUM_BITS},
 300         {CFA_P40_PROF_L2_CTXT_TCAM_IVID_BITPOS,
 301          CFA_P40_PROF_L2_CTXT_TCAM_IVID_NUM_BITS},
 302 };
 303 #endif /* _CFA_P40_TBL_H_ */