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34 #ifndef _HSI_STRUCT_DEF_EXTERNAL_H_
35 #define _HSI_STRUCT_DEF_EXTERNAL_H_
38 * per-context HW statistics -- chip view
41 struct ctx_hw_stats64 {
42 uint64_t rx_ucast_pkts;
43 uint64_t rx_mcast_pkts;
44 uint64_t rx_bcast_pkts;
45 uint64_t rx_drop_pkts;
47 uint64_t rx_ucast_bytes;
48 uint64_t rx_mcast_bytes;
49 uint64_t rx_bcast_bytes;
51 uint64_t tx_ucast_pkts;
52 uint64_t tx_mcast_pkts;
53 uint64_t tx_bcast_pkts;
54 uint64_t tx_drop_pkts;
56 uint64_t tx_ucast_bytes;
57 uint64_t tx_mcast_bytes;
58 uint64_t tx_bcast_bytes;
66 /* HW Resource Manager Specification 1.2.0 */
67 #define HWRM_VERSION_MAJOR 1
68 #define HWRM_VERSION_MINOR 2
69 #define HWRM_VERSION_UPDATE 0
72 * Following is the signature for HWRM message field that indicates not
73 * applicable (All F's). Need to cast it the size of the field if needed.
75 #define HWRM_NA_SIGNATURE ((uint32_t)(-1))
76 #define HWRM_MAX_REQ_LEN (128) /* hwrm_func_buf_rgtr */
77 #define HWRM_MAX_RESP_LEN (176) /* hwrm_func_qstats */
78 #define HW_HASH_INDEX_SIZE 0x80 /* 7 bit indirection table index. */
79 #define HW_HASH_KEY_SIZE 40
80 #define HWRM_RESP_VALID_KEY 1 /* valid key for HWRM response */
85 #define HWRM_VER_GET (UINT32_C(0x0))
86 #define HWRM_FUNC_RESET (UINT32_C(0x11))
87 #define HWRM_FUNC_QCAPS (UINT32_C(0x15))
88 #define HWRM_FUNC_DRV_UNRGTR (UINT32_C(0x1a))
89 #define HWRM_FUNC_DRV_RGTR (UINT32_C(0x1d))
90 #define HWRM_PORT_PHY_CFG (UINT32_C(0x20))
91 #define HWRM_QUEUE_QPORTCFG (UINT32_C(0x30))
92 #define HWRM_VNIC_ALLOC (UINT32_C(0x40))
93 #define HWRM_VNIC_FREE (UINT32_C(0x41))
94 #define HWRM_VNIC_CFG (UINT32_C(0x42))
95 #define HWRM_VNIC_RSS_CFG (UINT32_C(0x46))
96 #define HWRM_RING_ALLOC (UINT32_C(0x50))
97 #define HWRM_RING_FREE (UINT32_C(0x51))
98 #define HWRM_RING_GRP_ALLOC (UINT32_C(0x60))
99 #define HWRM_RING_GRP_FREE (UINT32_C(0x61))
100 #define HWRM_VNIC_RSS_COS_LB_CTX_ALLOC (UINT32_C(0x70))
101 #define HWRM_VNIC_RSS_COS_LB_CTX_FREE (UINT32_C(0x71))
102 #define HWRM_CFA_L2_FILTER_ALLOC (UINT32_C(0x90))
103 #define HWRM_CFA_L2_FILTER_FREE (UINT32_C(0x91))
104 #define HWRM_CFA_L2_FILTER_CFG (UINT32_C(0x92))
105 #define HWRM_CFA_L2_SET_RX_MASK (UINT32_C(0x93))
106 #define HWRM_STAT_CTX_ALLOC (UINT32_C(0xb0))
107 #define HWRM_STAT_CTX_FREE (UINT32_C(0xb1))
108 #define HWRM_STAT_CTX_CLR_STATS (UINT32_C(0xb3))
109 #define HWRM_EXEC_FWD_RESP (UINT32_C(0xd0))
112 #define HWRM_ERR_CODE_INVALID_PARAMS (UINT32_C(0x2))
113 #define HWRM_ERR_CODE_RESOURCE_ACCESS_DENIED (UINT32_C(0x3))
115 /* Short TX BD (16 bytes) */
118 * All bits in this field must be valid on the first BD of a packet.
119 * Only the packet_end bit must be valid for the remaining BDs of a
122 /* This value identifies the type of buffer descriptor. */
123 #define TX_BD_SHORT_TYPE_MASK UINT32_C(0x3f)
124 #define TX_BD_SHORT_TYPE_SFT 0
126 * Indicates that this BD is 16B long and is used for normal L2
127 * packet transmission.
129 #define TX_BD_SHORT_TYPE_TX_BD_SHORT (UINT32_C(0x0) << 0)
131 * If set to 1, the packet ends with the data in the buffer pointed to
132 * by this descriptor. This flag must be valid on every BD.
134 #define TX_BD_SHORT_FLAGS_PACKET_END UINT32_C(0x40)
136 * If set to 1, the device will not generate a completion for this
137 * transmit packet unless there is an error in it's processing. If this
138 * bit is set to 0, then the packet will be completed normally. This bit
139 * must be valid only on the first BD of a packet.
141 #define TX_BD_SHORT_FLAGS_NO_CMPL UINT32_C(0x80)
143 * This value indicates how many 16B BD locations are consumed in the
144 * ring by this packet. A value of 1 indicates that this BD is the only
145 * BD (and that the it is a short BD). A value of 3 indicates either 3
146 * short BDs or 1 long BD and one short BD in the packet. A value of 0
147 * indicates that there are 32 BD locations in the packet (the maximum).
148 * This field is valid only on the first BD of a packet.
150 #define TX_BD_SHORT_FLAGS_BD_CNT_MASK UINT32_C(0x1f00)
151 #define TX_BD_SHORT_FLAGS_BD_CNT_SFT 8
153 * This value is a hint for the length of the entire packet. It is used
154 * by the chip to optimize internal processing. The packet will be
155 * dropped if the hint is too short. This field is valid only on the
156 * first BD of a packet.
158 #define TX_BD_SHORT_FLAGS_LHINT_MASK UINT32_C(0x6000)
159 #define TX_BD_SHORT_FLAGS_LHINT_SFT 13
160 /* indicates packet length < 512B */
161 #define TX_BD_SHORT_FLAGS_LHINT_LT512 (UINT32_C(0x0) << 13)
162 /* indicates 512 <= packet length < 1KB */
163 #define TX_BD_SHORT_FLAGS_LHINT_LT1K (UINT32_C(0x1) << 13)
164 /* indicates 1KB <= packet length < 2KB */
165 #define TX_BD_SHORT_FLAGS_LHINT_LT2K (UINT32_C(0x2) << 13)
166 /* indicates packet length >= 2KB */
167 #define TX_BD_SHORT_FLAGS_LHINT_GTE2K (UINT32_C(0x3) << 13)
168 #define TX_BD_SHORT_FLAGS_LHINT_LAST TX_BD_SHORT_FLAGS_LHINT_GTE2K
170 * If set to 1, the device immediately updates the Send Consumer Index
171 * after the buffer associated with this descriptor has been transferred
172 * via DMA to NIC memory from host memory. An interrupt may or may not
173 * be generated according to the state of the interrupt avoidance
174 * mechanisms. If this bit is set to 0, then the Consumer Index is only
175 * updated as soon as one of the host interrupt coalescing conditions
176 * has been met. This bit must be valid on the first BD of a packet.
178 #define TX_BD_SHORT_FLAGS_COAL_NOW UINT32_C(0x8000)
180 * All bits in this field must be valid on the first BD of a packet.
181 * Only the packet_end bit must be valid for the remaining BDs of a
184 #define TX_BD_SHORT_FLAGS_MASK UINT32_C(0xffc0)
185 #define TX_BD_SHORT_FLAGS_SFT 6
189 * This is the length of the host physical buffer this BD describes in
190 * bytes. This field must be valid on all BDs of a packet.
194 * The opaque data field is pass through to the completion and can be
195 * used for any data that the driver wants to associate with the
196 * transmit BD. This field must be valid on the first BD of a packet.
201 * This is the host physical address for the portion of the packet
202 * described by this TX BD. This value must be valid on all BDs of a
206 } __attribute__((packed));
208 /* Long TX BD (32 bytes split to 2 16-byte struct) */
211 * All bits in this field must be valid on the first BD of a packet.
212 * Only the packet_end bit must be valid for the remaining BDs of a
215 /* This value identifies the type of buffer descriptor. */
216 #define TX_BD_LONG_TYPE_MASK UINT32_C(0x3f)
217 #define TX_BD_LONG_TYPE_SFT 0
219 * Indicates that this BD is 32B long and is used for normal L2
220 * packet transmission.
222 #define TX_BD_LONG_TYPE_TX_BD_LONG (UINT32_C(0x10) << 0)
224 * If set to 1, the packet ends with the data in the buffer pointed to
225 * by this descriptor. This flag must be valid on every BD.
227 #define TX_BD_LONG_FLAGS_PACKET_END UINT32_C(0x40)
229 * If set to 1, the device will not generate a completion for this
230 * transmit packet unless there is an error in it's processing. If this
231 * bit is set to 0, then the packet will be completed normally. This bit
232 * must be valid only on the first BD of a packet.
234 #define TX_BD_LONG_FLAGS_NO_CMPL UINT32_C(0x80)
236 * This value indicates how many 16B BD locations are consumed in the
237 * ring by this packet. A value of 1 indicates that this BD is the only
238 * BD (and that the it is a short BD). A value of 3 indicates either 3
239 * short BDs or 1 long BD and one short BD in the packet. A value of 0
240 * indicates that there are 32 BD locations in the packet (the maximum).
241 * This field is valid only on the first BD of a packet.
243 #define TX_BD_LONG_FLAGS_BD_CNT_MASK UINT32_C(0x1f00)
244 #define TX_BD_LONG_FLAGS_BD_CNT_SFT 8
246 * This value is a hint for the length of the entire packet. It is used
247 * by the chip to optimize internal processing. The packet will be
248 * dropped if the hint is too short. This field is valid only on the
249 * first BD of a packet.
251 #define TX_BD_LONG_FLAGS_LHINT_MASK UINT32_C(0x6000)
252 #define TX_BD_LONG_FLAGS_LHINT_SFT 13
253 /* indicates packet length < 512B */
254 #define TX_BD_LONG_FLAGS_LHINT_LT512 (UINT32_C(0x0) << 13)
255 /* indicates 512 <= packet length < 1KB */
256 #define TX_BD_LONG_FLAGS_LHINT_LT1K (UINT32_C(0x1) << 13)
257 /* indicates 1KB <= packet length < 2KB */
258 #define TX_BD_LONG_FLAGS_LHINT_LT2K (UINT32_C(0x2) << 13)
259 /* indicates packet length >= 2KB */
260 #define TX_BD_LONG_FLAGS_LHINT_GTE2K (UINT32_C(0x3) << 13)
261 #define TX_BD_LONG_FLAGS_LHINT_LAST TX_BD_LONG_FLAGS_LHINT_GTE2K
263 * If set to 1, the device immediately updates the Send Consumer Index
264 * after the buffer associated with this descriptor has been transferred
265 * via DMA to NIC memory from host memory. An interrupt may or may not
266 * be generated according to the state of the interrupt avoidance
267 * mechanisms. If this bit is set to 0, then the Consumer Index is only
268 * updated as soon as one of the host interrupt coalescing conditions
269 * has been met. This bit must be valid on the first BD of a packet.
271 #define TX_BD_LONG_FLAGS_COAL_NOW UINT32_C(0x8000)
273 * All bits in this field must be valid on the first BD of a packet.
274 * Only the packet_end bit must be valid for the remaining BDs of a
277 #define TX_BD_LONG_FLAGS_MASK UINT32_C(0xffc0)
278 #define TX_BD_LONG_FLAGS_SFT 6
282 * This is the length of the host physical buffer this BD describes in
283 * bytes. This field must be valid on all BDs of a packet.
288 * The opaque data field is pass through to the completion and can be
289 * used for any data that the driver wants to associate with the
290 * transmit BD. This field must be valid on the first BD of a packet.
295 * This is the host physical address for the portion of the packet
296 * described by this TX BD. This value must be valid on all BDs of a
300 } __attribute__((packed));
302 /* last 16 bytes of Long TX BD */
304 struct tx_bd_long_hi {
306 * All bits in this field must be valid on the first BD of a packet.
307 * Their value on other BDs of the packet will be ignored.
310 * If set to 1, the controller replaces the TCP/UPD checksum fields of
311 * normal TCP/UPD checksum, or the inner TCP/UDP checksum field of the
312 * encapsulated TCP/UDP packets with the hardware calculated TCP/UDP
313 * checksum for the packet associated with this descriptor. This bit
314 * must be valid on the first BD of a packet.
316 #define TX_BD_LONG_LFLAGS_TCP_UDP_CHKSUM UINT32_C(0x1)
318 * If set to 1, the controller replaces the IP checksum of the normal
319 * packets, or the inner IP checksum of the encapsulated packets with
320 * the hardware calculated IP checksum for the packet associated with
321 * this descriptor. This bit must be valid on the first BD of a packet.
323 #define TX_BD_LONG_LFLAGS_IP_CHKSUM UINT32_C(0x2)
325 * If set to 1, the controller will not append an Ethernet CRC to the
326 * end of the frame. This bit must be valid on the first BD of a packet.
327 * Packet must be 64B or longer when this flag is set. It is not useful
328 * to use this bit with any form of TX offload such as CSO or LSO. The
329 * intent is that the packet from the host already has a valid Ethernet
332 #define TX_BD_LONG_LFLAGS_NOCRC UINT32_C(0x4)
334 * If set to 1, the device will record the time at which the packet was
335 * actually transmitted at the TX MAC. This bit must be valid on the
336 * first BD of a packet.
338 #define TX_BD_LONG_LFLAGS_STAMP UINT32_C(0x8)
340 * If set to 1, The controller replaces the tunnel IP checksum field
341 * with hardware calculated IP checksum for the IP header of the packet
342 * associated with this descriptor. In case of VXLAN, the controller
343 * also replaces the outer header UDP checksum with hardware calculated
344 * UDP checksum for the packet associated with this descriptor.
346 #define TX_BD_LONG_LFLAGS_T_IP_CHKSUM UINT32_C(0x10)
348 * If set to 1, the device will treat this packet with LSO(Large Send
349 * Offload) processing for both normal or encapsulated packets, which is
350 * a form of TCP segmentation. When this bit is 1, the hdr_size and mss
351 * fields must be valid. The driver doesn't need to set t_ip_chksum,
352 * ip_chksum, and tcp_udp_chksum flags since the controller will replace
353 * the appropriate checksum fields for segmented packets. When this bit
354 * is 1, the hdr_size and mss fields must be valid.
356 #define TX_BD_LONG_LFLAGS_LSO UINT32_C(0x20)
358 * If set to zero when LSO is '1', then the IPID will be treated as a
359 * 16b number and will be wrapped if it exceeds a value of 0xffff. If
360 * set to one when LSO is '1', then the IPID will be treated as a 15b
361 * number and will be wrapped if it exceeds a value 0f 0x7fff.
363 #define TX_BD_LONG_LFLAGS_IPID_FMT UINT32_C(0x40)
365 * If set to zero when LSO is '1', then the IPID of the tunnel IP header
366 * will not be modified during LSO operations. If set to one when LSO is
367 * '1', then the IPID of the tunnel IP header will be incremented for
368 * each subsequent segment of an LSO operation.
370 #define TX_BD_LONG_LFLAGS_T_IPID UINT32_C(0x80)
372 * If set to '1', then the RoCE ICRC will be appended to the packet.
373 * Packet must be a valid RoCE format packet.
375 #define TX_BD_LONG_LFLAGS_ROCE_CRC UINT32_C(0x100)
377 * If set to '1', then the FCoE CRC will be appended to the packet.
378 * Packet must be a valid FCoE format packet.
380 #define TX_BD_LONG_LFLAGS_FCOE_CRC UINT32_C(0x200)
384 * When LSO is '1', this field must contain the offset of the TCP
385 * payload from the beginning of the packet in as 16b words. In case of
386 * encapsulated/tunneling packet, this field contains the offset of the
387 * inner TCP payload from beginning of the packet as 16-bit words. This
388 * value must be valid on the first BD of a packet.
390 #define TX_BD_LONG_HDR_SIZE_MASK UINT32_C(0x1ff)
391 #define TX_BD_LONG_HDR_SIZE_SFT 0
395 * This is the MSS value that will be used to do the LSO processing. The
396 * value is the length in bytes of the TCP payload for each segment
397 * generated by the LSO operation. This value must be valid on the first
400 #define TX_BD_LONG_MSS_MASK UINT32_C(0x7fff)
401 #define TX_BD_LONG_MSS_SFT 0
407 * This value selects a CFA action to perform on the packet. Set this
408 * value to zero if no CFA action is desired. This value must be valid
409 * on the first BD of a packet.
414 * This value is action meta-data that defines CFA edit operations that
415 * are done in addition to any action editing.
417 /* When key=1, This is the VLAN tag VID value. */
418 #define TX_BD_LONG_CFA_META_VLAN_VID_MASK UINT32_C(0xfff)
419 #define TX_BD_LONG_CFA_META_VLAN_VID_SFT 0
420 /* When key=1, This is the VLAN tag DE value. */
421 #define TX_BD_LONG_CFA_META_VLAN_DE UINT32_C(0x1000)
422 /* When key=1, This is the VLAN tag PRI value. */
423 #define TX_BD_LONG_CFA_META_VLAN_PRI_MASK UINT32_C(0xe000)
424 #define TX_BD_LONG_CFA_META_VLAN_PRI_SFT 13
425 /* When key=1, This is the VLAN tag TPID select value. */
426 #define TX_BD_LONG_CFA_META_VLAN_TPID_MASK UINT32_C(0x70000)
427 #define TX_BD_LONG_CFA_META_VLAN_TPID_SFT 16
429 #define TX_BD_LONG_CFA_META_VLAN_TPID_TPID88A8 (UINT32_C(0x0) << 16)
431 #define TX_BD_LONG_CFA_META_VLAN_TPID_TPID8100 (UINT32_C(0x1) << 16)
433 #define TX_BD_LONG_CFA_META_VLAN_TPID_TPID9100 (UINT32_C(0x2) << 16)
435 #define TX_BD_LONG_CFA_META_VLAN_TPID_TPID9200 (UINT32_C(0x3) << 16)
437 #define TX_BD_LONG_CFA_META_VLAN_TPID_TPID9300 (UINT32_C(0x4) << 16)
438 /* Value programmed in CFA VLANTPID register. */
439 #define TX_BD_LONG_CFA_META_VLAN_TPID_TPIDCFG (UINT32_C(0x5) << 16)
440 #define TX_BD_LONG_CFA_META_VLAN_TPID_LAST \
441 TX_BD_LONG_CFA_META_VLAN_TPID_TPIDCFG
442 /* When key=1, This is the VLAN tag TPID select value. */
443 #define TX_BD_LONG_CFA_META_VLAN_RESERVED_MASK UINT32_C(0xff80000)
444 #define TX_BD_LONG_CFA_META_VLAN_RESERVED_SFT 19
446 * This field identifies the type of edit to be performed on the packet.
447 * This value must be valid on the first BD of a packet.
449 #define TX_BD_LONG_CFA_META_KEY_MASK UINT32_C(0xf0000000)
450 #define TX_BD_LONG_CFA_META_KEY_SFT 28
452 #define TX_BD_LONG_CFA_META_KEY_NONE (UINT32_C(0x0) << 28)
454 * - meta[17:16] - TPID select value (0 = 0x8100). - meta[15:12]
455 * - PRI/DE value. - meta[11:0] - VID value.
457 #define TX_BD_LONG_CFA_META_KEY_VLAN_TAG (UINT32_C(0x1) << 28)
458 #define TX_BD_LONG_CFA_META_KEY_LAST TX_BD_LONG_CFA_META_KEY_VLAN_TAG
460 } __attribute__((packed));
462 /* RX Producer Packet BD (16 bytes) */
463 struct rx_prod_pkt_bd {
464 /* This value identifies the type of buffer descriptor. */
465 #define RX_PROD_PKT_BD_TYPE_MASK UINT32_C(0x3f)
466 #define RX_PROD_PKT_BD_TYPE_SFT 0
468 * Indicates that this BD is 16B long and is an RX Producer (ie.
469 * empty) buffer descriptor.
471 #define RX_PROD_PKT_BD_TYPE_RX_PROD_PKT (UINT32_C(0x4) << 0)
473 * If set to 1, the packet will be placed at the address plus 2B. The 2
474 * Bytes of padding will be written as zero.
477 * This is intended to be used when the host buffer is cache-line
478 * aligned to produce packets that are easy to parse in host memory
479 * while still allowing writes to be cache line aligned.
481 #define RX_PROD_PKT_BD_FLAGS_SOP_PAD UINT32_C(0x40)
483 * If set to 1, the packet write will be padded out to the nearest
484 * cache-line with zero value padding.
487 * If receive buffers start/end on cache-line boundaries, this feature
488 * will ensure that all data writes on the PCI bus start/end on cache
491 #define RX_PROD_PKT_BD_FLAGS_EOP_PAD UINT32_C(0x80)
493 * This value is the number of additional buffers in the ring that
494 * describe the buffer space to be consumed for the this packet. If the
495 * value is zero, then the packet must fit within the space described by
496 * this BD. If this value is 1 or more, it indicates how many additional
497 * "buffer" BDs are in the ring immediately following this BD to be used
498 * for the same network packet. Even if the packet to be placed does not
499 * need all the additional buffers, they will be consumed anyway.
501 #define RX_PROD_PKT_BD_FLAGS_BUFFERS_MASK UINT32_C(0x300)
502 #define RX_PROD_PKT_BD_FLAGS_BUFFERS_SFT 8
503 #define RX_PROD_PKT_BD_FLAGS_MASK UINT32_C(0xffc0)
504 #define RX_PROD_PKT_BD_FLAGS_SFT 6
508 * This is the length in Bytes of the host physical buffer where data
509 * for the packet may be placed in host memory.
512 * While this is a Byte resolution value, it is often advantageous to
513 * ensure that the buffers provided end on a host cache line.
518 * The opaque data field is pass through to the completion and can be
519 * used for any data that the driver wants to associate with this
520 * receive buffer set.
525 * This is the host physical address where data for the packet may by
526 * placed in host memory.
529 * While this is a Byte resolution value, it is often advantageous to
530 * ensure that the buffers provide start on a host cache line.
533 } __attribute__((packed));
535 /* Completion Ring Structures */
536 /* Note: This structure is used by the HWRM to communicate HWRM Error. */
537 /* Base Completion Record (16 bytes) */
541 * This field indicates the exact type of the completion. By convention,
542 * the LSB identifies the length of the record in 16B units. Even values
543 * indicate 16B records. Odd values indicate 32B records.
545 #define CMPL_BASE_TYPE_MASK UINT32_C(0x3f)
546 #define CMPL_BASE_TYPE_SFT 0
547 /* TX L2 completion: Completion of TX packet. Length = 16B */
548 #define CMPL_BASE_TYPE_TX_L2 (UINT32_C(0x0) << 0)
550 * RX L2 completion: Completion of and L2 RX packet.
553 #define CMPL_BASE_TYPE_RX_L2 (UINT32_C(0x11) << 0)
555 * RX Aggregation Buffer completion : Completion of an L2
556 * aggregation buffer in support of TPA, HDS, or Jumbo packet
557 * completion. Length = 16B
559 #define CMPL_BASE_TYPE_RX_AGG (UINT32_C(0x12) << 0)
561 * RX L2 TPA Start Completion: Completion at the beginning of a
562 * TPA operation. Length = 32B
564 #define CMPL_BASE_TYPE_RX_TPA_START (UINT32_C(0x13) << 0)
566 * RX L2 TPA End Completion: Completion at the end of a TPA
567 * operation. Length = 32B
569 #define CMPL_BASE_TYPE_RX_TPA_END (UINT32_C(0x15) << 0)
571 * Statistics Ejection Completion: Completion of statistics data
572 * ejection buffer. Length = 16B
574 #define CMPL_BASE_TYPE_STAT_EJECT (UINT32_C(0x1a) << 0)
575 /* HWRM Command Completion: Completion of an HWRM command. */
576 #define CMPL_BASE_TYPE_HWRM_DONE (UINT32_C(0x20) << 0)
577 /* Forwarded HWRM Request */
578 #define CMPL_BASE_TYPE_HWRM_FWD_REQ (UINT32_C(0x22) << 0)
579 /* Forwarded HWRM Response */
580 #define CMPL_BASE_TYPE_HWRM_FWD_RESP (UINT32_C(0x24) << 0)
581 /* HWRM Asynchronous Event Information */
582 #define CMPL_BASE_TYPE_HWRM_ASYNC_EVENT (UINT32_C(0x2e) << 0)
583 /* CQ Notification */
584 #define CMPL_BASE_TYPE_CQ_NOTIFICATION (UINT32_C(0x30) << 0)
585 /* SRQ Threshold Event */
586 #define CMPL_BASE_TYPE_SRQ_EVENT (UINT32_C(0x32) << 0)
587 /* DBQ Threshold Event */
588 #define CMPL_BASE_TYPE_DBQ_EVENT (UINT32_C(0x34) << 0)
589 /* QP Async Notification */
590 #define CMPL_BASE_TYPE_QP_EVENT (UINT32_C(0x38) << 0)
591 /* Function Async Notification */
592 #define CMPL_BASE_TYPE_FUNC_EVENT (UINT32_C(0x3a) << 0)
599 * This value is written by the NIC such that it will be different for
600 * each pass through the completion queue. The even passes will write 1.
601 * The odd passes will write 0.
603 #define CMPL_BASE_V UINT32_C(0x1)
605 #define CMPL_BASE_INFO3_MASK UINT32_C(0xfffffffe)
606 #define CMPL_BASE_INFO3_SFT 1
610 } __attribute__((packed));
612 /* TX Completion Record (16 bytes) */
615 * This field indicates the exact type of the completion. By convention,
616 * the LSB identifies the length of the record in 16B units. Even values
617 * indicate 16B records. Odd values indicate 32B records.
619 #define TX_CMPL_TYPE_MASK UINT32_C(0x3f)
620 #define TX_CMPL_TYPE_SFT 0
621 /* TX L2 completion: Completion of TX packet. Length = 16B */
622 #define TX_CMPL_TYPE_TX_L2 (UINT32_C(0x0) << 0)
624 * When this bit is '1', it indicates a packet that has an error of some
625 * type. Type of error is indicated in error_flags.
627 #define TX_CMPL_FLAGS_ERROR UINT32_C(0x40)
629 * When this bit is '1', it indicates that the packet completed was
630 * transmitted using the push acceleration data provided by the driver.
631 * When this bit is '0', it indicates that the packet had not push
632 * acceleration data written or was executed as a normal packet even
633 * though push data was provided.
635 #define TX_CMPL_FLAGS_PUSH UINT32_C(0x80)
636 #define TX_CMPL_FLAGS_MASK UINT32_C(0xffc0)
637 #define TX_CMPL_FLAGS_SFT 6
643 * This is a copy of the opaque field from the first TX BD of this
644 * transmitted packet.
649 * This value is written by the NIC such that it will be different for
650 * each pass through the completion queue. The even passes will write 1.
651 * The odd passes will write 0.
653 #define TX_CMPL_V UINT32_C(0x1)
655 * This error indicates that there was some sort of problem with the BDs
658 #define TX_CMPL_ERRORS_BUFFER_ERROR_MASK UINT32_C(0xe)
659 #define TX_CMPL_ERRORS_BUFFER_ERROR_SFT 1
661 #define TX_CMPL_ERRORS_BUFFER_ERROR_NO_ERROR (UINT32_C(0x0) << 1)
662 /* Bad Format: BDs were not formatted correctly. */
663 #define TX_CMPL_ERRORS_BUFFER_ERROR_BAD_FMT (UINT32_C(0x2) << 1)
664 #define TX_CMPL_ERRORS_BUFFER_ERROR_LAST \
665 TX_CMPL_ERRORS_BUFFER_ERROR_BAD_FMT
667 * When this bit is '1', it indicates that the length of the packet was
668 * zero. No packet was transmitted.
670 #define TX_CMPL_ERRORS_ZERO_LENGTH_PKT UINT32_C(0x10)
672 * When this bit is '1', it indicates that the packet was longer than
673 * the programmed limit in TDI. No packet was transmitted.
675 #define TX_CMPL_ERRORS_EXCESSIVE_BD_LENGTH UINT32_C(0x20)
677 * When this bit is '1', it indicates that one or more of the BDs
678 * associated with this packet generated a PCI error. This probably
679 * means the address was not valid.
681 #define TX_CMPL_ERRORS_DMA_ERROR UINT32_C(0x40)
683 * When this bit is '1', it indicates that the packet was longer than
684 * indicated by the hint. No packet was transmitted.
686 #define TX_CMPL_ERRORS_HINT_TOO_SHORT UINT32_C(0x80)
688 * When this bit is '1', it indicates that the packet was dropped due to
689 * Poison TLP error on one or more of the TLPs in the PXP completion.
691 #define TX_CMPL_ERRORS_POISON_TLP_ERROR UINT32_C(0x100)
692 #define TX_CMPL_ERRORS_MASK UINT32_C(0xfffe)
693 #define TX_CMPL_ERRORS_SFT 1
698 } __attribute__((packed)) tx_cmpl_t, *ptx_cmpl_t;
700 /* RX Packet Completion Record (32 bytes split to 2 16-byte struct) */
703 * This field indicates the exact type of the completion. By convention,
704 * the LSB identifies the length of the record in 16B units. Even values
705 * indicate 16B records. Odd values indicate 32B records.
707 #define RX_PKT_CMPL_TYPE_MASK UINT32_C(0x3f)
708 #define RX_PKT_CMPL_TYPE_SFT 0
710 * RX L2 completion: Completion of and L2 RX packet.
713 #define RX_PKT_CMPL_TYPE_RX_L2 (UINT32_C(0x11) << 0)
715 * When this bit is '1', it indicates a packet that has an error of some
716 * type. Type of error is indicated in error_flags.
718 #define RX_PKT_CMPL_FLAGS_ERROR UINT32_C(0x40)
719 /* This field indicates how the packet was placed in the buffer. */
720 #define RX_PKT_CMPL_FLAGS_PLACEMENT_MASK UINT32_C(0x380)
721 #define RX_PKT_CMPL_FLAGS_PLACEMENT_SFT 7
722 /* Normal: Packet was placed using normal algorithm. */
723 #define RX_PKT_CMPL_FLAGS_PLACEMENT_NORMAL (UINT32_C(0x0) << 7)
724 /* Jumbo: Packet was placed using jumbo algorithm. */
725 #define RX_PKT_CMPL_FLAGS_PLACEMENT_JUMBO (UINT32_C(0x1) << 7)
727 * Header/Data Separation: Packet was placed using Header/Data
728 * separation algorithm. The separation location is indicated by
731 #define RX_PKT_CMPL_FLAGS_PLACEMENT_HDS (UINT32_C(0x2) << 7)
732 #define RX_PKT_CMPL_FLAGS_PLACEMENT_LAST \
733 RX_PKT_CMPL_FLAGS_PLACEMENT_HDS
734 /* This bit is '1' if the RSS field in this completion is valid. */
735 #define RX_PKT_CMPL_FLAGS_RSS_VALID UINT32_C(0x400)
737 * This value indicates what the inner packet determined for the packet
740 #define RX_PKT_CMPL_FLAGS_ITYPE_MASK UINT32_C(0xf000)
741 #define RX_PKT_CMPL_FLAGS_ITYPE_SFT 12
742 /* Not Known: Indicates that the packet type was not known. */
743 #define RX_PKT_CMPL_FLAGS_ITYPE_NOT_KNOWN (UINT32_C(0x0) << 12)
745 * IP Packet: Indicates that the packet was an IP packet, but
746 * further classification was not possible.
748 #define RX_PKT_CMPL_FLAGS_ITYPE_IP (UINT32_C(0x1) << 12)
750 * TCP Packet: Indicates that the packet was IP and TCP. This
751 * indicates that the payload_offset field is valid.
753 #define RX_PKT_CMPL_FLAGS_ITYPE_TCP (UINT32_C(0x2) << 12)
755 * UDP Packet: Indicates that the packet was IP and UDP. This
756 * indicates that the payload_offset field is valid.
758 #define RX_PKT_CMPL_FLAGS_ITYPE_UDP (UINT32_C(0x3) << 12)
760 * FCoE Packet: Indicates that the packet was recognized as a
761 * FCoE. This also indicates that the payload_offset field is
764 #define RX_PKT_CMPL_FLAGS_ITYPE_FCOE (UINT32_C(0x4) << 12)
766 * RoCE Packet: Indicates that the packet was recognized as a
767 * RoCE. This also indicates that the payload_offset field is
770 #define RX_PKT_CMPL_FLAGS_ITYPE_ROCE (UINT32_C(0x5) << 12)
772 * ICMP Packet: Indicates that the packet was recognized as
773 * ICMP. This indicates that the payload_offset field is valid.
775 #define RX_PKT_CMPL_FLAGS_ITYPE_ICMP (UINT32_C(0x7) << 12)
777 * PtP packet wo/timestamp: Indicates that the packet was
778 * recognized as a PtP packet.
780 #define RX_PKT_CMPL_FLAGS_ITYPE_PTP_WO_TIMESTAMP \
781 (UINT32_C(0x8) << 12)
783 * PtP packet w/timestamp: Indicates that the packet was
784 * recognized as a PtP packet and that a timestamp was taken for
787 #define RX_PKT_CMPL_FLAGS_ITYPE_PTP_W_TIMESTAMP (UINT32_C(0x9) << 12)
788 #define RX_PKT_CMPL_FLAGS_ITYPE_LAST \
789 RX_PKT_CMPL_FLAGS_ITYPE_PTP_W_TIMESTAMP
790 #define RX_PKT_CMPL_FLAGS_MASK UINT32_C(0xffc0)
791 #define RX_PKT_CMPL_FLAGS_SFT 6
795 * This is the length of the data for the packet stored in the buffer(s)
796 * identified by the opaque value. This includes the packet BD and any
797 * associated buffer BDs. This does not include the the length of any
798 * data places in aggregation BDs.
803 * This is a copy of the opaque field from the RX BD this completion
809 * This value is written by the NIC such that it will be different for
810 * each pass through the completion queue. The even passes will write 1.
811 * The odd passes will write 0.
813 #define RX_PKT_CMPL_V1 UINT32_C(0x1)
815 * This value is the number of aggregation buffers that follow this
816 * entry in the completion ring that are a part of this packet. If the
817 * value is zero, then the packet is completely contained in the buffer
818 * space provided for the packet in the RX ring.
820 #define RX_PKT_CMPL_AGG_BUFS_MASK UINT32_C(0x3e)
821 #define RX_PKT_CMPL_AGG_BUFS_SFT 1
825 * This is the RSS hash type for the packet. The value is packed
826 * {tuple_extrac_op[1:0],rss_profile_id[4:0],tuple_extrac_op[2]}.
828 uint8_t rss_hash_type;
831 * This value indicates the offset from the beginning of the packet
832 * where the inner payload starts. This value is valid for TCP, UDP,
833 * FCoE, and RoCE packets.
835 uint8_t payload_offset;
840 * This value is the RSS hash value calculated for the packet based on
841 * the mode bits and key value in the VNIC.
844 } __attribute__((packed));
846 /* last 16 bytes of RX Packet Completion Record */
847 struct rx_pkt_cmpl_hi {
849 * This indicates that the ip checksum was calculated for the inner
850 * packet and that the ip_cs_error field indicates if there was an
853 #define RX_PKT_CMPL_FLAGS2_IP_CS_CALC UINT32_C(0x1)
855 * This indicates that the TCP, UDP or ICMP checksum was calculated for
856 * the inner packet and that the l4_cs_error field indicates if there
859 #define RX_PKT_CMPL_FLAGS2_L4_CS_CALC UINT32_C(0x2)
861 * This indicates that the ip checksum was calculated for the tunnel
862 * header and that the t_ip_cs_error field indicates if there was an
865 #define RX_PKT_CMPL_FLAGS2_T_IP_CS_CALC UINT32_C(0x4)
867 * This indicates that the UDP checksum was calculated for the tunnel
868 * packet and that the t_l4_cs_error field indicates if there was an
871 #define RX_PKT_CMPL_FLAGS2_T_L4_CS_CALC UINT32_C(0x8)
872 /* This value indicates what format the metadata field is. */
873 #define RX_PKT_CMPL_FLAGS2_META_FORMAT_MASK UINT32_C(0xf0)
874 #define RX_PKT_CMPL_FLAGS2_META_FORMAT_SFT 4
875 /* No metadata informtaion. Value is zero. */
876 #define RX_PKT_CMPL_FLAGS2_META_FORMAT_NONE (UINT32_C(0x0) << 4)
878 * The metadata field contains the VLAN tag and TPID value. -
879 * metadata[11:0] contains the vlan VID value. - metadata[12]
880 * contains the vlan DE value. - metadata[15:13] contains the
881 * vlan PRI value. - metadata[31:16] contains the vlan TPID
884 #define RX_PKT_CMPL_FLAGS2_META_FORMAT_VLAN (UINT32_C(0x1) << 4)
885 #define RX_PKT_CMPL_FLAGS2_META_FORMAT_LAST \
886 RX_PKT_CMPL_FLAGS2_META_FORMAT_VLAN
888 * This field indicates the IP type for the inner-most IP header. A
889 * value of '0' indicates IPv4. A value of '1' indicates IPv6. This
890 * value is only valid if itype indicates a packet with an IP header.
892 #define RX_PKT_CMPL_FLAGS2_IP_TYPE UINT32_C(0x100)
896 * This is data from the CFA block as indicated by the meta_format
899 /* When meta_format=1, this value is the VLAN VID. */
900 #define RX_PKT_CMPL_METADATA_VID_MASK UINT32_C(0xfff)
901 #define RX_PKT_CMPL_METADATA_VID_SFT 0
902 /* When meta_format=1, this value is the VLAN DE. */
903 #define RX_PKT_CMPL_METADATA_DE UINT32_C(0x1000)
904 /* When meta_format=1, this value is the VLAN PRI. */
905 #define RX_PKT_CMPL_METADATA_PRI_MASK UINT32_C(0xe000)
906 #define RX_PKT_CMPL_METADATA_PRI_SFT 13
907 /* When meta_format=1, this value is the VLAN TPID. */
908 #define RX_PKT_CMPL_METADATA_TPID_MASK UINT32_C(0xffff0000)
909 #define RX_PKT_CMPL_METADATA_TPID_SFT 16
913 * This value is written by the NIC such that it will be different for
914 * each pass through the completion queue. The even passes will write 1.
915 * The odd passes will write 0.
917 #define RX_PKT_CMPL_V2 UINT32_C(0x1)
919 * This error indicates that there was some sort of problem with the BDs
920 * for the packet that was found after part of the packet was already
921 * placed. The packet should be treated as invalid.
923 #define RX_PKT_CMPL_ERRORS_BUFFER_ERROR_MASK UINT32_C(0xe)
924 #define RX_PKT_CMPL_ERRORS_BUFFER_ERROR_SFT 1
925 /* No buffer error */
926 #define RX_PKT_CMPL_ERRORS_BUFFER_ERROR_NO_BUFFER \
929 * Did Not Fit: Packet did not fit into packet buffer provided.
930 * For regular placement, this means the packet did not fit in
931 * the buffer provided. For HDS and jumbo placement, this means
932 * that the packet could not be placed into 7 physical buffers
935 #define RX_PKT_CMPL_ERRORS_BUFFER_ERROR_DID_NOT_FIT \
938 * Not On Chip: All BDs needed for the packet were not on-chip
939 * when the packet arrived.
941 #define RX_PKT_CMPL_ERRORS_BUFFER_ERROR_NOT_ON_CHIP \
943 /* Bad Format: BDs were not formatted correctly. */
944 #define RX_PKT_CMPL_ERRORS_BUFFER_ERROR_BAD_FORMAT \
946 #define RX_PKT_CMPL_ERRORS_BUFFER_ERROR_LAST \
947 RX_PKT_CMPL_ERRORS_BUFFER_ERROR_BAD_FORMAT
948 /* This indicates that there was an error in the IP header checksum. */
949 #define RX_PKT_CMPL_ERRORS_IP_CS_ERROR UINT32_C(0x10)
951 * This indicates that there was an error in the TCP, UDP or ICMP
954 #define RX_PKT_CMPL_ERRORS_L4_CS_ERROR UINT32_C(0x20)
956 * This indicates that there was an error in the tunnel IP header
959 #define RX_PKT_CMPL_ERRORS_T_IP_CS_ERROR UINT32_C(0x40)
960 /* This indicates that there was an error in the tunnel UDP checksum. */
961 #define RX_PKT_CMPL_ERRORS_T_L4_CS_ERROR UINT32_C(0x80)
963 * This indicates that there was a CRC error on either an FCoE or RoCE
964 * packet. The itype indicates the packet type.
966 #define RX_PKT_CMPL_ERRORS_CRC_ERROR UINT32_C(0x100)
968 * This indicates that there was an error in the tunnel portion of the
969 * packet when this field is non-zero.
971 #define RX_PKT_CMPL_ERRORS_T_PKT_ERROR_MASK UINT32_C(0xe00)
972 #define RX_PKT_CMPL_ERRORS_T_PKT_ERROR_SFT 9
974 * No additional error occurred on the tunnel portion of the
975 * packet of the packet does not have a tunnel.
977 #define RX_PKT_CMPL_ERRORS_T_PKT_ERROR_NO_ERROR (UINT32_C(0x0) << 9)
979 * Indicates that IP header version does not match expectation
980 * from L2 Ethertype for IPv4 and IPv6 in the tunnel header.
982 #define RX_PKT_CMPL_ERRORS_T_PKT_ERROR_T_L3_BAD_VERSION \
985 * Indicates that header length is out of range in the tunnel
986 * header. Valid for IPv4.
988 #define RX_PKT_CMPL_ERRORS_T_PKT_ERROR_T_L3_BAD_HDR_LEN \
991 * Indicates that the physical packet is shorter than that
992 * claimed by the PPPoE header length for a tunnel PPPoE packet.
994 #define RX_PKT_CMPL_ERRORS_T_PKT_ERROR_TUNNEL_TOTAL_ERROR \
997 * Indicates that physical packet is shorter than that claimed
998 * by the tunnel l3 header length. Valid for IPv4, or IPv6
999 * tunnel packet packets.
1001 #define RX_PKT_CMPL_ERRORS_T_PKT_ERROR_T_IP_TOTAL_ERROR \
1002 (UINT32_C(0x4) << 9)
1004 * Indicates that the physical packet is shorter than that
1005 * claimed by the tunnel UDP header length for a tunnel UDP
1006 * packet that is not fragmented.
1008 #define RX_PKT_CMPL_ERRORS_T_PKT_ERROR_T_UDP_TOTAL_ERROR \
1009 (UINT32_C(0x5) << 9)
1011 * indicates that the IPv4 TTL or IPv6 hop limit check have
1012 * failed (e.g. TTL = 0) in the tunnel header. Valid for IPv4,
1015 #define RX_PKT_CMPL_ERRORS_T_PKT_ERROR_T_L3_BAD_TTL \
1016 (UINT32_C(0x6) << 9)
1017 #define RX_PKT_CMPL_ERRORS_T_PKT_ERROR_LAST \
1018 RX_PKT_CMPL_ERRORS_T_PKT_ERROR_T_L3_BAD_TTL
1020 * This indicates that there was an error in the inner portion of the
1021 * packet when this field is non-zero.
1023 #define RX_PKT_CMPL_ERRORS_PKT_ERROR_MASK UINT32_C(0xf000)
1024 #define RX_PKT_CMPL_ERRORS_PKT_ERROR_SFT 12
1026 * No additional error occurred on the tunnel portion of the
1027 * packet of the packet does not have a tunnel.
1029 #define RX_PKT_CMPL_ERRORS_PKT_ERROR_NO_ERROR (UINT32_C(0x0) << 12)
1031 * Indicates that IP header version does not match expectation
1032 * from L2 Ethertype for IPv4 and IPv6 or that option other than
1033 * VFT was parsed on FCoE packet.
1035 #define RX_PKT_CMPL_ERRORS_PKT_ERROR_L3_BAD_VERSION \
1036 (UINT32_C(0x1) << 12)
1038 * indicates that header length is out of range. Valid for IPv4
1041 #define RX_PKT_CMPL_ERRORS_PKT_ERROR_L3_BAD_HDR_LEN \
1042 (UINT32_C(0x2) << 12)
1044 * indicates that the IPv4 TTL or IPv6 hop limit check have
1045 * failed (e.g. TTL = 0). Valid for IPv4, and IPv6
1047 #define RX_PKT_CMPL_ERRORS_PKT_ERROR_L3_BAD_TTL (UINT32_C(0x3) << 12)
1049 * Indicates that physical packet is shorter than that claimed
1050 * by the l3 header length. Valid for IPv4, IPv6 packet or RoCE
1053 #define RX_PKT_CMPL_ERRORS_PKT_ERROR_IP_TOTAL_ERROR \
1054 (UINT32_C(0x4) << 12)
1056 * Indicates that the physical packet is shorter than that
1057 * claimed by the UDP header length for a UDP packet that is not
1060 #define RX_PKT_CMPL_ERRORS_PKT_ERROR_UDP_TOTAL_ERROR \
1061 (UINT32_C(0x5) << 12)
1063 * Indicates that TCP header length > IP payload. Valid for TCP
1066 #define RX_PKT_CMPL_ERRORS_PKT_ERROR_L4_BAD_HDR_LEN \
1067 (UINT32_C(0x6) << 12)
1068 /* Indicates that TCP header length < 5. Valid for TCP. */
1069 #define RX_PKT_CMPL_ERRORS_PKT_ERROR_L4_BAD_HDR_LEN_TOO_SMALL \
1070 (UINT32_C(0x7) << 12)
1072 * Indicates that TCP option headers result in a TCP header size
1073 * that does not match data offset in TCP header. Valid for TCP.
1075 #define RX_PKT_CMPL_ERRORS_PKT_ERROR_L4_BAD_OPT_LEN \
1076 (UINT32_C(0x8) << 12)
1077 #define RX_PKT_CMPL_ERRORS_PKT_ERROR_LAST \
1078 RX_PKT_CMPL_ERRORS_PKT_ERROR_L4_BAD_OPT_LEN
1079 #define RX_PKT_CMPL_ERRORS_MASK UINT32_C(0xfffe)
1080 #define RX_PKT_CMPL_ERRORS_SFT 1
1084 * This field identifies the CFA action rule that was used for this
1090 * This value holds the reordering sequence number for the packet. If
1091 * the reordering sequence is not valid, then this value is zero. The
1092 * reordering domain for the packet is in the bottom 8 to 10b of the
1093 * rss_hash value. The bottom 20b of this value contain the ordering
1094 * domain value for the packet.
1096 #define RX_PKT_CMPL_REORDER_MASK UINT32_C(0xffffff)
1097 #define RX_PKT_CMPL_REORDER_SFT 0
1099 } __attribute__((packed));
1101 /* HWRM Forwarded Request (16 bytes) */
1102 struct hwrm_fwd_req_cmpl {
1103 /* Length of forwarded request in bytes. */
1105 * This field indicates the exact type of the completion. By convention,
1106 * the LSB identifies the length of the record in 16B units. Even values
1107 * indicate 16B records. Odd values indicate 32B records.
1109 #define HWRM_FWD_REQ_CMPL_TYPE_MASK UINT32_C(0x3f)
1110 #define HWRM_FWD_REQ_CMPL_TYPE_SFT 0
1111 /* Forwarded HWRM Request */
1112 #define HWRM_FWD_REQ_CMPL_TYPE_HWRM_FWD_REQ (UINT32_C(0x22) << 0)
1113 /* Length of forwarded request in bytes. */
1114 #define HWRM_FWD_REQ_CMPL_REQ_LEN_MASK UINT32_C(0xffc0)
1115 #define HWRM_FWD_REQ_CMPL_REQ_LEN_SFT 6
1116 uint16_t req_len_type;
1119 * Source ID of this request. Typically used in forwarding requests and
1120 * responses. 0x0 - 0xFFF8 - Used for function ids 0xFFF8 - 0xFFFE -
1121 * Reserved for internal processors 0xFFFF - HWRM
1127 /* Address of forwarded request. */
1129 * This value is written by the NIC such that it will be different for
1130 * each pass through the completion queue. The even passes will write 1.
1131 * The odd passes will write 0.
1133 #define HWRM_FWD_REQ_CMPL_V UINT32_C(0x1)
1134 /* Address of forwarded request. */
1135 #define HWRM_FWD_REQ_CMPL_REQ_BUF_ADDR_MASK UINT32_C(0xfffffffe)
1136 #define HWRM_FWD_REQ_CMPL_REQ_BUF_ADDR_SFT 1
1137 uint64_t req_buf_addr_v;
1138 } __attribute__((packed));
1140 /* HWRM Asynchronous Event Completion Record (16 bytes) */
1141 struct hwrm_async_event_cmpl {
1143 * This field indicates the exact type of the completion. By convention,
1144 * the LSB identifies the length of the record in 16B units. Even values
1145 * indicate 16B records. Odd values indicate 32B records.
1147 #define HWRM_ASYNC_EVENT_CMPL_TYPE_MASK UINT32_C(0x3f)
1148 #define HWRM_ASYNC_EVENT_CMPL_TYPE_SFT 0
1149 /* HWRM Asynchronous Event Information */
1150 #define HWRM_ASYNC_EVENT_CMPL_TYPE_HWRM_ASYNC_EVENT \
1151 (UINT32_C(0x2e) << 0)
1154 /* Identifiers of events. */
1155 /* Link status changed */
1156 #define HWRM_ASYNC_EVENT_CMPL_EVENT_ID_LINK_STATUS_CHANGE \
1157 (UINT32_C(0x0) << 0)
1158 /* Link MTU changed */
1159 #define HWRM_ASYNC_EVENT_CMPL_EVENT_ID_LINK_MTU_CHANGE \
1160 (UINT32_C(0x1) << 0)
1161 /* Link speed changed */
1162 #define HWRM_ASYNC_EVENT_CMPL_EVENT_ID_LINK_SPEED_CHANGE \
1163 (UINT32_C(0x2) << 0)
1164 /* DCB Configuration changed */
1165 #define HWRM_ASYNC_EVENT_CMPL_EVENT_ID_DCB_CONFIG_CHANGE \
1166 (UINT32_C(0x3) << 0)
1167 /* Port connection not allowed */
1168 #define HWRM_ASYNC_EVENT_CMPL_EVENT_ID_PORT_CONN_NOT_ALLOWED \
1169 (UINT32_C(0x4) << 0)
1170 /* Link speed configuration was not allowed */
1171 #define HWRM_ASYNC_EVENT_CMPL_EVENT_ID_LINK_SPEED_CFG_NOT_ALLOWED \
1172 (UINT32_C(0x5) << 0)
1173 /* Function driver unloaded */
1174 #define HWRM_ASYNC_EVENT_CMPL_EVENT_ID_FUNC_DRVR_UNLOAD \
1175 (UINT32_C(0x10) << 0)
1176 /* Function driver loaded */
1177 #define HWRM_ASYNC_EVENT_CMPL_EVENT_ID_FUNC_DRVR_LOAD \
1178 (UINT32_C(0x11) << 0)
1179 /* PF driver unloaded */
1180 #define HWRM_ASYNC_EVENT_CMPL_EVENT_ID_PF_DRVR_UNLOAD \
1181 (UINT32_C(0x20) << 0)
1182 /* PF driver loaded */
1183 #define HWRM_ASYNC_EVENT_CMPL_EVENT_ID_PF_DRVR_LOAD \
1184 (UINT32_C(0x21) << 0)
1185 /* VF Function Level Reset (FLR) */
1186 #define HWRM_ASYNC_EVENT_CMPL_EVENT_ID_VF_FLR (UINT32_C(0x30) << 0)
1187 /* VF MAC Address Change */
1188 #define HWRM_ASYNC_EVENT_CMPL_EVENT_ID_VF_MAC_ADDR_CHANGE \
1189 (UINT32_C(0x31) << 0)
1190 /* PF-VF communication channel status change. */
1191 #define HWRM_ASYNC_EVENT_CMPL_EVENT_ID_PF_VF_COMM_STATUS_CHANGE \
1192 (UINT32_C(0x32) << 0)
1194 #define HWRM_ASYNC_EVENT_CMPL_EVENT_ID_HWRM_ERROR \
1195 (UINT32_C(0xff) << 0)
1198 /* Event specific data */
1199 uint32_t event_data2;
1203 * This value is written by the NIC such that it will be different for
1204 * each pass through the completion queue. The even passes will write 1.
1205 * The odd passes will write 0.
1207 #define HWRM_ASYNC_EVENT_CMPL_V UINT32_C(0x1)
1209 #define HWRM_ASYNC_EVENT_CMPL_OPAQUE_MASK UINT32_C(0xfe)
1210 #define HWRM_ASYNC_EVENT_CMPL_OPAQUE_SFT 1
1213 /* 8-lsb timestamp from POR (100-msec resolution) */
1214 uint8_t timestamp_lo;
1216 /* 16-lsb timestamp from POR (100-msec resolution) */
1217 uint16_t timestamp_hi;
1219 /* Event specific data */
1220 uint32_t event_data1;
1221 } __attribute__((packed));
1224 * Note: The Hardware Resource Manager (HWRM) manages various hardware resources
1225 * inside the chip. The HWRM is implemented in firmware, and runs on embedded
1226 * processors inside the chip. This firmware is vital part of the chip's
1227 * hardware. The chip can not be used by driver without it.
1230 /* Input (16 bytes) */
1233 * This value indicates what type of request this is. The format for the
1234 * rest of the command is determined by this field.
1239 * This value indicates the what completion ring the request will be
1240 * optionally completed on. If the value is -1, then no CR completion
1241 * will be generated. Any other value must be a valid CR ring_id value
1242 * for this function.
1246 /* This value indicates the command sequence number. */
1250 * Target ID of this command. 0x0 - 0xFFF8 - Used for function ids
1251 * 0xFFF8 - 0xFFFE - Reserved for internal processors 0xFFFF - HWRM
1256 * This is the host address where the response will be written when the
1257 * request is complete. This area must be 16B aligned and must be
1258 * cleared to zero before the request is made.
1261 } __attribute__((packed));
1263 /* Output (8 bytes) */
1266 * Pass/Fail or error type Note: receiver to verify the in parameters,
1267 * and fail the call with an error when appropriate
1269 uint16_t error_code;
1271 /* This field returns the type of original request. */
1274 /* This field provides original sequence number of the command. */
1278 * This field is the length of the response in bytes. The last byte of
1279 * the response is a valid flag that will read as '1' when the command
1280 * has been completely written to memory.
1283 } __attribute__((packed));
1285 /* hwrm_cfa_l2_filter_alloc */
1287 * A filter is used to identify traffic that contains a matching set of
1288 * parameters like unicast or broadcast MAC address or a VLAN tag amongst
1289 * other things which then allows the ASIC to direct the incoming traffic
1290 * to an appropriate VNIC or Rx ring.
1293 /* Input (96 bytes) */
1294 struct hwrm_cfa_l2_filter_alloc_input {
1296 * This value indicates what type of request this is. The format for the
1297 * rest of the command is determined by this field.
1302 * This value indicates the what completion ring the request will be
1303 * optionally completed on. If the value is -1, then no CR completion
1304 * will be generated. Any other value must be a valid CR ring_id value
1305 * for this function.
1309 /* This value indicates the command sequence number. */
1313 * Target ID of this command. 0x0 - 0xFFF8 - Used for function ids
1314 * 0xFFF8 - 0xFFFE - Reserved for internal processors 0xFFFF - HWRM
1319 * This is the host address where the response will be written when the
1320 * request is complete. This area must be 16B aligned and must be
1321 * cleared to zero before the request is made.
1326 * Enumeration denoting the RX, TX type of the resource. This
1327 * enumeration is used for resources that are similar for both TX and RX
1328 * paths of the chip.
1330 #define HWRM_CFA_L2_FILTER_ALLOC_INPUT_FLAGS_PATH \
1333 #define HWRM_CFA_L2_FILTER_ALLOC_INPUT_FLAGS_PATH_TX \
1334 (UINT32_C(0x0) << 0)
1336 #define HWRM_CFA_L2_FILTER_ALLOC_INPUT_FLAGS_PATH_RX \
1337 (UINT32_C(0x1) << 0)
1338 #define HWRM_CFA_L2_FILTER_ALLOC_INPUT_FLAGS_PATH_LAST \
1339 HWRM_CFA_L2_FILTER_ALLOC_INPUT_FLAGS_PATH_RX
1341 * Setting of this flag indicates the applicability to the loopback
1344 #define HWRM_CFA_L2_FILTER_ALLOC_INPUT_FLAGS_LOOPBACK \
1347 * Setting of this flag indicates drop action. If this flag is not set,
1348 * then it should be considered accept action.
1350 #define HWRM_CFA_L2_FILTER_ALLOC_INPUT_FLAGS_DROP \
1353 * If this flag is set, all t_l2_* fields are invalid and they should
1354 * not be specified. If this flag is set, then l2_* fields refer to
1355 * fields of outermost L2 header.
1357 #define HWRM_CFA_L2_FILTER_ALLOC_INPUT_FLAGS_OUTERMOST \
1361 /* This bit must be '1' for the l2_addr field to be configured. */
1362 #define HWRM_CFA_L2_FILTER_ALLOC_INPUT_ENABLES_L2_ADDR \
1364 /* This bit must be '1' for the l2_addr_mask field to be configured. */
1365 #define HWRM_CFA_L2_FILTER_ALLOC_INPUT_ENABLES_L2_ADDR_MASK \
1367 /* This bit must be '1' for the l2_ovlan field to be configured. */
1368 #define HWRM_CFA_L2_FILTER_ALLOC_INPUT_ENABLES_L2_OVLAN \
1370 /* This bit must be '1' for the l2_ovlan_mask field to be configured. */
1371 #define HWRM_CFA_L2_FILTER_ALLOC_INPUT_ENABLES_L2_OVLAN_MASK \
1373 /* This bit must be '1' for the l2_ivlan field to be configured. */
1374 #define HWRM_CFA_L2_FILTER_ALLOC_INPUT_ENABLES_L2_IVLAN \
1376 /* This bit must be '1' for the l2_ivlan_mask field to be configured. */
1377 #define HWRM_CFA_L2_FILTER_ALLOC_INPUT_ENABLES_L2_IVLAN_MASK \
1379 /* This bit must be '1' for the t_l2_addr field to be configured. */
1380 #define HWRM_CFA_L2_FILTER_ALLOC_INPUT_ENABLES_T_L2_ADDR \
1383 * This bit must be '1' for the t_l2_addr_mask field to be configured.
1385 #define HWRM_CFA_L2_FILTER_ALLOC_INPUT_ENABLES_T_L2_ADDR_MASK \
1387 /* This bit must be '1' for the t_l2_ovlan field to be configured. */
1388 #define HWRM_CFA_L2_FILTER_ALLOC_INPUT_ENABLES_T_L2_OVLAN \
1391 * This bit must be '1' for the t_l2_ovlan_mask field to be configured.
1393 #define HWRM_CFA_L2_FILTER_ALLOC_INPUT_ENABLES_T_L2_OVLAN_MASK \
1395 /* This bit must be '1' for the t_l2_ivlan field to be configured. */
1396 #define HWRM_CFA_L2_FILTER_ALLOC_INPUT_ENABLES_T_L2_IVLAN \
1399 * This bit must be '1' for the t_l2_ivlan_mask field to be configured.
1401 #define HWRM_CFA_L2_FILTER_ALLOC_INPUT_ENABLES_T_L2_IVLAN_MASK \
1403 /* This bit must be '1' for the src_type field to be configured. */
1404 #define HWRM_CFA_L2_FILTER_ALLOC_INPUT_ENABLES_SRC_TYPE \
1406 /* This bit must be '1' for the src_id field to be configured. */
1407 #define HWRM_CFA_L2_FILTER_ALLOC_INPUT_ENABLES_SRC_ID \
1409 /* This bit must be '1' for the tunnel_type field to be configured. */
1410 #define HWRM_CFA_L2_FILTER_ALLOC_INPUT_ENABLES_TUNNEL_TYPE \
1412 /* This bit must be '1' for the dst_id field to be configured. */
1413 #define HWRM_CFA_L2_FILTER_ALLOC_INPUT_ENABLES_DST_ID \
1416 * This bit must be '1' for the mirror_vnic_id field to be configured.
1418 #define HWRM_CFA_L2_FILTER_ALLOC_INPUT_ENABLES_MIRROR_VNIC_ID \
1423 * This value sets the match value for the L2 MAC address. Destination
1424 * MAC address for RX path. Source MAC address for TX path.
1432 * This value sets the mask value for the L2 address. A value of 0 will
1433 * mask the corresponding bit from compare.
1435 uint8_t l2_addr_mask[6];
1437 /* This value sets VLAN ID value for outer VLAN. */
1441 * This value sets the mask value for the ovlan id. A value of 0 will
1442 * mask the corresponding bit from compare.
1444 uint16_t l2_ovlan_mask;
1446 /* This value sets VLAN ID value for inner VLAN. */
1450 * This value sets the mask value for the ivlan id. A value of 0 will
1451 * mask the corresponding bit from compare.
1453 uint16_t l2_ivlan_mask;
1459 * This value sets the match value for the tunnel L2 MAC address.
1460 * Destination MAC address for RX path. Source MAC address for TX path.
1462 uint8_t t_l2_addr[6];
1468 * This value sets the mask value for the tunnel L2 address. A value of
1469 * 0 will mask the corresponding bit from compare.
1471 uint8_t t_l2_addr_mask[6];
1473 /* This value sets VLAN ID value for tunnel outer VLAN. */
1474 uint16_t t_l2_ovlan;
1477 * This value sets the mask value for the tunnel ovlan id. A value of 0
1478 * will mask the corresponding bit from compare.
1480 uint16_t t_l2_ovlan_mask;
1482 /* This value sets VLAN ID value for tunnel inner VLAN. */
1483 uint16_t t_l2_ivlan;
1486 * This value sets the mask value for the tunnel ivlan id. A value of 0
1487 * will mask the corresponding bit from compare.
1489 uint16_t t_l2_ivlan_mask;
1491 /* This value identifies the type of source of the packet. */
1493 #define HWRM_CFA_L2_FILTER_ALLOC_INPUT_SRC_TYPE_NPORT \
1494 (UINT32_C(0x0) << 0)
1495 /* Physical function */
1496 #define HWRM_CFA_L2_FILTER_ALLOC_INPUT_SRC_TYPE_PF \
1497 (UINT32_C(0x1) << 0)
1498 /* Virtual function */
1499 #define HWRM_CFA_L2_FILTER_ALLOC_INPUT_SRC_TYPE_VF \
1500 (UINT32_C(0x2) << 0)
1501 /* Virtual NIC of a function */
1502 #define HWRM_CFA_L2_FILTER_ALLOC_INPUT_SRC_TYPE_VNIC \
1503 (UINT32_C(0x3) << 0)
1504 /* Embedded processor for CFA management */
1505 #define HWRM_CFA_L2_FILTER_ALLOC_INPUT_SRC_TYPE_KONG \
1506 (UINT32_C(0x4) << 0)
1507 /* Embedded processor for OOB management */
1508 #define HWRM_CFA_L2_FILTER_ALLOC_INPUT_SRC_TYPE_APE \
1509 (UINT32_C(0x5) << 0)
1510 /* Embedded processor for RoCE */
1511 #define HWRM_CFA_L2_FILTER_ALLOC_INPUT_SRC_TYPE_BONO \
1512 (UINT32_C(0x6) << 0)
1513 /* Embedded processor for network proxy functions */
1514 #define HWRM_CFA_L2_FILTER_ALLOC_INPUT_SRC_TYPE_TANG \
1515 (UINT32_C(0x7) << 0)
1520 * This value is the id of the source. For a network port, it represents
1521 * port_id. For a physical function, it represents fid. For a virtual
1522 * function, it represents vf_id. For a vnic, it represents vnic_id. For
1523 * embedded processors, this id is not valid. Notes: 1. The function ID
1524 * is implied if it src_id is not provided for a src_type that is either
1530 #define HWRM_CFA_L2_FILTER_ALLOC_INPUT_TUNNEL_TYPE_NONTUNNEL \
1531 (UINT32_C(0x0) << 0)
1532 /* Virtual eXtensible Local Area Network (VXLAN) */
1533 #define HWRM_CFA_L2_FILTER_ALLOC_INPUT_TUNNEL_TYPE_VXLAN \
1534 (UINT32_C(0x1) << 0)
1536 * Network Virtualization Generic Routing Encapsulation (NVGRE)
1538 #define HWRM_CFA_L2_FILTER_ALLOC_INPUT_TUNNEL_TYPE_NVGRE \
1539 (UINT32_C(0x2) << 0)
1541 * Generic Routing Encapsulation (GRE) inside Ethernet payload
1543 #define HWRM_CFA_L2_FILTER_ALLOC_INPUT_TUNNEL_TYPE_L2GRE \
1544 (UINT32_C(0x3) << 0)
1546 #define HWRM_CFA_L2_FILTER_ALLOC_INPUT_TUNNEL_TYPE_IPIP \
1547 (UINT32_C(0x4) << 0)
1548 /* Generic Network Virtualization Encapsulation (Geneve) */
1549 #define HWRM_CFA_L2_FILTER_ALLOC_INPUT_TUNNEL_TYPE_GENEVE \
1550 (UINT32_C(0x5) << 0)
1551 /* Multi-Protocol Lable Switching (MPLS) */
1552 #define HWRM_CFA_L2_FILTER_ALLOC_INPUT_TUNNEL_TYPE_MPLS \
1553 (UINT32_C(0x6) << 0)
1554 /* Stateless Transport Tunnel (STT) */
1555 #define HWRM_CFA_L2_FILTER_ALLOC_INPUT_TUNNEL_TYPE_STT \
1556 (UINT32_C(0x7) << 0)
1558 * Generic Routing Encapsulation (GRE) inside IP datagram
1561 #define HWRM_CFA_L2_FILTER_ALLOC_INPUT_TUNNEL_TYPE_IPGRE \
1562 (UINT32_C(0x8) << 0)
1563 /* Any tunneled traffic */
1564 #define HWRM_CFA_L2_FILTER_ALLOC_INPUT_TUNNEL_TYPE_ANYTUNNEL \
1565 (UINT32_C(0xff) << 0)
1566 uint8_t tunnel_type;
1571 * If set, this value shall represent the Logical VNIC ID of the
1572 * destination VNIC for the RX path and network port id of the
1573 * destination port for the TX path.
1577 /* Logical VNIC ID of the VNIC where traffic is mirrored. */
1578 uint16_t mirror_vnic_id;
1581 * This hint is provided to help in placing the filter in the filter
1585 #define HWRM_CFA_L2_FILTER_ALLOC_INPUT_PRI_HINT_NO_PREFER \
1586 (UINT32_C(0x0) << 0)
1587 /* Above the given filter */
1588 #define HWRM_CFA_L2_FILTER_ALLOC_INPUT_PRI_HINT_ABOVE_FILTER \
1589 (UINT32_C(0x1) << 0)
1590 /* Below the given filter */
1591 #define HWRM_CFA_L2_FILTER_ALLOC_INPUT_PRI_HINT_BELOW_FILTER \
1592 (UINT32_C(0x2) << 0)
1593 /* As high as possible */
1594 #define HWRM_CFA_L2_FILTER_ALLOC_INPUT_PRI_HINT_MAX \
1595 (UINT32_C(0x3) << 0)
1596 /* As low as possible */
1597 #define HWRM_CFA_L2_FILTER_ALLOC_INPUT_PRI_HINT_MIN \
1598 (UINT32_C(0x4) << 0)
1605 * This is the ID of the filter that goes along with the pri_hint. This
1606 * field is valid only for the following values. 1 - Above the given
1607 * filter 2 - Below the given filter
1609 uint64_t l2_filter_id_hint;
1610 } __attribute__((packed));
1612 /* Output (24 bytes) */
1613 struct hwrm_cfa_l2_filter_alloc_output {
1615 * Pass/Fail or error type Note: receiver to verify the in parameters,
1616 * and fail the call with an error when appropriate
1618 uint16_t error_code;
1620 /* This field returns the type of original request. */
1623 /* This field provides original sequence number of the command. */
1627 * This field is the length of the response in bytes. The last byte of
1628 * the response is a valid flag that will read as '1' when the command
1629 * has been completely written to memory.
1634 * This value identifies a set of CFA data structures used for an L2
1637 uint64_t l2_filter_id;
1640 * This is the ID of the flow associated with this filter. This value
1641 * shall be used to match and associate the flow identifier returned in
1642 * completion records. A value of 0xFFFFFFFF shall indicate no flow id.
1651 * This field is used in Output records to indicate that the output is
1652 * completely written to RAM. This field should be read as '1' to
1653 * indicate that the output has been completely written. When writing a
1654 * command completion or response to an internal processor, the order of
1655 * writes has to be such that this field is written last.
1658 } __attribute__((packed));
1660 /* hwrm_cfa_l2_filter_free */
1662 * Description: Free a L2 filter. The HWRM shall free all associated filter
1663 * resources with the L2 filter.
1666 /* Input (24 bytes) */
1667 struct hwrm_cfa_l2_filter_free_input {
1669 * This value indicates what type of request this is. The format for the
1670 * rest of the command is determined by this field.
1675 * This value indicates the what completion ring the request will be
1676 * optionally completed on. If the value is -1, then no CR completion
1677 * will be generated. Any other value must be a valid CR ring_id value
1678 * for this function.
1682 /* This value indicates the command sequence number. */
1686 * Target ID of this command. 0x0 - 0xFFF8 - Used for function ids
1687 * 0xFFF8 - 0xFFFE - Reserved for internal processors 0xFFFF - HWRM
1692 * This is the host address where the response will be written when the
1693 * request is complete. This area must be 16B aligned and must be
1694 * cleared to zero before the request is made.
1699 * This value identifies a set of CFA data structures used for an L2
1702 uint64_t l2_filter_id;
1703 } __attribute__((packed));
1705 /* Output (16 bytes) */
1706 struct hwrm_cfa_l2_filter_free_output {
1708 * Pass/Fail or error type Note: receiver to verify the in parameters,
1709 * and fail the call with an error when appropriate
1711 uint16_t error_code;
1713 /* This field returns the type of original request. */
1716 /* This field provides original sequence number of the command. */
1720 * This field is the length of the response in bytes. The last byte of
1721 * the response is a valid flag that will read as '1' when the command
1722 * has been completely written to memory.
1732 * This field is used in Output records to indicate that the output is
1733 * completely written to RAM. This field should be read as '1' to
1734 * indicate that the output has been completely written. When writing a
1735 * command completion or response to an internal processor, the order of
1736 * writes has to be such that this field is written last.
1739 } __attribute__((packed));
1741 /* hwrm_cfa_l2_set_rx_mask */
1742 /* Description: This command will set rx mask of the function. */
1744 /* Input (40 bytes) */
1745 struct hwrm_cfa_l2_set_rx_mask_input {
1747 * This value indicates what type of request this is. The format for the
1748 * rest of the command is determined by this field.
1753 * This value indicates the what completion ring the request will be
1754 * optionally completed on. If the value is -1, then no CR completion
1755 * will be generated. Any other value must be a valid CR ring_id value
1756 * for this function.
1760 /* This value indicates the command sequence number. */
1764 * Target ID of this command. 0x0 - 0xFFF8 - Used for function ids
1765 * 0xFFF8 - 0xFFFE - Reserved for internal processors 0xFFFF - HWRM
1770 * This is the host address where the response will be written when the
1771 * request is complete. This area must be 16B aligned and must be
1772 * cleared to zero before the request is made.
1779 /* Reserved for future use. */
1780 #define HWRM_CFA_L2_SET_RX_MASK_INPUT_MASK_RESERVED UINT32_C(0x1)
1782 * When this bit is '1', the function is requested to accept multi-cast
1783 * packets specified by the multicast addr table.
1785 #define HWRM_CFA_L2_SET_RX_MASK_INPUT_MASK_MCAST UINT32_C(0x2)
1787 * When this bit is '1', the function is requested to accept all multi-
1790 #define HWRM_CFA_L2_SET_RX_MASK_INPUT_MASK_ALL_MCAST UINT32_C(0x4)
1792 * When this bit is '1', the function is requested to accept broadcast
1795 #define HWRM_CFA_L2_SET_RX_MASK_INPUT_MASK_BCAST UINT32_C(0x8)
1797 * When this bit is '1', the function is requested to be put in the
1798 * promiscuous mode. The HWRM should accept any function to set up
1799 * promiscuous mode. The HWRM shall follow the semantics below for the
1800 * promiscuous mode support. # When partitioning is not enabled on a
1801 * port (i.e. single PF on the port), then the PF shall be allowed to be
1802 * in the promiscuous mode. When the PF is in the promiscuous mode, then
1803 * it shall receive all host bound traffic on that port. # When
1804 * partitioning is enabled on a port (i.e. multiple PFs per port) and a
1805 * PF on that port is in the promiscuous mode, then the PF receives all
1806 * traffic within that partition as identified by a unique identifier
1807 * for the PF (e.g. S-Tag). If a unique outer VLAN for the PF is
1808 * specified, then the setting of promiscuous mode on that PF shall
1809 * result in the PF receiving all host bound traffic with matching outer
1810 * VLAN. # A VF shall can be set in the promiscuous mode. In the
1811 * promiscuous mode, the VF does not receive any traffic unless a unique
1812 * outer VLAN for the VF is specified. If a unique outer VLAN for the VF
1813 * is specified, then the setting of promiscuous mode on that VF shall
1814 * result in the VF receiving all host bound traffic with the matching
1815 * outer VLAN. # The HWRM shall allow the setting of promiscuous mode on
1816 * a function independently from the promiscuous mode settings on other
1819 #define HWRM_CFA_L2_SET_RX_MASK_INPUT_MASK_PROMISCUOUS UINT32_C(0x10)
1821 * If this flag is set, the corresponding RX filters shall be set up to
1822 * cover multicast/broadcast filters for the outermost Layer 2
1823 * destination MAC address field.
1825 #define HWRM_CFA_L2_SET_RX_MASK_INPUT_MASK_OUTERMOST UINT32_C(0x20)
1828 /* This is the address for mcast address tbl. */
1829 uint64_t mc_tbl_addr;
1832 * This value indicates how many entries in mc_tbl are valid. Each entry
1835 uint32_t num_mc_entries;
1838 } __attribute__((packed));
1840 /* Output (16 bytes) */
1841 struct hwrm_cfa_l2_set_rx_mask_output {
1843 * Pass/Fail or error type Note: receiver to verify the in parameters,
1844 * and fail the call with an error when appropriate
1846 uint16_t error_code;
1848 /* This field returns the type of original request. */
1851 /* This field provides original sequence number of the command. */
1855 * This field is the length of the response in bytes. The last byte of
1856 * the response is a valid flag that will read as '1' when the command
1857 * has been completely written to memory.
1867 * This field is used in Output records to indicate that the output is
1868 * completely written to RAM. This field should be read as '1' to
1869 * indicate that the output has been completely written. When writing a
1870 * command completion or response to an internal processor, the order of
1871 * writes has to be such that this field is written last.
1874 } __attribute__((packed));
1876 /* hwrm_exec_fwd_resp */
1878 * Description: This command is used to send an encapsulated request to the
1879 * HWRM. This command instructs the HWRM to execute the request and forward the
1880 * response of the encapsulated request to the location specified in the
1881 * original request that is encapsulated. The target id of this command shall be
1882 * set to 0xFFFF (HWRM). The response location in this command shall be used to
1883 * acknowledge the receipt of the encapsulated request and forwarding of the
1887 /* Input (128 bytes) */
1888 struct hwrm_exec_fwd_resp_input {
1890 * This value indicates what type of request this is. The format for the
1891 * rest of the command is determined by this field.
1896 * This value indicates the what completion ring the request will be
1897 * optionally completed on. If the value is -1, then no CR completion
1898 * will be generated. Any other value must be a valid CR ring_id value
1899 * for this function.
1903 /* This value indicates the command sequence number. */
1907 * Target ID of this command. 0x0 - 0xFFF8 - Used for function ids
1908 * 0xFFF8 - 0xFFFE - Reserved for internal processors 0xFFFF - HWRM
1913 * This is the host address where the response will be written when the
1914 * request is complete. This area must be 16B aligned and must be
1915 * cleared to zero before the request is made.
1920 * This is an encapsulated request. This request should be executed by
1921 * the HWRM and the response should be provided in the response buffer
1922 * inside the encapsulated request.
1924 uint32_t encap_request[26];
1927 * This value indicates the target id of the response to the
1928 * encapsulated request. 0x0 - 0xFFF8 - Used for function ids 0xFFF8 -
1929 * 0xFFFE - Reserved for internal processors 0xFFFF - HWRM
1931 uint16_t encap_resp_target_id;
1933 uint16_t unused_0[3];
1934 } __attribute__((packed));
1936 /* Output (16 bytes) */
1937 struct hwrm_exec_fwd_resp_output {
1939 * Pass/Fail or error type Note: receiver to verify the in parameters,
1940 * and fail the call with an error when appropriate
1942 uint16_t error_code;
1944 /* This field returns the type of original request. */
1947 /* This field provides original sequence number of the command. */
1951 * This field is the length of the response in bytes. The last byte of
1952 * the response is a valid flag that will read as '1' when the command
1953 * has been completely written to memory.
1963 * This field is used in Output records to indicate that the output is
1964 * completely written to RAM. This field should be read as '1' to
1965 * indicate that the output has been completely written. When writing a
1966 * command completion or response to an internal processor, the order of
1967 * writes has to be such that this field is written last.
1970 } __attribute__((packed));
1972 /* hwrm_func_qcaps */
1974 * Description: This command returns capabilities of a function. The input FID
1975 * value is used to indicate what function is being queried. This allows a
1976 * physical function driver to query virtual functions that are children of the
1977 * physical function. The output FID value is needed to configure Rings and
1978 * MSI-X vectors so their DMA operations appear correctly on the PCI bus.
1981 /* Input (24 bytes) */
1982 struct hwrm_func_qcaps_input {
1984 * This value indicates what type of request this is. The format for the
1985 * rest of the command is determined by this field.
1990 * This value indicates the what completion ring the request will be
1991 * optionally completed on. If the value is -1, then no CR completion
1992 * will be generated. Any other value must be a valid CR ring_id value
1993 * for this function.
1997 /* This value indicates the command sequence number. */
2001 * Target ID of this command. 0x0 - 0xFFF8 - Used for function ids
2002 * 0xFFF8 - 0xFFFE - Reserved for internal processors 0xFFFF - HWRM
2007 * This is the host address where the response will be written when the
2008 * request is complete. This area must be 16B aligned and must be
2009 * cleared to zero before the request is made.
2014 * Function ID of the function that is being queried. 0xFF... (All Fs)
2015 * if the query is for the requesting function.
2019 uint16_t unused_0[3];
2020 } __attribute__((packed));
2022 /* Output (80 bytes) */
2023 struct hwrm_func_qcaps_output {
2025 * Pass/Fail or error type Note: receiver to verify the in parameters,
2026 * and fail the call with an error when appropriate
2028 uint16_t error_code;
2030 /* This field returns the type of original request. */
2033 /* This field provides original sequence number of the command. */
2037 * This field is the length of the response in bytes. The last byte of
2038 * the response is a valid flag that will read as '1' when the command
2039 * has been completely written to memory.
2044 * FID value. This value is used to identify operations on the PCI bus
2045 * as belonging to a particular PCI function.
2050 * Port ID of port that this function is associated with. Valid only for
2051 * the PF. 0xFF... (All Fs) if this function is not associated with any
2052 * port. 0xFF... (All Fs) if this function is called from a VF.
2056 /* If 1, then Push mode is supported on this function. */
2057 #define HWRM_FUNC_QCAPS_OUTPUT_FLAGS_PUSH_MODE_SUPPORTED UINT32_C(0x1)
2059 * If 1, then the global MSI-X auto-masking is enabled for the device.
2061 #define HWRM_FUNC_QCAPS_OUTPUT_FLAGS_GLOBAL_MSIX_AUTOMASKING \
2064 * If 1, then the Precision Time Protocol (PTP) processing is supported
2065 * on this function. The HWRM should enable PTP on only a single
2066 * Physical Function (PF) per port.
2068 #define HWRM_FUNC_QCAPS_OUTPUT_FLAGS_PTP_SUPPORTED UINT32_C(0x4)
2072 * This value is current MAC address configured for this function. A
2073 * value of 00-00-00-00-00-00 indicates no MAC address is currently
2076 uint8_t perm_mac_address[6];
2079 * The maximum number of RSS/COS contexts that can be allocated to the
2082 uint16_t max_rsscos_ctx;
2085 * The maximum number of completion rings that can be allocated to the
2088 uint16_t max_cmpl_rings;
2091 * The maximum number of transmit rings that can be allocated to the
2094 uint16_t max_tx_rings;
2097 * The maximum number of receive rings that can be allocated to the
2100 uint16_t max_rx_rings;
2103 * The maximum number of L2 contexts that can be allocated to the
2106 uint16_t max_l2_ctxs;
2108 /* The maximum number of VNICs that can be allocated to the function. */
2112 * The identifier for the first VF enabled on a PF. This is valid only
2113 * on the PF with SR-IOV enabled. 0xFF... (All Fs) if this command is
2114 * called on a PF with SR-IOV disabled or on a VF.
2116 uint16_t first_vf_id;
2119 * The maximum number of VFs that can be allocated to the function. This
2120 * is valid only on the PF with SR-IOV enabled. 0xFF... (All Fs) if this
2121 * command is called on a PF with SR-IOV disabled or on a VF.
2126 * The maximum number of statistic contexts that can be allocated to the
2129 uint16_t max_stat_ctx;
2132 * The maximum number of Encapsulation records that can be offloaded by
2135 uint32_t max_encap_records;
2138 * The maximum number of decapsulation records that can be offloaded by
2141 uint32_t max_decap_records;
2144 * The maximum number of Exact Match (EM) flows that can be offloaded by
2145 * this function on the TX side.
2147 uint32_t max_tx_em_flows;
2150 * The maximum number of Wildcard Match (WM) flows that can be offloaded
2151 * by this function on the TX side.
2153 uint32_t max_tx_wm_flows;
2156 * The maximum number of Exact Match (EM) flows that can be offloaded by
2157 * this function on the RX side.
2159 uint32_t max_rx_em_flows;
2162 * The maximum number of Wildcard Match (WM) flows that can be offloaded
2163 * by this function on the RX side.
2165 uint32_t max_rx_wm_flows;
2168 * The maximum number of multicast filters that can be supported by this
2169 * function on the RX side.
2171 uint32_t max_mcast_filters;
2174 * The maximum value of flow_id that can be supported in completion
2177 uint32_t max_flow_id;
2180 * The maximum number of HW ring groups that can be supported on this
2183 uint32_t max_hw_ring_grps;
2190 * This field is used in Output records to indicate that the output is
2191 * completely written to RAM. This field should be read as '1' to
2192 * indicate that the output has been completely written. When writing a
2193 * command completion or response to an internal processor, the order of
2194 * writes has to be such that this field is written last.
2197 } __attribute__((packed));
2199 /* hwrm_func_reset */
2201 * Description: This command resets a hardware function (PCIe function) and
2202 * frees any resources used by the function. This command shall be initiated by
2203 * the driver after an FLR has occurred to prepare the function for re-use. This
2204 * command may also be initiated by a driver prior to doing it's own
2205 * configuration. This command puts the function into the reset state. In the
2206 * reset state, global and port related features of the chip are not available.
2209 * Note: This command will reset a function that has already been disabled or
2210 * idled. The command returns all the resources owned by the function so a new
2211 * driver may allocate and configure resources normally.
2214 /* Input (24 bytes) */
2215 struct hwrm_func_reset_input {
2217 * This value indicates what type of request this is. The format for the
2218 * rest of the command is determined by this field.
2223 * This value indicates the what completion ring the request will be
2224 * optionally completed on. If the value is -1, then no CR completion
2225 * will be generated. Any other value must be a valid CR ring_id value
2226 * for this function.
2230 /* This value indicates the command sequence number. */
2234 * Target ID of this command. 0x0 - 0xFFF8 - Used for function ids
2235 * 0xFFF8 - 0xFFFE - Reserved for internal processors 0xFFFF - HWRM
2240 * This is the host address where the response will be written when the
2241 * request is complete. This area must be 16B aligned and must be
2242 * cleared to zero before the request is made.
2246 /* This bit must be '1' for the vf_id_valid field to be configured. */
2247 #define HWRM_FUNC_RESET_INPUT_ENABLES_VF_ID_VALID \
2252 * The ID of the VF that this PF is trying to reset. Only the parent PF
2253 * shall be allowed to reset a child VF. A parent PF driver shall use
2254 * this field only when a specific child VF is requested to be reset.
2258 /* This value indicates the level of a function reset. */
2260 * Reset the caller function and its children VFs (if any). If
2261 * no children functions exist, then reset the caller function
2264 #define HWRM_FUNC_RESET_INPUT_FUNC_RESET_LEVEL_RESETALL \
2265 (UINT32_C(0x0) << 0)
2266 /* Reset the caller function only */
2267 #define HWRM_FUNC_RESET_INPUT_FUNC_RESET_LEVEL_RESETME \
2268 (UINT32_C(0x1) << 0)
2270 * Reset all children VFs of the caller function driver if the
2271 * caller is a PF driver. It is an error to specify this level
2272 * by a VF driver. It is an error to specify this level by a PF
2273 * driver with no children VFs.
2275 #define HWRM_FUNC_RESET_INPUT_FUNC_RESET_LEVEL_RESETCHILDREN \
2276 (UINT32_C(0x2) << 0)
2278 * Reset a specific VF of the caller function driver if the
2279 * caller is the parent PF driver. It is an error to specify
2280 * this level by a VF driver. It is an error to specify this
2281 * level by a PF driver that is not the parent of the VF that is
2282 * being requested to reset.
2284 #define HWRM_FUNC_RESET_INPUT_FUNC_RESET_LEVEL_RESETVF \
2285 (UINT32_C(0x3) << 0)
2286 uint8_t func_reset_level;
2289 } __attribute__((packed));
2291 /* Output (16 bytes) */
2292 struct hwrm_func_reset_output {
2294 * Pass/Fail or error type Note: receiver to verify the in parameters,
2295 * and fail the call with an error when appropriate
2297 uint16_t error_code;
2299 /* This field returns the type of original request. */
2302 /* This field provides original sequence number of the command. */
2306 * This field is the length of the response in bytes. The last byte of
2307 * the response is a valid flag that will read as '1' when the command
2308 * has been completely written to memory.
2318 * This field is used in Output records to indicate that the output is
2319 * completely written to RAM. This field should be read as '1' to
2320 * indicate that the output has been completely written. When writing a
2321 * command completion or response to an internal processor, the order of
2322 * writes has to be such that this field is written last.
2325 } __attribute__((packed));
2327 /* hwrm_port_phy_cfg */
2329 * Description: This command configures the PHY device for the port. It allows
2330 * setting of the most generic settings for the PHY. The HWRM shall complete
2331 * this command as soon as PHY settings are configured. They may not be applied
2332 * when the command response is provided. A VF driver shall not be allowed to
2333 * configure PHY using this command. In a network partition mode, a PF driver
2334 * shall not be allowed to configure PHY using this command.
2337 /* Input (56 bytes) */
2338 struct hwrm_port_phy_cfg_input {
2340 * This value indicates what type of request this is. The format for the
2341 * rest of the command is determined by this field.
2346 * This value indicates the what completion ring the request will be
2347 * optionally completed on. If the value is -1, then no CR completion
2348 * will be generated. Any other value must be a valid CR ring_id value
2349 * for this function.
2353 /* This value indicates the command sequence number. */
2357 * Target ID of this command. 0x0 - 0xFFF8 - Used for function ids
2358 * 0xFFF8 - 0xFFFE - Reserved for internal processors 0xFFFF - HWRM
2363 * This is the host address where the response will be written when the
2364 * request is complete. This area must be 16B aligned and must be
2365 * cleared to zero before the request is made.
2370 * When this bit is set to '1', the PHY for the port shall be reset. #
2371 * If this bit is set to 1, then the HWRM shall reset the PHY after
2372 * applying PHY configuration changes specified in this command. # In
2373 * order to guarantee that PHY configuration changes specified in this
2374 * command take effect, the HWRM client should set this flag to 1. # If
2375 * this bit is not set to 1, then the HWRM may reset the PHY depending
2376 * on the current PHY configuration and settings specified in this
2379 #define HWRM_PORT_PHY_CFG_INPUT_FLAGS_RESET_PHY UINT32_C(0x1)
2381 * When this bit is set to '1', the link shall be forced to be taken
2382 * down. # When this bit is set to '1", all other command input settings
2383 * related to the link speed shall be ignored. Once the link state is
2384 * forced down, it can be explicitly cleared from that state by setting
2385 * this flag to '0'. # If this flag is set to '0', then the link shall
2386 * be cleared from forced down state if the link is in forced down
2387 * state. There may be conditions (e.g. out-of-band or sideband
2388 * configuration changes for the link) outside the scope of the HWRM
2389 * implementation that may clear forced down link state.
2391 #define HWRM_PORT_PHY_CFG_INPUT_FLAGS_FORCE_LINK_DOWN UINT32_C(0x2)
2393 * When this bit is set to '1', the link shall be forced to the
2394 * force_link_speed value. When this bit is set to '1', the HWRM client
2395 * should not enable any of the auto negotiation related fields
2396 * represented by auto_XXX fields in this command. When this bit is set
2397 * to '1' and the HWRM client has enabled a auto_XXX field in this
2398 * command, then the HWRM shall ignore the enabled auto_XXX field. When
2399 * this bit is set to zero, the link shall be allowed to autoneg.
2401 #define HWRM_PORT_PHY_CFG_INPUT_FLAGS_FORCE UINT32_C(0x4)
2403 * When this bit is set to '1', the auto-negotiation process shall be
2404 * restarted on the link.
2406 #define HWRM_PORT_PHY_CFG_INPUT_FLAGS_RESTART_AUTONEG UINT32_C(0x8)
2408 * When this bit is set to '1', Energy Efficient Ethernet (EEE) is
2409 * requested to be enabled on this link. If EEE is not supported on this
2410 * port, then this flag shall be ignored by the HWRM.
2412 #define HWRM_PORT_PHY_CFG_INPUT_FLAGS_EEE_ENABLE UINT32_C(0x10)
2414 * When this bit is set to '1', Energy Efficient Ethernet (EEE) is
2415 * requested to be disabled on this link. If EEE is not supported on
2416 * this port, then this flag shall be ignored by the HWRM.
2418 #define HWRM_PORT_PHY_CFG_INPUT_FLAGS_EEE_DISABLE UINT32_C(0x20)
2420 * When this bit is set to '1' and EEE is enabled on this link, then TX
2421 * LPI is requested to be enabled on the link. If EEE is not supported
2422 * on this port, then this flag shall be ignored by the HWRM. If EEE is
2423 * disabled on this port, then this flag shall be ignored by the HWRM.
2425 #define HWRM_PORT_PHY_CFG_INPUT_FLAGS_EEE_TX_LPI UINT32_C(0x40)
2428 /* This bit must be '1' for the auto_mode field to be configured. */
2429 #define HWRM_PORT_PHY_CFG_INPUT_ENABLES_AUTO_MODE UINT32_C(0x1)
2430 /* This bit must be '1' for the auto_duplex field to be configured. */
2431 #define HWRM_PORT_PHY_CFG_INPUT_ENABLES_AUTO_DUPLEX UINT32_C(0x2)
2432 /* This bit must be '1' for the auto_pause field to be configured. */
2433 #define HWRM_PORT_PHY_CFG_INPUT_ENABLES_AUTO_PAUSE UINT32_C(0x4)
2435 * This bit must be '1' for the auto_link_speed field to be configured.
2437 #define HWRM_PORT_PHY_CFG_INPUT_ENABLES_AUTO_LINK_SPEED UINT32_C(0x8)
2439 * This bit must be '1' for the auto_link_speed_mask field to be
2442 #define HWRM_PORT_PHY_CFG_INPUT_ENABLES_AUTO_LINK_SPEED_MASK \
2444 /* This bit must be '1' for the wirespeed field to be configured. */
2445 #define HWRM_PORT_PHY_CFG_INPUT_ENABLES_WIRESPEED UINT32_C(0x20)
2446 /* This bit must be '1' for the lpbk field to be configured. */
2447 #define HWRM_PORT_PHY_CFG_INPUT_ENABLES_LPBK UINT32_C(0x40)
2448 /* This bit must be '1' for the preemphasis field to be configured. */
2449 #define HWRM_PORT_PHY_CFG_INPUT_ENABLES_PREEMPHASIS UINT32_C(0x80)
2450 /* This bit must be '1' for the force_pause field to be configured. */
2451 #define HWRM_PORT_PHY_CFG_INPUT_ENABLES_FORCE_PAUSE UINT32_C(0x100)
2453 * This bit must be '1' for the eee_link_speed_mask field to be
2456 #define HWRM_PORT_PHY_CFG_INPUT_ENABLES_EEE_LINK_SPEED_MASK \
2458 /* This bit must be '1' for the tx_lpi_timer field to be configured. */
2459 #define HWRM_PORT_PHY_CFG_INPUT_ENABLES_TX_LPI_TIMER UINT32_C(0x400)
2462 /* Port ID of port that is to be configured. */
2466 * This is the speed that will be used if the force bit is '1'. If
2467 * unsupported speed is selected, an error will be generated.
2469 /* 100Mb link speed */
2470 #define HWRM_PORT_PHY_CFG_INPUT_FORCE_LINK_SPEED_100MB \
2471 (UINT32_C(0x1) << 0)
2472 /* 1Gb link speed */
2473 #define HWRM_PORT_PHY_CFG_INPUT_FORCE_LINK_SPEED_1GB \
2474 (UINT32_C(0xa) << 0)
2475 /* 2Gb link speed */
2476 #define HWRM_PORT_PHY_CFG_INPUT_FORCE_LINK_SPEED_2GB \
2477 (UINT32_C(0x14) << 0)
2478 /* 2.5Gb link speed */
2479 #define HWRM_PORT_PHY_CFG_INPUT_FORCE_LINK_SPEED_2_5GB \
2480 (UINT32_C(0x19) << 0)
2481 /* 10Gb link speed */
2482 #define HWRM_PORT_PHY_CFG_INPUT_FORCE_LINK_SPEED_10GB \
2483 (UINT32_C(0x64) << 0)
2484 /* 20Mb link speed */
2485 #define HWRM_PORT_PHY_CFG_INPUT_FORCE_LINK_SPEED_20GB \
2486 (UINT32_C(0xc8) << 0)
2487 /* 25Gb link speed */
2488 #define HWRM_PORT_PHY_CFG_INPUT_FORCE_LINK_SPEED_25GB \
2489 (UINT32_C(0xfa) << 0)
2490 /* 40Gb link speed */
2491 #define HWRM_PORT_PHY_CFG_INPUT_FORCE_LINK_SPEED_40GB \
2492 (UINT32_C(0x190) << 0)
2493 /* 50Gb link speed */
2494 #define HWRM_PORT_PHY_CFG_INPUT_FORCE_LINK_SPEED_50GB \
2495 (UINT32_C(0x1f4) << 0)
2496 /* 100Gb link speed */
2497 #define HWRM_PORT_PHY_CFG_INPUT_FORCE_LINK_SPEED_100GB \
2498 (UINT32_C(0x3e8) << 0)
2499 /* 10Mb link speed */
2500 #define HWRM_PORT_PHY_CFG_INPUT_FORCE_LINK_SPEED_10MB \
2501 (UINT32_C(0xffff) << 0)
2502 uint16_t force_link_speed;
2505 * This value is used to identify what autoneg mode is used when the
2506 * link speed is not being forced.
2509 * Disable autoneg or autoneg disabled. No speeds are selected.
2511 #define HWRM_PORT_PHY_CFG_INPUT_AUTO_MODE_NONE (UINT32_C(0x0) << 0)
2512 /* Select all possible speeds for autoneg mode. */
2513 #define HWRM_PORT_PHY_CFG_INPUT_AUTO_MODE_ALL_SPEEDS \
2514 (UINT32_C(0x1) << 0)
2516 * Select only the auto_link_speed speed for autoneg mode. This
2517 * mode has been DEPRECATED. An HWRM client should not use this
2520 #define HWRM_PORT_PHY_CFG_INPUT_AUTO_MODE_ONE_SPEED \
2521 (UINT32_C(0x2) << 0)
2523 * Select the auto_link_speed or any speed below that speed for
2524 * autoneg. This mode has been DEPRECATED. An HWRM client should
2525 * not use this mode.
2527 #define HWRM_PORT_PHY_CFG_INPUT_AUTO_MODE_ONE_OR_BELOW \
2528 (UINT32_C(0x3) << 0)
2530 * Select the speeds based on the corresponding link speed mask
2531 * value that is provided.
2533 #define HWRM_PORT_PHY_CFG_INPUT_AUTO_MODE_SPEED_MASK \
2534 (UINT32_C(0x4) << 0)
2538 * This is the duplex setting that will be used if the autoneg_mode is
2539 * "one_speed" or "one_or_below".
2541 /* Half Duplex will be requested. */
2542 #define HWRM_PORT_PHY_CFG_INPUT_AUTO_DUPLEX_HALF \
2543 (UINT32_C(0x0) << 0)
2544 /* Full duplex will be requested. */
2545 #define HWRM_PORT_PHY_CFG_INPUT_AUTO_DUPLEX_FULL \
2546 (UINT32_C(0x1) << 0)
2547 /* Both Half and Full dupex will be requested. */
2548 #define HWRM_PORT_PHY_CFG_INPUT_AUTO_DUPLEX_BOTH \
2549 (UINT32_C(0x2) << 0)
2550 uint8_t auto_duplex;
2553 * This value is used to configure the pause that will be used for
2554 * autonegotiation. Add text on the usage of auto_pause and force_pause.
2557 * When this bit is '1', Generation of tx pause messages has been
2558 * requested. Disabled otherwise.
2560 #define HWRM_PORT_PHY_CFG_INPUT_AUTO_PAUSE_TX UINT32_C(0x1)
2562 * When this bit is '1', Reception of rx pause messages has been
2563 * requested. Disabled otherwise.
2565 #define HWRM_PORT_PHY_CFG_INPUT_AUTO_PAUSE_RX UINT32_C(0x2)
2567 * When set to 1, the advertisement of pause is enabled. # When the
2568 * auto_mode is not set to none and this flag is set to 1, then the
2569 * auto_pause bits on this port are being advertised and autoneg pause
2570 * results are being interpreted. # When the auto_mode is not set to
2571 * none and this flag is set to 0, the pause is forced as indicated in
2572 * force_pause, and also advertised as auto_pause bits, but the autoneg
2573 * results are not interpreted since the pause configuration is being
2574 * forced. # When the auto_mode is set to none and this flag is set to
2575 * 1, auto_pause bits should be ignored and should be set to 0.
2577 #define HWRM_PORT_PHY_CFG_INPUT_AUTO_PAUSE_AUTONEG_PAUSE UINT32_C(0x4)
2583 * This is the speed that will be used if the autoneg_mode is
2584 * "one_speed" or "one_or_below". If an unsupported speed is selected,
2585 * an error will be generated.
2587 /* 100Mb link speed */
2588 #define HWRM_PORT_PHY_CFG_INPUT_AUTO_LINK_SPEED_100MB \
2589 (UINT32_C(0x1) << 0)
2590 /* 1Gb link speed */
2591 #define HWRM_PORT_PHY_CFG_INPUT_AUTO_LINK_SPEED_1GB \
2592 (UINT32_C(0xa) << 0)
2593 /* 2Gb link speed */
2594 #define HWRM_PORT_PHY_CFG_INPUT_AUTO_LINK_SPEED_2GB \
2595 (UINT32_C(0x14) << 0)
2596 /* 2.5Gb link speed */
2597 #define HWRM_PORT_PHY_CFG_INPUT_AUTO_LINK_SPEED_2_5GB \
2598 (UINT32_C(0x19) << 0)
2599 /* 10Gb link speed */
2600 #define HWRM_PORT_PHY_CFG_INPUT_AUTO_LINK_SPEED_10GB \
2601 (UINT32_C(0x64) << 0)
2602 /* 20Mb link speed */
2603 #define HWRM_PORT_PHY_CFG_INPUT_AUTO_LINK_SPEED_20GB \
2604 (UINT32_C(0xc8) << 0)
2605 /* 25Gb link speed */
2606 #define HWRM_PORT_PHY_CFG_INPUT_AUTO_LINK_SPEED_25GB \
2607 (UINT32_C(0xfa) << 0)
2608 /* 40Gb link speed */
2609 #define HWRM_PORT_PHY_CFG_INPUT_AUTO_LINK_SPEED_40GB \
2610 (UINT32_C(0x190) << 0)
2611 /* 50Gb link speed */
2612 #define HWRM_PORT_PHY_CFG_INPUT_AUTO_LINK_SPEED_50GB \
2613 (UINT32_C(0x1f4) << 0)
2614 /* 100Gb link speed */
2615 #define HWRM_PORT_PHY_CFG_INPUT_AUTO_LINK_SPEED_100GB \
2616 (UINT32_C(0x3e8) << 0)
2617 /* 10Mb link speed */
2618 #define HWRM_PORT_PHY_CFG_INPUT_AUTO_LINK_SPEED_10MB \
2619 (UINT32_C(0xffff) << 0)
2620 uint16_t auto_link_speed;
2623 * This is a mask of link speeds that will be used if autoneg_mode is
2624 * "mask". If unsupported speed is enabled an error will be generated.
2626 /* 100Mb link speed (Half-duplex) */
2627 #define HWRM_PORT_PHY_CFG_INPUT_AUTO_LINK_SPEED_MASK_100MBHD \
2629 /* 100Mb link speed (Full-duplex) */
2630 #define HWRM_PORT_PHY_CFG_INPUT_AUTO_LINK_SPEED_MASK_100MB \
2632 /* 1Gb link speed (Half-duplex) */
2633 #define HWRM_PORT_PHY_CFG_INPUT_AUTO_LINK_SPEED_MASK_1GBHD \
2635 /* 1Gb link speed (Full-duplex) */
2636 #define HWRM_PORT_PHY_CFG_INPUT_AUTO_LINK_SPEED_MASK_1GB \
2638 /* 2Gb link speed */
2639 #define HWRM_PORT_PHY_CFG_INPUT_AUTO_LINK_SPEED_MASK_2GB \
2641 /* 2.5Gb link speed */
2642 #define HWRM_PORT_PHY_CFG_INPUT_AUTO_LINK_SPEED_MASK_2_5GB \
2644 /* 10Gb link speed */
2645 #define HWRM_PORT_PHY_CFG_INPUT_AUTO_LINK_SPEED_MASK_10GB \
2647 /* 20Gb link speed */
2648 #define HWRM_PORT_PHY_CFG_INPUT_AUTO_LINK_SPEED_MASK_20GB \
2650 /* 25Gb link speed */
2651 #define HWRM_PORT_PHY_CFG_INPUT_AUTO_LINK_SPEED_MASK_25GB \
2653 /* 40Gb link speed */
2654 #define HWRM_PORT_PHY_CFG_INPUT_AUTO_LINK_SPEED_MASK_40GB \
2656 /* 50Gb link speed */
2657 #define HWRM_PORT_PHY_CFG_INPUT_AUTO_LINK_SPEED_MASK_50GB \
2659 /* 100Gb link speed */
2660 #define HWRM_PORT_PHY_CFG_INPUT_AUTO_LINK_SPEED_MASK_100GB \
2662 /* 10Mb link speed (Half-duplex) */
2663 #define HWRM_PORT_PHY_CFG_INPUT_AUTO_LINK_SPEED_MASK_10MBHD \
2665 /* 10Mb link speed (Full-duplex) */
2666 #define HWRM_PORT_PHY_CFG_INPUT_AUTO_LINK_SPEED_MASK_10MB \
2668 uint16_t auto_link_speed_mask;
2670 /* This value controls the wirespeed feature. */
2671 /* Wirespeed feature is disabled. */
2672 #define HWRM_PORT_PHY_CFG_INPUT_WIRESPEED_OFF (UINT32_C(0x0) << 0)
2673 /* Wirespeed feature is enabled. */
2674 #define HWRM_PORT_PHY_CFG_INPUT_WIRESPEED_ON (UINT32_C(0x1) << 0)
2677 /* This value controls the loopback setting for the PHY. */
2678 /* No loopback is selected. Normal operation. */
2679 #define HWRM_PORT_PHY_CFG_INPUT_LPBK_NONE (UINT32_C(0x0) << 0)
2681 * The HW will be configured with local loopback such that host
2682 * data is sent back to the host without modification.
2684 #define HWRM_PORT_PHY_CFG_INPUT_LPBK_LOCAL (UINT32_C(0x1) << 0)
2686 * The HW will be configured with remote loopback such that port
2687 * logic will send packets back out the transmitter that are
2690 #define HWRM_PORT_PHY_CFG_INPUT_LPBK_REMOTE (UINT32_C(0x2) << 0)
2694 * This value is used to configure the pause that will be used for force
2698 * When this bit is '1', Generation of tx pause messages is supported.
2699 * Disabled otherwise.
2701 #define HWRM_PORT_PHY_CFG_INPUT_FORCE_PAUSE_TX UINT32_C(0x1)
2703 * When this bit is '1', Reception of rx pause messages is supported.
2704 * Disabled otherwise.
2706 #define HWRM_PORT_PHY_CFG_INPUT_FORCE_PAUSE_RX UINT32_C(0x2)
2707 uint8_t force_pause;
2712 * This value controls the pre-emphasis to be used for the link. Driver
2713 * should not set this value (use enable.preemphasis = 0) unless driver
2714 * is sure of setting. Normally HWRM FW will determine proper pre-
2717 uint32_t preemphasis;
2720 * Setting for link speed mask that is used to advertise speeds during
2721 * autonegotiation when EEE is enabled. This field is valid only when
2722 * EEE is enabled. The speeds specified in this field shall be a subset
2723 * of speeds specified in auto_link_speed_mask. If EEE is enabled,then
2724 * at least one speed shall be provided in this mask.
2727 #define HWRM_PORT_PHY_CFG_INPUT_EEE_LINK_SPEED_MASK_RSVD1 UINT32_C(0x1)
2728 /* 100Mb link speed (Full-duplex) */
2729 #define HWRM_PORT_PHY_CFG_INPUT_EEE_LINK_SPEED_MASK_100MB UINT32_C(0x2)
2731 #define HWRM_PORT_PHY_CFG_INPUT_EEE_LINK_SPEED_MASK_RSVD2 UINT32_C(0x4)
2732 /* 1Gb link speed (Full-duplex) */
2733 #define HWRM_PORT_PHY_CFG_INPUT_EEE_LINK_SPEED_MASK_1GB UINT32_C(0x8)
2735 #define HWRM_PORT_PHY_CFG_INPUT_EEE_LINK_SPEED_MASK_RSVD3 \
2738 #define HWRM_PORT_PHY_CFG_INPUT_EEE_LINK_SPEED_MASK_RSVD4 \
2740 /* 10Gb link speed */
2741 #define HWRM_PORT_PHY_CFG_INPUT_EEE_LINK_SPEED_MASK_10GB \
2743 uint16_t eee_link_speed_mask;
2749 * Reuested setting of TX LPI timer in microseconds. This field is valid
2750 * only when EEE is enabled and TX LPI is enabled.
2752 #define HWRM_PORT_PHY_CFG_INPUT_TX_LPI_TIMER_MASK \
2754 #define HWRM_PORT_PHY_CFG_INPUT_TX_LPI_TIMER_SFT 0
2755 uint32_t tx_lpi_timer;
2758 } __attribute__((packed));
2760 /* Output (16 bytes) */
2761 struct hwrm_port_phy_cfg_output {
2763 * Pass/Fail or error type Note: receiver to verify the in parameters,
2764 * and fail the call with an error when appropriate
2766 uint16_t error_code;
2768 /* This field returns the type of original request. */
2771 /* This field provides original sequence number of the command. */
2775 * This field is the length of the response in bytes. The last byte of
2776 * the response is a valid flag that will read as '1' when the command
2777 * has been completely written to memory.
2787 * This field is used in Output records to indicate that the output is
2788 * completely written to RAM. This field should be read as '1' to
2789 * indicate that the output has been completely written. When writing a
2790 * command completion or response to an internal processor, the order of
2791 * writes has to be such that this field is written last.
2794 } __attribute__((packed));
2798 * Description: This function is called by a driver to determine the HWRM
2799 * interface version supported by the HWRM firmware, the version of HWRM
2800 * firmware implementation, the name of HWRM firmware, the versions of other
2801 * embedded firmwares, and the names of other embedded firmwares, etc. Any
2802 * interface or firmware version with major = 0, minor = 0, and update = 0 shall
2803 * be considered an invalid version.
2806 /* Input (24 bytes) */
2807 struct hwrm_ver_get_input {
2809 * This value indicates what type of request this is. The format for the
2810 * rest of the command is determined by this field.
2815 * This value indicates the what completion ring the request will be
2816 * optionally completed on. If the value is -1, then no CR completion
2817 * will be generated. Any other value must be a valid CR ring_id value
2818 * for this function.
2822 /* This value indicates the command sequence number. */
2826 * Target ID of this command. 0x0 - 0xFFF8 - Used for function ids
2827 * 0xFFF8 - 0xFFFE - Reserved for internal processors 0xFFFF - HWRM
2832 * This is the host address where the response will be written when the
2833 * request is complete. This area must be 16B aligned and must be
2834 * cleared to zero before the request is made.
2839 * This field represents the major version of HWRM interface
2840 * specification supported by the driver HWRM implementation. The
2841 * interface major version is intended to change only when non backward
2842 * compatible changes are made to the HWRM interface specification.
2844 uint8_t hwrm_intf_maj;
2847 * This field represents the minor version of HWRM interface
2848 * specification supported by the driver HWRM implementation. A change
2849 * in interface minor version is used to reflect significant backward
2850 * compatible modification to HWRM interface specification. This can be
2851 * due to addition or removal of functionality. HWRM interface
2852 * specifications with the same major version but different minor
2853 * versions are compatible.
2855 uint8_t hwrm_intf_min;
2858 * This field represents the update version of HWRM interface
2859 * specification supported by the driver HWRM implementation. The
2860 * interface update version is used to reflect minor changes or bug
2861 * fixes to a released HWRM interface specification.
2863 uint8_t hwrm_intf_upd;
2865 uint8_t unused_0[5];
2866 } __attribute__((packed));
2868 /* Output (128 bytes) */
2869 struct hwrm_ver_get_output {
2871 * Pass/Fail or error type Note: receiver to verify the in parameters,
2872 * and fail the call with an error when appropriate
2874 uint16_t error_code;
2876 /* This field returns the type of original request. */
2879 /* This field provides original sequence number of the command. */
2883 * This field is the length of the response in bytes. The last byte of
2884 * the response is a valid flag that will read as '1' when the command
2885 * has been completely written to memory.
2890 * This field represents the major version of HWRM interface
2891 * specification supported by the HWRM implementation. The interface
2892 * major version is intended to change only when non backward compatible
2893 * changes are made to the HWRM interface specification. A HWRM
2894 * implementation that is compliant with this specification shall
2895 * provide value of 1 in this field.
2897 uint8_t hwrm_intf_maj;
2900 * This field represents the minor version of HWRM interface
2901 * specification supported by the HWRM implementation. A change in
2902 * interface minor version is used to reflect significant backward
2903 * compatible modification to HWRM interface specification. This can be
2904 * due to addition or removal of functionality. HWRM interface
2905 * specifications with the same major version but different minor
2906 * versions are compatible. A HWRM implementation that is compliant with
2907 * this specification shall provide value of 0 in this field.
2909 uint8_t hwrm_intf_min;
2912 * This field represents the update version of HWRM interface
2913 * specification supported by the HWRM implementation. The interface
2914 * update version is used to reflect minor changes or bug fixes to a
2915 * released HWRM interface specification. A HWRM implementation that is
2916 * compliant with this specification shall provide value of 1 in this
2919 uint8_t hwrm_intf_upd;
2921 uint8_t hwrm_intf_rsvd;
2924 * This field represents the major version of HWRM firmware. A change in
2925 * firmware major version represents a major firmware release.
2927 uint8_t hwrm_fw_maj;
2930 * This field represents the minor version of HWRM firmware. A change in
2931 * firmware minor version represents significant firmware functionality
2934 uint8_t hwrm_fw_min;
2937 * This field represents the build version of HWRM firmware. A change in
2938 * firmware build version represents bug fixes to a released firmware.
2940 uint8_t hwrm_fw_bld;
2943 * This field is a reserved field. This field can be used to represent
2944 * firmware branches or customer specific releases tied to a specific
2945 * (major,minor,update) version of the HWRM firmware.
2947 uint8_t hwrm_fw_rsvd;
2950 * This field represents the major version of mgmt firmware. A change in
2951 * major version represents a major release.
2953 uint8_t mgmt_fw_maj;
2956 * This field represents the minor version of mgmt firmware. A change in
2957 * minor version represents significant functionality changes.
2959 uint8_t mgmt_fw_min;
2962 * This field represents the build version of mgmt firmware. A change in
2963 * update version represents bug fixes.
2965 uint8_t mgmt_fw_bld;
2968 * This field is a reserved field. This field can be used to represent
2969 * firmware branches or customer specific releases tied to a specific
2970 * (major,minor,update) version
2972 uint8_t mgmt_fw_rsvd;
2975 * This field represents the major version of network control firmware.
2976 * A change in major version represents a major release.
2978 uint8_t netctrl_fw_maj;
2981 * This field represents the minor version of network control firmware.
2982 * A change in minor version represents significant functionality
2985 uint8_t netctrl_fw_min;
2988 * This field represents the build version of network control firmware.
2989 * A change in update version represents bug fixes.
2991 uint8_t netctrl_fw_bld;
2994 * This field is a reserved field. This field can be used to represent
2995 * firmware branches or customer specific releases tied to a specific
2996 * (major,minor,update) version
2998 uint8_t netctrl_fw_rsvd;
3001 * This field is reserved for future use. The responder should set it to
3002 * 0. The requester should ignore this field.
3007 * This field represents the major version of RoCE firmware. A change in
3008 * major version represents a major release.
3010 uint8_t roce_fw_maj;
3013 * This field represents the minor version of RoCE firmware. A change in
3014 * minor version represents significant functionality changes.
3016 uint8_t roce_fw_min;
3019 * This field represents the build version of RoCE firmware. A change in
3020 * update version represents bug fixes.
3022 uint8_t roce_fw_bld;
3025 * This field is a reserved field. This field can be used to represent
3026 * firmware branches or customer specific releases tied to a specific
3027 * (major,minor,update) version
3029 uint8_t roce_fw_rsvd;
3032 * This field represents the name of HWRM FW (ASCII chars without NULL
3035 char hwrm_fw_name[16];
3038 * This field represents the name of mgmt FW (ASCII chars without NULL
3041 char mgmt_fw_name[16];
3044 * This field represents the name of network control firmware (ASCII
3045 * chars without NULL at the end).
3047 char netctrl_fw_name[16];
3050 * This field is reserved for future use. The responder should set it to
3051 * 0. The requester should ignore this field.
3053 uint32_t reserved2[4];
3056 * This field represents the name of RoCE FW (ASCII chars without NULL
3059 char roce_fw_name[16];
3061 /* This field returns the chip number. */
3064 /* This field returns the revision of chip. */
3067 /* This field returns the chip metal number. */
3070 /* This field returns the bond id of the chip. */
3071 uint8_t chip_bond_id;
3074 * This value indicates the type of platform used for chip
3078 #define HWRM_VER_GET_OUTPUT_CHIP_PLATFORM_TYPE_ASIC \
3079 (UINT32_C(0x0) << 0)
3080 /* FPGA platform of the chip. */
3081 #define HWRM_VER_GET_OUTPUT_CHIP_PLATFORM_TYPE_FPGA \
3082 (UINT32_C(0x1) << 0)
3083 /* Palladium platform of the chip. */
3084 #define HWRM_VER_GET_OUTPUT_CHIP_PLATFORM_TYPE_PALLADIUM \
3085 (UINT32_C(0x2) << 0)
3086 uint8_t chip_platform_type;
3089 * This field returns the maximum value of request window that is
3090 * supported by the HWRM. The request window is mapped into device
3091 * address space using MMIO.
3093 uint16_t max_req_win_len;
3096 * This field returns the maximum value of response buffer in bytes. If
3097 * a request specifies the response buffer length that is greater than
3098 * this value, then the HWRM should fail it. The value of this field
3099 * shall be 4KB or more.
3101 uint16_t max_resp_len;
3104 * This field returns the default request timeout value in milliseconds.
3106 uint16_t def_req_timeout;
3113 * This field is used in Output records to indicate that the output is
3114 * completely written to RAM. This field should be read as '1' to
3115 * indicate that the output has been completely written. When writing a
3116 * command completion or response to an internal processor, the order of
3117 * writes has to be such that this field is written last.
3120 } __attribute__((packed));
3122 /* hwrm_queue_qportcfg */
3124 * Description: This function is called by a driver to query queue configuration
3125 * of a port. # The HWRM shall at least advertise one queue with lossy service
3126 * profile. # The driver shall use this command to query queue ids before
3127 * configuring or using any queues. # If a service profile is not set for a
3128 * queue, then the driver shall not use that queue without configuring a service
3129 * profile for it. # If the driver is not allowed to configure service profiles,
3130 * then the driver shall only use queues for which service profiles are pre-
3134 /* Input (24 bytes) */
3135 struct hwrm_queue_qportcfg_input {
3137 * This value indicates what type of request this is. The format for the
3138 * rest of the command is determined by this field.
3143 * This value indicates the what completion ring the request will be
3144 * optionally completed on. If the value is -1, then no CR completion
3145 * will be generated. Any other value must be a valid CR ring_id value
3146 * for this function.
3150 /* This value indicates the command sequence number. */
3154 * Target ID of this command. 0x0 - 0xFFF8 - Used for function ids
3155 * 0xFFF8 - 0xFFFE - Reserved for internal processors 0xFFFF - HWRM
3160 * This is the host address where the response will be written when the
3161 * request is complete. This area must be 16B aligned and must be
3162 * cleared to zero before the request is made.
3167 * Enumeration denoting the RX, TX type of the resource. This
3168 * enumeration is used for resources that are similar for both TX and RX
3169 * paths of the chip.
3171 #define HWRM_QUEUE_QPORTCFG_INPUT_FLAGS_PATH \
3174 #define HWRM_QUEUE_QPORTCFG_INPUT_FLAGS_PATH_TX \
3175 (UINT32_C(0x0) << 0)
3177 #define HWRM_QUEUE_QPORTCFG_INPUT_FLAGS_PATH_RX \
3178 (UINT32_C(0x1) << 0)
3179 #define HWRM_QUEUE_QPORTCFG_INPUT_FLAGS_PATH_LAST \
3180 HWRM_QUEUE_QPORTCFG_INPUT_FLAGS_PATH_RX
3184 * Port ID of port for which the queue configuration is being queried.
3185 * This field is only required when sent by IPC.
3190 } __attribute__((packed));
3192 /* hwrm_ring_alloc */
3194 * Description: This command allocates and does basic preparation for a ring.
3197 /* Input (80 bytes) */
3198 struct hwrm_ring_alloc_input {
3200 * This value indicates what type of request this is. The format for the
3201 * rest of the command is determined by this field.
3206 * This value indicates the what completion ring the request will be
3207 * optionally completed on. If the value is -1, then no CR completion
3208 * will be generated. Any other value must be a valid CR ring_id value
3209 * for this function.
3213 /* This value indicates the command sequence number. */
3217 * Target ID of this command. 0x0 - 0xFFF8 - Used for function ids
3218 * 0xFFF8 - 0xFFFE - Reserved for internal processors 0xFFFF - HWRM
3223 * This is the host address where the response will be written when the
3224 * request is complete. This area must be 16B aligned and must be
3225 * cleared to zero before the request is made.
3229 /* This bit must be '1' for the Reserved1 field to be configured. */
3230 #define HWRM_RING_ALLOC_INPUT_ENABLES_RESERVED1 UINT32_C(0x1)
3231 /* This bit must be '1' for the Reserved2 field to be configured. */
3232 #define HWRM_RING_ALLOC_INPUT_ENABLES_RESERVED2 UINT32_C(0x2)
3233 /* This bit must be '1' for the Reserved3 field to be configured. */
3234 #define HWRM_RING_ALLOC_INPUT_ENABLES_RESERVED3 UINT32_C(0x4)
3236 * This bit must be '1' for the stat_ctx_id_valid field to be
3239 #define HWRM_RING_ALLOC_INPUT_ENABLES_STAT_CTX_ID_VALID UINT32_C(0x8)
3240 /* This bit must be '1' for the Reserved4 field to be configured. */
3241 #define HWRM_RING_ALLOC_INPUT_ENABLES_RESERVED4 UINT32_C(0x10)
3242 /* This bit must be '1' for the max_bw_valid field to be configured. */
3243 #define HWRM_RING_ALLOC_INPUT_ENABLES_MAX_BW_VALID UINT32_C(0x20)
3247 /* Completion Ring (CR) */
3248 #define HWRM_RING_ALLOC_INPUT_RING_TYPE_CMPL (UINT32_C(0x0) << 0)
3250 #define HWRM_RING_ALLOC_INPUT_RING_TYPE_TX (UINT32_C(0x1) << 0)
3252 #define HWRM_RING_ALLOC_INPUT_RING_TYPE_RX (UINT32_C(0x2) << 0)
3258 /* This value is a pointer to the page table for the Ring. */
3259 uint64_t page_tbl_addr;
3261 /* First Byte Offset of the first entry in the first page. */
3265 * Actual page size in 2^page_size. The supported range is increments in
3266 * powers of 2 from 16 bytes to 1GB. - 4 = 16 B Page size is 16 B. - 12
3267 * = 4 KB Page size is 4 KB. - 13 = 8 KB Page size is 8 KB. - 16 = 64 KB
3268 * Page size is 64 KB. - 22 = 2 MB Page size is 2 MB. - 23 = 4 MB Page
3269 * size is 4 MB. - 31 = 1 GB Page size is 1 GB.
3274 * This value indicates the depth of page table. For this version of the
3275 * specification, value other than 0 or 1 shall be considered as an
3276 * invalid value. When the page_tbl_depth = 0, then it is treated as a
3277 * special case with the following. 1. FBO and page size fields are not
3278 * valid. 2. page_tbl_addr is the physical address of the first element
3281 uint8_t page_tbl_depth;
3287 * Number of 16B units in the ring. Minimum size for a ring is 16 16B
3293 * Logical ring number for the ring to be allocated. This value
3294 * determines the position in the doorbell area where the update to the
3295 * ring will be made. For completion rings, this value is also the MSI-X
3296 * vector number for the function the completion ring is associated
3299 uint16_t logical_id;
3302 * This field is used only when ring_type is a TX ring. This value
3303 * indicates what completion ring the TX ring is associated with.
3305 uint16_t cmpl_ring_id;
3308 * This field is used only when ring_type is a TX ring. This value
3309 * indicates what CoS queue the TX ring is associated with.
3316 /* This field is reserved for the future use. It shall be set to 0. */
3318 /* This field is reserved for the future use. It shall be set to 0. */
3323 /* This field is reserved for the future use. It shall be set to 0. */
3327 * This field is used only when ring_type is a TX ring. This input
3328 * indicates what statistics context this ring should be associated
3331 uint32_t stat_ctx_id;
3333 /* This field is reserved for the future use. It shall be set to 0. */
3337 * This field is used only when ring_type is a TX ring. Maximum BW
3338 * allocated to this TX ring in Mbps. The HWRM will translate this value
3339 * into byte counter and time interval used for this ring inside the
3345 * This field is used only when ring_type is a Completion ring. This
3346 * value indicates what interrupt mode should be used on this completion
3347 * ring. Note: In the legacy interrupt mode, no more than 16 completion
3348 * rings are allowed.
3351 #define HWRM_RING_ALLOC_INPUT_INT_MODE_LEGACY (UINT32_C(0x0) << 0)
3353 #define HWRM_RING_ALLOC_INPUT_INT_MODE_RSVD (UINT32_C(0x1) << 0)
3355 #define HWRM_RING_ALLOC_INPUT_INT_MODE_MSIX (UINT32_C(0x2) << 0)
3356 /* No Interrupt - Polled mode */
3357 #define HWRM_RING_ALLOC_INPUT_INT_MODE_POLL (UINT32_C(0x3) << 0)
3360 uint8_t unused_8[3];
3361 } __attribute__((packed));
3363 /* Output (16 bytes) */
3365 struct hwrm_ring_alloc_output {
3367 * Pass/Fail or error type Note: receiver to verify the in parameters,
3368 * and fail the call with an error when appropriate
3370 uint16_t error_code;
3372 /* This field returns the type of original request. */
3375 /* This field provides original sequence number of the command. */
3379 * This field is the length of the response in bytes. The last byte of
3380 * the response is a valid flag that will read as '1' when the command
3381 * has been completely written to memory.
3385 /* Physical number of ring allocated. */
3388 /* Logical number of ring allocated. */
3389 uint16_t logical_ring_id;
3396 * This field is used in Output records to indicate that the output is
3397 * completely written to RAM. This field should be read as '1' to
3398 * indicate that the output has been completely written. When writing a
3399 * command completion or response to an internal processor, the order of
3400 * writes has to be such that this field is written last.
3403 } __attribute__((packed));
3405 /* hwrm_ring_free */
3407 * Description: This command is used to free a ring and associated resources.
3409 /* Input (24 bytes) */
3411 struct hwrm_ring_free_input {
3413 * This value indicates what type of request this is. The format for the
3414 * rest of the command is determined by this field.
3419 * This value indicates the what completion ring the request will be
3420 * optionally completed on. If the value is -1, then no CR completion
3421 * will be generated. Any other value must be a valid CR ring_id value
3422 * for this function.
3426 /* This value indicates the command sequence number. */
3430 * Target ID of this command. 0x0 - 0xFFF8 - Used for function ids
3431 * 0xFFF8 - 0xFFFE - Reserved for internal processors 0xFFFF - HWRM
3436 * This is the host address where the response will be written when the
3437 * request is complete. This area must be 16B aligned and must be
3438 * cleared to zero before the request is made.
3443 /* Completion Ring (CR) */
3444 #define HWRM_RING_FREE_INPUT_RING_TYPE_CMPL (UINT32_C(0x0) << 0)
3446 #define HWRM_RING_FREE_INPUT_RING_TYPE_TX (UINT32_C(0x1) << 0)
3448 #define HWRM_RING_FREE_INPUT_RING_TYPE_RX (UINT32_C(0x2) << 0)
3453 /* Physical number of ring allocated. */
3457 } __attribute__((packed));
3459 /* Output (16 bytes) */
3460 struct hwrm_ring_free_output {
3462 * Pass/Fail or error type Note: receiver to verify the in parameters,
3463 * and fail the call with an error when appropriate
3465 uint16_t error_code;
3467 /* This field returns the type of original request. */
3470 /* This field provides original sequence number of the command. */
3474 * This field is the length of the response in bytes. The last byte of
3475 * the response is a valid flag that will read as '1' when the command
3476 * has been completely written to memory.
3486 * This field is used in Output records to indicate that the output is
3487 * completely written to RAM. This field should be read as '1' to
3488 * indicate that the output has been completely written. When writing a
3489 * command completion or response to an internal processor, the order of
3490 * writes has to be such that this field is written last.
3493 } __attribute__((packed));
3495 /* hwrm_ring_grp_alloc */
3497 * Description: This API allocates and does basic preparation for a ring group.
3500 /* Input (24 bytes) */
3501 struct hwrm_ring_grp_alloc_input {
3503 * This value indicates what type of request this is. The format for the
3504 * rest of the command is determined by this field.
3509 * This value indicates the what completion ring the request will be
3510 * optionally completed on. If the value is -1, then no CR completion
3511 * will be generated. Any other value must be a valid CR ring_id value
3512 * for this function.
3516 /* This value indicates the command sequence number. */
3520 * Target ID of this command. 0x0 - 0xFFF8 - Used for function ids
3521 * 0xFFF8 - 0xFFFE - Reserved for internal processors 0xFFFF - HWRM
3526 * This is the host address where the response will be written when the
3527 * request is complete. This area must be 16B aligned and must be
3528 * cleared to zero before the request is made.
3532 /* This value identifies the CR associated with the ring group. */
3535 /* This value identifies the main RR associated with the ring group. */
3539 * This value identifies the aggregation RR associated with the ring
3540 * group. If this value is 0xFF... (All Fs), then no Aggregation ring
3546 * This value identifies the statistics context associated with the ring
3550 } __attribute__((packed));
3552 /* Output (16 bytes) */
3553 struct hwrm_ring_grp_alloc_output {
3555 * Pass/Fail or error type Note: receiver to verify the in parameters,
3556 * and fail the call with an error when appropriate
3558 uint16_t error_code;
3560 /* This field returns the type of original request. */
3563 /* This field provides original sequence number of the command. */
3567 * This field is the length of the response in bytes. The last byte of
3568 * the response is a valid flag that will read as '1' when the command
3569 * has been completely written to memory.
3574 * This is the ring group ID value. Use this value to program the
3575 * default ring group for the VNIC or as table entries in an RSS/COS
3578 uint32_t ring_group_id;
3585 * This field is used in Output records to indicate that the output is
3586 * completely written to RAM. This field should be read as '1' to
3587 * indicate that the output has been completely written. When writing a
3588 * command completion or response to an internal processor, the order of
3589 * writes has to be such that this field is written last.
3592 } __attribute__((packed));
3594 /* hwrm_ring_grp_free */
3596 * Description: This API frees a ring group and associated resources. # If a
3597 * ring in the ring group is reset or free, then the associated rings in the
3598 * ring group shall also be reset/free using hwrm_ring_free. # A function driver
3599 * shall always use hwrm_ring_grp_free after freeing all rings in a group. # As
3600 * a part of executing this command, the HWRM shall reset all associated ring
3604 /* Input (24 bytes) */
3605 struct hwrm_ring_grp_free_input {
3607 * This value indicates what type of request this is. The format for the
3608 * rest of the command is determined by this field.
3613 * This value indicates the what completion ring the request will be
3614 * optionally completed on. If the value is -1, then no CR completion
3615 * will be generated. Any other value must be a valid CR ring_id value
3616 * for this function.
3620 /* This value indicates the command sequence number. */
3624 * Target ID of this command. 0x0 - 0xFFF8 - Used for function ids
3625 * 0xFFF8 - 0xFFFE - Reserved for internal processors 0xFFFF - HWRM
3630 * This is the host address where the response will be written when the
3631 * request is complete. This area must be 16B aligned and must be
3632 * cleared to zero before the request is made.
3636 /* This is the ring group ID value. */
3637 uint32_t ring_group_id;
3640 } __attribute__((packed));
3642 /* Output (16 bytes) */
3643 struct hwrm_ring_grp_free_output {
3645 * Pass/Fail or error type Note: receiver to verify the in parameters,
3646 * and fail the call with an error when appropriate
3648 uint16_t error_code;
3650 /* This field returns the type of original request. */
3653 /* This field provides original sequence number of the command. */
3657 * This field is the length of the response in bytes. The last byte of
3658 * the response is a valid flag that will read as '1' when the command
3659 * has been completely written to memory.
3669 * This field is used in Output records to indicate that the output is
3670 * completely written to RAM. This field should be read as '1' to
3671 * indicate that the output has been completely written. When writing a
3672 * command completion or response to an internal processor, the order of
3673 * writes has to be such that this field is written last.
3676 } __attribute__((packed));
3678 /* hwrm_stat_ctx_alloc */
3680 * Description: This command allocates and does basic preparation for a stat
3684 /* Input (32 bytes) */
3685 struct hwrm_stat_ctx_alloc_input {
3687 * This value indicates what type of request this is. The format for the
3688 * rest of the command is determined by this field.
3693 * This value indicates the what completion ring the request will be
3694 * optionally completed on. If the value is -1, then no CR completion
3695 * will be generated. Any other value must be a valid CR ring_id value
3696 * for this function.
3700 /* This value indicates the command sequence number. */
3704 * Target ID of this command. 0x0 - 0xFFF8 - Used for function ids
3705 * 0xFFF8 - 0xFFFE - Reserved for internal processors 0xFFFF - HWRM
3710 * This is the host address where the response will be written when the
3711 * request is complete. This area must be 16B aligned and must be
3712 * cleared to zero before the request is made.
3716 /* This is the address for statistic block. */
3717 uint64_t stats_dma_addr;
3720 * The statistic block update period in ms. e.g. 250ms, 500ms, 750ms,
3723 uint32_t update_period_ms;
3726 } __attribute__((packed));
3728 /* Output (16 bytes) */
3729 struct hwrm_stat_ctx_alloc_output {
3731 * Pass/Fail or error type Note: receiver to verify the in parameters,
3732 * and fail the call with an error when appropriate
3734 uint16_t error_code;
3736 /* This field returns the type of original request. */
3739 /* This field provides original sequence number of the command. */
3743 * This field is the length of the response in bytes. The last byte of
3744 * the response is a valid flag that will read as '1' when the command
3745 * has been completely written to memory.
3749 /* This is the statistics context ID value. */
3750 uint32_t stat_ctx_id;
3757 * This field is used in Output records to indicate that the output is
3758 * completely written to RAM. This field should be read as '1' to
3759 * indicate that the output has been completely written. When writing a
3760 * command completion or response to an internal processor, the order of
3761 * writes has to be such that this field is written last.
3764 } __attribute__((packed));
3766 /* hwrm_stat_ctx_clr_stats */
3767 /* Description: This command clears statistics of a context. */
3769 /* Input (24 bytes) */
3770 struct hwrm_stat_ctx_clr_stats_input {
3772 * This value indicates what type of request this is. The format for the
3773 * rest of the command is determined by this field.
3778 * This value indicates the what completion ring the request will be
3779 * optionally completed on. If the value is -1, then no CR completion
3780 * will be generated. Any other value must be a valid CR ring_id value
3781 * for this function.
3785 /* This value indicates the command sequence number. */
3789 * Target ID of this command. 0x0 - 0xFFF8 - Used for function ids
3790 * 0xFFF8 - 0xFFFE - Reserved for internal processors 0xFFFF - HWRM
3795 * This is the host address where the response will be written when the
3796 * request is complete. This area must be 16B aligned and must be
3797 * cleared to zero before the request is made.
3801 /* ID of the statistics context that is being queried. */
3802 uint32_t stat_ctx_id;
3805 } __attribute__((packed));
3807 /* Output (16 bytes) */
3808 struct hwrm_stat_ctx_clr_stats_output {
3810 * Pass/Fail or error type Note: receiver to verify the in parameters,
3811 * and fail the call with an error when appropriate
3813 uint16_t error_code;
3815 /* This field returns the type of original request. */
3818 /* This field provides original sequence number of the command. */
3822 * This field is the length of the response in bytes. The last byte of
3823 * the response is a valid flag that will read as '1' when the command
3824 * has been completely written to memory.
3834 * This field is used in Output records to indicate that the output is
3835 * completely written to RAM. This field should be read as '1' to
3836 * indicate that the output has been completely written. When writing a
3837 * command completion or response to an internal processor, the order of
3838 * writes has to be such that this field is written last.
3841 } __attribute__((packed));
3843 /* hwrm_stat_ctx_free */
3844 /* Description: This command is used to free a stat context. */
3845 /* Input (24 bytes) */
3847 struct hwrm_stat_ctx_free_input {
3849 * This value indicates what type of request this is. The format for the
3850 * rest of the command is determined by this field.
3855 * This value indicates the what completion ring the request will be
3856 * optionally completed on. If the value is -1, then no CR completion
3857 * will be generated. Any other value must be a valid CR ring_id value
3858 * for this function.
3862 /* This value indicates the command sequence number. */
3866 * Target ID of this command. 0x0 - 0xFFF8 - Used for function ids
3867 * 0xFFF8 - 0xFFFE - Reserved for internal processors 0xFFFF - HWRM
3872 * This is the host address where the response will be written when the
3873 * request is complete. This area must be 16B aligned and must be
3874 * cleared to zero before the request is made.
3878 /* ID of the statistics context that is being queried. */
3879 uint32_t stat_ctx_id;
3882 } __attribute__((packed));
3884 /* Output (16 bytes) */
3886 struct hwrm_stat_ctx_free_output {
3888 * Pass/Fail or error type Note: receiver to verify the in parameters,
3889 * and fail the call with an error when appropriate
3891 uint16_t error_code;
3893 /* This field returns the type of original request. */
3896 /* This field provides original sequence number of the command. */
3900 * This field is the length of the response in bytes. The last byte of
3901 * the response is a valid flag that will read as '1' when the command
3902 * has been completely written to memory.
3906 /* This is the statistics context ID value. */
3907 uint32_t stat_ctx_id;
3914 * This field is used in Output records to indicate that the output is
3915 * completely written to RAM. This field should be read as '1' to
3916 * indicate that the output has been completely written. When writing a
3917 * command completion or response to an internal processor, the order of
3918 * writes has to be such that this field is written last.
3921 } __attribute__((packed));
3923 /* hwrm_vnic_alloc */
3925 * Description: This VNIC is a resource in the RX side of the chip that is used
3926 * to represent a virtual host "interface". # At the time of VNIC allocation or
3927 * configuration, the function can specify whether it wants the requested VNIC
3928 * to be the default VNIC for the function or not. # If a function requests
3929 * allocation of a VNIC for the first time and a VNIC is successfully allocated
3930 * by the HWRM, then the HWRM shall make the allocated VNIC as the default VNIC
3931 * for that function. # The default VNIC shall be used for the default action
3932 * for a partition or function. # For each VNIC allocated on a function, a
3933 * mapping on the RX side to map the allocated VNIC to source virtual interface
3934 * shall be performed by the HWRM. This should be hidden to the function driver
3935 * requesting the VNIC allocation. This enables broadcast/multicast replication
3936 * with source knockout. # If multicast replication with source knockout is
3937 * enabled, then the internal VNIC to SVIF mapping data structures shall be
3938 * programmed at the time of VNIC allocation.
3941 /* Input (24 bytes) */
3942 struct hwrm_vnic_alloc_input {
3944 * This value indicates what type of request this is. The format for the
3945 * rest of the command is determined by this field.
3950 * This value indicates the what completion ring the request will be
3951 * optionally completed on. If the value is -1, then no CR completion
3952 * will be generated. Any other value must be a valid CR ring_id value
3953 * for this function.
3957 /* This value indicates the command sequence number. */
3961 * Target ID of this command. 0x0 - 0xFFF8 - Used for function ids
3962 * 0xFFF8 - 0xFFFE - Reserved for internal processors 0xFFFF - HWRM
3967 * This is the host address where the response will be written when the
3968 * request is complete. This area must be 16B aligned and must be
3969 * cleared to zero before the request is made.
3974 * When this bit is '1', this VNIC is requested to be the default VNIC
3975 * for this function.
3977 #define HWRM_VNIC_ALLOC_INPUT_FLAGS_DEFAULT UINT32_C(0x1)
3981 } __attribute__((packed));
3983 /* Output (16 bytes) */
3984 struct hwrm_vnic_alloc_output {
3986 * Pass/Fail or error type Note: receiver to verify the in parameters,
3987 * and fail the call with an error when appropriate
3989 uint16_t error_code;
3991 /* This field returns the type of original request. */
3994 /* This field provides original sequence number of the command. */
3998 * This field is the length of the response in bytes. The last byte of
3999 * the response is a valid flag that will read as '1' when the command
4000 * has been completely written to memory.
4004 /* Logical vnic ID */
4012 * This field is used in Output records to indicate that the output is
4013 * completely written to RAM. This field should be read as '1' to
4014 * indicate that the output has been completely written. When writing a
4015 * command completion or response to an internal processor, the order of
4016 * writes has to be such that this field is written last.
4019 } __attribute__((packed));
4022 /* Description: Configure the RX VNIC structure. */
4024 /* Input (40 bytes) */
4025 struct hwrm_vnic_cfg_input {
4027 * This value indicates what type of request this is. The format for the
4028 * rest of the command is determined by this field.
4033 * This value indicates the what completion ring the request will be
4034 * optionally completed on. If the value is -1, then no CR completion
4035 * will be generated. Any other value must be a valid CR ring_id value
4036 * for this function.
4040 /* This value indicates the command sequence number. */
4044 * Target ID of this command. 0x0 - 0xFFF8 - Used for function ids
4045 * 0xFFF8 - 0xFFFE - Reserved for internal processors 0xFFFF - HWRM
4050 * This is the host address where the response will be written when the
4051 * request is complete. This area must be 16B aligned and must be
4052 * cleared to zero before the request is made.
4057 * When this bit is '1', the VNIC is requested to be the default VNIC
4060 #define HWRM_VNIC_CFG_INPUT_FLAGS_DEFAULT UINT32_C(0x1)
4062 * When this bit is '1', the VNIC is being configured to strip VLAN in
4063 * the RX path. If set to '0', then VLAN stripping is disabled on this
4066 #define HWRM_VNIC_CFG_INPUT_FLAGS_VLAN_STRIP_MODE UINT32_C(0x2)
4068 * When this bit is '1', the VNIC is being configured to buffer receive
4069 * packets in the hardware until the host posts new receive buffers. If
4070 * set to '0', then bd_stall is being configured to be disabled on this
4073 #define HWRM_VNIC_CFG_INPUT_FLAGS_BD_STALL_MODE UINT32_C(0x4)
4075 * When this bit is '1', the VNIC is being configured to receive both
4076 * RoCE and non-RoCE traffic. If set to '0', then this VNIC is not
4077 * configured to be operating in dual VNIC mode.
4079 #define HWRM_VNIC_CFG_INPUT_FLAGS_ROCE_DUAL_VNIC_MODE UINT32_C(0x8)
4081 * When this flag is set to '1', the VNIC is requested to be configured
4082 * to receive only RoCE traffic. If this flag is set to '0', then this
4083 * flag shall be ignored by the HWRM. If roce_dual_vnic_mode flag is set
4084 * to '1', then the HWRM client shall not set this flag to '1'.
4086 #define HWRM_VNIC_CFG_INPUT_FLAGS_ROCE_ONLY_VNIC_MODE UINT32_C(0x10)
4089 /* This bit must be '1' for the dflt_ring_grp field to be configured. */
4090 #define HWRM_VNIC_CFG_INPUT_ENABLES_DFLT_RING_GRP UINT32_C(0x1)
4091 /* This bit must be '1' for the rss_rule field to be configured. */
4092 #define HWRM_VNIC_CFG_INPUT_ENABLES_RSS_RULE UINT32_C(0x2)
4093 /* This bit must be '1' for the cos_rule field to be configured. */
4094 #define HWRM_VNIC_CFG_INPUT_ENABLES_COS_RULE UINT32_C(0x4)
4095 /* This bit must be '1' for the lb_rule field to be configured. */
4096 #define HWRM_VNIC_CFG_INPUT_ENABLES_LB_RULE UINT32_C(0x8)
4097 /* This bit must be '1' for the mru field to be configured. */
4098 #define HWRM_VNIC_CFG_INPUT_ENABLES_MRU UINT32_C(0x10)
4101 /* Logical vnic ID */
4105 * Default Completion ring for the VNIC. This ring will be chosen if
4106 * packet does not match any RSS rules and if there is no COS rule.
4108 uint16_t dflt_ring_grp;
4111 * RSS ID for RSS rule/table structure. 0xFF... (All Fs) if there is no
4117 * RSS ID for COS rule/table structure. 0xFF... (All Fs) if there is no
4123 * RSS ID for load balancing rule/table structure. 0xFF... (All Fs) if
4124 * there is no LB rule.
4129 * The maximum receive unit of the vnic. Each vnic is associated with a
4130 * function. The vnic mru value overwrites the mru setting of the
4131 * associated function. The HWRM shall make sure that vnic mru does not
4132 * exceed the mru of the port the function is associated with.
4137 } __attribute__((packed));
4139 /* Output (16 bytes) */
4140 struct hwrm_vnic_cfg_output {
4142 * Pass/Fail or error type Note: receiver to verify the in parameters,
4143 * and fail the call with an error when appropriate
4145 uint16_t error_code;
4147 /* This field returns the type of original request. */
4150 /* This field provides original sequence number of the command. */
4154 * This field is the length of the response in bytes. The last byte of
4155 * the response is a valid flag that will read as '1' when the command
4156 * has been completely written to memory.
4166 * This field is used in Output records to indicate that the output is
4167 * completely written to RAM. This field should be read as '1' to
4168 * indicate that the output has been completely written. When writing a
4169 * command completion or response to an internal processor, the order of
4170 * writes has to be such that this field is written last.
4173 } __attribute__((packed));
4175 /* hwrm_vnic_free */
4177 * Description: Free a VNIC resource. Idle any resources associated with the
4178 * VNIC as well as the VNIC. Reset and release all resources associated with the
4182 /* Input (24 bytes) */
4183 struct hwrm_vnic_free_input {
4185 * This value indicates what type of request this is. The format for the
4186 * rest of the command is determined by this field.
4191 * This value indicates the what completion ring the request will be
4192 * optionally completed on. If the value is -1, then no CR completion
4193 * will be generated. Any other value must be a valid CR ring_id value
4194 * for this function.
4198 /* This value indicates the command sequence number. */
4202 * Target ID of this command. 0x0 - 0xFFF8 - Used for function ids
4203 * 0xFFF8 - 0xFFFE - Reserved for internal processors 0xFFFF - HWRM
4208 * This is the host address where the response will be written when the
4209 * request is complete. This area must be 16B aligned and must be
4210 * cleared to zero before the request is made.
4214 /* Logical vnic ID */
4218 } __attribute__((packed));
4220 /* Output (16 bytes) */
4221 struct hwrm_vnic_free_output {
4223 * Pass/Fail or error type Note: receiver to verify the in parameters,
4224 * and fail the call with an error when appropriate
4226 uint16_t error_code;
4228 /* This field returns the type of original request. */
4231 /* This field provides original sequence number of the command. */
4235 * This field is the length of the response in bytes. The last byte of
4236 * the response is a valid flag that will read as '1' when the command
4237 * has been completely written to memory.
4247 * This field is used in Output records to indicate that the output is
4248 * completely written to RAM. This field should be read as '1' to
4249 * indicate that the output has been completely written. When writing a
4250 * command completion or response to an internal processor, the order of
4251 * writes has to be such that this field is written last.
4254 } __attribute__((packed));
4256 /* hwrm_vnic_rss_cfg */
4257 /* Description: This function is used to enable RSS configuration. */
4259 /* Input (48 bytes) */
4260 struct hwrm_vnic_rss_cfg_input {
4262 * This value indicates what type of request this is. The format for the
4263 * rest of the command is determined by this field.
4268 * This value indicates the what completion ring the request will be
4269 * optionally completed on. If the value is -1, then no CR completion
4270 * will be generated. Any other value must be a valid CR ring_id value
4271 * for this function.
4275 /* This value indicates the command sequence number. */
4279 * Target ID of this command. 0x0 - 0xFFF8 - Used for function ids
4280 * 0xFFF8 - 0xFFFE - Reserved for internal processors 0xFFFF - HWRM
4285 * This is the host address where the response will be written when the
4286 * request is complete. This area must be 16B aligned and must be
4287 * cleared to zero before the request is made.
4292 * When this bit is '1', the RSS hash shall be computed over source and
4293 * destination IPv4 addresses of IPv4 packets.
4295 #define HWRM_VNIC_RSS_CFG_INPUT_HASH_TYPE_IPV4 UINT32_C(0x1)
4297 * When this bit is '1', the RSS hash shall be computed over
4298 * source/destination IPv4 addresses and source/destination ports of
4301 #define HWRM_VNIC_RSS_CFG_INPUT_HASH_TYPE_TCP_IPV4 UINT32_C(0x2)
4303 * When this bit is '1', the RSS hash shall be computed over
4304 * source/destination IPv4 addresses and source/destination ports of
4307 #define HWRM_VNIC_RSS_CFG_INPUT_HASH_TYPE_UDP_IPV4 UINT32_C(0x4)
4309 * When this bit is '1', the RSS hash shall be computed over source and
4310 * destination IPv4 addresses of IPv6 packets.
4312 #define HWRM_VNIC_RSS_CFG_INPUT_HASH_TYPE_IPV6 UINT32_C(0x8)
4314 * When this bit is '1', the RSS hash shall be computed over
4315 * source/destination IPv6 addresses and source/destination ports of
4318 #define HWRM_VNIC_RSS_CFG_INPUT_HASH_TYPE_TCP_IPV6 UINT32_C(0x10)
4320 * When this bit is '1', the RSS hash shall be computed over
4321 * source/destination IPv6 addresses and source/destination ports of
4324 #define HWRM_VNIC_RSS_CFG_INPUT_HASH_TYPE_UDP_IPV6 UINT32_C(0x20)
4329 /* This is the address for rss ring group table */
4330 uint64_t ring_grp_tbl_addr;
4332 /* This is the address for rss hash key table */
4333 uint64_t hash_key_tbl_addr;
4335 /* Index to the rss indirection table. */
4336 uint16_t rss_ctx_idx;
4338 uint16_t unused_1[3];
4339 } __attribute__((packed));
4341 /* Output (16 bytes) */
4342 struct hwrm_vnic_rss_cfg_output {
4344 * Pass/Fail or error type Note: receiver to verify the in parameters,
4345 * and fail the call with an error when appropriate
4347 uint16_t error_code;
4349 /* This field returns the type of original request. */
4352 /* This field provides original sequence number of the command. */
4356 * This field is the length of the response in bytes. The last byte of
4357 * the response is a valid flag that will read as '1' when the command
4358 * has been completely written to memory.
4368 * This field is used in Output records to indicate that the output is
4369 * completely written to RAM. This field should be read as '1' to
4370 * indicate that the output has been completely written. When writing a
4371 * command completion or response to an internal processor, the order of
4372 * writes has to be such that this field is written last.
4375 } __attribute__((packed));
4377 /* Input (16 bytes) */
4378 struct hwrm_vnic_rss_cos_lb_ctx_alloc_input {
4380 * This value indicates what type of request this is. The format for the
4381 * rest of the command is determined by this field.
4386 * This value indicates the what completion ring the request will be
4387 * optionally completed on. If the value is -1, then no CR completion
4388 * will be generated. Any other value must be a valid CR ring_id value
4389 * for this function.
4393 /* This value indicates the command sequence number. */
4397 * Target ID of this command. 0x0 - 0xFFF8 - Used for function ids
4398 * 0xFFF8 - 0xFFFE - Reserved for internal processors 0xFFFF - HWRM
4403 * This is the host address where the response will be written when the
4404 * request is complete. This area must be 16B aligned and must be
4405 * cleared to zero before the request is made.
4408 } __attribute__((packed));
4410 /* Output (16 bytes) */
4412 struct hwrm_vnic_rss_cos_lb_ctx_alloc_output {
4414 * Pass/Fail or error type Note: receiver to verify the in parameters,
4415 * and fail the call with an error when appropriate
4417 uint16_t error_code;
4419 /* This field returns the type of original request. */
4422 /* This field provides original sequence number of the command. */
4426 * This field is the length of the response in bytes. The last byte of
4427 * the response is a valid flag that will read as '1' when the command
4428 * has been completely written to memory.
4432 /* rss_cos_lb_ctx_id is 16 b */
4433 uint16_t rss_cos_lb_ctx_id;
4442 * This field is used in Output records to indicate that the output is
4443 * completely written to RAM. This field should be read as '1' to
4444 * indicate that the output has been completely written. When writing a
4445 * command completion or response to an internal processor, the order of
4446 * writes has to be such that this field is written last.
4449 } __attribute__((packed));
4451 /* hwrm_vnic_rss_cos_lb_ctx_free */
4452 /* Description: This function can be used to free COS/Load Balance context. */
4453 /* Input (24 bytes) */
4455 struct hwrm_vnic_rss_cos_lb_ctx_free_input {
4457 * This value indicates what type of request this is. The format for the
4458 * rest of the command is determined by this field.
4463 * This value indicates the what completion ring the request will be
4464 * optionally completed on. If the value is -1, then no CR completion
4465 * will be generated. Any other value must be a valid CR ring_id value
4466 * for this function.
4470 /* This value indicates the command sequence number. */
4474 * Target ID of this command. 0x0 - 0xFFF8 - Used for function ids
4475 * 0xFFF8 - 0xFFFE - Reserved for internal processors 0xFFFF - HWRM
4480 * This is the host address where the response will be written when the
4481 * request is complete. This area must be 16B aligned and must be
4482 * cleared to zero before the request is made.
4486 /* rss_cos_lb_ctx_id is 16 b */
4487 uint16_t rss_cos_lb_ctx_id;
4489 uint16_t unused_0[3];
4490 } __attribute__((packed));
4492 /* Output (16 bytes) */
4493 struct hwrm_vnic_rss_cos_lb_ctx_free_output {
4495 * Pass/Fail or error type Note: receiver to verify the in parameters,
4496 * and fail the call with an error when appropriate
4498 uint16_t error_code;
4500 /* This field returns the type of original request. */
4503 /* This field provides original sequence number of the command. */
4507 * This field is the length of the response in bytes. The last byte of
4508 * the response is a valid flag that will read as '1' when the command
4509 * has been completely written to memory.
4519 * This field is used in Output records to indicate that the output is
4520 * completely written to RAM. This field should be read as '1' to
4521 * indicate that the output has been completely written. When writing a
4522 * command completion or response to an internal processor, the order of
4523 * writes has to be such that this field is written last.
4526 } __attribute__((packed));
4528 /* Output (32 bytes) */
4529 struct hwrm_queue_qportcfg_output {
4531 * Pass/Fail or error type Note: receiver to verify the in parameters,
4532 * and fail the call with an error when appropriate
4534 uint16_t error_code;
4536 /* This field returns the type of original request. */
4539 /* This field provides original sequence number of the command. */
4543 * This field is the length of the response in bytes. The last byte of
4544 * the response is a valid flag that will read as '1' when the command
4545 * has been completely written to memory.
4549 /* The maximum number of queues that can be configured. */
4550 uint8_t max_configurable_queues;
4552 /* The maximum number of lossless queues that can be configured. */
4553 uint8_t max_configurable_lossless_queues;
4556 * 0 - Not allowed. Non-zero - Allowed. If this value is non-zero, then
4557 * the HWRM shall allow the host SW driver to configure queues using
4560 uint8_t queue_cfg_allowed;
4563 * 0 - Not allowed. Non-zero - Allowed If this value is non-zero, then
4564 * the HWRM shall allow the host SW driver to configure queue buffers
4565 * using hwrm_queue_buffers_cfg.
4567 uint8_t queue_buffers_cfg_allowed;
4570 * 0 - Not allowed. Non-zero - Allowed If this value is non-zero, then
4571 * the HWRM shall allow the host SW driver to configure PFC using
4572 * hwrm_queue_pfcenable_cfg.
4574 uint8_t queue_pfcenable_cfg_allowed;
4577 * 0 - Not allowed. Non-zero - Allowed If this value is non-zero, then
4578 * the HWRM shall allow the host SW driver to configure Priority to CoS
4579 * mapping using hwrm_queue_pri2cos_cfg.
4581 uint8_t queue_pri2cos_cfg_allowed;
4584 * 0 - Not allowed. Non-zero - Allowed If this value is non-zero, then
4585 * the HWRM shall allow the host SW driver to configure CoS Bandwidth
4586 * configuration using hwrm_queue_cos2bw_cfg.
4588 uint8_t queue_cos2bw_cfg_allowed;
4590 /* ID of CoS Queue 0. FF - Invalid id */
4593 /* This value is applicable to CoS queues only. */
4594 /* Lossy (best-effort) */
4595 #define HWRM_QUEUE_QPORTCFG_OUTPUT_QUEUE_ID0_SERVICE_PROFILE_LOSSY \
4596 (UINT32_C(0x0) << 0)
4598 #define HWRM_QUEUE_QPORTCFG_OUTPUT_QUEUE_ID0_SERVICE_PROFILE_LOSSLESS \
4599 (UINT32_C(0x1) << 0)
4601 * Set to 0xFF... (All Fs) if there is no service profile
4604 #define HWRM_QUEUE_QPORTCFG_OUTPUT_QUEUE_ID0_SERVICE_PROFILE_UNKNOWN \
4605 (UINT32_C(0xff) << 0)
4606 uint8_t queue_id0_service_profile;
4608 /* ID of CoS Queue 1. FF - Invalid id */
4610 /* This value is applicable to CoS queues only. */
4611 /* Lossy (best-effort) */
4612 #define HWRM_QUEUE_QPORTCFG_OUTPUT_QUEUE_ID1_SERVICE_PROFILE_LOSSY \
4613 (UINT32_C(0x0) << 0)
4615 #define HWRM_QUEUE_QPORTCFG_OUTPUT_QUEUE_ID1_SERVICE_PROFILE_LOSSLESS \
4616 (UINT32_C(0x1) << 0)
4618 * Set to 0xFF... (All Fs) if there is no service profile
4621 #define HWRM_QUEUE_QPORTCFG_OUTPUT_QUEUE_ID1_SERVICE_PROFILE_UNKNOWN \
4622 (UINT32_C(0xff) << 0)
4623 uint8_t queue_id1_service_profile;
4625 /* ID of CoS Queue 2. FF - Invalid id */
4627 /* This value is applicable to CoS queues only. */
4628 /* Lossy (best-effort) */
4629 #define HWRM_QUEUE_QPORTCFG_OUTPUT_QUEUE_ID2_SERVICE_PROFILE_LOSSY \
4630 (UINT32_C(0x0) << 0)
4632 #define HWRM_QUEUE_QPORTCFG_OUTPUT_QUEUE_ID2_SERVICE_PROFILE_LOSSLESS \
4633 (UINT32_C(0x1) << 0)
4635 * Set to 0xFF... (All Fs) if there is no service profile
4638 #define HWRM_QUEUE_QPORTCFG_OUTPUT_QUEUE_ID2_SERVICE_PROFILE_UNKNOWN \
4639 (UINT32_C(0xff) << 0)
4640 uint8_t queue_id2_service_profile;
4642 /* ID of CoS Queue 3. FF - Invalid id */
4645 /* This value is applicable to CoS queues only. */
4646 /* Lossy (best-effort) */
4647 #define HWRM_QUEUE_QPORTCFG_OUTPUT_QUEUE_ID3_SERVICE_PROFILE_LOSSY \
4648 (UINT32_C(0x0) << 0)
4650 #define HWRM_QUEUE_QPORTCFG_OUTPUT_QUEUE_ID3_SERVICE_PROFILE_LOSSLESS \
4651 (UINT32_C(0x1) << 0)
4653 * Set to 0xFF... (All Fs) if there is no service profile
4656 #define HWRM_QUEUE_QPORTCFG_OUTPUT_QUEUE_ID3_SERVICE_PROFILE_UNKNOWN \
4657 (UINT32_C(0xff) << 0)
4658 uint8_t queue_id3_service_profile;
4660 /* ID of CoS Queue 4. FF - Invalid id */
4662 /* This value is applicable to CoS queues only. */
4663 /* Lossy (best-effort) */
4664 #define HWRM_QUEUE_QPORTCFG_OUTPUT_QUEUE_ID4_SERVICE_PROFILE_LOSSY \
4665 (UINT32_C(0x0) << 0)
4667 #define HWRM_QUEUE_QPORTCFG_OUTPUT_QUEUE_ID4_SERVICE_PROFILE_LOSSLESS \
4668 (UINT32_C(0x1) << 0)
4670 * Set to 0xFF... (All Fs) if there is no service profile
4673 #define HWRM_QUEUE_QPORTCFG_OUTPUT_QUEUE_ID4_SERVICE_PROFILE_UNKNOWN \
4674 (UINT32_C(0xff) << 0)
4675 uint8_t queue_id4_service_profile;
4677 /* ID of CoS Queue 5. FF - Invalid id */
4680 /* This value is applicable to CoS queues only. */
4681 /* Lossy (best-effort) */
4682 #define HWRM_QUEUE_QPORTCFG_OUTPUT_QUEUE_ID5_SERVICE_PROFILE_LOSSY \
4683 (UINT32_C(0x0) << 0)
4685 #define HWRM_QUEUE_QPORTCFG_OUTPUT_QUEUE_ID5_SERVICE_PROFILE_LOSSLESS \
4686 (UINT32_C(0x1) << 0)
4688 * Set to 0xFF... (All Fs) if there is no service profile
4691 #define HWRM_QUEUE_QPORTCFG_OUTPUT_QUEUE_ID5_SERVICE_PROFILE_UNKNOWN \
4692 (UINT32_C(0xff) << 0)
4693 uint8_t queue_id5_service_profile;
4695 /* ID of CoS Queue 6. FF - Invalid id */
4696 uint8_t queue_id6_service_profile;
4697 /* This value is applicable to CoS queues only. */
4698 /* Lossy (best-effort) */
4699 #define HWRM_QUEUE_QPORTCFG_OUTPUT_QUEUE_ID6_SERVICE_PROFILE_LOSSY \
4700 (UINT32_C(0x0) << 0)
4702 #define HWRM_QUEUE_QPORTCFG_OUTPUT_QUEUE_ID6_SERVICE_PROFILE_LOSSLESS \
4703 (UINT32_C(0x1) << 0)
4705 * Set to 0xFF... (All Fs) if there is no service profile
4708 #define HWRM_QUEUE_QPORTCFG_OUTPUT_QUEUE_ID6_SERVICE_PROFILE_UNKNOWN \
4709 (UINT32_C(0xff) << 0)
4712 /* ID of CoS Queue 7. FF - Invalid id */
4715 /* This value is applicable to CoS queues only. */
4716 /* Lossy (best-effort) */
4717 #define HWRM_QUEUE_QPORTCFG_OUTPUT_QUEUE_ID7_SERVICE_PROFILE_LOSSY \
4718 (UINT32_C(0x0) << 0)
4720 #define HWRM_QUEUE_QPORTCFG_OUTPUT_QUEUE_ID7_SERVICE_PROFILE_LOSSLESS \
4721 (UINT32_C(0x1) << 0)
4723 * Set to 0xFF... (All Fs) if there is no service profile
4726 #define HWRM_QUEUE_QPORTCFG_OUTPUT_QUEUE_ID7_SERVICE_PROFILE_UNKNOWN \
4727 (UINT32_C(0xff) << 0)
4728 uint8_t queue_id7_service_profile;
4731 * This field is used in Output records to indicate that the output is
4732 * completely written to RAM. This field should be read as '1' to
4733 * indicate that the output has been completely written. When writing a
4734 * command completion or response to an internal processor, the order of
4735 * writes has to be such that this field is written last.
4738 } __attribute__((packed));
4740 /* hwrm_func_drv_rgtr */
4742 * Description: This command is used by the function driver to register its
4743 * information with the HWRM. A function driver shall implement this command. A
4744 * function driver shall use this command during the driver initialization right
4745 * after the HWRM version discovery and default ring resources allocation.
4748 /* Input (80 bytes) */
4749 struct hwrm_func_drv_rgtr_input {
4751 * This value indicates what type of request this is. The format for the
4752 * rest of the command is determined by this field.
4757 * This value indicates the what completion ring the request will be
4758 * optionally completed on. If the value is -1, then no CR completion
4759 * will be generated. Any other value must be a valid CR ring_id value
4760 * for this function.
4764 /* This value indicates the command sequence number. */
4768 * Target ID of this command. 0x0 - 0xFFF8 - Used for function ids
4769 * 0xFFF8 - 0xFFFE - Reserved for internal processors 0xFFFF - HWRM
4774 * This is the host address where the response will be written when the
4775 * request is complete. This area must be 16B aligned and must be
4776 * cleared to zero before the request is made.
4781 * When this bit is '1', the function driver is requesting all requests
4782 * from its children VF drivers to be forwarded to itself. This flag can
4783 * only be set by the PF driver. If a VF driver sets this flag, it
4784 * should be ignored by the HWRM.
4786 #define HWRM_FUNC_DRV_RGTR_INPUT_FLAGS_FWD_ALL_MODE UINT32_C(0x1)
4788 * When this bit is '1', the function is requesting none of the requests
4789 * from its children VF drivers to be forwarded to itself. This flag can
4790 * only be set by the PF driver. If a VF driver sets this flag, it
4791 * should be ignored by the HWRM.
4793 #define HWRM_FUNC_DRV_RGTR_INPUT_FLAGS_FWD_NONE_MODE UINT32_C(0x2)
4796 /* This bit must be '1' for the os_type field to be configured. */
4797 #define HWRM_FUNC_DRV_RGTR_INPUT_ENABLES_OS_TYPE UINT32_C(0x1)
4798 /* This bit must be '1' for the ver field to be configured. */
4799 #define HWRM_FUNC_DRV_RGTR_INPUT_ENABLES_VER UINT32_C(0x2)
4800 /* This bit must be '1' for the timestamp field to be configured. */
4801 #define HWRM_FUNC_DRV_RGTR_INPUT_ENABLES_TIMESTAMP UINT32_C(0x4)
4802 /* This bit must be '1' for the vf_req_fwd field to be configured. */
4803 #define HWRM_FUNC_DRV_RGTR_INPUT_ENABLES_VF_REQ_FWD UINT32_C(0x8)
4805 * This bit must be '1' for the async_event_fwd field to be configured.
4807 #define HWRM_FUNC_DRV_RGTR_INPUT_ENABLES_ASYNC_EVENT_FWD \
4811 /* This value indicates the type of OS. */
4813 #define HWRM_FUNC_DRV_RGTR_INPUT_OS_TYPE_UNKNOWN \
4814 (UINT32_C(0x0) << 0)
4815 /* Other OS not listed below. */
4816 #define HWRM_FUNC_DRV_RGTR_INPUT_OS_TYPE_OTHER \
4817 (UINT32_C(0x1) << 0)
4819 #define HWRM_FUNC_DRV_RGTR_INPUT_OS_TYPE_MSDOS \
4820 (UINT32_C(0xe) << 0)
4822 #define HWRM_FUNC_DRV_RGTR_INPUT_OS_TYPE_WINDOWS \
4823 (UINT32_C(0x12) << 0)
4825 #define HWRM_FUNC_DRV_RGTR_INPUT_OS_TYPE_SOLARIS \
4826 (UINT32_C(0x1d) << 0)
4828 #define HWRM_FUNC_DRV_RGTR_INPUT_OS_TYPE_LINUX \
4829 (UINT32_C(0x24) << 0)
4831 #define HWRM_FUNC_DRV_RGTR_INPUT_OS_TYPE_FREEBSD \
4832 (UINT32_C(0x2a) << 0)
4833 /* VMware ESXi OS. */
4834 #define HWRM_FUNC_DRV_RGTR_INPUT_OS_TYPE_ESXI \
4835 (UINT32_C(0x68) << 0)
4836 /* Microsoft Windows 8 64-bit OS. */
4837 #define HWRM_FUNC_DRV_RGTR_INPUT_OS_TYPE_WIN864 \
4838 (UINT32_C(0x73) << 0)
4839 /* Microsoft Windows Server 2012 R2 OS. */
4840 #define HWRM_FUNC_DRV_RGTR_INPUT_OS_TYPE_WIN2012R2 \
4841 (UINT32_C(0x74) << 0)
4844 /* This is the major version of the driver. */
4847 /* This is the minor version of the driver. */
4850 /* This is the update version of the driver. */
4857 * This is a 32-bit timestamp provided by the driver for keep alive. The
4858 * timestamp is in multiples of 1ms.
4865 * This is a 256-bit bit mask provided by the PF driver for letting the
4866 * HWRM know what commands issued by the VF driver to the HWRM should be
4867 * forwarded to the PF driver. Nth bit refers to the Nth req_type.
4868 * Setting Nth bit to 1 indicates that requests from the VF driver with
4869 * req_type equal to N shall be forwarded to the parent PF driver. This
4870 * field is not valid for the VF driver.
4872 uint32_t vf_req_fwd[8];
4875 * This is a 256-bit bit mask provided by the function driver (PF or VF
4876 * driver) to indicate the list of asynchronous event completions to be
4877 * forwarded. Nth bit refers to the Nth event_id. Setting Nth bit to 1
4878 * by the function driver shall result in the HWRM forwarding
4879 * asynchronous event completion with event_id equal to N. If all bits
4880 * are set to 0 (value of 0), then the HWRM shall not forward any
4881 * asynchronous event completion to this function driver.
4883 uint32_t async_event_fwd[8];
4884 } __attribute__((packed));
4886 /* Output (16 bytes) */
4888 struct hwrm_func_drv_rgtr_output {
4890 * Pass/Fail or error type Note: receiver to verify the in parameters,
4891 * and fail the call with an error when appropriate
4893 uint16_t error_code;
4895 /* This field returns the type of original request. */
4898 /* This field provides original sequence number of the command. */
4902 * This field is the length of the response in bytes. The last byte of
4903 * the response is a valid flag that will read as '1' when the command
4904 * has been completely written to memory.
4914 * This field is used in Output records to indicate that the output is
4915 * completely written to RAM. This field should be read as '1' to
4916 * indicate that the output has been completely written. When writing a
4917 * command completion or response to an internal processor, the order of
4918 * writes has to be such that this field is written last.
4921 } __attribute__((packed));
4923 /* hwrm_func_drv_unrgtr */
4925 * Description: This command is used by the function driver to un register with
4926 * the HWRM. A function driver shall implement this command. A function driver
4927 * shall use this command during the driver unloading.
4929 /* Input (24 bytes) */
4931 struct hwrm_func_drv_unrgtr_input {
4933 * This value indicates what type of request this is. The format for the
4934 * rest of the command is determined by this field.
4939 * This value indicates the what completion ring the request will be
4940 * optionally completed on. If the value is -1, then no CR completion
4941 * will be generated. Any other value must be a valid CR ring_id value
4942 * for this function.
4946 /* This value indicates the command sequence number. */
4950 * Target ID of this command. 0x0 - 0xFFF8 - Used for function ids
4951 * 0xFFF8 - 0xFFFE - Reserved for internal processors 0xFFFF - HWRM
4956 * This is the host address where the response will be written when the
4957 * request is complete. This area must be 16B aligned and must be
4958 * cleared to zero before the request is made.
4963 * When this bit is '1', the function driver is notifying the HWRM to
4964 * prepare for the shutdown.
4966 #define HWRM_FUNC_DRV_UNRGTR_INPUT_FLAGS_PREPARE_FOR_SHUTDOWN \
4971 } __attribute__((packed));
4973 /* Output (16 bytes) */
4974 struct hwrm_func_drv_unrgtr_output {
4976 * Pass/Fail or error type Note: receiver to verify the in parameters,
4977 * and fail the call with an error when appropriate
4979 uint16_t error_code;
4981 /* This field returns the type of original request. */
4984 /* This field provides original sequence number of the command. */
4988 * This field is the length of the response in bytes. The last byte of
4989 * the response is a valid flag that will read as '1' when the command
4990 * has been completely written to memory.
5000 * This field is used in Output records to indicate that the output is
5001 * completely written to RAM. This field should be read as '1' to
5002 * indicate that the output has been completely written. When writing a
5003 * command completion or response to an internal processor, the order of
5004 * writes has to be such that this field is written last.
5007 } __attribute__((packed));