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34 #ifndef _HSI_STRUCT_DEF_EXTERNAL_H_
35 #define _HSI_STRUCT_DEF_EXTERNAL_H_
38 * per-context HW statistics -- chip view
41 struct ctx_hw_stats64 {
42 uint64_t rx_ucast_pkts;
43 uint64_t rx_mcast_pkts;
44 uint64_t rx_bcast_pkts;
45 uint64_t rx_drop_pkts;
47 uint64_t rx_ucast_bytes;
48 uint64_t rx_mcast_bytes;
49 uint64_t rx_bcast_bytes;
51 uint64_t tx_ucast_pkts;
52 uint64_t tx_mcast_pkts;
53 uint64_t tx_bcast_pkts;
54 uint64_t tx_drop_pkts;
56 uint64_t tx_ucast_bytes;
57 uint64_t tx_mcast_bytes;
58 uint64_t tx_bcast_bytes;
66 /* HW Resource Manager Specification 1.2.0 */
67 #define HWRM_VERSION_MAJOR 1
68 #define HWRM_VERSION_MINOR 2
69 #define HWRM_VERSION_UPDATE 0
72 * Following is the signature for HWRM message field that indicates not
73 * applicable (All F's). Need to cast it the size of the field if needed.
75 #define HWRM_NA_SIGNATURE ((uint32_t)(-1))
76 #define HWRM_MAX_REQ_LEN (128) /* hwrm_func_buf_rgtr */
77 #define HWRM_MAX_RESP_LEN (176) /* hwrm_func_qstats */
78 #define HW_HASH_INDEX_SIZE 0x80 /* 7 bit indirection table index. */
79 #define HW_HASH_KEY_SIZE 40
80 #define HWRM_RESP_VALID_KEY 1 /* valid key for HWRM response */
85 #define HWRM_VER_GET (UINT32_C(0x0))
86 #define HWRM_FUNC_RESET (UINT32_C(0x11))
87 #define HWRM_FUNC_QCAPS (UINT32_C(0x15))
88 #define HWRM_FUNC_DRV_UNRGTR (UINT32_C(0x1a))
89 #define HWRM_FUNC_DRV_RGTR (UINT32_C(0x1d))
90 #define HWRM_PORT_PHY_CFG (UINT32_C(0x20))
91 #define HWRM_QUEUE_QPORTCFG (UINT32_C(0x30))
92 #define HWRM_VNIC_ALLOC (UINT32_C(0x40))
93 #define HWRM_VNIC_FREE (UINT32_C(0x41))
94 #define HWRM_VNIC_CFG (UINT32_C(0x42))
95 #define HWRM_VNIC_RSS_CFG (UINT32_C(0x46))
96 #define HWRM_RING_ALLOC (UINT32_C(0x50))
97 #define HWRM_RING_FREE (UINT32_C(0x51))
98 #define HWRM_RING_GRP_ALLOC (UINT32_C(0x60))
99 #define HWRM_RING_GRP_FREE (UINT32_C(0x61))
100 #define HWRM_VNIC_RSS_COS_LB_CTX_ALLOC (UINT32_C(0x70))
101 #define HWRM_VNIC_RSS_COS_LB_CTX_FREE (UINT32_C(0x71))
102 #define HWRM_CFA_L2_FILTER_ALLOC (UINT32_C(0x90))
103 #define HWRM_CFA_L2_FILTER_FREE (UINT32_C(0x91))
104 #define HWRM_CFA_L2_FILTER_CFG (UINT32_C(0x92))
105 #define HWRM_CFA_L2_SET_RX_MASK (UINT32_C(0x93))
106 #define HWRM_STAT_CTX_ALLOC (UINT32_C(0xb0))
107 #define HWRM_STAT_CTX_CLR_STATS (UINT32_C(0xb3))
108 #define HWRM_EXEC_FWD_RESP (UINT32_C(0xd0))
111 #define HWRM_ERR_CODE_INVALID_PARAMS (UINT32_C(0x2))
112 #define HWRM_ERR_CODE_RESOURCE_ACCESS_DENIED (UINT32_C(0x3))
114 /* Short TX BD (16 bytes) */
117 * All bits in this field must be valid on the first BD of a packet.
118 * Only the packet_end bit must be valid for the remaining BDs of a
121 /* This value identifies the type of buffer descriptor. */
122 #define TX_BD_SHORT_TYPE_MASK UINT32_C(0x3f)
123 #define TX_BD_SHORT_TYPE_SFT 0
125 * Indicates that this BD is 16B long and is used for normal L2
126 * packet transmission.
128 #define TX_BD_SHORT_TYPE_TX_BD_SHORT (UINT32_C(0x0) << 0)
130 * If set to 1, the packet ends with the data in the buffer pointed to
131 * by this descriptor. This flag must be valid on every BD.
133 #define TX_BD_SHORT_FLAGS_PACKET_END UINT32_C(0x40)
135 * If set to 1, the device will not generate a completion for this
136 * transmit packet unless there is an error in it's processing. If this
137 * bit is set to 0, then the packet will be completed normally. This bit
138 * must be valid only on the first BD of a packet.
140 #define TX_BD_SHORT_FLAGS_NO_CMPL UINT32_C(0x80)
142 * This value indicates how many 16B BD locations are consumed in the
143 * ring by this packet. A value of 1 indicates that this BD is the only
144 * BD (and that the it is a short BD). A value of 3 indicates either 3
145 * short BDs or 1 long BD and one short BD in the packet. A value of 0
146 * indicates that there are 32 BD locations in the packet (the maximum).
147 * This field is valid only on the first BD of a packet.
149 #define TX_BD_SHORT_FLAGS_BD_CNT_MASK UINT32_C(0x1f00)
150 #define TX_BD_SHORT_FLAGS_BD_CNT_SFT 8
152 * This value is a hint for the length of the entire packet. It is used
153 * by the chip to optimize internal processing. The packet will be
154 * dropped if the hint is too short. This field is valid only on the
155 * first BD of a packet.
157 #define TX_BD_SHORT_FLAGS_LHINT_MASK UINT32_C(0x6000)
158 #define TX_BD_SHORT_FLAGS_LHINT_SFT 13
159 /* indicates packet length < 512B */
160 #define TX_BD_SHORT_FLAGS_LHINT_LT512 (UINT32_C(0x0) << 13)
161 /* indicates 512 <= packet length < 1KB */
162 #define TX_BD_SHORT_FLAGS_LHINT_LT1K (UINT32_C(0x1) << 13)
163 /* indicates 1KB <= packet length < 2KB */
164 #define TX_BD_SHORT_FLAGS_LHINT_LT2K (UINT32_C(0x2) << 13)
165 /* indicates packet length >= 2KB */
166 #define TX_BD_SHORT_FLAGS_LHINT_GTE2K (UINT32_C(0x3) << 13)
167 #define TX_BD_SHORT_FLAGS_LHINT_LAST TX_BD_SHORT_FLAGS_LHINT_GTE2K
169 * If set to 1, the device immediately updates the Send Consumer Index
170 * after the buffer associated with this descriptor has been transferred
171 * via DMA to NIC memory from host memory. An interrupt may or may not
172 * be generated according to the state of the interrupt avoidance
173 * mechanisms. If this bit is set to 0, then the Consumer Index is only
174 * updated as soon as one of the host interrupt coalescing conditions
175 * has been met. This bit must be valid on the first BD of a packet.
177 #define TX_BD_SHORT_FLAGS_COAL_NOW UINT32_C(0x8000)
179 * All bits in this field must be valid on the first BD of a packet.
180 * Only the packet_end bit must be valid for the remaining BDs of a
183 #define TX_BD_SHORT_FLAGS_MASK UINT32_C(0xffc0)
184 #define TX_BD_SHORT_FLAGS_SFT 6
188 * This is the length of the host physical buffer this BD describes in
189 * bytes. This field must be valid on all BDs of a packet.
193 * The opaque data field is pass through to the completion and can be
194 * used for any data that the driver wants to associate with the
195 * transmit BD. This field must be valid on the first BD of a packet.
200 * This is the host physical address for the portion of the packet
201 * described by this TX BD. This value must be valid on all BDs of a
205 } __attribute__((packed));
207 /* Long TX BD (32 bytes split to 2 16-byte struct) */
210 * All bits in this field must be valid on the first BD of a packet.
211 * Only the packet_end bit must be valid for the remaining BDs of a
214 /* This value identifies the type of buffer descriptor. */
215 #define TX_BD_LONG_TYPE_MASK UINT32_C(0x3f)
216 #define TX_BD_LONG_TYPE_SFT 0
218 * Indicates that this BD is 32B long and is used for normal L2
219 * packet transmission.
221 #define TX_BD_LONG_TYPE_TX_BD_LONG (UINT32_C(0x10) << 0)
223 * If set to 1, the packet ends with the data in the buffer pointed to
224 * by this descriptor. This flag must be valid on every BD.
226 #define TX_BD_LONG_FLAGS_PACKET_END UINT32_C(0x40)
228 * If set to 1, the device will not generate a completion for this
229 * transmit packet unless there is an error in it's processing. If this
230 * bit is set to 0, then the packet will be completed normally. This bit
231 * must be valid only on the first BD of a packet.
233 #define TX_BD_LONG_FLAGS_NO_CMPL UINT32_C(0x80)
235 * This value indicates how many 16B BD locations are consumed in the
236 * ring by this packet. A value of 1 indicates that this BD is the only
237 * BD (and that the it is a short BD). A value of 3 indicates either 3
238 * short BDs or 1 long BD and one short BD in the packet. A value of 0
239 * indicates that there are 32 BD locations in the packet (the maximum).
240 * This field is valid only on the first BD of a packet.
242 #define TX_BD_LONG_FLAGS_BD_CNT_MASK UINT32_C(0x1f00)
243 #define TX_BD_LONG_FLAGS_BD_CNT_SFT 8
245 * This value is a hint for the length of the entire packet. It is used
246 * by the chip to optimize internal processing. The packet will be
247 * dropped if the hint is too short. This field is valid only on the
248 * first BD of a packet.
250 #define TX_BD_LONG_FLAGS_LHINT_MASK UINT32_C(0x6000)
251 #define TX_BD_LONG_FLAGS_LHINT_SFT 13
252 /* indicates packet length < 512B */
253 #define TX_BD_LONG_FLAGS_LHINT_LT512 (UINT32_C(0x0) << 13)
254 /* indicates 512 <= packet length < 1KB */
255 #define TX_BD_LONG_FLAGS_LHINT_LT1K (UINT32_C(0x1) << 13)
256 /* indicates 1KB <= packet length < 2KB */
257 #define TX_BD_LONG_FLAGS_LHINT_LT2K (UINT32_C(0x2) << 13)
258 /* indicates packet length >= 2KB */
259 #define TX_BD_LONG_FLAGS_LHINT_GTE2K (UINT32_C(0x3) << 13)
260 #define TX_BD_LONG_FLAGS_LHINT_LAST TX_BD_LONG_FLAGS_LHINT_GTE2K
262 * If set to 1, the device immediately updates the Send Consumer Index
263 * after the buffer associated with this descriptor has been transferred
264 * via DMA to NIC memory from host memory. An interrupt may or may not
265 * be generated according to the state of the interrupt avoidance
266 * mechanisms. If this bit is set to 0, then the Consumer Index is only
267 * updated as soon as one of the host interrupt coalescing conditions
268 * has been met. This bit must be valid on the first BD of a packet.
270 #define TX_BD_LONG_FLAGS_COAL_NOW UINT32_C(0x8000)
272 * All bits in this field must be valid on the first BD of a packet.
273 * Only the packet_end bit must be valid for the remaining BDs of a
276 #define TX_BD_LONG_FLAGS_MASK UINT32_C(0xffc0)
277 #define TX_BD_LONG_FLAGS_SFT 6
281 * This is the length of the host physical buffer this BD describes in
282 * bytes. This field must be valid on all BDs of a packet.
287 * The opaque data field is pass through to the completion and can be
288 * used for any data that the driver wants to associate with the
289 * transmit BD. This field must be valid on the first BD of a packet.
294 * This is the host physical address for the portion of the packet
295 * described by this TX BD. This value must be valid on all BDs of a
299 } __attribute__((packed));
301 /* last 16 bytes of Long TX BD */
303 struct tx_bd_long_hi {
305 * All bits in this field must be valid on the first BD of a packet.
306 * Their value on other BDs of the packet will be ignored.
309 * If set to 1, the controller replaces the TCP/UPD checksum fields of
310 * normal TCP/UPD checksum, or the inner TCP/UDP checksum field of the
311 * encapsulated TCP/UDP packets with the hardware calculated TCP/UDP
312 * checksum for the packet associated with this descriptor. This bit
313 * must be valid on the first BD of a packet.
315 #define TX_BD_LONG_LFLAGS_TCP_UDP_CHKSUM UINT32_C(0x1)
317 * If set to 1, the controller replaces the IP checksum of the normal
318 * packets, or the inner IP checksum of the encapsulated packets with
319 * the hardware calculated IP checksum for the packet associated with
320 * this descriptor. This bit must be valid on the first BD of a packet.
322 #define TX_BD_LONG_LFLAGS_IP_CHKSUM UINT32_C(0x2)
324 * If set to 1, the controller will not append an Ethernet CRC to the
325 * end of the frame. This bit must be valid on the first BD of a packet.
326 * Packet must be 64B or longer when this flag is set. It is not useful
327 * to use this bit with any form of TX offload such as CSO or LSO. The
328 * intent is that the packet from the host already has a valid Ethernet
331 #define TX_BD_LONG_LFLAGS_NOCRC UINT32_C(0x4)
333 * If set to 1, the device will record the time at which the packet was
334 * actually transmitted at the TX MAC. This bit must be valid on the
335 * first BD of a packet.
337 #define TX_BD_LONG_LFLAGS_STAMP UINT32_C(0x8)
339 * If set to 1, The controller replaces the tunnel IP checksum field
340 * with hardware calculated IP checksum for the IP header of the packet
341 * associated with this descriptor. In case of VXLAN, the controller
342 * also replaces the outer header UDP checksum with hardware calculated
343 * UDP checksum for the packet associated with this descriptor.
345 #define TX_BD_LONG_LFLAGS_T_IP_CHKSUM UINT32_C(0x10)
347 * If set to 1, the device will treat this packet with LSO(Large Send
348 * Offload) processing for both normal or encapsulated packets, which is
349 * a form of TCP segmentation. When this bit is 1, the hdr_size and mss
350 * fields must be valid. The driver doesn't need to set t_ip_chksum,
351 * ip_chksum, and tcp_udp_chksum flags since the controller will replace
352 * the appropriate checksum fields for segmented packets. When this bit
353 * is 1, the hdr_size and mss fields must be valid.
355 #define TX_BD_LONG_LFLAGS_LSO UINT32_C(0x20)
357 * If set to zero when LSO is '1', then the IPID will be treated as a
358 * 16b number and will be wrapped if it exceeds a value of 0xffff. If
359 * set to one when LSO is '1', then the IPID will be treated as a 15b
360 * number and will be wrapped if it exceeds a value 0f 0x7fff.
362 #define TX_BD_LONG_LFLAGS_IPID_FMT UINT32_C(0x40)
364 * If set to zero when LSO is '1', then the IPID of the tunnel IP header
365 * will not be modified during LSO operations. If set to one when LSO is
366 * '1', then the IPID of the tunnel IP header will be incremented for
367 * each subsequent segment of an LSO operation.
369 #define TX_BD_LONG_LFLAGS_T_IPID UINT32_C(0x80)
371 * If set to '1', then the RoCE ICRC will be appended to the packet.
372 * Packet must be a valid RoCE format packet.
374 #define TX_BD_LONG_LFLAGS_ROCE_CRC UINT32_C(0x100)
376 * If set to '1', then the FCoE CRC will be appended to the packet.
377 * Packet must be a valid FCoE format packet.
379 #define TX_BD_LONG_LFLAGS_FCOE_CRC UINT32_C(0x200)
383 * When LSO is '1', this field must contain the offset of the TCP
384 * payload from the beginning of the packet in as 16b words. In case of
385 * encapsulated/tunneling packet, this field contains the offset of the
386 * inner TCP payload from beginning of the packet as 16-bit words. This
387 * value must be valid on the first BD of a packet.
389 #define TX_BD_LONG_HDR_SIZE_MASK UINT32_C(0x1ff)
390 #define TX_BD_LONG_HDR_SIZE_SFT 0
394 * This is the MSS value that will be used to do the LSO processing. The
395 * value is the length in bytes of the TCP payload for each segment
396 * generated by the LSO operation. This value must be valid on the first
399 #define TX_BD_LONG_MSS_MASK UINT32_C(0x7fff)
400 #define TX_BD_LONG_MSS_SFT 0
406 * This value selects a CFA action to perform on the packet. Set this
407 * value to zero if no CFA action is desired. This value must be valid
408 * on the first BD of a packet.
413 * This value is action meta-data that defines CFA edit operations that
414 * are done in addition to any action editing.
416 /* When key=1, This is the VLAN tag VID value. */
417 #define TX_BD_LONG_CFA_META_VLAN_VID_MASK UINT32_C(0xfff)
418 #define TX_BD_LONG_CFA_META_VLAN_VID_SFT 0
419 /* When key=1, This is the VLAN tag DE value. */
420 #define TX_BD_LONG_CFA_META_VLAN_DE UINT32_C(0x1000)
421 /* When key=1, This is the VLAN tag PRI value. */
422 #define TX_BD_LONG_CFA_META_VLAN_PRI_MASK UINT32_C(0xe000)
423 #define TX_BD_LONG_CFA_META_VLAN_PRI_SFT 13
424 /* When key=1, This is the VLAN tag TPID select value. */
425 #define TX_BD_LONG_CFA_META_VLAN_TPID_MASK UINT32_C(0x70000)
426 #define TX_BD_LONG_CFA_META_VLAN_TPID_SFT 16
428 #define TX_BD_LONG_CFA_META_VLAN_TPID_TPID88A8 (UINT32_C(0x0) << 16)
430 #define TX_BD_LONG_CFA_META_VLAN_TPID_TPID8100 (UINT32_C(0x1) << 16)
432 #define TX_BD_LONG_CFA_META_VLAN_TPID_TPID9100 (UINT32_C(0x2) << 16)
434 #define TX_BD_LONG_CFA_META_VLAN_TPID_TPID9200 (UINT32_C(0x3) << 16)
436 #define TX_BD_LONG_CFA_META_VLAN_TPID_TPID9300 (UINT32_C(0x4) << 16)
437 /* Value programmed in CFA VLANTPID register. */
438 #define TX_BD_LONG_CFA_META_VLAN_TPID_TPIDCFG (UINT32_C(0x5) << 16)
439 #define TX_BD_LONG_CFA_META_VLAN_TPID_LAST \
440 TX_BD_LONG_CFA_META_VLAN_TPID_TPIDCFG
441 /* When key=1, This is the VLAN tag TPID select value. */
442 #define TX_BD_LONG_CFA_META_VLAN_RESERVED_MASK UINT32_C(0xff80000)
443 #define TX_BD_LONG_CFA_META_VLAN_RESERVED_SFT 19
445 * This field identifies the type of edit to be performed on the packet.
446 * This value must be valid on the first BD of a packet.
448 #define TX_BD_LONG_CFA_META_KEY_MASK UINT32_C(0xf0000000)
449 #define TX_BD_LONG_CFA_META_KEY_SFT 28
451 #define TX_BD_LONG_CFA_META_KEY_NONE (UINT32_C(0x0) << 28)
453 * - meta[17:16] - TPID select value (0 = 0x8100). - meta[15:12]
454 * - PRI/DE value. - meta[11:0] - VID value.
456 #define TX_BD_LONG_CFA_META_KEY_VLAN_TAG (UINT32_C(0x1) << 28)
457 #define TX_BD_LONG_CFA_META_KEY_LAST TX_BD_LONG_CFA_META_KEY_VLAN_TAG
459 } __attribute__((packed));
461 /* RX Producer Packet BD (16 bytes) */
462 struct rx_prod_pkt_bd {
463 /* This value identifies the type of buffer descriptor. */
464 #define RX_PROD_PKT_BD_TYPE_MASK UINT32_C(0x3f)
465 #define RX_PROD_PKT_BD_TYPE_SFT 0
467 * Indicates that this BD is 16B long and is an RX Producer (ie.
468 * empty) buffer descriptor.
470 #define RX_PROD_PKT_BD_TYPE_RX_PROD_PKT (UINT32_C(0x4) << 0)
472 * If set to 1, the packet will be placed at the address plus 2B. The 2
473 * Bytes of padding will be written as zero.
476 * This is intended to be used when the host buffer is cache-line
477 * aligned to produce packets that are easy to parse in host memory
478 * while still allowing writes to be cache line aligned.
480 #define RX_PROD_PKT_BD_FLAGS_SOP_PAD UINT32_C(0x40)
482 * If set to 1, the packet write will be padded out to the nearest
483 * cache-line with zero value padding.
486 * If receive buffers start/end on cache-line boundaries, this feature
487 * will ensure that all data writes on the PCI bus start/end on cache
490 #define RX_PROD_PKT_BD_FLAGS_EOP_PAD UINT32_C(0x80)
492 * This value is the number of additional buffers in the ring that
493 * describe the buffer space to be consumed for the this packet. If the
494 * value is zero, then the packet must fit within the space described by
495 * this BD. If this value is 1 or more, it indicates how many additional
496 * "buffer" BDs are in the ring immediately following this BD to be used
497 * for the same network packet. Even if the packet to be placed does not
498 * need all the additional buffers, they will be consumed anyway.
500 #define RX_PROD_PKT_BD_FLAGS_BUFFERS_MASK UINT32_C(0x300)
501 #define RX_PROD_PKT_BD_FLAGS_BUFFERS_SFT 8
502 #define RX_PROD_PKT_BD_FLAGS_MASK UINT32_C(0xffc0)
503 #define RX_PROD_PKT_BD_FLAGS_SFT 6
507 * This is the length in Bytes of the host physical buffer where data
508 * for the packet may be placed in host memory.
511 * While this is a Byte resolution value, it is often advantageous to
512 * ensure that the buffers provided end on a host cache line.
517 * The opaque data field is pass through to the completion and can be
518 * used for any data that the driver wants to associate with this
519 * receive buffer set.
524 * This is the host physical address where data for the packet may by
525 * placed in host memory.
528 * While this is a Byte resolution value, it is often advantageous to
529 * ensure that the buffers provide start on a host cache line.
532 } __attribute__((packed));
534 /* Completion Ring Structures */
535 /* Note: This structure is used by the HWRM to communicate HWRM Error. */
536 /* Base Completion Record (16 bytes) */
540 * This field indicates the exact type of the completion. By convention,
541 * the LSB identifies the length of the record in 16B units. Even values
542 * indicate 16B records. Odd values indicate 32B records.
544 #define CMPL_BASE_TYPE_MASK UINT32_C(0x3f)
545 #define CMPL_BASE_TYPE_SFT 0
546 /* TX L2 completion: Completion of TX packet. Length = 16B */
547 #define CMPL_BASE_TYPE_TX_L2 (UINT32_C(0x0) << 0)
549 * RX L2 completion: Completion of and L2 RX packet.
552 #define CMPL_BASE_TYPE_RX_L2 (UINT32_C(0x11) << 0)
554 * RX Aggregation Buffer completion : Completion of an L2
555 * aggregation buffer in support of TPA, HDS, or Jumbo packet
556 * completion. Length = 16B
558 #define CMPL_BASE_TYPE_RX_AGG (UINT32_C(0x12) << 0)
560 * RX L2 TPA Start Completion: Completion at the beginning of a
561 * TPA operation. Length = 32B
563 #define CMPL_BASE_TYPE_RX_TPA_START (UINT32_C(0x13) << 0)
565 * RX L2 TPA End Completion: Completion at the end of a TPA
566 * operation. Length = 32B
568 #define CMPL_BASE_TYPE_RX_TPA_END (UINT32_C(0x15) << 0)
570 * Statistics Ejection Completion: Completion of statistics data
571 * ejection buffer. Length = 16B
573 #define CMPL_BASE_TYPE_STAT_EJECT (UINT32_C(0x1a) << 0)
574 /* HWRM Command Completion: Completion of an HWRM command. */
575 #define CMPL_BASE_TYPE_HWRM_DONE (UINT32_C(0x20) << 0)
576 /* Forwarded HWRM Request */
577 #define CMPL_BASE_TYPE_HWRM_FWD_REQ (UINT32_C(0x22) << 0)
578 /* Forwarded HWRM Response */
579 #define CMPL_BASE_TYPE_HWRM_FWD_RESP (UINT32_C(0x24) << 0)
580 /* HWRM Asynchronous Event Information */
581 #define CMPL_BASE_TYPE_HWRM_ASYNC_EVENT (UINT32_C(0x2e) << 0)
582 /* CQ Notification */
583 #define CMPL_BASE_TYPE_CQ_NOTIFICATION (UINT32_C(0x30) << 0)
584 /* SRQ Threshold Event */
585 #define CMPL_BASE_TYPE_SRQ_EVENT (UINT32_C(0x32) << 0)
586 /* DBQ Threshold Event */
587 #define CMPL_BASE_TYPE_DBQ_EVENT (UINT32_C(0x34) << 0)
588 /* QP Async Notification */
589 #define CMPL_BASE_TYPE_QP_EVENT (UINT32_C(0x38) << 0)
590 /* Function Async Notification */
591 #define CMPL_BASE_TYPE_FUNC_EVENT (UINT32_C(0x3a) << 0)
598 * This value is written by the NIC such that it will be different for
599 * each pass through the completion queue. The even passes will write 1.
600 * The odd passes will write 0.
602 #define CMPL_BASE_V UINT32_C(0x1)
604 #define CMPL_BASE_INFO3_MASK UINT32_C(0xfffffffe)
605 #define CMPL_BASE_INFO3_SFT 1
609 } __attribute__((packed));
611 /* TX Completion Record (16 bytes) */
614 * This field indicates the exact type of the completion. By convention,
615 * the LSB identifies the length of the record in 16B units. Even values
616 * indicate 16B records. Odd values indicate 32B records.
618 #define TX_CMPL_TYPE_MASK UINT32_C(0x3f)
619 #define TX_CMPL_TYPE_SFT 0
620 /* TX L2 completion: Completion of TX packet. Length = 16B */
621 #define TX_CMPL_TYPE_TX_L2 (UINT32_C(0x0) << 0)
623 * When this bit is '1', it indicates a packet that has an error of some
624 * type. Type of error is indicated in error_flags.
626 #define TX_CMPL_FLAGS_ERROR UINT32_C(0x40)
628 * When this bit is '1', it indicates that the packet completed was
629 * transmitted using the push acceleration data provided by the driver.
630 * When this bit is '0', it indicates that the packet had not push
631 * acceleration data written or was executed as a normal packet even
632 * though push data was provided.
634 #define TX_CMPL_FLAGS_PUSH UINT32_C(0x80)
635 #define TX_CMPL_FLAGS_MASK UINT32_C(0xffc0)
636 #define TX_CMPL_FLAGS_SFT 6
642 * This is a copy of the opaque field from the first TX BD of this
643 * transmitted packet.
648 * This value is written by the NIC such that it will be different for
649 * each pass through the completion queue. The even passes will write 1.
650 * The odd passes will write 0.
652 #define TX_CMPL_V UINT32_C(0x1)
654 * This error indicates that there was some sort of problem with the BDs
657 #define TX_CMPL_ERRORS_BUFFER_ERROR_MASK UINT32_C(0xe)
658 #define TX_CMPL_ERRORS_BUFFER_ERROR_SFT 1
660 #define TX_CMPL_ERRORS_BUFFER_ERROR_NO_ERROR (UINT32_C(0x0) << 1)
661 /* Bad Format: BDs were not formatted correctly. */
662 #define TX_CMPL_ERRORS_BUFFER_ERROR_BAD_FMT (UINT32_C(0x2) << 1)
663 #define TX_CMPL_ERRORS_BUFFER_ERROR_LAST \
664 TX_CMPL_ERRORS_BUFFER_ERROR_BAD_FMT
666 * When this bit is '1', it indicates that the length of the packet was
667 * zero. No packet was transmitted.
669 #define TX_CMPL_ERRORS_ZERO_LENGTH_PKT UINT32_C(0x10)
671 * When this bit is '1', it indicates that the packet was longer than
672 * the programmed limit in TDI. No packet was transmitted.
674 #define TX_CMPL_ERRORS_EXCESSIVE_BD_LENGTH UINT32_C(0x20)
676 * When this bit is '1', it indicates that one or more of the BDs
677 * associated with this packet generated a PCI error. This probably
678 * means the address was not valid.
680 #define TX_CMPL_ERRORS_DMA_ERROR UINT32_C(0x40)
682 * When this bit is '1', it indicates that the packet was longer than
683 * indicated by the hint. No packet was transmitted.
685 #define TX_CMPL_ERRORS_HINT_TOO_SHORT UINT32_C(0x80)
687 * When this bit is '1', it indicates that the packet was dropped due to
688 * Poison TLP error on one or more of the TLPs in the PXP completion.
690 #define TX_CMPL_ERRORS_POISON_TLP_ERROR UINT32_C(0x100)
691 #define TX_CMPL_ERRORS_MASK UINT32_C(0xfffe)
692 #define TX_CMPL_ERRORS_SFT 1
697 } __attribute__((packed)) tx_cmpl_t, *ptx_cmpl_t;
699 /* RX Packet Completion Record (32 bytes split to 2 16-byte struct) */
702 * This field indicates the exact type of the completion. By convention,
703 * the LSB identifies the length of the record in 16B units. Even values
704 * indicate 16B records. Odd values indicate 32B records.
706 #define RX_PKT_CMPL_TYPE_MASK UINT32_C(0x3f)
707 #define RX_PKT_CMPL_TYPE_SFT 0
709 * RX L2 completion: Completion of and L2 RX packet.
712 #define RX_PKT_CMPL_TYPE_RX_L2 (UINT32_C(0x11) << 0)
714 * When this bit is '1', it indicates a packet that has an error of some
715 * type. Type of error is indicated in error_flags.
717 #define RX_PKT_CMPL_FLAGS_ERROR UINT32_C(0x40)
718 /* This field indicates how the packet was placed in the buffer. */
719 #define RX_PKT_CMPL_FLAGS_PLACEMENT_MASK UINT32_C(0x380)
720 #define RX_PKT_CMPL_FLAGS_PLACEMENT_SFT 7
721 /* Normal: Packet was placed using normal algorithm. */
722 #define RX_PKT_CMPL_FLAGS_PLACEMENT_NORMAL (UINT32_C(0x0) << 7)
723 /* Jumbo: Packet was placed using jumbo algorithm. */
724 #define RX_PKT_CMPL_FLAGS_PLACEMENT_JUMBO (UINT32_C(0x1) << 7)
726 * Header/Data Separation: Packet was placed using Header/Data
727 * separation algorithm. The separation location is indicated by
730 #define RX_PKT_CMPL_FLAGS_PLACEMENT_HDS (UINT32_C(0x2) << 7)
731 #define RX_PKT_CMPL_FLAGS_PLACEMENT_LAST \
732 RX_PKT_CMPL_FLAGS_PLACEMENT_HDS
733 /* This bit is '1' if the RSS field in this completion is valid. */
734 #define RX_PKT_CMPL_FLAGS_RSS_VALID UINT32_C(0x400)
736 * This value indicates what the inner packet determined for the packet
739 #define RX_PKT_CMPL_FLAGS_ITYPE_MASK UINT32_C(0xf000)
740 #define RX_PKT_CMPL_FLAGS_ITYPE_SFT 12
741 /* Not Known: Indicates that the packet type was not known. */
742 #define RX_PKT_CMPL_FLAGS_ITYPE_NOT_KNOWN (UINT32_C(0x0) << 12)
744 * IP Packet: Indicates that the packet was an IP packet, but
745 * further classification was not possible.
747 #define RX_PKT_CMPL_FLAGS_ITYPE_IP (UINT32_C(0x1) << 12)
749 * TCP Packet: Indicates that the packet was IP and TCP. This
750 * indicates that the payload_offset field is valid.
752 #define RX_PKT_CMPL_FLAGS_ITYPE_TCP (UINT32_C(0x2) << 12)
754 * UDP Packet: Indicates that the packet was IP and UDP. This
755 * indicates that the payload_offset field is valid.
757 #define RX_PKT_CMPL_FLAGS_ITYPE_UDP (UINT32_C(0x3) << 12)
759 * FCoE Packet: Indicates that the packet was recognized as a
760 * FCoE. This also indicates that the payload_offset field is
763 #define RX_PKT_CMPL_FLAGS_ITYPE_FCOE (UINT32_C(0x4) << 12)
765 * RoCE Packet: Indicates that the packet was recognized as a
766 * RoCE. This also indicates that the payload_offset field is
769 #define RX_PKT_CMPL_FLAGS_ITYPE_ROCE (UINT32_C(0x5) << 12)
771 * ICMP Packet: Indicates that the packet was recognized as
772 * ICMP. This indicates that the payload_offset field is valid.
774 #define RX_PKT_CMPL_FLAGS_ITYPE_ICMP (UINT32_C(0x7) << 12)
776 * PtP packet wo/timestamp: Indicates that the packet was
777 * recognized as a PtP packet.
779 #define RX_PKT_CMPL_FLAGS_ITYPE_PTP_WO_TIMESTAMP \
780 (UINT32_C(0x8) << 12)
782 * PtP packet w/timestamp: Indicates that the packet was
783 * recognized as a PtP packet and that a timestamp was taken for
786 #define RX_PKT_CMPL_FLAGS_ITYPE_PTP_W_TIMESTAMP (UINT32_C(0x9) << 12)
787 #define RX_PKT_CMPL_FLAGS_ITYPE_LAST \
788 RX_PKT_CMPL_FLAGS_ITYPE_PTP_W_TIMESTAMP
789 #define RX_PKT_CMPL_FLAGS_MASK UINT32_C(0xffc0)
790 #define RX_PKT_CMPL_FLAGS_SFT 6
794 * This is the length of the data for the packet stored in the buffer(s)
795 * identified by the opaque value. This includes the packet BD and any
796 * associated buffer BDs. This does not include the the length of any
797 * data places in aggregation BDs.
802 * This is a copy of the opaque field from the RX BD this completion
808 * This value is written by the NIC such that it will be different for
809 * each pass through the completion queue. The even passes will write 1.
810 * The odd passes will write 0.
812 #define RX_PKT_CMPL_V1 UINT32_C(0x1)
814 * This value is the number of aggregation buffers that follow this
815 * entry in the completion ring that are a part of this packet. If the
816 * value is zero, then the packet is completely contained in the buffer
817 * space provided for the packet in the RX ring.
819 #define RX_PKT_CMPL_AGG_BUFS_MASK UINT32_C(0x3e)
820 #define RX_PKT_CMPL_AGG_BUFS_SFT 1
824 * This is the RSS hash type for the packet. The value is packed
825 * {tuple_extrac_op[1:0],rss_profile_id[4:0],tuple_extrac_op[2]}.
827 uint8_t rss_hash_type;
830 * This value indicates the offset from the beginning of the packet
831 * where the inner payload starts. This value is valid for TCP, UDP,
832 * FCoE, and RoCE packets.
834 uint8_t payload_offset;
839 * This value is the RSS hash value calculated for the packet based on
840 * the mode bits and key value in the VNIC.
843 } __attribute__((packed));
845 /* last 16 bytes of RX Packet Completion Record */
846 struct rx_pkt_cmpl_hi {
848 * This indicates that the ip checksum was calculated for the inner
849 * packet and that the ip_cs_error field indicates if there was an
852 #define RX_PKT_CMPL_FLAGS2_IP_CS_CALC UINT32_C(0x1)
854 * This indicates that the TCP, UDP or ICMP checksum was calculated for
855 * the inner packet and that the l4_cs_error field indicates if there
858 #define RX_PKT_CMPL_FLAGS2_L4_CS_CALC UINT32_C(0x2)
860 * This indicates that the ip checksum was calculated for the tunnel
861 * header and that the t_ip_cs_error field indicates if there was an
864 #define RX_PKT_CMPL_FLAGS2_T_IP_CS_CALC UINT32_C(0x4)
866 * This indicates that the UDP checksum was calculated for the tunnel
867 * packet and that the t_l4_cs_error field indicates if there was an
870 #define RX_PKT_CMPL_FLAGS2_T_L4_CS_CALC UINT32_C(0x8)
871 /* This value indicates what format the metadata field is. */
872 #define RX_PKT_CMPL_FLAGS2_META_FORMAT_MASK UINT32_C(0xf0)
873 #define RX_PKT_CMPL_FLAGS2_META_FORMAT_SFT 4
874 /* No metadata informtaion. Value is zero. */
875 #define RX_PKT_CMPL_FLAGS2_META_FORMAT_NONE (UINT32_C(0x0) << 4)
877 * The metadata field contains the VLAN tag and TPID value. -
878 * metadata[11:0] contains the vlan VID value. - metadata[12]
879 * contains the vlan DE value. - metadata[15:13] contains the
880 * vlan PRI value. - metadata[31:16] contains the vlan TPID
883 #define RX_PKT_CMPL_FLAGS2_META_FORMAT_VLAN (UINT32_C(0x1) << 4)
884 #define RX_PKT_CMPL_FLAGS2_META_FORMAT_LAST \
885 RX_PKT_CMPL_FLAGS2_META_FORMAT_VLAN
887 * This field indicates the IP type for the inner-most IP header. A
888 * value of '0' indicates IPv4. A value of '1' indicates IPv6. This
889 * value is only valid if itype indicates a packet with an IP header.
891 #define RX_PKT_CMPL_FLAGS2_IP_TYPE UINT32_C(0x100)
895 * This is data from the CFA block as indicated by the meta_format
898 /* When meta_format=1, this value is the VLAN VID. */
899 #define RX_PKT_CMPL_METADATA_VID_MASK UINT32_C(0xfff)
900 #define RX_PKT_CMPL_METADATA_VID_SFT 0
901 /* When meta_format=1, this value is the VLAN DE. */
902 #define RX_PKT_CMPL_METADATA_DE UINT32_C(0x1000)
903 /* When meta_format=1, this value is the VLAN PRI. */
904 #define RX_PKT_CMPL_METADATA_PRI_MASK UINT32_C(0xe000)
905 #define RX_PKT_CMPL_METADATA_PRI_SFT 13
906 /* When meta_format=1, this value is the VLAN TPID. */
907 #define RX_PKT_CMPL_METADATA_TPID_MASK UINT32_C(0xffff0000)
908 #define RX_PKT_CMPL_METADATA_TPID_SFT 16
912 * This value is written by the NIC such that it will be different for
913 * each pass through the completion queue. The even passes will write 1.
914 * The odd passes will write 0.
916 #define RX_PKT_CMPL_V2 UINT32_C(0x1)
918 * This error indicates that there was some sort of problem with the BDs
919 * for the packet that was found after part of the packet was already
920 * placed. The packet should be treated as invalid.
922 #define RX_PKT_CMPL_ERRORS_BUFFER_ERROR_MASK UINT32_C(0xe)
923 #define RX_PKT_CMPL_ERRORS_BUFFER_ERROR_SFT 1
924 /* No buffer error */
925 #define RX_PKT_CMPL_ERRORS_BUFFER_ERROR_NO_BUFFER \
928 * Did Not Fit: Packet did not fit into packet buffer provided.
929 * For regular placement, this means the packet did not fit in
930 * the buffer provided. For HDS and jumbo placement, this means
931 * that the packet could not be placed into 7 physical buffers
934 #define RX_PKT_CMPL_ERRORS_BUFFER_ERROR_DID_NOT_FIT \
937 * Not On Chip: All BDs needed for the packet were not on-chip
938 * when the packet arrived.
940 #define RX_PKT_CMPL_ERRORS_BUFFER_ERROR_NOT_ON_CHIP \
942 /* Bad Format: BDs were not formatted correctly. */
943 #define RX_PKT_CMPL_ERRORS_BUFFER_ERROR_BAD_FORMAT \
945 #define RX_PKT_CMPL_ERRORS_BUFFER_ERROR_LAST \
946 RX_PKT_CMPL_ERRORS_BUFFER_ERROR_BAD_FORMAT
947 /* This indicates that there was an error in the IP header checksum. */
948 #define RX_PKT_CMPL_ERRORS_IP_CS_ERROR UINT32_C(0x10)
950 * This indicates that there was an error in the TCP, UDP or ICMP
953 #define RX_PKT_CMPL_ERRORS_L4_CS_ERROR UINT32_C(0x20)
955 * This indicates that there was an error in the tunnel IP header
958 #define RX_PKT_CMPL_ERRORS_T_IP_CS_ERROR UINT32_C(0x40)
959 /* This indicates that there was an error in the tunnel UDP checksum. */
960 #define RX_PKT_CMPL_ERRORS_T_L4_CS_ERROR UINT32_C(0x80)
962 * This indicates that there was a CRC error on either an FCoE or RoCE
963 * packet. The itype indicates the packet type.
965 #define RX_PKT_CMPL_ERRORS_CRC_ERROR UINT32_C(0x100)
967 * This indicates that there was an error in the tunnel portion of the
968 * packet when this field is non-zero.
970 #define RX_PKT_CMPL_ERRORS_T_PKT_ERROR_MASK UINT32_C(0xe00)
971 #define RX_PKT_CMPL_ERRORS_T_PKT_ERROR_SFT 9
973 * No additional error occurred on the tunnel portion of the
974 * packet of the packet does not have a tunnel.
976 #define RX_PKT_CMPL_ERRORS_T_PKT_ERROR_NO_ERROR (UINT32_C(0x0) << 9)
978 * Indicates that IP header version does not match expectation
979 * from L2 Ethertype for IPv4 and IPv6 in the tunnel header.
981 #define RX_PKT_CMPL_ERRORS_T_PKT_ERROR_T_L3_BAD_VERSION \
984 * Indicates that header length is out of range in the tunnel
985 * header. Valid for IPv4.
987 #define RX_PKT_CMPL_ERRORS_T_PKT_ERROR_T_L3_BAD_HDR_LEN \
990 * Indicates that the physical packet is shorter than that
991 * claimed by the PPPoE header length for a tunnel PPPoE packet.
993 #define RX_PKT_CMPL_ERRORS_T_PKT_ERROR_TUNNEL_TOTAL_ERROR \
996 * Indicates that physical packet is shorter than that claimed
997 * by the tunnel l3 header length. Valid for IPv4, or IPv6
998 * tunnel packet packets.
1000 #define RX_PKT_CMPL_ERRORS_T_PKT_ERROR_T_IP_TOTAL_ERROR \
1001 (UINT32_C(0x4) << 9)
1003 * Indicates that the physical packet is shorter than that
1004 * claimed by the tunnel UDP header length for a tunnel UDP
1005 * packet that is not fragmented.
1007 #define RX_PKT_CMPL_ERRORS_T_PKT_ERROR_T_UDP_TOTAL_ERROR \
1008 (UINT32_C(0x5) << 9)
1010 * indicates that the IPv4 TTL or IPv6 hop limit check have
1011 * failed (e.g. TTL = 0) in the tunnel header. Valid for IPv4,
1014 #define RX_PKT_CMPL_ERRORS_T_PKT_ERROR_T_L3_BAD_TTL \
1015 (UINT32_C(0x6) << 9)
1016 #define RX_PKT_CMPL_ERRORS_T_PKT_ERROR_LAST \
1017 RX_PKT_CMPL_ERRORS_T_PKT_ERROR_T_L3_BAD_TTL
1019 * This indicates that there was an error in the inner portion of the
1020 * packet when this field is non-zero.
1022 #define RX_PKT_CMPL_ERRORS_PKT_ERROR_MASK UINT32_C(0xf000)
1023 #define RX_PKT_CMPL_ERRORS_PKT_ERROR_SFT 12
1025 * No additional error occurred on the tunnel portion of the
1026 * packet of the packet does not have a tunnel.
1028 #define RX_PKT_CMPL_ERRORS_PKT_ERROR_NO_ERROR (UINT32_C(0x0) << 12)
1030 * Indicates that IP header version does not match expectation
1031 * from L2 Ethertype for IPv4 and IPv6 or that option other than
1032 * VFT was parsed on FCoE packet.
1034 #define RX_PKT_CMPL_ERRORS_PKT_ERROR_L3_BAD_VERSION \
1035 (UINT32_C(0x1) << 12)
1037 * indicates that header length is out of range. Valid for IPv4
1040 #define RX_PKT_CMPL_ERRORS_PKT_ERROR_L3_BAD_HDR_LEN \
1041 (UINT32_C(0x2) << 12)
1043 * indicates that the IPv4 TTL or IPv6 hop limit check have
1044 * failed (e.g. TTL = 0). Valid for IPv4, and IPv6
1046 #define RX_PKT_CMPL_ERRORS_PKT_ERROR_L3_BAD_TTL (UINT32_C(0x3) << 12)
1048 * Indicates that physical packet is shorter than that claimed
1049 * by the l3 header length. Valid for IPv4, IPv6 packet or RoCE
1052 #define RX_PKT_CMPL_ERRORS_PKT_ERROR_IP_TOTAL_ERROR \
1053 (UINT32_C(0x4) << 12)
1055 * Indicates that the physical packet is shorter than that
1056 * claimed by the UDP header length for a UDP packet that is not
1059 #define RX_PKT_CMPL_ERRORS_PKT_ERROR_UDP_TOTAL_ERROR \
1060 (UINT32_C(0x5) << 12)
1062 * Indicates that TCP header length > IP payload. Valid for TCP
1065 #define RX_PKT_CMPL_ERRORS_PKT_ERROR_L4_BAD_HDR_LEN \
1066 (UINT32_C(0x6) << 12)
1067 /* Indicates that TCP header length < 5. Valid for TCP. */
1068 #define RX_PKT_CMPL_ERRORS_PKT_ERROR_L4_BAD_HDR_LEN_TOO_SMALL \
1069 (UINT32_C(0x7) << 12)
1071 * Indicates that TCP option headers result in a TCP header size
1072 * that does not match data offset in TCP header. Valid for TCP.
1074 #define RX_PKT_CMPL_ERRORS_PKT_ERROR_L4_BAD_OPT_LEN \
1075 (UINT32_C(0x8) << 12)
1076 #define RX_PKT_CMPL_ERRORS_PKT_ERROR_LAST \
1077 RX_PKT_CMPL_ERRORS_PKT_ERROR_L4_BAD_OPT_LEN
1078 #define RX_PKT_CMPL_ERRORS_MASK UINT32_C(0xfffe)
1079 #define RX_PKT_CMPL_ERRORS_SFT 1
1083 * This field identifies the CFA action rule that was used for this
1089 * This value holds the reordering sequence number for the packet. If
1090 * the reordering sequence is not valid, then this value is zero. The
1091 * reordering domain for the packet is in the bottom 8 to 10b of the
1092 * rss_hash value. The bottom 20b of this value contain the ordering
1093 * domain value for the packet.
1095 #define RX_PKT_CMPL_REORDER_MASK UINT32_C(0xffffff)
1096 #define RX_PKT_CMPL_REORDER_SFT 0
1098 } __attribute__((packed));
1100 /* HWRM Forwarded Request (16 bytes) */
1101 struct hwrm_fwd_req_cmpl {
1102 /* Length of forwarded request in bytes. */
1104 * This field indicates the exact type of the completion. By convention,
1105 * the LSB identifies the length of the record in 16B units. Even values
1106 * indicate 16B records. Odd values indicate 32B records.
1108 #define HWRM_FWD_REQ_CMPL_TYPE_MASK UINT32_C(0x3f)
1109 #define HWRM_FWD_REQ_CMPL_TYPE_SFT 0
1110 /* Forwarded HWRM Request */
1111 #define HWRM_FWD_REQ_CMPL_TYPE_HWRM_FWD_REQ (UINT32_C(0x22) << 0)
1112 /* Length of forwarded request in bytes. */
1113 #define HWRM_FWD_REQ_CMPL_REQ_LEN_MASK UINT32_C(0xffc0)
1114 #define HWRM_FWD_REQ_CMPL_REQ_LEN_SFT 6
1115 uint16_t req_len_type;
1118 * Source ID of this request. Typically used in forwarding requests and
1119 * responses. 0x0 - 0xFFF8 - Used for function ids 0xFFF8 - 0xFFFE -
1120 * Reserved for internal processors 0xFFFF - HWRM
1126 /* Address of forwarded request. */
1128 * This value is written by the NIC such that it will be different for
1129 * each pass through the completion queue. The even passes will write 1.
1130 * The odd passes will write 0.
1132 #define HWRM_FWD_REQ_CMPL_V UINT32_C(0x1)
1133 /* Address of forwarded request. */
1134 #define HWRM_FWD_REQ_CMPL_REQ_BUF_ADDR_MASK UINT32_C(0xfffffffe)
1135 #define HWRM_FWD_REQ_CMPL_REQ_BUF_ADDR_SFT 1
1136 uint64_t req_buf_addr_v;
1137 } __attribute__((packed));
1139 /* HWRM Asynchronous Event Completion Record (16 bytes) */
1140 struct hwrm_async_event_cmpl {
1142 * This field indicates the exact type of the completion. By convention,
1143 * the LSB identifies the length of the record in 16B units. Even values
1144 * indicate 16B records. Odd values indicate 32B records.
1146 #define HWRM_ASYNC_EVENT_CMPL_TYPE_MASK UINT32_C(0x3f)
1147 #define HWRM_ASYNC_EVENT_CMPL_TYPE_SFT 0
1148 /* HWRM Asynchronous Event Information */
1149 #define HWRM_ASYNC_EVENT_CMPL_TYPE_HWRM_ASYNC_EVENT \
1150 (UINT32_C(0x2e) << 0)
1153 /* Identifiers of events. */
1154 /* Link status changed */
1155 #define HWRM_ASYNC_EVENT_CMPL_EVENT_ID_LINK_STATUS_CHANGE \
1156 (UINT32_C(0x0) << 0)
1157 /* Link MTU changed */
1158 #define HWRM_ASYNC_EVENT_CMPL_EVENT_ID_LINK_MTU_CHANGE \
1159 (UINT32_C(0x1) << 0)
1160 /* Link speed changed */
1161 #define HWRM_ASYNC_EVENT_CMPL_EVENT_ID_LINK_SPEED_CHANGE \
1162 (UINT32_C(0x2) << 0)
1163 /* DCB Configuration changed */
1164 #define HWRM_ASYNC_EVENT_CMPL_EVENT_ID_DCB_CONFIG_CHANGE \
1165 (UINT32_C(0x3) << 0)
1166 /* Port connection not allowed */
1167 #define HWRM_ASYNC_EVENT_CMPL_EVENT_ID_PORT_CONN_NOT_ALLOWED \
1168 (UINT32_C(0x4) << 0)
1169 /* Link speed configuration was not allowed */
1170 #define HWRM_ASYNC_EVENT_CMPL_EVENT_ID_LINK_SPEED_CFG_NOT_ALLOWED \
1171 (UINT32_C(0x5) << 0)
1172 /* Function driver unloaded */
1173 #define HWRM_ASYNC_EVENT_CMPL_EVENT_ID_FUNC_DRVR_UNLOAD \
1174 (UINT32_C(0x10) << 0)
1175 /* Function driver loaded */
1176 #define HWRM_ASYNC_EVENT_CMPL_EVENT_ID_FUNC_DRVR_LOAD \
1177 (UINT32_C(0x11) << 0)
1178 /* PF driver unloaded */
1179 #define HWRM_ASYNC_EVENT_CMPL_EVENT_ID_PF_DRVR_UNLOAD \
1180 (UINT32_C(0x20) << 0)
1181 /* PF driver loaded */
1182 #define HWRM_ASYNC_EVENT_CMPL_EVENT_ID_PF_DRVR_LOAD \
1183 (UINT32_C(0x21) << 0)
1184 /* VF Function Level Reset (FLR) */
1185 #define HWRM_ASYNC_EVENT_CMPL_EVENT_ID_VF_FLR (UINT32_C(0x30) << 0)
1186 /* VF MAC Address Change */
1187 #define HWRM_ASYNC_EVENT_CMPL_EVENT_ID_VF_MAC_ADDR_CHANGE \
1188 (UINT32_C(0x31) << 0)
1189 /* PF-VF communication channel status change. */
1190 #define HWRM_ASYNC_EVENT_CMPL_EVENT_ID_PF_VF_COMM_STATUS_CHANGE \
1191 (UINT32_C(0x32) << 0)
1193 #define HWRM_ASYNC_EVENT_CMPL_EVENT_ID_HWRM_ERROR \
1194 (UINT32_C(0xff) << 0)
1197 /* Event specific data */
1198 uint32_t event_data2;
1202 * This value is written by the NIC such that it will be different for
1203 * each pass through the completion queue. The even passes will write 1.
1204 * The odd passes will write 0.
1206 #define HWRM_ASYNC_EVENT_CMPL_V UINT32_C(0x1)
1208 #define HWRM_ASYNC_EVENT_CMPL_OPAQUE_MASK UINT32_C(0xfe)
1209 #define HWRM_ASYNC_EVENT_CMPL_OPAQUE_SFT 1
1212 /* 8-lsb timestamp from POR (100-msec resolution) */
1213 uint8_t timestamp_lo;
1215 /* 16-lsb timestamp from POR (100-msec resolution) */
1216 uint16_t timestamp_hi;
1218 /* Event specific data */
1219 uint32_t event_data1;
1220 } __attribute__((packed));
1223 * Note: The Hardware Resource Manager (HWRM) manages various hardware resources
1224 * inside the chip. The HWRM is implemented in firmware, and runs on embedded
1225 * processors inside the chip. This firmware is vital part of the chip's
1226 * hardware. The chip can not be used by driver without it.
1229 /* Input (16 bytes) */
1232 * This value indicates what type of request this is. The format for the
1233 * rest of the command is determined by this field.
1238 * This value indicates the what completion ring the request will be
1239 * optionally completed on. If the value is -1, then no CR completion
1240 * will be generated. Any other value must be a valid CR ring_id value
1241 * for this function.
1245 /* This value indicates the command sequence number. */
1249 * Target ID of this command. 0x0 - 0xFFF8 - Used for function ids
1250 * 0xFFF8 - 0xFFFE - Reserved for internal processors 0xFFFF - HWRM
1255 * This is the host address where the response will be written when the
1256 * request is complete. This area must be 16B aligned and must be
1257 * cleared to zero before the request is made.
1260 } __attribute__((packed));
1262 /* Output (8 bytes) */
1265 * Pass/Fail or error type Note: receiver to verify the in parameters,
1266 * and fail the call with an error when appropriate
1268 uint16_t error_code;
1270 /* This field returns the type of original request. */
1273 /* This field provides original sequence number of the command. */
1277 * This field is the length of the response in bytes. The last byte of
1278 * the response is a valid flag that will read as '1' when the command
1279 * has been completely written to memory.
1282 } __attribute__((packed));
1284 /* hwrm_cfa_l2_filter_alloc */
1286 * A filter is used to identify traffic that contains a matching set of
1287 * parameters like unicast or broadcast MAC address or a VLAN tag amongst
1288 * other things which then allows the ASIC to direct the incoming traffic
1289 * to an appropriate VNIC or Rx ring.
1292 /* Input (96 bytes) */
1293 struct hwrm_cfa_l2_filter_alloc_input {
1295 * This value indicates what type of request this is. The format for the
1296 * rest of the command is determined by this field.
1301 * This value indicates the what completion ring the request will be
1302 * optionally completed on. If the value is -1, then no CR completion
1303 * will be generated. Any other value must be a valid CR ring_id value
1304 * for this function.
1308 /* This value indicates the command sequence number. */
1312 * Target ID of this command. 0x0 - 0xFFF8 - Used for function ids
1313 * 0xFFF8 - 0xFFFE - Reserved for internal processors 0xFFFF - HWRM
1318 * This is the host address where the response will be written when the
1319 * request is complete. This area must be 16B aligned and must be
1320 * cleared to zero before the request is made.
1325 * Enumeration denoting the RX, TX type of the resource. This
1326 * enumeration is used for resources that are similar for both TX and RX
1327 * paths of the chip.
1329 #define HWRM_CFA_L2_FILTER_ALLOC_INPUT_FLAGS_PATH \
1332 #define HWRM_CFA_L2_FILTER_ALLOC_INPUT_FLAGS_PATH_TX \
1333 (UINT32_C(0x0) << 0)
1335 #define HWRM_CFA_L2_FILTER_ALLOC_INPUT_FLAGS_PATH_RX \
1336 (UINT32_C(0x1) << 0)
1337 #define HWRM_CFA_L2_FILTER_ALLOC_INPUT_FLAGS_PATH_LAST \
1338 HWRM_CFA_L2_FILTER_ALLOC_INPUT_FLAGS_PATH_RX
1340 * Setting of this flag indicates the applicability to the loopback
1343 #define HWRM_CFA_L2_FILTER_ALLOC_INPUT_FLAGS_LOOPBACK \
1346 * Setting of this flag indicates drop action. If this flag is not set,
1347 * then it should be considered accept action.
1349 #define HWRM_CFA_L2_FILTER_ALLOC_INPUT_FLAGS_DROP \
1352 * If this flag is set, all t_l2_* fields are invalid and they should
1353 * not be specified. If this flag is set, then l2_* fields refer to
1354 * fields of outermost L2 header.
1356 #define HWRM_CFA_L2_FILTER_ALLOC_INPUT_FLAGS_OUTERMOST \
1360 /* This bit must be '1' for the l2_addr field to be configured. */
1361 #define HWRM_CFA_L2_FILTER_ALLOC_INPUT_ENABLES_L2_ADDR \
1363 /* This bit must be '1' for the l2_addr_mask field to be configured. */
1364 #define HWRM_CFA_L2_FILTER_ALLOC_INPUT_ENABLES_L2_ADDR_MASK \
1366 /* This bit must be '1' for the l2_ovlan field to be configured. */
1367 #define HWRM_CFA_L2_FILTER_ALLOC_INPUT_ENABLES_L2_OVLAN \
1369 /* This bit must be '1' for the l2_ovlan_mask field to be configured. */
1370 #define HWRM_CFA_L2_FILTER_ALLOC_INPUT_ENABLES_L2_OVLAN_MASK \
1372 /* This bit must be '1' for the l2_ivlan field to be configured. */
1373 #define HWRM_CFA_L2_FILTER_ALLOC_INPUT_ENABLES_L2_IVLAN \
1375 /* This bit must be '1' for the l2_ivlan_mask field to be configured. */
1376 #define HWRM_CFA_L2_FILTER_ALLOC_INPUT_ENABLES_L2_IVLAN_MASK \
1378 /* This bit must be '1' for the t_l2_addr field to be configured. */
1379 #define HWRM_CFA_L2_FILTER_ALLOC_INPUT_ENABLES_T_L2_ADDR \
1382 * This bit must be '1' for the t_l2_addr_mask field to be configured.
1384 #define HWRM_CFA_L2_FILTER_ALLOC_INPUT_ENABLES_T_L2_ADDR_MASK \
1386 /* This bit must be '1' for the t_l2_ovlan field to be configured. */
1387 #define HWRM_CFA_L2_FILTER_ALLOC_INPUT_ENABLES_T_L2_OVLAN \
1390 * This bit must be '1' for the t_l2_ovlan_mask field to be configured.
1392 #define HWRM_CFA_L2_FILTER_ALLOC_INPUT_ENABLES_T_L2_OVLAN_MASK \
1394 /* This bit must be '1' for the t_l2_ivlan field to be configured. */
1395 #define HWRM_CFA_L2_FILTER_ALLOC_INPUT_ENABLES_T_L2_IVLAN \
1398 * This bit must be '1' for the t_l2_ivlan_mask field to be configured.
1400 #define HWRM_CFA_L2_FILTER_ALLOC_INPUT_ENABLES_T_L2_IVLAN_MASK \
1402 /* This bit must be '1' for the src_type field to be configured. */
1403 #define HWRM_CFA_L2_FILTER_ALLOC_INPUT_ENABLES_SRC_TYPE \
1405 /* This bit must be '1' for the src_id field to be configured. */
1406 #define HWRM_CFA_L2_FILTER_ALLOC_INPUT_ENABLES_SRC_ID \
1408 /* This bit must be '1' for the tunnel_type field to be configured. */
1409 #define HWRM_CFA_L2_FILTER_ALLOC_INPUT_ENABLES_TUNNEL_TYPE \
1411 /* This bit must be '1' for the dst_id field to be configured. */
1412 #define HWRM_CFA_L2_FILTER_ALLOC_INPUT_ENABLES_DST_ID \
1415 * This bit must be '1' for the mirror_vnic_id field to be configured.
1417 #define HWRM_CFA_L2_FILTER_ALLOC_INPUT_ENABLES_MIRROR_VNIC_ID \
1422 * This value sets the match value for the L2 MAC address. Destination
1423 * MAC address for RX path. Source MAC address for TX path.
1431 * This value sets the mask value for the L2 address. A value of 0 will
1432 * mask the corresponding bit from compare.
1434 uint8_t l2_addr_mask[6];
1436 /* This value sets VLAN ID value for outer VLAN. */
1440 * This value sets the mask value for the ovlan id. A value of 0 will
1441 * mask the corresponding bit from compare.
1443 uint16_t l2_ovlan_mask;
1445 /* This value sets VLAN ID value for inner VLAN. */
1449 * This value sets the mask value for the ivlan id. A value of 0 will
1450 * mask the corresponding bit from compare.
1452 uint16_t l2_ivlan_mask;
1458 * This value sets the match value for the tunnel L2 MAC address.
1459 * Destination MAC address for RX path. Source MAC address for TX path.
1461 uint8_t t_l2_addr[6];
1467 * This value sets the mask value for the tunnel L2 address. A value of
1468 * 0 will mask the corresponding bit from compare.
1470 uint8_t t_l2_addr_mask[6];
1472 /* This value sets VLAN ID value for tunnel outer VLAN. */
1473 uint16_t t_l2_ovlan;
1476 * This value sets the mask value for the tunnel ovlan id. A value of 0
1477 * will mask the corresponding bit from compare.
1479 uint16_t t_l2_ovlan_mask;
1481 /* This value sets VLAN ID value for tunnel inner VLAN. */
1482 uint16_t t_l2_ivlan;
1485 * This value sets the mask value for the tunnel ivlan id. A value of 0
1486 * will mask the corresponding bit from compare.
1488 uint16_t t_l2_ivlan_mask;
1490 /* This value identifies the type of source of the packet. */
1492 #define HWRM_CFA_L2_FILTER_ALLOC_INPUT_SRC_TYPE_NPORT \
1493 (UINT32_C(0x0) << 0)
1494 /* Physical function */
1495 #define HWRM_CFA_L2_FILTER_ALLOC_INPUT_SRC_TYPE_PF \
1496 (UINT32_C(0x1) << 0)
1497 /* Virtual function */
1498 #define HWRM_CFA_L2_FILTER_ALLOC_INPUT_SRC_TYPE_VF \
1499 (UINT32_C(0x2) << 0)
1500 /* Virtual NIC of a function */
1501 #define HWRM_CFA_L2_FILTER_ALLOC_INPUT_SRC_TYPE_VNIC \
1502 (UINT32_C(0x3) << 0)
1503 /* Embedded processor for CFA management */
1504 #define HWRM_CFA_L2_FILTER_ALLOC_INPUT_SRC_TYPE_KONG \
1505 (UINT32_C(0x4) << 0)
1506 /* Embedded processor for OOB management */
1507 #define HWRM_CFA_L2_FILTER_ALLOC_INPUT_SRC_TYPE_APE \
1508 (UINT32_C(0x5) << 0)
1509 /* Embedded processor for RoCE */
1510 #define HWRM_CFA_L2_FILTER_ALLOC_INPUT_SRC_TYPE_BONO \
1511 (UINT32_C(0x6) << 0)
1512 /* Embedded processor for network proxy functions */
1513 #define HWRM_CFA_L2_FILTER_ALLOC_INPUT_SRC_TYPE_TANG \
1514 (UINT32_C(0x7) << 0)
1519 * This value is the id of the source. For a network port, it represents
1520 * port_id. For a physical function, it represents fid. For a virtual
1521 * function, it represents vf_id. For a vnic, it represents vnic_id. For
1522 * embedded processors, this id is not valid. Notes: 1. The function ID
1523 * is implied if it src_id is not provided for a src_type that is either
1529 #define HWRM_CFA_L2_FILTER_ALLOC_INPUT_TUNNEL_TYPE_NONTUNNEL \
1530 (UINT32_C(0x0) << 0)
1531 /* Virtual eXtensible Local Area Network (VXLAN) */
1532 #define HWRM_CFA_L2_FILTER_ALLOC_INPUT_TUNNEL_TYPE_VXLAN \
1533 (UINT32_C(0x1) << 0)
1535 * Network Virtualization Generic Routing Encapsulation (NVGRE)
1537 #define HWRM_CFA_L2_FILTER_ALLOC_INPUT_TUNNEL_TYPE_NVGRE \
1538 (UINT32_C(0x2) << 0)
1540 * Generic Routing Encapsulation (GRE) inside Ethernet payload
1542 #define HWRM_CFA_L2_FILTER_ALLOC_INPUT_TUNNEL_TYPE_L2GRE \
1543 (UINT32_C(0x3) << 0)
1545 #define HWRM_CFA_L2_FILTER_ALLOC_INPUT_TUNNEL_TYPE_IPIP \
1546 (UINT32_C(0x4) << 0)
1547 /* Generic Network Virtualization Encapsulation (Geneve) */
1548 #define HWRM_CFA_L2_FILTER_ALLOC_INPUT_TUNNEL_TYPE_GENEVE \
1549 (UINT32_C(0x5) << 0)
1550 /* Multi-Protocol Lable Switching (MPLS) */
1551 #define HWRM_CFA_L2_FILTER_ALLOC_INPUT_TUNNEL_TYPE_MPLS \
1552 (UINT32_C(0x6) << 0)
1553 /* Stateless Transport Tunnel (STT) */
1554 #define HWRM_CFA_L2_FILTER_ALLOC_INPUT_TUNNEL_TYPE_STT \
1555 (UINT32_C(0x7) << 0)
1557 * Generic Routing Encapsulation (GRE) inside IP datagram
1560 #define HWRM_CFA_L2_FILTER_ALLOC_INPUT_TUNNEL_TYPE_IPGRE \
1561 (UINT32_C(0x8) << 0)
1562 /* Any tunneled traffic */
1563 #define HWRM_CFA_L2_FILTER_ALLOC_INPUT_TUNNEL_TYPE_ANYTUNNEL \
1564 (UINT32_C(0xff) << 0)
1565 uint8_t tunnel_type;
1570 * If set, this value shall represent the Logical VNIC ID of the
1571 * destination VNIC for the RX path and network port id of the
1572 * destination port for the TX path.
1576 /* Logical VNIC ID of the VNIC where traffic is mirrored. */
1577 uint16_t mirror_vnic_id;
1580 * This hint is provided to help in placing the filter in the filter
1584 #define HWRM_CFA_L2_FILTER_ALLOC_INPUT_PRI_HINT_NO_PREFER \
1585 (UINT32_C(0x0) << 0)
1586 /* Above the given filter */
1587 #define HWRM_CFA_L2_FILTER_ALLOC_INPUT_PRI_HINT_ABOVE_FILTER \
1588 (UINT32_C(0x1) << 0)
1589 /* Below the given filter */
1590 #define HWRM_CFA_L2_FILTER_ALLOC_INPUT_PRI_HINT_BELOW_FILTER \
1591 (UINT32_C(0x2) << 0)
1592 /* As high as possible */
1593 #define HWRM_CFA_L2_FILTER_ALLOC_INPUT_PRI_HINT_MAX \
1594 (UINT32_C(0x3) << 0)
1595 /* As low as possible */
1596 #define HWRM_CFA_L2_FILTER_ALLOC_INPUT_PRI_HINT_MIN \
1597 (UINT32_C(0x4) << 0)
1604 * This is the ID of the filter that goes along with the pri_hint. This
1605 * field is valid only for the following values. 1 - Above the given
1606 * filter 2 - Below the given filter
1608 uint64_t l2_filter_id_hint;
1609 } __attribute__((packed));
1611 /* Output (24 bytes) */
1612 struct hwrm_cfa_l2_filter_alloc_output {
1614 * Pass/Fail or error type Note: receiver to verify the in parameters,
1615 * and fail the call with an error when appropriate
1617 uint16_t error_code;
1619 /* This field returns the type of original request. */
1622 /* This field provides original sequence number of the command. */
1626 * This field is the length of the response in bytes. The last byte of
1627 * the response is a valid flag that will read as '1' when the command
1628 * has been completely written to memory.
1633 * This value identifies a set of CFA data structures used for an L2
1636 uint64_t l2_filter_id;
1639 * This is the ID of the flow associated with this filter. This value
1640 * shall be used to match and associate the flow identifier returned in
1641 * completion records. A value of 0xFFFFFFFF shall indicate no flow id.
1650 * This field is used in Output records to indicate that the output is
1651 * completely written to RAM. This field should be read as '1' to
1652 * indicate that the output has been completely written. When writing a
1653 * command completion or response to an internal processor, the order of
1654 * writes has to be such that this field is written last.
1657 } __attribute__((packed));
1659 /* hwrm_cfa_l2_filter_free */
1661 * Description: Free a L2 filter. The HWRM shall free all associated filter
1662 * resources with the L2 filter.
1665 /* Input (24 bytes) */
1666 struct hwrm_cfa_l2_filter_free_input {
1668 * This value indicates what type of request this is. The format for the
1669 * rest of the command is determined by this field.
1674 * This value indicates the what completion ring the request will be
1675 * optionally completed on. If the value is -1, then no CR completion
1676 * will be generated. Any other value must be a valid CR ring_id value
1677 * for this function.
1681 /* This value indicates the command sequence number. */
1685 * Target ID of this command. 0x0 - 0xFFF8 - Used for function ids
1686 * 0xFFF8 - 0xFFFE - Reserved for internal processors 0xFFFF - HWRM
1691 * This is the host address where the response will be written when the
1692 * request is complete. This area must be 16B aligned and must be
1693 * cleared to zero before the request is made.
1698 * This value identifies a set of CFA data structures used for an L2
1701 uint64_t l2_filter_id;
1702 } __attribute__((packed));
1704 /* Output (16 bytes) */
1705 struct hwrm_cfa_l2_filter_free_output {
1707 * Pass/Fail or error type Note: receiver to verify the in parameters,
1708 * and fail the call with an error when appropriate
1710 uint16_t error_code;
1712 /* This field returns the type of original request. */
1715 /* This field provides original sequence number of the command. */
1719 * This field is the length of the response in bytes. The last byte of
1720 * the response is a valid flag that will read as '1' when the command
1721 * has been completely written to memory.
1731 * This field is used in Output records to indicate that the output is
1732 * completely written to RAM. This field should be read as '1' to
1733 * indicate that the output has been completely written. When writing a
1734 * command completion or response to an internal processor, the order of
1735 * writes has to be such that this field is written last.
1738 } __attribute__((packed));
1740 /* hwrm_cfa_l2_set_rx_mask */
1741 /* Description: This command will set rx mask of the function. */
1743 /* Input (40 bytes) */
1744 struct hwrm_cfa_l2_set_rx_mask_input {
1746 * This value indicates what type of request this is. The format for the
1747 * rest of the command is determined by this field.
1752 * This value indicates the what completion ring the request will be
1753 * optionally completed on. If the value is -1, then no CR completion
1754 * will be generated. Any other value must be a valid CR ring_id value
1755 * for this function.
1759 /* This value indicates the command sequence number. */
1763 * Target ID of this command. 0x0 - 0xFFF8 - Used for function ids
1764 * 0xFFF8 - 0xFFFE - Reserved for internal processors 0xFFFF - HWRM
1769 * This is the host address where the response will be written when the
1770 * request is complete. This area must be 16B aligned and must be
1771 * cleared to zero before the request is made.
1778 /* Reserved for future use. */
1779 #define HWRM_CFA_L2_SET_RX_MASK_INPUT_MASK_RESERVED UINT32_C(0x1)
1781 * When this bit is '1', the function is requested to accept multi-cast
1782 * packets specified by the multicast addr table.
1784 #define HWRM_CFA_L2_SET_RX_MASK_INPUT_MASK_MCAST UINT32_C(0x2)
1786 * When this bit is '1', the function is requested to accept all multi-
1789 #define HWRM_CFA_L2_SET_RX_MASK_INPUT_MASK_ALL_MCAST UINT32_C(0x4)
1791 * When this bit is '1', the function is requested to accept broadcast
1794 #define HWRM_CFA_L2_SET_RX_MASK_INPUT_MASK_BCAST UINT32_C(0x8)
1796 * When this bit is '1', the function is requested to be put in the
1797 * promiscuous mode. The HWRM should accept any function to set up
1798 * promiscuous mode. The HWRM shall follow the semantics below for the
1799 * promiscuous mode support. # When partitioning is not enabled on a
1800 * port (i.e. single PF on the port), then the PF shall be allowed to be
1801 * in the promiscuous mode. When the PF is in the promiscuous mode, then
1802 * it shall receive all host bound traffic on that port. # When
1803 * partitioning is enabled on a port (i.e. multiple PFs per port) and a
1804 * PF on that port is in the promiscuous mode, then the PF receives all
1805 * traffic within that partition as identified by a unique identifier
1806 * for the PF (e.g. S-Tag). If a unique outer VLAN for the PF is
1807 * specified, then the setting of promiscuous mode on that PF shall
1808 * result in the PF receiving all host bound traffic with matching outer
1809 * VLAN. # A VF shall can be set in the promiscuous mode. In the
1810 * promiscuous mode, the VF does not receive any traffic unless a unique
1811 * outer VLAN for the VF is specified. If a unique outer VLAN for the VF
1812 * is specified, then the setting of promiscuous mode on that VF shall
1813 * result in the VF receiving all host bound traffic with the matching
1814 * outer VLAN. # The HWRM shall allow the setting of promiscuous mode on
1815 * a function independently from the promiscuous mode settings on other
1818 #define HWRM_CFA_L2_SET_RX_MASK_INPUT_MASK_PROMISCUOUS UINT32_C(0x10)
1820 * If this flag is set, the corresponding RX filters shall be set up to
1821 * cover multicast/broadcast filters for the outermost Layer 2
1822 * destination MAC address field.
1824 #define HWRM_CFA_L2_SET_RX_MASK_INPUT_MASK_OUTERMOST UINT32_C(0x20)
1827 /* This is the address for mcast address tbl. */
1828 uint64_t mc_tbl_addr;
1831 * This value indicates how many entries in mc_tbl are valid. Each entry
1834 uint32_t num_mc_entries;
1837 } __attribute__((packed));
1839 /* Output (16 bytes) */
1840 struct hwrm_cfa_l2_set_rx_mask_output {
1842 * Pass/Fail or error type Note: receiver to verify the in parameters,
1843 * and fail the call with an error when appropriate
1845 uint16_t error_code;
1847 /* This field returns the type of original request. */
1850 /* This field provides original sequence number of the command. */
1854 * This field is the length of the response in bytes. The last byte of
1855 * the response is a valid flag that will read as '1' when the command
1856 * has been completely written to memory.
1866 * This field is used in Output records to indicate that the output is
1867 * completely written to RAM. This field should be read as '1' to
1868 * indicate that the output has been completely written. When writing a
1869 * command completion or response to an internal processor, the order of
1870 * writes has to be such that this field is written last.
1873 } __attribute__((packed));
1875 /* hwrm_exec_fwd_resp */
1877 * Description: This command is used to send an encapsulated request to the
1878 * HWRM. This command instructs the HWRM to execute the request and forward the
1879 * response of the encapsulated request to the location specified in the
1880 * original request that is encapsulated. The target id of this command shall be
1881 * set to 0xFFFF (HWRM). The response location in this command shall be used to
1882 * acknowledge the receipt of the encapsulated request and forwarding of the
1886 /* Input (128 bytes) */
1887 struct hwrm_exec_fwd_resp_input {
1889 * This value indicates what type of request this is. The format for the
1890 * rest of the command is determined by this field.
1895 * This value indicates the what completion ring the request will be
1896 * optionally completed on. If the value is -1, then no CR completion
1897 * will be generated. Any other value must be a valid CR ring_id value
1898 * for this function.
1902 /* This value indicates the command sequence number. */
1906 * Target ID of this command. 0x0 - 0xFFF8 - Used for function ids
1907 * 0xFFF8 - 0xFFFE - Reserved for internal processors 0xFFFF - HWRM
1912 * This is the host address where the response will be written when the
1913 * request is complete. This area must be 16B aligned and must be
1914 * cleared to zero before the request is made.
1919 * This is an encapsulated request. This request should be executed by
1920 * the HWRM and the response should be provided in the response buffer
1921 * inside the encapsulated request.
1923 uint32_t encap_request[26];
1926 * This value indicates the target id of the response to the
1927 * encapsulated request. 0x0 - 0xFFF8 - Used for function ids 0xFFF8 -
1928 * 0xFFFE - Reserved for internal processors 0xFFFF - HWRM
1930 uint16_t encap_resp_target_id;
1932 uint16_t unused_0[3];
1933 } __attribute__((packed));
1935 /* Output (16 bytes) */
1936 struct hwrm_exec_fwd_resp_output {
1938 * Pass/Fail or error type Note: receiver to verify the in parameters,
1939 * and fail the call with an error when appropriate
1941 uint16_t error_code;
1943 /* This field returns the type of original request. */
1946 /* This field provides original sequence number of the command. */
1950 * This field is the length of the response in bytes. The last byte of
1951 * the response is a valid flag that will read as '1' when the command
1952 * has been completely written to memory.
1962 * This field is used in Output records to indicate that the output is
1963 * completely written to RAM. This field should be read as '1' to
1964 * indicate that the output has been completely written. When writing a
1965 * command completion or response to an internal processor, the order of
1966 * writes has to be such that this field is written last.
1969 } __attribute__((packed));
1971 /* hwrm_func_qcaps */
1973 * Description: This command returns capabilities of a function. The input FID
1974 * value is used to indicate what function is being queried. This allows a
1975 * physical function driver to query virtual functions that are children of the
1976 * physical function. The output FID value is needed to configure Rings and
1977 * MSI-X vectors so their DMA operations appear correctly on the PCI bus.
1980 /* Input (24 bytes) */
1981 struct hwrm_func_qcaps_input {
1983 * This value indicates what type of request this is. The format for the
1984 * rest of the command is determined by this field.
1989 * This value indicates the what completion ring the request will be
1990 * optionally completed on. If the value is -1, then no CR completion
1991 * will be generated. Any other value must be a valid CR ring_id value
1992 * for this function.
1996 /* This value indicates the command sequence number. */
2000 * Target ID of this command. 0x0 - 0xFFF8 - Used for function ids
2001 * 0xFFF8 - 0xFFFE - Reserved for internal processors 0xFFFF - HWRM
2006 * This is the host address where the response will be written when the
2007 * request is complete. This area must be 16B aligned and must be
2008 * cleared to zero before the request is made.
2013 * Function ID of the function that is being queried. 0xFF... (All Fs)
2014 * if the query is for the requesting function.
2018 uint16_t unused_0[3];
2019 } __attribute__((packed));
2021 /* Output (80 bytes) */
2022 struct hwrm_func_qcaps_output {
2024 * Pass/Fail or error type Note: receiver to verify the in parameters,
2025 * and fail the call with an error when appropriate
2027 uint16_t error_code;
2029 /* This field returns the type of original request. */
2032 /* This field provides original sequence number of the command. */
2036 * This field is the length of the response in bytes. The last byte of
2037 * the response is a valid flag that will read as '1' when the command
2038 * has been completely written to memory.
2043 * FID value. This value is used to identify operations on the PCI bus
2044 * as belonging to a particular PCI function.
2049 * Port ID of port that this function is associated with. Valid only for
2050 * the PF. 0xFF... (All Fs) if this function is not associated with any
2051 * port. 0xFF... (All Fs) if this function is called from a VF.
2055 /* If 1, then Push mode is supported on this function. */
2056 #define HWRM_FUNC_QCAPS_OUTPUT_FLAGS_PUSH_MODE_SUPPORTED UINT32_C(0x1)
2058 * If 1, then the global MSI-X auto-masking is enabled for the device.
2060 #define HWRM_FUNC_QCAPS_OUTPUT_FLAGS_GLOBAL_MSIX_AUTOMASKING \
2063 * If 1, then the Precision Time Protocol (PTP) processing is supported
2064 * on this function. The HWRM should enable PTP on only a single
2065 * Physical Function (PF) per port.
2067 #define HWRM_FUNC_QCAPS_OUTPUT_FLAGS_PTP_SUPPORTED UINT32_C(0x4)
2071 * This value is current MAC address configured for this function. A
2072 * value of 00-00-00-00-00-00 indicates no MAC address is currently
2075 uint8_t perm_mac_address[6];
2078 * The maximum number of RSS/COS contexts that can be allocated to the
2081 uint16_t max_rsscos_ctx;
2084 * The maximum number of completion rings that can be allocated to the
2087 uint16_t max_cmpl_rings;
2090 * The maximum number of transmit rings that can be allocated to the
2093 uint16_t max_tx_rings;
2096 * The maximum number of receive rings that can be allocated to the
2099 uint16_t max_rx_rings;
2102 * The maximum number of L2 contexts that can be allocated to the
2105 uint16_t max_l2_ctxs;
2107 /* The maximum number of VNICs that can be allocated to the function. */
2111 * The identifier for the first VF enabled on a PF. This is valid only
2112 * on the PF with SR-IOV enabled. 0xFF... (All Fs) if this command is
2113 * called on a PF with SR-IOV disabled or on a VF.
2115 uint16_t first_vf_id;
2118 * The maximum number of VFs that can be allocated to the function. This
2119 * is valid only on the PF with SR-IOV enabled. 0xFF... (All Fs) if this
2120 * command is called on a PF with SR-IOV disabled or on a VF.
2125 * The maximum number of statistic contexts that can be allocated to the
2128 uint16_t max_stat_ctx;
2131 * The maximum number of Encapsulation records that can be offloaded by
2134 uint32_t max_encap_records;
2137 * The maximum number of decapsulation records that can be offloaded by
2140 uint32_t max_decap_records;
2143 * The maximum number of Exact Match (EM) flows that can be offloaded by
2144 * this function on the TX side.
2146 uint32_t max_tx_em_flows;
2149 * The maximum number of Wildcard Match (WM) flows that can be offloaded
2150 * by this function on the TX side.
2152 uint32_t max_tx_wm_flows;
2155 * The maximum number of Exact Match (EM) flows that can be offloaded by
2156 * this function on the RX side.
2158 uint32_t max_rx_em_flows;
2161 * The maximum number of Wildcard Match (WM) flows that can be offloaded
2162 * by this function on the RX side.
2164 uint32_t max_rx_wm_flows;
2167 * The maximum number of multicast filters that can be supported by this
2168 * function on the RX side.
2170 uint32_t max_mcast_filters;
2173 * The maximum value of flow_id that can be supported in completion
2176 uint32_t max_flow_id;
2179 * The maximum number of HW ring groups that can be supported on this
2182 uint32_t max_hw_ring_grps;
2189 * This field is used in Output records to indicate that the output is
2190 * completely written to RAM. This field should be read as '1' to
2191 * indicate that the output has been completely written. When writing a
2192 * command completion or response to an internal processor, the order of
2193 * writes has to be such that this field is written last.
2196 } __attribute__((packed));
2198 /* hwrm_func_reset */
2200 * Description: This command resets a hardware function (PCIe function) and
2201 * frees any resources used by the function. This command shall be initiated by
2202 * the driver after an FLR has occurred to prepare the function for re-use. This
2203 * command may also be initiated by a driver prior to doing it's own
2204 * configuration. This command puts the function into the reset state. In the
2205 * reset state, global and port related features of the chip are not available.
2208 * Note: This command will reset a function that has already been disabled or
2209 * idled. The command returns all the resources owned by the function so a new
2210 * driver may allocate and configure resources normally.
2213 /* Input (24 bytes) */
2214 struct hwrm_func_reset_input {
2216 * This value indicates what type of request this is. The format for the
2217 * rest of the command is determined by this field.
2222 * This value indicates the what completion ring the request will be
2223 * optionally completed on. If the value is -1, then no CR completion
2224 * will be generated. Any other value must be a valid CR ring_id value
2225 * for this function.
2229 /* This value indicates the command sequence number. */
2233 * Target ID of this command. 0x0 - 0xFFF8 - Used for function ids
2234 * 0xFFF8 - 0xFFFE - Reserved for internal processors 0xFFFF - HWRM
2239 * This is the host address where the response will be written when the
2240 * request is complete. This area must be 16B aligned and must be
2241 * cleared to zero before the request is made.
2245 /* This bit must be '1' for the vf_id_valid field to be configured. */
2246 #define HWRM_FUNC_RESET_INPUT_ENABLES_VF_ID_VALID \
2251 * The ID of the VF that this PF is trying to reset. Only the parent PF
2252 * shall be allowed to reset a child VF. A parent PF driver shall use
2253 * this field only when a specific child VF is requested to be reset.
2257 /* This value indicates the level of a function reset. */
2259 * Reset the caller function and its children VFs (if any). If
2260 * no children functions exist, then reset the caller function
2263 #define HWRM_FUNC_RESET_INPUT_FUNC_RESET_LEVEL_RESETALL \
2264 (UINT32_C(0x0) << 0)
2265 /* Reset the caller function only */
2266 #define HWRM_FUNC_RESET_INPUT_FUNC_RESET_LEVEL_RESETME \
2267 (UINT32_C(0x1) << 0)
2269 * Reset all children VFs of the caller function driver if the
2270 * caller is a PF driver. It is an error to specify this level
2271 * by a VF driver. It is an error to specify this level by a PF
2272 * driver with no children VFs.
2274 #define HWRM_FUNC_RESET_INPUT_FUNC_RESET_LEVEL_RESETCHILDREN \
2275 (UINT32_C(0x2) << 0)
2277 * Reset a specific VF of the caller function driver if the
2278 * caller is the parent PF driver. It is an error to specify
2279 * this level by a VF driver. It is an error to specify this
2280 * level by a PF driver that is not the parent of the VF that is
2281 * being requested to reset.
2283 #define HWRM_FUNC_RESET_INPUT_FUNC_RESET_LEVEL_RESETVF \
2284 (UINT32_C(0x3) << 0)
2285 uint8_t func_reset_level;
2288 } __attribute__((packed));
2290 /* Output (16 bytes) */
2291 struct hwrm_func_reset_output {
2293 * Pass/Fail or error type Note: receiver to verify the in parameters,
2294 * and fail the call with an error when appropriate
2296 uint16_t error_code;
2298 /* This field returns the type of original request. */
2301 /* This field provides original sequence number of the command. */
2305 * This field is the length of the response in bytes. The last byte of
2306 * the response is a valid flag that will read as '1' when the command
2307 * has been completely written to memory.
2317 * This field is used in Output records to indicate that the output is
2318 * completely written to RAM. This field should be read as '1' to
2319 * indicate that the output has been completely written. When writing a
2320 * command completion or response to an internal processor, the order of
2321 * writes has to be such that this field is written last.
2324 } __attribute__((packed));
2326 /* hwrm_port_phy_cfg */
2328 * Description: This command configures the PHY device for the port. It allows
2329 * setting of the most generic settings for the PHY. The HWRM shall complete
2330 * this command as soon as PHY settings are configured. They may not be applied
2331 * when the command response is provided. A VF driver shall not be allowed to
2332 * configure PHY using this command. In a network partition mode, a PF driver
2333 * shall not be allowed to configure PHY using this command.
2336 /* Input (56 bytes) */
2337 struct hwrm_port_phy_cfg_input {
2339 * This value indicates what type of request this is. The format for the
2340 * rest of the command is determined by this field.
2345 * This value indicates the what completion ring the request will be
2346 * optionally completed on. If the value is -1, then no CR completion
2347 * will be generated. Any other value must be a valid CR ring_id value
2348 * for this function.
2352 /* This value indicates the command sequence number. */
2356 * Target ID of this command. 0x0 - 0xFFF8 - Used for function ids
2357 * 0xFFF8 - 0xFFFE - Reserved for internal processors 0xFFFF - HWRM
2362 * This is the host address where the response will be written when the
2363 * request is complete. This area must be 16B aligned and must be
2364 * cleared to zero before the request is made.
2369 * When this bit is set to '1', the PHY for the port shall be reset. #
2370 * If this bit is set to 1, then the HWRM shall reset the PHY after
2371 * applying PHY configuration changes specified in this command. # In
2372 * order to guarantee that PHY configuration changes specified in this
2373 * command take effect, the HWRM client should set this flag to 1. # If
2374 * this bit is not set to 1, then the HWRM may reset the PHY depending
2375 * on the current PHY configuration and settings specified in this
2378 #define HWRM_PORT_PHY_CFG_INPUT_FLAGS_RESET_PHY UINT32_C(0x1)
2380 * When this bit is set to '1', the link shall be forced to be taken
2381 * down. # When this bit is set to '1", all other command input settings
2382 * related to the link speed shall be ignored. Once the link state is
2383 * forced down, it can be explicitly cleared from that state by setting
2384 * this flag to '0'. # If this flag is set to '0', then the link shall
2385 * be cleared from forced down state if the link is in forced down
2386 * state. There may be conditions (e.g. out-of-band or sideband
2387 * configuration changes for the link) outside the scope of the HWRM
2388 * implementation that may clear forced down link state.
2390 #define HWRM_PORT_PHY_CFG_INPUT_FLAGS_FORCE_LINK_DOWN UINT32_C(0x2)
2392 * When this bit is set to '1', the link shall be forced to the
2393 * force_link_speed value. When this bit is set to '1', the HWRM client
2394 * should not enable any of the auto negotiation related fields
2395 * represented by auto_XXX fields in this command. When this bit is set
2396 * to '1' and the HWRM client has enabled a auto_XXX field in this
2397 * command, then the HWRM shall ignore the enabled auto_XXX field. When
2398 * this bit is set to zero, the link shall be allowed to autoneg.
2400 #define HWRM_PORT_PHY_CFG_INPUT_FLAGS_FORCE UINT32_C(0x4)
2402 * When this bit is set to '1', the auto-negotiation process shall be
2403 * restarted on the link.
2405 #define HWRM_PORT_PHY_CFG_INPUT_FLAGS_RESTART_AUTONEG UINT32_C(0x8)
2407 * When this bit is set to '1', Energy Efficient Ethernet (EEE) is
2408 * requested to be enabled on this link. If EEE is not supported on this
2409 * port, then this flag shall be ignored by the HWRM.
2411 #define HWRM_PORT_PHY_CFG_INPUT_FLAGS_EEE_ENABLE UINT32_C(0x10)
2413 * When this bit is set to '1', Energy Efficient Ethernet (EEE) is
2414 * requested to be disabled on this link. If EEE is not supported on
2415 * this port, then this flag shall be ignored by the HWRM.
2417 #define HWRM_PORT_PHY_CFG_INPUT_FLAGS_EEE_DISABLE UINT32_C(0x20)
2419 * When this bit is set to '1' and EEE is enabled on this link, then TX
2420 * LPI is requested to be enabled on the link. If EEE is not supported
2421 * on this port, then this flag shall be ignored by the HWRM. If EEE is
2422 * disabled on this port, then this flag shall be ignored by the HWRM.
2424 #define HWRM_PORT_PHY_CFG_INPUT_FLAGS_EEE_TX_LPI UINT32_C(0x40)
2427 /* This bit must be '1' for the auto_mode field to be configured. */
2428 #define HWRM_PORT_PHY_CFG_INPUT_ENABLES_AUTO_MODE UINT32_C(0x1)
2429 /* This bit must be '1' for the auto_duplex field to be configured. */
2430 #define HWRM_PORT_PHY_CFG_INPUT_ENABLES_AUTO_DUPLEX UINT32_C(0x2)
2431 /* This bit must be '1' for the auto_pause field to be configured. */
2432 #define HWRM_PORT_PHY_CFG_INPUT_ENABLES_AUTO_PAUSE UINT32_C(0x4)
2434 * This bit must be '1' for the auto_link_speed field to be configured.
2436 #define HWRM_PORT_PHY_CFG_INPUT_ENABLES_AUTO_LINK_SPEED UINT32_C(0x8)
2438 * This bit must be '1' for the auto_link_speed_mask field to be
2441 #define HWRM_PORT_PHY_CFG_INPUT_ENABLES_AUTO_LINK_SPEED_MASK \
2443 /* This bit must be '1' for the wirespeed field to be configured. */
2444 #define HWRM_PORT_PHY_CFG_INPUT_ENABLES_WIRESPEED UINT32_C(0x20)
2445 /* This bit must be '1' for the lpbk field to be configured. */
2446 #define HWRM_PORT_PHY_CFG_INPUT_ENABLES_LPBK UINT32_C(0x40)
2447 /* This bit must be '1' for the preemphasis field to be configured. */
2448 #define HWRM_PORT_PHY_CFG_INPUT_ENABLES_PREEMPHASIS UINT32_C(0x80)
2449 /* This bit must be '1' for the force_pause field to be configured. */
2450 #define HWRM_PORT_PHY_CFG_INPUT_ENABLES_FORCE_PAUSE UINT32_C(0x100)
2452 * This bit must be '1' for the eee_link_speed_mask field to be
2455 #define HWRM_PORT_PHY_CFG_INPUT_ENABLES_EEE_LINK_SPEED_MASK \
2457 /* This bit must be '1' for the tx_lpi_timer field to be configured. */
2458 #define HWRM_PORT_PHY_CFG_INPUT_ENABLES_TX_LPI_TIMER UINT32_C(0x400)
2461 /* Port ID of port that is to be configured. */
2465 * This is the speed that will be used if the force bit is '1'. If
2466 * unsupported speed is selected, an error will be generated.
2468 /* 100Mb link speed */
2469 #define HWRM_PORT_PHY_CFG_INPUT_FORCE_LINK_SPEED_100MB \
2470 (UINT32_C(0x1) << 0)
2471 /* 1Gb link speed */
2472 #define HWRM_PORT_PHY_CFG_INPUT_FORCE_LINK_SPEED_1GB \
2473 (UINT32_C(0xa) << 0)
2474 /* 2Gb link speed */
2475 #define HWRM_PORT_PHY_CFG_INPUT_FORCE_LINK_SPEED_2GB \
2476 (UINT32_C(0x14) << 0)
2477 /* 2.5Gb link speed */
2478 #define HWRM_PORT_PHY_CFG_INPUT_FORCE_LINK_SPEED_2_5GB \
2479 (UINT32_C(0x19) << 0)
2480 /* 10Gb link speed */
2481 #define HWRM_PORT_PHY_CFG_INPUT_FORCE_LINK_SPEED_10GB \
2482 (UINT32_C(0x64) << 0)
2483 /* 20Mb link speed */
2484 #define HWRM_PORT_PHY_CFG_INPUT_FORCE_LINK_SPEED_20GB \
2485 (UINT32_C(0xc8) << 0)
2486 /* 25Gb link speed */
2487 #define HWRM_PORT_PHY_CFG_INPUT_FORCE_LINK_SPEED_25GB \
2488 (UINT32_C(0xfa) << 0)
2489 /* 40Gb link speed */
2490 #define HWRM_PORT_PHY_CFG_INPUT_FORCE_LINK_SPEED_40GB \
2491 (UINT32_C(0x190) << 0)
2492 /* 50Gb link speed */
2493 #define HWRM_PORT_PHY_CFG_INPUT_FORCE_LINK_SPEED_50GB \
2494 (UINT32_C(0x1f4) << 0)
2495 /* 100Gb link speed */
2496 #define HWRM_PORT_PHY_CFG_INPUT_FORCE_LINK_SPEED_100GB \
2497 (UINT32_C(0x3e8) << 0)
2498 /* 10Mb link speed */
2499 #define HWRM_PORT_PHY_CFG_INPUT_FORCE_LINK_SPEED_10MB \
2500 (UINT32_C(0xffff) << 0)
2501 uint16_t force_link_speed;
2504 * This value is used to identify what autoneg mode is used when the
2505 * link speed is not being forced.
2508 * Disable autoneg or autoneg disabled. No speeds are selected.
2510 #define HWRM_PORT_PHY_CFG_INPUT_AUTO_MODE_NONE (UINT32_C(0x0) << 0)
2511 /* Select all possible speeds for autoneg mode. */
2512 #define HWRM_PORT_PHY_CFG_INPUT_AUTO_MODE_ALL_SPEEDS \
2513 (UINT32_C(0x1) << 0)
2515 * Select only the auto_link_speed speed for autoneg mode. This
2516 * mode has been DEPRECATED. An HWRM client should not use this
2519 #define HWRM_PORT_PHY_CFG_INPUT_AUTO_MODE_ONE_SPEED \
2520 (UINT32_C(0x2) << 0)
2522 * Select the auto_link_speed or any speed below that speed for
2523 * autoneg. This mode has been DEPRECATED. An HWRM client should
2524 * not use this mode.
2526 #define HWRM_PORT_PHY_CFG_INPUT_AUTO_MODE_ONE_OR_BELOW \
2527 (UINT32_C(0x3) << 0)
2529 * Select the speeds based on the corresponding link speed mask
2530 * value that is provided.
2532 #define HWRM_PORT_PHY_CFG_INPUT_AUTO_MODE_SPEED_MASK \
2533 (UINT32_C(0x4) << 0)
2537 * This is the duplex setting that will be used if the autoneg_mode is
2538 * "one_speed" or "one_or_below".
2540 /* Half Duplex will be requested. */
2541 #define HWRM_PORT_PHY_CFG_INPUT_AUTO_DUPLEX_HALF \
2542 (UINT32_C(0x0) << 0)
2543 /* Full duplex will be requested. */
2544 #define HWRM_PORT_PHY_CFG_INPUT_AUTO_DUPLEX_FULL \
2545 (UINT32_C(0x1) << 0)
2546 /* Both Half and Full dupex will be requested. */
2547 #define HWRM_PORT_PHY_CFG_INPUT_AUTO_DUPLEX_BOTH \
2548 (UINT32_C(0x2) << 0)
2549 uint8_t auto_duplex;
2552 * This value is used to configure the pause that will be used for
2553 * autonegotiation. Add text on the usage of auto_pause and force_pause.
2556 * When this bit is '1', Generation of tx pause messages has been
2557 * requested. Disabled otherwise.
2559 #define HWRM_PORT_PHY_CFG_INPUT_AUTO_PAUSE_TX UINT32_C(0x1)
2561 * When this bit is '1', Reception of rx pause messages has been
2562 * requested. Disabled otherwise.
2564 #define HWRM_PORT_PHY_CFG_INPUT_AUTO_PAUSE_RX UINT32_C(0x2)
2566 * When set to 1, the advertisement of pause is enabled. # When the
2567 * auto_mode is not set to none and this flag is set to 1, then the
2568 * auto_pause bits on this port are being advertised and autoneg pause
2569 * results are being interpreted. # When the auto_mode is not set to
2570 * none and this flag is set to 0, the pause is forced as indicated in
2571 * force_pause, and also advertised as auto_pause bits, but the autoneg
2572 * results are not interpreted since the pause configuration is being
2573 * forced. # When the auto_mode is set to none and this flag is set to
2574 * 1, auto_pause bits should be ignored and should be set to 0.
2576 #define HWRM_PORT_PHY_CFG_INPUT_AUTO_PAUSE_AUTONEG_PAUSE UINT32_C(0x4)
2582 * This is the speed that will be used if the autoneg_mode is
2583 * "one_speed" or "one_or_below". If an unsupported speed is selected,
2584 * an error will be generated.
2586 /* 100Mb link speed */
2587 #define HWRM_PORT_PHY_CFG_INPUT_AUTO_LINK_SPEED_100MB \
2588 (UINT32_C(0x1) << 0)
2589 /* 1Gb link speed */
2590 #define HWRM_PORT_PHY_CFG_INPUT_AUTO_LINK_SPEED_1GB \
2591 (UINT32_C(0xa) << 0)
2592 /* 2Gb link speed */
2593 #define HWRM_PORT_PHY_CFG_INPUT_AUTO_LINK_SPEED_2GB \
2594 (UINT32_C(0x14) << 0)
2595 /* 2.5Gb link speed */
2596 #define HWRM_PORT_PHY_CFG_INPUT_AUTO_LINK_SPEED_2_5GB \
2597 (UINT32_C(0x19) << 0)
2598 /* 10Gb link speed */
2599 #define HWRM_PORT_PHY_CFG_INPUT_AUTO_LINK_SPEED_10GB \
2600 (UINT32_C(0x64) << 0)
2601 /* 20Mb link speed */
2602 #define HWRM_PORT_PHY_CFG_INPUT_AUTO_LINK_SPEED_20GB \
2603 (UINT32_C(0xc8) << 0)
2604 /* 25Gb link speed */
2605 #define HWRM_PORT_PHY_CFG_INPUT_AUTO_LINK_SPEED_25GB \
2606 (UINT32_C(0xfa) << 0)
2607 /* 40Gb link speed */
2608 #define HWRM_PORT_PHY_CFG_INPUT_AUTO_LINK_SPEED_40GB \
2609 (UINT32_C(0x190) << 0)
2610 /* 50Gb link speed */
2611 #define HWRM_PORT_PHY_CFG_INPUT_AUTO_LINK_SPEED_50GB \
2612 (UINT32_C(0x1f4) << 0)
2613 /* 100Gb link speed */
2614 #define HWRM_PORT_PHY_CFG_INPUT_AUTO_LINK_SPEED_100GB \
2615 (UINT32_C(0x3e8) << 0)
2616 /* 10Mb link speed */
2617 #define HWRM_PORT_PHY_CFG_INPUT_AUTO_LINK_SPEED_10MB \
2618 (UINT32_C(0xffff) << 0)
2619 uint16_t auto_link_speed;
2622 * This is a mask of link speeds that will be used if autoneg_mode is
2623 * "mask". If unsupported speed is enabled an error will be generated.
2625 /* 100Mb link speed (Half-duplex) */
2626 #define HWRM_PORT_PHY_CFG_INPUT_AUTO_LINK_SPEED_MASK_100MBHD \
2628 /* 100Mb link speed (Full-duplex) */
2629 #define HWRM_PORT_PHY_CFG_INPUT_AUTO_LINK_SPEED_MASK_100MB \
2631 /* 1Gb link speed (Half-duplex) */
2632 #define HWRM_PORT_PHY_CFG_INPUT_AUTO_LINK_SPEED_MASK_1GBHD \
2634 /* 1Gb link speed (Full-duplex) */
2635 #define HWRM_PORT_PHY_CFG_INPUT_AUTO_LINK_SPEED_MASK_1GB \
2637 /* 2Gb link speed */
2638 #define HWRM_PORT_PHY_CFG_INPUT_AUTO_LINK_SPEED_MASK_2GB \
2640 /* 2.5Gb link speed */
2641 #define HWRM_PORT_PHY_CFG_INPUT_AUTO_LINK_SPEED_MASK_2_5GB \
2643 /* 10Gb link speed */
2644 #define HWRM_PORT_PHY_CFG_INPUT_AUTO_LINK_SPEED_MASK_10GB \
2646 /* 20Gb link speed */
2647 #define HWRM_PORT_PHY_CFG_INPUT_AUTO_LINK_SPEED_MASK_20GB \
2649 /* 25Gb link speed */
2650 #define HWRM_PORT_PHY_CFG_INPUT_AUTO_LINK_SPEED_MASK_25GB \
2652 /* 40Gb link speed */
2653 #define HWRM_PORT_PHY_CFG_INPUT_AUTO_LINK_SPEED_MASK_40GB \
2655 /* 50Gb link speed */
2656 #define HWRM_PORT_PHY_CFG_INPUT_AUTO_LINK_SPEED_MASK_50GB \
2658 /* 100Gb link speed */
2659 #define HWRM_PORT_PHY_CFG_INPUT_AUTO_LINK_SPEED_MASK_100GB \
2661 /* 10Mb link speed (Half-duplex) */
2662 #define HWRM_PORT_PHY_CFG_INPUT_AUTO_LINK_SPEED_MASK_10MBHD \
2664 /* 10Mb link speed (Full-duplex) */
2665 #define HWRM_PORT_PHY_CFG_INPUT_AUTO_LINK_SPEED_MASK_10MB \
2667 uint16_t auto_link_speed_mask;
2669 /* This value controls the wirespeed feature. */
2670 /* Wirespeed feature is disabled. */
2671 #define HWRM_PORT_PHY_CFG_INPUT_WIRESPEED_OFF (UINT32_C(0x0) << 0)
2672 /* Wirespeed feature is enabled. */
2673 #define HWRM_PORT_PHY_CFG_INPUT_WIRESPEED_ON (UINT32_C(0x1) << 0)
2676 /* This value controls the loopback setting for the PHY. */
2677 /* No loopback is selected. Normal operation. */
2678 #define HWRM_PORT_PHY_CFG_INPUT_LPBK_NONE (UINT32_C(0x0) << 0)
2680 * The HW will be configured with local loopback such that host
2681 * data is sent back to the host without modification.
2683 #define HWRM_PORT_PHY_CFG_INPUT_LPBK_LOCAL (UINT32_C(0x1) << 0)
2685 * The HW will be configured with remote loopback such that port
2686 * logic will send packets back out the transmitter that are
2689 #define HWRM_PORT_PHY_CFG_INPUT_LPBK_REMOTE (UINT32_C(0x2) << 0)
2693 * This value is used to configure the pause that will be used for force
2697 * When this bit is '1', Generation of tx pause messages is supported.
2698 * Disabled otherwise.
2700 #define HWRM_PORT_PHY_CFG_INPUT_FORCE_PAUSE_TX UINT32_C(0x1)
2702 * When this bit is '1', Reception of rx pause messages is supported.
2703 * Disabled otherwise.
2705 #define HWRM_PORT_PHY_CFG_INPUT_FORCE_PAUSE_RX UINT32_C(0x2)
2706 uint8_t force_pause;
2711 * This value controls the pre-emphasis to be used for the link. Driver
2712 * should not set this value (use enable.preemphasis = 0) unless driver
2713 * is sure of setting. Normally HWRM FW will determine proper pre-
2716 uint32_t preemphasis;
2719 * Setting for link speed mask that is used to advertise speeds during
2720 * autonegotiation when EEE is enabled. This field is valid only when
2721 * EEE is enabled. The speeds specified in this field shall be a subset
2722 * of speeds specified in auto_link_speed_mask. If EEE is enabled,then
2723 * at least one speed shall be provided in this mask.
2726 #define HWRM_PORT_PHY_CFG_INPUT_EEE_LINK_SPEED_MASK_RSVD1 UINT32_C(0x1)
2727 /* 100Mb link speed (Full-duplex) */
2728 #define HWRM_PORT_PHY_CFG_INPUT_EEE_LINK_SPEED_MASK_100MB UINT32_C(0x2)
2730 #define HWRM_PORT_PHY_CFG_INPUT_EEE_LINK_SPEED_MASK_RSVD2 UINT32_C(0x4)
2731 /* 1Gb link speed (Full-duplex) */
2732 #define HWRM_PORT_PHY_CFG_INPUT_EEE_LINK_SPEED_MASK_1GB UINT32_C(0x8)
2734 #define HWRM_PORT_PHY_CFG_INPUT_EEE_LINK_SPEED_MASK_RSVD3 \
2737 #define HWRM_PORT_PHY_CFG_INPUT_EEE_LINK_SPEED_MASK_RSVD4 \
2739 /* 10Gb link speed */
2740 #define HWRM_PORT_PHY_CFG_INPUT_EEE_LINK_SPEED_MASK_10GB \
2742 uint16_t eee_link_speed_mask;
2748 * Reuested setting of TX LPI timer in microseconds. This field is valid
2749 * only when EEE is enabled and TX LPI is enabled.
2751 #define HWRM_PORT_PHY_CFG_INPUT_TX_LPI_TIMER_MASK \
2753 #define HWRM_PORT_PHY_CFG_INPUT_TX_LPI_TIMER_SFT 0
2754 uint32_t tx_lpi_timer;
2757 } __attribute__((packed));
2759 /* Output (16 bytes) */
2760 struct hwrm_port_phy_cfg_output {
2762 * Pass/Fail or error type Note: receiver to verify the in parameters,
2763 * and fail the call with an error when appropriate
2765 uint16_t error_code;
2767 /* This field returns the type of original request. */
2770 /* This field provides original sequence number of the command. */
2774 * This field is the length of the response in bytes. The last byte of
2775 * the response is a valid flag that will read as '1' when the command
2776 * has been completely written to memory.
2786 * This field is used in Output records to indicate that the output is
2787 * completely written to RAM. This field should be read as '1' to
2788 * indicate that the output has been completely written. When writing a
2789 * command completion or response to an internal processor, the order of
2790 * writes has to be such that this field is written last.
2793 } __attribute__((packed));
2797 * Description: This function is called by a driver to determine the HWRM
2798 * interface version supported by the HWRM firmware, the version of HWRM
2799 * firmware implementation, the name of HWRM firmware, the versions of other
2800 * embedded firmwares, and the names of other embedded firmwares, etc. Any
2801 * interface or firmware version with major = 0, minor = 0, and update = 0 shall
2802 * be considered an invalid version.
2805 /* Input (24 bytes) */
2806 struct hwrm_ver_get_input {
2808 * This value indicates what type of request this is. The format for the
2809 * rest of the command is determined by this field.
2814 * This value indicates the what completion ring the request will be
2815 * optionally completed on. If the value is -1, then no CR completion
2816 * will be generated. Any other value must be a valid CR ring_id value
2817 * for this function.
2821 /* This value indicates the command sequence number. */
2825 * Target ID of this command. 0x0 - 0xFFF8 - Used for function ids
2826 * 0xFFF8 - 0xFFFE - Reserved for internal processors 0xFFFF - HWRM
2831 * This is the host address where the response will be written when the
2832 * request is complete. This area must be 16B aligned and must be
2833 * cleared to zero before the request is made.
2838 * This field represents the major version of HWRM interface
2839 * specification supported by the driver HWRM implementation. The
2840 * interface major version is intended to change only when non backward
2841 * compatible changes are made to the HWRM interface specification.
2843 uint8_t hwrm_intf_maj;
2846 * This field represents the minor version of HWRM interface
2847 * specification supported by the driver HWRM implementation. A change
2848 * in interface minor version is used to reflect significant backward
2849 * compatible modification to HWRM interface specification. This can be
2850 * due to addition or removal of functionality. HWRM interface
2851 * specifications with the same major version but different minor
2852 * versions are compatible.
2854 uint8_t hwrm_intf_min;
2857 * This field represents the update version of HWRM interface
2858 * specification supported by the driver HWRM implementation. The
2859 * interface update version is used to reflect minor changes or bug
2860 * fixes to a released HWRM interface specification.
2862 uint8_t hwrm_intf_upd;
2864 uint8_t unused_0[5];
2865 } __attribute__((packed));
2867 /* Output (128 bytes) */
2868 struct hwrm_ver_get_output {
2870 * Pass/Fail or error type Note: receiver to verify the in parameters,
2871 * and fail the call with an error when appropriate
2873 uint16_t error_code;
2875 /* This field returns the type of original request. */
2878 /* This field provides original sequence number of the command. */
2882 * This field is the length of the response in bytes. The last byte of
2883 * the response is a valid flag that will read as '1' when the command
2884 * has been completely written to memory.
2889 * This field represents the major version of HWRM interface
2890 * specification supported by the HWRM implementation. The interface
2891 * major version is intended to change only when non backward compatible
2892 * changes are made to the HWRM interface specification. A HWRM
2893 * implementation that is compliant with this specification shall
2894 * provide value of 1 in this field.
2896 uint8_t hwrm_intf_maj;
2899 * This field represents the minor version of HWRM interface
2900 * specification supported by the HWRM implementation. A change in
2901 * interface minor version is used to reflect significant backward
2902 * compatible modification to HWRM interface specification. This can be
2903 * due to addition or removal of functionality. HWRM interface
2904 * specifications with the same major version but different minor
2905 * versions are compatible. A HWRM implementation that is compliant with
2906 * this specification shall provide value of 0 in this field.
2908 uint8_t hwrm_intf_min;
2911 * This field represents the update version of HWRM interface
2912 * specification supported by the HWRM implementation. The interface
2913 * update version is used to reflect minor changes or bug fixes to a
2914 * released HWRM interface specification. A HWRM implementation that is
2915 * compliant with this specification shall provide value of 1 in this
2918 uint8_t hwrm_intf_upd;
2920 uint8_t hwrm_intf_rsvd;
2923 * This field represents the major version of HWRM firmware. A change in
2924 * firmware major version represents a major firmware release.
2926 uint8_t hwrm_fw_maj;
2929 * This field represents the minor version of HWRM firmware. A change in
2930 * firmware minor version represents significant firmware functionality
2933 uint8_t hwrm_fw_min;
2936 * This field represents the build version of HWRM firmware. A change in
2937 * firmware build version represents bug fixes to a released firmware.
2939 uint8_t hwrm_fw_bld;
2942 * This field is a reserved field. This field can be used to represent
2943 * firmware branches or customer specific releases tied to a specific
2944 * (major,minor,update) version of the HWRM firmware.
2946 uint8_t hwrm_fw_rsvd;
2949 * This field represents the major version of mgmt firmware. A change in
2950 * major version represents a major release.
2952 uint8_t mgmt_fw_maj;
2955 * This field represents the minor version of mgmt firmware. A change in
2956 * minor version represents significant functionality changes.
2958 uint8_t mgmt_fw_min;
2961 * This field represents the build version of mgmt firmware. A change in
2962 * update version represents bug fixes.
2964 uint8_t mgmt_fw_bld;
2967 * This field is a reserved field. This field can be used to represent
2968 * firmware branches or customer specific releases tied to a specific
2969 * (major,minor,update) version
2971 uint8_t mgmt_fw_rsvd;
2974 * This field represents the major version of network control firmware.
2975 * A change in major version represents a major release.
2977 uint8_t netctrl_fw_maj;
2980 * This field represents the minor version of network control firmware.
2981 * A change in minor version represents significant functionality
2984 uint8_t netctrl_fw_min;
2987 * This field represents the build version of network control firmware.
2988 * A change in update version represents bug fixes.
2990 uint8_t netctrl_fw_bld;
2993 * This field is a reserved field. This field can be used to represent
2994 * firmware branches or customer specific releases tied to a specific
2995 * (major,minor,update) version
2997 uint8_t netctrl_fw_rsvd;
3000 * This field is reserved for future use. The responder should set it to
3001 * 0. The requester should ignore this field.
3006 * This field represents the major version of RoCE firmware. A change in
3007 * major version represents a major release.
3009 uint8_t roce_fw_maj;
3012 * This field represents the minor version of RoCE firmware. A change in
3013 * minor version represents significant functionality changes.
3015 uint8_t roce_fw_min;
3018 * This field represents the build version of RoCE firmware. A change in
3019 * update version represents bug fixes.
3021 uint8_t roce_fw_bld;
3024 * This field is a reserved field. This field can be used to represent
3025 * firmware branches or customer specific releases tied to a specific
3026 * (major,minor,update) version
3028 uint8_t roce_fw_rsvd;
3031 * This field represents the name of HWRM FW (ASCII chars without NULL
3034 char hwrm_fw_name[16];
3037 * This field represents the name of mgmt FW (ASCII chars without NULL
3040 char mgmt_fw_name[16];
3043 * This field represents the name of network control firmware (ASCII
3044 * chars without NULL at the end).
3046 char netctrl_fw_name[16];
3049 * This field is reserved for future use. The responder should set it to
3050 * 0. The requester should ignore this field.
3052 uint32_t reserved2[4];
3055 * This field represents the name of RoCE FW (ASCII chars without NULL
3058 char roce_fw_name[16];
3060 /* This field returns the chip number. */
3063 /* This field returns the revision of chip. */
3066 /* This field returns the chip metal number. */
3069 /* This field returns the bond id of the chip. */
3070 uint8_t chip_bond_id;
3073 * This value indicates the type of platform used for chip
3077 #define HWRM_VER_GET_OUTPUT_CHIP_PLATFORM_TYPE_ASIC \
3078 (UINT32_C(0x0) << 0)
3079 /* FPGA platform of the chip. */
3080 #define HWRM_VER_GET_OUTPUT_CHIP_PLATFORM_TYPE_FPGA \
3081 (UINT32_C(0x1) << 0)
3082 /* Palladium platform of the chip. */
3083 #define HWRM_VER_GET_OUTPUT_CHIP_PLATFORM_TYPE_PALLADIUM \
3084 (UINT32_C(0x2) << 0)
3085 uint8_t chip_platform_type;
3088 * This field returns the maximum value of request window that is
3089 * supported by the HWRM. The request window is mapped into device
3090 * address space using MMIO.
3092 uint16_t max_req_win_len;
3095 * This field returns the maximum value of response buffer in bytes. If
3096 * a request specifies the response buffer length that is greater than
3097 * this value, then the HWRM should fail it. The value of this field
3098 * shall be 4KB or more.
3100 uint16_t max_resp_len;
3103 * This field returns the default request timeout value in milliseconds.
3105 uint16_t def_req_timeout;
3112 * This field is used in Output records to indicate that the output is
3113 * completely written to RAM. This field should be read as '1' to
3114 * indicate that the output has been completely written. When writing a
3115 * command completion or response to an internal processor, the order of
3116 * writes has to be such that this field is written last.
3119 } __attribute__((packed));
3121 /* hwrm_queue_qportcfg */
3123 * Description: This function is called by a driver to query queue configuration
3124 * of a port. # The HWRM shall at least advertise one queue with lossy service
3125 * profile. # The driver shall use this command to query queue ids before
3126 * configuring or using any queues. # If a service profile is not set for a
3127 * queue, then the driver shall not use that queue without configuring a service
3128 * profile for it. # If the driver is not allowed to configure service profiles,
3129 * then the driver shall only use queues for which service profiles are pre-
3133 /* Input (24 bytes) */
3134 struct hwrm_queue_qportcfg_input {
3136 * This value indicates what type of request this is. The format for the
3137 * rest of the command is determined by this field.
3142 * This value indicates the what completion ring the request will be
3143 * optionally completed on. If the value is -1, then no CR completion
3144 * will be generated. Any other value must be a valid CR ring_id value
3145 * for this function.
3149 /* This value indicates the command sequence number. */
3153 * Target ID of this command. 0x0 - 0xFFF8 - Used for function ids
3154 * 0xFFF8 - 0xFFFE - Reserved for internal processors 0xFFFF - HWRM
3159 * This is the host address where the response will be written when the
3160 * request is complete. This area must be 16B aligned and must be
3161 * cleared to zero before the request is made.
3166 * Enumeration denoting the RX, TX type of the resource. This
3167 * enumeration is used for resources that are similar for both TX and RX
3168 * paths of the chip.
3170 #define HWRM_QUEUE_QPORTCFG_INPUT_FLAGS_PATH \
3173 #define HWRM_QUEUE_QPORTCFG_INPUT_FLAGS_PATH_TX \
3174 (UINT32_C(0x0) << 0)
3176 #define HWRM_QUEUE_QPORTCFG_INPUT_FLAGS_PATH_RX \
3177 (UINT32_C(0x1) << 0)
3178 #define HWRM_QUEUE_QPORTCFG_INPUT_FLAGS_PATH_LAST \
3179 HWRM_QUEUE_QPORTCFG_INPUT_FLAGS_PATH_RX
3183 * Port ID of port for which the queue configuration is being queried.
3184 * This field is only required when sent by IPC.
3189 } __attribute__((packed));
3191 /* hwrm_ring_alloc */
3193 * Description: This command allocates and does basic preparation for a ring.
3196 /* Input (80 bytes) */
3197 struct hwrm_ring_alloc_input {
3199 * This value indicates what type of request this is. The format for the
3200 * rest of the command is determined by this field.
3205 * This value indicates the what completion ring the request will be
3206 * optionally completed on. If the value is -1, then no CR completion
3207 * will be generated. Any other value must be a valid CR ring_id value
3208 * for this function.
3212 /* This value indicates the command sequence number. */
3216 * Target ID of this command. 0x0 - 0xFFF8 - Used for function ids
3217 * 0xFFF8 - 0xFFFE - Reserved for internal processors 0xFFFF - HWRM
3222 * This is the host address where the response will be written when the
3223 * request is complete. This area must be 16B aligned and must be
3224 * cleared to zero before the request is made.
3228 /* This bit must be '1' for the Reserved1 field to be configured. */
3229 #define HWRM_RING_ALLOC_INPUT_ENABLES_RESERVED1 UINT32_C(0x1)
3230 /* This bit must be '1' for the Reserved2 field to be configured. */
3231 #define HWRM_RING_ALLOC_INPUT_ENABLES_RESERVED2 UINT32_C(0x2)
3232 /* This bit must be '1' for the Reserved3 field to be configured. */
3233 #define HWRM_RING_ALLOC_INPUT_ENABLES_RESERVED3 UINT32_C(0x4)
3235 * This bit must be '1' for the stat_ctx_id_valid field to be
3238 #define HWRM_RING_ALLOC_INPUT_ENABLES_STAT_CTX_ID_VALID UINT32_C(0x8)
3239 /* This bit must be '1' for the Reserved4 field to be configured. */
3240 #define HWRM_RING_ALLOC_INPUT_ENABLES_RESERVED4 UINT32_C(0x10)
3241 /* This bit must be '1' for the max_bw_valid field to be configured. */
3242 #define HWRM_RING_ALLOC_INPUT_ENABLES_MAX_BW_VALID UINT32_C(0x20)
3246 /* Completion Ring (CR) */
3247 #define HWRM_RING_ALLOC_INPUT_RING_TYPE_CMPL (UINT32_C(0x0) << 0)
3249 #define HWRM_RING_ALLOC_INPUT_RING_TYPE_TX (UINT32_C(0x1) << 0)
3251 #define HWRM_RING_ALLOC_INPUT_RING_TYPE_RX (UINT32_C(0x2) << 0)
3257 /* This value is a pointer to the page table for the Ring. */
3258 uint64_t page_tbl_addr;
3260 /* First Byte Offset of the first entry in the first page. */
3264 * Actual page size in 2^page_size. The supported range is increments in
3265 * powers of 2 from 16 bytes to 1GB. - 4 = 16 B Page size is 16 B. - 12
3266 * = 4 KB Page size is 4 KB. - 13 = 8 KB Page size is 8 KB. - 16 = 64 KB
3267 * Page size is 64 KB. - 22 = 2 MB Page size is 2 MB. - 23 = 4 MB Page
3268 * size is 4 MB. - 31 = 1 GB Page size is 1 GB.
3273 * This value indicates the depth of page table. For this version of the
3274 * specification, value other than 0 or 1 shall be considered as an
3275 * invalid value. When the page_tbl_depth = 0, then it is treated as a
3276 * special case with the following. 1. FBO and page size fields are not
3277 * valid. 2. page_tbl_addr is the physical address of the first element
3280 uint8_t page_tbl_depth;
3286 * Number of 16B units in the ring. Minimum size for a ring is 16 16B
3292 * Logical ring number for the ring to be allocated. This value
3293 * determines the position in the doorbell area where the update to the
3294 * ring will be made. For completion rings, this value is also the MSI-X
3295 * vector number for the function the completion ring is associated
3298 uint16_t logical_id;
3301 * This field is used only when ring_type is a TX ring. This value
3302 * indicates what completion ring the TX ring is associated with.
3304 uint16_t cmpl_ring_id;
3307 * This field is used only when ring_type is a TX ring. This value
3308 * indicates what CoS queue the TX ring is associated with.
3315 /* This field is reserved for the future use. It shall be set to 0. */
3317 /* This field is reserved for the future use. It shall be set to 0. */
3322 /* This field is reserved for the future use. It shall be set to 0. */
3326 * This field is used only when ring_type is a TX ring. This input
3327 * indicates what statistics context this ring should be associated
3330 uint32_t stat_ctx_id;
3332 /* This field is reserved for the future use. It shall be set to 0. */
3336 * This field is used only when ring_type is a TX ring. Maximum BW
3337 * allocated to this TX ring in Mbps. The HWRM will translate this value
3338 * into byte counter and time interval used for this ring inside the
3344 * This field is used only when ring_type is a Completion ring. This
3345 * value indicates what interrupt mode should be used on this completion
3346 * ring. Note: In the legacy interrupt mode, no more than 16 completion
3347 * rings are allowed.
3350 #define HWRM_RING_ALLOC_INPUT_INT_MODE_LEGACY (UINT32_C(0x0) << 0)
3352 #define HWRM_RING_ALLOC_INPUT_INT_MODE_RSVD (UINT32_C(0x1) << 0)
3354 #define HWRM_RING_ALLOC_INPUT_INT_MODE_MSIX (UINT32_C(0x2) << 0)
3355 /* No Interrupt - Polled mode */
3356 #define HWRM_RING_ALLOC_INPUT_INT_MODE_POLL (UINT32_C(0x3) << 0)
3359 uint8_t unused_8[3];
3360 } __attribute__((packed));
3362 /* Output (16 bytes) */
3364 struct hwrm_ring_alloc_output {
3366 * Pass/Fail or error type Note: receiver to verify the in parameters,
3367 * and fail the call with an error when appropriate
3369 uint16_t error_code;
3371 /* This field returns the type of original request. */
3374 /* This field provides original sequence number of the command. */
3378 * This field is the length of the response in bytes. The last byte of
3379 * the response is a valid flag that will read as '1' when the command
3380 * has been completely written to memory.
3384 /* Physical number of ring allocated. */
3387 /* Logical number of ring allocated. */
3388 uint16_t logical_ring_id;
3395 * This field is used in Output records to indicate that the output is
3396 * completely written to RAM. This field should be read as '1' to
3397 * indicate that the output has been completely written. When writing a
3398 * command completion or response to an internal processor, the order of
3399 * writes has to be such that this field is written last.
3402 } __attribute__((packed));
3404 /* hwrm_ring_free */
3406 * Description: This command is used to free a ring and associated resources.
3408 /* Input (24 bytes) */
3410 struct hwrm_ring_free_input {
3412 * This value indicates what type of request this is. The format for the
3413 * rest of the command is determined by this field.
3418 * This value indicates the what completion ring the request will be
3419 * optionally completed on. If the value is -1, then no CR completion
3420 * will be generated. Any other value must be a valid CR ring_id value
3421 * for this function.
3425 /* This value indicates the command sequence number. */
3429 * Target ID of this command. 0x0 - 0xFFF8 - Used for function ids
3430 * 0xFFF8 - 0xFFFE - Reserved for internal processors 0xFFFF - HWRM
3435 * This is the host address where the response will be written when the
3436 * request is complete. This area must be 16B aligned and must be
3437 * cleared to zero before the request is made.
3442 /* Completion Ring (CR) */
3443 #define HWRM_RING_FREE_INPUT_RING_TYPE_CMPL (UINT32_C(0x0) << 0)
3445 #define HWRM_RING_FREE_INPUT_RING_TYPE_TX (UINT32_C(0x1) << 0)
3447 #define HWRM_RING_FREE_INPUT_RING_TYPE_RX (UINT32_C(0x2) << 0)
3452 /* Physical number of ring allocated. */
3456 } __attribute__((packed));
3458 /* Output (16 bytes) */
3459 struct hwrm_ring_free_output {
3461 * Pass/Fail or error type Note: receiver to verify the in parameters,
3462 * and fail the call with an error when appropriate
3464 uint16_t error_code;
3466 /* This field returns the type of original request. */
3469 /* This field provides original sequence number of the command. */
3473 * This field is the length of the response in bytes. The last byte of
3474 * the response is a valid flag that will read as '1' when the command
3475 * has been completely written to memory.
3485 * This field is used in Output records to indicate that the output is
3486 * completely written to RAM. This field should be read as '1' to
3487 * indicate that the output has been completely written. When writing a
3488 * command completion or response to an internal processor, the order of
3489 * writes has to be such that this field is written last.
3492 } __attribute__((packed));
3494 /* hwrm_ring_grp_alloc */
3496 * Description: This API allocates and does basic preparation for a ring group.
3499 /* Input (24 bytes) */
3500 struct hwrm_ring_grp_alloc_input {
3502 * This value indicates what type of request this is. The format for the
3503 * rest of the command is determined by this field.
3508 * This value indicates the what completion ring the request will be
3509 * optionally completed on. If the value is -1, then no CR completion
3510 * will be generated. Any other value must be a valid CR ring_id value
3511 * for this function.
3515 /* This value indicates the command sequence number. */
3519 * Target ID of this command. 0x0 - 0xFFF8 - Used for function ids
3520 * 0xFFF8 - 0xFFFE - Reserved for internal processors 0xFFFF - HWRM
3525 * This is the host address where the response will be written when the
3526 * request is complete. This area must be 16B aligned and must be
3527 * cleared to zero before the request is made.
3531 /* This value identifies the CR associated with the ring group. */
3534 /* This value identifies the main RR associated with the ring group. */
3538 * This value identifies the aggregation RR associated with the ring
3539 * group. If this value is 0xFF... (All Fs), then no Aggregation ring
3545 * This value identifies the statistics context associated with the ring
3549 } __attribute__((packed));
3551 /* Output (16 bytes) */
3552 struct hwrm_ring_grp_alloc_output {
3554 * Pass/Fail or error type Note: receiver to verify the in parameters,
3555 * and fail the call with an error when appropriate
3557 uint16_t error_code;
3559 /* This field returns the type of original request. */
3562 /* This field provides original sequence number of the command. */
3566 * This field is the length of the response in bytes. The last byte of
3567 * the response is a valid flag that will read as '1' when the command
3568 * has been completely written to memory.
3573 * This is the ring group ID value. Use this value to program the
3574 * default ring group for the VNIC or as table entries in an RSS/COS
3577 uint32_t ring_group_id;
3584 * This field is used in Output records to indicate that the output is
3585 * completely written to RAM. This field should be read as '1' to
3586 * indicate that the output has been completely written. When writing a
3587 * command completion or response to an internal processor, the order of
3588 * writes has to be such that this field is written last.
3591 } __attribute__((packed));
3593 /* hwrm_ring_grp_free */
3595 * Description: This API frees a ring group and associated resources. # If a
3596 * ring in the ring group is reset or free, then the associated rings in the
3597 * ring group shall also be reset/free using hwrm_ring_free. # A function driver
3598 * shall always use hwrm_ring_grp_free after freeing all rings in a group. # As
3599 * a part of executing this command, the HWRM shall reset all associated ring
3603 /* Input (24 bytes) */
3604 struct hwrm_ring_grp_free_input {
3606 * This value indicates what type of request this is. The format for the
3607 * rest of the command is determined by this field.
3612 * This value indicates the what completion ring the request will be
3613 * optionally completed on. If the value is -1, then no CR completion
3614 * will be generated. Any other value must be a valid CR ring_id value
3615 * for this function.
3619 /* This value indicates the command sequence number. */
3623 * Target ID of this command. 0x0 - 0xFFF8 - Used for function ids
3624 * 0xFFF8 - 0xFFFE - Reserved for internal processors 0xFFFF - HWRM
3629 * This is the host address where the response will be written when the
3630 * request is complete. This area must be 16B aligned and must be
3631 * cleared to zero before the request is made.
3635 /* This is the ring group ID value. */
3636 uint32_t ring_group_id;
3639 } __attribute__((packed));
3641 /* Output (16 bytes) */
3642 struct hwrm_ring_grp_free_output {
3644 * Pass/Fail or error type Note: receiver to verify the in parameters,
3645 * and fail the call with an error when appropriate
3647 uint16_t error_code;
3649 /* This field returns the type of original request. */
3652 /* This field provides original sequence number of the command. */
3656 * This field is the length of the response in bytes. The last byte of
3657 * the response is a valid flag that will read as '1' when the command
3658 * has been completely written to memory.
3668 * This field is used in Output records to indicate that the output is
3669 * completely written to RAM. This field should be read as '1' to
3670 * indicate that the output has been completely written. When writing a
3671 * command completion or response to an internal processor, the order of
3672 * writes has to be such that this field is written last.
3675 } __attribute__((packed));
3677 /* hwrm_stat_ctx_alloc */
3679 * Description: This command allocates and does basic preparation for a stat
3683 /* Input (32 bytes) */
3684 struct hwrm_stat_ctx_alloc_input {
3686 * This value indicates what type of request this is. The format for the
3687 * rest of the command is determined by this field.
3692 * This value indicates the what completion ring the request will be
3693 * optionally completed on. If the value is -1, then no CR completion
3694 * will be generated. Any other value must be a valid CR ring_id value
3695 * for this function.
3699 /* This value indicates the command sequence number. */
3703 * Target ID of this command. 0x0 - 0xFFF8 - Used for function ids
3704 * 0xFFF8 - 0xFFFE - Reserved for internal processors 0xFFFF - HWRM
3709 * This is the host address where the response will be written when the
3710 * request is complete. This area must be 16B aligned and must be
3711 * cleared to zero before the request is made.
3715 /* This is the address for statistic block. */
3716 uint64_t stats_dma_addr;
3719 * The statistic block update period in ms. e.g. 250ms, 500ms, 750ms,
3722 uint32_t update_period_ms;
3725 } __attribute__((packed));
3727 /* Output (16 bytes) */
3728 struct hwrm_stat_ctx_alloc_output {
3730 * Pass/Fail or error type Note: receiver to verify the in parameters,
3731 * and fail the call with an error when appropriate
3733 uint16_t error_code;
3735 /* This field returns the type of original request. */
3738 /* This field provides original sequence number of the command. */
3742 * This field is the length of the response in bytes. The last byte of
3743 * the response is a valid flag that will read as '1' when the command
3744 * has been completely written to memory.
3748 /* This is the statistics context ID value. */
3749 uint32_t stat_ctx_id;
3756 * This field is used in Output records to indicate that the output is
3757 * completely written to RAM. This field should be read as '1' to
3758 * indicate that the output has been completely written. When writing a
3759 * command completion or response to an internal processor, the order of
3760 * writes has to be such that this field is written last.
3763 } __attribute__((packed));
3765 /* hwrm_stat_ctx_clr_stats */
3766 /* Description: This command clears statistics of a context. */
3768 /* Input (24 bytes) */
3769 struct hwrm_stat_ctx_clr_stats_input {
3771 * This value indicates what type of request this is. The format for the
3772 * rest of the command is determined by this field.
3777 * This value indicates the what completion ring the request will be
3778 * optionally completed on. If the value is -1, then no CR completion
3779 * will be generated. Any other value must be a valid CR ring_id value
3780 * for this function.
3784 /* This value indicates the command sequence number. */
3788 * Target ID of this command. 0x0 - 0xFFF8 - Used for function ids
3789 * 0xFFF8 - 0xFFFE - Reserved for internal processors 0xFFFF - HWRM
3794 * This is the host address where the response will be written when the
3795 * request is complete. This area must be 16B aligned and must be
3796 * cleared to zero before the request is made.
3800 /* ID of the statistics context that is being queried. */
3801 uint32_t stat_ctx_id;
3804 } __attribute__((packed));
3806 /* Output (16 bytes) */
3807 struct hwrm_stat_ctx_clr_stats_output {
3809 * Pass/Fail or error type Note: receiver to verify the in parameters,
3810 * and fail the call with an error when appropriate
3812 uint16_t error_code;
3814 /* This field returns the type of original request. */
3817 /* This field provides original sequence number of the command. */
3821 * This field is the length of the response in bytes. The last byte of
3822 * the response is a valid flag that will read as '1' when the command
3823 * has been completely written to memory.
3833 * This field is used in Output records to indicate that the output is
3834 * completely written to RAM. This field should be read as '1' to
3835 * indicate that the output has been completely written. When writing a
3836 * command completion or response to an internal processor, the order of
3837 * writes has to be such that this field is written last.
3840 } __attribute__((packed));
3842 /* hwrm_vnic_alloc */
3844 * Description: This VNIC is a resource in the RX side of the chip that is used
3845 * to represent a virtual host "interface". # At the time of VNIC allocation or
3846 * configuration, the function can specify whether it wants the requested VNIC
3847 * to be the default VNIC for the function or not. # If a function requests
3848 * allocation of a VNIC for the first time and a VNIC is successfully allocated
3849 * by the HWRM, then the HWRM shall make the allocated VNIC as the default VNIC
3850 * for that function. # The default VNIC shall be used for the default action
3851 * for a partition or function. # For each VNIC allocated on a function, a
3852 * mapping on the RX side to map the allocated VNIC to source virtual interface
3853 * shall be performed by the HWRM. This should be hidden to the function driver
3854 * requesting the VNIC allocation. This enables broadcast/multicast replication
3855 * with source knockout. # If multicast replication with source knockout is
3856 * enabled, then the internal VNIC to SVIF mapping data structures shall be
3857 * programmed at the time of VNIC allocation.
3860 /* Input (24 bytes) */
3861 struct hwrm_vnic_alloc_input {
3863 * This value indicates what type of request this is. The format for the
3864 * rest of the command is determined by this field.
3869 * This value indicates the what completion ring the request will be
3870 * optionally completed on. If the value is -1, then no CR completion
3871 * will be generated. Any other value must be a valid CR ring_id value
3872 * for this function.
3876 /* This value indicates the command sequence number. */
3880 * Target ID of this command. 0x0 - 0xFFF8 - Used for function ids
3881 * 0xFFF8 - 0xFFFE - Reserved for internal processors 0xFFFF - HWRM
3886 * This is the host address where the response will be written when the
3887 * request is complete. This area must be 16B aligned and must be
3888 * cleared to zero before the request is made.
3893 * When this bit is '1', this VNIC is requested to be the default VNIC
3894 * for this function.
3896 #define HWRM_VNIC_ALLOC_INPUT_FLAGS_DEFAULT UINT32_C(0x1)
3900 } __attribute__((packed));
3902 /* Output (16 bytes) */
3903 struct hwrm_vnic_alloc_output {
3905 * Pass/Fail or error type Note: receiver to verify the in parameters,
3906 * and fail the call with an error when appropriate
3908 uint16_t error_code;
3910 /* This field returns the type of original request. */
3913 /* This field provides original sequence number of the command. */
3917 * This field is the length of the response in bytes. The last byte of
3918 * the response is a valid flag that will read as '1' when the command
3919 * has been completely written to memory.
3923 /* Logical vnic ID */
3931 * This field is used in Output records to indicate that the output is
3932 * completely written to RAM. This field should be read as '1' to
3933 * indicate that the output has been completely written. When writing a
3934 * command completion or response to an internal processor, the order of
3935 * writes has to be such that this field is written last.
3938 } __attribute__((packed));
3941 /* Description: Configure the RX VNIC structure. */
3943 /* Input (40 bytes) */
3944 struct hwrm_vnic_cfg_input {
3946 * This value indicates what type of request this is. The format for the
3947 * rest of the command is determined by this field.
3952 * This value indicates the what completion ring the request will be
3953 * optionally completed on. If the value is -1, then no CR completion
3954 * will be generated. Any other value must be a valid CR ring_id value
3955 * for this function.
3959 /* This value indicates the command sequence number. */
3963 * Target ID of this command. 0x0 - 0xFFF8 - Used for function ids
3964 * 0xFFF8 - 0xFFFE - Reserved for internal processors 0xFFFF - HWRM
3969 * This is the host address where the response will be written when the
3970 * request is complete. This area must be 16B aligned and must be
3971 * cleared to zero before the request is made.
3976 * When this bit is '1', the VNIC is requested to be the default VNIC
3979 #define HWRM_VNIC_CFG_INPUT_FLAGS_DEFAULT UINT32_C(0x1)
3981 * When this bit is '1', the VNIC is being configured to strip VLAN in
3982 * the RX path. If set to '0', then VLAN stripping is disabled on this
3985 #define HWRM_VNIC_CFG_INPUT_FLAGS_VLAN_STRIP_MODE UINT32_C(0x2)
3987 * When this bit is '1', the VNIC is being configured to buffer receive
3988 * packets in the hardware until the host posts new receive buffers. If
3989 * set to '0', then bd_stall is being configured to be disabled on this
3992 #define HWRM_VNIC_CFG_INPUT_FLAGS_BD_STALL_MODE UINT32_C(0x4)
3994 * When this bit is '1', the VNIC is being configured to receive both
3995 * RoCE and non-RoCE traffic. If set to '0', then this VNIC is not
3996 * configured to be operating in dual VNIC mode.
3998 #define HWRM_VNIC_CFG_INPUT_FLAGS_ROCE_DUAL_VNIC_MODE UINT32_C(0x8)
4000 * When this flag is set to '1', the VNIC is requested to be configured
4001 * to receive only RoCE traffic. If this flag is set to '0', then this
4002 * flag shall be ignored by the HWRM. If roce_dual_vnic_mode flag is set
4003 * to '1', then the HWRM client shall not set this flag to '1'.
4005 #define HWRM_VNIC_CFG_INPUT_FLAGS_ROCE_ONLY_VNIC_MODE UINT32_C(0x10)
4008 /* This bit must be '1' for the dflt_ring_grp field to be configured. */
4009 #define HWRM_VNIC_CFG_INPUT_ENABLES_DFLT_RING_GRP UINT32_C(0x1)
4010 /* This bit must be '1' for the rss_rule field to be configured. */
4011 #define HWRM_VNIC_CFG_INPUT_ENABLES_RSS_RULE UINT32_C(0x2)
4012 /* This bit must be '1' for the cos_rule field to be configured. */
4013 #define HWRM_VNIC_CFG_INPUT_ENABLES_COS_RULE UINT32_C(0x4)
4014 /* This bit must be '1' for the lb_rule field to be configured. */
4015 #define HWRM_VNIC_CFG_INPUT_ENABLES_LB_RULE UINT32_C(0x8)
4016 /* This bit must be '1' for the mru field to be configured. */
4017 #define HWRM_VNIC_CFG_INPUT_ENABLES_MRU UINT32_C(0x10)
4020 /* Logical vnic ID */
4024 * Default Completion ring for the VNIC. This ring will be chosen if
4025 * packet does not match any RSS rules and if there is no COS rule.
4027 uint16_t dflt_ring_grp;
4030 * RSS ID for RSS rule/table structure. 0xFF... (All Fs) if there is no
4036 * RSS ID for COS rule/table structure. 0xFF... (All Fs) if there is no
4042 * RSS ID for load balancing rule/table structure. 0xFF... (All Fs) if
4043 * there is no LB rule.
4048 * The maximum receive unit of the vnic. Each vnic is associated with a
4049 * function. The vnic mru value overwrites the mru setting of the
4050 * associated function. The HWRM shall make sure that vnic mru does not
4051 * exceed the mru of the port the function is associated with.
4056 } __attribute__((packed));
4058 /* Output (16 bytes) */
4059 struct hwrm_vnic_cfg_output {
4061 * Pass/Fail or error type Note: receiver to verify the in parameters,
4062 * and fail the call with an error when appropriate
4064 uint16_t error_code;
4066 /* This field returns the type of original request. */
4069 /* This field provides original sequence number of the command. */
4073 * This field is the length of the response in bytes. The last byte of
4074 * the response is a valid flag that will read as '1' when the command
4075 * has been completely written to memory.
4085 * This field is used in Output records to indicate that the output is
4086 * completely written to RAM. This field should be read as '1' to
4087 * indicate that the output has been completely written. When writing a
4088 * command completion or response to an internal processor, the order of
4089 * writes has to be such that this field is written last.
4092 } __attribute__((packed));
4094 /* hwrm_vnic_free */
4096 * Description: Free a VNIC resource. Idle any resources associated with the
4097 * VNIC as well as the VNIC. Reset and release all resources associated with the
4101 /* Input (24 bytes) */
4102 struct hwrm_vnic_free_input {
4104 * This value indicates what type of request this is. The format for the
4105 * rest of the command is determined by this field.
4110 * This value indicates the what completion ring the request will be
4111 * optionally completed on. If the value is -1, then no CR completion
4112 * will be generated. Any other value must be a valid CR ring_id value
4113 * for this function.
4117 /* This value indicates the command sequence number. */
4121 * Target ID of this command. 0x0 - 0xFFF8 - Used for function ids
4122 * 0xFFF8 - 0xFFFE - Reserved for internal processors 0xFFFF - HWRM
4127 * This is the host address where the response will be written when the
4128 * request is complete. This area must be 16B aligned and must be
4129 * cleared to zero before the request is made.
4133 /* Logical vnic ID */
4137 } __attribute__((packed));
4139 /* Output (16 bytes) */
4140 struct hwrm_vnic_free_output {
4142 * Pass/Fail or error type Note: receiver to verify the in parameters,
4143 * and fail the call with an error when appropriate
4145 uint16_t error_code;
4147 /* This field returns the type of original request. */
4150 /* This field provides original sequence number of the command. */
4154 * This field is the length of the response in bytes. The last byte of
4155 * the response is a valid flag that will read as '1' when the command
4156 * has been completely written to memory.
4166 * This field is used in Output records to indicate that the output is
4167 * completely written to RAM. This field should be read as '1' to
4168 * indicate that the output has been completely written. When writing a
4169 * command completion or response to an internal processor, the order of
4170 * writes has to be such that this field is written last.
4173 } __attribute__((packed));
4175 /* hwrm_vnic_rss_cfg */
4176 /* Description: This function is used to enable RSS configuration. */
4178 /* Input (48 bytes) */
4179 struct hwrm_vnic_rss_cfg_input {
4181 * This value indicates what type of request this is. The format for the
4182 * rest of the command is determined by this field.
4187 * This value indicates the what completion ring the request will be
4188 * optionally completed on. If the value is -1, then no CR completion
4189 * will be generated. Any other value must be a valid CR ring_id value
4190 * for this function.
4194 /* This value indicates the command sequence number. */
4198 * Target ID of this command. 0x0 - 0xFFF8 - Used for function ids
4199 * 0xFFF8 - 0xFFFE - Reserved for internal processors 0xFFFF - HWRM
4204 * This is the host address where the response will be written when the
4205 * request is complete. This area must be 16B aligned and must be
4206 * cleared to zero before the request is made.
4211 * When this bit is '1', the RSS hash shall be computed over source and
4212 * destination IPv4 addresses of IPv4 packets.
4214 #define HWRM_VNIC_RSS_CFG_INPUT_HASH_TYPE_IPV4 UINT32_C(0x1)
4216 * When this bit is '1', the RSS hash shall be computed over
4217 * source/destination IPv4 addresses and source/destination ports of
4220 #define HWRM_VNIC_RSS_CFG_INPUT_HASH_TYPE_TCP_IPV4 UINT32_C(0x2)
4222 * When this bit is '1', the RSS hash shall be computed over
4223 * source/destination IPv4 addresses and source/destination ports of
4226 #define HWRM_VNIC_RSS_CFG_INPUT_HASH_TYPE_UDP_IPV4 UINT32_C(0x4)
4228 * When this bit is '1', the RSS hash shall be computed over source and
4229 * destination IPv4 addresses of IPv6 packets.
4231 #define HWRM_VNIC_RSS_CFG_INPUT_HASH_TYPE_IPV6 UINT32_C(0x8)
4233 * When this bit is '1', the RSS hash shall be computed over
4234 * source/destination IPv6 addresses and source/destination ports of
4237 #define HWRM_VNIC_RSS_CFG_INPUT_HASH_TYPE_TCP_IPV6 UINT32_C(0x10)
4239 * When this bit is '1', the RSS hash shall be computed over
4240 * source/destination IPv6 addresses and source/destination ports of
4243 #define HWRM_VNIC_RSS_CFG_INPUT_HASH_TYPE_UDP_IPV6 UINT32_C(0x20)
4248 /* This is the address for rss ring group table */
4249 uint64_t ring_grp_tbl_addr;
4251 /* This is the address for rss hash key table */
4252 uint64_t hash_key_tbl_addr;
4254 /* Index to the rss indirection table. */
4255 uint16_t rss_ctx_idx;
4257 uint16_t unused_1[3];
4258 } __attribute__((packed));
4260 /* Output (16 bytes) */
4261 struct hwrm_vnic_rss_cfg_output {
4263 * Pass/Fail or error type Note: receiver to verify the in parameters,
4264 * and fail the call with an error when appropriate
4266 uint16_t error_code;
4268 /* This field returns the type of original request. */
4271 /* This field provides original sequence number of the command. */
4275 * This field is the length of the response in bytes. The last byte of
4276 * the response is a valid flag that will read as '1' when the command
4277 * has been completely written to memory.
4287 * This field is used in Output records to indicate that the output is
4288 * completely written to RAM. This field should be read as '1' to
4289 * indicate that the output has been completely written. When writing a
4290 * command completion or response to an internal processor, the order of
4291 * writes has to be such that this field is written last.
4294 } __attribute__((packed));
4296 /* Input (16 bytes) */
4297 struct hwrm_vnic_rss_cos_lb_ctx_alloc_input {
4299 * This value indicates what type of request this is. The format for the
4300 * rest of the command is determined by this field.
4305 * This value indicates the what completion ring the request will be
4306 * optionally completed on. If the value is -1, then no CR completion
4307 * will be generated. Any other value must be a valid CR ring_id value
4308 * for this function.
4312 /* This value indicates the command sequence number. */
4316 * Target ID of this command. 0x0 - 0xFFF8 - Used for function ids
4317 * 0xFFF8 - 0xFFFE - Reserved for internal processors 0xFFFF - HWRM
4322 * This is the host address where the response will be written when the
4323 * request is complete. This area must be 16B aligned and must be
4324 * cleared to zero before the request is made.
4327 } __attribute__((packed));
4329 /* Output (16 bytes) */
4331 struct hwrm_vnic_rss_cos_lb_ctx_alloc_output {
4333 * Pass/Fail or error type Note: receiver to verify the in parameters,
4334 * and fail the call with an error when appropriate
4336 uint16_t error_code;
4338 /* This field returns the type of original request. */
4341 /* This field provides original sequence number of the command. */
4345 * This field is the length of the response in bytes. The last byte of
4346 * the response is a valid flag that will read as '1' when the command
4347 * has been completely written to memory.
4351 /* rss_cos_lb_ctx_id is 16 b */
4352 uint16_t rss_cos_lb_ctx_id;
4361 * This field is used in Output records to indicate that the output is
4362 * completely written to RAM. This field should be read as '1' to
4363 * indicate that the output has been completely written. When writing a
4364 * command completion or response to an internal processor, the order of
4365 * writes has to be such that this field is written last.
4368 } __attribute__((packed));
4370 /* hwrm_vnic_rss_cos_lb_ctx_free */
4371 /* Description: This function can be used to free COS/Load Balance context. */
4372 /* Input (24 bytes) */
4374 struct hwrm_vnic_rss_cos_lb_ctx_free_input {
4376 * This value indicates what type of request this is. The format for the
4377 * rest of the command is determined by this field.
4382 * This value indicates the what completion ring the request will be
4383 * optionally completed on. If the value is -1, then no CR completion
4384 * will be generated. Any other value must be a valid CR ring_id value
4385 * for this function.
4389 /* This value indicates the command sequence number. */
4393 * Target ID of this command. 0x0 - 0xFFF8 - Used for function ids
4394 * 0xFFF8 - 0xFFFE - Reserved for internal processors 0xFFFF - HWRM
4399 * This is the host address where the response will be written when the
4400 * request is complete. This area must be 16B aligned and must be
4401 * cleared to zero before the request is made.
4405 /* rss_cos_lb_ctx_id is 16 b */
4406 uint16_t rss_cos_lb_ctx_id;
4408 uint16_t unused_0[3];
4409 } __attribute__((packed));
4411 /* Output (16 bytes) */
4412 struct hwrm_vnic_rss_cos_lb_ctx_free_output {
4414 * Pass/Fail or error type Note: receiver to verify the in parameters,
4415 * and fail the call with an error when appropriate
4417 uint16_t error_code;
4419 /* This field returns the type of original request. */
4422 /* This field provides original sequence number of the command. */
4426 * This field is the length of the response in bytes. The last byte of
4427 * the response is a valid flag that will read as '1' when the command
4428 * has been completely written to memory.
4438 * This field is used in Output records to indicate that the output is
4439 * completely written to RAM. This field should be read as '1' to
4440 * indicate that the output has been completely written. When writing a
4441 * command completion or response to an internal processor, the order of
4442 * writes has to be such that this field is written last.
4445 } __attribute__((packed));
4447 /* Output (32 bytes) */
4448 struct hwrm_queue_qportcfg_output {
4450 * Pass/Fail or error type Note: receiver to verify the in parameters,
4451 * and fail the call with an error when appropriate
4453 uint16_t error_code;
4455 /* This field returns the type of original request. */
4458 /* This field provides original sequence number of the command. */
4462 * This field is the length of the response in bytes. The last byte of
4463 * the response is a valid flag that will read as '1' when the command
4464 * has been completely written to memory.
4468 /* The maximum number of queues that can be configured. */
4469 uint8_t max_configurable_queues;
4471 /* The maximum number of lossless queues that can be configured. */
4472 uint8_t max_configurable_lossless_queues;
4475 * 0 - Not allowed. Non-zero - Allowed. If this value is non-zero, then
4476 * the HWRM shall allow the host SW driver to configure queues using
4479 uint8_t queue_cfg_allowed;
4482 * 0 - Not allowed. Non-zero - Allowed If this value is non-zero, then
4483 * the HWRM shall allow the host SW driver to configure queue buffers
4484 * using hwrm_queue_buffers_cfg.
4486 uint8_t queue_buffers_cfg_allowed;
4489 * 0 - Not allowed. Non-zero - Allowed If this value is non-zero, then
4490 * the HWRM shall allow the host SW driver to configure PFC using
4491 * hwrm_queue_pfcenable_cfg.
4493 uint8_t queue_pfcenable_cfg_allowed;
4496 * 0 - Not allowed. Non-zero - Allowed If this value is non-zero, then
4497 * the HWRM shall allow the host SW driver to configure Priority to CoS
4498 * mapping using hwrm_queue_pri2cos_cfg.
4500 uint8_t queue_pri2cos_cfg_allowed;
4503 * 0 - Not allowed. Non-zero - Allowed If this value is non-zero, then
4504 * the HWRM shall allow the host SW driver to configure CoS Bandwidth
4505 * configuration using hwrm_queue_cos2bw_cfg.
4507 uint8_t queue_cos2bw_cfg_allowed;
4509 /* ID of CoS Queue 0. FF - Invalid id */
4512 /* This value is applicable to CoS queues only. */
4513 /* Lossy (best-effort) */
4514 #define HWRM_QUEUE_QPORTCFG_OUTPUT_QUEUE_ID0_SERVICE_PROFILE_LOSSY \
4515 (UINT32_C(0x0) << 0)
4517 #define HWRM_QUEUE_QPORTCFG_OUTPUT_QUEUE_ID0_SERVICE_PROFILE_LOSSLESS \
4518 (UINT32_C(0x1) << 0)
4520 * Set to 0xFF... (All Fs) if there is no service profile
4523 #define HWRM_QUEUE_QPORTCFG_OUTPUT_QUEUE_ID0_SERVICE_PROFILE_UNKNOWN \
4524 (UINT32_C(0xff) << 0)
4525 uint8_t queue_id0_service_profile;
4527 /* ID of CoS Queue 1. FF - Invalid id */
4529 /* This value is applicable to CoS queues only. */
4530 /* Lossy (best-effort) */
4531 #define HWRM_QUEUE_QPORTCFG_OUTPUT_QUEUE_ID1_SERVICE_PROFILE_LOSSY \
4532 (UINT32_C(0x0) << 0)
4534 #define HWRM_QUEUE_QPORTCFG_OUTPUT_QUEUE_ID1_SERVICE_PROFILE_LOSSLESS \
4535 (UINT32_C(0x1) << 0)
4537 * Set to 0xFF... (All Fs) if there is no service profile
4540 #define HWRM_QUEUE_QPORTCFG_OUTPUT_QUEUE_ID1_SERVICE_PROFILE_UNKNOWN \
4541 (UINT32_C(0xff) << 0)
4542 uint8_t queue_id1_service_profile;
4544 /* ID of CoS Queue 2. FF - Invalid id */
4546 /* This value is applicable to CoS queues only. */
4547 /* Lossy (best-effort) */
4548 #define HWRM_QUEUE_QPORTCFG_OUTPUT_QUEUE_ID2_SERVICE_PROFILE_LOSSY \
4549 (UINT32_C(0x0) << 0)
4551 #define HWRM_QUEUE_QPORTCFG_OUTPUT_QUEUE_ID2_SERVICE_PROFILE_LOSSLESS \
4552 (UINT32_C(0x1) << 0)
4554 * Set to 0xFF... (All Fs) if there is no service profile
4557 #define HWRM_QUEUE_QPORTCFG_OUTPUT_QUEUE_ID2_SERVICE_PROFILE_UNKNOWN \
4558 (UINT32_C(0xff) << 0)
4559 uint8_t queue_id2_service_profile;
4561 /* ID of CoS Queue 3. FF - Invalid id */
4564 /* This value is applicable to CoS queues only. */
4565 /* Lossy (best-effort) */
4566 #define HWRM_QUEUE_QPORTCFG_OUTPUT_QUEUE_ID3_SERVICE_PROFILE_LOSSY \
4567 (UINT32_C(0x0) << 0)
4569 #define HWRM_QUEUE_QPORTCFG_OUTPUT_QUEUE_ID3_SERVICE_PROFILE_LOSSLESS \
4570 (UINT32_C(0x1) << 0)
4572 * Set to 0xFF... (All Fs) if there is no service profile
4575 #define HWRM_QUEUE_QPORTCFG_OUTPUT_QUEUE_ID3_SERVICE_PROFILE_UNKNOWN \
4576 (UINT32_C(0xff) << 0)
4577 uint8_t queue_id3_service_profile;
4579 /* ID of CoS Queue 4. FF - Invalid id */
4581 /* This value is applicable to CoS queues only. */
4582 /* Lossy (best-effort) */
4583 #define HWRM_QUEUE_QPORTCFG_OUTPUT_QUEUE_ID4_SERVICE_PROFILE_LOSSY \
4584 (UINT32_C(0x0) << 0)
4586 #define HWRM_QUEUE_QPORTCFG_OUTPUT_QUEUE_ID4_SERVICE_PROFILE_LOSSLESS \
4587 (UINT32_C(0x1) << 0)
4589 * Set to 0xFF... (All Fs) if there is no service profile
4592 #define HWRM_QUEUE_QPORTCFG_OUTPUT_QUEUE_ID4_SERVICE_PROFILE_UNKNOWN \
4593 (UINT32_C(0xff) << 0)
4594 uint8_t queue_id4_service_profile;
4596 /* ID of CoS Queue 5. FF - Invalid id */
4599 /* This value is applicable to CoS queues only. */
4600 /* Lossy (best-effort) */
4601 #define HWRM_QUEUE_QPORTCFG_OUTPUT_QUEUE_ID5_SERVICE_PROFILE_LOSSY \
4602 (UINT32_C(0x0) << 0)
4604 #define HWRM_QUEUE_QPORTCFG_OUTPUT_QUEUE_ID5_SERVICE_PROFILE_LOSSLESS \
4605 (UINT32_C(0x1) << 0)
4607 * Set to 0xFF... (All Fs) if there is no service profile
4610 #define HWRM_QUEUE_QPORTCFG_OUTPUT_QUEUE_ID5_SERVICE_PROFILE_UNKNOWN \
4611 (UINT32_C(0xff) << 0)
4612 uint8_t queue_id5_service_profile;
4614 /* ID of CoS Queue 6. FF - Invalid id */
4615 uint8_t queue_id6_service_profile;
4616 /* This value is applicable to CoS queues only. */
4617 /* Lossy (best-effort) */
4618 #define HWRM_QUEUE_QPORTCFG_OUTPUT_QUEUE_ID6_SERVICE_PROFILE_LOSSY \
4619 (UINT32_C(0x0) << 0)
4621 #define HWRM_QUEUE_QPORTCFG_OUTPUT_QUEUE_ID6_SERVICE_PROFILE_LOSSLESS \
4622 (UINT32_C(0x1) << 0)
4624 * Set to 0xFF... (All Fs) if there is no service profile
4627 #define HWRM_QUEUE_QPORTCFG_OUTPUT_QUEUE_ID6_SERVICE_PROFILE_UNKNOWN \
4628 (UINT32_C(0xff) << 0)
4631 /* ID of CoS Queue 7. FF - Invalid id */
4634 /* This value is applicable to CoS queues only. */
4635 /* Lossy (best-effort) */
4636 #define HWRM_QUEUE_QPORTCFG_OUTPUT_QUEUE_ID7_SERVICE_PROFILE_LOSSY \
4637 (UINT32_C(0x0) << 0)
4639 #define HWRM_QUEUE_QPORTCFG_OUTPUT_QUEUE_ID7_SERVICE_PROFILE_LOSSLESS \
4640 (UINT32_C(0x1) << 0)
4642 * Set to 0xFF... (All Fs) if there is no service profile
4645 #define HWRM_QUEUE_QPORTCFG_OUTPUT_QUEUE_ID7_SERVICE_PROFILE_UNKNOWN \
4646 (UINT32_C(0xff) << 0)
4647 uint8_t queue_id7_service_profile;
4650 * This field is used in Output records to indicate that the output is
4651 * completely written to RAM. This field should be read as '1' to
4652 * indicate that the output has been completely written. When writing a
4653 * command completion or response to an internal processor, the order of
4654 * writes has to be such that this field is written last.
4657 } __attribute__((packed));
4659 /* hwrm_func_drv_rgtr */
4661 * Description: This command is used by the function driver to register its
4662 * information with the HWRM. A function driver shall implement this command. A
4663 * function driver shall use this command during the driver initialization right
4664 * after the HWRM version discovery and default ring resources allocation.
4667 /* Input (80 bytes) */
4668 struct hwrm_func_drv_rgtr_input {
4670 * This value indicates what type of request this is. The format for the
4671 * rest of the command is determined by this field.
4676 * This value indicates the what completion ring the request will be
4677 * optionally completed on. If the value is -1, then no CR completion
4678 * will be generated. Any other value must be a valid CR ring_id value
4679 * for this function.
4683 /* This value indicates the command sequence number. */
4687 * Target ID of this command. 0x0 - 0xFFF8 - Used for function ids
4688 * 0xFFF8 - 0xFFFE - Reserved for internal processors 0xFFFF - HWRM
4693 * This is the host address where the response will be written when the
4694 * request is complete. This area must be 16B aligned and must be
4695 * cleared to zero before the request is made.
4700 * When this bit is '1', the function driver is requesting all requests
4701 * from its children VF drivers to be forwarded to itself. This flag can
4702 * only be set by the PF driver. If a VF driver sets this flag, it
4703 * should be ignored by the HWRM.
4705 #define HWRM_FUNC_DRV_RGTR_INPUT_FLAGS_FWD_ALL_MODE UINT32_C(0x1)
4707 * When this bit is '1', the function is requesting none of the requests
4708 * from its children VF drivers to be forwarded to itself. This flag can
4709 * only be set by the PF driver. If a VF driver sets this flag, it
4710 * should be ignored by the HWRM.
4712 #define HWRM_FUNC_DRV_RGTR_INPUT_FLAGS_FWD_NONE_MODE UINT32_C(0x2)
4715 /* This bit must be '1' for the os_type field to be configured. */
4716 #define HWRM_FUNC_DRV_RGTR_INPUT_ENABLES_OS_TYPE UINT32_C(0x1)
4717 /* This bit must be '1' for the ver field to be configured. */
4718 #define HWRM_FUNC_DRV_RGTR_INPUT_ENABLES_VER UINT32_C(0x2)
4719 /* This bit must be '1' for the timestamp field to be configured. */
4720 #define HWRM_FUNC_DRV_RGTR_INPUT_ENABLES_TIMESTAMP UINT32_C(0x4)
4721 /* This bit must be '1' for the vf_req_fwd field to be configured. */
4722 #define HWRM_FUNC_DRV_RGTR_INPUT_ENABLES_VF_REQ_FWD UINT32_C(0x8)
4724 * This bit must be '1' for the async_event_fwd field to be configured.
4726 #define HWRM_FUNC_DRV_RGTR_INPUT_ENABLES_ASYNC_EVENT_FWD \
4730 /* This value indicates the type of OS. */
4732 #define HWRM_FUNC_DRV_RGTR_INPUT_OS_TYPE_UNKNOWN \
4733 (UINT32_C(0x0) << 0)
4734 /* Other OS not listed below. */
4735 #define HWRM_FUNC_DRV_RGTR_INPUT_OS_TYPE_OTHER \
4736 (UINT32_C(0x1) << 0)
4738 #define HWRM_FUNC_DRV_RGTR_INPUT_OS_TYPE_MSDOS \
4739 (UINT32_C(0xe) << 0)
4741 #define HWRM_FUNC_DRV_RGTR_INPUT_OS_TYPE_WINDOWS \
4742 (UINT32_C(0x12) << 0)
4744 #define HWRM_FUNC_DRV_RGTR_INPUT_OS_TYPE_SOLARIS \
4745 (UINT32_C(0x1d) << 0)
4747 #define HWRM_FUNC_DRV_RGTR_INPUT_OS_TYPE_LINUX \
4748 (UINT32_C(0x24) << 0)
4750 #define HWRM_FUNC_DRV_RGTR_INPUT_OS_TYPE_FREEBSD \
4751 (UINT32_C(0x2a) << 0)
4752 /* VMware ESXi OS. */
4753 #define HWRM_FUNC_DRV_RGTR_INPUT_OS_TYPE_ESXI \
4754 (UINT32_C(0x68) << 0)
4755 /* Microsoft Windows 8 64-bit OS. */
4756 #define HWRM_FUNC_DRV_RGTR_INPUT_OS_TYPE_WIN864 \
4757 (UINT32_C(0x73) << 0)
4758 /* Microsoft Windows Server 2012 R2 OS. */
4759 #define HWRM_FUNC_DRV_RGTR_INPUT_OS_TYPE_WIN2012R2 \
4760 (UINT32_C(0x74) << 0)
4763 /* This is the major version of the driver. */
4766 /* This is the minor version of the driver. */
4769 /* This is the update version of the driver. */
4776 * This is a 32-bit timestamp provided by the driver for keep alive. The
4777 * timestamp is in multiples of 1ms.
4784 * This is a 256-bit bit mask provided by the PF driver for letting the
4785 * HWRM know what commands issued by the VF driver to the HWRM should be
4786 * forwarded to the PF driver. Nth bit refers to the Nth req_type.
4787 * Setting Nth bit to 1 indicates that requests from the VF driver with
4788 * req_type equal to N shall be forwarded to the parent PF driver. This
4789 * field is not valid for the VF driver.
4791 uint32_t vf_req_fwd[8];
4794 * This is a 256-bit bit mask provided by the function driver (PF or VF
4795 * driver) to indicate the list of asynchronous event completions to be
4796 * forwarded. Nth bit refers to the Nth event_id. Setting Nth bit to 1
4797 * by the function driver shall result in the HWRM forwarding
4798 * asynchronous event completion with event_id equal to N. If all bits
4799 * are set to 0 (value of 0), then the HWRM shall not forward any
4800 * asynchronous event completion to this function driver.
4802 uint32_t async_event_fwd[8];
4803 } __attribute__((packed));
4805 /* Output (16 bytes) */
4807 struct hwrm_func_drv_rgtr_output {
4809 * Pass/Fail or error type Note: receiver to verify the in parameters,
4810 * and fail the call with an error when appropriate
4812 uint16_t error_code;
4814 /* This field returns the type of original request. */
4817 /* This field provides original sequence number of the command. */
4821 * This field is the length of the response in bytes. The last byte of
4822 * the response is a valid flag that will read as '1' when the command
4823 * has been completely written to memory.
4833 * This field is used in Output records to indicate that the output is
4834 * completely written to RAM. This field should be read as '1' to
4835 * indicate that the output has been completely written. When writing a
4836 * command completion or response to an internal processor, the order of
4837 * writes has to be such that this field is written last.
4840 } __attribute__((packed));
4842 /* hwrm_func_drv_unrgtr */
4844 * Description: This command is used by the function driver to un register with
4845 * the HWRM. A function driver shall implement this command. A function driver
4846 * shall use this command during the driver unloading.
4848 /* Input (24 bytes) */
4850 struct hwrm_func_drv_unrgtr_input {
4852 * This value indicates what type of request this is. The format for the
4853 * rest of the command is determined by this field.
4858 * This value indicates the what completion ring the request will be
4859 * optionally completed on. If the value is -1, then no CR completion
4860 * will be generated. Any other value must be a valid CR ring_id value
4861 * for this function.
4865 /* This value indicates the command sequence number. */
4869 * Target ID of this command. 0x0 - 0xFFF8 - Used for function ids
4870 * 0xFFF8 - 0xFFFE - Reserved for internal processors 0xFFFF - HWRM
4875 * This is the host address where the response will be written when the
4876 * request is complete. This area must be 16B aligned and must be
4877 * cleared to zero before the request is made.
4882 * When this bit is '1', the function driver is notifying the HWRM to
4883 * prepare for the shutdown.
4885 #define HWRM_FUNC_DRV_UNRGTR_INPUT_FLAGS_PREPARE_FOR_SHUTDOWN \
4890 } __attribute__((packed));
4892 /* Output (16 bytes) */
4893 struct hwrm_func_drv_unrgtr_output {
4895 * Pass/Fail or error type Note: receiver to verify the in parameters,
4896 * and fail the call with an error when appropriate
4898 uint16_t error_code;
4900 /* This field returns the type of original request. */
4903 /* This field provides original sequence number of the command. */
4907 * This field is the length of the response in bytes. The last byte of
4908 * the response is a valid flag that will read as '1' when the command
4909 * has been completely written to memory.
4919 * This field is used in Output records to indicate that the output is
4920 * completely written to RAM. This field should be read as '1' to
4921 * indicate that the output has been completely written. When writing a
4922 * command completion or response to an internal processor, the order of
4923 * writes has to be such that this field is written last.
4926 } __attribute__((packed));