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34 #ifndef _HSI_STRUCT_DEF_EXTERNAL_H_
35 #define _HSI_STRUCT_DEF_EXTERNAL_H_
38 * per-context HW statistics -- chip view
41 struct ctx_hw_stats64 {
42 uint64_t rx_ucast_pkts;
43 uint64_t rx_mcast_pkts;
44 uint64_t rx_bcast_pkts;
45 uint64_t rx_drop_pkts;
47 uint64_t rx_ucast_bytes;
48 uint64_t rx_mcast_bytes;
49 uint64_t rx_bcast_bytes;
51 uint64_t tx_ucast_pkts;
52 uint64_t tx_mcast_pkts;
53 uint64_t tx_bcast_pkts;
54 uint64_t tx_drop_pkts;
56 uint64_t tx_ucast_bytes;
57 uint64_t tx_mcast_bytes;
58 uint64_t tx_bcast_bytes;
66 /* HW Resource Manager Specification 1.2.0 */
67 #define HWRM_VERSION_MAJOR 1
68 #define HWRM_VERSION_MINOR 2
69 #define HWRM_VERSION_UPDATE 0
72 * Following is the signature for HWRM message field that indicates not
73 * applicable (All F's). Need to cast it the size of the field if needed.
75 #define HWRM_NA_SIGNATURE ((uint32_t)(-1))
76 #define HWRM_MAX_REQ_LEN (128) /* hwrm_func_buf_rgtr */
77 #define HWRM_MAX_RESP_LEN (176) /* hwrm_func_qstats */
78 #define HW_HASH_INDEX_SIZE 0x80 /* 7 bit indirection table index. */
79 #define HW_HASH_KEY_SIZE 40
80 #define HWRM_RESP_VALID_KEY 1 /* valid key for HWRM response */
85 #define HWRM_VER_GET (UINT32_C(0x0))
86 #define HWRM_FUNC_RESET (UINT32_C(0x11))
87 #define HWRM_FUNC_QCAPS (UINT32_C(0x15))
88 #define HWRM_FUNC_QCFG (UINT32_C(0x16))
89 #define HWRM_FUNC_DRV_UNRGTR (UINT32_C(0x1a))
90 #define HWRM_FUNC_DRV_RGTR (UINT32_C(0x1d))
91 #define HWRM_PORT_PHY_CFG (UINT32_C(0x20))
92 #define HWRM_PORT_PHY_QCFG (UINT32_C(0x27))
93 #define HWRM_QUEUE_QPORTCFG (UINT32_C(0x30))
94 #define HWRM_VNIC_ALLOC (UINT32_C(0x40))
95 #define HWRM_VNIC_FREE (UINT32_C(0x41))
96 #define HWRM_VNIC_CFG (UINT32_C(0x42))
97 #define HWRM_VNIC_RSS_CFG (UINT32_C(0x46))
98 #define HWRM_RING_ALLOC (UINT32_C(0x50))
99 #define HWRM_RING_FREE (UINT32_C(0x51))
100 #define HWRM_RING_GRP_ALLOC (UINT32_C(0x60))
101 #define HWRM_RING_GRP_FREE (UINT32_C(0x61))
102 #define HWRM_VNIC_RSS_COS_LB_CTX_ALLOC (UINT32_C(0x70))
103 #define HWRM_VNIC_RSS_COS_LB_CTX_FREE (UINT32_C(0x71))
104 #define HWRM_CFA_L2_FILTER_ALLOC (UINT32_C(0x90))
105 #define HWRM_CFA_L2_FILTER_FREE (UINT32_C(0x91))
106 #define HWRM_CFA_L2_FILTER_CFG (UINT32_C(0x92))
107 #define HWRM_CFA_L2_SET_RX_MASK (UINT32_C(0x93))
108 #define HWRM_STAT_CTX_ALLOC (UINT32_C(0xb0))
109 #define HWRM_STAT_CTX_FREE (UINT32_C(0xb1))
110 #define HWRM_STAT_CTX_CLR_STATS (UINT32_C(0xb3))
111 #define HWRM_EXEC_FWD_RESP (UINT32_C(0xd0))
114 #define HWRM_ERR_CODE_INVALID_PARAMS (UINT32_C(0x2))
115 #define HWRM_ERR_CODE_RESOURCE_ACCESS_DENIED (UINT32_C(0x3))
117 /* Short TX BD (16 bytes) */
120 * All bits in this field must be valid on the first BD of a packet.
121 * Only the packet_end bit must be valid for the remaining BDs of a
124 /* This value identifies the type of buffer descriptor. */
125 #define TX_BD_SHORT_TYPE_MASK UINT32_C(0x3f)
126 #define TX_BD_SHORT_TYPE_SFT 0
128 * Indicates that this BD is 16B long and is used for normal L2
129 * packet transmission.
131 #define TX_BD_SHORT_TYPE_TX_BD_SHORT (UINT32_C(0x0) << 0)
133 * If set to 1, the packet ends with the data in the buffer pointed to
134 * by this descriptor. This flag must be valid on every BD.
136 #define TX_BD_SHORT_FLAGS_PACKET_END UINT32_C(0x40)
138 * If set to 1, the device will not generate a completion for this
139 * transmit packet unless there is an error in it's processing. If this
140 * bit is set to 0, then the packet will be completed normally. This bit
141 * must be valid only on the first BD of a packet.
143 #define TX_BD_SHORT_FLAGS_NO_CMPL UINT32_C(0x80)
145 * This value indicates how many 16B BD locations are consumed in the
146 * ring by this packet. A value of 1 indicates that this BD is the only
147 * BD (and that the it is a short BD). A value of 3 indicates either 3
148 * short BDs or 1 long BD and one short BD in the packet. A value of 0
149 * indicates that there are 32 BD locations in the packet (the maximum).
150 * This field is valid only on the first BD of a packet.
152 #define TX_BD_SHORT_FLAGS_BD_CNT_MASK UINT32_C(0x1f00)
153 #define TX_BD_SHORT_FLAGS_BD_CNT_SFT 8
155 * This value is a hint for the length of the entire packet. It is used
156 * by the chip to optimize internal processing. The packet will be
157 * dropped if the hint is too short. This field is valid only on the
158 * first BD of a packet.
160 #define TX_BD_SHORT_FLAGS_LHINT_MASK UINT32_C(0x6000)
161 #define TX_BD_SHORT_FLAGS_LHINT_SFT 13
162 /* indicates packet length < 512B */
163 #define TX_BD_SHORT_FLAGS_LHINT_LT512 (UINT32_C(0x0) << 13)
164 /* indicates 512 <= packet length < 1KB */
165 #define TX_BD_SHORT_FLAGS_LHINT_LT1K (UINT32_C(0x1) << 13)
166 /* indicates 1KB <= packet length < 2KB */
167 #define TX_BD_SHORT_FLAGS_LHINT_LT2K (UINT32_C(0x2) << 13)
168 /* indicates packet length >= 2KB */
169 #define TX_BD_SHORT_FLAGS_LHINT_GTE2K (UINT32_C(0x3) << 13)
170 #define TX_BD_SHORT_FLAGS_LHINT_LAST TX_BD_SHORT_FLAGS_LHINT_GTE2K
172 * If set to 1, the device immediately updates the Send Consumer Index
173 * after the buffer associated with this descriptor has been transferred
174 * via DMA to NIC memory from host memory. An interrupt may or may not
175 * be generated according to the state of the interrupt avoidance
176 * mechanisms. If this bit is set to 0, then the Consumer Index is only
177 * updated as soon as one of the host interrupt coalescing conditions
178 * has been met. This bit must be valid on the first BD of a packet.
180 #define TX_BD_SHORT_FLAGS_COAL_NOW UINT32_C(0x8000)
182 * All bits in this field must be valid on the first BD of a packet.
183 * Only the packet_end bit must be valid for the remaining BDs of a
186 #define TX_BD_SHORT_FLAGS_MASK UINT32_C(0xffc0)
187 #define TX_BD_SHORT_FLAGS_SFT 6
191 * This is the length of the host physical buffer this BD describes in
192 * bytes. This field must be valid on all BDs of a packet.
196 * The opaque data field is pass through to the completion and can be
197 * used for any data that the driver wants to associate with the
198 * transmit BD. This field must be valid on the first BD of a packet.
203 * This is the host physical address for the portion of the packet
204 * described by this TX BD. This value must be valid on all BDs of a
208 } __attribute__((packed));
210 /* Long TX BD (32 bytes split to 2 16-byte struct) */
213 * All bits in this field must be valid on the first BD of a packet.
214 * Only the packet_end bit must be valid for the remaining BDs of a
217 /* This value identifies the type of buffer descriptor. */
218 #define TX_BD_LONG_TYPE_MASK UINT32_C(0x3f)
219 #define TX_BD_LONG_TYPE_SFT 0
221 * Indicates that this BD is 32B long and is used for normal L2
222 * packet transmission.
224 #define TX_BD_LONG_TYPE_TX_BD_LONG (UINT32_C(0x10) << 0)
226 * If set to 1, the packet ends with the data in the buffer pointed to
227 * by this descriptor. This flag must be valid on every BD.
229 #define TX_BD_LONG_FLAGS_PACKET_END UINT32_C(0x40)
231 * If set to 1, the device will not generate a completion for this
232 * transmit packet unless there is an error in it's processing. If this
233 * bit is set to 0, then the packet will be completed normally. This bit
234 * must be valid only on the first BD of a packet.
236 #define TX_BD_LONG_FLAGS_NO_CMPL UINT32_C(0x80)
238 * This value indicates how many 16B BD locations are consumed in the
239 * ring by this packet. A value of 1 indicates that this BD is the only
240 * BD (and that the it is a short BD). A value of 3 indicates either 3
241 * short BDs or 1 long BD and one short BD in the packet. A value of 0
242 * indicates that there are 32 BD locations in the packet (the maximum).
243 * This field is valid only on the first BD of a packet.
245 #define TX_BD_LONG_FLAGS_BD_CNT_MASK UINT32_C(0x1f00)
246 #define TX_BD_LONG_FLAGS_BD_CNT_SFT 8
248 * This value is a hint for the length of the entire packet. It is used
249 * by the chip to optimize internal processing. The packet will be
250 * dropped if the hint is too short. This field is valid only on the
251 * first BD of a packet.
253 #define TX_BD_LONG_FLAGS_LHINT_MASK UINT32_C(0x6000)
254 #define TX_BD_LONG_FLAGS_LHINT_SFT 13
255 /* indicates packet length < 512B */
256 #define TX_BD_LONG_FLAGS_LHINT_LT512 (UINT32_C(0x0) << 13)
257 /* indicates 512 <= packet length < 1KB */
258 #define TX_BD_LONG_FLAGS_LHINT_LT1K (UINT32_C(0x1) << 13)
259 /* indicates 1KB <= packet length < 2KB */
260 #define TX_BD_LONG_FLAGS_LHINT_LT2K (UINT32_C(0x2) << 13)
261 /* indicates packet length >= 2KB */
262 #define TX_BD_LONG_FLAGS_LHINT_GTE2K (UINT32_C(0x3) << 13)
263 #define TX_BD_LONG_FLAGS_LHINT_LAST TX_BD_LONG_FLAGS_LHINT_GTE2K
265 * If set to 1, the device immediately updates the Send Consumer Index
266 * after the buffer associated with this descriptor has been transferred
267 * via DMA to NIC memory from host memory. An interrupt may or may not
268 * be generated according to the state of the interrupt avoidance
269 * mechanisms. If this bit is set to 0, then the Consumer Index is only
270 * updated as soon as one of the host interrupt coalescing conditions
271 * has been met. This bit must be valid on the first BD of a packet.
273 #define TX_BD_LONG_FLAGS_COAL_NOW UINT32_C(0x8000)
275 * All bits in this field must be valid on the first BD of a packet.
276 * Only the packet_end bit must be valid for the remaining BDs of a
279 #define TX_BD_LONG_FLAGS_MASK UINT32_C(0xffc0)
280 #define TX_BD_LONG_FLAGS_SFT 6
284 * This is the length of the host physical buffer this BD describes in
285 * bytes. This field must be valid on all BDs of a packet.
290 * The opaque data field is pass through to the completion and can be
291 * used for any data that the driver wants to associate with the
292 * transmit BD. This field must be valid on the first BD of a packet.
297 * This is the host physical address for the portion of the packet
298 * described by this TX BD. This value must be valid on all BDs of a
302 } __attribute__((packed));
304 /* last 16 bytes of Long TX BD */
306 struct tx_bd_long_hi {
308 * All bits in this field must be valid on the first BD of a packet.
309 * Their value on other BDs of the packet will be ignored.
312 * If set to 1, the controller replaces the TCP/UPD checksum fields of
313 * normal TCP/UPD checksum, or the inner TCP/UDP checksum field of the
314 * encapsulated TCP/UDP packets with the hardware calculated TCP/UDP
315 * checksum for the packet associated with this descriptor. This bit
316 * must be valid on the first BD of a packet.
318 #define TX_BD_LONG_LFLAGS_TCP_UDP_CHKSUM UINT32_C(0x1)
320 * If set to 1, the controller replaces the IP checksum of the normal
321 * packets, or the inner IP checksum of the encapsulated packets with
322 * the hardware calculated IP checksum for the packet associated with
323 * this descriptor. This bit must be valid on the first BD of a packet.
325 #define TX_BD_LONG_LFLAGS_IP_CHKSUM UINT32_C(0x2)
327 * If set to 1, the controller will not append an Ethernet CRC to the
328 * end of the frame. This bit must be valid on the first BD of a packet.
329 * Packet must be 64B or longer when this flag is set. It is not useful
330 * to use this bit with any form of TX offload such as CSO or LSO. The
331 * intent is that the packet from the host already has a valid Ethernet
334 #define TX_BD_LONG_LFLAGS_NOCRC UINT32_C(0x4)
336 * If set to 1, the device will record the time at which the packet was
337 * actually transmitted at the TX MAC. This bit must be valid on the
338 * first BD of a packet.
340 #define TX_BD_LONG_LFLAGS_STAMP UINT32_C(0x8)
342 * If set to 1, The controller replaces the tunnel IP checksum field
343 * with hardware calculated IP checksum for the IP header of the packet
344 * associated with this descriptor. In case of VXLAN, the controller
345 * also replaces the outer header UDP checksum with hardware calculated
346 * UDP checksum for the packet associated with this descriptor.
348 #define TX_BD_LONG_LFLAGS_T_IP_CHKSUM UINT32_C(0x10)
350 * If set to 1, the device will treat this packet with LSO(Large Send
351 * Offload) processing for both normal or encapsulated packets, which is
352 * a form of TCP segmentation. When this bit is 1, the hdr_size and mss
353 * fields must be valid. The driver doesn't need to set t_ip_chksum,
354 * ip_chksum, and tcp_udp_chksum flags since the controller will replace
355 * the appropriate checksum fields for segmented packets. When this bit
356 * is 1, the hdr_size and mss fields must be valid.
358 #define TX_BD_LONG_LFLAGS_LSO UINT32_C(0x20)
360 * If set to zero when LSO is '1', then the IPID will be treated as a
361 * 16b number and will be wrapped if it exceeds a value of 0xffff. If
362 * set to one when LSO is '1', then the IPID will be treated as a 15b
363 * number and will be wrapped if it exceeds a value 0f 0x7fff.
365 #define TX_BD_LONG_LFLAGS_IPID_FMT UINT32_C(0x40)
367 * If set to zero when LSO is '1', then the IPID of the tunnel IP header
368 * will not be modified during LSO operations. If set to one when LSO is
369 * '1', then the IPID of the tunnel IP header will be incremented for
370 * each subsequent segment of an LSO operation.
372 #define TX_BD_LONG_LFLAGS_T_IPID UINT32_C(0x80)
374 * If set to '1', then the RoCE ICRC will be appended to the packet.
375 * Packet must be a valid RoCE format packet.
377 #define TX_BD_LONG_LFLAGS_ROCE_CRC UINT32_C(0x100)
379 * If set to '1', then the FCoE CRC will be appended to the packet.
380 * Packet must be a valid FCoE format packet.
382 #define TX_BD_LONG_LFLAGS_FCOE_CRC UINT32_C(0x200)
386 * When LSO is '1', this field must contain the offset of the TCP
387 * payload from the beginning of the packet in as 16b words. In case of
388 * encapsulated/tunneling packet, this field contains the offset of the
389 * inner TCP payload from beginning of the packet as 16-bit words. This
390 * value must be valid on the first BD of a packet.
392 #define TX_BD_LONG_HDR_SIZE_MASK UINT32_C(0x1ff)
393 #define TX_BD_LONG_HDR_SIZE_SFT 0
397 * This is the MSS value that will be used to do the LSO processing. The
398 * value is the length in bytes of the TCP payload for each segment
399 * generated by the LSO operation. This value must be valid on the first
402 #define TX_BD_LONG_MSS_MASK UINT32_C(0x7fff)
403 #define TX_BD_LONG_MSS_SFT 0
409 * This value selects a CFA action to perform on the packet. Set this
410 * value to zero if no CFA action is desired. This value must be valid
411 * on the first BD of a packet.
416 * This value is action meta-data that defines CFA edit operations that
417 * are done in addition to any action editing.
419 /* When key=1, This is the VLAN tag VID value. */
420 #define TX_BD_LONG_CFA_META_VLAN_VID_MASK UINT32_C(0xfff)
421 #define TX_BD_LONG_CFA_META_VLAN_VID_SFT 0
422 /* When key=1, This is the VLAN tag DE value. */
423 #define TX_BD_LONG_CFA_META_VLAN_DE UINT32_C(0x1000)
424 /* When key=1, This is the VLAN tag PRI value. */
425 #define TX_BD_LONG_CFA_META_VLAN_PRI_MASK UINT32_C(0xe000)
426 #define TX_BD_LONG_CFA_META_VLAN_PRI_SFT 13
427 /* When key=1, This is the VLAN tag TPID select value. */
428 #define TX_BD_LONG_CFA_META_VLAN_TPID_MASK UINT32_C(0x70000)
429 #define TX_BD_LONG_CFA_META_VLAN_TPID_SFT 16
431 #define TX_BD_LONG_CFA_META_VLAN_TPID_TPID88A8 (UINT32_C(0x0) << 16)
433 #define TX_BD_LONG_CFA_META_VLAN_TPID_TPID8100 (UINT32_C(0x1) << 16)
435 #define TX_BD_LONG_CFA_META_VLAN_TPID_TPID9100 (UINT32_C(0x2) << 16)
437 #define TX_BD_LONG_CFA_META_VLAN_TPID_TPID9200 (UINT32_C(0x3) << 16)
439 #define TX_BD_LONG_CFA_META_VLAN_TPID_TPID9300 (UINT32_C(0x4) << 16)
440 /* Value programmed in CFA VLANTPID register. */
441 #define TX_BD_LONG_CFA_META_VLAN_TPID_TPIDCFG (UINT32_C(0x5) << 16)
442 #define TX_BD_LONG_CFA_META_VLAN_TPID_LAST \
443 TX_BD_LONG_CFA_META_VLAN_TPID_TPIDCFG
444 /* When key=1, This is the VLAN tag TPID select value. */
445 #define TX_BD_LONG_CFA_META_VLAN_RESERVED_MASK UINT32_C(0xff80000)
446 #define TX_BD_LONG_CFA_META_VLAN_RESERVED_SFT 19
448 * This field identifies the type of edit to be performed on the packet.
449 * This value must be valid on the first BD of a packet.
451 #define TX_BD_LONG_CFA_META_KEY_MASK UINT32_C(0xf0000000)
452 #define TX_BD_LONG_CFA_META_KEY_SFT 28
454 #define TX_BD_LONG_CFA_META_KEY_NONE (UINT32_C(0x0) << 28)
456 * - meta[17:16] - TPID select value (0 = 0x8100). - meta[15:12]
457 * - PRI/DE value. - meta[11:0] - VID value.
459 #define TX_BD_LONG_CFA_META_KEY_VLAN_TAG (UINT32_C(0x1) << 28)
460 #define TX_BD_LONG_CFA_META_KEY_LAST TX_BD_LONG_CFA_META_KEY_VLAN_TAG
462 } __attribute__((packed));
464 /* RX Producer Packet BD (16 bytes) */
465 struct rx_prod_pkt_bd {
466 /* This value identifies the type of buffer descriptor. */
467 #define RX_PROD_PKT_BD_TYPE_MASK UINT32_C(0x3f)
468 #define RX_PROD_PKT_BD_TYPE_SFT 0
470 * Indicates that this BD is 16B long and is an RX Producer (ie.
471 * empty) buffer descriptor.
473 #define RX_PROD_PKT_BD_TYPE_RX_PROD_PKT (UINT32_C(0x4) << 0)
475 * If set to 1, the packet will be placed at the address plus 2B. The 2
476 * Bytes of padding will be written as zero.
479 * This is intended to be used when the host buffer is cache-line
480 * aligned to produce packets that are easy to parse in host memory
481 * while still allowing writes to be cache line aligned.
483 #define RX_PROD_PKT_BD_FLAGS_SOP_PAD UINT32_C(0x40)
485 * If set to 1, the packet write will be padded out to the nearest
486 * cache-line with zero value padding.
489 * If receive buffers start/end on cache-line boundaries, this feature
490 * will ensure that all data writes on the PCI bus start/end on cache
493 #define RX_PROD_PKT_BD_FLAGS_EOP_PAD UINT32_C(0x80)
495 * This value is the number of additional buffers in the ring that
496 * describe the buffer space to be consumed for the this packet. If the
497 * value is zero, then the packet must fit within the space described by
498 * this BD. If this value is 1 or more, it indicates how many additional
499 * "buffer" BDs are in the ring immediately following this BD to be used
500 * for the same network packet. Even if the packet to be placed does not
501 * need all the additional buffers, they will be consumed anyway.
503 #define RX_PROD_PKT_BD_FLAGS_BUFFERS_MASK UINT32_C(0x300)
504 #define RX_PROD_PKT_BD_FLAGS_BUFFERS_SFT 8
505 #define RX_PROD_PKT_BD_FLAGS_MASK UINT32_C(0xffc0)
506 #define RX_PROD_PKT_BD_FLAGS_SFT 6
510 * This is the length in Bytes of the host physical buffer where data
511 * for the packet may be placed in host memory.
514 * While this is a Byte resolution value, it is often advantageous to
515 * ensure that the buffers provided end on a host cache line.
520 * The opaque data field is pass through to the completion and can be
521 * used for any data that the driver wants to associate with this
522 * receive buffer set.
527 * This is the host physical address where data for the packet may by
528 * placed in host memory.
531 * While this is a Byte resolution value, it is often advantageous to
532 * ensure that the buffers provide start on a host cache line.
535 } __attribute__((packed));
537 /* Completion Ring Structures */
538 /* Note: This structure is used by the HWRM to communicate HWRM Error. */
539 /* Base Completion Record (16 bytes) */
543 * This field indicates the exact type of the completion. By convention,
544 * the LSB identifies the length of the record in 16B units. Even values
545 * indicate 16B records. Odd values indicate 32B records.
547 #define CMPL_BASE_TYPE_MASK UINT32_C(0x3f)
548 #define CMPL_BASE_TYPE_SFT 0
549 /* TX L2 completion: Completion of TX packet. Length = 16B */
550 #define CMPL_BASE_TYPE_TX_L2 (UINT32_C(0x0) << 0)
552 * RX L2 completion: Completion of and L2 RX packet.
555 #define CMPL_BASE_TYPE_RX_L2 (UINT32_C(0x11) << 0)
557 * RX Aggregation Buffer completion : Completion of an L2
558 * aggregation buffer in support of TPA, HDS, or Jumbo packet
559 * completion. Length = 16B
561 #define CMPL_BASE_TYPE_RX_AGG (UINT32_C(0x12) << 0)
563 * RX L2 TPA Start Completion: Completion at the beginning of a
564 * TPA operation. Length = 32B
566 #define CMPL_BASE_TYPE_RX_TPA_START (UINT32_C(0x13) << 0)
568 * RX L2 TPA End Completion: Completion at the end of a TPA
569 * operation. Length = 32B
571 #define CMPL_BASE_TYPE_RX_TPA_END (UINT32_C(0x15) << 0)
573 * Statistics Ejection Completion: Completion of statistics data
574 * ejection buffer. Length = 16B
576 #define CMPL_BASE_TYPE_STAT_EJECT (UINT32_C(0x1a) << 0)
577 /* HWRM Command Completion: Completion of an HWRM command. */
578 #define CMPL_BASE_TYPE_HWRM_DONE (UINT32_C(0x20) << 0)
579 /* Forwarded HWRM Request */
580 #define CMPL_BASE_TYPE_HWRM_FWD_REQ (UINT32_C(0x22) << 0)
581 /* Forwarded HWRM Response */
582 #define CMPL_BASE_TYPE_HWRM_FWD_RESP (UINT32_C(0x24) << 0)
583 /* HWRM Asynchronous Event Information */
584 #define CMPL_BASE_TYPE_HWRM_ASYNC_EVENT (UINT32_C(0x2e) << 0)
585 /* CQ Notification */
586 #define CMPL_BASE_TYPE_CQ_NOTIFICATION (UINT32_C(0x30) << 0)
587 /* SRQ Threshold Event */
588 #define CMPL_BASE_TYPE_SRQ_EVENT (UINT32_C(0x32) << 0)
589 /* DBQ Threshold Event */
590 #define CMPL_BASE_TYPE_DBQ_EVENT (UINT32_C(0x34) << 0)
591 /* QP Async Notification */
592 #define CMPL_BASE_TYPE_QP_EVENT (UINT32_C(0x38) << 0)
593 /* Function Async Notification */
594 #define CMPL_BASE_TYPE_FUNC_EVENT (UINT32_C(0x3a) << 0)
601 * This value is written by the NIC such that it will be different for
602 * each pass through the completion queue. The even passes will write 1.
603 * The odd passes will write 0.
605 #define CMPL_BASE_V UINT32_C(0x1)
607 #define CMPL_BASE_INFO3_MASK UINT32_C(0xfffffffe)
608 #define CMPL_BASE_INFO3_SFT 1
612 } __attribute__((packed));
614 /* TX Completion Record (16 bytes) */
617 * This field indicates the exact type of the completion. By convention,
618 * the LSB identifies the length of the record in 16B units. Even values
619 * indicate 16B records. Odd values indicate 32B records.
621 #define TX_CMPL_TYPE_MASK UINT32_C(0x3f)
622 #define TX_CMPL_TYPE_SFT 0
623 /* TX L2 completion: Completion of TX packet. Length = 16B */
624 #define TX_CMPL_TYPE_TX_L2 (UINT32_C(0x0) << 0)
626 * When this bit is '1', it indicates a packet that has an error of some
627 * type. Type of error is indicated in error_flags.
629 #define TX_CMPL_FLAGS_ERROR UINT32_C(0x40)
631 * When this bit is '1', it indicates that the packet completed was
632 * transmitted using the push acceleration data provided by the driver.
633 * When this bit is '0', it indicates that the packet had not push
634 * acceleration data written or was executed as a normal packet even
635 * though push data was provided.
637 #define TX_CMPL_FLAGS_PUSH UINT32_C(0x80)
638 #define TX_CMPL_FLAGS_MASK UINT32_C(0xffc0)
639 #define TX_CMPL_FLAGS_SFT 6
645 * This is a copy of the opaque field from the first TX BD of this
646 * transmitted packet.
651 * This value is written by the NIC such that it will be different for
652 * each pass through the completion queue. The even passes will write 1.
653 * The odd passes will write 0.
655 #define TX_CMPL_V UINT32_C(0x1)
657 * This error indicates that there was some sort of problem with the BDs
660 #define TX_CMPL_ERRORS_BUFFER_ERROR_MASK UINT32_C(0xe)
661 #define TX_CMPL_ERRORS_BUFFER_ERROR_SFT 1
663 #define TX_CMPL_ERRORS_BUFFER_ERROR_NO_ERROR (UINT32_C(0x0) << 1)
664 /* Bad Format: BDs were not formatted correctly. */
665 #define TX_CMPL_ERRORS_BUFFER_ERROR_BAD_FMT (UINT32_C(0x2) << 1)
666 #define TX_CMPL_ERRORS_BUFFER_ERROR_LAST \
667 TX_CMPL_ERRORS_BUFFER_ERROR_BAD_FMT
669 * When this bit is '1', it indicates that the length of the packet was
670 * zero. No packet was transmitted.
672 #define TX_CMPL_ERRORS_ZERO_LENGTH_PKT UINT32_C(0x10)
674 * When this bit is '1', it indicates that the packet was longer than
675 * the programmed limit in TDI. No packet was transmitted.
677 #define TX_CMPL_ERRORS_EXCESSIVE_BD_LENGTH UINT32_C(0x20)
679 * When this bit is '1', it indicates that one or more of the BDs
680 * associated with this packet generated a PCI error. This probably
681 * means the address was not valid.
683 #define TX_CMPL_ERRORS_DMA_ERROR UINT32_C(0x40)
685 * When this bit is '1', it indicates that the packet was longer than
686 * indicated by the hint. No packet was transmitted.
688 #define TX_CMPL_ERRORS_HINT_TOO_SHORT UINT32_C(0x80)
690 * When this bit is '1', it indicates that the packet was dropped due to
691 * Poison TLP error on one or more of the TLPs in the PXP completion.
693 #define TX_CMPL_ERRORS_POISON_TLP_ERROR UINT32_C(0x100)
694 #define TX_CMPL_ERRORS_MASK UINT32_C(0xfffe)
695 #define TX_CMPL_ERRORS_SFT 1
700 } __attribute__((packed)) tx_cmpl_t, *ptx_cmpl_t;
702 /* RX Packet Completion Record (32 bytes split to 2 16-byte struct) */
705 * This field indicates the exact type of the completion. By convention,
706 * the LSB identifies the length of the record in 16B units. Even values
707 * indicate 16B records. Odd values indicate 32B records.
709 #define RX_PKT_CMPL_TYPE_MASK UINT32_C(0x3f)
710 #define RX_PKT_CMPL_TYPE_SFT 0
712 * RX L2 completion: Completion of and L2 RX packet.
715 #define RX_PKT_CMPL_TYPE_RX_L2 (UINT32_C(0x11) << 0)
717 * When this bit is '1', it indicates a packet that has an error of some
718 * type. Type of error is indicated in error_flags.
720 #define RX_PKT_CMPL_FLAGS_ERROR UINT32_C(0x40)
721 /* This field indicates how the packet was placed in the buffer. */
722 #define RX_PKT_CMPL_FLAGS_PLACEMENT_MASK UINT32_C(0x380)
723 #define RX_PKT_CMPL_FLAGS_PLACEMENT_SFT 7
724 /* Normal: Packet was placed using normal algorithm. */
725 #define RX_PKT_CMPL_FLAGS_PLACEMENT_NORMAL (UINT32_C(0x0) << 7)
726 /* Jumbo: Packet was placed using jumbo algorithm. */
727 #define RX_PKT_CMPL_FLAGS_PLACEMENT_JUMBO (UINT32_C(0x1) << 7)
729 * Header/Data Separation: Packet was placed using Header/Data
730 * separation algorithm. The separation location is indicated by
733 #define RX_PKT_CMPL_FLAGS_PLACEMENT_HDS (UINT32_C(0x2) << 7)
734 #define RX_PKT_CMPL_FLAGS_PLACEMENT_LAST \
735 RX_PKT_CMPL_FLAGS_PLACEMENT_HDS
736 /* This bit is '1' if the RSS field in this completion is valid. */
737 #define RX_PKT_CMPL_FLAGS_RSS_VALID UINT32_C(0x400)
739 * This value indicates what the inner packet determined for the packet
742 #define RX_PKT_CMPL_FLAGS_ITYPE_MASK UINT32_C(0xf000)
743 #define RX_PKT_CMPL_FLAGS_ITYPE_SFT 12
744 /* Not Known: Indicates that the packet type was not known. */
745 #define RX_PKT_CMPL_FLAGS_ITYPE_NOT_KNOWN (UINT32_C(0x0) << 12)
747 * IP Packet: Indicates that the packet was an IP packet, but
748 * further classification was not possible.
750 #define RX_PKT_CMPL_FLAGS_ITYPE_IP (UINT32_C(0x1) << 12)
752 * TCP Packet: Indicates that the packet was IP and TCP. This
753 * indicates that the payload_offset field is valid.
755 #define RX_PKT_CMPL_FLAGS_ITYPE_TCP (UINT32_C(0x2) << 12)
757 * UDP Packet: Indicates that the packet was IP and UDP. This
758 * indicates that the payload_offset field is valid.
760 #define RX_PKT_CMPL_FLAGS_ITYPE_UDP (UINT32_C(0x3) << 12)
762 * FCoE Packet: Indicates that the packet was recognized as a
763 * FCoE. This also indicates that the payload_offset field is
766 #define RX_PKT_CMPL_FLAGS_ITYPE_FCOE (UINT32_C(0x4) << 12)
768 * RoCE Packet: Indicates that the packet was recognized as a
769 * RoCE. This also indicates that the payload_offset field is
772 #define RX_PKT_CMPL_FLAGS_ITYPE_ROCE (UINT32_C(0x5) << 12)
774 * ICMP Packet: Indicates that the packet was recognized as
775 * ICMP. This indicates that the payload_offset field is valid.
777 #define RX_PKT_CMPL_FLAGS_ITYPE_ICMP (UINT32_C(0x7) << 12)
779 * PtP packet wo/timestamp: Indicates that the packet was
780 * recognized as a PtP packet.
782 #define RX_PKT_CMPL_FLAGS_ITYPE_PTP_WO_TIMESTAMP \
783 (UINT32_C(0x8) << 12)
785 * PtP packet w/timestamp: Indicates that the packet was
786 * recognized as a PtP packet and that a timestamp was taken for
789 #define RX_PKT_CMPL_FLAGS_ITYPE_PTP_W_TIMESTAMP (UINT32_C(0x9) << 12)
790 #define RX_PKT_CMPL_FLAGS_ITYPE_LAST \
791 RX_PKT_CMPL_FLAGS_ITYPE_PTP_W_TIMESTAMP
792 #define RX_PKT_CMPL_FLAGS_MASK UINT32_C(0xffc0)
793 #define RX_PKT_CMPL_FLAGS_SFT 6
797 * This is the length of the data for the packet stored in the buffer(s)
798 * identified by the opaque value. This includes the packet BD and any
799 * associated buffer BDs. This does not include the the length of any
800 * data places in aggregation BDs.
805 * This is a copy of the opaque field from the RX BD this completion
811 * This value is written by the NIC such that it will be different for
812 * each pass through the completion queue. The even passes will write 1.
813 * The odd passes will write 0.
815 #define RX_PKT_CMPL_V1 UINT32_C(0x1)
817 * This value is the number of aggregation buffers that follow this
818 * entry in the completion ring that are a part of this packet. If the
819 * value is zero, then the packet is completely contained in the buffer
820 * space provided for the packet in the RX ring.
822 #define RX_PKT_CMPL_AGG_BUFS_MASK UINT32_C(0x3e)
823 #define RX_PKT_CMPL_AGG_BUFS_SFT 1
827 * This is the RSS hash type for the packet. The value is packed
828 * {tuple_extrac_op[1:0],rss_profile_id[4:0],tuple_extrac_op[2]}.
830 uint8_t rss_hash_type;
833 * This value indicates the offset from the beginning of the packet
834 * where the inner payload starts. This value is valid for TCP, UDP,
835 * FCoE, and RoCE packets.
837 uint8_t payload_offset;
842 * This value is the RSS hash value calculated for the packet based on
843 * the mode bits and key value in the VNIC.
846 } __attribute__((packed));
848 /* last 16 bytes of RX Packet Completion Record */
849 struct rx_pkt_cmpl_hi {
851 * This indicates that the ip checksum was calculated for the inner
852 * packet and that the ip_cs_error field indicates if there was an
855 #define RX_PKT_CMPL_FLAGS2_IP_CS_CALC UINT32_C(0x1)
857 * This indicates that the TCP, UDP or ICMP checksum was calculated for
858 * the inner packet and that the l4_cs_error field indicates if there
861 #define RX_PKT_CMPL_FLAGS2_L4_CS_CALC UINT32_C(0x2)
863 * This indicates that the ip checksum was calculated for the tunnel
864 * header and that the t_ip_cs_error field indicates if there was an
867 #define RX_PKT_CMPL_FLAGS2_T_IP_CS_CALC UINT32_C(0x4)
869 * This indicates that the UDP checksum was calculated for the tunnel
870 * packet and that the t_l4_cs_error field indicates if there was an
873 #define RX_PKT_CMPL_FLAGS2_T_L4_CS_CALC UINT32_C(0x8)
874 /* This value indicates what format the metadata field is. */
875 #define RX_PKT_CMPL_FLAGS2_META_FORMAT_MASK UINT32_C(0xf0)
876 #define RX_PKT_CMPL_FLAGS2_META_FORMAT_SFT 4
877 /* No metadata informtaion. Value is zero. */
878 #define RX_PKT_CMPL_FLAGS2_META_FORMAT_NONE (UINT32_C(0x0) << 4)
880 * The metadata field contains the VLAN tag and TPID value. -
881 * metadata[11:0] contains the vlan VID value. - metadata[12]
882 * contains the vlan DE value. - metadata[15:13] contains the
883 * vlan PRI value. - metadata[31:16] contains the vlan TPID
886 #define RX_PKT_CMPL_FLAGS2_META_FORMAT_VLAN (UINT32_C(0x1) << 4)
887 #define RX_PKT_CMPL_FLAGS2_META_FORMAT_LAST \
888 RX_PKT_CMPL_FLAGS2_META_FORMAT_VLAN
890 * This field indicates the IP type for the inner-most IP header. A
891 * value of '0' indicates IPv4. A value of '1' indicates IPv6. This
892 * value is only valid if itype indicates a packet with an IP header.
894 #define RX_PKT_CMPL_FLAGS2_IP_TYPE UINT32_C(0x100)
898 * This is data from the CFA block as indicated by the meta_format
901 /* When meta_format=1, this value is the VLAN VID. */
902 #define RX_PKT_CMPL_METADATA_VID_MASK UINT32_C(0xfff)
903 #define RX_PKT_CMPL_METADATA_VID_SFT 0
904 /* When meta_format=1, this value is the VLAN DE. */
905 #define RX_PKT_CMPL_METADATA_DE UINT32_C(0x1000)
906 /* When meta_format=1, this value is the VLAN PRI. */
907 #define RX_PKT_CMPL_METADATA_PRI_MASK UINT32_C(0xe000)
908 #define RX_PKT_CMPL_METADATA_PRI_SFT 13
909 /* When meta_format=1, this value is the VLAN TPID. */
910 #define RX_PKT_CMPL_METADATA_TPID_MASK UINT32_C(0xffff0000)
911 #define RX_PKT_CMPL_METADATA_TPID_SFT 16
915 * This value is written by the NIC such that it will be different for
916 * each pass through the completion queue. The even passes will write 1.
917 * The odd passes will write 0.
919 #define RX_PKT_CMPL_V2 UINT32_C(0x1)
921 * This error indicates that there was some sort of problem with the BDs
922 * for the packet that was found after part of the packet was already
923 * placed. The packet should be treated as invalid.
925 #define RX_PKT_CMPL_ERRORS_BUFFER_ERROR_MASK UINT32_C(0xe)
926 #define RX_PKT_CMPL_ERRORS_BUFFER_ERROR_SFT 1
927 /* No buffer error */
928 #define RX_PKT_CMPL_ERRORS_BUFFER_ERROR_NO_BUFFER \
931 * Did Not Fit: Packet did not fit into packet buffer provided.
932 * For regular placement, this means the packet did not fit in
933 * the buffer provided. For HDS and jumbo placement, this means
934 * that the packet could not be placed into 7 physical buffers
937 #define RX_PKT_CMPL_ERRORS_BUFFER_ERROR_DID_NOT_FIT \
940 * Not On Chip: All BDs needed for the packet were not on-chip
941 * when the packet arrived.
943 #define RX_PKT_CMPL_ERRORS_BUFFER_ERROR_NOT_ON_CHIP \
945 /* Bad Format: BDs were not formatted correctly. */
946 #define RX_PKT_CMPL_ERRORS_BUFFER_ERROR_BAD_FORMAT \
948 #define RX_PKT_CMPL_ERRORS_BUFFER_ERROR_LAST \
949 RX_PKT_CMPL_ERRORS_BUFFER_ERROR_BAD_FORMAT
950 /* This indicates that there was an error in the IP header checksum. */
951 #define RX_PKT_CMPL_ERRORS_IP_CS_ERROR UINT32_C(0x10)
953 * This indicates that there was an error in the TCP, UDP or ICMP
956 #define RX_PKT_CMPL_ERRORS_L4_CS_ERROR UINT32_C(0x20)
958 * This indicates that there was an error in the tunnel IP header
961 #define RX_PKT_CMPL_ERRORS_T_IP_CS_ERROR UINT32_C(0x40)
962 /* This indicates that there was an error in the tunnel UDP checksum. */
963 #define RX_PKT_CMPL_ERRORS_T_L4_CS_ERROR UINT32_C(0x80)
965 * This indicates that there was a CRC error on either an FCoE or RoCE
966 * packet. The itype indicates the packet type.
968 #define RX_PKT_CMPL_ERRORS_CRC_ERROR UINT32_C(0x100)
970 * This indicates that there was an error in the tunnel portion of the
971 * packet when this field is non-zero.
973 #define RX_PKT_CMPL_ERRORS_T_PKT_ERROR_MASK UINT32_C(0xe00)
974 #define RX_PKT_CMPL_ERRORS_T_PKT_ERROR_SFT 9
976 * No additional error occurred on the tunnel portion of the
977 * packet of the packet does not have a tunnel.
979 #define RX_PKT_CMPL_ERRORS_T_PKT_ERROR_NO_ERROR (UINT32_C(0x0) << 9)
981 * Indicates that IP header version does not match expectation
982 * from L2 Ethertype for IPv4 and IPv6 in the tunnel header.
984 #define RX_PKT_CMPL_ERRORS_T_PKT_ERROR_T_L3_BAD_VERSION \
987 * Indicates that header length is out of range in the tunnel
988 * header. Valid for IPv4.
990 #define RX_PKT_CMPL_ERRORS_T_PKT_ERROR_T_L3_BAD_HDR_LEN \
993 * Indicates that the physical packet is shorter than that
994 * claimed by the PPPoE header length for a tunnel PPPoE packet.
996 #define RX_PKT_CMPL_ERRORS_T_PKT_ERROR_TUNNEL_TOTAL_ERROR \
999 * Indicates that physical packet is shorter than that claimed
1000 * by the tunnel l3 header length. Valid for IPv4, or IPv6
1001 * tunnel packet packets.
1003 #define RX_PKT_CMPL_ERRORS_T_PKT_ERROR_T_IP_TOTAL_ERROR \
1004 (UINT32_C(0x4) << 9)
1006 * Indicates that the physical packet is shorter than that
1007 * claimed by the tunnel UDP header length for a tunnel UDP
1008 * packet that is not fragmented.
1010 #define RX_PKT_CMPL_ERRORS_T_PKT_ERROR_T_UDP_TOTAL_ERROR \
1011 (UINT32_C(0x5) << 9)
1013 * indicates that the IPv4 TTL or IPv6 hop limit check have
1014 * failed (e.g. TTL = 0) in the tunnel header. Valid for IPv4,
1017 #define RX_PKT_CMPL_ERRORS_T_PKT_ERROR_T_L3_BAD_TTL \
1018 (UINT32_C(0x6) << 9)
1019 #define RX_PKT_CMPL_ERRORS_T_PKT_ERROR_LAST \
1020 RX_PKT_CMPL_ERRORS_T_PKT_ERROR_T_L3_BAD_TTL
1022 * This indicates that there was an error in the inner portion of the
1023 * packet when this field is non-zero.
1025 #define RX_PKT_CMPL_ERRORS_PKT_ERROR_MASK UINT32_C(0xf000)
1026 #define RX_PKT_CMPL_ERRORS_PKT_ERROR_SFT 12
1028 * No additional error occurred on the tunnel portion of the
1029 * packet of the packet does not have a tunnel.
1031 #define RX_PKT_CMPL_ERRORS_PKT_ERROR_NO_ERROR (UINT32_C(0x0) << 12)
1033 * Indicates that IP header version does not match expectation
1034 * from L2 Ethertype for IPv4 and IPv6 or that option other than
1035 * VFT was parsed on FCoE packet.
1037 #define RX_PKT_CMPL_ERRORS_PKT_ERROR_L3_BAD_VERSION \
1038 (UINT32_C(0x1) << 12)
1040 * indicates that header length is out of range. Valid for IPv4
1043 #define RX_PKT_CMPL_ERRORS_PKT_ERROR_L3_BAD_HDR_LEN \
1044 (UINT32_C(0x2) << 12)
1046 * indicates that the IPv4 TTL or IPv6 hop limit check have
1047 * failed (e.g. TTL = 0). Valid for IPv4, and IPv6
1049 #define RX_PKT_CMPL_ERRORS_PKT_ERROR_L3_BAD_TTL (UINT32_C(0x3) << 12)
1051 * Indicates that physical packet is shorter than that claimed
1052 * by the l3 header length. Valid for IPv4, IPv6 packet or RoCE
1055 #define RX_PKT_CMPL_ERRORS_PKT_ERROR_IP_TOTAL_ERROR \
1056 (UINT32_C(0x4) << 12)
1058 * Indicates that the physical packet is shorter than that
1059 * claimed by the UDP header length for a UDP packet that is not
1062 #define RX_PKT_CMPL_ERRORS_PKT_ERROR_UDP_TOTAL_ERROR \
1063 (UINT32_C(0x5) << 12)
1065 * Indicates that TCP header length > IP payload. Valid for TCP
1068 #define RX_PKT_CMPL_ERRORS_PKT_ERROR_L4_BAD_HDR_LEN \
1069 (UINT32_C(0x6) << 12)
1070 /* Indicates that TCP header length < 5. Valid for TCP. */
1071 #define RX_PKT_CMPL_ERRORS_PKT_ERROR_L4_BAD_HDR_LEN_TOO_SMALL \
1072 (UINT32_C(0x7) << 12)
1074 * Indicates that TCP option headers result in a TCP header size
1075 * that does not match data offset in TCP header. Valid for TCP.
1077 #define RX_PKT_CMPL_ERRORS_PKT_ERROR_L4_BAD_OPT_LEN \
1078 (UINT32_C(0x8) << 12)
1079 #define RX_PKT_CMPL_ERRORS_PKT_ERROR_LAST \
1080 RX_PKT_CMPL_ERRORS_PKT_ERROR_L4_BAD_OPT_LEN
1081 #define RX_PKT_CMPL_ERRORS_MASK UINT32_C(0xfffe)
1082 #define RX_PKT_CMPL_ERRORS_SFT 1
1086 * This field identifies the CFA action rule that was used for this
1092 * This value holds the reordering sequence number for the packet. If
1093 * the reordering sequence is not valid, then this value is zero. The
1094 * reordering domain for the packet is in the bottom 8 to 10b of the
1095 * rss_hash value. The bottom 20b of this value contain the ordering
1096 * domain value for the packet.
1098 #define RX_PKT_CMPL_REORDER_MASK UINT32_C(0xffffff)
1099 #define RX_PKT_CMPL_REORDER_SFT 0
1101 } __attribute__((packed));
1103 /* HWRM Forwarded Request (16 bytes) */
1104 struct hwrm_fwd_req_cmpl {
1105 /* Length of forwarded request in bytes. */
1107 * This field indicates the exact type of the completion. By convention,
1108 * the LSB identifies the length of the record in 16B units. Even values
1109 * indicate 16B records. Odd values indicate 32B records.
1111 #define HWRM_FWD_REQ_CMPL_TYPE_MASK UINT32_C(0x3f)
1112 #define HWRM_FWD_REQ_CMPL_TYPE_SFT 0
1113 /* Forwarded HWRM Request */
1114 #define HWRM_FWD_REQ_CMPL_TYPE_HWRM_FWD_REQ (UINT32_C(0x22) << 0)
1115 /* Length of forwarded request in bytes. */
1116 #define HWRM_FWD_REQ_CMPL_REQ_LEN_MASK UINT32_C(0xffc0)
1117 #define HWRM_FWD_REQ_CMPL_REQ_LEN_SFT 6
1118 uint16_t req_len_type;
1121 * Source ID of this request. Typically used in forwarding requests and
1122 * responses. 0x0 - 0xFFF8 - Used for function ids 0xFFF8 - 0xFFFE -
1123 * Reserved for internal processors 0xFFFF - HWRM
1129 /* Address of forwarded request. */
1131 * This value is written by the NIC such that it will be different for
1132 * each pass through the completion queue. The even passes will write 1.
1133 * The odd passes will write 0.
1135 #define HWRM_FWD_REQ_CMPL_V UINT32_C(0x1)
1136 /* Address of forwarded request. */
1137 #define HWRM_FWD_REQ_CMPL_REQ_BUF_ADDR_MASK UINT32_C(0xfffffffe)
1138 #define HWRM_FWD_REQ_CMPL_REQ_BUF_ADDR_SFT 1
1139 uint64_t req_buf_addr_v;
1140 } __attribute__((packed));
1142 /* HWRM Asynchronous Event Completion Record (16 bytes) */
1143 struct hwrm_async_event_cmpl {
1145 * This field indicates the exact type of the completion. By convention,
1146 * the LSB identifies the length of the record in 16B units. Even values
1147 * indicate 16B records. Odd values indicate 32B records.
1149 #define HWRM_ASYNC_EVENT_CMPL_TYPE_MASK UINT32_C(0x3f)
1150 #define HWRM_ASYNC_EVENT_CMPL_TYPE_SFT 0
1151 /* HWRM Asynchronous Event Information */
1152 #define HWRM_ASYNC_EVENT_CMPL_TYPE_HWRM_ASYNC_EVENT \
1153 (UINT32_C(0x2e) << 0)
1156 /* Identifiers of events. */
1157 /* Link status changed */
1158 #define HWRM_ASYNC_EVENT_CMPL_EVENT_ID_LINK_STATUS_CHANGE \
1159 (UINT32_C(0x0) << 0)
1160 /* Link MTU changed */
1161 #define HWRM_ASYNC_EVENT_CMPL_EVENT_ID_LINK_MTU_CHANGE \
1162 (UINT32_C(0x1) << 0)
1163 /* Link speed changed */
1164 #define HWRM_ASYNC_EVENT_CMPL_EVENT_ID_LINK_SPEED_CHANGE \
1165 (UINT32_C(0x2) << 0)
1166 /* DCB Configuration changed */
1167 #define HWRM_ASYNC_EVENT_CMPL_EVENT_ID_DCB_CONFIG_CHANGE \
1168 (UINT32_C(0x3) << 0)
1169 /* Port connection not allowed */
1170 #define HWRM_ASYNC_EVENT_CMPL_EVENT_ID_PORT_CONN_NOT_ALLOWED \
1171 (UINT32_C(0x4) << 0)
1172 /* Link speed configuration was not allowed */
1173 #define HWRM_ASYNC_EVENT_CMPL_EVENT_ID_LINK_SPEED_CFG_NOT_ALLOWED \
1174 (UINT32_C(0x5) << 0)
1175 /* Function driver unloaded */
1176 #define HWRM_ASYNC_EVENT_CMPL_EVENT_ID_FUNC_DRVR_UNLOAD \
1177 (UINT32_C(0x10) << 0)
1178 /* Function driver loaded */
1179 #define HWRM_ASYNC_EVENT_CMPL_EVENT_ID_FUNC_DRVR_LOAD \
1180 (UINT32_C(0x11) << 0)
1181 /* PF driver unloaded */
1182 #define HWRM_ASYNC_EVENT_CMPL_EVENT_ID_PF_DRVR_UNLOAD \
1183 (UINT32_C(0x20) << 0)
1184 /* PF driver loaded */
1185 #define HWRM_ASYNC_EVENT_CMPL_EVENT_ID_PF_DRVR_LOAD \
1186 (UINT32_C(0x21) << 0)
1187 /* VF Function Level Reset (FLR) */
1188 #define HWRM_ASYNC_EVENT_CMPL_EVENT_ID_VF_FLR (UINT32_C(0x30) << 0)
1189 /* VF MAC Address Change */
1190 #define HWRM_ASYNC_EVENT_CMPL_EVENT_ID_VF_MAC_ADDR_CHANGE \
1191 (UINT32_C(0x31) << 0)
1192 /* PF-VF communication channel status change. */
1193 #define HWRM_ASYNC_EVENT_CMPL_EVENT_ID_PF_VF_COMM_STATUS_CHANGE \
1194 (UINT32_C(0x32) << 0)
1196 #define HWRM_ASYNC_EVENT_CMPL_EVENT_ID_HWRM_ERROR \
1197 (UINT32_C(0xff) << 0)
1200 /* Event specific data */
1201 uint32_t event_data2;
1205 * This value is written by the NIC such that it will be different for
1206 * each pass through the completion queue. The even passes will write 1.
1207 * The odd passes will write 0.
1209 #define HWRM_ASYNC_EVENT_CMPL_V UINT32_C(0x1)
1211 #define HWRM_ASYNC_EVENT_CMPL_OPAQUE_MASK UINT32_C(0xfe)
1212 #define HWRM_ASYNC_EVENT_CMPL_OPAQUE_SFT 1
1215 /* 8-lsb timestamp from POR (100-msec resolution) */
1216 uint8_t timestamp_lo;
1218 /* 16-lsb timestamp from POR (100-msec resolution) */
1219 uint16_t timestamp_hi;
1221 /* Event specific data */
1222 uint32_t event_data1;
1223 } __attribute__((packed));
1226 * Note: The Hardware Resource Manager (HWRM) manages various hardware resources
1227 * inside the chip. The HWRM is implemented in firmware, and runs on embedded
1228 * processors inside the chip. This firmware is vital part of the chip's
1229 * hardware. The chip can not be used by driver without it.
1232 /* Input (16 bytes) */
1235 * This value indicates what type of request this is. The format for the
1236 * rest of the command is determined by this field.
1241 * This value indicates the what completion ring the request will be
1242 * optionally completed on. If the value is -1, then no CR completion
1243 * will be generated. Any other value must be a valid CR ring_id value
1244 * for this function.
1248 /* This value indicates the command sequence number. */
1252 * Target ID of this command. 0x0 - 0xFFF8 - Used for function ids
1253 * 0xFFF8 - 0xFFFE - Reserved for internal processors 0xFFFF - HWRM
1258 * This is the host address where the response will be written when the
1259 * request is complete. This area must be 16B aligned and must be
1260 * cleared to zero before the request is made.
1263 } __attribute__((packed));
1265 /* Output (8 bytes) */
1268 * Pass/Fail or error type Note: receiver to verify the in parameters,
1269 * and fail the call with an error when appropriate
1271 uint16_t error_code;
1273 /* This field returns the type of original request. */
1276 /* This field provides original sequence number of the command. */
1280 * This field is the length of the response in bytes. The last byte of
1281 * the response is a valid flag that will read as '1' when the command
1282 * has been completely written to memory.
1285 } __attribute__((packed));
1287 /* hwrm_cfa_l2_filter_alloc */
1289 * A filter is used to identify traffic that contains a matching set of
1290 * parameters like unicast or broadcast MAC address or a VLAN tag amongst
1291 * other things which then allows the ASIC to direct the incoming traffic
1292 * to an appropriate VNIC or Rx ring.
1295 /* Input (96 bytes) */
1296 struct hwrm_cfa_l2_filter_alloc_input {
1298 * This value indicates what type of request this is. The format for the
1299 * rest of the command is determined by this field.
1304 * This value indicates the what completion ring the request will be
1305 * optionally completed on. If the value is -1, then no CR completion
1306 * will be generated. Any other value must be a valid CR ring_id value
1307 * for this function.
1311 /* This value indicates the command sequence number. */
1315 * Target ID of this command. 0x0 - 0xFFF8 - Used for function ids
1316 * 0xFFF8 - 0xFFFE - Reserved for internal processors 0xFFFF - HWRM
1321 * This is the host address where the response will be written when the
1322 * request is complete. This area must be 16B aligned and must be
1323 * cleared to zero before the request is made.
1328 * Enumeration denoting the RX, TX type of the resource. This
1329 * enumeration is used for resources that are similar for both TX and RX
1330 * paths of the chip.
1332 #define HWRM_CFA_L2_FILTER_ALLOC_INPUT_FLAGS_PATH \
1335 #define HWRM_CFA_L2_FILTER_ALLOC_INPUT_FLAGS_PATH_TX \
1336 (UINT32_C(0x0) << 0)
1338 #define HWRM_CFA_L2_FILTER_ALLOC_INPUT_FLAGS_PATH_RX \
1339 (UINT32_C(0x1) << 0)
1340 #define HWRM_CFA_L2_FILTER_ALLOC_INPUT_FLAGS_PATH_LAST \
1341 HWRM_CFA_L2_FILTER_ALLOC_INPUT_FLAGS_PATH_RX
1343 * Setting of this flag indicates the applicability to the loopback
1346 #define HWRM_CFA_L2_FILTER_ALLOC_INPUT_FLAGS_LOOPBACK \
1349 * Setting of this flag indicates drop action. If this flag is not set,
1350 * then it should be considered accept action.
1352 #define HWRM_CFA_L2_FILTER_ALLOC_INPUT_FLAGS_DROP \
1355 * If this flag is set, all t_l2_* fields are invalid and they should
1356 * not be specified. If this flag is set, then l2_* fields refer to
1357 * fields of outermost L2 header.
1359 #define HWRM_CFA_L2_FILTER_ALLOC_INPUT_FLAGS_OUTERMOST \
1363 /* This bit must be '1' for the l2_addr field to be configured. */
1364 #define HWRM_CFA_L2_FILTER_ALLOC_INPUT_ENABLES_L2_ADDR \
1366 /* This bit must be '1' for the l2_addr_mask field to be configured. */
1367 #define HWRM_CFA_L2_FILTER_ALLOC_INPUT_ENABLES_L2_ADDR_MASK \
1369 /* This bit must be '1' for the l2_ovlan field to be configured. */
1370 #define HWRM_CFA_L2_FILTER_ALLOC_INPUT_ENABLES_L2_OVLAN \
1372 /* This bit must be '1' for the l2_ovlan_mask field to be configured. */
1373 #define HWRM_CFA_L2_FILTER_ALLOC_INPUT_ENABLES_L2_OVLAN_MASK \
1375 /* This bit must be '1' for the l2_ivlan field to be configured. */
1376 #define HWRM_CFA_L2_FILTER_ALLOC_INPUT_ENABLES_L2_IVLAN \
1378 /* This bit must be '1' for the l2_ivlan_mask field to be configured. */
1379 #define HWRM_CFA_L2_FILTER_ALLOC_INPUT_ENABLES_L2_IVLAN_MASK \
1381 /* This bit must be '1' for the t_l2_addr field to be configured. */
1382 #define HWRM_CFA_L2_FILTER_ALLOC_INPUT_ENABLES_T_L2_ADDR \
1385 * This bit must be '1' for the t_l2_addr_mask field to be configured.
1387 #define HWRM_CFA_L2_FILTER_ALLOC_INPUT_ENABLES_T_L2_ADDR_MASK \
1389 /* This bit must be '1' for the t_l2_ovlan field to be configured. */
1390 #define HWRM_CFA_L2_FILTER_ALLOC_INPUT_ENABLES_T_L2_OVLAN \
1393 * This bit must be '1' for the t_l2_ovlan_mask field to be configured.
1395 #define HWRM_CFA_L2_FILTER_ALLOC_INPUT_ENABLES_T_L2_OVLAN_MASK \
1397 /* This bit must be '1' for the t_l2_ivlan field to be configured. */
1398 #define HWRM_CFA_L2_FILTER_ALLOC_INPUT_ENABLES_T_L2_IVLAN \
1401 * This bit must be '1' for the t_l2_ivlan_mask field to be configured.
1403 #define HWRM_CFA_L2_FILTER_ALLOC_INPUT_ENABLES_T_L2_IVLAN_MASK \
1405 /* This bit must be '1' for the src_type field to be configured. */
1406 #define HWRM_CFA_L2_FILTER_ALLOC_INPUT_ENABLES_SRC_TYPE \
1408 /* This bit must be '1' for the src_id field to be configured. */
1409 #define HWRM_CFA_L2_FILTER_ALLOC_INPUT_ENABLES_SRC_ID \
1411 /* This bit must be '1' for the tunnel_type field to be configured. */
1412 #define HWRM_CFA_L2_FILTER_ALLOC_INPUT_ENABLES_TUNNEL_TYPE \
1414 /* This bit must be '1' for the dst_id field to be configured. */
1415 #define HWRM_CFA_L2_FILTER_ALLOC_INPUT_ENABLES_DST_ID \
1418 * This bit must be '1' for the mirror_vnic_id field to be configured.
1420 #define HWRM_CFA_L2_FILTER_ALLOC_INPUT_ENABLES_MIRROR_VNIC_ID \
1425 * This value sets the match value for the L2 MAC address. Destination
1426 * MAC address for RX path. Source MAC address for TX path.
1434 * This value sets the mask value for the L2 address. A value of 0 will
1435 * mask the corresponding bit from compare.
1437 uint8_t l2_addr_mask[6];
1439 /* This value sets VLAN ID value for outer VLAN. */
1443 * This value sets the mask value for the ovlan id. A value of 0 will
1444 * mask the corresponding bit from compare.
1446 uint16_t l2_ovlan_mask;
1448 /* This value sets VLAN ID value for inner VLAN. */
1452 * This value sets the mask value for the ivlan id. A value of 0 will
1453 * mask the corresponding bit from compare.
1455 uint16_t l2_ivlan_mask;
1461 * This value sets the match value for the tunnel L2 MAC address.
1462 * Destination MAC address for RX path. Source MAC address for TX path.
1464 uint8_t t_l2_addr[6];
1470 * This value sets the mask value for the tunnel L2 address. A value of
1471 * 0 will mask the corresponding bit from compare.
1473 uint8_t t_l2_addr_mask[6];
1475 /* This value sets VLAN ID value for tunnel outer VLAN. */
1476 uint16_t t_l2_ovlan;
1479 * This value sets the mask value for the tunnel ovlan id. A value of 0
1480 * will mask the corresponding bit from compare.
1482 uint16_t t_l2_ovlan_mask;
1484 /* This value sets VLAN ID value for tunnel inner VLAN. */
1485 uint16_t t_l2_ivlan;
1488 * This value sets the mask value for the tunnel ivlan id. A value of 0
1489 * will mask the corresponding bit from compare.
1491 uint16_t t_l2_ivlan_mask;
1493 /* This value identifies the type of source of the packet. */
1495 #define HWRM_CFA_L2_FILTER_ALLOC_INPUT_SRC_TYPE_NPORT \
1496 (UINT32_C(0x0) << 0)
1497 /* Physical function */
1498 #define HWRM_CFA_L2_FILTER_ALLOC_INPUT_SRC_TYPE_PF \
1499 (UINT32_C(0x1) << 0)
1500 /* Virtual function */
1501 #define HWRM_CFA_L2_FILTER_ALLOC_INPUT_SRC_TYPE_VF \
1502 (UINT32_C(0x2) << 0)
1503 /* Virtual NIC of a function */
1504 #define HWRM_CFA_L2_FILTER_ALLOC_INPUT_SRC_TYPE_VNIC \
1505 (UINT32_C(0x3) << 0)
1506 /* Embedded processor for CFA management */
1507 #define HWRM_CFA_L2_FILTER_ALLOC_INPUT_SRC_TYPE_KONG \
1508 (UINT32_C(0x4) << 0)
1509 /* Embedded processor for OOB management */
1510 #define HWRM_CFA_L2_FILTER_ALLOC_INPUT_SRC_TYPE_APE \
1511 (UINT32_C(0x5) << 0)
1512 /* Embedded processor for RoCE */
1513 #define HWRM_CFA_L2_FILTER_ALLOC_INPUT_SRC_TYPE_BONO \
1514 (UINT32_C(0x6) << 0)
1515 /* Embedded processor for network proxy functions */
1516 #define HWRM_CFA_L2_FILTER_ALLOC_INPUT_SRC_TYPE_TANG \
1517 (UINT32_C(0x7) << 0)
1522 * This value is the id of the source. For a network port, it represents
1523 * port_id. For a physical function, it represents fid. For a virtual
1524 * function, it represents vf_id. For a vnic, it represents vnic_id. For
1525 * embedded processors, this id is not valid. Notes: 1. The function ID
1526 * is implied if it src_id is not provided for a src_type that is either
1532 #define HWRM_CFA_L2_FILTER_ALLOC_INPUT_TUNNEL_TYPE_NONTUNNEL \
1533 (UINT32_C(0x0) << 0)
1534 /* Virtual eXtensible Local Area Network (VXLAN) */
1535 #define HWRM_CFA_L2_FILTER_ALLOC_INPUT_TUNNEL_TYPE_VXLAN \
1536 (UINT32_C(0x1) << 0)
1538 * Network Virtualization Generic Routing Encapsulation (NVGRE)
1540 #define HWRM_CFA_L2_FILTER_ALLOC_INPUT_TUNNEL_TYPE_NVGRE \
1541 (UINT32_C(0x2) << 0)
1543 * Generic Routing Encapsulation (GRE) inside Ethernet payload
1545 #define HWRM_CFA_L2_FILTER_ALLOC_INPUT_TUNNEL_TYPE_L2GRE \
1546 (UINT32_C(0x3) << 0)
1548 #define HWRM_CFA_L2_FILTER_ALLOC_INPUT_TUNNEL_TYPE_IPIP \
1549 (UINT32_C(0x4) << 0)
1550 /* Generic Network Virtualization Encapsulation (Geneve) */
1551 #define HWRM_CFA_L2_FILTER_ALLOC_INPUT_TUNNEL_TYPE_GENEVE \
1552 (UINT32_C(0x5) << 0)
1553 /* Multi-Protocol Lable Switching (MPLS) */
1554 #define HWRM_CFA_L2_FILTER_ALLOC_INPUT_TUNNEL_TYPE_MPLS \
1555 (UINT32_C(0x6) << 0)
1556 /* Stateless Transport Tunnel (STT) */
1557 #define HWRM_CFA_L2_FILTER_ALLOC_INPUT_TUNNEL_TYPE_STT \
1558 (UINT32_C(0x7) << 0)
1560 * Generic Routing Encapsulation (GRE) inside IP datagram
1563 #define HWRM_CFA_L2_FILTER_ALLOC_INPUT_TUNNEL_TYPE_IPGRE \
1564 (UINT32_C(0x8) << 0)
1565 /* Any tunneled traffic */
1566 #define HWRM_CFA_L2_FILTER_ALLOC_INPUT_TUNNEL_TYPE_ANYTUNNEL \
1567 (UINT32_C(0xff) << 0)
1568 uint8_t tunnel_type;
1573 * If set, this value shall represent the Logical VNIC ID of the
1574 * destination VNIC for the RX path and network port id of the
1575 * destination port for the TX path.
1579 /* Logical VNIC ID of the VNIC where traffic is mirrored. */
1580 uint16_t mirror_vnic_id;
1583 * This hint is provided to help in placing the filter in the filter
1587 #define HWRM_CFA_L2_FILTER_ALLOC_INPUT_PRI_HINT_NO_PREFER \
1588 (UINT32_C(0x0) << 0)
1589 /* Above the given filter */
1590 #define HWRM_CFA_L2_FILTER_ALLOC_INPUT_PRI_HINT_ABOVE_FILTER \
1591 (UINT32_C(0x1) << 0)
1592 /* Below the given filter */
1593 #define HWRM_CFA_L2_FILTER_ALLOC_INPUT_PRI_HINT_BELOW_FILTER \
1594 (UINT32_C(0x2) << 0)
1595 /* As high as possible */
1596 #define HWRM_CFA_L2_FILTER_ALLOC_INPUT_PRI_HINT_MAX \
1597 (UINT32_C(0x3) << 0)
1598 /* As low as possible */
1599 #define HWRM_CFA_L2_FILTER_ALLOC_INPUT_PRI_HINT_MIN \
1600 (UINT32_C(0x4) << 0)
1607 * This is the ID of the filter that goes along with the pri_hint. This
1608 * field is valid only for the following values. 1 - Above the given
1609 * filter 2 - Below the given filter
1611 uint64_t l2_filter_id_hint;
1612 } __attribute__((packed));
1614 /* Output (24 bytes) */
1615 struct hwrm_cfa_l2_filter_alloc_output {
1617 * Pass/Fail or error type Note: receiver to verify the in parameters,
1618 * and fail the call with an error when appropriate
1620 uint16_t error_code;
1622 /* This field returns the type of original request. */
1625 /* This field provides original sequence number of the command. */
1629 * This field is the length of the response in bytes. The last byte of
1630 * the response is a valid flag that will read as '1' when the command
1631 * has been completely written to memory.
1636 * This value identifies a set of CFA data structures used for an L2
1639 uint64_t l2_filter_id;
1642 * This is the ID of the flow associated with this filter. This value
1643 * shall be used to match and associate the flow identifier returned in
1644 * completion records. A value of 0xFFFFFFFF shall indicate no flow id.
1653 * This field is used in Output records to indicate that the output is
1654 * completely written to RAM. This field should be read as '1' to
1655 * indicate that the output has been completely written. When writing a
1656 * command completion or response to an internal processor, the order of
1657 * writes has to be such that this field is written last.
1660 } __attribute__((packed));
1662 /* hwrm_cfa_l2_filter_free */
1664 * Description: Free a L2 filter. The HWRM shall free all associated filter
1665 * resources with the L2 filter.
1668 /* Input (24 bytes) */
1669 struct hwrm_cfa_l2_filter_free_input {
1671 * This value indicates what type of request this is. The format for the
1672 * rest of the command is determined by this field.
1677 * This value indicates the what completion ring the request will be
1678 * optionally completed on. If the value is -1, then no CR completion
1679 * will be generated. Any other value must be a valid CR ring_id value
1680 * for this function.
1684 /* This value indicates the command sequence number. */
1688 * Target ID of this command. 0x0 - 0xFFF8 - Used for function ids
1689 * 0xFFF8 - 0xFFFE - Reserved for internal processors 0xFFFF - HWRM
1694 * This is the host address where the response will be written when the
1695 * request is complete. This area must be 16B aligned and must be
1696 * cleared to zero before the request is made.
1701 * This value identifies a set of CFA data structures used for an L2
1704 uint64_t l2_filter_id;
1705 } __attribute__((packed));
1707 /* Output (16 bytes) */
1708 struct hwrm_cfa_l2_filter_free_output {
1710 * Pass/Fail or error type Note: receiver to verify the in parameters,
1711 * and fail the call with an error when appropriate
1713 uint16_t error_code;
1715 /* This field returns the type of original request. */
1718 /* This field provides original sequence number of the command. */
1722 * This field is the length of the response in bytes. The last byte of
1723 * the response is a valid flag that will read as '1' when the command
1724 * has been completely written to memory.
1734 * This field is used in Output records to indicate that the output is
1735 * completely written to RAM. This field should be read as '1' to
1736 * indicate that the output has been completely written. When writing a
1737 * command completion or response to an internal processor, the order of
1738 * writes has to be such that this field is written last.
1741 } __attribute__((packed));
1743 /* hwrm_cfa_l2_set_rx_mask */
1744 /* Description: This command will set rx mask of the function. */
1746 /* Input (40 bytes) */
1747 struct hwrm_cfa_l2_set_rx_mask_input {
1749 * This value indicates what type of request this is. The format for the
1750 * rest of the command is determined by this field.
1755 * This value indicates the what completion ring the request will be
1756 * optionally completed on. If the value is -1, then no CR completion
1757 * will be generated. Any other value must be a valid CR ring_id value
1758 * for this function.
1762 /* This value indicates the command sequence number. */
1766 * Target ID of this command. 0x0 - 0xFFF8 - Used for function ids
1767 * 0xFFF8 - 0xFFFE - Reserved for internal processors 0xFFFF - HWRM
1772 * This is the host address where the response will be written when the
1773 * request is complete. This area must be 16B aligned and must be
1774 * cleared to zero before the request is made.
1781 /* Reserved for future use. */
1782 #define HWRM_CFA_L2_SET_RX_MASK_INPUT_MASK_RESERVED UINT32_C(0x1)
1784 * When this bit is '1', the function is requested to accept multi-cast
1785 * packets specified by the multicast addr table.
1787 #define HWRM_CFA_L2_SET_RX_MASK_INPUT_MASK_MCAST UINT32_C(0x2)
1789 * When this bit is '1', the function is requested to accept all multi-
1792 #define HWRM_CFA_L2_SET_RX_MASK_INPUT_MASK_ALL_MCAST UINT32_C(0x4)
1794 * When this bit is '1', the function is requested to accept broadcast
1797 #define HWRM_CFA_L2_SET_RX_MASK_INPUT_MASK_BCAST UINT32_C(0x8)
1799 * When this bit is '1', the function is requested to be put in the
1800 * promiscuous mode. The HWRM should accept any function to set up
1801 * promiscuous mode. The HWRM shall follow the semantics below for the
1802 * promiscuous mode support. # When partitioning is not enabled on a
1803 * port (i.e. single PF on the port), then the PF shall be allowed to be
1804 * in the promiscuous mode. When the PF is in the promiscuous mode, then
1805 * it shall receive all host bound traffic on that port. # When
1806 * partitioning is enabled on a port (i.e. multiple PFs per port) and a
1807 * PF on that port is in the promiscuous mode, then the PF receives all
1808 * traffic within that partition as identified by a unique identifier
1809 * for the PF (e.g. S-Tag). If a unique outer VLAN for the PF is
1810 * specified, then the setting of promiscuous mode on that PF shall
1811 * result in the PF receiving all host bound traffic with matching outer
1812 * VLAN. # A VF shall can be set in the promiscuous mode. In the
1813 * promiscuous mode, the VF does not receive any traffic unless a unique
1814 * outer VLAN for the VF is specified. If a unique outer VLAN for the VF
1815 * is specified, then the setting of promiscuous mode on that VF shall
1816 * result in the VF receiving all host bound traffic with the matching
1817 * outer VLAN. # The HWRM shall allow the setting of promiscuous mode on
1818 * a function independently from the promiscuous mode settings on other
1821 #define HWRM_CFA_L2_SET_RX_MASK_INPUT_MASK_PROMISCUOUS UINT32_C(0x10)
1823 * If this flag is set, the corresponding RX filters shall be set up to
1824 * cover multicast/broadcast filters for the outermost Layer 2
1825 * destination MAC address field.
1827 #define HWRM_CFA_L2_SET_RX_MASK_INPUT_MASK_OUTERMOST UINT32_C(0x20)
1830 /* This is the address for mcast address tbl. */
1831 uint64_t mc_tbl_addr;
1834 * This value indicates how many entries in mc_tbl are valid. Each entry
1837 uint32_t num_mc_entries;
1840 } __attribute__((packed));
1842 /* Output (16 bytes) */
1843 struct hwrm_cfa_l2_set_rx_mask_output {
1845 * Pass/Fail or error type Note: receiver to verify the in parameters,
1846 * and fail the call with an error when appropriate
1848 uint16_t error_code;
1850 /* This field returns the type of original request. */
1853 /* This field provides original sequence number of the command. */
1857 * This field is the length of the response in bytes. The last byte of
1858 * the response is a valid flag that will read as '1' when the command
1859 * has been completely written to memory.
1869 * This field is used in Output records to indicate that the output is
1870 * completely written to RAM. This field should be read as '1' to
1871 * indicate that the output has been completely written. When writing a
1872 * command completion or response to an internal processor, the order of
1873 * writes has to be such that this field is written last.
1876 } __attribute__((packed));
1878 /* hwrm_exec_fwd_resp */
1880 * Description: This command is used to send an encapsulated request to the
1881 * HWRM. This command instructs the HWRM to execute the request and forward the
1882 * response of the encapsulated request to the location specified in the
1883 * original request that is encapsulated. The target id of this command shall be
1884 * set to 0xFFFF (HWRM). The response location in this command shall be used to
1885 * acknowledge the receipt of the encapsulated request and forwarding of the
1889 /* Input (128 bytes) */
1890 struct hwrm_exec_fwd_resp_input {
1892 * This value indicates what type of request this is. The format for the
1893 * rest of the command is determined by this field.
1898 * This value indicates the what completion ring the request will be
1899 * optionally completed on. If the value is -1, then no CR completion
1900 * will be generated. Any other value must be a valid CR ring_id value
1901 * for this function.
1905 /* This value indicates the command sequence number. */
1909 * Target ID of this command. 0x0 - 0xFFF8 - Used for function ids
1910 * 0xFFF8 - 0xFFFE - Reserved for internal processors 0xFFFF - HWRM
1915 * This is the host address where the response will be written when the
1916 * request is complete. This area must be 16B aligned and must be
1917 * cleared to zero before the request is made.
1922 * This is an encapsulated request. This request should be executed by
1923 * the HWRM and the response should be provided in the response buffer
1924 * inside the encapsulated request.
1926 uint32_t encap_request[26];
1929 * This value indicates the target id of the response to the
1930 * encapsulated request. 0x0 - 0xFFF8 - Used for function ids 0xFFF8 -
1931 * 0xFFFE - Reserved for internal processors 0xFFFF - HWRM
1933 uint16_t encap_resp_target_id;
1935 uint16_t unused_0[3];
1936 } __attribute__((packed));
1938 /* Output (16 bytes) */
1939 struct hwrm_exec_fwd_resp_output {
1941 * Pass/Fail or error type Note: receiver to verify the in parameters,
1942 * and fail the call with an error when appropriate
1944 uint16_t error_code;
1946 /* This field returns the type of original request. */
1949 /* This field provides original sequence number of the command. */
1953 * This field is the length of the response in bytes. The last byte of
1954 * the response is a valid flag that will read as '1' when the command
1955 * has been completely written to memory.
1965 * This field is used in Output records to indicate that the output is
1966 * completely written to RAM. This field should be read as '1' to
1967 * indicate that the output has been completely written. When writing a
1968 * command completion or response to an internal processor, the order of
1969 * writes has to be such that this field is written last.
1972 } __attribute__((packed));
1974 /* hwrm_func_qcaps */
1976 * Description: This command returns capabilities of a function. The input FID
1977 * value is used to indicate what function is being queried. This allows a
1978 * physical function driver to query virtual functions that are children of the
1979 * physical function. The output FID value is needed to configure Rings and
1980 * MSI-X vectors so their DMA operations appear correctly on the PCI bus.
1983 /* Input (24 bytes) */
1984 struct hwrm_func_qcaps_input {
1986 * This value indicates what type of request this is. The format for the
1987 * rest of the command is determined by this field.
1992 * This value indicates the what completion ring the request will be
1993 * optionally completed on. If the value is -1, then no CR completion
1994 * will be generated. Any other value must be a valid CR ring_id value
1995 * for this function.
1999 /* This value indicates the command sequence number. */
2003 * Target ID of this command. 0x0 - 0xFFF8 - Used for function ids
2004 * 0xFFF8 - 0xFFFE - Reserved for internal processors 0xFFFF - HWRM
2009 * This is the host address where the response will be written when the
2010 * request is complete. This area must be 16B aligned and must be
2011 * cleared to zero before the request is made.
2016 * Function ID of the function that is being queried. 0xFF... (All Fs)
2017 * if the query is for the requesting function.
2021 uint16_t unused_0[3];
2022 } __attribute__((packed));
2024 /* Output (80 bytes) */
2025 struct hwrm_func_qcaps_output {
2027 * Pass/Fail or error type Note: receiver to verify the in parameters,
2028 * and fail the call with an error when appropriate
2030 uint16_t error_code;
2032 /* This field returns the type of original request. */
2035 /* This field provides original sequence number of the command. */
2039 * This field is the length of the response in bytes. The last byte of
2040 * the response is a valid flag that will read as '1' when the command
2041 * has been completely written to memory.
2046 * FID value. This value is used to identify operations on the PCI bus
2047 * as belonging to a particular PCI function.
2052 * Port ID of port that this function is associated with. Valid only for
2053 * the PF. 0xFF... (All Fs) if this function is not associated with any
2054 * port. 0xFF... (All Fs) if this function is called from a VF.
2058 /* If 1, then Push mode is supported on this function. */
2059 #define HWRM_FUNC_QCAPS_OUTPUT_FLAGS_PUSH_MODE_SUPPORTED UINT32_C(0x1)
2061 * If 1, then the global MSI-X auto-masking is enabled for the device.
2063 #define HWRM_FUNC_QCAPS_OUTPUT_FLAGS_GLOBAL_MSIX_AUTOMASKING \
2066 * If 1, then the Precision Time Protocol (PTP) processing is supported
2067 * on this function. The HWRM should enable PTP on only a single
2068 * Physical Function (PF) per port.
2070 #define HWRM_FUNC_QCAPS_OUTPUT_FLAGS_PTP_SUPPORTED UINT32_C(0x4)
2074 * This value is current MAC address configured for this function. A
2075 * value of 00-00-00-00-00-00 indicates no MAC address is currently
2078 uint8_t perm_mac_address[6];
2081 * The maximum number of RSS/COS contexts that can be allocated to the
2084 uint16_t max_rsscos_ctx;
2087 * The maximum number of completion rings that can be allocated to the
2090 uint16_t max_cmpl_rings;
2093 * The maximum number of transmit rings that can be allocated to the
2096 uint16_t max_tx_rings;
2099 * The maximum number of receive rings that can be allocated to the
2102 uint16_t max_rx_rings;
2105 * The maximum number of L2 contexts that can be allocated to the
2108 uint16_t max_l2_ctxs;
2110 /* The maximum number of VNICs that can be allocated to the function. */
2114 * The identifier for the first VF enabled on a PF. This is valid only
2115 * on the PF with SR-IOV enabled. 0xFF... (All Fs) if this command is
2116 * called on a PF with SR-IOV disabled or on a VF.
2118 uint16_t first_vf_id;
2121 * The maximum number of VFs that can be allocated to the function. This
2122 * is valid only on the PF with SR-IOV enabled. 0xFF... (All Fs) if this
2123 * command is called on a PF with SR-IOV disabled or on a VF.
2128 * The maximum number of statistic contexts that can be allocated to the
2131 uint16_t max_stat_ctx;
2134 * The maximum number of Encapsulation records that can be offloaded by
2137 uint32_t max_encap_records;
2140 * The maximum number of decapsulation records that can be offloaded by
2143 uint32_t max_decap_records;
2146 * The maximum number of Exact Match (EM) flows that can be offloaded by
2147 * this function on the TX side.
2149 uint32_t max_tx_em_flows;
2152 * The maximum number of Wildcard Match (WM) flows that can be offloaded
2153 * by this function on the TX side.
2155 uint32_t max_tx_wm_flows;
2158 * The maximum number of Exact Match (EM) flows that can be offloaded by
2159 * this function on the RX side.
2161 uint32_t max_rx_em_flows;
2164 * The maximum number of Wildcard Match (WM) flows that can be offloaded
2165 * by this function on the RX side.
2167 uint32_t max_rx_wm_flows;
2170 * The maximum number of multicast filters that can be supported by this
2171 * function on the RX side.
2173 uint32_t max_mcast_filters;
2176 * The maximum value of flow_id that can be supported in completion
2179 uint32_t max_flow_id;
2182 * The maximum number of HW ring groups that can be supported on this
2185 uint32_t max_hw_ring_grps;
2192 * This field is used in Output records to indicate that the output is
2193 * completely written to RAM. This field should be read as '1' to
2194 * indicate that the output has been completely written. When writing a
2195 * command completion or response to an internal processor, the order of
2196 * writes has to be such that this field is written last.
2199 } __attribute__((packed));
2201 /* hwrm_func_reset */
2203 * Description: This command resets a hardware function (PCIe function) and
2204 * frees any resources used by the function. This command shall be initiated by
2205 * the driver after an FLR has occurred to prepare the function for re-use. This
2206 * command may also be initiated by a driver prior to doing it's own
2207 * configuration. This command puts the function into the reset state. In the
2208 * reset state, global and port related features of the chip are not available.
2211 * Note: This command will reset a function that has already been disabled or
2212 * idled. The command returns all the resources owned by the function so a new
2213 * driver may allocate and configure resources normally.
2216 /* Input (24 bytes) */
2217 struct hwrm_func_reset_input {
2219 * This value indicates what type of request this is. The format for the
2220 * rest of the command is determined by this field.
2225 * This value indicates the what completion ring the request will be
2226 * optionally completed on. If the value is -1, then no CR completion
2227 * will be generated. Any other value must be a valid CR ring_id value
2228 * for this function.
2232 /* This value indicates the command sequence number. */
2236 * Target ID of this command. 0x0 - 0xFFF8 - Used for function ids
2237 * 0xFFF8 - 0xFFFE - Reserved for internal processors 0xFFFF - HWRM
2242 * This is the host address where the response will be written when the
2243 * request is complete. This area must be 16B aligned and must be
2244 * cleared to zero before the request is made.
2248 /* This bit must be '1' for the vf_id_valid field to be configured. */
2249 #define HWRM_FUNC_RESET_INPUT_ENABLES_VF_ID_VALID \
2254 * The ID of the VF that this PF is trying to reset. Only the parent PF
2255 * shall be allowed to reset a child VF. A parent PF driver shall use
2256 * this field only when a specific child VF is requested to be reset.
2260 /* This value indicates the level of a function reset. */
2262 * Reset the caller function and its children VFs (if any). If
2263 * no children functions exist, then reset the caller function
2266 #define HWRM_FUNC_RESET_INPUT_FUNC_RESET_LEVEL_RESETALL \
2267 (UINT32_C(0x0) << 0)
2268 /* Reset the caller function only */
2269 #define HWRM_FUNC_RESET_INPUT_FUNC_RESET_LEVEL_RESETME \
2270 (UINT32_C(0x1) << 0)
2272 * Reset all children VFs of the caller function driver if the
2273 * caller is a PF driver. It is an error to specify this level
2274 * by a VF driver. It is an error to specify this level by a PF
2275 * driver with no children VFs.
2277 #define HWRM_FUNC_RESET_INPUT_FUNC_RESET_LEVEL_RESETCHILDREN \
2278 (UINT32_C(0x2) << 0)
2280 * Reset a specific VF of the caller function driver if the
2281 * caller is the parent PF driver. It is an error to specify
2282 * this level by a VF driver. It is an error to specify this
2283 * level by a PF driver that is not the parent of the VF that is
2284 * being requested to reset.
2286 #define HWRM_FUNC_RESET_INPUT_FUNC_RESET_LEVEL_RESETVF \
2287 (UINT32_C(0x3) << 0)
2288 uint8_t func_reset_level;
2291 } __attribute__((packed));
2293 /* Output (16 bytes) */
2294 struct hwrm_func_reset_output {
2296 * Pass/Fail or error type Note: receiver to verify the in parameters,
2297 * and fail the call with an error when appropriate
2299 uint16_t error_code;
2301 /* This field returns the type of original request. */
2304 /* This field provides original sequence number of the command. */
2308 * This field is the length of the response in bytes. The last byte of
2309 * the response is a valid flag that will read as '1' when the command
2310 * has been completely written to memory.
2320 * This field is used in Output records to indicate that the output is
2321 * completely written to RAM. This field should be read as '1' to
2322 * indicate that the output has been completely written. When writing a
2323 * command completion or response to an internal processor, the order of
2324 * writes has to be such that this field is written last.
2327 } __attribute__((packed));
2329 /* hwrm_port_phy_cfg */
2331 * Description: This command configures the PHY device for the port. It allows
2332 * setting of the most generic settings for the PHY. The HWRM shall complete
2333 * this command as soon as PHY settings are configured. They may not be applied
2334 * when the command response is provided. A VF driver shall not be allowed to
2335 * configure PHY using this command. In a network partition mode, a PF driver
2336 * shall not be allowed to configure PHY using this command.
2339 /* Input (56 bytes) */
2340 struct hwrm_port_phy_cfg_input {
2342 * This value indicates what type of request this is. The format for the
2343 * rest of the command is determined by this field.
2348 * This value indicates the what completion ring the request will be
2349 * optionally completed on. If the value is -1, then no CR completion
2350 * will be generated. Any other value must be a valid CR ring_id value
2351 * for this function.
2355 /* This value indicates the command sequence number. */
2359 * Target ID of this command. 0x0 - 0xFFF8 - Used for function ids
2360 * 0xFFF8 - 0xFFFE - Reserved for internal processors 0xFFFF - HWRM
2365 * This is the host address where the response will be written when the
2366 * request is complete. This area must be 16B aligned and must be
2367 * cleared to zero before the request is made.
2372 * When this bit is set to '1', the PHY for the port shall be reset. #
2373 * If this bit is set to 1, then the HWRM shall reset the PHY after
2374 * applying PHY configuration changes specified in this command. # In
2375 * order to guarantee that PHY configuration changes specified in this
2376 * command take effect, the HWRM client should set this flag to 1. # If
2377 * this bit is not set to 1, then the HWRM may reset the PHY depending
2378 * on the current PHY configuration and settings specified in this
2381 #define HWRM_PORT_PHY_CFG_INPUT_FLAGS_RESET_PHY UINT32_C(0x1)
2383 * When this bit is set to '1', the link shall be forced to be taken
2384 * down. # When this bit is set to '1", all other command input settings
2385 * related to the link speed shall be ignored. Once the link state is
2386 * forced down, it can be explicitly cleared from that state by setting
2387 * this flag to '0'. # If this flag is set to '0', then the link shall
2388 * be cleared from forced down state if the link is in forced down
2389 * state. There may be conditions (e.g. out-of-band or sideband
2390 * configuration changes for the link) outside the scope of the HWRM
2391 * implementation that may clear forced down link state.
2393 #define HWRM_PORT_PHY_CFG_INPUT_FLAGS_FORCE_LINK_DOWN UINT32_C(0x2)
2395 * When this bit is set to '1', the link shall be forced to the
2396 * force_link_speed value. When this bit is set to '1', the HWRM client
2397 * should not enable any of the auto negotiation related fields
2398 * represented by auto_XXX fields in this command. When this bit is set
2399 * to '1' and the HWRM client has enabled a auto_XXX field in this
2400 * command, then the HWRM shall ignore the enabled auto_XXX field. When
2401 * this bit is set to zero, the link shall be allowed to autoneg.
2403 #define HWRM_PORT_PHY_CFG_INPUT_FLAGS_FORCE UINT32_C(0x4)
2405 * When this bit is set to '1', the auto-negotiation process shall be
2406 * restarted on the link.
2408 #define HWRM_PORT_PHY_CFG_INPUT_FLAGS_RESTART_AUTONEG UINT32_C(0x8)
2410 * When this bit is set to '1', Energy Efficient Ethernet (EEE) is
2411 * requested to be enabled on this link. If EEE is not supported on this
2412 * port, then this flag shall be ignored by the HWRM.
2414 #define HWRM_PORT_PHY_CFG_INPUT_FLAGS_EEE_ENABLE UINT32_C(0x10)
2416 * When this bit is set to '1', Energy Efficient Ethernet (EEE) is
2417 * requested to be disabled on this link. If EEE is not supported on
2418 * this port, then this flag shall be ignored by the HWRM.
2420 #define HWRM_PORT_PHY_CFG_INPUT_FLAGS_EEE_DISABLE UINT32_C(0x20)
2422 * When this bit is set to '1' and EEE is enabled on this link, then TX
2423 * LPI is requested to be enabled on the link. If EEE is not supported
2424 * on this port, then this flag shall be ignored by the HWRM. If EEE is
2425 * disabled on this port, then this flag shall be ignored by the HWRM.
2427 #define HWRM_PORT_PHY_CFG_INPUT_FLAGS_EEE_TX_LPI UINT32_C(0x40)
2430 /* This bit must be '1' for the auto_mode field to be configured. */
2431 #define HWRM_PORT_PHY_CFG_INPUT_ENABLES_AUTO_MODE UINT32_C(0x1)
2432 /* This bit must be '1' for the auto_duplex field to be configured. */
2433 #define HWRM_PORT_PHY_CFG_INPUT_ENABLES_AUTO_DUPLEX UINT32_C(0x2)
2434 /* This bit must be '1' for the auto_pause field to be configured. */
2435 #define HWRM_PORT_PHY_CFG_INPUT_ENABLES_AUTO_PAUSE UINT32_C(0x4)
2437 * This bit must be '1' for the auto_link_speed field to be configured.
2439 #define HWRM_PORT_PHY_CFG_INPUT_ENABLES_AUTO_LINK_SPEED UINT32_C(0x8)
2441 * This bit must be '1' for the auto_link_speed_mask field to be
2444 #define HWRM_PORT_PHY_CFG_INPUT_ENABLES_AUTO_LINK_SPEED_MASK \
2446 /* This bit must be '1' for the wirespeed field to be configured. */
2447 #define HWRM_PORT_PHY_CFG_INPUT_ENABLES_WIRESPEED UINT32_C(0x20)
2448 /* This bit must be '1' for the lpbk field to be configured. */
2449 #define HWRM_PORT_PHY_CFG_INPUT_ENABLES_LPBK UINT32_C(0x40)
2450 /* This bit must be '1' for the preemphasis field to be configured. */
2451 #define HWRM_PORT_PHY_CFG_INPUT_ENABLES_PREEMPHASIS UINT32_C(0x80)
2452 /* This bit must be '1' for the force_pause field to be configured. */
2453 #define HWRM_PORT_PHY_CFG_INPUT_ENABLES_FORCE_PAUSE UINT32_C(0x100)
2455 * This bit must be '1' for the eee_link_speed_mask field to be
2458 #define HWRM_PORT_PHY_CFG_INPUT_ENABLES_EEE_LINK_SPEED_MASK \
2460 /* This bit must be '1' for the tx_lpi_timer field to be configured. */
2461 #define HWRM_PORT_PHY_CFG_INPUT_ENABLES_TX_LPI_TIMER UINT32_C(0x400)
2464 /* Port ID of port that is to be configured. */
2468 * This is the speed that will be used if the force bit is '1'. If
2469 * unsupported speed is selected, an error will be generated.
2471 /* 100Mb link speed */
2472 #define HWRM_PORT_PHY_CFG_INPUT_FORCE_LINK_SPEED_100MB \
2473 (UINT32_C(0x1) << 0)
2474 /* 1Gb link speed */
2475 #define HWRM_PORT_PHY_CFG_INPUT_FORCE_LINK_SPEED_1GB \
2476 (UINT32_C(0xa) << 0)
2477 /* 2Gb link speed */
2478 #define HWRM_PORT_PHY_CFG_INPUT_FORCE_LINK_SPEED_2GB \
2479 (UINT32_C(0x14) << 0)
2480 /* 2.5Gb link speed */
2481 #define HWRM_PORT_PHY_CFG_INPUT_FORCE_LINK_SPEED_2_5GB \
2482 (UINT32_C(0x19) << 0)
2483 /* 10Gb link speed */
2484 #define HWRM_PORT_PHY_CFG_INPUT_FORCE_LINK_SPEED_10GB \
2485 (UINT32_C(0x64) << 0)
2486 /* 20Mb link speed */
2487 #define HWRM_PORT_PHY_CFG_INPUT_FORCE_LINK_SPEED_20GB \
2488 (UINT32_C(0xc8) << 0)
2489 /* 25Gb link speed */
2490 #define HWRM_PORT_PHY_CFG_INPUT_FORCE_LINK_SPEED_25GB \
2491 (UINT32_C(0xfa) << 0)
2492 /* 40Gb link speed */
2493 #define HWRM_PORT_PHY_CFG_INPUT_FORCE_LINK_SPEED_40GB \
2494 (UINT32_C(0x190) << 0)
2495 /* 50Gb link speed */
2496 #define HWRM_PORT_PHY_CFG_INPUT_FORCE_LINK_SPEED_50GB \
2497 (UINT32_C(0x1f4) << 0)
2498 /* 100Gb link speed */
2499 #define HWRM_PORT_PHY_CFG_INPUT_FORCE_LINK_SPEED_100GB \
2500 (UINT32_C(0x3e8) << 0)
2501 /* 10Mb link speed */
2502 #define HWRM_PORT_PHY_CFG_INPUT_FORCE_LINK_SPEED_10MB \
2503 (UINT32_C(0xffff) << 0)
2504 uint16_t force_link_speed;
2507 * This value is used to identify what autoneg mode is used when the
2508 * link speed is not being forced.
2511 * Disable autoneg or autoneg disabled. No speeds are selected.
2513 #define HWRM_PORT_PHY_CFG_INPUT_AUTO_MODE_NONE (UINT32_C(0x0) << 0)
2514 /* Select all possible speeds for autoneg mode. */
2515 #define HWRM_PORT_PHY_CFG_INPUT_AUTO_MODE_ALL_SPEEDS \
2516 (UINT32_C(0x1) << 0)
2518 * Select only the auto_link_speed speed for autoneg mode. This
2519 * mode has been DEPRECATED. An HWRM client should not use this
2522 #define HWRM_PORT_PHY_CFG_INPUT_AUTO_MODE_ONE_SPEED \
2523 (UINT32_C(0x2) << 0)
2525 * Select the auto_link_speed or any speed below that speed for
2526 * autoneg. This mode has been DEPRECATED. An HWRM client should
2527 * not use this mode.
2529 #define HWRM_PORT_PHY_CFG_INPUT_AUTO_MODE_ONE_OR_BELOW \
2530 (UINT32_C(0x3) << 0)
2532 * Select the speeds based on the corresponding link speed mask
2533 * value that is provided.
2535 #define HWRM_PORT_PHY_CFG_INPUT_AUTO_MODE_SPEED_MASK \
2536 (UINT32_C(0x4) << 0)
2540 * This is the duplex setting that will be used if the autoneg_mode is
2541 * "one_speed" or "one_or_below".
2543 /* Half Duplex will be requested. */
2544 #define HWRM_PORT_PHY_CFG_INPUT_AUTO_DUPLEX_HALF \
2545 (UINT32_C(0x0) << 0)
2546 /* Full duplex will be requested. */
2547 #define HWRM_PORT_PHY_CFG_INPUT_AUTO_DUPLEX_FULL \
2548 (UINT32_C(0x1) << 0)
2549 /* Both Half and Full dupex will be requested. */
2550 #define HWRM_PORT_PHY_CFG_INPUT_AUTO_DUPLEX_BOTH \
2551 (UINT32_C(0x2) << 0)
2552 uint8_t auto_duplex;
2555 * This value is used to configure the pause that will be used for
2556 * autonegotiation. Add text on the usage of auto_pause and force_pause.
2559 * When this bit is '1', Generation of tx pause messages has been
2560 * requested. Disabled otherwise.
2562 #define HWRM_PORT_PHY_CFG_INPUT_AUTO_PAUSE_TX UINT32_C(0x1)
2564 * When this bit is '1', Reception of rx pause messages has been
2565 * requested. Disabled otherwise.
2567 #define HWRM_PORT_PHY_CFG_INPUT_AUTO_PAUSE_RX UINT32_C(0x2)
2569 * When set to 1, the advertisement of pause is enabled. # When the
2570 * auto_mode is not set to none and this flag is set to 1, then the
2571 * auto_pause bits on this port are being advertised and autoneg pause
2572 * results are being interpreted. # When the auto_mode is not set to
2573 * none and this flag is set to 0, the pause is forced as indicated in
2574 * force_pause, and also advertised as auto_pause bits, but the autoneg
2575 * results are not interpreted since the pause configuration is being
2576 * forced. # When the auto_mode is set to none and this flag is set to
2577 * 1, auto_pause bits should be ignored and should be set to 0.
2579 #define HWRM_PORT_PHY_CFG_INPUT_AUTO_PAUSE_AUTONEG_PAUSE UINT32_C(0x4)
2585 * This is the speed that will be used if the autoneg_mode is
2586 * "one_speed" or "one_or_below". If an unsupported speed is selected,
2587 * an error will be generated.
2589 /* 100Mb link speed */
2590 #define HWRM_PORT_PHY_CFG_INPUT_AUTO_LINK_SPEED_100MB \
2591 (UINT32_C(0x1) << 0)
2592 /* 1Gb link speed */
2593 #define HWRM_PORT_PHY_CFG_INPUT_AUTO_LINK_SPEED_1GB \
2594 (UINT32_C(0xa) << 0)
2595 /* 2Gb link speed */
2596 #define HWRM_PORT_PHY_CFG_INPUT_AUTO_LINK_SPEED_2GB \
2597 (UINT32_C(0x14) << 0)
2598 /* 2.5Gb link speed */
2599 #define HWRM_PORT_PHY_CFG_INPUT_AUTO_LINK_SPEED_2_5GB \
2600 (UINT32_C(0x19) << 0)
2601 /* 10Gb link speed */
2602 #define HWRM_PORT_PHY_CFG_INPUT_AUTO_LINK_SPEED_10GB \
2603 (UINT32_C(0x64) << 0)
2604 /* 20Mb link speed */
2605 #define HWRM_PORT_PHY_CFG_INPUT_AUTO_LINK_SPEED_20GB \
2606 (UINT32_C(0xc8) << 0)
2607 /* 25Gb link speed */
2608 #define HWRM_PORT_PHY_CFG_INPUT_AUTO_LINK_SPEED_25GB \
2609 (UINT32_C(0xfa) << 0)
2610 /* 40Gb link speed */
2611 #define HWRM_PORT_PHY_CFG_INPUT_AUTO_LINK_SPEED_40GB \
2612 (UINT32_C(0x190) << 0)
2613 /* 50Gb link speed */
2614 #define HWRM_PORT_PHY_CFG_INPUT_AUTO_LINK_SPEED_50GB \
2615 (UINT32_C(0x1f4) << 0)
2616 /* 100Gb link speed */
2617 #define HWRM_PORT_PHY_CFG_INPUT_AUTO_LINK_SPEED_100GB \
2618 (UINT32_C(0x3e8) << 0)
2619 /* 10Mb link speed */
2620 #define HWRM_PORT_PHY_CFG_INPUT_AUTO_LINK_SPEED_10MB \
2621 (UINT32_C(0xffff) << 0)
2622 uint16_t auto_link_speed;
2625 * This is a mask of link speeds that will be used if autoneg_mode is
2626 * "mask". If unsupported speed is enabled an error will be generated.
2628 /* 100Mb link speed (Half-duplex) */
2629 #define HWRM_PORT_PHY_CFG_INPUT_AUTO_LINK_SPEED_MASK_100MBHD \
2631 /* 100Mb link speed (Full-duplex) */
2632 #define HWRM_PORT_PHY_CFG_INPUT_AUTO_LINK_SPEED_MASK_100MB \
2634 /* 1Gb link speed (Half-duplex) */
2635 #define HWRM_PORT_PHY_CFG_INPUT_AUTO_LINK_SPEED_MASK_1GBHD \
2637 /* 1Gb link speed (Full-duplex) */
2638 #define HWRM_PORT_PHY_CFG_INPUT_AUTO_LINK_SPEED_MASK_1GB \
2640 /* 2Gb link speed */
2641 #define HWRM_PORT_PHY_CFG_INPUT_AUTO_LINK_SPEED_MASK_2GB \
2643 /* 2.5Gb link speed */
2644 #define HWRM_PORT_PHY_CFG_INPUT_AUTO_LINK_SPEED_MASK_2_5GB \
2646 /* 10Gb link speed */
2647 #define HWRM_PORT_PHY_CFG_INPUT_AUTO_LINK_SPEED_MASK_10GB \
2649 /* 20Gb link speed */
2650 #define HWRM_PORT_PHY_CFG_INPUT_AUTO_LINK_SPEED_MASK_20GB \
2652 /* 25Gb link speed */
2653 #define HWRM_PORT_PHY_CFG_INPUT_AUTO_LINK_SPEED_MASK_25GB \
2655 /* 40Gb link speed */
2656 #define HWRM_PORT_PHY_CFG_INPUT_AUTO_LINK_SPEED_MASK_40GB \
2658 /* 50Gb link speed */
2659 #define HWRM_PORT_PHY_CFG_INPUT_AUTO_LINK_SPEED_MASK_50GB \
2661 /* 100Gb link speed */
2662 #define HWRM_PORT_PHY_CFG_INPUT_AUTO_LINK_SPEED_MASK_100GB \
2664 /* 10Mb link speed (Half-duplex) */
2665 #define HWRM_PORT_PHY_CFG_INPUT_AUTO_LINK_SPEED_MASK_10MBHD \
2667 /* 10Mb link speed (Full-duplex) */
2668 #define HWRM_PORT_PHY_CFG_INPUT_AUTO_LINK_SPEED_MASK_10MB \
2670 uint16_t auto_link_speed_mask;
2672 /* This value controls the wirespeed feature. */
2673 /* Wirespeed feature is disabled. */
2674 #define HWRM_PORT_PHY_CFG_INPUT_WIRESPEED_OFF (UINT32_C(0x0) << 0)
2675 /* Wirespeed feature is enabled. */
2676 #define HWRM_PORT_PHY_CFG_INPUT_WIRESPEED_ON (UINT32_C(0x1) << 0)
2679 /* This value controls the loopback setting for the PHY. */
2680 /* No loopback is selected. Normal operation. */
2681 #define HWRM_PORT_PHY_CFG_INPUT_LPBK_NONE (UINT32_C(0x0) << 0)
2683 * The HW will be configured with local loopback such that host
2684 * data is sent back to the host without modification.
2686 #define HWRM_PORT_PHY_CFG_INPUT_LPBK_LOCAL (UINT32_C(0x1) << 0)
2688 * The HW will be configured with remote loopback such that port
2689 * logic will send packets back out the transmitter that are
2692 #define HWRM_PORT_PHY_CFG_INPUT_LPBK_REMOTE (UINT32_C(0x2) << 0)
2696 * This value is used to configure the pause that will be used for force
2700 * When this bit is '1', Generation of tx pause messages is supported.
2701 * Disabled otherwise.
2703 #define HWRM_PORT_PHY_CFG_INPUT_FORCE_PAUSE_TX UINT32_C(0x1)
2705 * When this bit is '1', Reception of rx pause messages is supported.
2706 * Disabled otherwise.
2708 #define HWRM_PORT_PHY_CFG_INPUT_FORCE_PAUSE_RX UINT32_C(0x2)
2709 uint8_t force_pause;
2714 * This value controls the pre-emphasis to be used for the link. Driver
2715 * should not set this value (use enable.preemphasis = 0) unless driver
2716 * is sure of setting. Normally HWRM FW will determine proper pre-
2719 uint32_t preemphasis;
2722 * Setting for link speed mask that is used to advertise speeds during
2723 * autonegotiation when EEE is enabled. This field is valid only when
2724 * EEE is enabled. The speeds specified in this field shall be a subset
2725 * of speeds specified in auto_link_speed_mask. If EEE is enabled,then
2726 * at least one speed shall be provided in this mask.
2729 #define HWRM_PORT_PHY_CFG_INPUT_EEE_LINK_SPEED_MASK_RSVD1 UINT32_C(0x1)
2730 /* 100Mb link speed (Full-duplex) */
2731 #define HWRM_PORT_PHY_CFG_INPUT_EEE_LINK_SPEED_MASK_100MB UINT32_C(0x2)
2733 #define HWRM_PORT_PHY_CFG_INPUT_EEE_LINK_SPEED_MASK_RSVD2 UINT32_C(0x4)
2734 /* 1Gb link speed (Full-duplex) */
2735 #define HWRM_PORT_PHY_CFG_INPUT_EEE_LINK_SPEED_MASK_1GB UINT32_C(0x8)
2737 #define HWRM_PORT_PHY_CFG_INPUT_EEE_LINK_SPEED_MASK_RSVD3 \
2740 #define HWRM_PORT_PHY_CFG_INPUT_EEE_LINK_SPEED_MASK_RSVD4 \
2742 /* 10Gb link speed */
2743 #define HWRM_PORT_PHY_CFG_INPUT_EEE_LINK_SPEED_MASK_10GB \
2745 uint16_t eee_link_speed_mask;
2751 * Reuested setting of TX LPI timer in microseconds. This field is valid
2752 * only when EEE is enabled and TX LPI is enabled.
2754 #define HWRM_PORT_PHY_CFG_INPUT_TX_LPI_TIMER_MASK \
2756 #define HWRM_PORT_PHY_CFG_INPUT_TX_LPI_TIMER_SFT 0
2757 uint32_t tx_lpi_timer;
2760 } __attribute__((packed));
2762 /* Output (16 bytes) */
2763 struct hwrm_port_phy_cfg_output {
2765 * Pass/Fail or error type Note: receiver to verify the in parameters,
2766 * and fail the call with an error when appropriate
2768 uint16_t error_code;
2770 /* This field returns the type of original request. */
2773 /* This field provides original sequence number of the command. */
2777 * This field is the length of the response in bytes. The last byte of
2778 * the response is a valid flag that will read as '1' when the command
2779 * has been completely written to memory.
2789 * This field is used in Output records to indicate that the output is
2790 * completely written to RAM. This field should be read as '1' to
2791 * indicate that the output has been completely written. When writing a
2792 * command completion or response to an internal processor, the order of
2793 * writes has to be such that this field is written last.
2796 } __attribute__((packed));
2798 /* hwrm_port_phy_qcfg */
2799 /* Description: This command queries the PHY configuration for the port. */
2800 /* Input (24 bytes) */
2802 struct hwrm_port_phy_qcfg_input {
2804 * This value indicates what type of request this is. The format for the
2805 * rest of the command is determined by this field.
2810 * This value indicates the what completion ring the request will be
2811 * optionally completed on. If the value is -1, then no CR completion
2812 * will be generated. Any other value must be a valid CR ring_id value
2813 * for this function.
2817 /* This value indicates the command sequence number. */
2821 * Target ID of this command. 0x0 - 0xFFF8 - Used for function ids
2822 * 0xFFF8 - 0xFFFE - Reserved for internal processors 0xFFFF - HWRM
2827 * This is the host address where the response will be written when the
2828 * request is complete. This area must be 16B aligned and must be
2829 * cleared to zero before the request is made.
2833 /* Port ID of port that is to be queried. */
2836 uint16_t unused_0[3];
2837 } __attribute__((packed));
2839 /* Output (96 bytes) */
2840 struct hwrm_port_phy_qcfg_output {
2842 * Pass/Fail or error type Note: receiver to verify the in parameters,
2843 * and fail the call with an error when appropriate
2845 uint16_t error_code;
2847 /* This field returns the type of original request. */
2850 /* This field provides original sequence number of the command. */
2854 * This field is the length of the response in bytes. The last byte of
2855 * the response is a valid flag that will read as '1' when the command
2856 * has been completely written to memory.
2860 /* This value indicates the current link status. */
2861 /* There is no link or cable detected. */
2862 #define HWRM_PORT_PHY_QCFG_OUTPUT_LINK_NO_LINK (UINT32_C(0x0) << 0)
2863 /* There is no link, but a cable has been detected. */
2864 #define HWRM_PORT_PHY_QCFG_OUTPUT_LINK_SIGNAL (UINT32_C(0x1) << 0)
2865 /* There is a link. */
2866 #define HWRM_PORT_PHY_QCFG_OUTPUT_LINK_LINK (UINT32_C(0x2) << 0)
2871 /* This value indicates the current link speed of the connection. */
2872 /* 100Mb link speed */
2873 #define HWRM_PORT_PHY_QCFG_OUTPUT_LINK_SPEED_100MB \
2874 (UINT32_C(0x1) << 0)
2875 /* 1Gb link speed */
2876 #define HWRM_PORT_PHY_QCFG_OUTPUT_LINK_SPEED_1GB \
2877 (UINT32_C(0xa) << 0)
2878 /* 2Gb link speed */
2879 #define HWRM_PORT_PHY_QCFG_OUTPUT_LINK_SPEED_2GB \
2880 (UINT32_C(0x14) << 0)
2881 /* 2.5Gb link speed */
2882 #define HWRM_PORT_PHY_QCFG_OUTPUT_LINK_SPEED_2_5GB \
2883 (UINT32_C(0x19) << 0)
2884 /* 10Gb link speed */
2885 #define HWRM_PORT_PHY_QCFG_OUTPUT_LINK_SPEED_10GB \
2886 (UINT32_C(0x64) << 0)
2887 /* 20Mb link speed */
2888 #define HWRM_PORT_PHY_QCFG_OUTPUT_LINK_SPEED_20GB \
2889 (UINT32_C(0xc8) << 0)
2890 /* 25Gb link speed */
2891 #define HWRM_PORT_PHY_QCFG_OUTPUT_LINK_SPEED_25GB \
2892 (UINT32_C(0xfa) << 0)
2893 /* 40Gb link speed */
2894 #define HWRM_PORT_PHY_QCFG_OUTPUT_LINK_SPEED_40GB \
2895 (UINT32_C(0x190) << 0)
2896 /* 50Gb link speed */
2897 #define HWRM_PORT_PHY_QCFG_OUTPUT_LINK_SPEED_50GB \
2898 (UINT32_C(0x1f4) << 0)
2899 /* 100Gb link speed */
2900 #define HWRM_PORT_PHY_QCFG_OUTPUT_LINK_SPEED_100GB \
2901 (UINT32_C(0x3e8) << 0)
2902 /* 10Mb link speed */
2903 #define HWRM_PORT_PHY_QCFG_OUTPUT_LINK_SPEED_10MB \
2904 (UINT32_C(0xffff) << 0)
2905 uint16_t link_speed;
2907 /* This value is indicates the duplex of the current connection. */
2908 /* Half Duplex connection. */
2909 #define HWRM_PORT_PHY_QCFG_OUTPUT_DUPLEX_HALF (UINT32_C(0x0) << 0)
2910 /* Full duplex connection. */
2911 #define HWRM_PORT_PHY_QCFG_OUTPUT_DUPLEX_FULL (UINT32_C(0x1) << 0)
2915 * This value is used to indicate the current pause configuration. When
2916 * autoneg is enabled, this value represents the autoneg results of
2917 * pause configuration.
2920 * When this bit is '1', Generation of tx pause messages is supported.
2921 * Disabled otherwise.
2923 #define HWRM_PORT_PHY_QCFG_OUTPUT_PAUSE_TX UINT32_C(0x1)
2925 * When this bit is '1', Reception of rx pause messages is supported.
2926 * Disabled otherwise.
2928 #define HWRM_PORT_PHY_QCFG_OUTPUT_PAUSE_RX UINT32_C(0x2)
2932 * The supported speeds for the port. This is a bit mask. For each speed
2933 * that is supported, the corrresponding bit will be set to '1'.
2935 /* 100Mb link speed (Half-duplex) */
2936 #define HWRM_PORT_PHY_QCFG_OUTPUT_SUPPORT_SPEEDS_100MBHD \
2938 /* 100Mb link speed (Full-duplex) */
2939 #define HWRM_PORT_PHY_QCFG_OUTPUT_SUPPORT_SPEEDS_100MB \
2941 /* 1Gb link speed (Half-duplex) */
2942 #define HWRM_PORT_PHY_QCFG_OUTPUT_SUPPORT_SPEEDS_1GBHD \
2944 /* 1Gb link speed (Full-duplex) */
2945 #define HWRM_PORT_PHY_QCFG_OUTPUT_SUPPORT_SPEEDS_1GB \
2947 /* 2Gb link speed */
2948 #define HWRM_PORT_PHY_QCFG_OUTPUT_SUPPORT_SPEEDS_2GB \
2950 /* 2.5Gb link speed */
2951 #define HWRM_PORT_PHY_QCFG_OUTPUT_SUPPORT_SPEEDS_2_5GB \
2953 /* 10Gb link speed */
2954 #define HWRM_PORT_PHY_QCFG_OUTPUT_SUPPORT_SPEEDS_10GB \
2956 /* 20Gb link speed */
2957 #define HWRM_PORT_PHY_QCFG_OUTPUT_SUPPORT_SPEEDS_20GB \
2959 /* 25Gb link speed */
2960 #define HWRM_PORT_PHY_QCFG_OUTPUT_SUPPORT_SPEEDS_25GB \
2962 /* 40Gb link speed */
2963 #define HWRM_PORT_PHY_QCFG_OUTPUT_SUPPORT_SPEEDS_40GB \
2965 /* 50Gb link speed */
2966 #define HWRM_PORT_PHY_QCFG_OUTPUT_SUPPORT_SPEEDS_50GB \
2968 /* 100Gb link speed */
2969 #define HWRM_PORT_PHY_QCFG_OUTPUT_SUPPORT_SPEEDS_100GB \
2971 /* 10Mb link speed (Half-duplex) */
2972 #define HWRM_PORT_PHY_QCFG_OUTPUT_SUPPORT_SPEEDS_10MBHD \
2974 /* 10Mb link speed (Full-duplex) */
2975 #define HWRM_PORT_PHY_QCFG_OUTPUT_SUPPORT_SPEEDS_10MB \
2977 uint16_t support_speeds;
2980 * Current setting of forced link speed. When the link speed is not
2981 * being forced, this value shall be set to 0.
2983 /* 100Mb link speed */
2984 #define HWRM_PORT_PHY_QCFG_OUTPUT_FORCE_LINK_SPEED_100MB \
2985 (UINT32_C(0x1) << 0)
2986 /* 1Gb link speed */
2987 #define HWRM_PORT_PHY_QCFG_OUTPUT_FORCE_LINK_SPEED_1GB \
2988 (UINT32_C(0xa) << 0)
2989 /* 2Gb link speed */
2990 #define HWRM_PORT_PHY_QCFG_OUTPUT_FORCE_LINK_SPEED_2GB \
2991 (UINT32_C(0x14) << 0)
2992 /* 2.5Gb link speed */
2993 #define HWRM_PORT_PHY_QCFG_OUTPUT_FORCE_LINK_SPEED_2_5GB \
2994 (UINT32_C(0x19) << 0)
2995 /* 10Gb link speed */
2996 #define HWRM_PORT_PHY_QCFG_OUTPUT_FORCE_LINK_SPEED_10GB \
2997 (UINT32_C(0x64) << 0)
2998 /* 20Mb link speed */
2999 #define HWRM_PORT_PHY_QCFG_OUTPUT_FORCE_LINK_SPEED_20GB \
3000 (UINT32_C(0xc8) << 0)
3001 /* 25Gb link speed */
3002 #define HWRM_PORT_PHY_QCFG_OUTPUT_FORCE_LINK_SPEED_25GB \
3003 (UINT32_C(0xfa) << 0)
3004 /* 40Gb link speed */
3005 #define HWRM_PORT_PHY_QCFG_OUTPUT_FORCE_LINK_SPEED_40GB \
3006 (UINT32_C(0x190) << 0)
3007 /* 50Gb link speed */
3008 #define HWRM_PORT_PHY_QCFG_OUTPUT_FORCE_LINK_SPEED_50GB \
3009 (UINT32_C(0x1f4) << 0)
3010 /* 100Gb link speed */
3011 #define HWRM_PORT_PHY_QCFG_OUTPUT_FORCE_LINK_SPEED_100GB \
3012 (UINT32_C(0x3e8) << 0)
3013 /* 10Mb link speed */
3014 #define HWRM_PORT_PHY_QCFG_OUTPUT_FORCE_LINK_SPEED_10MB \
3015 (UINT32_C(0xffff) << 0)
3016 uint16_t force_link_speed;
3018 /* Current setting of auto negotiation mode. */
3020 * Disable autoneg or autoneg disabled. No speeds are selected.
3022 #define HWRM_PORT_PHY_QCFG_OUTPUT_AUTO_MODE_NONE \
3023 (UINT32_C(0x0) << 0)
3024 /* Select all possible speeds for autoneg mode. */
3025 #define HWRM_PORT_PHY_QCFG_OUTPUT_AUTO_MODE_ALL_SPEEDS \
3026 (UINT32_C(0x1) << 0)
3028 * Select only the auto_link_speed speed for autoneg mode. This
3029 * mode has been DEPRECATED. An HWRM client should not use this
3032 #define HWRM_PORT_PHY_QCFG_OUTPUT_AUTO_MODE_ONE_SPEED \
3033 (UINT32_C(0x2) << 0)
3035 * Select the auto_link_speed or any speed below that speed for
3036 * autoneg. This mode has been DEPRECATED. An HWRM client should
3037 * not use this mode.
3039 #define HWRM_PORT_PHY_QCFG_OUTPUT_AUTO_MODE_ONE_OR_BELOW \
3040 (UINT32_C(0x3) << 0)
3042 * Select the speeds based on the corresponding link speed mask
3043 * value that is provided.
3045 #define HWRM_PORT_PHY_QCFG_OUTPUT_AUTO_MODE_SPEED_MASK \
3046 (UINT32_C(0x4) << 0)
3050 * Current setting of pause autonegotiation. Move autoneg_pause flag
3054 * When this bit is '1', Generation of tx pause messages has been
3055 * requested. Disabled otherwise.
3057 #define HWRM_PORT_PHY_QCFG_OUTPUT_AUTO_PAUSE_TX UINT32_C(0x1)
3059 * When this bit is '1', Reception of rx pause messages has been
3060 * requested. Disabled otherwise.
3062 #define HWRM_PORT_PHY_QCFG_OUTPUT_AUTO_PAUSE_RX UINT32_C(0x2)
3064 * When set to 1, the advertisement of pause is enabled. # When the
3065 * auto_mode is not set to none and this flag is set to 1, then the
3066 * auto_pause bits on this port are being advertised and autoneg pause
3067 * results are being interpreted. # When the auto_mode is not set to
3068 * none and this flag is set to 0, the pause is forced as indicated in
3069 * force_pause, and also advertised as auto_pause bits, but the autoneg
3070 * results are not interpreted since the pause configuration is being
3071 * forced. # When the auto_mode is set to none and this flag is set to
3072 * 1, auto_pause bits should be ignored and should be set to 0.
3074 #define HWRM_PORT_PHY_QCFG_OUTPUT_AUTO_PAUSE_AUTONEG_PAUSE \
3079 * Current setting for auto_link_speed. This field is only valid when
3080 * auto_mode is set to "one_speed" or "one_or_below".
3082 /* 100Mb link speed */
3083 #define HWRM_PORT_PHY_QCFG_OUTPUT_AUTO_LINK_SPEED_100MB \
3084 (UINT32_C(0x1) << 0)
3085 /* 1Gb link speed */
3086 #define HWRM_PORT_PHY_QCFG_OUTPUT_AUTO_LINK_SPEED_1GB \
3087 (UINT32_C(0xa) << 0)
3088 /* 2Gb link speed */
3089 #define HWRM_PORT_PHY_QCFG_OUTPUT_AUTO_LINK_SPEED_2GB \
3090 (UINT32_C(0x14) << 0)
3091 /* 2.5Gb link speed */
3092 #define HWRM_PORT_PHY_QCFG_OUTPUT_AUTO_LINK_SPEED_2_5GB \
3093 (UINT32_C(0x19) << 0)
3094 /* 10Gb link speed */
3095 #define HWRM_PORT_PHY_QCFG_OUTPUT_AUTO_LINK_SPEED_10GB \
3096 (UINT32_C(0x64) << 0)
3097 /* 20Mb link speed */
3098 #define HWRM_PORT_PHY_QCFG_OUTPUT_AUTO_LINK_SPEED_20GB \
3099 (UINT32_C(0xc8) << 0)
3100 /* 25Gb link speed */
3101 #define HWRM_PORT_PHY_QCFG_OUTPUT_AUTO_LINK_SPEED_25GB \
3102 (UINT32_C(0xfa) << 0)
3103 /* 40Gb link speed */
3104 #define HWRM_PORT_PHY_QCFG_OUTPUT_AUTO_LINK_SPEED_40GB \
3105 (UINT32_C(0x190) << 0)
3106 /* 50Gb link speed */
3107 #define HWRM_PORT_PHY_QCFG_OUTPUT_AUTO_LINK_SPEED_50GB \
3108 (UINT32_C(0x1f4) << 0)
3109 /* 100Gb link speed */
3110 #define HWRM_PORT_PHY_QCFG_OUTPUT_AUTO_LINK_SPEED_100GB \
3111 (UINT32_C(0x3e8) << 0)
3112 /* 10Mb link speed */
3113 #define HWRM_PORT_PHY_QCFG_OUTPUT_AUTO_LINK_SPEED_10MB \
3114 (UINT32_C(0xffff) << 0)
3115 uint16_t auto_link_speed;
3118 * Current setting for auto_link_speed_mask that is used to advertise
3119 * speeds during autonegotiation. This field is only valid when
3120 * auto_mode is set to "mask". The speeds specified in this field shall
3121 * be a subset of supported speeds on this port.
3123 /* 100Mb link speed (Half-duplex) */
3124 #define HWRM_PORT_PHY_QCFG_OUTPUT_AUTO_LINK_SPEED_MASK_100MBHD \
3126 /* 100Mb link speed (Full-duplex) */
3127 #define HWRM_PORT_PHY_QCFG_OUTPUT_AUTO_LINK_SPEED_MASK_100MB \
3129 /* 1Gb link speed (Half-duplex) */
3130 #define HWRM_PORT_PHY_QCFG_OUTPUT_AUTO_LINK_SPEED_MASK_1GBHD \
3132 /* 1Gb link speed (Full-duplex) */
3133 #define HWRM_PORT_PHY_QCFG_OUTPUT_AUTO_LINK_SPEED_MASK_1GB \
3135 /* 2Gb link speed */
3136 #define HWRM_PORT_PHY_QCFG_OUTPUT_AUTO_LINK_SPEED_MASK_2GB \
3138 /* 2.5Gb link speed */
3139 #define HWRM_PORT_PHY_QCFG_OUTPUT_AUTO_LINK_SPEED_MASK_2_5GB \
3141 /* 10Gb link speed */
3142 #define HWRM_PORT_PHY_QCFG_OUTPUT_AUTO_LINK_SPEED_MASK_10GB \
3144 /* 20Gb link speed */
3145 #define HWRM_PORT_PHY_QCFG_OUTPUT_AUTO_LINK_SPEED_MASK_20GB \
3147 /* 25Gb link speed */
3148 #define HWRM_PORT_PHY_QCFG_OUTPUT_AUTO_LINK_SPEED_MASK_25GB \
3150 /* 40Gb link speed */
3151 #define HWRM_PORT_PHY_QCFG_OUTPUT_AUTO_LINK_SPEED_MASK_40GB \
3153 /* 50Gb link speed */
3154 #define HWRM_PORT_PHY_QCFG_OUTPUT_AUTO_LINK_SPEED_MASK_50GB \
3156 /* 100Gb link speed */
3157 #define HWRM_PORT_PHY_QCFG_OUTPUT_AUTO_LINK_SPEED_MASK_100GB \
3159 /* 10Mb link speed (Half-duplex) */
3160 #define HWRM_PORT_PHY_QCFG_OUTPUT_AUTO_LINK_SPEED_MASK_10MBHD \
3162 /* 10Mb link speed (Full-duplex) */
3163 #define HWRM_PORT_PHY_QCFG_OUTPUT_AUTO_LINK_SPEED_MASK_10MB \
3165 uint16_t auto_link_speed_mask;
3167 /* Current setting for wirespeed. */
3168 /* Wirespeed feature is disabled. */
3169 #define HWRM_PORT_PHY_QCFG_OUTPUT_WIRESPEED_OFF (UINT32_C(0x0) << 0)
3170 /* Wirespeed feature is enabled. */
3171 #define HWRM_PORT_PHY_QCFG_OUTPUT_WIRESPEED_ON (UINT32_C(0x1) << 0)
3174 /* Current setting for loopback. */
3175 /* No loopback is selected. Normal operation. */
3176 #define HWRM_PORT_PHY_QCFG_OUTPUT_LPBK_NONE (UINT32_C(0x0) << 0)
3178 * The HW will be configured with local loopback such that host
3179 * data is sent back to the host without modification.
3181 #define HWRM_PORT_PHY_QCFG_OUTPUT_LPBK_LOCAL (UINT32_C(0x1) << 0)
3183 * The HW will be configured with remote loopback such that port
3184 * logic will send packets back out the transmitter that are
3187 #define HWRM_PORT_PHY_QCFG_OUTPUT_LPBK_REMOTE (UINT32_C(0x2) << 0)
3191 * Current setting of forced pause. When the pause configuration is not
3192 * being forced, then this value shall be set to 0.
3195 * When this bit is '1', Generation of tx pause messages is supported.
3196 * Disabled otherwise.
3198 #define HWRM_PORT_PHY_QCFG_OUTPUT_FORCE_PAUSE_TX \
3201 * When this bit is '1', Reception of rx pause messages is supported.
3202 * Disabled otherwise.
3204 #define HWRM_PORT_PHY_QCFG_OUTPUT_FORCE_PAUSE_RX \
3206 uint8_t force_pause;
3209 * This value indicates the current status of the optics module on this
3212 /* Module is inserted and accepted */
3213 #define HWRM_PORT_PHY_QCFG_OUTPUT_MODULE_STATUS_NONE \
3214 (UINT32_C(0x0) << 0)
3215 /* Module is rejected and transmit side Laser is disabled. */
3216 #define HWRM_PORT_PHY_QCFG_OUTPUT_MODULE_STATUS_DISABLETX \
3217 (UINT32_C(0x1) << 0)
3218 /* Module mismatch warning. */
3219 #define HWRM_PORT_PHY_QCFG_OUTPUT_MODULE_STATUS_WARNINGMSG \
3220 (UINT32_C(0x2) << 0)
3221 /* Module is rejected and powered down. */
3222 #define HWRM_PORT_PHY_QCFG_OUTPUT_MODULE_STATUS_PWRDOWN \
3223 (UINT32_C(0x3) << 0)
3224 /* Module is not inserted. */
3225 #define HWRM_PORT_PHY_QCFG_OUTPUT_MODULE_STATUS_NOTINSERTED \
3226 (UINT32_C(0x4) << 0)
3227 /* Module status is not applicable. */
3228 #define HWRM_PORT_PHY_QCFG_OUTPUT_MODULE_STATUS_NOTAPPLICABLE \
3229 (UINT32_C(0xff) << 0)
3230 uint8_t module_status;
3232 /* Current setting for preemphasis. */
3233 uint32_t preemphasis;
3235 /* This field represents the major version of the PHY. */
3238 /* This field represents the minor version of the PHY. */
3241 /* This field represents the build version of the PHY. */
3244 /* This value represents a PHY type. */
3246 #define HWRM_PORT_PHY_QCFG_OUTPUT_PHY_TYPE_UNKNOWN \
3247 (UINT32_C(0x0) << 0)
3249 #define HWRM_PORT_PHY_QCFG_OUTPUT_PHY_TYPE_BASECR \
3250 (UINT32_C(0x1) << 0)
3251 /* BASE-KR4 (Deprecated) */
3252 #define HWRM_PORT_PHY_QCFG_OUTPUT_PHY_TYPE_BASEKR4 \
3253 (UINT32_C(0x2) << 0)
3255 #define HWRM_PORT_PHY_QCFG_OUTPUT_PHY_TYPE_BASELR \
3256 (UINT32_C(0x3) << 0)
3258 #define HWRM_PORT_PHY_QCFG_OUTPUT_PHY_TYPE_BASESR \
3259 (UINT32_C(0x4) << 0)
3260 /* BASE-KR2 (Deprecated) */
3261 #define HWRM_PORT_PHY_QCFG_OUTPUT_PHY_TYPE_BASEKR2 \
3262 (UINT32_C(0x5) << 0)
3264 #define HWRM_PORT_PHY_QCFG_OUTPUT_PHY_TYPE_BASEKX \
3265 (UINT32_C(0x6) << 0)
3267 #define HWRM_PORT_PHY_QCFG_OUTPUT_PHY_TYPE_BASEKR \
3268 (UINT32_C(0x7) << 0)
3270 #define HWRM_PORT_PHY_QCFG_OUTPUT_PHY_TYPE_BASET \
3271 (UINT32_C(0x8) << 0)
3272 /* EEE capable BASE-T */
3273 #define HWRM_PORT_PHY_QCFG_OUTPUT_PHY_TYPE_BASETE \
3274 (UINT32_C(0x9) << 0)
3275 /* SGMII connected external PHY */
3276 #define HWRM_PORT_PHY_QCFG_OUTPUT_PHY_TYPE_SGMIIEXTPHY \
3277 (UINT32_C(0xa) << 0)
3280 /* This value represents a media type. */
3282 #define HWRM_PORT_PHY_QCFG_OUTPUT_MEDIA_TYPE_UNKNOWN \
3283 (UINT32_C(0x0) << 0)
3285 #define HWRM_PORT_PHY_QCFG_OUTPUT_MEDIA_TYPE_TP (UINT32_C(0x1) << 0)
3286 /* Direct Attached Copper */
3287 #define HWRM_PORT_PHY_QCFG_OUTPUT_MEDIA_TYPE_DAC \
3288 (UINT32_C(0x2) << 0)
3290 #define HWRM_PORT_PHY_QCFG_OUTPUT_MEDIA_TYPE_FIBRE \
3291 (UINT32_C(0x3) << 0)
3294 /* This value represents a transceiver type. */
3295 /* PHY and MAC are in the same package */
3296 #define HWRM_PORT_PHY_QCFG_OUTPUT_XCVR_PKG_TYPE_XCVR_INTERNAL \
3297 (UINT32_C(0x1) << 0)
3298 /* PHY and MAC are in different packages */
3299 #define HWRM_PORT_PHY_QCFG_OUTPUT_XCVR_PKG_TYPE_XCVR_EXTERNAL \
3300 (UINT32_C(0x2) << 0)
3301 uint8_t xcvr_pkg_type;
3304 * This field represents flags related to EEE configuration. These EEE
3305 * configuration flags are valid only when the auto_mode is not set to
3306 * none (in other words autonegotiation is enabled).
3308 /* This field represents PHY address. */
3309 #define HWRM_PORT_PHY_QCFG_OUTPUT_PHY_ADDR_MASK UINT32_C(0x1f)
3310 #define HWRM_PORT_PHY_QCFG_OUTPUT_PHY_ADDR_SFT 0
3312 * When set to 1, Energy Efficient Ethernet (EEE) mode is enabled.
3313 * Speeds for autoneg with EEE mode enabled are based on
3314 * eee_link_speed_mask.
3316 #define HWRM_PORT_PHY_QCFG_OUTPUT_EEE_CONFIG_EEE_ENABLED \
3319 * This flag is valid only when eee_enabled is set to 1. # If
3320 * eee_enabled is set to 0, then EEE mode is disabled and this flag
3321 * shall be ignored. # If eee_enabled is set to 1 and this flag is set
3322 * to 1, then Energy Efficient Ethernet (EEE) mode is enabled and in
3323 * use. # If eee_enabled is set to 1 and this flag is set to 0, then
3324 * Energy Efficient Ethernet (EEE) mode is enabled but is currently not
3327 #define HWRM_PORT_PHY_QCFG_OUTPUT_EEE_CONFIG_EEE_ACTIVE \
3330 * This flag is valid only when eee_enabled is set to 1. # If
3331 * eee_enabled is set to 0, then EEE mode is disabled and this flag
3332 * shall be ignored. # If eee_enabled is set to 1 and this flag is set
3333 * to 1, then Energy Efficient Ethernet (EEE) mode is enabled and TX LPI
3334 * is enabled. # If eee_enabled is set to 1 and this flag is set to 0,
3335 * then Energy Efficient Ethernet (EEE) mode is enabled but TX LPI is
3338 #define HWRM_PORT_PHY_QCFG_OUTPUT_EEE_CONFIG_EEE_TX_LPI \
3341 * This field represents flags related to EEE configuration. These EEE
3342 * configuration flags are valid only when the auto_mode is not set to
3343 * none (in other words autonegotiation is enabled).
3345 #define HWRM_PORT_PHY_QCFG_OUTPUT_EEE_CONFIG_MASK \
3347 #define HWRM_PORT_PHY_QCFG_OUTPUT_EEE_CONFIG_SFT 5
3348 uint8_t eee_config_phy_addr;
3350 /* Reserved field, set to 0 */
3352 * When set to 1, the parallel detection is used to determine the speed
3353 * of the link partner. Parallel detection is used when a
3354 * autonegotiation capable device is connected to a link parter that is
3355 * not capable of autonegotiation.
3357 #define HWRM_PORT_PHY_QCFG_OUTPUT_PARALLEL_DETECT \
3359 /* Reserved field, set to 0 */
3360 #define HWRM_PORT_PHY_QCFG_OUTPUT_RESERVED_MASK UINT32_C(0xfe)
3361 #define HWRM_PORT_PHY_QCFG_OUTPUT_RESERVED_SFT 1
3362 uint8_t parallel_detect;
3365 * The advertised speeds for the port by the link partner. Each
3366 * advertised speed will be set to '1'.
3368 /* 100Mb link speed (Half-duplex) */
3369 #define HWRM_PORT_PHY_QCFG_OUTPUT_LINK_PARTNER_ADV_SPEEDS_100MBHD \
3371 /* 100Mb link speed (Full-duplex) */
3372 #define HWRM_PORT_PHY_QCFG_OUTPUT_LINK_PARTNER_ADV_SPEEDS_100MB \
3374 /* 1Gb link speed (Half-duplex) */
3375 #define HWRM_PORT_PHY_QCFG_OUTPUT_LINK_PARTNER_ADV_SPEEDS_1GBHD \
3377 /* 1Gb link speed (Full-duplex) */
3378 #define HWRM_PORT_PHY_QCFG_OUTPUT_LINK_PARTNER_ADV_SPEEDS_1GB \
3380 /* 2Gb link speed */
3381 #define HWRM_PORT_PHY_QCFG_OUTPUT_LINK_PARTNER_ADV_SPEEDS_2GB \
3383 /* 2.5Gb link speed */
3384 #define HWRM_PORT_PHY_QCFG_OUTPUT_LINK_PARTNER_ADV_SPEEDS_2_5GB \
3386 /* 10Gb link speed */
3387 #define HWRM_PORT_PHY_QCFG_OUTPUT_LINK_PARTNER_ADV_SPEEDS_10GB \
3389 /* 20Gb link speed */
3390 #define HWRM_PORT_PHY_QCFG_OUTPUT_LINK_PARTNER_ADV_SPEEDS_20GB \
3392 /* 25Gb link speed */
3393 #define HWRM_PORT_PHY_QCFG_OUTPUT_LINK_PARTNER_ADV_SPEEDS_25GB \
3395 /* 40Gb link speed */
3396 #define HWRM_PORT_PHY_QCFG_OUTPUT_LINK_PARTNER_ADV_SPEEDS_40GB \
3398 /* 50Gb link speed */
3399 #define HWRM_PORT_PHY_QCFG_OUTPUT_LINK_PARTNER_ADV_SPEEDS_50GB \
3401 /* 100Gb link speed */
3402 #define HWRM_PORT_PHY_QCFG_OUTPUT_LINK_PARTNER_ADV_SPEEDS_100GB \
3404 /* 10Mb link speed (Half-duplex) */
3405 #define HWRM_PORT_PHY_QCFG_OUTPUT_LINK_PARTNER_ADV_SPEEDS_10MBHD \
3407 /* 10Mb link speed (Full-duplex) */
3408 #define HWRM_PORT_PHY_QCFG_OUTPUT_LINK_PARTNER_ADV_SPEEDS_10MB \
3410 uint16_t link_partner_adv_speeds;
3413 * The advertised autoneg for the port by the link partner. This field
3414 * is deprecated and should be set to 0.
3417 * Disable autoneg or autoneg disabled. No speeds are selected.
3419 #define HWRM_PORT_PHY_QCFG_OUTPUT_LINK_PARTNER_ADV_AUTO_MODE_NONE \
3420 (UINT32_C(0x0) << 0)
3421 /* Select all possible speeds for autoneg mode. */
3422 #define HWRM_PORT_PHY_QCFG_OUTPUT_LINK_PARTNER_ADV_AUTO_MODE_ALL_SPEEDS\
3423 (UINT32_C(0x1) << 0)
3425 * Select only the auto_link_speed speed for autoneg mode. This
3426 * mode has been DEPRECATED. An HWRM client should not use this
3429 #define HWRM_PORT_PHY_QCFG_OUTPUT_LINK_PARTNER_ADV_AUTO_MODE_ONE_SPEED \
3430 (UINT32_C(0x2) << 0)
3432 * Select the auto_link_speed or any speed below that speed for
3433 * autoneg. This mode has been DEPRECATED. An HWRM client should
3434 * not use this mode.
3437 HWRM_PORT_PHY_QCFG_OUTPUT_LINK_PARTNER_ADV_AUTO_MODE_ONE_OR_BELOW \
3438 (UINT32_C(0x3) << 0)
3440 * Select the speeds based on the corresponding link speed mask
3441 * value that is provided.
3443 #define HWRM_PORT_PHY_QCFG_OUTPUT_LINK_PARTNER_ADV_AUTO_MODE_SPEED_MASK\
3444 (UINT32_C(0x4) << 0)
3445 uint8_t link_partner_adv_auto_mode;
3447 /* The advertised pause settings on the port by the link partner. */
3449 * When this bit is '1', Generation of tx pause messages is supported.
3450 * Disabled otherwise.
3452 #define HWRM_PORT_PHY_QCFG_OUTPUT_LINK_PARTNER_ADV_PAUSE_TX \
3455 * When this bit is '1', Reception of rx pause messages is supported.
3456 * Disabled otherwise.
3458 #define HWRM_PORT_PHY_QCFG_OUTPUT_LINK_PARTNER_ADV_PAUSE_RX \
3460 uint8_t link_partner_adv_pause;
3463 * Current setting for link speed mask that is used to advertise speeds
3464 * during autonegotiation when EEE is enabled. This field is valid only
3465 * when eee_enabled flags is set to 1. The speeds specified in this
3466 * field shall be a subset of speeds specified in auto_link_speed_mask.
3469 #define HWRM_PORT_PHY_QCFG_OUTPUT_ADV_EEE_LINK_SPEED_MASK_RSVD1 \
3471 /* 100Mb link speed (Full-duplex) */
3472 #define HWRM_PORT_PHY_QCFG_OUTPUT_ADV_EEE_LINK_SPEED_MASK_100MB \
3475 #define HWRM_PORT_PHY_QCFG_OUTPUT_ADV_EEE_LINK_SPEED_MASK_RSVD2 \
3477 /* 1Gb link speed (Full-duplex) */
3478 #define HWRM_PORT_PHY_QCFG_OUTPUT_ADV_EEE_LINK_SPEED_MASK_1GB \
3481 #define HWRM_PORT_PHY_QCFG_OUTPUT_ADV_EEE_LINK_SPEED_MASK_RSVD3 \
3484 #define HWRM_PORT_PHY_QCFG_OUTPUT_ADV_EEE_LINK_SPEED_MASK_RSVD4 \
3486 /* 10Gb link speed */
3487 #define HWRM_PORT_PHY_QCFG_OUTPUT_ADV_EEE_LINK_SPEED_MASK_10GB \
3489 uint16_t adv_eee_link_speed_mask;
3492 * Current setting for link speed mask that is advertised by the link
3493 * partner when EEE is enabled. This field is valid only when
3494 * eee_enabled flags is set to 1.
3498 HWRM_PORT_PHY_QCFG_OUTPUT_LINK_PARTNER_ADV_EEE_LINK_SPEED_MASK_RSVD1 \
3500 /* 100Mb link speed (Full-duplex) */
3502 HWRM_PORT_PHY_QCFG_OUTPUT_LINK_PARTNER_ADV_EEE_LINK_SPEED_MASK_100MB \
3506 HWRM_PORT_PHY_QCFG_OUTPUT_LINK_PARTNER_ADV_EEE_LINK_SPEED_MASK_RSVD2 \
3508 /* 1Gb link speed (Full-duplex) */
3510 HWRM_PORT_PHY_QCFG_OUTPUT_LINK_PARTNER_ADV_EEE_LINK_SPEED_MASK_1GB \
3514 HWRM_PORT_PHY_QCFG_OUTPUT_LINK_PARTNER_ADV_EEE_LINK_SPEED_MASK_RSVD3 \
3518 HWRM_PORT_PHY_QCFG_OUTPUT_LINK_PARTNER_ADV_EEE_LINK_SPEED_MASK_RSVD4 \
3520 /* 10Gb link speed */
3522 HWRM_PORT_PHY_QCFG_OUTPUT_LINK_PARTNER_ADV_EEE_LINK_SPEED_MASK_10GB \
3524 uint16_t link_partner_adv_eee_link_speed_mask;
3526 /* This value represents transceiver identifier type. */
3528 * Current setting of TX LPI timer in microseconds. This field is valid
3529 * only when_eee_enabled flag is set to 1 and tx_lpi_enabled is set to
3532 #define HWRM_PORT_PHY_QCFG_OUTPUT_TX_LPI_TIMER_MASK \
3534 #define HWRM_PORT_PHY_QCFG_OUTPUT_TX_LPI_TIMER_SFT 0
3535 /* This value represents transceiver identifier type. */
3536 #define HWRM_PORT_PHY_QCFG_OUTPUT_XCVR_IDENTIFIER_TYPE_MASK \
3537 UINT32_C(0xff000000)
3538 #define HWRM_PORT_PHY_QCFG_OUTPUT_XCVR_IDENTIFIER_TYPE_SFT \
3541 #define HWRM_PORT_PHY_QCFG_OUTPUT_XCVR_IDENTIFIER_TYPE_UNKNOWN \
3542 (UINT32_C(0x0) << 24)
3543 /* SFP/SFP+/SFP28 */
3544 #define HWRM_PORT_PHY_QCFG_OUTPUT_XCVR_IDENTIFIER_TYPE_SFP \
3545 (UINT32_C(0x3) << 24)
3547 #define HWRM_PORT_PHY_QCFG_OUTPUT_XCVR_IDENTIFIER_TYPE_QSFP \
3548 (UINT32_C(0xc) << 24)
3550 #define HWRM_PORT_PHY_QCFG_OUTPUT_XCVR_IDENTIFIER_TYPE_QSFPPLUS \
3551 (UINT32_C(0xd) << 24)
3553 #define HWRM_PORT_PHY_QCFG_OUTPUT_XCVR_IDENTIFIER_TYPE_QSFP28 \
3554 (UINT32_C(0x11) << 24)
3555 uint32_t xcvr_identifier_type_tx_lpi_timer;
3560 * Up to 16 bytes of null padded ASCII string representing PHY vendor.
3561 * If the string is set to null, then the vendor name is not available.
3563 char phy_vendor_name[16];
3566 * Up to 16 bytes of null padded ASCII string that identifies vendor
3567 * specific part number of the PHY. If the string is set to null, then
3568 * the vendor specific part number is not available.
3570 char phy_vendor_partnumber[16];
3578 * This field is used in Output records to indicate that the output is
3579 * completely written to RAM. This field should be read as '1' to
3580 * indicate that the output has been completely written. When writing a
3581 * command completion or response to an internal processor, the order of
3582 * writes has to be such that this field is written last.
3585 } __attribute__((packed));
3589 * Description: This function is called by a driver to determine the HWRM
3590 * interface version supported by the HWRM firmware, the version of HWRM
3591 * firmware implementation, the name of HWRM firmware, the versions of other
3592 * embedded firmwares, and the names of other embedded firmwares, etc. Any
3593 * interface or firmware version with major = 0, minor = 0, and update = 0 shall
3594 * be considered an invalid version.
3597 /* Input (24 bytes) */
3598 struct hwrm_ver_get_input {
3600 * This value indicates what type of request this is. The format for the
3601 * rest of the command is determined by this field.
3606 * This value indicates the what completion ring the request will be
3607 * optionally completed on. If the value is -1, then no CR completion
3608 * will be generated. Any other value must be a valid CR ring_id value
3609 * for this function.
3613 /* This value indicates the command sequence number. */
3617 * Target ID of this command. 0x0 - 0xFFF8 - Used for function ids
3618 * 0xFFF8 - 0xFFFE - Reserved for internal processors 0xFFFF - HWRM
3623 * This is the host address where the response will be written when the
3624 * request is complete. This area must be 16B aligned and must be
3625 * cleared to zero before the request is made.
3630 * This field represents the major version of HWRM interface
3631 * specification supported by the driver HWRM implementation. The
3632 * interface major version is intended to change only when non backward
3633 * compatible changes are made to the HWRM interface specification.
3635 uint8_t hwrm_intf_maj;
3638 * This field represents the minor version of HWRM interface
3639 * specification supported by the driver HWRM implementation. A change
3640 * in interface minor version is used to reflect significant backward
3641 * compatible modification to HWRM interface specification. This can be
3642 * due to addition or removal of functionality. HWRM interface
3643 * specifications with the same major version but different minor
3644 * versions are compatible.
3646 uint8_t hwrm_intf_min;
3649 * This field represents the update version of HWRM interface
3650 * specification supported by the driver HWRM implementation. The
3651 * interface update version is used to reflect minor changes or bug
3652 * fixes to a released HWRM interface specification.
3654 uint8_t hwrm_intf_upd;
3656 uint8_t unused_0[5];
3657 } __attribute__((packed));
3659 /* Output (128 bytes) */
3660 struct hwrm_ver_get_output {
3662 * Pass/Fail or error type Note: receiver to verify the in parameters,
3663 * and fail the call with an error when appropriate
3665 uint16_t error_code;
3667 /* This field returns the type of original request. */
3670 /* This field provides original sequence number of the command. */
3674 * This field is the length of the response in bytes. The last byte of
3675 * the response is a valid flag that will read as '1' when the command
3676 * has been completely written to memory.
3681 * This field represents the major version of HWRM interface
3682 * specification supported by the HWRM implementation. The interface
3683 * major version is intended to change only when non backward compatible
3684 * changes are made to the HWRM interface specification. A HWRM
3685 * implementation that is compliant with this specification shall
3686 * provide value of 1 in this field.
3688 uint8_t hwrm_intf_maj;
3691 * This field represents the minor version of HWRM interface
3692 * specification supported by the HWRM implementation. A change in
3693 * interface minor version is used to reflect significant backward
3694 * compatible modification to HWRM interface specification. This can be
3695 * due to addition or removal of functionality. HWRM interface
3696 * specifications with the same major version but different minor
3697 * versions are compatible. A HWRM implementation that is compliant with
3698 * this specification shall provide value of 0 in this field.
3700 uint8_t hwrm_intf_min;
3703 * This field represents the update version of HWRM interface
3704 * specification supported by the HWRM implementation. The interface
3705 * update version is used to reflect minor changes or bug fixes to a
3706 * released HWRM interface specification. A HWRM implementation that is
3707 * compliant with this specification shall provide value of 1 in this
3710 uint8_t hwrm_intf_upd;
3712 uint8_t hwrm_intf_rsvd;
3715 * This field represents the major version of HWRM firmware. A change in
3716 * firmware major version represents a major firmware release.
3718 uint8_t hwrm_fw_maj;
3721 * This field represents the minor version of HWRM firmware. A change in
3722 * firmware minor version represents significant firmware functionality
3725 uint8_t hwrm_fw_min;
3728 * This field represents the build version of HWRM firmware. A change in
3729 * firmware build version represents bug fixes to a released firmware.
3731 uint8_t hwrm_fw_bld;
3734 * This field is a reserved field. This field can be used to represent
3735 * firmware branches or customer specific releases tied to a specific
3736 * (major,minor,update) version of the HWRM firmware.
3738 uint8_t hwrm_fw_rsvd;
3741 * This field represents the major version of mgmt firmware. A change in
3742 * major version represents a major release.
3744 uint8_t mgmt_fw_maj;
3747 * This field represents the minor version of mgmt firmware. A change in
3748 * minor version represents significant functionality changes.
3750 uint8_t mgmt_fw_min;
3753 * This field represents the build version of mgmt firmware. A change in
3754 * update version represents bug fixes.
3756 uint8_t mgmt_fw_bld;
3759 * This field is a reserved field. This field can be used to represent
3760 * firmware branches or customer specific releases tied to a specific
3761 * (major,minor,update) version
3763 uint8_t mgmt_fw_rsvd;
3766 * This field represents the major version of network control firmware.
3767 * A change in major version represents a major release.
3769 uint8_t netctrl_fw_maj;
3772 * This field represents the minor version of network control firmware.
3773 * A change in minor version represents significant functionality
3776 uint8_t netctrl_fw_min;
3779 * This field represents the build version of network control firmware.
3780 * A change in update version represents bug fixes.
3782 uint8_t netctrl_fw_bld;
3785 * This field is a reserved field. This field can be used to represent
3786 * firmware branches or customer specific releases tied to a specific
3787 * (major,minor,update) version
3789 uint8_t netctrl_fw_rsvd;
3792 * This field is reserved for future use. The responder should set it to
3793 * 0. The requester should ignore this field.
3798 * This field represents the major version of RoCE firmware. A change in
3799 * major version represents a major release.
3801 uint8_t roce_fw_maj;
3804 * This field represents the minor version of RoCE firmware. A change in
3805 * minor version represents significant functionality changes.
3807 uint8_t roce_fw_min;
3810 * This field represents the build version of RoCE firmware. A change in
3811 * update version represents bug fixes.
3813 uint8_t roce_fw_bld;
3816 * This field is a reserved field. This field can be used to represent
3817 * firmware branches or customer specific releases tied to a specific
3818 * (major,minor,update) version
3820 uint8_t roce_fw_rsvd;
3823 * This field represents the name of HWRM FW (ASCII chars without NULL
3826 char hwrm_fw_name[16];
3829 * This field represents the name of mgmt FW (ASCII chars without NULL
3832 char mgmt_fw_name[16];
3835 * This field represents the name of network control firmware (ASCII
3836 * chars without NULL at the end).
3838 char netctrl_fw_name[16];
3841 * This field is reserved for future use. The responder should set it to
3842 * 0. The requester should ignore this field.
3844 uint32_t reserved2[4];
3847 * This field represents the name of RoCE FW (ASCII chars without NULL
3850 char roce_fw_name[16];
3852 /* This field returns the chip number. */
3855 /* This field returns the revision of chip. */
3858 /* This field returns the chip metal number. */
3861 /* This field returns the bond id of the chip. */
3862 uint8_t chip_bond_id;
3865 * This value indicates the type of platform used for chip
3869 #define HWRM_VER_GET_OUTPUT_CHIP_PLATFORM_TYPE_ASIC \
3870 (UINT32_C(0x0) << 0)
3871 /* FPGA platform of the chip. */
3872 #define HWRM_VER_GET_OUTPUT_CHIP_PLATFORM_TYPE_FPGA \
3873 (UINT32_C(0x1) << 0)
3874 /* Palladium platform of the chip. */
3875 #define HWRM_VER_GET_OUTPUT_CHIP_PLATFORM_TYPE_PALLADIUM \
3876 (UINT32_C(0x2) << 0)
3877 uint8_t chip_platform_type;
3880 * This field returns the maximum value of request window that is
3881 * supported by the HWRM. The request window is mapped into device
3882 * address space using MMIO.
3884 uint16_t max_req_win_len;
3887 * This field returns the maximum value of response buffer in bytes. If
3888 * a request specifies the response buffer length that is greater than
3889 * this value, then the HWRM should fail it. The value of this field
3890 * shall be 4KB or more.
3892 uint16_t max_resp_len;
3895 * This field returns the default request timeout value in milliseconds.
3897 uint16_t def_req_timeout;
3904 * This field is used in Output records to indicate that the output is
3905 * completely written to RAM. This field should be read as '1' to
3906 * indicate that the output has been completely written. When writing a
3907 * command completion or response to an internal processor, the order of
3908 * writes has to be such that this field is written last.
3911 } __attribute__((packed));
3913 /* hwrm_queue_qportcfg */
3915 * Description: This function is called by a driver to query queue configuration
3916 * of a port. # The HWRM shall at least advertise one queue with lossy service
3917 * profile. # The driver shall use this command to query queue ids before
3918 * configuring or using any queues. # If a service profile is not set for a
3919 * queue, then the driver shall not use that queue without configuring a service
3920 * profile for it. # If the driver is not allowed to configure service profiles,
3921 * then the driver shall only use queues for which service profiles are pre-
3925 /* Input (24 bytes) */
3926 struct hwrm_queue_qportcfg_input {
3928 * This value indicates what type of request this is. The format for the
3929 * rest of the command is determined by this field.
3934 * This value indicates the what completion ring the request will be
3935 * optionally completed on. If the value is -1, then no CR completion
3936 * will be generated. Any other value must be a valid CR ring_id value
3937 * for this function.
3941 /* This value indicates the command sequence number. */
3945 * Target ID of this command. 0x0 - 0xFFF8 - Used for function ids
3946 * 0xFFF8 - 0xFFFE - Reserved for internal processors 0xFFFF - HWRM
3951 * This is the host address where the response will be written when the
3952 * request is complete. This area must be 16B aligned and must be
3953 * cleared to zero before the request is made.
3958 * Enumeration denoting the RX, TX type of the resource. This
3959 * enumeration is used for resources that are similar for both TX and RX
3960 * paths of the chip.
3962 #define HWRM_QUEUE_QPORTCFG_INPUT_FLAGS_PATH \
3965 #define HWRM_QUEUE_QPORTCFG_INPUT_FLAGS_PATH_TX \
3966 (UINT32_C(0x0) << 0)
3968 #define HWRM_QUEUE_QPORTCFG_INPUT_FLAGS_PATH_RX \
3969 (UINT32_C(0x1) << 0)
3970 #define HWRM_QUEUE_QPORTCFG_INPUT_FLAGS_PATH_LAST \
3971 HWRM_QUEUE_QPORTCFG_INPUT_FLAGS_PATH_RX
3975 * Port ID of port for which the queue configuration is being queried.
3976 * This field is only required when sent by IPC.
3981 } __attribute__((packed));
3983 /* hwrm_ring_alloc */
3985 * Description: This command allocates and does basic preparation for a ring.
3988 /* Input (80 bytes) */
3989 struct hwrm_ring_alloc_input {
3991 * This value indicates what type of request this is. The format for the
3992 * rest of the command is determined by this field.
3997 * This value indicates the what completion ring the request will be
3998 * optionally completed on. If the value is -1, then no CR completion
3999 * will be generated. Any other value must be a valid CR ring_id value
4000 * for this function.
4004 /* This value indicates the command sequence number. */
4008 * Target ID of this command. 0x0 - 0xFFF8 - Used for function ids
4009 * 0xFFF8 - 0xFFFE - Reserved for internal processors 0xFFFF - HWRM
4014 * This is the host address where the response will be written when the
4015 * request is complete. This area must be 16B aligned and must be
4016 * cleared to zero before the request is made.
4020 /* This bit must be '1' for the Reserved1 field to be configured. */
4021 #define HWRM_RING_ALLOC_INPUT_ENABLES_RESERVED1 UINT32_C(0x1)
4022 /* This bit must be '1' for the Reserved2 field to be configured. */
4023 #define HWRM_RING_ALLOC_INPUT_ENABLES_RESERVED2 UINT32_C(0x2)
4024 /* This bit must be '1' for the Reserved3 field to be configured. */
4025 #define HWRM_RING_ALLOC_INPUT_ENABLES_RESERVED3 UINT32_C(0x4)
4027 * This bit must be '1' for the stat_ctx_id_valid field to be
4030 #define HWRM_RING_ALLOC_INPUT_ENABLES_STAT_CTX_ID_VALID UINT32_C(0x8)
4031 /* This bit must be '1' for the Reserved4 field to be configured. */
4032 #define HWRM_RING_ALLOC_INPUT_ENABLES_RESERVED4 UINT32_C(0x10)
4033 /* This bit must be '1' for the max_bw_valid field to be configured. */
4034 #define HWRM_RING_ALLOC_INPUT_ENABLES_MAX_BW_VALID UINT32_C(0x20)
4038 /* Completion Ring (CR) */
4039 #define HWRM_RING_ALLOC_INPUT_RING_TYPE_CMPL (UINT32_C(0x0) << 0)
4041 #define HWRM_RING_ALLOC_INPUT_RING_TYPE_TX (UINT32_C(0x1) << 0)
4043 #define HWRM_RING_ALLOC_INPUT_RING_TYPE_RX (UINT32_C(0x2) << 0)
4049 /* This value is a pointer to the page table for the Ring. */
4050 uint64_t page_tbl_addr;
4052 /* First Byte Offset of the first entry in the first page. */
4056 * Actual page size in 2^page_size. The supported range is increments in
4057 * powers of 2 from 16 bytes to 1GB. - 4 = 16 B Page size is 16 B. - 12
4058 * = 4 KB Page size is 4 KB. - 13 = 8 KB Page size is 8 KB. - 16 = 64 KB
4059 * Page size is 64 KB. - 22 = 2 MB Page size is 2 MB. - 23 = 4 MB Page
4060 * size is 4 MB. - 31 = 1 GB Page size is 1 GB.
4065 * This value indicates the depth of page table. For this version of the
4066 * specification, value other than 0 or 1 shall be considered as an
4067 * invalid value. When the page_tbl_depth = 0, then it is treated as a
4068 * special case with the following. 1. FBO and page size fields are not
4069 * valid. 2. page_tbl_addr is the physical address of the first element
4072 uint8_t page_tbl_depth;
4078 * Number of 16B units in the ring. Minimum size for a ring is 16 16B
4084 * Logical ring number for the ring to be allocated. This value
4085 * determines the position in the doorbell area where the update to the
4086 * ring will be made. For completion rings, this value is also the MSI-X
4087 * vector number for the function the completion ring is associated
4090 uint16_t logical_id;
4093 * This field is used only when ring_type is a TX ring. This value
4094 * indicates what completion ring the TX ring is associated with.
4096 uint16_t cmpl_ring_id;
4099 * This field is used only when ring_type is a TX ring. This value
4100 * indicates what CoS queue the TX ring is associated with.
4107 /* This field is reserved for the future use. It shall be set to 0. */
4109 /* This field is reserved for the future use. It shall be set to 0. */
4114 /* This field is reserved for the future use. It shall be set to 0. */
4118 * This field is used only when ring_type is a TX ring. This input
4119 * indicates what statistics context this ring should be associated
4122 uint32_t stat_ctx_id;
4124 /* This field is reserved for the future use. It shall be set to 0. */
4128 * This field is used only when ring_type is a TX ring. Maximum BW
4129 * allocated to this TX ring in Mbps. The HWRM will translate this value
4130 * into byte counter and time interval used for this ring inside the
4136 * This field is used only when ring_type is a Completion ring. This
4137 * value indicates what interrupt mode should be used on this completion
4138 * ring. Note: In the legacy interrupt mode, no more than 16 completion
4139 * rings are allowed.
4142 #define HWRM_RING_ALLOC_INPUT_INT_MODE_LEGACY (UINT32_C(0x0) << 0)
4144 #define HWRM_RING_ALLOC_INPUT_INT_MODE_RSVD (UINT32_C(0x1) << 0)
4146 #define HWRM_RING_ALLOC_INPUT_INT_MODE_MSIX (UINT32_C(0x2) << 0)
4147 /* No Interrupt - Polled mode */
4148 #define HWRM_RING_ALLOC_INPUT_INT_MODE_POLL (UINT32_C(0x3) << 0)
4151 uint8_t unused_8[3];
4152 } __attribute__((packed));
4154 /* Output (16 bytes) */
4156 struct hwrm_ring_alloc_output {
4158 * Pass/Fail or error type Note: receiver to verify the in parameters,
4159 * and fail the call with an error when appropriate
4161 uint16_t error_code;
4163 /* This field returns the type of original request. */
4166 /* This field provides original sequence number of the command. */
4170 * This field is the length of the response in bytes. The last byte of
4171 * the response is a valid flag that will read as '1' when the command
4172 * has been completely written to memory.
4176 /* Physical number of ring allocated. */
4179 /* Logical number of ring allocated. */
4180 uint16_t logical_ring_id;
4187 * This field is used in Output records to indicate that the output is
4188 * completely written to RAM. This field should be read as '1' to
4189 * indicate that the output has been completely written. When writing a
4190 * command completion or response to an internal processor, the order of
4191 * writes has to be such that this field is written last.
4194 } __attribute__((packed));
4196 /* hwrm_ring_free */
4198 * Description: This command is used to free a ring and associated resources.
4200 /* Input (24 bytes) */
4202 struct hwrm_ring_free_input {
4204 * This value indicates what type of request this is. The format for the
4205 * rest of the command is determined by this field.
4210 * This value indicates the what completion ring the request will be
4211 * optionally completed on. If the value is -1, then no CR completion
4212 * will be generated. Any other value must be a valid CR ring_id value
4213 * for this function.
4217 /* This value indicates the command sequence number. */
4221 * Target ID of this command. 0x0 - 0xFFF8 - Used for function ids
4222 * 0xFFF8 - 0xFFFE - Reserved for internal processors 0xFFFF - HWRM
4227 * This is the host address where the response will be written when the
4228 * request is complete. This area must be 16B aligned and must be
4229 * cleared to zero before the request is made.
4234 /* Completion Ring (CR) */
4235 #define HWRM_RING_FREE_INPUT_RING_TYPE_CMPL (UINT32_C(0x0) << 0)
4237 #define HWRM_RING_FREE_INPUT_RING_TYPE_TX (UINT32_C(0x1) << 0)
4239 #define HWRM_RING_FREE_INPUT_RING_TYPE_RX (UINT32_C(0x2) << 0)
4244 /* Physical number of ring allocated. */
4248 } __attribute__((packed));
4250 /* Output (16 bytes) */
4251 struct hwrm_ring_free_output {
4253 * Pass/Fail or error type Note: receiver to verify the in parameters,
4254 * and fail the call with an error when appropriate
4256 uint16_t error_code;
4258 /* This field returns the type of original request. */
4261 /* This field provides original sequence number of the command. */
4265 * This field is the length of the response in bytes. The last byte of
4266 * the response is a valid flag that will read as '1' when the command
4267 * has been completely written to memory.
4277 * This field is used in Output records to indicate that the output is
4278 * completely written to RAM. This field should be read as '1' to
4279 * indicate that the output has been completely written. When writing a
4280 * command completion or response to an internal processor, the order of
4281 * writes has to be such that this field is written last.
4284 } __attribute__((packed));
4286 /* hwrm_ring_grp_alloc */
4288 * Description: This API allocates and does basic preparation for a ring group.
4291 /* Input (24 bytes) */
4292 struct hwrm_ring_grp_alloc_input {
4294 * This value indicates what type of request this is. The format for the
4295 * rest of the command is determined by this field.
4300 * This value indicates the what completion ring the request will be
4301 * optionally completed on. If the value is -1, then no CR completion
4302 * will be generated. Any other value must be a valid CR ring_id value
4303 * for this function.
4307 /* This value indicates the command sequence number. */
4311 * Target ID of this command. 0x0 - 0xFFF8 - Used for function ids
4312 * 0xFFF8 - 0xFFFE - Reserved for internal processors 0xFFFF - HWRM
4317 * This is the host address where the response will be written when the
4318 * request is complete. This area must be 16B aligned and must be
4319 * cleared to zero before the request is made.
4323 /* This value identifies the CR associated with the ring group. */
4326 /* This value identifies the main RR associated with the ring group. */
4330 * This value identifies the aggregation RR associated with the ring
4331 * group. If this value is 0xFF... (All Fs), then no Aggregation ring
4337 * This value identifies the statistics context associated with the ring
4341 } __attribute__((packed));
4343 /* Output (16 bytes) */
4344 struct hwrm_ring_grp_alloc_output {
4346 * Pass/Fail or error type Note: receiver to verify the in parameters,
4347 * and fail the call with an error when appropriate
4349 uint16_t error_code;
4351 /* This field returns the type of original request. */
4354 /* This field provides original sequence number of the command. */
4358 * This field is the length of the response in bytes. The last byte of
4359 * the response is a valid flag that will read as '1' when the command
4360 * has been completely written to memory.
4365 * This is the ring group ID value. Use this value to program the
4366 * default ring group for the VNIC or as table entries in an RSS/COS
4369 uint32_t ring_group_id;
4376 * This field is used in Output records to indicate that the output is
4377 * completely written to RAM. This field should be read as '1' to
4378 * indicate that the output has been completely written. When writing a
4379 * command completion or response to an internal processor, the order of
4380 * writes has to be such that this field is written last.
4383 } __attribute__((packed));
4385 /* hwrm_ring_grp_free */
4387 * Description: This API frees a ring group and associated resources. # If a
4388 * ring in the ring group is reset or free, then the associated rings in the
4389 * ring group shall also be reset/free using hwrm_ring_free. # A function driver
4390 * shall always use hwrm_ring_grp_free after freeing all rings in a group. # As
4391 * a part of executing this command, the HWRM shall reset all associated ring
4395 /* Input (24 bytes) */
4396 struct hwrm_ring_grp_free_input {
4398 * This value indicates what type of request this is. The format for the
4399 * rest of the command is determined by this field.
4404 * This value indicates the what completion ring the request will be
4405 * optionally completed on. If the value is -1, then no CR completion
4406 * will be generated. Any other value must be a valid CR ring_id value
4407 * for this function.
4411 /* This value indicates the command sequence number. */
4415 * Target ID of this command. 0x0 - 0xFFF8 - Used for function ids
4416 * 0xFFF8 - 0xFFFE - Reserved for internal processors 0xFFFF - HWRM
4421 * This is the host address where the response will be written when the
4422 * request is complete. This area must be 16B aligned and must be
4423 * cleared to zero before the request is made.
4427 /* This is the ring group ID value. */
4428 uint32_t ring_group_id;
4431 } __attribute__((packed));
4433 /* Output (16 bytes) */
4434 struct hwrm_ring_grp_free_output {
4436 * Pass/Fail or error type Note: receiver to verify the in parameters,
4437 * and fail the call with an error when appropriate
4439 uint16_t error_code;
4441 /* This field returns the type of original request. */
4444 /* This field provides original sequence number of the command. */
4448 * This field is the length of the response in bytes. The last byte of
4449 * the response is a valid flag that will read as '1' when the command
4450 * has been completely written to memory.
4460 * This field is used in Output records to indicate that the output is
4461 * completely written to RAM. This field should be read as '1' to
4462 * indicate that the output has been completely written. When writing a
4463 * command completion or response to an internal processor, the order of
4464 * writes has to be such that this field is written last.
4467 } __attribute__((packed));
4469 /* hwrm_stat_ctx_alloc */
4471 * Description: This command allocates and does basic preparation for a stat
4475 /* Input (32 bytes) */
4476 struct hwrm_stat_ctx_alloc_input {
4478 * This value indicates what type of request this is. The format for the
4479 * rest of the command is determined by this field.
4484 * This value indicates the what completion ring the request will be
4485 * optionally completed on. If the value is -1, then no CR completion
4486 * will be generated. Any other value must be a valid CR ring_id value
4487 * for this function.
4491 /* This value indicates the command sequence number. */
4495 * Target ID of this command. 0x0 - 0xFFF8 - Used for function ids
4496 * 0xFFF8 - 0xFFFE - Reserved for internal processors 0xFFFF - HWRM
4501 * This is the host address where the response will be written when the
4502 * request is complete. This area must be 16B aligned and must be
4503 * cleared to zero before the request is made.
4507 /* This is the address for statistic block. */
4508 uint64_t stats_dma_addr;
4511 * The statistic block update period in ms. e.g. 250ms, 500ms, 750ms,
4514 uint32_t update_period_ms;
4517 } __attribute__((packed));
4519 /* Output (16 bytes) */
4520 struct hwrm_stat_ctx_alloc_output {
4522 * Pass/Fail or error type Note: receiver to verify the in parameters,
4523 * and fail the call with an error when appropriate
4525 uint16_t error_code;
4527 /* This field returns the type of original request. */
4530 /* This field provides original sequence number of the command. */
4534 * This field is the length of the response in bytes. The last byte of
4535 * the response is a valid flag that will read as '1' when the command
4536 * has been completely written to memory.
4540 /* This is the statistics context ID value. */
4541 uint32_t stat_ctx_id;
4548 * This field is used in Output records to indicate that the output is
4549 * completely written to RAM. This field should be read as '1' to
4550 * indicate that the output has been completely written. When writing a
4551 * command completion or response to an internal processor, the order of
4552 * writes has to be such that this field is written last.
4555 } __attribute__((packed));
4557 /* hwrm_stat_ctx_clr_stats */
4558 /* Description: This command clears statistics of a context. */
4560 /* Input (24 bytes) */
4561 struct hwrm_stat_ctx_clr_stats_input {
4563 * This value indicates what type of request this is. The format for the
4564 * rest of the command is determined by this field.
4569 * This value indicates the what completion ring the request will be
4570 * optionally completed on. If the value is -1, then no CR completion
4571 * will be generated. Any other value must be a valid CR ring_id value
4572 * for this function.
4576 /* This value indicates the command sequence number. */
4580 * Target ID of this command. 0x0 - 0xFFF8 - Used for function ids
4581 * 0xFFF8 - 0xFFFE - Reserved for internal processors 0xFFFF - HWRM
4586 * This is the host address where the response will be written when the
4587 * request is complete. This area must be 16B aligned and must be
4588 * cleared to zero before the request is made.
4592 /* ID of the statistics context that is being queried. */
4593 uint32_t stat_ctx_id;
4596 } __attribute__((packed));
4598 /* Output (16 bytes) */
4599 struct hwrm_stat_ctx_clr_stats_output {
4601 * Pass/Fail or error type Note: receiver to verify the in parameters,
4602 * and fail the call with an error when appropriate
4604 uint16_t error_code;
4606 /* This field returns the type of original request. */
4609 /* This field provides original sequence number of the command. */
4613 * This field is the length of the response in bytes. The last byte of
4614 * the response is a valid flag that will read as '1' when the command
4615 * has been completely written to memory.
4625 * This field is used in Output records to indicate that the output is
4626 * completely written to RAM. This field should be read as '1' to
4627 * indicate that the output has been completely written. When writing a
4628 * command completion or response to an internal processor, the order of
4629 * writes has to be such that this field is written last.
4632 } __attribute__((packed));
4634 /* hwrm_stat_ctx_free */
4635 /* Description: This command is used to free a stat context. */
4636 /* Input (24 bytes) */
4638 struct hwrm_stat_ctx_free_input {
4640 * This value indicates what type of request this is. The format for the
4641 * rest of the command is determined by this field.
4646 * This value indicates the what completion ring the request will be
4647 * optionally completed on. If the value is -1, then no CR completion
4648 * will be generated. Any other value must be a valid CR ring_id value
4649 * for this function.
4653 /* This value indicates the command sequence number. */
4657 * Target ID of this command. 0x0 - 0xFFF8 - Used for function ids
4658 * 0xFFF8 - 0xFFFE - Reserved for internal processors 0xFFFF - HWRM
4663 * This is the host address where the response will be written when the
4664 * request is complete. This area must be 16B aligned and must be
4665 * cleared to zero before the request is made.
4669 /* ID of the statistics context that is being queried. */
4670 uint32_t stat_ctx_id;
4673 } __attribute__((packed));
4675 /* Output (16 bytes) */
4677 struct hwrm_stat_ctx_free_output {
4679 * Pass/Fail or error type Note: receiver to verify the in parameters,
4680 * and fail the call with an error when appropriate
4682 uint16_t error_code;
4684 /* This field returns the type of original request. */
4687 /* This field provides original sequence number of the command. */
4691 * This field is the length of the response in bytes. The last byte of
4692 * the response is a valid flag that will read as '1' when the command
4693 * has been completely written to memory.
4697 /* This is the statistics context ID value. */
4698 uint32_t stat_ctx_id;
4705 * This field is used in Output records to indicate that the output is
4706 * completely written to RAM. This field should be read as '1' to
4707 * indicate that the output has been completely written. When writing a
4708 * command completion or response to an internal processor, the order of
4709 * writes has to be such that this field is written last.
4712 } __attribute__((packed));
4714 /* hwrm_vnic_alloc */
4716 * Description: This VNIC is a resource in the RX side of the chip that is used
4717 * to represent a virtual host "interface". # At the time of VNIC allocation or
4718 * configuration, the function can specify whether it wants the requested VNIC
4719 * to be the default VNIC for the function or not. # If a function requests
4720 * allocation of a VNIC for the first time and a VNIC is successfully allocated
4721 * by the HWRM, then the HWRM shall make the allocated VNIC as the default VNIC
4722 * for that function. # The default VNIC shall be used for the default action
4723 * for a partition or function. # For each VNIC allocated on a function, a
4724 * mapping on the RX side to map the allocated VNIC to source virtual interface
4725 * shall be performed by the HWRM. This should be hidden to the function driver
4726 * requesting the VNIC allocation. This enables broadcast/multicast replication
4727 * with source knockout. # If multicast replication with source knockout is
4728 * enabled, then the internal VNIC to SVIF mapping data structures shall be
4729 * programmed at the time of VNIC allocation.
4732 /* Input (24 bytes) */
4733 struct hwrm_vnic_alloc_input {
4735 * This value indicates what type of request this is. The format for the
4736 * rest of the command is determined by this field.
4741 * This value indicates the what completion ring the request will be
4742 * optionally completed on. If the value is -1, then no CR completion
4743 * will be generated. Any other value must be a valid CR ring_id value
4744 * for this function.
4748 /* This value indicates the command sequence number. */
4752 * Target ID of this command. 0x0 - 0xFFF8 - Used for function ids
4753 * 0xFFF8 - 0xFFFE - Reserved for internal processors 0xFFFF - HWRM
4758 * This is the host address where the response will be written when the
4759 * request is complete. This area must be 16B aligned and must be
4760 * cleared to zero before the request is made.
4765 * When this bit is '1', this VNIC is requested to be the default VNIC
4766 * for this function.
4768 #define HWRM_VNIC_ALLOC_INPUT_FLAGS_DEFAULT UINT32_C(0x1)
4772 } __attribute__((packed));
4774 /* Output (16 bytes) */
4775 struct hwrm_vnic_alloc_output {
4777 * Pass/Fail or error type Note: receiver to verify the in parameters,
4778 * and fail the call with an error when appropriate
4780 uint16_t error_code;
4782 /* This field returns the type of original request. */
4785 /* This field provides original sequence number of the command. */
4789 * This field is the length of the response in bytes. The last byte of
4790 * the response is a valid flag that will read as '1' when the command
4791 * has been completely written to memory.
4795 /* Logical vnic ID */
4803 * This field is used in Output records to indicate that the output is
4804 * completely written to RAM. This field should be read as '1' to
4805 * indicate that the output has been completely written. When writing a
4806 * command completion or response to an internal processor, the order of
4807 * writes has to be such that this field is written last.
4810 } __attribute__((packed));
4813 /* Description: Configure the RX VNIC structure. */
4815 /* Input (40 bytes) */
4816 struct hwrm_vnic_cfg_input {
4818 * This value indicates what type of request this is. The format for the
4819 * rest of the command is determined by this field.
4824 * This value indicates the what completion ring the request will be
4825 * optionally completed on. If the value is -1, then no CR completion
4826 * will be generated. Any other value must be a valid CR ring_id value
4827 * for this function.
4831 /* This value indicates the command sequence number. */
4835 * Target ID of this command. 0x0 - 0xFFF8 - Used for function ids
4836 * 0xFFF8 - 0xFFFE - Reserved for internal processors 0xFFFF - HWRM
4841 * This is the host address where the response will be written when the
4842 * request is complete. This area must be 16B aligned and must be
4843 * cleared to zero before the request is made.
4848 * When this bit is '1', the VNIC is requested to be the default VNIC
4851 #define HWRM_VNIC_CFG_INPUT_FLAGS_DEFAULT UINT32_C(0x1)
4853 * When this bit is '1', the VNIC is being configured to strip VLAN in
4854 * the RX path. If set to '0', then VLAN stripping is disabled on this
4857 #define HWRM_VNIC_CFG_INPUT_FLAGS_VLAN_STRIP_MODE UINT32_C(0x2)
4859 * When this bit is '1', the VNIC is being configured to buffer receive
4860 * packets in the hardware until the host posts new receive buffers. If
4861 * set to '0', then bd_stall is being configured to be disabled on this
4864 #define HWRM_VNIC_CFG_INPUT_FLAGS_BD_STALL_MODE UINT32_C(0x4)
4866 * When this bit is '1', the VNIC is being configured to receive both
4867 * RoCE and non-RoCE traffic. If set to '0', then this VNIC is not
4868 * configured to be operating in dual VNIC mode.
4870 #define HWRM_VNIC_CFG_INPUT_FLAGS_ROCE_DUAL_VNIC_MODE UINT32_C(0x8)
4872 * When this flag is set to '1', the VNIC is requested to be configured
4873 * to receive only RoCE traffic. If this flag is set to '0', then this
4874 * flag shall be ignored by the HWRM. If roce_dual_vnic_mode flag is set
4875 * to '1', then the HWRM client shall not set this flag to '1'.
4877 #define HWRM_VNIC_CFG_INPUT_FLAGS_ROCE_ONLY_VNIC_MODE UINT32_C(0x10)
4880 /* This bit must be '1' for the dflt_ring_grp field to be configured. */
4881 #define HWRM_VNIC_CFG_INPUT_ENABLES_DFLT_RING_GRP UINT32_C(0x1)
4882 /* This bit must be '1' for the rss_rule field to be configured. */
4883 #define HWRM_VNIC_CFG_INPUT_ENABLES_RSS_RULE UINT32_C(0x2)
4884 /* This bit must be '1' for the cos_rule field to be configured. */
4885 #define HWRM_VNIC_CFG_INPUT_ENABLES_COS_RULE UINT32_C(0x4)
4886 /* This bit must be '1' for the lb_rule field to be configured. */
4887 #define HWRM_VNIC_CFG_INPUT_ENABLES_LB_RULE UINT32_C(0x8)
4888 /* This bit must be '1' for the mru field to be configured. */
4889 #define HWRM_VNIC_CFG_INPUT_ENABLES_MRU UINT32_C(0x10)
4892 /* Logical vnic ID */
4896 * Default Completion ring for the VNIC. This ring will be chosen if
4897 * packet does not match any RSS rules and if there is no COS rule.
4899 uint16_t dflt_ring_grp;
4902 * RSS ID for RSS rule/table structure. 0xFF... (All Fs) if there is no
4908 * RSS ID for COS rule/table structure. 0xFF... (All Fs) if there is no
4914 * RSS ID for load balancing rule/table structure. 0xFF... (All Fs) if
4915 * there is no LB rule.
4920 * The maximum receive unit of the vnic. Each vnic is associated with a
4921 * function. The vnic mru value overwrites the mru setting of the
4922 * associated function. The HWRM shall make sure that vnic mru does not
4923 * exceed the mru of the port the function is associated with.
4928 } __attribute__((packed));
4930 /* Output (16 bytes) */
4931 struct hwrm_vnic_cfg_output {
4933 * Pass/Fail or error type Note: receiver to verify the in parameters,
4934 * and fail the call with an error when appropriate
4936 uint16_t error_code;
4938 /* This field returns the type of original request. */
4941 /* This field provides original sequence number of the command. */
4945 * This field is the length of the response in bytes. The last byte of
4946 * the response is a valid flag that will read as '1' when the command
4947 * has been completely written to memory.
4957 * This field is used in Output records to indicate that the output is
4958 * completely written to RAM. This field should be read as '1' to
4959 * indicate that the output has been completely written. When writing a
4960 * command completion or response to an internal processor, the order of
4961 * writes has to be such that this field is written last.
4964 } __attribute__((packed));
4966 /* hwrm_vnic_free */
4968 * Description: Free a VNIC resource. Idle any resources associated with the
4969 * VNIC as well as the VNIC. Reset and release all resources associated with the
4973 /* Input (24 bytes) */
4974 struct hwrm_vnic_free_input {
4976 * This value indicates what type of request this is. The format for the
4977 * rest of the command is determined by this field.
4982 * This value indicates the what completion ring the request will be
4983 * optionally completed on. If the value is -1, then no CR completion
4984 * will be generated. Any other value must be a valid CR ring_id value
4985 * for this function.
4989 /* This value indicates the command sequence number. */
4993 * Target ID of this command. 0x0 - 0xFFF8 - Used for function ids
4994 * 0xFFF8 - 0xFFFE - Reserved for internal processors 0xFFFF - HWRM
4999 * This is the host address where the response will be written when the
5000 * request is complete. This area must be 16B aligned and must be
5001 * cleared to zero before the request is made.
5005 /* Logical vnic ID */
5009 } __attribute__((packed));
5011 /* Output (16 bytes) */
5012 struct hwrm_vnic_free_output {
5014 * Pass/Fail or error type Note: receiver to verify the in parameters,
5015 * and fail the call with an error when appropriate
5017 uint16_t error_code;
5019 /* This field returns the type of original request. */
5022 /* This field provides original sequence number of the command. */
5026 * This field is the length of the response in bytes. The last byte of
5027 * the response is a valid flag that will read as '1' when the command
5028 * has been completely written to memory.
5038 * This field is used in Output records to indicate that the output is
5039 * completely written to RAM. This field should be read as '1' to
5040 * indicate that the output has been completely written. When writing a
5041 * command completion or response to an internal processor, the order of
5042 * writes has to be such that this field is written last.
5045 } __attribute__((packed));
5047 /* hwrm_vnic_rss_cfg */
5048 /* Description: This function is used to enable RSS configuration. */
5050 /* Input (48 bytes) */
5051 struct hwrm_vnic_rss_cfg_input {
5053 * This value indicates what type of request this is. The format for the
5054 * rest of the command is determined by this field.
5059 * This value indicates the what completion ring the request will be
5060 * optionally completed on. If the value is -1, then no CR completion
5061 * will be generated. Any other value must be a valid CR ring_id value
5062 * for this function.
5066 /* This value indicates the command sequence number. */
5070 * Target ID of this command. 0x0 - 0xFFF8 - Used for function ids
5071 * 0xFFF8 - 0xFFFE - Reserved for internal processors 0xFFFF - HWRM
5076 * This is the host address where the response will be written when the
5077 * request is complete. This area must be 16B aligned and must be
5078 * cleared to zero before the request is made.
5083 * When this bit is '1', the RSS hash shall be computed over source and
5084 * destination IPv4 addresses of IPv4 packets.
5086 #define HWRM_VNIC_RSS_CFG_INPUT_HASH_TYPE_IPV4 UINT32_C(0x1)
5088 * When this bit is '1', the RSS hash shall be computed over
5089 * source/destination IPv4 addresses and source/destination ports of
5092 #define HWRM_VNIC_RSS_CFG_INPUT_HASH_TYPE_TCP_IPV4 UINT32_C(0x2)
5094 * When this bit is '1', the RSS hash shall be computed over
5095 * source/destination IPv4 addresses and source/destination ports of
5098 #define HWRM_VNIC_RSS_CFG_INPUT_HASH_TYPE_UDP_IPV4 UINT32_C(0x4)
5100 * When this bit is '1', the RSS hash shall be computed over source and
5101 * destination IPv4 addresses of IPv6 packets.
5103 #define HWRM_VNIC_RSS_CFG_INPUT_HASH_TYPE_IPV6 UINT32_C(0x8)
5105 * When this bit is '1', the RSS hash shall be computed over
5106 * source/destination IPv6 addresses and source/destination ports of
5109 #define HWRM_VNIC_RSS_CFG_INPUT_HASH_TYPE_TCP_IPV6 UINT32_C(0x10)
5111 * When this bit is '1', the RSS hash shall be computed over
5112 * source/destination IPv6 addresses and source/destination ports of
5115 #define HWRM_VNIC_RSS_CFG_INPUT_HASH_TYPE_UDP_IPV6 UINT32_C(0x20)
5120 /* This is the address for rss ring group table */
5121 uint64_t ring_grp_tbl_addr;
5123 /* This is the address for rss hash key table */
5124 uint64_t hash_key_tbl_addr;
5126 /* Index to the rss indirection table. */
5127 uint16_t rss_ctx_idx;
5129 uint16_t unused_1[3];
5130 } __attribute__((packed));
5132 /* Output (16 bytes) */
5133 struct hwrm_vnic_rss_cfg_output {
5135 * Pass/Fail or error type Note: receiver to verify the in parameters,
5136 * and fail the call with an error when appropriate
5138 uint16_t error_code;
5140 /* This field returns the type of original request. */
5143 /* This field provides original sequence number of the command. */
5147 * This field is the length of the response in bytes. The last byte of
5148 * the response is a valid flag that will read as '1' when the command
5149 * has been completely written to memory.
5159 * This field is used in Output records to indicate that the output is
5160 * completely written to RAM. This field should be read as '1' to
5161 * indicate that the output has been completely written. When writing a
5162 * command completion or response to an internal processor, the order of
5163 * writes has to be such that this field is written last.
5166 } __attribute__((packed));
5168 /* Input (16 bytes) */
5169 struct hwrm_vnic_rss_cos_lb_ctx_alloc_input {
5171 * This value indicates what type of request this is. The format for the
5172 * rest of the command is determined by this field.
5177 * This value indicates the what completion ring the request will be
5178 * optionally completed on. If the value is -1, then no CR completion
5179 * will be generated. Any other value must be a valid CR ring_id value
5180 * for this function.
5184 /* This value indicates the command sequence number. */
5188 * Target ID of this command. 0x0 - 0xFFF8 - Used for function ids
5189 * 0xFFF8 - 0xFFFE - Reserved for internal processors 0xFFFF - HWRM
5194 * This is the host address where the response will be written when the
5195 * request is complete. This area must be 16B aligned and must be
5196 * cleared to zero before the request is made.
5199 } __attribute__((packed));
5201 /* Output (16 bytes) */
5203 struct hwrm_vnic_rss_cos_lb_ctx_alloc_output {
5205 * Pass/Fail or error type Note: receiver to verify the in parameters,
5206 * and fail the call with an error when appropriate
5208 uint16_t error_code;
5210 /* This field returns the type of original request. */
5213 /* This field provides original sequence number of the command. */
5217 * This field is the length of the response in bytes. The last byte of
5218 * the response is a valid flag that will read as '1' when the command
5219 * has been completely written to memory.
5223 /* rss_cos_lb_ctx_id is 16 b */
5224 uint16_t rss_cos_lb_ctx_id;
5233 * This field is used in Output records to indicate that the output is
5234 * completely written to RAM. This field should be read as '1' to
5235 * indicate that the output has been completely written. When writing a
5236 * command completion or response to an internal processor, the order of
5237 * writes has to be such that this field is written last.
5240 } __attribute__((packed));
5242 /* hwrm_vnic_rss_cos_lb_ctx_free */
5243 /* Description: This function can be used to free COS/Load Balance context. */
5244 /* Input (24 bytes) */
5246 struct hwrm_vnic_rss_cos_lb_ctx_free_input {
5248 * This value indicates what type of request this is. The format for the
5249 * rest of the command is determined by this field.
5254 * This value indicates the what completion ring the request will be
5255 * optionally completed on. If the value is -1, then no CR completion
5256 * will be generated. Any other value must be a valid CR ring_id value
5257 * for this function.
5261 /* This value indicates the command sequence number. */
5265 * Target ID of this command. 0x0 - 0xFFF8 - Used for function ids
5266 * 0xFFF8 - 0xFFFE - Reserved for internal processors 0xFFFF - HWRM
5271 * This is the host address where the response will be written when the
5272 * request is complete. This area must be 16B aligned and must be
5273 * cleared to zero before the request is made.
5277 /* rss_cos_lb_ctx_id is 16 b */
5278 uint16_t rss_cos_lb_ctx_id;
5280 uint16_t unused_0[3];
5281 } __attribute__((packed));
5283 /* Output (16 bytes) */
5284 struct hwrm_vnic_rss_cos_lb_ctx_free_output {
5286 * Pass/Fail or error type Note: receiver to verify the in parameters,
5287 * and fail the call with an error when appropriate
5289 uint16_t error_code;
5291 /* This field returns the type of original request. */
5294 /* This field provides original sequence number of the command. */
5298 * This field is the length of the response in bytes. The last byte of
5299 * the response is a valid flag that will read as '1' when the command
5300 * has been completely written to memory.
5310 * This field is used in Output records to indicate that the output is
5311 * completely written to RAM. This field should be read as '1' to
5312 * indicate that the output has been completely written. When writing a
5313 * command completion or response to an internal processor, the order of
5314 * writes has to be such that this field is written last.
5317 } __attribute__((packed));
5319 /* Output (32 bytes) */
5320 struct hwrm_queue_qportcfg_output {
5322 * Pass/Fail or error type Note: receiver to verify the in parameters,
5323 * and fail the call with an error when appropriate
5325 uint16_t error_code;
5327 /* This field returns the type of original request. */
5330 /* This field provides original sequence number of the command. */
5334 * This field is the length of the response in bytes. The last byte of
5335 * the response is a valid flag that will read as '1' when the command
5336 * has been completely written to memory.
5340 /* The maximum number of queues that can be configured. */
5341 uint8_t max_configurable_queues;
5343 /* The maximum number of lossless queues that can be configured. */
5344 uint8_t max_configurable_lossless_queues;
5347 * 0 - Not allowed. Non-zero - Allowed. If this value is non-zero, then
5348 * the HWRM shall allow the host SW driver to configure queues using
5351 uint8_t queue_cfg_allowed;
5354 * 0 - Not allowed. Non-zero - Allowed If this value is non-zero, then
5355 * the HWRM shall allow the host SW driver to configure queue buffers
5356 * using hwrm_queue_buffers_cfg.
5358 uint8_t queue_buffers_cfg_allowed;
5361 * 0 - Not allowed. Non-zero - Allowed If this value is non-zero, then
5362 * the HWRM shall allow the host SW driver to configure PFC using
5363 * hwrm_queue_pfcenable_cfg.
5365 uint8_t queue_pfcenable_cfg_allowed;
5368 * 0 - Not allowed. Non-zero - Allowed If this value is non-zero, then
5369 * the HWRM shall allow the host SW driver to configure Priority to CoS
5370 * mapping using hwrm_queue_pri2cos_cfg.
5372 uint8_t queue_pri2cos_cfg_allowed;
5375 * 0 - Not allowed. Non-zero - Allowed If this value is non-zero, then
5376 * the HWRM shall allow the host SW driver to configure CoS Bandwidth
5377 * configuration using hwrm_queue_cos2bw_cfg.
5379 uint8_t queue_cos2bw_cfg_allowed;
5381 /* ID of CoS Queue 0. FF - Invalid id */
5384 /* This value is applicable to CoS queues only. */
5385 /* Lossy (best-effort) */
5386 #define HWRM_QUEUE_QPORTCFG_OUTPUT_QUEUE_ID0_SERVICE_PROFILE_LOSSY \
5387 (UINT32_C(0x0) << 0)
5389 #define HWRM_QUEUE_QPORTCFG_OUTPUT_QUEUE_ID0_SERVICE_PROFILE_LOSSLESS \
5390 (UINT32_C(0x1) << 0)
5392 * Set to 0xFF... (All Fs) if there is no service profile
5395 #define HWRM_QUEUE_QPORTCFG_OUTPUT_QUEUE_ID0_SERVICE_PROFILE_UNKNOWN \
5396 (UINT32_C(0xff) << 0)
5397 uint8_t queue_id0_service_profile;
5399 /* ID of CoS Queue 1. FF - Invalid id */
5401 /* This value is applicable to CoS queues only. */
5402 /* Lossy (best-effort) */
5403 #define HWRM_QUEUE_QPORTCFG_OUTPUT_QUEUE_ID1_SERVICE_PROFILE_LOSSY \
5404 (UINT32_C(0x0) << 0)
5406 #define HWRM_QUEUE_QPORTCFG_OUTPUT_QUEUE_ID1_SERVICE_PROFILE_LOSSLESS \
5407 (UINT32_C(0x1) << 0)
5409 * Set to 0xFF... (All Fs) if there is no service profile
5412 #define HWRM_QUEUE_QPORTCFG_OUTPUT_QUEUE_ID1_SERVICE_PROFILE_UNKNOWN \
5413 (UINT32_C(0xff) << 0)
5414 uint8_t queue_id1_service_profile;
5416 /* ID of CoS Queue 2. FF - Invalid id */
5418 /* This value is applicable to CoS queues only. */
5419 /* Lossy (best-effort) */
5420 #define HWRM_QUEUE_QPORTCFG_OUTPUT_QUEUE_ID2_SERVICE_PROFILE_LOSSY \
5421 (UINT32_C(0x0) << 0)
5423 #define HWRM_QUEUE_QPORTCFG_OUTPUT_QUEUE_ID2_SERVICE_PROFILE_LOSSLESS \
5424 (UINT32_C(0x1) << 0)
5426 * Set to 0xFF... (All Fs) if there is no service profile
5429 #define HWRM_QUEUE_QPORTCFG_OUTPUT_QUEUE_ID2_SERVICE_PROFILE_UNKNOWN \
5430 (UINT32_C(0xff) << 0)
5431 uint8_t queue_id2_service_profile;
5433 /* ID of CoS Queue 3. FF - Invalid id */
5436 /* This value is applicable to CoS queues only. */
5437 /* Lossy (best-effort) */
5438 #define HWRM_QUEUE_QPORTCFG_OUTPUT_QUEUE_ID3_SERVICE_PROFILE_LOSSY \
5439 (UINT32_C(0x0) << 0)
5441 #define HWRM_QUEUE_QPORTCFG_OUTPUT_QUEUE_ID3_SERVICE_PROFILE_LOSSLESS \
5442 (UINT32_C(0x1) << 0)
5444 * Set to 0xFF... (All Fs) if there is no service profile
5447 #define HWRM_QUEUE_QPORTCFG_OUTPUT_QUEUE_ID3_SERVICE_PROFILE_UNKNOWN \
5448 (UINT32_C(0xff) << 0)
5449 uint8_t queue_id3_service_profile;
5451 /* ID of CoS Queue 4. FF - Invalid id */
5453 /* This value is applicable to CoS queues only. */
5454 /* Lossy (best-effort) */
5455 #define HWRM_QUEUE_QPORTCFG_OUTPUT_QUEUE_ID4_SERVICE_PROFILE_LOSSY \
5456 (UINT32_C(0x0) << 0)
5458 #define HWRM_QUEUE_QPORTCFG_OUTPUT_QUEUE_ID4_SERVICE_PROFILE_LOSSLESS \
5459 (UINT32_C(0x1) << 0)
5461 * Set to 0xFF... (All Fs) if there is no service profile
5464 #define HWRM_QUEUE_QPORTCFG_OUTPUT_QUEUE_ID4_SERVICE_PROFILE_UNKNOWN \
5465 (UINT32_C(0xff) << 0)
5466 uint8_t queue_id4_service_profile;
5468 /* ID of CoS Queue 5. FF - Invalid id */
5471 /* This value is applicable to CoS queues only. */
5472 /* Lossy (best-effort) */
5473 #define HWRM_QUEUE_QPORTCFG_OUTPUT_QUEUE_ID5_SERVICE_PROFILE_LOSSY \
5474 (UINT32_C(0x0) << 0)
5476 #define HWRM_QUEUE_QPORTCFG_OUTPUT_QUEUE_ID5_SERVICE_PROFILE_LOSSLESS \
5477 (UINT32_C(0x1) << 0)
5479 * Set to 0xFF... (All Fs) if there is no service profile
5482 #define HWRM_QUEUE_QPORTCFG_OUTPUT_QUEUE_ID5_SERVICE_PROFILE_UNKNOWN \
5483 (UINT32_C(0xff) << 0)
5484 uint8_t queue_id5_service_profile;
5486 /* ID of CoS Queue 6. FF - Invalid id */
5487 uint8_t queue_id6_service_profile;
5488 /* This value is applicable to CoS queues only. */
5489 /* Lossy (best-effort) */
5490 #define HWRM_QUEUE_QPORTCFG_OUTPUT_QUEUE_ID6_SERVICE_PROFILE_LOSSY \
5491 (UINT32_C(0x0) << 0)
5493 #define HWRM_QUEUE_QPORTCFG_OUTPUT_QUEUE_ID6_SERVICE_PROFILE_LOSSLESS \
5494 (UINT32_C(0x1) << 0)
5496 * Set to 0xFF... (All Fs) if there is no service profile
5499 #define HWRM_QUEUE_QPORTCFG_OUTPUT_QUEUE_ID6_SERVICE_PROFILE_UNKNOWN \
5500 (UINT32_C(0xff) << 0)
5503 /* ID of CoS Queue 7. FF - Invalid id */
5506 /* This value is applicable to CoS queues only. */
5507 /* Lossy (best-effort) */
5508 #define HWRM_QUEUE_QPORTCFG_OUTPUT_QUEUE_ID7_SERVICE_PROFILE_LOSSY \
5509 (UINT32_C(0x0) << 0)
5511 #define HWRM_QUEUE_QPORTCFG_OUTPUT_QUEUE_ID7_SERVICE_PROFILE_LOSSLESS \
5512 (UINT32_C(0x1) << 0)
5514 * Set to 0xFF... (All Fs) if there is no service profile
5517 #define HWRM_QUEUE_QPORTCFG_OUTPUT_QUEUE_ID7_SERVICE_PROFILE_UNKNOWN \
5518 (UINT32_C(0xff) << 0)
5519 uint8_t queue_id7_service_profile;
5522 * This field is used in Output records to indicate that the output is
5523 * completely written to RAM. This field should be read as '1' to
5524 * indicate that the output has been completely written. When writing a
5525 * command completion or response to an internal processor, the order of
5526 * writes has to be such that this field is written last.
5529 } __attribute__((packed));
5531 /* hwrm_func_drv_rgtr */
5533 * Description: This command is used by the function driver to register its
5534 * information with the HWRM. A function driver shall implement this command. A
5535 * function driver shall use this command during the driver initialization right
5536 * after the HWRM version discovery and default ring resources allocation.
5539 /* Input (80 bytes) */
5540 struct hwrm_func_drv_rgtr_input {
5542 * This value indicates what type of request this is. The format for the
5543 * rest of the command is determined by this field.
5548 * This value indicates the what completion ring the request will be
5549 * optionally completed on. If the value is -1, then no CR completion
5550 * will be generated. Any other value must be a valid CR ring_id value
5551 * for this function.
5555 /* This value indicates the command sequence number. */
5559 * Target ID of this command. 0x0 - 0xFFF8 - Used for function ids
5560 * 0xFFF8 - 0xFFFE - Reserved for internal processors 0xFFFF - HWRM
5565 * This is the host address where the response will be written when the
5566 * request is complete. This area must be 16B aligned and must be
5567 * cleared to zero before the request is made.
5572 * When this bit is '1', the function driver is requesting all requests
5573 * from its children VF drivers to be forwarded to itself. This flag can
5574 * only be set by the PF driver. If a VF driver sets this flag, it
5575 * should be ignored by the HWRM.
5577 #define HWRM_FUNC_DRV_RGTR_INPUT_FLAGS_FWD_ALL_MODE UINT32_C(0x1)
5579 * When this bit is '1', the function is requesting none of the requests
5580 * from its children VF drivers to be forwarded to itself. This flag can
5581 * only be set by the PF driver. If a VF driver sets this flag, it
5582 * should be ignored by the HWRM.
5584 #define HWRM_FUNC_DRV_RGTR_INPUT_FLAGS_FWD_NONE_MODE UINT32_C(0x2)
5587 /* This bit must be '1' for the os_type field to be configured. */
5588 #define HWRM_FUNC_DRV_RGTR_INPUT_ENABLES_OS_TYPE UINT32_C(0x1)
5589 /* This bit must be '1' for the ver field to be configured. */
5590 #define HWRM_FUNC_DRV_RGTR_INPUT_ENABLES_VER UINT32_C(0x2)
5591 /* This bit must be '1' for the timestamp field to be configured. */
5592 #define HWRM_FUNC_DRV_RGTR_INPUT_ENABLES_TIMESTAMP UINT32_C(0x4)
5593 /* This bit must be '1' for the vf_req_fwd field to be configured. */
5594 #define HWRM_FUNC_DRV_RGTR_INPUT_ENABLES_VF_REQ_FWD UINT32_C(0x8)
5596 * This bit must be '1' for the async_event_fwd field to be configured.
5598 #define HWRM_FUNC_DRV_RGTR_INPUT_ENABLES_ASYNC_EVENT_FWD \
5602 /* This value indicates the type of OS. */
5604 #define HWRM_FUNC_DRV_RGTR_INPUT_OS_TYPE_UNKNOWN \
5605 (UINT32_C(0x0) << 0)
5606 /* Other OS not listed below. */
5607 #define HWRM_FUNC_DRV_RGTR_INPUT_OS_TYPE_OTHER \
5608 (UINT32_C(0x1) << 0)
5610 #define HWRM_FUNC_DRV_RGTR_INPUT_OS_TYPE_MSDOS \
5611 (UINT32_C(0xe) << 0)
5613 #define HWRM_FUNC_DRV_RGTR_INPUT_OS_TYPE_WINDOWS \
5614 (UINT32_C(0x12) << 0)
5616 #define HWRM_FUNC_DRV_RGTR_INPUT_OS_TYPE_SOLARIS \
5617 (UINT32_C(0x1d) << 0)
5619 #define HWRM_FUNC_DRV_RGTR_INPUT_OS_TYPE_LINUX \
5620 (UINT32_C(0x24) << 0)
5622 #define HWRM_FUNC_DRV_RGTR_INPUT_OS_TYPE_FREEBSD \
5623 (UINT32_C(0x2a) << 0)
5624 /* VMware ESXi OS. */
5625 #define HWRM_FUNC_DRV_RGTR_INPUT_OS_TYPE_ESXI \
5626 (UINT32_C(0x68) << 0)
5627 /* Microsoft Windows 8 64-bit OS. */
5628 #define HWRM_FUNC_DRV_RGTR_INPUT_OS_TYPE_WIN864 \
5629 (UINT32_C(0x73) << 0)
5630 /* Microsoft Windows Server 2012 R2 OS. */
5631 #define HWRM_FUNC_DRV_RGTR_INPUT_OS_TYPE_WIN2012R2 \
5632 (UINT32_C(0x74) << 0)
5635 /* This is the major version of the driver. */
5638 /* This is the minor version of the driver. */
5641 /* This is the update version of the driver. */
5648 * This is a 32-bit timestamp provided by the driver for keep alive. The
5649 * timestamp is in multiples of 1ms.
5656 * This is a 256-bit bit mask provided by the PF driver for letting the
5657 * HWRM know what commands issued by the VF driver to the HWRM should be
5658 * forwarded to the PF driver. Nth bit refers to the Nth req_type.
5659 * Setting Nth bit to 1 indicates that requests from the VF driver with
5660 * req_type equal to N shall be forwarded to the parent PF driver. This
5661 * field is not valid for the VF driver.
5663 uint32_t vf_req_fwd[8];
5666 * This is a 256-bit bit mask provided by the function driver (PF or VF
5667 * driver) to indicate the list of asynchronous event completions to be
5668 * forwarded. Nth bit refers to the Nth event_id. Setting Nth bit to 1
5669 * by the function driver shall result in the HWRM forwarding
5670 * asynchronous event completion with event_id equal to N. If all bits
5671 * are set to 0 (value of 0), then the HWRM shall not forward any
5672 * asynchronous event completion to this function driver.
5674 uint32_t async_event_fwd[8];
5675 } __attribute__((packed));
5677 /* Output (16 bytes) */
5679 struct hwrm_func_drv_rgtr_output {
5681 * Pass/Fail or error type Note: receiver to verify the in parameters,
5682 * and fail the call with an error when appropriate
5684 uint16_t error_code;
5686 /* This field returns the type of original request. */
5689 /* This field provides original sequence number of the command. */
5693 * This field is the length of the response in bytes. The last byte of
5694 * the response is a valid flag that will read as '1' when the command
5695 * has been completely written to memory.
5705 * This field is used in Output records to indicate that the output is
5706 * completely written to RAM. This field should be read as '1' to
5707 * indicate that the output has been completely written. When writing a
5708 * command completion or response to an internal processor, the order of
5709 * writes has to be such that this field is written last.
5712 } __attribute__((packed));
5714 /* hwrm_func_drv_unrgtr */
5716 * Description: This command is used by the function driver to un register with
5717 * the HWRM. A function driver shall implement this command. A function driver
5718 * shall use this command during the driver unloading.
5720 /* Input (24 bytes) */
5722 struct hwrm_func_drv_unrgtr_input {
5724 * This value indicates what type of request this is. The format for the
5725 * rest of the command is determined by this field.
5730 * This value indicates the what completion ring the request will be
5731 * optionally completed on. If the value is -1, then no CR completion
5732 * will be generated. Any other value must be a valid CR ring_id value
5733 * for this function.
5737 /* This value indicates the command sequence number. */
5741 * Target ID of this command. 0x0 - 0xFFF8 - Used for function ids
5742 * 0xFFF8 - 0xFFFE - Reserved for internal processors 0xFFFF - HWRM
5747 * This is the host address where the response will be written when the
5748 * request is complete. This area must be 16B aligned and must be
5749 * cleared to zero before the request is made.
5754 * When this bit is '1', the function driver is notifying the HWRM to
5755 * prepare for the shutdown.
5757 #define HWRM_FUNC_DRV_UNRGTR_INPUT_FLAGS_PREPARE_FOR_SHUTDOWN \
5762 } __attribute__((packed));
5764 /* Output (16 bytes) */
5765 struct hwrm_func_drv_unrgtr_output {
5767 * Pass/Fail or error type Note: receiver to verify the in parameters,
5768 * and fail the call with an error when appropriate
5770 uint16_t error_code;
5772 /* This field returns the type of original request. */
5775 /* This field provides original sequence number of the command. */
5779 * This field is the length of the response in bytes. The last byte of
5780 * the response is a valid flag that will read as '1' when the command
5781 * has been completely written to memory.
5791 * This field is used in Output records to indicate that the output is
5792 * completely written to RAM. This field should be read as '1' to
5793 * indicate that the output has been completely written. When writing a
5794 * command completion or response to an internal processor, the order of
5795 * writes has to be such that this field is written last.
5798 } __attribute__((packed));
5800 /* hwrm_func_qcfg */
5802 * Description: This command returns the current configuration of a function.
5803 * The input FID value is used to indicate what function is being queried. This
5804 * allows a physical function driver to query virtual functions that are
5805 * children of the physical function. The output FID value is needed to
5806 * configure Rings and MSI-X vectors so their DMA operations appear correctly on
5809 /* Input (24 bytes) */
5810 struct hwrm_func_qcfg_input {
5812 * This value indicates what type of request this is. The format for the
5813 * rest of the command is determined by this field.
5817 * This value indicates the what completion ring the request will be
5818 * optionally completed on. If the value is -1, then no CR completion
5819 * will be generated. Any other value must be a valid CR ring_id value
5820 * for this function.
5823 /* This value indicates the command sequence number. */
5826 * Target ID of this command. 0x0 - 0xFFF8 - Used for function ids
5827 * 0xFFF8 - 0xFFFE - Reserved for internal processors 0xFFFF - HWRM
5831 * This is the host address where the response will be written when the
5832 * request is complete. This area must be 16B aligned and must be
5833 * cleared to zero before the request is made.
5837 * Function ID of the function that is being queried. 0xFF... (All Fs)
5838 * if the query is for the requesting function.
5842 uint16_t unused_0[3];
5843 } __attribute__((packed));
5845 /* Output (72 bytes) */
5846 struct hwrm_func_qcfg_output {
5848 * Pass/Fail or error type Note: receiver to verify the in parameters,
5849 * and fail the call with an error when appropriate
5851 uint16_t error_code;
5852 /* This field returns the type of original request. */
5854 /* This field provides original sequence number of the command. */
5857 * This field is the length of the response in bytes. The last byte of
5858 * the response is a valid flag that will read as '1' when the command
5859 * has been completely written to memory.
5863 * FID value. This value is used to identify operations on the PCI bus
5864 * as belonging to a particular PCI function.
5868 * Port ID of port that this function is associated with. 0xFF... (All
5869 * Fs) if this function is not associated with any port.
5873 * This value is the current VLAN setting for this function. The value
5874 * of 0 for this field indicates no priority tagging or VLAN is used.
5875 * This VLAN is in 802.1Q tag format.
5883 * This value is current MAC address configured for this function. A
5884 * value of 00-00-00-00-00-00 indicates no MAC address is currently
5887 uint8_t mac_address[6];
5890 * This value is current PCI ID of this function. If ARI is enabled,
5891 * then it is Bus Number (8b):Function Number(8b). Otherwise, it is Bus
5892 * Number (8b):Device Number (4b):Function Number(4b).
5895 /* The number of RSS/COS contexts currently allocated to the function. */
5896 uint16_t alloc_rsscos_ctx;
5898 * The number of completion rings currently allocated to the function.
5899 * This does not include the rings allocated to any children functions
5902 uint16_t alloc_cmpl_rings;
5904 * The number of transmit rings currently allocated to the function.
5905 * This does not include the rings allocated to any children functions
5908 uint16_t alloc_tx_rings;
5910 * The number of receive rings currently allocated to the function. This
5911 * does not include the rings allocated to any children functions if
5914 uint16_t alloc_rx_rings;
5915 /* The allocated number of L2 contexts to the function. */
5916 uint16_t alloc_l2_ctx;
5917 /* The allocated number of vnics to the function. */
5918 uint16_t alloc_vnics;
5920 * The maximum transmission unit of the function. For rings allocated on
5921 * this function, this default value is used if ring MTU is not
5926 * The maximum receive unit of the function. For vnics allocated on this
5927 * function, this default value is used if vnic MRU is not specified.
5930 /* The statistics context assigned to a function. */
5931 uint16_t stat_ctx_id;
5933 * The HWRM shall return Unknown value for this field when this command
5934 * is used to query VF's configuration.
5936 /* Single physical function */
5937 #define HWRM_FUNC_QCFG_OUTPUT_PORT_PARTITION_TYPE_SPF \
5938 (UINT32_C(0x0) << 0)
5939 /* Multiple physical functions */
5940 #define HWRM_FUNC_QCFG_OUTPUT_PORT_PARTITION_TYPE_MPFS \
5941 (UINT32_C(0x1) << 0)
5942 /* Network Partitioning 1.0 */
5943 #define HWRM_FUNC_QCFG_OUTPUT_PORT_PARTITION_TYPE_NPAR1_0 \
5944 (UINT32_C(0x2) << 0)
5945 /* Network Partitioning 1.5 */
5946 #define HWRM_FUNC_QCFG_OUTPUT_PORT_PARTITION_TYPE_NPAR1_5 \
5947 (UINT32_C(0x3) << 0)
5948 /* Network Partitioning 2.0 */
5949 #define HWRM_FUNC_QCFG_OUTPUT_PORT_PARTITION_TYPE_NPAR2_0 \
5950 (UINT32_C(0x4) << 0)
5952 #define HWRM_FUNC_QCFG_OUTPUT_PORT_PARTITION_TYPE_UNKNOWN \
5953 (UINT32_C(0xff) << 0)
5954 uint8_t port_partition_type;
5957 /* The default VNIC ID assigned to a function that is being queried. */
5958 uint16_t dflt_vnic_id;
5963 * Minimum BW allocated for this function in Mbps. The HWRM will
5964 * translate this value into byte counter and time interval used for the
5965 * scheduler inside the device. A value of 0 indicates the minimum
5966 * bandwidth is not configured.
5970 * Maximum BW allocated for this function in Mbps. The HWRM will
5971 * translate this value into byte counter and time interval used for the
5972 * scheduler inside the device. A value of 0 indicates that the maximum
5973 * bandwidth is not configured.
5977 * This value indicates the Edge virtual bridge mode for the domain that
5978 * this function belongs to.
5980 /* No Edge Virtual Bridging (EVB) */
5981 #define HWRM_FUNC_QCFG_OUTPUT_EVB_MODE_NO_EVB (UINT32_C(0x0) << 0)
5982 /* Virtual Ethernet Bridge (VEB) */
5983 #define HWRM_FUNC_QCFG_OUTPUT_EVB_MODE_VEB (UINT32_C(0x1) << 0)
5984 /* Virtual Ethernet Port Aggregator (VEPA) */
5985 #define HWRM_FUNC_QCFG_OUTPUT_EVB_MODE_VEPA (UINT32_C(0x2) << 0)
5991 * The number of allocated multicast filters for this function on the RX
5994 uint32_t alloc_mcast_filters;
5995 /* The number of allocated HW ring groups for this function. */
5996 uint32_t alloc_hw_ring_grps;
6002 * This field is used in Output records to indicate that the output is
6003 * completely written to RAM. This field should be read as '1' to
6004 * indicate that the output has been completely written. When writing a
6005 * command completion or response to an internal processor, the order of
6006 * writes has to be such that this field is written last.
6009 } __attribute__((packed));