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34 #ifndef _HSI_STRUCT_DEF_EXTERNAL_H_
35 #define _HSI_STRUCT_DEF_EXTERNAL_H_
38 * per-context HW statistics -- chip view
41 struct ctx_hw_stats64 {
42 uint64_t rx_ucast_pkts;
43 uint64_t rx_mcast_pkts;
44 uint64_t rx_bcast_pkts;
45 uint64_t rx_drop_pkts;
46 uint64_t rx_discard_pkts;
47 uint64_t rx_ucast_bytes;
48 uint64_t rx_mcast_bytes;
49 uint64_t rx_bcast_bytes;
51 uint64_t tx_ucast_pkts;
52 uint64_t tx_mcast_pkts;
53 uint64_t tx_bcast_pkts;
54 uint64_t tx_drop_pkts;
55 uint64_t tx_discard_pkts;
56 uint64_t tx_ucast_bytes;
57 uint64_t tx_mcast_bytes;
58 uint64_t tx_bcast_bytes;
64 } __attribute__((packed));
66 /* HW Resource Manager Specification 1.5.1 */
67 #define HWRM_VERSION_MAJOR 1
68 #define HWRM_VERSION_MINOR 5
69 #define HWRM_VERSION_UPDATE 1
71 #define HWRM_VERSION_STR "1.5.1"
74 * Following is the signature for HWRM message field that indicates not
75 * applicable (All F's). Need to cast it the size of the field if needed.
77 #define HWRM_NA_SIGNATURE ((uint32_t)(-1))
78 #define HWRM_MAX_REQ_LEN (128) /* hwrm_func_buf_rgtr */
79 #define HWRM_MAX_RESP_LEN (176) /* hwrm_func_qstats */
80 #define HW_HASH_INDEX_SIZE 0x80 /* 7 bit indirection table index. */
81 #define HW_HASH_KEY_SIZE 40
82 #define HWRM_RESP_VALID_KEY 1 /* valid key for HWRM response */
87 #define HWRM_VER_GET (UINT32_C(0x0))
88 #define HWRM_FUNC_RESET (UINT32_C(0x11))
89 #define HWRM_FUNC_QCAPS (UINT32_C(0x15))
90 #define HWRM_FUNC_QCFG (UINT32_C(0x16))
91 #define HWRM_FUNC_DRV_UNRGTR (UINT32_C(0x1a))
92 #define HWRM_FUNC_DRV_RGTR (UINT32_C(0x1d))
93 #define HWRM_PORT_PHY_CFG (UINT32_C(0x20))
94 #define HWRM_PORT_PHY_QCFG (UINT32_C(0x27))
95 #define HWRM_QUEUE_QPORTCFG (UINT32_C(0x30))
96 #define HWRM_VNIC_ALLOC (UINT32_C(0x40))
97 #define HWRM_VNIC_FREE (UINT32_C(0x41))
98 #define HWRM_VNIC_CFG (UINT32_C(0x42))
99 #define HWRM_VNIC_RSS_CFG (UINT32_C(0x46))
100 #define HWRM_RING_ALLOC (UINT32_C(0x50))
101 #define HWRM_RING_FREE (UINT32_C(0x51))
102 #define HWRM_RING_GRP_ALLOC (UINT32_C(0x60))
103 #define HWRM_RING_GRP_FREE (UINT32_C(0x61))
104 #define HWRM_VNIC_RSS_COS_LB_CTX_ALLOC (UINT32_C(0x70))
105 #define HWRM_VNIC_RSS_COS_LB_CTX_FREE (UINT32_C(0x71))
106 #define HWRM_CFA_L2_FILTER_ALLOC (UINT32_C(0x90))
107 #define HWRM_CFA_L2_FILTER_FREE (UINT32_C(0x91))
108 #define HWRM_CFA_L2_FILTER_CFG (UINT32_C(0x92))
109 #define HWRM_CFA_L2_SET_RX_MASK (UINT32_C(0x93))
110 #define HWRM_STAT_CTX_ALLOC (UINT32_C(0xb0))
111 #define HWRM_STAT_CTX_FREE (UINT32_C(0xb1))
112 #define HWRM_STAT_CTX_CLR_STATS (UINT32_C(0xb3))
113 #define HWRM_EXEC_FWD_RESP (UINT32_C(0xd0))
116 #define HWRM_ERR_CODE_INVALID_PARAMS (UINT32_C(0x2))
117 #define HWRM_ERR_CODE_RESOURCE_ACCESS_DENIED (UINT32_C(0x3))
119 /* Short TX BD (16 bytes) */
123 * All bits in this field must be valid on the first BD of a
124 * packet. Only the packet_end bit must be valid for the
125 * remaining BDs of a packet.
127 /* This value identifies the type of buffer descriptor. */
128 #define TX_BD_SHORT_TYPE_MASK UINT32_C(0x3f)
129 #define TX_BD_SHORT_TYPE_SFT 0
131 * Indicates that this BD is 16B long and is
132 * used for normal L2 packet transmission.
134 #define TX_BD_SHORT_TYPE_TX_BD_SHORT UINT32_C(0x0)
136 * If set to 1, the packet ends with the data in the buffer
137 * pointed to by this descriptor. This flag must be valid on
140 #define TX_BD_SHORT_FLAGS_PACKET_END UINT32_C(0x40)
142 * If set to 1, the device will not generate a completion for
143 * this transmit packet unless there is an error in it's
144 * processing. If this bit is set to 0, then the packet will be
145 * completed normally. This bit must be valid only on the first
148 #define TX_BD_SHORT_FLAGS_NO_CMPL UINT32_C(0x80)
150 * This value indicates how many 16B BD locations are consumed
151 * in the ring by this packet. A value of 1 indicates that this
152 * BD is the only BD (and that the it is a short BD). A value of
153 * 3 indicates either 3 short BDs or 1 long BD and one short BD
154 * in the packet. A value of 0 indicates that there are 32 BD
155 * locations in the packet (the maximum). This field is valid
156 * only on the first BD of a packet.
158 #define TX_BD_SHORT_FLAGS_BD_CNT_MASK UINT32_C(0x1f00)
159 #define TX_BD_SHORT_FLAGS_BD_CNT_SFT 8
161 * This value is a hint for the length of the entire packet. It
162 * is used by the chip to optimize internal processing. The
163 * packet will be dropped if the hint is too short. This field
164 * is valid only on the first BD of a packet.
166 #define TX_BD_SHORT_FLAGS_LHINT_MASK UINT32_C(0x6000)
167 #define TX_BD_SHORT_FLAGS_LHINT_SFT 13
168 /* indicates packet length < 512B */
169 #define TX_BD_SHORT_FLAGS_LHINT_LT512 (UINT32_C(0x0) << 13)
170 /* indicates 512 <= packet length < 1KB */
171 #define TX_BD_SHORT_FLAGS_LHINT_LT1K (UINT32_C(0x1) << 13)
172 /* indicates 1KB <= packet length < 2KB */
173 #define TX_BD_SHORT_FLAGS_LHINT_LT2K (UINT32_C(0x2) << 13)
174 /* indicates packet length >= 2KB */
175 #define TX_BD_SHORT_FLAGS_LHINT_GTE2K (UINT32_C(0x3) << 13)
176 #define TX_BD_SHORT_FLAGS_LHINT_LAST TX_BD_SHORT_FLAGS_LHINT_GTE2K
178 * If set to 1, the device immediately updates the Send Consumer
179 * Index after the buffer associated with this descriptor has
180 * been transferred via DMA to NIC memory from host memory. An
181 * interrupt may or may not be generated according to the state
182 * of the interrupt avoidance mechanisms. If this bit is set to
183 * 0, then the Consumer Index is only updated as soon as one of
184 * the host interrupt coalescing conditions has been met. This
185 * bit must be valid on the first BD of a packet.
187 #define TX_BD_SHORT_FLAGS_COAL_NOW UINT32_C(0x8000)
189 * All bits in this field must be valid on the first BD of a
190 * packet. Only the packet_end bit must be valid for the
191 * remaining BDs of a packet.
193 #define TX_BD_SHORT_FLAGS_MASK UINT32_C(0xffc0)
194 #define TX_BD_SHORT_FLAGS_SFT 6
197 * This is the length of the host physical buffer this BD
198 * describes in bytes. This field must be valid on all BDs of a
203 * The opaque data field is pass through to the completion and
204 * can be used for any data that the driver wants to associate
205 * with the transmit BD. This field must be valid on the first
210 * This is the host physical address for the portion of the
211 * packet described by this TX BD. This value must be valid on
212 * all BDs of a packet.
214 } __attribute__((packed));
216 /* Long TX BD (32 bytes split to 2 16-byte struct) */
220 * All bits in this field must be valid on the first BD of a
221 * packet. Only the packet_end bit must be valid for the
222 * remaining BDs of a packet.
224 /* This value identifies the type of buffer descriptor. */
225 #define TX_BD_LONG_TYPE_MASK UINT32_C(0x3f)
226 #define TX_BD_LONG_TYPE_SFT 0
228 * Indicates that this BD is 32B long and is
229 * used for normal L2 packet transmission.
231 #define TX_BD_LONG_TYPE_TX_BD_LONG UINT32_C(0x10)
233 * If set to 1, the packet ends with the data in the buffer
234 * pointed to by this descriptor. This flag must be valid on
237 #define TX_BD_LONG_FLAGS_PACKET_END UINT32_C(0x40)
239 * If set to 1, the device will not generate a completion for
240 * this transmit packet unless there is an error in it's
241 * processing. If this bit is set to 0, then the packet will be
242 * completed normally. This bit must be valid only on the first
245 #define TX_BD_LONG_FLAGS_NO_CMPL UINT32_C(0x80)
247 * This value indicates how many 16B BD locations are consumed
248 * in the ring by this packet. A value of 1 indicates that this
249 * BD is the only BD (and that the it is a short BD). A value of
250 * 3 indicates either 3 short BDs or 1 long BD and one short BD
251 * in the packet. A value of 0 indicates that there are 32 BD
252 * locations in the packet (the maximum). This field is valid
253 * only on the first BD of a packet.
255 #define TX_BD_LONG_FLAGS_BD_CNT_MASK UINT32_C(0x1f00)
256 #define TX_BD_LONG_FLAGS_BD_CNT_SFT 8
258 * This value is a hint for the length of the entire packet. It
259 * is used by the chip to optimize internal processing. The
260 * packet will be dropped if the hint is too short. This field
261 * is valid only on the first BD of a packet.
263 #define TX_BD_LONG_FLAGS_LHINT_MASK UINT32_C(0x6000)
264 #define TX_BD_LONG_FLAGS_LHINT_SFT 13
265 /* indicates packet length < 512B */
266 #define TX_BD_LONG_FLAGS_LHINT_LT512 (UINT32_C(0x0) << 13)
267 /* indicates 512 <= packet length < 1KB */
268 #define TX_BD_LONG_FLAGS_LHINT_LT1K (UINT32_C(0x1) << 13)
269 /* indicates 1KB <= packet length < 2KB */
270 #define TX_BD_LONG_FLAGS_LHINT_LT2K (UINT32_C(0x2) << 13)
271 /* indicates packet length >= 2KB */
272 #define TX_BD_LONG_FLAGS_LHINT_GTE2K (UINT32_C(0x3) << 13)
273 #define TX_BD_LONG_FLAGS_LHINT_LAST TX_BD_LONG_FLAGS_LHINT_GTE2K
275 * If set to 1, the device immediately updates the Send Consumer
276 * Index after the buffer associated with this descriptor has
277 * been transferred via DMA to NIC memory from host memory. An
278 * interrupt may or may not be generated according to the state
279 * of the interrupt avoidance mechanisms. If this bit is set to
280 * 0, then the Consumer Index is only updated as soon as one of
281 * the host interrupt coalescing conditions has been met. This
282 * bit must be valid on the first BD of a packet.
284 #define TX_BD_LONG_FLAGS_COAL_NOW UINT32_C(0x8000)
286 * All bits in this field must be valid on the first BD of a
287 * packet. Only the packet_end bit must be valid for the
288 * remaining BDs of a packet.
290 #define TX_BD_LONG_FLAGS_MASK UINT32_C(0xffc0)
291 #define TX_BD_LONG_FLAGS_SFT 6
294 * This is the length of the host physical buffer this BD
295 * describes in bytes. This field must be valid on all BDs of a
300 * The opaque data field is pass through to the completion and
301 * can be used for any data that the driver wants to associate
302 * with the transmit BD. This field must be valid on the first
307 * This is the host physical address for the portion of the
308 * packet described by this TX BD. This value must be valid on
309 * all BDs of a packet.
311 } __attribute__((packed));
313 /* last 16 bytes of Long TX BD */
314 struct tx_bd_long_hi {
317 * All bits in this field must be valid on the first BD of a
318 * packet. Their value on other BDs of the packet will be
322 * If set to 1, the controller replaces the TCP/UPD checksum
323 * fields of normal TCP/UPD checksum, or the inner TCP/UDP
324 * checksum field of the encapsulated TCP/UDP packets with the
325 * hardware calculated TCP/UDP checksum for the packet
326 * associated with this descriptor. The flag is ignored if the
327 * LSO flag is set. This bit must be valid on the first BD of a
330 #define TX_BD_LONG_LFLAGS_TCP_UDP_CHKSUM UINT32_C(0x1)
332 * If set to 1, the controller replaces the IP checksum of the
333 * normal packets, or the inner IP checksum of the encapsulated
334 * packets with the hardware calculated IP checksum for the
335 * packet associated with this descriptor. This bit must be
336 * valid on the first BD of a packet.
338 #define TX_BD_LONG_LFLAGS_IP_CHKSUM UINT32_C(0x2)
340 * If set to 1, the controller will not append an Ethernet CRC
341 * to the end of the frame. This bit must be valid on the first
342 * BD of a packet. Packet must be 64B or longer when this flag
343 * is set. It is not useful to use this bit with any form of TX
344 * offload such as CSO or LSO. The intent is that the packet
345 * from the host already has a valid Ethernet CRC on the packet.
347 #define TX_BD_LONG_LFLAGS_NOCRC UINT32_C(0x4)
349 * If set to 1, the device will record the time at which the
350 * packet was actually transmitted at the TX MAC. This bit must
351 * be valid on the first BD of a packet.
353 #define TX_BD_LONG_LFLAGS_STAMP UINT32_C(0x8)
355 * If set to 1, The controller replaces the tunnel IP checksum
356 * field with hardware calculated IP checksum for the IP header
357 * of the packet associated with this descriptor. For outer UDP
358 * checksum, global outer UDP checksum TE_NIC register needs to
359 * be enabled. If the global outer UDP checksum TE_NIC register
360 * bit is set, outer UDP checksum will be calculated for the
361 * following cases: 1. Packets with tcp_udp_chksum flag set to
362 * offload checksum for inner packet AND the inner packet is
363 * TCP/UDP. If the inner packet is ICMP for example (non-
364 * TCP/UDP), even if the tcp_udp_chksum is set, the outer UDP
365 * checksum will not be calculated. 2. Packets with lso flag set
366 * which implies inner TCP checksum calculation as part of LSO
369 #define TX_BD_LONG_LFLAGS_T_IP_CHKSUM UINT32_C(0x10)
371 * If set to 1, the device will treat this packet with LSO(Large
372 * Send Offload) processing for both normal or encapsulated
373 * packets, which is a form of TCP segmentation. When this bit
374 * is 1, the hdr_size and mss fields must be valid. The driver
375 * doesn't need to set t_ip_chksum, ip_chksum, and
376 * tcp_udp_chksum flags since the controller will replace the
377 * appropriate checksum fields for segmented packets. When this
378 * bit is 1, the hdr_size and mss fields must be valid.
380 #define TX_BD_LONG_LFLAGS_LSO UINT32_C(0x20)
382 * If set to zero when LSO is '1', then the IPID will be treated
383 * as a 16b number and will be wrapped if it exceeds a value of
384 * 0xffff. If set to one when LSO is '1', then the IPID will be
385 * treated as a 15b number and will be wrapped if it exceeds a
388 #define TX_BD_LONG_LFLAGS_IPID_FMT UINT32_C(0x40)
390 * If set to zero when LSO is '1', then the IPID of the tunnel
391 * IP header will not be modified during LSO operations. If set
392 * to one when LSO is '1', then the IPID of the tunnel IP header
393 * will be incremented for each subsequent segment of an LSO
394 * operation. The flag is ignored if the LSO packet is a normal
395 * (non-tunneled) TCP packet.
397 #define TX_BD_LONG_LFLAGS_T_IPID UINT32_C(0x80)
399 * If set to '1', then the RoCE ICRC will be appended to the
400 * packet. Packet must be a valid RoCE format packet.
402 #define TX_BD_LONG_LFLAGS_ROCE_CRC UINT32_C(0x100)
404 * If set to '1', then the FCoE CRC will be appended to the
405 * packet. Packet must be a valid FCoE format packet.
407 #define TX_BD_LONG_LFLAGS_FCOE_CRC UINT32_C(0x200)
410 * When LSO is '1', this field must contain the offset of the
411 * TCP payload from the beginning of the packet in as 16b words.
412 * In case of encapsulated/tunneling packet, this field contains
413 * the offset of the inner TCP payload from beginning of the
414 * packet as 16-bit words. This value must be valid on the first
417 #define TX_BD_LONG_HDR_SIZE_MASK UINT32_C(0x1ff)
418 #define TX_BD_LONG_HDR_SIZE_SFT 0
421 * This is the MSS value that will be used to do the LSO
422 * processing. The value is the length in bytes of the TCP
423 * payload for each segment generated by the LSO operation. This
424 * value must be valid on the first BD of a packet.
426 #define TX_BD_LONG_MSS_MASK UINT32_C(0x7fff)
427 #define TX_BD_LONG_MSS_SFT 0
431 * This value selects a CFA action to perform on the packet. Set
432 * this value to zero if no CFA action is desired. This value
433 * must be valid on the first BD of a packet.
437 * This value is action meta-data that defines CFA edit
438 * operations that are done in addition to any action editing.
440 /* When key=1, This is the VLAN tag VID value. */
441 #define TX_BD_LONG_CFA_META_VLAN_VID_MASK UINT32_C(0xfff)
442 #define TX_BD_LONG_CFA_META_VLAN_VID_SFT 0
443 /* When key=1, This is the VLAN tag DE value. */
444 #define TX_BD_LONG_CFA_META_VLAN_DE UINT32_C(0x1000)
445 /* When key=1, This is the VLAN tag PRI value. */
446 #define TX_BD_LONG_CFA_META_VLAN_PRI_MASK UINT32_C(0xe000)
447 #define TX_BD_LONG_CFA_META_VLAN_PRI_SFT 13
448 /* When key=1, This is the VLAN tag TPID select value. */
449 #define TX_BD_LONG_CFA_META_VLAN_TPID_MASK UINT32_C(0x70000)
450 #define TX_BD_LONG_CFA_META_VLAN_TPID_SFT 16
452 #define TX_BD_LONG_CFA_META_VLAN_TPID_TPID88A8 (UINT32_C(0x0) << 16)
454 #define TX_BD_LONG_CFA_META_VLAN_TPID_TPID8100 (UINT32_C(0x1) << 16)
456 #define TX_BD_LONG_CFA_META_VLAN_TPID_TPID9100 (UINT32_C(0x2) << 16)
458 #define TX_BD_LONG_CFA_META_VLAN_TPID_TPID9200 (UINT32_C(0x3) << 16)
460 #define TX_BD_LONG_CFA_META_VLAN_TPID_TPID9300 (UINT32_C(0x4) << 16)
461 /* Value programmed in CFA VLANTPID register. */
462 #define TX_BD_LONG_CFA_META_VLAN_TPID_TPIDCFG (UINT32_C(0x5) << 16)
463 #define TX_BD_LONG_CFA_META_VLAN_TPID_LAST \
464 TX_BD_LONG_CFA_META_VLAN_TPID_TPIDCFG
465 /* When key=1, This is the VLAN tag TPID select value. */
466 #define TX_BD_LONG_CFA_META_VLAN_RESERVED_MASK UINT32_C(0xff80000)
467 #define TX_BD_LONG_CFA_META_VLAN_RESERVED_SFT 19
469 * This field identifies the type of edit to be performed on the
470 * packet. This value must be valid on the first BD of a packet.
472 #define TX_BD_LONG_CFA_META_KEY_MASK UINT32_C(0xf0000000)
473 #define TX_BD_LONG_CFA_META_KEY_SFT 28
475 #define TX_BD_LONG_CFA_META_KEY_NONE (UINT32_C(0x0) << 28)
477 * - meta[17:16] - TPID select value (0 =
478 * 0x8100). - meta[15:12] - PRI/DE value. -
479 * meta[11:0] - VID value.
481 #define TX_BD_LONG_CFA_META_KEY_VLAN_TAG (UINT32_C(0x1) << 28)
482 #define TX_BD_LONG_CFA_META_KEY_LAST TX_BD_LONG_CFA_META_KEY_VLAN_TAG
483 } __attribute__((packed));
485 /* RX Producer Packet BD (16 bytes) */
486 struct rx_prod_pkt_bd {
488 /* This value identifies the type of buffer descriptor. */
489 #define RX_PROD_PKT_BD_TYPE_MASK UINT32_C(0x3f)
490 #define RX_PROD_PKT_BD_TYPE_SFT 0
492 * Indicates that this BD is 16B long and is an
493 * RX Producer (ie. empty) buffer descriptor.
495 #define RX_PROD_PKT_BD_TYPE_RX_PROD_PKT UINT32_C(0x4)
497 * If set to 1, the packet will be placed at the address plus
498 * 2B. The 2 Bytes of padding will be written as zero.
501 * This is intended to be used when the host buffer is cache-
502 * line aligned to produce packets that are easy to parse in
503 * host memory while still allowing writes to be cache line
506 #define RX_PROD_PKT_BD_FLAGS_SOP_PAD UINT32_C(0x40)
508 * If set to 1, the packet write will be padded out to the
509 * nearest cache-line with zero value padding.
512 * If receive buffers start/end on cache-line boundaries, this
513 * feature will ensure that all data writes on the PCI bus
514 * start/end on cache line boundaries.
516 #define RX_PROD_PKT_BD_FLAGS_EOP_PAD UINT32_C(0x80)
518 * This value is the number of additional buffers in the ring
519 * that describe the buffer space to be consumed for the this
520 * packet. If the value is zero, then the packet must fit within
521 * the space described by this BD. If this value is 1 or more,
522 * it indicates how many additional "buffer" BDs are in the ring
523 * immediately following this BD to be used for the same network
524 * packet. Even if the packet to be placed does not need all the
525 * additional buffers, they will be consumed anyway.
527 #define RX_PROD_PKT_BD_FLAGS_BUFFERS_MASK UINT32_C(0x300)
528 #define RX_PROD_PKT_BD_FLAGS_BUFFERS_SFT 8
529 #define RX_PROD_PKT_BD_FLAGS_MASK UINT32_C(0xffc0)
530 #define RX_PROD_PKT_BD_FLAGS_SFT 6
533 * This is the length in Bytes of the host physical buffer where
534 * data for the packet may be placed in host memory.
537 * While this is a Byte resolution value, it is often
538 * advantageous to ensure that the buffers provided end on a
543 * The opaque data field is pass through to the completion and
544 * can be used for any data that the driver wants to associate
545 * with this receive buffer set.
549 * This is the host physical address where data for the packet
550 * may by placed in host memory.
553 * While this is a Byte resolution value, it is often
554 * advantageous to ensure that the buffers provide start on a
557 } __attribute__((packed));
559 /* Completion Ring Structures */
560 /* Note: This structure is used by the HWRM to communicate HWRM Error. */
561 /* Base Completion Record (16 bytes) */
566 * This field indicates the exact type of the completion. By
567 * convention, the LSB identifies the length of the record in
568 * 16B units. Even values indicate 16B records. Odd values
569 * indicate 32B records.
571 #define CMPL_BASE_TYPE_MASK UINT32_C(0x3f)
572 #define CMPL_BASE_TYPE_SFT 0
573 /* TX L2 completion: Completion of TX packet. Length = 16B */
574 #define CMPL_BASE_TYPE_TX_L2 UINT32_C(0x0)
576 * RX L2 completion: Completion of and L2 RX
577 * packet. Length = 32B
579 #define CMPL_BASE_TYPE_RX_L2 UINT32_C(0x11)
581 * RX Aggregation Buffer completion : Completion
582 * of an L2 aggregation buffer in support of
583 * TPA, HDS, or Jumbo packet completion. Length
586 #define CMPL_BASE_TYPE_RX_AGG UINT32_C(0x12)
588 * RX L2 TPA Start Completion: Completion at the
589 * beginning of a TPA operation. Length = 32B
591 #define CMPL_BASE_TYPE_RX_TPA_START UINT32_C(0x13)
593 * RX L2 TPA End Completion: Completion at the
594 * end of a TPA operation. Length = 32B
596 #define CMPL_BASE_TYPE_RX_TPA_END UINT32_C(0x15)
598 * Statistics Ejection Completion: Completion of
599 * statistics data ejection buffer. Length = 16B
601 #define CMPL_BASE_TYPE_STAT_EJECT UINT32_C(0x1a)
602 /* HWRM Command Completion: Completion of an HWRM command. */
603 #define CMPL_BASE_TYPE_HWRM_DONE UINT32_C(0x20)
604 /* Forwarded HWRM Request */
605 #define CMPL_BASE_TYPE_HWRM_FWD_REQ UINT32_C(0x22)
606 /* Forwarded HWRM Response */
607 #define CMPL_BASE_TYPE_HWRM_FWD_RESP UINT32_C(0x24)
608 /* HWRM Asynchronous Event Information */
609 #define CMPL_BASE_TYPE_HWRM_ASYNC_EVENT UINT32_C(0x2e)
610 /* CQ Notification */
611 #define CMPL_BASE_TYPE_CQ_NOTIFICATION UINT32_C(0x30)
612 /* SRQ Threshold Event */
613 #define CMPL_BASE_TYPE_SRQ_EVENT UINT32_C(0x32)
614 /* DBQ Threshold Event */
615 #define CMPL_BASE_TYPE_DBQ_EVENT UINT32_C(0x34)
616 /* QP Async Notification */
617 #define CMPL_BASE_TYPE_QP_EVENT UINT32_C(0x38)
618 /* Function Async Notification */
619 #define CMPL_BASE_TYPE_FUNC_EVENT UINT32_C(0x3a)
628 * This value is written by the NIC such that it will be
629 * different for each pass through the completion queue. The
630 * even passes will write 1. The odd passes will write 0.
632 #define CMPL_BASE_V UINT32_C(0x1)
634 #define CMPL_BASE_INFO3_MASK UINT32_C(0xfffffffe)
635 #define CMPL_BASE_INFO3_SFT 1
638 } __attribute__((packed));
640 /* TX Completion Record (16 bytes) */
644 * This field indicates the exact type of the completion. By
645 * convention, the LSB identifies the length of the record in
646 * 16B units. Even values indicate 16B records. Odd values
647 * indicate 32B records.
649 #define TX_CMPL_TYPE_MASK UINT32_C(0x3f)
650 #define TX_CMPL_TYPE_SFT 0
651 /* TX L2 completion: Completion of TX packet. Length = 16B */
652 #define TX_CMPL_TYPE_TX_L2 UINT32_C(0x0)
654 * When this bit is '1', it indicates a packet that has an error
655 * of some type. Type of error is indicated in error_flags.
657 #define TX_CMPL_FLAGS_ERROR UINT32_C(0x40)
659 * When this bit is '1', it indicates that the packet completed
660 * was transmitted using the push acceleration data provided by
661 * the driver. When this bit is '0', it indicates that the
662 * packet had not push acceleration data written or was executed
663 * as a normal packet even though push data was provided.
665 #define TX_CMPL_FLAGS_PUSH UINT32_C(0x80)
666 #define TX_CMPL_FLAGS_MASK UINT32_C(0xffc0)
667 #define TX_CMPL_FLAGS_SFT 6
669 /* unused1 is 16 b */
672 * This is a copy of the opaque field from the first TX BD of
673 * this transmitted packet.
677 * This value is written by the NIC such that it will be
678 * different for each pass through the completion queue. The
679 * even passes will write 1. The odd passes will write 0.
681 #define TX_CMPL_V UINT32_C(0x1)
683 * This error indicates that there was some sort of problem with
684 * the BDs for the packet.
686 #define TX_CMPL_ERRORS_BUFFER_ERROR_MASK UINT32_C(0xe)
687 #define TX_CMPL_ERRORS_BUFFER_ERROR_SFT 1
689 #define TX_CMPL_ERRORS_BUFFER_ERROR_NO_ERROR (UINT32_C(0x0) << 1)
690 /* Bad Format: BDs were not formatted correctly. */
691 #define TX_CMPL_ERRORS_BUFFER_ERROR_BAD_FMT (UINT32_C(0x2) << 1)
692 #define TX_CMPL_ERRORS_BUFFER_ERROR_LAST \
693 TX_CMPL_ERRORS_BUFFER_ERROR_BAD_FMT
695 * When this bit is '1', it indicates that the length of the
696 * packet was zero. No packet was transmitted.
698 #define TX_CMPL_ERRORS_ZERO_LENGTH_PKT UINT32_C(0x10)
700 * When this bit is '1', it indicates that the packet was longer
701 * than the programmed limit in TDI. No packet was transmitted.
703 #define TX_CMPL_ERRORS_EXCESSIVE_BD_LENGTH UINT32_C(0x20)
705 * When this bit is '1', it indicates that one or more of the
706 * BDs associated with this packet generated a PCI error. This
707 * probably means the address was not valid.
709 #define TX_CMPL_ERRORS_DMA_ERROR UINT32_C(0x40)
711 * When this bit is '1', it indicates that the packet was longer
712 * than indicated by the hint. No packet was transmitted.
714 #define TX_CMPL_ERRORS_HINT_TOO_SHORT UINT32_C(0x80)
716 * When this bit is '1', it indicates that the packet was
717 * dropped due to Poison TLP error on one or more of the TLPs in
718 * the PXP completion.
720 #define TX_CMPL_ERRORS_POISON_TLP_ERROR UINT32_C(0x100)
721 #define TX_CMPL_ERRORS_MASK UINT32_C(0xfffe)
722 #define TX_CMPL_ERRORS_SFT 1
724 /* unused2 is 16 b */
726 /* unused3 is 32 b */
727 } __attribute__((packed));
729 /* RX Packet Completion Record (32 bytes split to 2 16-byte struct) */
733 * This field indicates the exact type of the completion. By
734 * convention, the LSB identifies the length of the record in
735 * 16B units. Even values indicate 16B records. Odd values
736 * indicate 32B records.
738 #define RX_PKT_CMPL_TYPE_MASK UINT32_C(0x3f)
739 #define RX_PKT_CMPL_TYPE_SFT 0
741 * RX L2 completion: Completion of and L2 RX
742 * packet. Length = 32B
744 #define RX_PKT_CMPL_TYPE_RX_L2 UINT32_C(0x11)
746 * When this bit is '1', it indicates a packet that has an error
747 * of some type. Type of error is indicated in error_flags.
749 #define RX_PKT_CMPL_FLAGS_ERROR UINT32_C(0x40)
750 /* This field indicates how the packet was placed in the buffer. */
751 #define RX_PKT_CMPL_FLAGS_PLACEMENT_MASK UINT32_C(0x380)
752 #define RX_PKT_CMPL_FLAGS_PLACEMENT_SFT 7
753 /* Normal: Packet was placed using normal algorithm. */
754 #define RX_PKT_CMPL_FLAGS_PLACEMENT_NORMAL (UINT32_C(0x0) << 7)
755 /* Jumbo: Packet was placed using jumbo algorithm. */
756 #define RX_PKT_CMPL_FLAGS_PLACEMENT_JUMBO (UINT32_C(0x1) << 7)
758 * Header/Data Separation: Packet was placed
759 * using Header/Data separation algorithm. The
760 * separation location is indicated by the itype
763 #define RX_PKT_CMPL_FLAGS_PLACEMENT_HDS (UINT32_C(0x2) << 7)
764 #define RX_PKT_CMPL_FLAGS_PLACEMENT_LAST RX_PKT_CMPL_FLAGS_PLACEMENT_HDS
765 /* This bit is '1' if the RSS field in this completion is valid. */
766 #define RX_PKT_CMPL_FLAGS_RSS_VALID UINT32_C(0x400)
769 * This value indicates what the inner packet determined for the
772 #define RX_PKT_CMPL_FLAGS_ITYPE_MASK UINT32_C(0xf000)
773 #define RX_PKT_CMPL_FLAGS_ITYPE_SFT 12
774 /* Not Known: Indicates that the packet type was not known. */
775 #define RX_PKT_CMPL_FLAGS_ITYPE_NOT_KNOWN (UINT32_C(0x0) << 12)
777 * IP Packet: Indicates that the packet was an
778 * IP packet, but further classification was not
781 #define RX_PKT_CMPL_FLAGS_ITYPE_IP (UINT32_C(0x1) << 12)
783 * TCP Packet: Indicates that the packet was IP
784 * and TCP. This indicates that the
785 * payload_offset field is valid.
787 #define RX_PKT_CMPL_FLAGS_ITYPE_TCP (UINT32_C(0x2) << 12)
789 * UDP Packet: Indicates that the packet was IP
790 * and UDP. This indicates that the
791 * payload_offset field is valid.
793 #define RX_PKT_CMPL_FLAGS_ITYPE_UDP (UINT32_C(0x3) << 12)
795 * FCoE Packet: Indicates that the packet was
796 * recognized as a FCoE. This also indicates
797 * that the payload_offset field is valid.
799 #define RX_PKT_CMPL_FLAGS_ITYPE_FCOE (UINT32_C(0x4) << 12)
801 * RoCE Packet: Indicates that the packet was
802 * recognized as a RoCE. This also indicates
803 * that the payload_offset field is valid.
805 #define RX_PKT_CMPL_FLAGS_ITYPE_ROCE (UINT32_C(0x5) << 12)
807 * ICMP Packet: Indicates that the packet was
808 * recognized as ICMP. This indicates that the
809 * payload_offset field is valid.
811 #define RX_PKT_CMPL_FLAGS_ITYPE_ICMP (UINT32_C(0x7) << 12)
813 * PtP packet wo/timestamp: Indicates that the
814 * packet was recognized as a PtP packet.
816 #define RX_PKT_CMPL_FLAGS_ITYPE_PTP_WO_TIMESTAMP (UINT32_C(0x8) << 12)
818 * PtP packet w/timestamp: Indicates that the
819 * packet was recognized as a PtP packet and
820 * that a timestamp was taken for the packet.
822 #define RX_PKT_CMPL_FLAGS_ITYPE_PTP_W_TIMESTAMP (UINT32_C(0x9) << 12)
823 #define RX_PKT_CMPL_FLAGS_ITYPE_LAST RX_PKT_CMPL_FLAGS_ITYPE_PTP_W_TIMESTAMP
824 #define RX_PKT_CMPL_FLAGS_MASK UINT32_C(0xffc0)
825 #define RX_PKT_CMPL_FLAGS_SFT 6
828 * This is the length of the data for the packet stored in the
829 * buffer(s) identified by the opaque value. This includes the
830 * packet BD and any associated buffer BDs. This does not
831 * include the the length of any data places in aggregation BDs.
835 * This is a copy of the opaque field from the RX BD this
836 * completion corresponds to.
841 * This value is written by the NIC such that it will be
842 * different for each pass through the completion queue. The
843 * even passes will write 1. The odd passes will write 0.
845 #define RX_PKT_CMPL_V1 UINT32_C(0x1)
847 * This value is the number of aggregation buffers that follow
848 * this entry in the completion ring that are a part of this
849 * packet. If the value is zero, then the packet is completely
850 * contained in the buffer space provided for the packet in the
853 #define RX_PKT_CMPL_AGG_BUFS_MASK UINT32_C(0x3e)
854 #define RX_PKT_CMPL_AGG_BUFS_SFT 1
856 uint8_t rss_hash_type;
858 * This is the RSS hash type for the packet. The value is packed
859 * {tuple_extrac_op[1:0],rss_profile_id[4:0],tuple_extrac_op[2]}
860 * . The value of tuple_extrac_op provides the information about
861 * what fields the hash was computed on. * 0: The RSS hash was
862 * computed over source IP address, destination IP address,
863 * source port, and destination port of inner IP and TCP or UDP
864 * headers. Note: For non-tunneled packets, the packet headers
865 * are considered inner packet headers for the RSS hash
866 * computation purpose. * 1: The RSS hash was computed over
867 * source IP address and destination IP address of inner IP
868 * header. Note: For non-tunneled packets, the packet headers
869 * are considered inner packet headers for the RSS hash
870 * computation purpose. * 2: The RSS hash was computed over
871 * source IP address, destination IP address, source port, and
872 * destination port of IP and TCP or UDP headers of outer tunnel
873 * headers. Note: For non-tunneled packets, this value is not
874 * applicable. * 3: The RSS hash was computed over source IP
875 * address and destination IP address of IP header of outer
876 * tunnel headers. Note: For non-tunneled packets, this value is
877 * not applicable. Note that 4-tuples values listed above are
878 * applicable for layer 4 protocols supported and enabled for
879 * RSS in the hardware, HWRM firmware, and drivers. For example,
880 * if RSS hash is supported and enabled for TCP traffic only,
881 * then the values of tuple_extract_op corresponding to 4-tuples
882 * are only valid for TCP traffic.
884 uint8_t payload_offset;
886 * This value indicates the offset in bytes from the beginning
887 * of the packet where the inner payload starts. This value is
888 * valid for TCP, UDP, FCoE, and RoCE packets. A value of zero
889 * indicates that header is 256B into the packet.
895 * This value is the RSS hash value calculated for the packet
896 * based on the mode bits and key value in the VNIC.
898 } __attribute__((packed));
900 /* last 16 bytes of RX Packet Completion Record */
901 struct rx_pkt_cmpl_hi {
904 * This indicates that the ip checksum was calculated for the
905 * inner packet and that the ip_cs_error field indicates if
906 * there was an error.
908 #define RX_PKT_CMPL_FLAGS2_IP_CS_CALC UINT32_C(0x1)
910 * This indicates that the TCP, UDP or ICMP checksum was
911 * calculated for the inner packet and that the l4_cs_error
912 * field indicates if there was an error.
914 #define RX_PKT_CMPL_FLAGS2_L4_CS_CALC UINT32_C(0x2)
916 * This indicates that the ip checksum was calculated for the
917 * tunnel header and that the t_ip_cs_error field indicates if
918 * there was an error.
920 #define RX_PKT_CMPL_FLAGS2_T_IP_CS_CALC UINT32_C(0x4)
922 * This indicates that the UDP checksum was calculated for the
923 * tunnel packet and that the t_l4_cs_error field indicates if
924 * there was an error.
926 #define RX_PKT_CMPL_FLAGS2_T_L4_CS_CALC UINT32_C(0x8)
927 /* This value indicates what format the metadata field is. */
928 #define RX_PKT_CMPL_FLAGS2_META_FORMAT_MASK UINT32_C(0xf0)
929 #define RX_PKT_CMPL_FLAGS2_META_FORMAT_SFT 4
930 /* No metadata informtaion. Value is zero. */
931 #define RX_PKT_CMPL_FLAGS2_META_FORMAT_NONE (UINT32_C(0x0) << 4)
933 * The metadata field contains the VLAN tag and
934 * TPID value. - metadata[11:0] contains the
935 * vlan VID value. - metadata[12] contains the
936 * vlan DE value. - metadata[15:13] contains the
937 * vlan PRI value. - metadata[31:16] contains
938 * the vlan TPID value.
940 #define RX_PKT_CMPL_FLAGS2_META_FORMAT_VLAN (UINT32_C(0x1) << 4)
941 #define RX_PKT_CMPL_FLAGS2_META_FORMAT_LAST \
942 RX_PKT_CMPL_FLAGS2_META_FORMAT_VLAN
944 * This field indicates the IP type for the inner-most IP
945 * header. A value of '0' indicates IPv4. A value of '1'
946 * indicates IPv6. This value is only valid if itype indicates a
947 * packet with an IP header.
949 #define RX_PKT_CMPL_FLAGS2_IP_TYPE UINT32_C(0x100)
952 * This is data from the CFA block as indicated by the
955 /* When meta_format=1, this value is the VLAN VID. */
956 #define RX_PKT_CMPL_METADATA_VID_MASK UINT32_C(0xfff)
957 #define RX_PKT_CMPL_METADATA_VID_SFT 0
958 /* When meta_format=1, this value is the VLAN DE. */
959 #define RX_PKT_CMPL_METADATA_DE UINT32_C(0x1000)
960 /* When meta_format=1, this value is the VLAN PRI. */
961 #define RX_PKT_CMPL_METADATA_PRI_MASK UINT32_C(0xe000)
962 #define RX_PKT_CMPL_METADATA_PRI_SFT 13
963 /* When meta_format=1, this value is the VLAN TPID. */
964 #define RX_PKT_CMPL_METADATA_TPID_MASK UINT32_C(0xffff0000)
965 #define RX_PKT_CMPL_METADATA_TPID_SFT 16
968 * This value is written by the NIC such that it will be
969 * different for each pass through the completion queue. The
970 * even passes will write 1. The odd passes will write 0.
972 #define RX_PKT_CMPL_V2 UINT32_C(0x1)
974 * This error indicates that there was some sort of problem with
975 * the BDs for the packet that was found after part of the
976 * packet was already placed. The packet should be treated as
979 #define RX_PKT_CMPL_ERRORS_BUFFER_ERROR_MASK UINT32_C(0xe)
980 #define RX_PKT_CMPL_ERRORS_BUFFER_ERROR_SFT 1
981 /* No buffer error */
982 #define RX_PKT_CMPL_ERRORS_BUFFER_ERROR_NO_BUFFER (UINT32_C(0x0) << 1)
984 * Did Not Fit: Packet did not fit into packet
985 * buffer provided. For regular placement, this
986 * means the packet did not fit in the buffer
987 * provided. For HDS and jumbo placement, this
988 * means that the packet could not be placed
989 * into 7 physical buffers or less.
991 #define RX_PKT_CMPL_ERRORS_BUFFER_ERROR_DID_NOT_FIT (UINT32_C(0x1) << 1)
993 * Not On Chip: All BDs needed for the packet
994 * were not on-chip when the packet arrived.
996 #define RX_PKT_CMPL_ERRORS_BUFFER_ERROR_NOT_ON_CHIP (UINT32_C(0x2) << 1)
997 /* Bad Format: BDs were not formatted correctly. */
998 #define RX_PKT_CMPL_ERRORS_BUFFER_ERROR_BAD_FORMAT (UINT32_C(0x3) << 1)
999 #define RX_PKT_CMPL_ERRORS_BUFFER_ERROR_LAST \
1000 RX_PKT_CMPL_ERRORS_BUFFER_ERROR_BAD_FORMAT
1001 /* This indicates that there was an error in the IP header checksum. */
1002 #define RX_PKT_CMPL_ERRORS_IP_CS_ERROR UINT32_C(0x10)
1004 * This indicates that there was an error in the TCP, UDP or
1007 #define RX_PKT_CMPL_ERRORS_L4_CS_ERROR UINT32_C(0x20)
1009 * This indicates that there was an error in the tunnel IP
1012 #define RX_PKT_CMPL_ERRORS_T_IP_CS_ERROR UINT32_C(0x40)
1014 * This indicates that there was an error in the tunnel UDP
1017 #define RX_PKT_CMPL_ERRORS_T_L4_CS_ERROR UINT32_C(0x80)
1019 * This indicates that there was a CRC error on either an FCoE
1020 * or RoCE packet. The itype indicates the packet type.
1022 #define RX_PKT_CMPL_ERRORS_CRC_ERROR UINT32_C(0x100)
1024 * This indicates that there was an error in the tunnel portion
1025 * of the packet when this field is non-zero.
1027 #define RX_PKT_CMPL_ERRORS_T_PKT_ERROR_MASK UINT32_C(0xe00)
1028 #define RX_PKT_CMPL_ERRORS_T_PKT_ERROR_SFT 9
1030 * No additional error occurred on the tunnel
1031 * portion of the packet of the packet does not
1034 #define RX_PKT_CMPL_ERRORS_T_PKT_ERROR_NO_ERROR (UINT32_C(0x0) << 9)
1036 * Indicates that IP header version does not
1037 * match expectation from L2 Ethertype for IPv4
1038 * and IPv6 in the tunnel header.
1040 #define RX_PKT_CMPL_ERRORS_T_PKT_ERROR_T_L3_BAD_VERSION (UINT32_C(0x1) << 9)
1042 * Indicates that header length is out of range
1043 * in the tunnel header. Valid for IPv4.
1045 #define RX_PKT_CMPL_ERRORS_T_PKT_ERROR_T_L3_BAD_HDR_LEN (UINT32_C(0x2) << 9)
1047 * Indicates that the physical packet is shorter
1048 * than that claimed by the PPPoE header length
1049 * for a tunnel PPPoE packet.
1051 #define RX_PKT_CMPL_ERRORS_T_PKT_ERROR_TUNNEL_TOTAL_ERROR (UINT32_C(0x3) << 9)
1053 * Indicates that physical packet is shorter
1054 * than that claimed by the tunnel l3 header
1055 * length. Valid for IPv4, or IPv6 tunnel packet
1058 #define RX_PKT_CMPL_ERRORS_T_PKT_ERROR_T_IP_TOTAL_ERROR (UINT32_C(0x4) << 9)
1060 * Indicates that the physical packet is shorter
1061 * than that claimed by the tunnel UDP header
1062 * length for a tunnel UDP packet that is not
1065 #define RX_PKT_CMPL_ERRORS_T_PKT_ERROR_T_UDP_TOTAL_ERROR (UINT32_C(0x5) << 9)
1067 * indicates that the IPv4 TTL or IPv6 hop limit
1068 * check have failed (e.g. TTL = 0) in the
1069 * tunnel header. Valid for IPv4, and IPv6.
1071 #define RX_PKT_CMPL_ERRORS_T_PKT_ERROR_T_L3_BAD_TTL (UINT32_C(0x6) << 9)
1072 #define RX_PKT_CMPL_ERRORS_T_PKT_ERROR_LAST \
1073 RX_PKT_CMPL_ERRORS_T_PKT_ERROR_T_L3_BAD_TTL
1075 * This indicates that there was an error in the inner portion
1076 * of the packet when this field is non-zero.
1078 #define RX_PKT_CMPL_ERRORS_PKT_ERROR_MASK UINT32_C(0xf000)
1079 #define RX_PKT_CMPL_ERRORS_PKT_ERROR_SFT 12
1081 * No additional error occurred on the tunnel
1082 * portion of the packet of the packet does not
1085 #define RX_PKT_CMPL_ERRORS_PKT_ERROR_NO_ERROR (UINT32_C(0x0) << 12)
1087 * Indicates that IP header version does not
1088 * match expectation from L2 Ethertype for IPv4
1089 * and IPv6 or that option other than VFT was
1090 * parsed on FCoE packet.
1092 #define RX_PKT_CMPL_ERRORS_PKT_ERROR_L3_BAD_VERSION (UINT32_C(0x1) << 12)
1094 * indicates that header length is out of range.
1095 * Valid for IPv4 and RoCE
1097 #define RX_PKT_CMPL_ERRORS_PKT_ERROR_L3_BAD_HDR_LEN (UINT32_C(0x2) << 12)
1099 * indicates that the IPv4 TTL or IPv6 hop limit
1100 * check have failed (e.g. TTL = 0). Valid for
1103 #define RX_PKT_CMPL_ERRORS_PKT_ERROR_L3_BAD_TTL (UINT32_C(0x3) << 12)
1105 * Indicates that physical packet is shorter
1106 * than that claimed by the l3 header length.
1107 * Valid for IPv4, IPv6 packet or RoCE packets.
1109 #define RX_PKT_CMPL_ERRORS_PKT_ERROR_IP_TOTAL_ERROR (UINT32_C(0x4) << 12)
1111 * Indicates that the physical packet is shorter
1112 * than that claimed by the UDP header length
1113 * for a UDP packet that is not fragmented.
1115 #define RX_PKT_CMPL_ERRORS_PKT_ERROR_UDP_TOTAL_ERROR (UINT32_C(0x5) << 12)
1117 * Indicates that TCP header length > IP
1118 * payload. Valid for TCP packets only.
1120 #define RX_PKT_CMPL_ERRORS_PKT_ERROR_L4_BAD_HDR_LEN (UINT32_C(0x6) << 12)
1121 /* Indicates that TCP header length < 5. Valid for TCP. */
1122 #define RX_PKT_CMPL_ERRORS_PKT_ERROR_L4_BAD_HDR_LEN_TOO_SMALL \
1123 (UINT32_C(0x7) << 12)
1125 * Indicates that TCP option headers result in a
1126 * TCP header size that does not match data
1127 * offset in TCP header. Valid for TCP.
1129 #define RX_PKT_CMPL_ERRORS_PKT_ERROR_L4_BAD_OPT_LEN \
1130 (UINT32_C(0x8) << 12)
1131 #define RX_PKT_CMPL_ERRORS_PKT_ERROR_LAST \
1132 RX_PKT_CMPL_ERRORS_PKT_ERROR_L4_BAD_OPT_LEN
1133 #define RX_PKT_CMPL_ERRORS_MASK UINT32_C(0xfffe)
1134 #define RX_PKT_CMPL_ERRORS_SFT 1
1137 * This field identifies the CFA action rule that was used for
1142 * This value holds the reordering sequence number for the
1143 * packet. If the reordering sequence is not valid, then this
1144 * value is zero. The reordering domain for the packet is in the
1145 * bottom 8 to 10b of the rss_hash value. The bottom 20b of this
1146 * value contain the ordering domain value for the packet.
1148 #define RX_PKT_CMPL_REORDER_MASK UINT32_C(0xffffff)
1149 #define RX_PKT_CMPL_REORDER_SFT 0
1150 } __attribute__((packed));
1152 /* HWRM Forwarded Request (16 bytes) */
1153 struct hwrm_fwd_req_cmpl {
1154 uint16_t req_len_type;
1155 /* Length of forwarded request in bytes. */
1157 * This field indicates the exact type of the completion. By
1158 * convention, the LSB identifies the length of the record in
1159 * 16B units. Even values indicate 16B records. Odd values
1160 * indicate 32B records.
1162 #define HWRM_FWD_INPUT_CMPL_TYPE_MASK UINT32_C(0x3f)
1163 #define HWRM_FWD_INPUT_CMPL_TYPE_SFT 0
1164 /* Forwarded HWRM Request */
1165 #define HWRM_FWD_INPUT_CMPL_TYPE_HWRM_FWD_INPUT UINT32_C(0x22)
1166 /* Length of forwarded request in bytes. */
1167 #define HWRM_FWD_REQ_CMPL_REQ_LEN_MASK UINT32_C(0xffc0)
1168 #define HWRM_FWD_REQ_CMPL_REQ_LEN_SFT 6
1171 * Source ID of this request. Typically used in forwarding
1172 * requests and responses. 0x0 - 0xFFF8 - Used for function ids
1173 * 0xFFF8 - 0xFFFE - Reserved for internal processors 0xFFFF -
1177 /* unused1 is 32 b */
1178 uint32_t req_buf_addr_v[2];
1179 /* Address of forwarded request. */
1181 * This value is written by the NIC such that it will be
1182 * different for each pass through the completion queue. The
1183 * even passes will write 1. The odd passes will write 0.
1185 #define HWRM_FWD_INPUT_CMPL_V UINT32_C(0x1)
1186 /* Address of forwarded request. */
1187 #define HWRM_FWD_REQ_CMPL_REQ_BUF_ADDR_MASK UINT32_C(0xfffffffe)
1188 #define HWRM_FWD_REQ_CMPL_REQ_BUF_ADDR_SFT 1
1189 } __attribute__((packed));
1191 /* HWRM Asynchronous Event Completion Record (16 bytes) */
1192 struct hwrm_async_event_cmpl {
1194 /* unused1 is 10 b */
1196 * This field indicates the exact type of the completion. By
1197 * convention, the LSB identifies the length of the record in
1198 * 16B units. Even values indicate 16B records. Odd values
1199 * indicate 32B records.
1201 #define HWRM_ASYNC_EVENT_CMPL_TYPE_MASK UINT32_C(0x3f)
1202 #define HWRM_ASYNC_EVENT_CMPL_TYPE_SFT 0
1203 /* HWRM Asynchronous Event Information */
1204 #define HWRM_ASYNC_EVENT_CMPL_TYPE_HWRM_ASYNC_EVENT UINT32_C(0x2e)
1205 /* unused1 is 10 b */
1207 /* Identifiers of events. */
1208 /* Link status changed */
1209 #define HWRM_ASYNC_EVENT_CMPL_EVENT_ID_LINK_STATUS_CHANGE UINT32_C(0x0)
1210 /* Link MTU changed */
1211 #define HWRM_ASYNC_EVENT_CMPL_EVENT_ID_LINK_MTU_CHANGE UINT32_C(0x1)
1212 /* Link speed changed */
1213 #define HWRM_ASYNC_EVENT_CMPL_EVENT_ID_LINK_SPEED_CHANGE UINT32_C(0x2)
1214 /* DCB Configuration changed */
1215 #define HWRM_ASYNC_EVENT_CMPL_EVENT_ID_DCB_CONFIG_CHANGE UINT32_C(0x3)
1216 /* Port connection not allowed */
1217 #define HWRM_ASYNC_EVENT_CMPL_EVENT_ID_PORT_CONN_NOT_ALLOWED UINT32_C(0x4)
1218 /* Link speed configuration was not allowed */
1219 #define HWRM_ASYNC_EVENT_CMPL_EVENT_ID_LINK_SPEED_CFG_NOT_ALLOWED UINT32_C(0x5)
1220 /* Link speed configuration change */
1221 #define HWRM_ASYNC_EVENT_CMPL_EVENT_ID_LINK_SPEED_CFG_CHANGE UINT32_C(0x6)
1222 /* Port PHY configuration change */
1223 #define HWRM_ASYNC_EVENT_CMPL_EVENT_ID_PORT_PHY_CFG_CHANGE UINT32_C(0x7)
1224 /* Function driver unloaded */
1225 #define HWRM_ASYNC_EVENT_CMPL_EVENT_ID_FUNC_DRVR_UNLOAD UINT32_C(0x10)
1226 /* Function driver loaded */
1227 #define HWRM_ASYNC_EVENT_CMPL_EVENT_ID_FUNC_DRVR_LOAD UINT32_C(0x11)
1228 /* Function FLR related processing has completed */
1229 #define HWRM_ASYNC_EVENT_CMPL_EVENT_ID_FUNC_FLR_PROC_CMPLT UINT32_C(0x12)
1230 /* PF driver unloaded */
1231 #define HWRM_ASYNC_EVENT_CMPL_EVENT_ID_PF_DRVR_UNLOAD UINT32_C(0x20)
1232 /* PF driver loaded */
1233 #define HWRM_ASYNC_EVENT_CMPL_EVENT_ID_PF_DRVR_LOAD UINT32_C(0x21)
1234 /* VF Function Level Reset (FLR) */
1235 #define HWRM_ASYNC_EVENT_CMPL_EVENT_ID_VF_FLR UINT32_C(0x30)
1236 /* VF MAC Address Change */
1237 #define HWRM_ASYNC_EVENT_CMPL_EVENT_ID_VF_MAC_ADDR_CHANGE UINT32_C(0x31)
1238 /* PF-VF communication channel status change. */
1239 #define HWRM_ASYNC_EVENT_CMPL_EVENT_ID_PF_VF_COMM_STATUS_CHANGE UINT32_C(0x32)
1240 /* VF Configuration Change */
1241 #define HWRM_ASYNC_EVENT_CMPL_EVENT_ID_VF_CFG_CHANGE UINT32_C(0x33)
1243 #define HWRM_ASYNC_EVENT_CMPL_EVENT_ID_HWRM_ERROR UINT32_C(0xff)
1244 uint32_t event_data2;
1245 /* Event specific data */
1249 * This value is written by the NIC such that it will be
1250 * different for each pass through the completion queue. The
1251 * even passes will write 1. The odd passes will write 0.
1253 #define HWRM_ASYNC_EVENT_CMPL_V UINT32_C(0x1)
1255 #define HWRM_ASYNC_EVENT_CMPL_OPAQUE_MASK UINT32_C(0xfe)
1256 #define HWRM_ASYNC_EVENT_CMPL_OPAQUE_SFT 1
1257 uint8_t timestamp_lo;
1258 /* 8-lsb timestamp from POR (100-msec resolution) */
1259 uint16_t timestamp_hi;
1260 /* 16-lsb timestamp from POR (100-msec resolution) */
1261 uint32_t event_data1;
1262 /* Event specific data */
1263 } __attribute__((packed));
1266 * Note: The Hardware Resource Manager (HWRM) manages various hardware resources
1267 * inside the chip. The HWRM is implemented in firmware, and runs on embedded
1268 * processors inside the chip. This firmware is vital part of the chip's
1269 * hardware. The chip can not be used by driver without it.
1272 /* Input (16 bytes) */
1275 * This value indicates what type of request this is. The format for the
1276 * rest of the command is determined by this field.
1281 * This value indicates the what completion ring the request will be
1282 * optionally completed on. If the value is -1, then no CR completion
1283 * will be generated. Any other value must be a valid CR ring_id value
1284 * for this function.
1288 /* This value indicates the command sequence number. */
1292 * Target ID of this command. 0x0 - 0xFFF8 - Used for function ids
1293 * 0xFFF8 - 0xFFFE - Reserved for internal processors 0xFFFF - HWRM
1298 * This is the host address where the response will be written when the
1299 * request is complete. This area must be 16B aligned and must be
1300 * cleared to zero before the request is made.
1303 } __attribute__((packed));
1305 /* Output (8 bytes) */
1308 * Pass/Fail or error type Note: receiver to verify the in parameters,
1309 * and fail the call with an error when appropriate
1311 uint16_t error_code;
1313 /* This field returns the type of original request. */
1316 /* This field provides original sequence number of the command. */
1320 * This field is the length of the response in bytes. The last byte of
1321 * the response is a valid flag that will read as '1' when the command
1322 * has been completely written to memory.
1325 } __attribute__((packed));
1327 /* hwrm_cfa_l2_filter_alloc */
1329 * A filter is used to identify traffic that contains a matching set of
1330 * parameters like unicast or broadcast MAC address or a VLAN tag amongst
1331 * other things which then allows the ASIC to direct the incoming traffic
1332 * to an appropriate VNIC or Rx ring.
1335 /* Input (96 bytes) */
1336 struct hwrm_cfa_l2_filter_alloc_input {
1338 * This value indicates what type of request this is. The format for the
1339 * rest of the command is determined by this field.
1344 * This value indicates the what completion ring the request will be
1345 * optionally completed on. If the value is -1, then no CR completion
1346 * will be generated. Any other value must be a valid CR ring_id value
1347 * for this function.
1351 /* This value indicates the command sequence number. */
1355 * Target ID of this command. 0x0 - 0xFFF8 - Used for function ids
1356 * 0xFFF8 - 0xFFFE - Reserved for internal processors 0xFFFF - HWRM
1361 * This is the host address where the response will be written when the
1362 * request is complete. This area must be 16B aligned and must be
1363 * cleared to zero before the request is made.
1368 * Enumeration denoting the RX, TX type of the resource. This
1369 * enumeration is used for resources that are similar for both TX and RX
1370 * paths of the chip.
1372 #define HWRM_CFA_L2_FILTER_ALLOC_INPUT_FLAGS_PATH \
1375 #define HWRM_CFA_L2_FILTER_ALLOC_INPUT_FLAGS_PATH_TX \
1376 (UINT32_C(0x0) << 0)
1378 #define HWRM_CFA_L2_FILTER_ALLOC_INPUT_FLAGS_PATH_RX \
1379 (UINT32_C(0x1) << 0)
1380 #define HWRM_CFA_L2_FILTER_ALLOC_INPUT_FLAGS_PATH_LAST \
1381 HWRM_CFA_L2_FILTER_ALLOC_INPUT_FLAGS_PATH_RX
1383 * Setting of this flag indicates the applicability to the loopback
1386 #define HWRM_CFA_L2_FILTER_ALLOC_INPUT_FLAGS_LOOPBACK \
1389 * Setting of this flag indicates drop action. If this flag is not set,
1390 * then it should be considered accept action.
1392 #define HWRM_CFA_L2_FILTER_ALLOC_INPUT_FLAGS_DROP \
1395 * If this flag is set, all t_l2_* fields are invalid and they should
1396 * not be specified. If this flag is set, then l2_* fields refer to
1397 * fields of outermost L2 header.
1399 #define HWRM_CFA_L2_FILTER_ALLOC_INPUT_FLAGS_OUTERMOST \
1403 /* This bit must be '1' for the l2_addr field to be configured. */
1404 #define HWRM_CFA_L2_FILTER_ALLOC_INPUT_ENABLES_L2_ADDR \
1406 /* This bit must be '1' for the l2_addr_mask field to be configured. */
1407 #define HWRM_CFA_L2_FILTER_ALLOC_INPUT_ENABLES_L2_ADDR_MASK \
1409 /* This bit must be '1' for the l2_ovlan field to be configured. */
1410 #define HWRM_CFA_L2_FILTER_ALLOC_INPUT_ENABLES_L2_OVLAN \
1412 /* This bit must be '1' for the l2_ovlan_mask field to be configured. */
1413 #define HWRM_CFA_L2_FILTER_ALLOC_INPUT_ENABLES_L2_OVLAN_MASK \
1415 /* This bit must be '1' for the l2_ivlan field to be configured. */
1416 #define HWRM_CFA_L2_FILTER_ALLOC_INPUT_ENABLES_L2_IVLAN \
1418 /* This bit must be '1' for the l2_ivlan_mask field to be configured. */
1419 #define HWRM_CFA_L2_FILTER_ALLOC_INPUT_ENABLES_L2_IVLAN_MASK \
1421 /* This bit must be '1' for the t_l2_addr field to be configured. */
1422 #define HWRM_CFA_L2_FILTER_ALLOC_INPUT_ENABLES_T_L2_ADDR \
1425 * This bit must be '1' for the t_l2_addr_mask field to be configured.
1427 #define HWRM_CFA_L2_FILTER_ALLOC_INPUT_ENABLES_T_L2_ADDR_MASK \
1429 /* This bit must be '1' for the t_l2_ovlan field to be configured. */
1430 #define HWRM_CFA_L2_FILTER_ALLOC_INPUT_ENABLES_T_L2_OVLAN \
1433 * This bit must be '1' for the t_l2_ovlan_mask field to be configured.
1435 #define HWRM_CFA_L2_FILTER_ALLOC_INPUT_ENABLES_T_L2_OVLAN_MASK \
1437 /* This bit must be '1' for the t_l2_ivlan field to be configured. */
1438 #define HWRM_CFA_L2_FILTER_ALLOC_INPUT_ENABLES_T_L2_IVLAN \
1441 * This bit must be '1' for the t_l2_ivlan_mask field to be configured.
1443 #define HWRM_CFA_L2_FILTER_ALLOC_INPUT_ENABLES_T_L2_IVLAN_MASK \
1445 /* This bit must be '1' for the src_type field to be configured. */
1446 #define HWRM_CFA_L2_FILTER_ALLOC_INPUT_ENABLES_SRC_TYPE \
1448 /* This bit must be '1' for the src_id field to be configured. */
1449 #define HWRM_CFA_L2_FILTER_ALLOC_INPUT_ENABLES_SRC_ID \
1451 /* This bit must be '1' for the tunnel_type field to be configured. */
1452 #define HWRM_CFA_L2_FILTER_ALLOC_INPUT_ENABLES_TUNNEL_TYPE \
1454 /* This bit must be '1' for the dst_id field to be configured. */
1455 #define HWRM_CFA_L2_FILTER_ALLOC_INPUT_ENABLES_DST_ID \
1458 * This bit must be '1' for the mirror_vnic_id field to be configured.
1460 #define HWRM_CFA_L2_FILTER_ALLOC_INPUT_ENABLES_MIRROR_VNIC_ID \
1465 * This value sets the match value for the L2 MAC address. Destination
1466 * MAC address for RX path. Source MAC address for TX path.
1474 * This value sets the mask value for the L2 address. A value of 0 will
1475 * mask the corresponding bit from compare.
1477 uint8_t l2_addr_mask[6];
1479 /* This value sets VLAN ID value for outer VLAN. */
1483 * This value sets the mask value for the ovlan id. A value of 0 will
1484 * mask the corresponding bit from compare.
1486 uint16_t l2_ovlan_mask;
1488 /* This value sets VLAN ID value for inner VLAN. */
1492 * This value sets the mask value for the ivlan id. A value of 0 will
1493 * mask the corresponding bit from compare.
1495 uint16_t l2_ivlan_mask;
1501 * This value sets the match value for the tunnel L2 MAC address.
1502 * Destination MAC address for RX path. Source MAC address for TX path.
1504 uint8_t t_l2_addr[6];
1510 * This value sets the mask value for the tunnel L2 address. A value of
1511 * 0 will mask the corresponding bit from compare.
1513 uint8_t t_l2_addr_mask[6];
1515 /* This value sets VLAN ID value for tunnel outer VLAN. */
1516 uint16_t t_l2_ovlan;
1519 * This value sets the mask value for the tunnel ovlan id. A value of 0
1520 * will mask the corresponding bit from compare.
1522 uint16_t t_l2_ovlan_mask;
1524 /* This value sets VLAN ID value for tunnel inner VLAN. */
1525 uint16_t t_l2_ivlan;
1528 * This value sets the mask value for the tunnel ivlan id. A value of 0
1529 * will mask the corresponding bit from compare.
1531 uint16_t t_l2_ivlan_mask;
1533 /* This value identifies the type of source of the packet. */
1535 #define HWRM_CFA_L2_FILTER_ALLOC_INPUT_SRC_TYPE_NPORT \
1536 (UINT32_C(0x0) << 0)
1537 /* Physical function */
1538 #define HWRM_CFA_L2_FILTER_ALLOC_INPUT_SRC_TYPE_PF \
1539 (UINT32_C(0x1) << 0)
1540 /* Virtual function */
1541 #define HWRM_CFA_L2_FILTER_ALLOC_INPUT_SRC_TYPE_VF \
1542 (UINT32_C(0x2) << 0)
1543 /* Virtual NIC of a function */
1544 #define HWRM_CFA_L2_FILTER_ALLOC_INPUT_SRC_TYPE_VNIC \
1545 (UINT32_C(0x3) << 0)
1546 /* Embedded processor for CFA management */
1547 #define HWRM_CFA_L2_FILTER_ALLOC_INPUT_SRC_TYPE_KONG \
1548 (UINT32_C(0x4) << 0)
1549 /* Embedded processor for OOB management */
1550 #define HWRM_CFA_L2_FILTER_ALLOC_INPUT_SRC_TYPE_APE \
1551 (UINT32_C(0x5) << 0)
1552 /* Embedded processor for RoCE */
1553 #define HWRM_CFA_L2_FILTER_ALLOC_INPUT_SRC_TYPE_BONO \
1554 (UINT32_C(0x6) << 0)
1555 /* Embedded processor for network proxy functions */
1556 #define HWRM_CFA_L2_FILTER_ALLOC_INPUT_SRC_TYPE_TANG \
1557 (UINT32_C(0x7) << 0)
1562 * This value is the id of the source. For a network port, it represents
1563 * port_id. For a physical function, it represents fid. For a virtual
1564 * function, it represents vf_id. For a vnic, it represents vnic_id. For
1565 * embedded processors, this id is not valid. Notes: 1. The function ID
1566 * is implied if it src_id is not provided for a src_type that is either
1572 #define HWRM_CFA_L2_FILTER_ALLOC_INPUT_TUNNEL_TYPE_NONTUNNEL \
1573 (UINT32_C(0x0) << 0)
1574 /* Virtual eXtensible Local Area Network (VXLAN) */
1575 #define HWRM_CFA_L2_FILTER_ALLOC_INPUT_TUNNEL_TYPE_VXLAN \
1576 (UINT32_C(0x1) << 0)
1578 * Network Virtualization Generic Routing Encapsulation (NVGRE)
1580 #define HWRM_CFA_L2_FILTER_ALLOC_INPUT_TUNNEL_TYPE_NVGRE \
1581 (UINT32_C(0x2) << 0)
1583 * Generic Routing Encapsulation (GRE) inside Ethernet payload
1585 #define HWRM_CFA_L2_FILTER_ALLOC_INPUT_TUNNEL_TYPE_L2GRE \
1586 (UINT32_C(0x3) << 0)
1588 #define HWRM_CFA_L2_FILTER_ALLOC_INPUT_TUNNEL_TYPE_IPIP \
1589 (UINT32_C(0x4) << 0)
1590 /* Generic Network Virtualization Encapsulation (Geneve) */
1591 #define HWRM_CFA_L2_FILTER_ALLOC_INPUT_TUNNEL_TYPE_GENEVE \
1592 (UINT32_C(0x5) << 0)
1593 /* Multi-Protocol Lable Switching (MPLS) */
1594 #define HWRM_CFA_L2_FILTER_ALLOC_INPUT_TUNNEL_TYPE_MPLS \
1595 (UINT32_C(0x6) << 0)
1596 /* Stateless Transport Tunnel (STT) */
1597 #define HWRM_CFA_L2_FILTER_ALLOC_INPUT_TUNNEL_TYPE_STT \
1598 (UINT32_C(0x7) << 0)
1600 * Generic Routing Encapsulation (GRE) inside IP datagram
1603 #define HWRM_CFA_L2_FILTER_ALLOC_INPUT_TUNNEL_TYPE_IPGRE \
1604 (UINT32_C(0x8) << 0)
1605 /* Any tunneled traffic */
1606 #define HWRM_CFA_L2_FILTER_ALLOC_INPUT_TUNNEL_TYPE_ANYTUNNEL \
1607 (UINT32_C(0xff) << 0)
1608 uint8_t tunnel_type;
1613 * If set, this value shall represent the Logical VNIC ID of the
1614 * destination VNIC for the RX path and network port id of the
1615 * destination port for the TX path.
1619 /* Logical VNIC ID of the VNIC where traffic is mirrored. */
1620 uint16_t mirror_vnic_id;
1623 * This hint is provided to help in placing the filter in the filter
1627 #define HWRM_CFA_L2_FILTER_ALLOC_INPUT_PRI_HINT_NO_PREFER \
1628 (UINT32_C(0x0) << 0)
1629 /* Above the given filter */
1630 #define HWRM_CFA_L2_FILTER_ALLOC_INPUT_PRI_HINT_ABOVE_FILTER \
1631 (UINT32_C(0x1) << 0)
1632 /* Below the given filter */
1633 #define HWRM_CFA_L2_FILTER_ALLOC_INPUT_PRI_HINT_BELOW_FILTER \
1634 (UINT32_C(0x2) << 0)
1635 /* As high as possible */
1636 #define HWRM_CFA_L2_FILTER_ALLOC_INPUT_PRI_HINT_MAX \
1637 (UINT32_C(0x3) << 0)
1638 /* As low as possible */
1639 #define HWRM_CFA_L2_FILTER_ALLOC_INPUT_PRI_HINT_MIN \
1640 (UINT32_C(0x4) << 0)
1647 * This is the ID of the filter that goes along with the pri_hint. This
1648 * field is valid only for the following values. 1 - Above the given
1649 * filter 2 - Below the given filter
1651 uint64_t l2_filter_id_hint;
1652 } __attribute__((packed));
1654 /* Output (24 bytes) */
1655 struct hwrm_cfa_l2_filter_alloc_output {
1657 * Pass/Fail or error type Note: receiver to verify the in parameters,
1658 * and fail the call with an error when appropriate
1660 uint16_t error_code;
1662 /* This field returns the type of original request. */
1665 /* This field provides original sequence number of the command. */
1669 * This field is the length of the response in bytes. The last byte of
1670 * the response is a valid flag that will read as '1' when the command
1671 * has been completely written to memory.
1676 * This value identifies a set of CFA data structures used for an L2
1679 uint64_t l2_filter_id;
1682 * This is the ID of the flow associated with this filter. This value
1683 * shall be used to match and associate the flow identifier returned in
1684 * completion records. A value of 0xFFFFFFFF shall indicate no flow id.
1693 * This field is used in Output records to indicate that the output is
1694 * completely written to RAM. This field should be read as '1' to
1695 * indicate that the output has been completely written. When writing a
1696 * command completion or response to an internal processor, the order of
1697 * writes has to be such that this field is written last.
1700 } __attribute__((packed));
1702 /* hwrm_cfa_l2_filter_free */
1704 * Description: Free a L2 filter. The HWRM shall free all associated filter
1705 * resources with the L2 filter.
1708 /* Input (24 bytes) */
1709 struct hwrm_cfa_l2_filter_free_input {
1711 * This value indicates what type of request this is. The format for the
1712 * rest of the command is determined by this field.
1717 * This value indicates the what completion ring the request will be
1718 * optionally completed on. If the value is -1, then no CR completion
1719 * will be generated. Any other value must be a valid CR ring_id value
1720 * for this function.
1724 /* This value indicates the command sequence number. */
1728 * Target ID of this command. 0x0 - 0xFFF8 - Used for function ids
1729 * 0xFFF8 - 0xFFFE - Reserved for internal processors 0xFFFF - HWRM
1734 * This is the host address where the response will be written when the
1735 * request is complete. This area must be 16B aligned and must be
1736 * cleared to zero before the request is made.
1741 * This value identifies a set of CFA data structures used for an L2
1744 uint64_t l2_filter_id;
1745 } __attribute__((packed));
1747 /* Output (16 bytes) */
1748 struct hwrm_cfa_l2_filter_free_output {
1750 * Pass/Fail or error type Note: receiver to verify the in parameters,
1751 * and fail the call with an error when appropriate
1753 uint16_t error_code;
1755 /* This field returns the type of original request. */
1758 /* This field provides original sequence number of the command. */
1762 * This field is the length of the response in bytes. The last byte of
1763 * the response is a valid flag that will read as '1' when the command
1764 * has been completely written to memory.
1774 * This field is used in Output records to indicate that the output is
1775 * completely written to RAM. This field should be read as '1' to
1776 * indicate that the output has been completely written. When writing a
1777 * command completion or response to an internal processor, the order of
1778 * writes has to be such that this field is written last.
1781 } __attribute__((packed));
1783 /* hwrm_cfa_l2_set_rx_mask */
1784 /* Description: This command will set rx mask of the function. */
1786 /* Input (40 bytes) */
1787 struct hwrm_cfa_l2_set_rx_mask_input {
1789 * This value indicates what type of request this is. The format for the
1790 * rest of the command is determined by this field.
1795 * This value indicates the what completion ring the request will be
1796 * optionally completed on. If the value is -1, then no CR completion
1797 * will be generated. Any other value must be a valid CR ring_id value
1798 * for this function.
1802 /* This value indicates the command sequence number. */
1806 * Target ID of this command. 0x0 - 0xFFF8 - Used for function ids
1807 * 0xFFF8 - 0xFFFE - Reserved for internal processors 0xFFFF - HWRM
1812 * This is the host address where the response will be written when the
1813 * request is complete. This area must be 16B aligned and must be
1814 * cleared to zero before the request is made.
1821 /* Reserved for future use. */
1822 #define HWRM_CFA_L2_SET_RX_MASK_INPUT_MASK_RESERVED UINT32_C(0x1)
1824 * When this bit is '1', the function is requested to accept multi-cast
1825 * packets specified by the multicast addr table.
1827 #define HWRM_CFA_L2_SET_RX_MASK_INPUT_MASK_MCAST UINT32_C(0x2)
1829 * When this bit is '1', the function is requested to accept all multi-
1832 #define HWRM_CFA_L2_SET_RX_MASK_INPUT_MASK_ALL_MCAST UINT32_C(0x4)
1834 * When this bit is '1', the function is requested to accept broadcast
1837 #define HWRM_CFA_L2_SET_RX_MASK_INPUT_MASK_BCAST UINT32_C(0x8)
1839 * When this bit is '1', the function is requested to be put in the
1840 * promiscuous mode. The HWRM should accept any function to set up
1841 * promiscuous mode. The HWRM shall follow the semantics below for the
1842 * promiscuous mode support. # When partitioning is not enabled on a
1843 * port (i.e. single PF on the port), then the PF shall be allowed to be
1844 * in the promiscuous mode. When the PF is in the promiscuous mode, then
1845 * it shall receive all host bound traffic on that port. # When
1846 * partitioning is enabled on a port (i.e. multiple PFs per port) and a
1847 * PF on that port is in the promiscuous mode, then the PF receives all
1848 * traffic within that partition as identified by a unique identifier
1849 * for the PF (e.g. S-Tag). If a unique outer VLAN for the PF is
1850 * specified, then the setting of promiscuous mode on that PF shall
1851 * result in the PF receiving all host bound traffic with matching outer
1852 * VLAN. # A VF shall can be set in the promiscuous mode. In the
1853 * promiscuous mode, the VF does not receive any traffic unless a unique
1854 * outer VLAN for the VF is specified. If a unique outer VLAN for the VF
1855 * is specified, then the setting of promiscuous mode on that VF shall
1856 * result in the VF receiving all host bound traffic with the matching
1857 * outer VLAN. # The HWRM shall allow the setting of promiscuous mode on
1858 * a function independently from the promiscuous mode settings on other
1861 #define HWRM_CFA_L2_SET_RX_MASK_INPUT_MASK_PROMISCUOUS UINT32_C(0x10)
1863 * If this flag is set, the corresponding RX filters shall be set up to
1864 * cover multicast/broadcast filters for the outermost Layer 2
1865 * destination MAC address field.
1867 #define HWRM_CFA_L2_SET_RX_MASK_INPUT_MASK_OUTERMOST UINT32_C(0x20)
1870 /* This is the address for mcast address tbl. */
1871 uint64_t mc_tbl_addr;
1874 * This value indicates how many entries in mc_tbl are valid. Each entry
1877 uint32_t num_mc_entries;
1880 } __attribute__((packed));
1882 /* Output (16 bytes) */
1883 struct hwrm_cfa_l2_set_rx_mask_output {
1885 * Pass/Fail or error type Note: receiver to verify the in parameters,
1886 * and fail the call with an error when appropriate
1888 uint16_t error_code;
1890 /* This field returns the type of original request. */
1893 /* This field provides original sequence number of the command. */
1897 * This field is the length of the response in bytes. The last byte of
1898 * the response is a valid flag that will read as '1' when the command
1899 * has been completely written to memory.
1909 * This field is used in Output records to indicate that the output is
1910 * completely written to RAM. This field should be read as '1' to
1911 * indicate that the output has been completely written. When writing a
1912 * command completion or response to an internal processor, the order of
1913 * writes has to be such that this field is written last.
1916 } __attribute__((packed));
1918 /* hwrm_exec_fwd_resp */
1920 * Description: This command is used to send an encapsulated request to the
1921 * HWRM. This command instructs the HWRM to execute the request and forward the
1922 * response of the encapsulated request to the location specified in the
1923 * original request that is encapsulated. The target id of this command shall be
1924 * set to 0xFFFF (HWRM). The response location in this command shall be used to
1925 * acknowledge the receipt of the encapsulated request and forwarding of the
1929 /* Input (128 bytes) */
1930 struct hwrm_exec_fwd_resp_input {
1932 * This value indicates what type of request this is. The format for the
1933 * rest of the command is determined by this field.
1938 * This value indicates the what completion ring the request will be
1939 * optionally completed on. If the value is -1, then no CR completion
1940 * will be generated. Any other value must be a valid CR ring_id value
1941 * for this function.
1945 /* This value indicates the command sequence number. */
1949 * Target ID of this command. 0x0 - 0xFFF8 - Used for function ids
1950 * 0xFFF8 - 0xFFFE - Reserved for internal processors 0xFFFF - HWRM
1955 * This is the host address where the response will be written when the
1956 * request is complete. This area must be 16B aligned and must be
1957 * cleared to zero before the request is made.
1962 * This is an encapsulated request. This request should be executed by
1963 * the HWRM and the response should be provided in the response buffer
1964 * inside the encapsulated request.
1966 uint32_t encap_request[26];
1969 * This value indicates the target id of the response to the
1970 * encapsulated request. 0x0 - 0xFFF8 - Used for function ids 0xFFF8 -
1971 * 0xFFFE - Reserved for internal processors 0xFFFF - HWRM
1973 uint16_t encap_resp_target_id;
1975 uint16_t unused_0[3];
1976 } __attribute__((packed));
1978 /* Output (16 bytes) */
1979 struct hwrm_exec_fwd_resp_output {
1981 * Pass/Fail or error type Note: receiver to verify the in parameters,
1982 * and fail the call with an error when appropriate
1984 uint16_t error_code;
1986 /* This field returns the type of original request. */
1989 /* This field provides original sequence number of the command. */
1993 * This field is the length of the response in bytes. The last byte of
1994 * the response is a valid flag that will read as '1' when the command
1995 * has been completely written to memory.
2005 * This field is used in Output records to indicate that the output is
2006 * completely written to RAM. This field should be read as '1' to
2007 * indicate that the output has been completely written. When writing a
2008 * command completion or response to an internal processor, the order of
2009 * writes has to be such that this field is written last.
2012 } __attribute__((packed));
2014 /* hwrm_func_qcaps */
2016 * Description: This command returns capabilities of a function. The input FID
2017 * value is used to indicate what function is being queried. This allows a
2018 * physical function driver to query virtual functions that are children of the
2019 * physical function. The output FID value is needed to configure Rings and
2020 * MSI-X vectors so their DMA operations appear correctly on the PCI bus.
2023 /* Input (24 bytes) */
2024 struct hwrm_func_qcaps_input {
2026 * This value indicates what type of request this is. The format for the
2027 * rest of the command is determined by this field.
2032 * This value indicates the what completion ring the request will be
2033 * optionally completed on. If the value is -1, then no CR completion
2034 * will be generated. Any other value must be a valid CR ring_id value
2035 * for this function.
2039 /* This value indicates the command sequence number. */
2043 * Target ID of this command. 0x0 - 0xFFF8 - Used for function ids
2044 * 0xFFF8 - 0xFFFE - Reserved for internal processors 0xFFFF - HWRM
2049 * This is the host address where the response will be written when the
2050 * request is complete. This area must be 16B aligned and must be
2051 * cleared to zero before the request is made.
2056 * Function ID of the function that is being queried. 0xFF... (All Fs)
2057 * if the query is for the requesting function.
2061 uint16_t unused_0[3];
2062 } __attribute__((packed));
2064 /* Output (80 bytes) */
2065 struct hwrm_func_qcaps_output {
2066 uint16_t error_code;
2068 * Pass/Fail or error type Note: receiver to verify the in
2069 * parameters, and fail the call with an error when appropriate
2072 /* This field returns the type of original request. */
2074 /* This field provides original sequence number of the command. */
2077 * This field is the length of the response in bytes. The last
2078 * byte of the response is a valid flag that will read as '1'
2079 * when the command has been completely written to memory.
2083 * FID value. This value is used to identify operations on the
2084 * PCI bus as belonging to a particular PCI function.
2088 * Port ID of port that this function is associated with. Valid
2089 * only for the PF. 0xFF... (All Fs) if this function is not
2090 * associated with any port. 0xFF... (All Fs) if this function
2091 * is called from a VF.
2094 /* If 1, then Push mode is supported on this function. */
2095 #define HWRM_FUNC_QCAPS_OUTPUT_FLAGS_PUSH_MODE_SUPPORTED UINT32_C(0x1)
2097 * If 1, then the global MSI-X auto-masking is enabled for the
2100 #define HWRM_FUNC_QCAPS_OUTPUT_FLAGS_GLOBAL_MSIX_AUTOMASKING UINT32_C(0x2)
2102 * If 1, then the Precision Time Protocol (PTP) processing is
2103 * supported on this function. The HWRM should enable PTP on
2104 * only a single Physical Function (PF) per port.
2106 #define HWRM_FUNC_QCAPS_OUTPUT_FLAGS_PTP_SUPPORTED UINT32_C(0x4)
2108 * If 1, then RDMA over Converged Ethernet (RoCE) v1 is
2109 * supported on this function.
2111 #define HWRM_FUNC_QCAPS_OUTPUT_FLAGS_ROCE_V1_SUPPORTED UINT32_C(0x8)
2113 * If 1, then RDMA over Converged Ethernet (RoCE) v2 is
2114 * supported on this function.
2116 #define HWRM_FUNC_QCAPS_OUTPUT_FLAGS_ROCE_V2_SUPPORTED UINT32_C(0x10)
2118 * If 1, then control and configuration of WoL magic packet are
2119 * supported on this function.
2121 #define HWRM_FUNC_QCAPS_OUTPUT_FLAGS_WOL_MAGICPKT_SUPPORTED UINT32_C(0x20)
2123 * If 1, then control and configuration of bitmap pattern packet
2124 * are supported on this function.
2126 #define HWRM_FUNC_QCAPS_OUTPUT_FLAGS_WOL_BMP_SUPPORTED UINT32_C(0x40)
2128 * If set to 1, then the control and configuration of rate limit
2129 * of an allocated TX ring on the queried function is supported.
2131 #define HWRM_FUNC_QCAPS_OUTPUT_FLAGS_TX_RING_RL_SUPPORTED UINT32_C(0x80)
2133 * If 1, then control and configuration of minimum and maximum
2134 * bandwidths are supported on the queried function.
2136 #define HWRM_FUNC_QCAPS_OUTPUT_FLAGS_TX_BW_CFG_SUPPORTED UINT32_C(0x100)
2138 * If the query is for a VF, then this flag shall be ignored. If
2139 * this query is for a PF and this flag is set to 1, then the PF
2140 * has the capability to set the rate limits on the TX rings of
2141 * its children VFs. If this query is for a PF and this flag is
2142 * set to 0, then the PF does not have the capability to set the
2143 * rate limits on the TX rings of its children VFs.
2145 #define HWRM_FUNC_QCAPS_OUTPUT_FLAGS_VF_TX_RING_RL_SUPPORTED UINT32_C(0x200)
2147 * If the query is for a VF, then this flag shall be ignored. If
2148 * this query is for a PF and this flag is set to 1, then the PF
2149 * has the capability to set the minimum and/or maximum
2150 * bandwidths for its children VFs. If this query is for a PF
2151 * and this flag is set to 0, then the PF does not have the
2152 * capability to set the minimum or maximum bandwidths for its
2155 #define HWRM_FUNC_QCAPS_OUTPUT_FLAGS_VF_BW_CFG_SUPPORTED UINT32_C(0x400)
2156 uint8_t mac_address[6];
2158 * This value is current MAC address configured for this
2159 * function. A value of 00-00-00-00-00-00 indicates no MAC
2160 * address is currently configured.
2162 uint16_t max_rsscos_ctx;
2164 * The maximum number of RSS/COS contexts that can be allocated
2167 uint16_t max_cmpl_rings;
2169 * The maximum number of completion rings that can be allocated
2172 uint16_t max_tx_rings;
2174 * The maximum number of transmit rings that can be allocated to
2177 uint16_t max_rx_rings;
2179 * The maximum number of receive rings that can be allocated to
2182 uint16_t max_l2_ctxs;
2184 * The maximum number of L2 contexts that can be allocated to
2189 * The maximum number of VNICs that can be allocated to the
2192 uint16_t first_vf_id;
2194 * The identifier for the first VF enabled on a PF. This is
2195 * valid only on the PF with SR-IOV enabled. 0xFF... (All Fs) if
2196 * this command is called on a PF with SR-IOV disabled or on a
2201 * The maximum number of VFs that can be allocated to the
2202 * function. This is valid only on the PF with SR-IOV enabled.
2203 * 0xFF... (All Fs) if this command is called on a PF with SR-
2204 * IOV disabled or on a VF.
2206 uint16_t max_stat_ctx;
2208 * The maximum number of statistic contexts that can be
2209 * allocated to the function.
2211 uint32_t max_encap_records;
2213 * The maximum number of Encapsulation records that can be
2214 * offloaded by this function.
2216 uint32_t max_decap_records;
2218 * The maximum number of decapsulation records that can be
2219 * offloaded by this function.
2221 uint32_t max_tx_em_flows;
2223 * The maximum number of Exact Match (EM) flows that can be
2224 * offloaded by this function on the TX side.
2226 uint32_t max_tx_wm_flows;
2228 * The maximum number of Wildcard Match (WM) flows that can be
2229 * offloaded by this function on the TX side.
2231 uint32_t max_rx_em_flows;
2233 * The maximum number of Exact Match (EM) flows that can be
2234 * offloaded by this function on the RX side.
2236 uint32_t max_rx_wm_flows;
2238 * The maximum number of Wildcard Match (WM) flows that can be
2239 * offloaded by this function on the RX side.
2241 uint32_t max_mcast_filters;
2243 * The maximum number of multicast filters that can be supported
2244 * by this function on the RX side.
2246 uint32_t max_flow_id;
2248 * The maximum value of flow_id that can be supported in
2249 * completion records.
2251 uint32_t max_hw_ring_grps;
2253 * The maximum number of HW ring groups that can be supported on
2256 uint16_t max_sp_tx_rings;
2258 * The maximum number of strict priority transmit rings that can
2259 * be allocated to the function. This number indicates the
2260 * maximum number of TX rings that can be assigned strict
2261 * priorities out of the maximum number of TX rings that can be
2262 * allocated (max_tx_rings) to the function.
2267 * This field is used in Output records to indicate that the
2268 * output is completely written to RAM. This field should be
2269 * read as '1' to indicate that the output has been completely
2270 * written. When writing a command completion or response to an
2271 * internal processor, the order of writes has to be such that
2272 * this field is written last.
2274 } __attribute__((packed));
2276 /* hwrm_func_reset */
2278 * Description: This command resets a hardware function (PCIe function) and
2279 * frees any resources used by the function. This command shall be initiated by
2280 * the driver after an FLR has occurred to prepare the function for re-use. This
2281 * command may also be initiated by a driver prior to doing it's own
2282 * configuration. This command puts the function into the reset state. In the
2283 * reset state, global and port related features of the chip are not available.
2286 * Note: This command will reset a function that has already been disabled or
2287 * idled. The command returns all the resources owned by the function so a new
2288 * driver may allocate and configure resources normally.
2291 /* Input (24 bytes) */
2292 struct hwrm_func_reset_input {
2294 * This value indicates what type of request this is. The format for the
2295 * rest of the command is determined by this field.
2300 * This value indicates the what completion ring the request will be
2301 * optionally completed on. If the value is -1, then no CR completion
2302 * will be generated. Any other value must be a valid CR ring_id value
2303 * for this function.
2307 /* This value indicates the command sequence number. */
2311 * Target ID of this command. 0x0 - 0xFFF8 - Used for function ids
2312 * 0xFFF8 - 0xFFFE - Reserved for internal processors 0xFFFF - HWRM
2317 * This is the host address where the response will be written when the
2318 * request is complete. This area must be 16B aligned and must be
2319 * cleared to zero before the request is made.
2323 /* This bit must be '1' for the vf_id_valid field to be configured. */
2324 #define HWRM_FUNC_RESET_INPUT_ENABLES_VF_ID_VALID \
2329 * The ID of the VF that this PF is trying to reset. Only the parent PF
2330 * shall be allowed to reset a child VF. A parent PF driver shall use
2331 * this field only when a specific child VF is requested to be reset.
2335 /* This value indicates the level of a function reset. */
2337 * Reset the caller function and its children VFs (if any). If
2338 * no children functions exist, then reset the caller function
2341 #define HWRM_FUNC_RESET_INPUT_FUNC_RESET_LEVEL_RESETALL \
2342 (UINT32_C(0x0) << 0)
2343 /* Reset the caller function only */
2344 #define HWRM_FUNC_RESET_INPUT_FUNC_RESET_LEVEL_RESETME \
2345 (UINT32_C(0x1) << 0)
2347 * Reset all children VFs of the caller function driver if the
2348 * caller is a PF driver. It is an error to specify this level
2349 * by a VF driver. It is an error to specify this level by a PF
2350 * driver with no children VFs.
2352 #define HWRM_FUNC_RESET_INPUT_FUNC_RESET_LEVEL_RESETCHILDREN \
2353 (UINT32_C(0x2) << 0)
2355 * Reset a specific VF of the caller function driver if the
2356 * caller is the parent PF driver. It is an error to specify
2357 * this level by a VF driver. It is an error to specify this
2358 * level by a PF driver that is not the parent of the VF that is
2359 * being requested to reset.
2361 #define HWRM_FUNC_RESET_INPUT_FUNC_RESET_LEVEL_RESETVF \
2362 (UINT32_C(0x3) << 0)
2363 uint8_t func_reset_level;
2366 } __attribute__((packed));
2368 /* Output (16 bytes) */
2369 struct hwrm_func_reset_output {
2371 * Pass/Fail or error type Note: receiver to verify the in parameters,
2372 * and fail the call with an error when appropriate
2374 uint16_t error_code;
2376 /* This field returns the type of original request. */
2379 /* This field provides original sequence number of the command. */
2383 * This field is the length of the response in bytes. The last byte of
2384 * the response is a valid flag that will read as '1' when the command
2385 * has been completely written to memory.
2395 * This field is used in Output records to indicate that the output is
2396 * completely written to RAM. This field should be read as '1' to
2397 * indicate that the output has been completely written. When writing a
2398 * command completion or response to an internal processor, the order of
2399 * writes has to be such that this field is written last.
2402 } __attribute__((packed));
2404 /* hwrm_port_phy_cfg */
2406 * Description: This command configures the PHY device for the port. It allows
2407 * setting of the most generic settings for the PHY. The HWRM shall complete
2408 * this command as soon as PHY settings are configured. They may not be applied
2409 * when the command response is provided. A VF driver shall not be allowed to
2410 * configure PHY using this command. In a network partition mode, a PF driver
2411 * shall not be allowed to configure PHY using this command.
2414 /* Input (56 bytes) */
2415 struct hwrm_port_phy_cfg_input {
2417 * This value indicates what type of request this is. The format for the
2418 * rest of the command is determined by this field.
2423 * This value indicates the what completion ring the request will be
2424 * optionally completed on. If the value is -1, then no CR completion
2425 * will be generated. Any other value must be a valid CR ring_id value
2426 * for this function.
2430 /* This value indicates the command sequence number. */
2434 * Target ID of this command. 0x0 - 0xFFF8 - Used for function ids
2435 * 0xFFF8 - 0xFFFE - Reserved for internal processors 0xFFFF - HWRM
2440 * This is the host address where the response will be written when the
2441 * request is complete. This area must be 16B aligned and must be
2442 * cleared to zero before the request is made.
2447 * When this bit is set to '1', the PHY for the port shall be reset. #
2448 * If this bit is set to 1, then the HWRM shall reset the PHY after
2449 * applying PHY configuration changes specified in this command. # In
2450 * order to guarantee that PHY configuration changes specified in this
2451 * command take effect, the HWRM client should set this flag to 1. # If
2452 * this bit is not set to 1, then the HWRM may reset the PHY depending
2453 * on the current PHY configuration and settings specified in this
2456 #define HWRM_PORT_PHY_CFG_INPUT_FLAGS_RESET_PHY UINT32_C(0x1)
2458 * When this bit is set to '1', the link shall be forced to be taken
2459 * down. # When this bit is set to '1", all other command input settings
2460 * related to the link speed shall be ignored. Once the link state is
2461 * forced down, it can be explicitly cleared from that state by setting
2462 * this flag to '0'. # If this flag is set to '0', then the link shall
2463 * be cleared from forced down state if the link is in forced down
2464 * state. There may be conditions (e.g. out-of-band or sideband
2465 * configuration changes for the link) outside the scope of the HWRM
2466 * implementation that may clear forced down link state.
2468 #define HWRM_PORT_PHY_CFG_INPUT_FLAGS_FORCE_LINK_DOWN UINT32_C(0x2)
2470 * When this bit is set to '1', the link shall be forced to the
2471 * force_link_speed value. When this bit is set to '1', the HWRM client
2472 * should not enable any of the auto negotiation related fields
2473 * represented by auto_XXX fields in this command. When this bit is set
2474 * to '1' and the HWRM client has enabled a auto_XXX field in this
2475 * command, then the HWRM shall ignore the enabled auto_XXX field. When
2476 * this bit is set to zero, the link shall be allowed to autoneg.
2478 #define HWRM_PORT_PHY_CFG_INPUT_FLAGS_FORCE UINT32_C(0x4)
2480 * When this bit is set to '1', the auto-negotiation process shall be
2481 * restarted on the link.
2483 #define HWRM_PORT_PHY_CFG_INPUT_FLAGS_RESTART_AUTONEG UINT32_C(0x8)
2485 * When this bit is set to '1', Energy Efficient Ethernet (EEE) is
2486 * requested to be enabled on this link. If EEE is not supported on this
2487 * port, then this flag shall be ignored by the HWRM.
2489 #define HWRM_PORT_PHY_CFG_INPUT_FLAGS_EEE_ENABLE UINT32_C(0x10)
2491 * When this bit is set to '1', Energy Efficient Ethernet (EEE) is
2492 * requested to be disabled on this link. If EEE is not supported on
2493 * this port, then this flag shall be ignored by the HWRM.
2495 #define HWRM_PORT_PHY_CFG_INPUT_FLAGS_EEE_DISABLE UINT32_C(0x20)
2497 * When this bit is set to '1' and EEE is enabled on this link, then TX
2498 * LPI is requested to be enabled on the link. If EEE is not supported
2499 * on this port, then this flag shall be ignored by the HWRM. If EEE is
2500 * disabled on this port, then this flag shall be ignored by the HWRM.
2502 #define HWRM_PORT_PHY_CFG_INPUT_FLAGS_EEE_TX_LPI UINT32_C(0x40)
2505 /* This bit must be '1' for the auto_mode field to be configured. */
2506 #define HWRM_PORT_PHY_CFG_INPUT_ENABLES_AUTO_MODE UINT32_C(0x1)
2507 /* This bit must be '1' for the auto_duplex field to be configured. */
2508 #define HWRM_PORT_PHY_CFG_INPUT_ENABLES_AUTO_DUPLEX UINT32_C(0x2)
2509 /* This bit must be '1' for the auto_pause field to be configured. */
2510 #define HWRM_PORT_PHY_CFG_INPUT_ENABLES_AUTO_PAUSE UINT32_C(0x4)
2512 * This bit must be '1' for the auto_link_speed field to be configured.
2514 #define HWRM_PORT_PHY_CFG_INPUT_ENABLES_AUTO_LINK_SPEED UINT32_C(0x8)
2516 * This bit must be '1' for the auto_link_speed_mask field to be
2519 #define HWRM_PORT_PHY_CFG_INPUT_ENABLES_AUTO_LINK_SPEED_MASK \
2521 /* This bit must be '1' for the wirespeed field to be configured. */
2522 #define HWRM_PORT_PHY_CFG_INPUT_ENABLES_WIRESPEED UINT32_C(0x20)
2523 /* This bit must be '1' for the lpbk field to be configured. */
2524 #define HWRM_PORT_PHY_CFG_INPUT_ENABLES_LPBK UINT32_C(0x40)
2525 /* This bit must be '1' for the preemphasis field to be configured. */
2526 #define HWRM_PORT_PHY_CFG_INPUT_ENABLES_PREEMPHASIS UINT32_C(0x80)
2527 /* This bit must be '1' for the force_pause field to be configured. */
2528 #define HWRM_PORT_PHY_CFG_INPUT_ENABLES_FORCE_PAUSE UINT32_C(0x100)
2530 * This bit must be '1' for the eee_link_speed_mask field to be
2533 #define HWRM_PORT_PHY_CFG_INPUT_ENABLES_EEE_LINK_SPEED_MASK \
2535 /* This bit must be '1' for the tx_lpi_timer field to be configured. */
2536 #define HWRM_PORT_PHY_CFG_INPUT_ENABLES_TX_LPI_TIMER UINT32_C(0x400)
2539 /* Port ID of port that is to be configured. */
2543 * This is the speed that will be used if the force bit is '1'. If
2544 * unsupported speed is selected, an error will be generated.
2546 /* 100Mb link speed */
2547 #define HWRM_PORT_PHY_CFG_INPUT_FORCE_LINK_SPEED_100MB \
2548 (UINT32_C(0x1) << 0)
2549 /* 1Gb link speed */
2550 #define HWRM_PORT_PHY_CFG_INPUT_FORCE_LINK_SPEED_1GB \
2551 (UINT32_C(0xa) << 0)
2552 /* 2Gb link speed */
2553 #define HWRM_PORT_PHY_CFG_INPUT_FORCE_LINK_SPEED_2GB \
2554 (UINT32_C(0x14) << 0)
2555 /* 2.5Gb link speed */
2556 #define HWRM_PORT_PHY_CFG_INPUT_FORCE_LINK_SPEED_2_5GB \
2557 (UINT32_C(0x19) << 0)
2558 /* 10Gb link speed */
2559 #define HWRM_PORT_PHY_CFG_INPUT_FORCE_LINK_SPEED_10GB \
2560 (UINT32_C(0x64) << 0)
2561 /* 20Mb link speed */
2562 #define HWRM_PORT_PHY_CFG_INPUT_FORCE_LINK_SPEED_20GB \
2563 (UINT32_C(0xc8) << 0)
2564 /* 25Gb link speed */
2565 #define HWRM_PORT_PHY_CFG_INPUT_FORCE_LINK_SPEED_25GB \
2566 (UINT32_C(0xfa) << 0)
2567 /* 40Gb link speed */
2568 #define HWRM_PORT_PHY_CFG_INPUT_FORCE_LINK_SPEED_40GB \
2569 (UINT32_C(0x190) << 0)
2570 /* 50Gb link speed */
2571 #define HWRM_PORT_PHY_CFG_INPUT_FORCE_LINK_SPEED_50GB \
2572 (UINT32_C(0x1f4) << 0)
2573 /* 100Gb link speed */
2574 #define HWRM_PORT_PHY_CFG_INPUT_FORCE_LINK_SPEED_100GB \
2575 (UINT32_C(0x3e8) << 0)
2576 /* 10Mb link speed */
2577 #define HWRM_PORT_PHY_CFG_INPUT_FORCE_LINK_SPEED_10MB \
2578 (UINT32_C(0xffff) << 0)
2579 uint16_t force_link_speed;
2582 * This value is used to identify what autoneg mode is used when the
2583 * link speed is not being forced.
2586 * Disable autoneg or autoneg disabled. No speeds are selected.
2588 #define HWRM_PORT_PHY_CFG_INPUT_AUTO_MODE_NONE (UINT32_C(0x0) << 0)
2589 /* Select all possible speeds for autoneg mode. */
2590 #define HWRM_PORT_PHY_CFG_INPUT_AUTO_MODE_ALL_SPEEDS \
2591 (UINT32_C(0x1) << 0)
2593 * Select only the auto_link_speed speed for autoneg mode. This
2594 * mode has been DEPRECATED. An HWRM client should not use this
2597 #define HWRM_PORT_PHY_CFG_INPUT_AUTO_MODE_ONE_SPEED \
2598 (UINT32_C(0x2) << 0)
2600 * Select the auto_link_speed or any speed below that speed for
2601 * autoneg. This mode has been DEPRECATED. An HWRM client should
2602 * not use this mode.
2604 #define HWRM_PORT_PHY_CFG_INPUT_AUTO_MODE_ONE_OR_BELOW \
2605 (UINT32_C(0x3) << 0)
2607 * Select the speeds based on the corresponding link speed mask
2608 * value that is provided.
2610 #define HWRM_PORT_PHY_CFG_INPUT_AUTO_MODE_SPEED_MASK \
2611 (UINT32_C(0x4) << 0)
2615 * This is the duplex setting that will be used if the autoneg_mode is
2616 * "one_speed" or "one_or_below".
2618 /* Half Duplex will be requested. */
2619 #define HWRM_PORT_PHY_CFG_INPUT_AUTO_DUPLEX_HALF \
2620 (UINT32_C(0x0) << 0)
2621 /* Full duplex will be requested. */
2622 #define HWRM_PORT_PHY_CFG_INPUT_AUTO_DUPLEX_FULL \
2623 (UINT32_C(0x1) << 0)
2624 /* Both Half and Full dupex will be requested. */
2625 #define HWRM_PORT_PHY_CFG_INPUT_AUTO_DUPLEX_BOTH \
2626 (UINT32_C(0x2) << 0)
2627 uint8_t auto_duplex;
2630 * This value is used to configure the pause that will be used for
2631 * autonegotiation. Add text on the usage of auto_pause and force_pause.
2634 * When this bit is '1', Generation of tx pause messages has been
2635 * requested. Disabled otherwise.
2637 #define HWRM_PORT_PHY_CFG_INPUT_AUTO_PAUSE_TX UINT32_C(0x1)
2639 * When this bit is '1', Reception of rx pause messages has been
2640 * requested. Disabled otherwise.
2642 #define HWRM_PORT_PHY_CFG_INPUT_AUTO_PAUSE_RX UINT32_C(0x2)
2644 * When set to 1, the advertisement of pause is enabled. # When the
2645 * auto_mode is not set to none and this flag is set to 1, then the
2646 * auto_pause bits on this port are being advertised and autoneg pause
2647 * results are being interpreted. # When the auto_mode is not set to
2648 * none and this flag is set to 0, the pause is forced as indicated in
2649 * force_pause, and also advertised as auto_pause bits, but the autoneg
2650 * results are not interpreted since the pause configuration is being
2651 * forced. # When the auto_mode is set to none and this flag is set to
2652 * 1, auto_pause bits should be ignored and should be set to 0.
2654 #define HWRM_PORT_PHY_CFG_INPUT_AUTO_PAUSE_AUTONEG_PAUSE UINT32_C(0x4)
2660 * This is the speed that will be used if the autoneg_mode is
2661 * "one_speed" or "one_or_below". If an unsupported speed is selected,
2662 * an error will be generated.
2664 /* 100Mb link speed */
2665 #define HWRM_PORT_PHY_CFG_INPUT_AUTO_LINK_SPEED_100MB \
2666 (UINT32_C(0x1) << 0)
2667 /* 1Gb link speed */
2668 #define HWRM_PORT_PHY_CFG_INPUT_AUTO_LINK_SPEED_1GB \
2669 (UINT32_C(0xa) << 0)
2670 /* 2Gb link speed */
2671 #define HWRM_PORT_PHY_CFG_INPUT_AUTO_LINK_SPEED_2GB \
2672 (UINT32_C(0x14) << 0)
2673 /* 2.5Gb link speed */
2674 #define HWRM_PORT_PHY_CFG_INPUT_AUTO_LINK_SPEED_2_5GB \
2675 (UINT32_C(0x19) << 0)
2676 /* 10Gb link speed */
2677 #define HWRM_PORT_PHY_CFG_INPUT_AUTO_LINK_SPEED_10GB \
2678 (UINT32_C(0x64) << 0)
2679 /* 20Mb link speed */
2680 #define HWRM_PORT_PHY_CFG_INPUT_AUTO_LINK_SPEED_20GB \
2681 (UINT32_C(0xc8) << 0)
2682 /* 25Gb link speed */
2683 #define HWRM_PORT_PHY_CFG_INPUT_AUTO_LINK_SPEED_25GB \
2684 (UINT32_C(0xfa) << 0)
2685 /* 40Gb link speed */
2686 #define HWRM_PORT_PHY_CFG_INPUT_AUTO_LINK_SPEED_40GB \
2687 (UINT32_C(0x190) << 0)
2688 /* 50Gb link speed */
2689 #define HWRM_PORT_PHY_CFG_INPUT_AUTO_LINK_SPEED_50GB \
2690 (UINT32_C(0x1f4) << 0)
2691 /* 100Gb link speed */
2692 #define HWRM_PORT_PHY_CFG_INPUT_AUTO_LINK_SPEED_100GB \
2693 (UINT32_C(0x3e8) << 0)
2694 /* 10Mb link speed */
2695 #define HWRM_PORT_PHY_CFG_INPUT_AUTO_LINK_SPEED_10MB \
2696 (UINT32_C(0xffff) << 0)
2697 uint16_t auto_link_speed;
2700 * This is a mask of link speeds that will be used if autoneg_mode is
2701 * "mask". If unsupported speed is enabled an error will be generated.
2703 /* 100Mb link speed (Half-duplex) */
2704 #define HWRM_PORT_PHY_CFG_INPUT_AUTO_LINK_SPEED_MASK_100MBHD \
2706 /* 100Mb link speed (Full-duplex) */
2707 #define HWRM_PORT_PHY_CFG_INPUT_AUTO_LINK_SPEED_MASK_100MB \
2709 /* 1Gb link speed (Half-duplex) */
2710 #define HWRM_PORT_PHY_CFG_INPUT_AUTO_LINK_SPEED_MASK_1GBHD \
2712 /* 1Gb link speed (Full-duplex) */
2713 #define HWRM_PORT_PHY_CFG_INPUT_AUTO_LINK_SPEED_MASK_1GB \
2715 /* 2Gb link speed */
2716 #define HWRM_PORT_PHY_CFG_INPUT_AUTO_LINK_SPEED_MASK_2GB \
2718 /* 2.5Gb link speed */
2719 #define HWRM_PORT_PHY_CFG_INPUT_AUTO_LINK_SPEED_MASK_2_5GB \
2721 /* 10Gb link speed */
2722 #define HWRM_PORT_PHY_CFG_INPUT_AUTO_LINK_SPEED_MASK_10GB \
2724 /* 20Gb link speed */
2725 #define HWRM_PORT_PHY_CFG_INPUT_AUTO_LINK_SPEED_MASK_20GB \
2727 /* 25Gb link speed */
2728 #define HWRM_PORT_PHY_CFG_INPUT_AUTO_LINK_SPEED_MASK_25GB \
2730 /* 40Gb link speed */
2731 #define HWRM_PORT_PHY_CFG_INPUT_AUTO_LINK_SPEED_MASK_40GB \
2733 /* 50Gb link speed */
2734 #define HWRM_PORT_PHY_CFG_INPUT_AUTO_LINK_SPEED_MASK_50GB \
2736 /* 100Gb link speed */
2737 #define HWRM_PORT_PHY_CFG_INPUT_AUTO_LINK_SPEED_MASK_100GB \
2739 /* 10Mb link speed (Half-duplex) */
2740 #define HWRM_PORT_PHY_CFG_INPUT_AUTO_LINK_SPEED_MASK_10MBHD \
2742 /* 10Mb link speed (Full-duplex) */
2743 #define HWRM_PORT_PHY_CFG_INPUT_AUTO_LINK_SPEED_MASK_10MB \
2745 uint16_t auto_link_speed_mask;
2747 /* This value controls the wirespeed feature. */
2748 /* Wirespeed feature is disabled. */
2749 #define HWRM_PORT_PHY_CFG_INPUT_WIRESPEED_OFF (UINT32_C(0x0) << 0)
2750 /* Wirespeed feature is enabled. */
2751 #define HWRM_PORT_PHY_CFG_INPUT_WIRESPEED_ON (UINT32_C(0x1) << 0)
2754 /* This value controls the loopback setting for the PHY. */
2755 /* No loopback is selected. Normal operation. */
2756 #define HWRM_PORT_PHY_CFG_INPUT_LPBK_NONE (UINT32_C(0x0) << 0)
2758 * The HW will be configured with local loopback such that host
2759 * data is sent back to the host without modification.
2761 #define HWRM_PORT_PHY_CFG_INPUT_LPBK_LOCAL (UINT32_C(0x1) << 0)
2763 * The HW will be configured with remote loopback such that port
2764 * logic will send packets back out the transmitter that are
2767 #define HWRM_PORT_PHY_CFG_INPUT_LPBK_REMOTE (UINT32_C(0x2) << 0)
2771 * This value is used to configure the pause that will be used for force
2775 * When this bit is '1', Generation of tx pause messages is supported.
2776 * Disabled otherwise.
2778 #define HWRM_PORT_PHY_CFG_INPUT_FORCE_PAUSE_TX UINT32_C(0x1)
2780 * When this bit is '1', Reception of rx pause messages is supported.
2781 * Disabled otherwise.
2783 #define HWRM_PORT_PHY_CFG_INPUT_FORCE_PAUSE_RX UINT32_C(0x2)
2784 uint8_t force_pause;
2789 * This value controls the pre-emphasis to be used for the link. Driver
2790 * should not set this value (use enable.preemphasis = 0) unless driver
2791 * is sure of setting. Normally HWRM FW will determine proper pre-
2794 uint32_t preemphasis;
2797 * Setting for link speed mask that is used to advertise speeds during
2798 * autonegotiation when EEE is enabled. This field is valid only when
2799 * EEE is enabled. The speeds specified in this field shall be a subset
2800 * of speeds specified in auto_link_speed_mask. If EEE is enabled,then
2801 * at least one speed shall be provided in this mask.
2804 #define HWRM_PORT_PHY_CFG_INPUT_EEE_LINK_SPEED_MASK_RSVD1 UINT32_C(0x1)
2805 /* 100Mb link speed (Full-duplex) */
2806 #define HWRM_PORT_PHY_CFG_INPUT_EEE_LINK_SPEED_MASK_100MB UINT32_C(0x2)
2808 #define HWRM_PORT_PHY_CFG_INPUT_EEE_LINK_SPEED_MASK_RSVD2 UINT32_C(0x4)
2809 /* 1Gb link speed (Full-duplex) */
2810 #define HWRM_PORT_PHY_CFG_INPUT_EEE_LINK_SPEED_MASK_1GB UINT32_C(0x8)
2812 #define HWRM_PORT_PHY_CFG_INPUT_EEE_LINK_SPEED_MASK_RSVD3 \
2815 #define HWRM_PORT_PHY_CFG_INPUT_EEE_LINK_SPEED_MASK_RSVD4 \
2817 /* 10Gb link speed */
2818 #define HWRM_PORT_PHY_CFG_INPUT_EEE_LINK_SPEED_MASK_10GB \
2820 uint16_t eee_link_speed_mask;
2826 * Reuested setting of TX LPI timer in microseconds. This field is valid
2827 * only when EEE is enabled and TX LPI is enabled.
2829 #define HWRM_PORT_PHY_CFG_INPUT_TX_LPI_TIMER_MASK \
2831 #define HWRM_PORT_PHY_CFG_INPUT_TX_LPI_TIMER_SFT 0
2832 uint32_t tx_lpi_timer;
2835 } __attribute__((packed));
2837 /* Output (16 bytes) */
2838 struct hwrm_port_phy_cfg_output {
2840 * Pass/Fail or error type Note: receiver to verify the in parameters,
2841 * and fail the call with an error when appropriate
2843 uint16_t error_code;
2845 /* This field returns the type of original request. */
2848 /* This field provides original sequence number of the command. */
2852 * This field is the length of the response in bytes. The last byte of
2853 * the response is a valid flag that will read as '1' when the command
2854 * has been completely written to memory.
2864 * This field is used in Output records to indicate that the output is
2865 * completely written to RAM. This field should be read as '1' to
2866 * indicate that the output has been completely written. When writing a
2867 * command completion or response to an internal processor, the order of
2868 * writes has to be such that this field is written last.
2871 } __attribute__((packed));
2873 /* hwrm_port_phy_qcfg */
2874 /* Description: This command queries the PHY configuration for the port. */
2875 /* Input (24 bytes) */
2877 struct hwrm_port_phy_qcfg_input {
2879 * This value indicates what type of request this is. The format for the
2880 * rest of the command is determined by this field.
2885 * This value indicates the what completion ring the request will be
2886 * optionally completed on. If the value is -1, then no CR completion
2887 * will be generated. Any other value must be a valid CR ring_id value
2888 * for this function.
2892 /* This value indicates the command sequence number. */
2896 * Target ID of this command. 0x0 - 0xFFF8 - Used for function ids
2897 * 0xFFF8 - 0xFFFE - Reserved for internal processors 0xFFFF - HWRM
2902 * This is the host address where the response will be written when the
2903 * request is complete. This area must be 16B aligned and must be
2904 * cleared to zero before the request is made.
2908 /* Port ID of port that is to be queried. */
2911 uint16_t unused_0[3];
2912 } __attribute__((packed));
2914 /* Output (96 bytes) */
2915 struct hwrm_port_phy_qcfg_output {
2917 * Pass/Fail or error type Note: receiver to verify the in parameters,
2918 * and fail the call with an error when appropriate
2920 uint16_t error_code;
2922 /* This field returns the type of original request. */
2925 /* This field provides original sequence number of the command. */
2929 * This field is the length of the response in bytes. The last byte of
2930 * the response is a valid flag that will read as '1' when the command
2931 * has been completely written to memory.
2935 /* This value indicates the current link status. */
2936 /* There is no link or cable detected. */
2937 #define HWRM_PORT_PHY_QCFG_OUTPUT_LINK_NO_LINK (UINT32_C(0x0) << 0)
2938 /* There is no link, but a cable has been detected. */
2939 #define HWRM_PORT_PHY_QCFG_OUTPUT_LINK_SIGNAL (UINT32_C(0x1) << 0)
2940 /* There is a link. */
2941 #define HWRM_PORT_PHY_QCFG_OUTPUT_LINK_LINK (UINT32_C(0x2) << 0)
2946 /* This value indicates the current link speed of the connection. */
2947 /* 100Mb link speed */
2948 #define HWRM_PORT_PHY_QCFG_OUTPUT_LINK_SPEED_100MB \
2949 (UINT32_C(0x1) << 0)
2950 /* 1Gb link speed */
2951 #define HWRM_PORT_PHY_QCFG_OUTPUT_LINK_SPEED_1GB \
2952 (UINT32_C(0xa) << 0)
2953 /* 2Gb link speed */
2954 #define HWRM_PORT_PHY_QCFG_OUTPUT_LINK_SPEED_2GB \
2955 (UINT32_C(0x14) << 0)
2956 /* 2.5Gb link speed */
2957 #define HWRM_PORT_PHY_QCFG_OUTPUT_LINK_SPEED_2_5GB \
2958 (UINT32_C(0x19) << 0)
2959 /* 10Gb link speed */
2960 #define HWRM_PORT_PHY_QCFG_OUTPUT_LINK_SPEED_10GB \
2961 (UINT32_C(0x64) << 0)
2962 /* 20Mb link speed */
2963 #define HWRM_PORT_PHY_QCFG_OUTPUT_LINK_SPEED_20GB \
2964 (UINT32_C(0xc8) << 0)
2965 /* 25Gb link speed */
2966 #define HWRM_PORT_PHY_QCFG_OUTPUT_LINK_SPEED_25GB \
2967 (UINT32_C(0xfa) << 0)
2968 /* 40Gb link speed */
2969 #define HWRM_PORT_PHY_QCFG_OUTPUT_LINK_SPEED_40GB \
2970 (UINT32_C(0x190) << 0)
2971 /* 50Gb link speed */
2972 #define HWRM_PORT_PHY_QCFG_OUTPUT_LINK_SPEED_50GB \
2973 (UINT32_C(0x1f4) << 0)
2974 /* 100Gb link speed */
2975 #define HWRM_PORT_PHY_QCFG_OUTPUT_LINK_SPEED_100GB \
2976 (UINT32_C(0x3e8) << 0)
2977 /* 10Mb link speed */
2978 #define HWRM_PORT_PHY_QCFG_OUTPUT_LINK_SPEED_10MB \
2979 (UINT32_C(0xffff) << 0)
2980 uint16_t link_speed;
2982 /* This value is indicates the duplex of the current connection. */
2983 /* Half Duplex connection. */
2984 #define HWRM_PORT_PHY_QCFG_OUTPUT_DUPLEX_HALF (UINT32_C(0x0) << 0)
2985 /* Full duplex connection. */
2986 #define HWRM_PORT_PHY_QCFG_OUTPUT_DUPLEX_FULL (UINT32_C(0x1) << 0)
2990 * This value is used to indicate the current pause configuration. When
2991 * autoneg is enabled, this value represents the autoneg results of
2992 * pause configuration.
2995 * When this bit is '1', Generation of tx pause messages is supported.
2996 * Disabled otherwise.
2998 #define HWRM_PORT_PHY_QCFG_OUTPUT_PAUSE_TX UINT32_C(0x1)
3000 * When this bit is '1', Reception of rx pause messages is supported.
3001 * Disabled otherwise.
3003 #define HWRM_PORT_PHY_QCFG_OUTPUT_PAUSE_RX UINT32_C(0x2)
3007 * The supported speeds for the port. This is a bit mask. For each speed
3008 * that is supported, the corrresponding bit will be set to '1'.
3010 /* 100Mb link speed (Half-duplex) */
3011 #define HWRM_PORT_PHY_QCFG_OUTPUT_SUPPORT_SPEEDS_100MBHD \
3013 /* 100Mb link speed (Full-duplex) */
3014 #define HWRM_PORT_PHY_QCFG_OUTPUT_SUPPORT_SPEEDS_100MB \
3016 /* 1Gb link speed (Half-duplex) */
3017 #define HWRM_PORT_PHY_QCFG_OUTPUT_SUPPORT_SPEEDS_1GBHD \
3019 /* 1Gb link speed (Full-duplex) */
3020 #define HWRM_PORT_PHY_QCFG_OUTPUT_SUPPORT_SPEEDS_1GB \
3022 /* 2Gb link speed */
3023 #define HWRM_PORT_PHY_QCFG_OUTPUT_SUPPORT_SPEEDS_2GB \
3025 /* 2.5Gb link speed */
3026 #define HWRM_PORT_PHY_QCFG_OUTPUT_SUPPORT_SPEEDS_2_5GB \
3028 /* 10Gb link speed */
3029 #define HWRM_PORT_PHY_QCFG_OUTPUT_SUPPORT_SPEEDS_10GB \
3031 /* 20Gb link speed */
3032 #define HWRM_PORT_PHY_QCFG_OUTPUT_SUPPORT_SPEEDS_20GB \
3034 /* 25Gb link speed */
3035 #define HWRM_PORT_PHY_QCFG_OUTPUT_SUPPORT_SPEEDS_25GB \
3037 /* 40Gb link speed */
3038 #define HWRM_PORT_PHY_QCFG_OUTPUT_SUPPORT_SPEEDS_40GB \
3040 /* 50Gb link speed */
3041 #define HWRM_PORT_PHY_QCFG_OUTPUT_SUPPORT_SPEEDS_50GB \
3043 /* 100Gb link speed */
3044 #define HWRM_PORT_PHY_QCFG_OUTPUT_SUPPORT_SPEEDS_100GB \
3046 /* 10Mb link speed (Half-duplex) */
3047 #define HWRM_PORT_PHY_QCFG_OUTPUT_SUPPORT_SPEEDS_10MBHD \
3049 /* 10Mb link speed (Full-duplex) */
3050 #define HWRM_PORT_PHY_QCFG_OUTPUT_SUPPORT_SPEEDS_10MB \
3052 uint16_t support_speeds;
3055 * Current setting of forced link speed. When the link speed is not
3056 * being forced, this value shall be set to 0.
3058 /* 100Mb link speed */
3059 #define HWRM_PORT_PHY_QCFG_OUTPUT_FORCE_LINK_SPEED_100MB \
3060 (UINT32_C(0x1) << 0)
3061 /* 1Gb link speed */
3062 #define HWRM_PORT_PHY_QCFG_OUTPUT_FORCE_LINK_SPEED_1GB \
3063 (UINT32_C(0xa) << 0)
3064 /* 2Gb link speed */
3065 #define HWRM_PORT_PHY_QCFG_OUTPUT_FORCE_LINK_SPEED_2GB \
3066 (UINT32_C(0x14) << 0)
3067 /* 2.5Gb link speed */
3068 #define HWRM_PORT_PHY_QCFG_OUTPUT_FORCE_LINK_SPEED_2_5GB \
3069 (UINT32_C(0x19) << 0)
3070 /* 10Gb link speed */
3071 #define HWRM_PORT_PHY_QCFG_OUTPUT_FORCE_LINK_SPEED_10GB \
3072 (UINT32_C(0x64) << 0)
3073 /* 20Mb link speed */
3074 #define HWRM_PORT_PHY_QCFG_OUTPUT_FORCE_LINK_SPEED_20GB \
3075 (UINT32_C(0xc8) << 0)
3076 /* 25Gb link speed */
3077 #define HWRM_PORT_PHY_QCFG_OUTPUT_FORCE_LINK_SPEED_25GB \
3078 (UINT32_C(0xfa) << 0)
3079 /* 40Gb link speed */
3080 #define HWRM_PORT_PHY_QCFG_OUTPUT_FORCE_LINK_SPEED_40GB \
3081 (UINT32_C(0x190) << 0)
3082 /* 50Gb link speed */
3083 #define HWRM_PORT_PHY_QCFG_OUTPUT_FORCE_LINK_SPEED_50GB \
3084 (UINT32_C(0x1f4) << 0)
3085 /* 100Gb link speed */
3086 #define HWRM_PORT_PHY_QCFG_OUTPUT_FORCE_LINK_SPEED_100GB \
3087 (UINT32_C(0x3e8) << 0)
3088 /* 10Mb link speed */
3089 #define HWRM_PORT_PHY_QCFG_OUTPUT_FORCE_LINK_SPEED_10MB \
3090 (UINT32_C(0xffff) << 0)
3091 uint16_t force_link_speed;
3093 /* Current setting of auto negotiation mode. */
3095 * Disable autoneg or autoneg disabled. No speeds are selected.
3097 #define HWRM_PORT_PHY_QCFG_OUTPUT_AUTO_MODE_NONE \
3098 (UINT32_C(0x0) << 0)
3099 /* Select all possible speeds for autoneg mode. */
3100 #define HWRM_PORT_PHY_QCFG_OUTPUT_AUTO_MODE_ALL_SPEEDS \
3101 (UINT32_C(0x1) << 0)
3103 * Select only the auto_link_speed speed for autoneg mode. This
3104 * mode has been DEPRECATED. An HWRM client should not use this
3107 #define HWRM_PORT_PHY_QCFG_OUTPUT_AUTO_MODE_ONE_SPEED \
3108 (UINT32_C(0x2) << 0)
3110 * Select the auto_link_speed or any speed below that speed for
3111 * autoneg. This mode has been DEPRECATED. An HWRM client should
3112 * not use this mode.
3114 #define HWRM_PORT_PHY_QCFG_OUTPUT_AUTO_MODE_ONE_OR_BELOW \
3115 (UINT32_C(0x3) << 0)
3117 * Select the speeds based on the corresponding link speed mask
3118 * value that is provided.
3120 #define HWRM_PORT_PHY_QCFG_OUTPUT_AUTO_MODE_SPEED_MASK \
3121 (UINT32_C(0x4) << 0)
3125 * Current setting of pause autonegotiation. Move autoneg_pause flag
3129 * When this bit is '1', Generation of tx pause messages has been
3130 * requested. Disabled otherwise.
3132 #define HWRM_PORT_PHY_QCFG_OUTPUT_AUTO_PAUSE_TX UINT32_C(0x1)
3134 * When this bit is '1', Reception of rx pause messages has been
3135 * requested. Disabled otherwise.
3137 #define HWRM_PORT_PHY_QCFG_OUTPUT_AUTO_PAUSE_RX UINT32_C(0x2)
3139 * When set to 1, the advertisement of pause is enabled. # When the
3140 * auto_mode is not set to none and this flag is set to 1, then the
3141 * auto_pause bits on this port are being advertised and autoneg pause
3142 * results are being interpreted. # When the auto_mode is not set to
3143 * none and this flag is set to 0, the pause is forced as indicated in
3144 * force_pause, and also advertised as auto_pause bits, but the autoneg
3145 * results are not interpreted since the pause configuration is being
3146 * forced. # When the auto_mode is set to none and this flag is set to
3147 * 1, auto_pause bits should be ignored and should be set to 0.
3149 #define HWRM_PORT_PHY_QCFG_OUTPUT_AUTO_PAUSE_AUTONEG_PAUSE \
3154 * Current setting for auto_link_speed. This field is only valid when
3155 * auto_mode is set to "one_speed" or "one_or_below".
3157 /* 100Mb link speed */
3158 #define HWRM_PORT_PHY_QCFG_OUTPUT_AUTO_LINK_SPEED_100MB \
3159 (UINT32_C(0x1) << 0)
3160 /* 1Gb link speed */
3161 #define HWRM_PORT_PHY_QCFG_OUTPUT_AUTO_LINK_SPEED_1GB \
3162 (UINT32_C(0xa) << 0)
3163 /* 2Gb link speed */
3164 #define HWRM_PORT_PHY_QCFG_OUTPUT_AUTO_LINK_SPEED_2GB \
3165 (UINT32_C(0x14) << 0)
3166 /* 2.5Gb link speed */
3167 #define HWRM_PORT_PHY_QCFG_OUTPUT_AUTO_LINK_SPEED_2_5GB \
3168 (UINT32_C(0x19) << 0)
3169 /* 10Gb link speed */
3170 #define HWRM_PORT_PHY_QCFG_OUTPUT_AUTO_LINK_SPEED_10GB \
3171 (UINT32_C(0x64) << 0)
3172 /* 20Mb link speed */
3173 #define HWRM_PORT_PHY_QCFG_OUTPUT_AUTO_LINK_SPEED_20GB \
3174 (UINT32_C(0xc8) << 0)
3175 /* 25Gb link speed */
3176 #define HWRM_PORT_PHY_QCFG_OUTPUT_AUTO_LINK_SPEED_25GB \
3177 (UINT32_C(0xfa) << 0)
3178 /* 40Gb link speed */
3179 #define HWRM_PORT_PHY_QCFG_OUTPUT_AUTO_LINK_SPEED_40GB \
3180 (UINT32_C(0x190) << 0)
3181 /* 50Gb link speed */
3182 #define HWRM_PORT_PHY_QCFG_OUTPUT_AUTO_LINK_SPEED_50GB \
3183 (UINT32_C(0x1f4) << 0)
3184 /* 100Gb link speed */
3185 #define HWRM_PORT_PHY_QCFG_OUTPUT_AUTO_LINK_SPEED_100GB \
3186 (UINT32_C(0x3e8) << 0)
3187 /* 10Mb link speed */
3188 #define HWRM_PORT_PHY_QCFG_OUTPUT_AUTO_LINK_SPEED_10MB \
3189 (UINT32_C(0xffff) << 0)
3190 uint16_t auto_link_speed;
3193 * Current setting for auto_link_speed_mask that is used to advertise
3194 * speeds during autonegotiation. This field is only valid when
3195 * auto_mode is set to "mask". The speeds specified in this field shall
3196 * be a subset of supported speeds on this port.
3198 /* 100Mb link speed (Half-duplex) */
3199 #define HWRM_PORT_PHY_QCFG_OUTPUT_AUTO_LINK_SPEED_MASK_100MBHD \
3201 /* 100Mb link speed (Full-duplex) */
3202 #define HWRM_PORT_PHY_QCFG_OUTPUT_AUTO_LINK_SPEED_MASK_100MB \
3204 /* 1Gb link speed (Half-duplex) */
3205 #define HWRM_PORT_PHY_QCFG_OUTPUT_AUTO_LINK_SPEED_MASK_1GBHD \
3207 /* 1Gb link speed (Full-duplex) */
3208 #define HWRM_PORT_PHY_QCFG_OUTPUT_AUTO_LINK_SPEED_MASK_1GB \
3210 /* 2Gb link speed */
3211 #define HWRM_PORT_PHY_QCFG_OUTPUT_AUTO_LINK_SPEED_MASK_2GB \
3213 /* 2.5Gb link speed */
3214 #define HWRM_PORT_PHY_QCFG_OUTPUT_AUTO_LINK_SPEED_MASK_2_5GB \
3216 /* 10Gb link speed */
3217 #define HWRM_PORT_PHY_QCFG_OUTPUT_AUTO_LINK_SPEED_MASK_10GB \
3219 /* 20Gb link speed */
3220 #define HWRM_PORT_PHY_QCFG_OUTPUT_AUTO_LINK_SPEED_MASK_20GB \
3222 /* 25Gb link speed */
3223 #define HWRM_PORT_PHY_QCFG_OUTPUT_AUTO_LINK_SPEED_MASK_25GB \
3225 /* 40Gb link speed */
3226 #define HWRM_PORT_PHY_QCFG_OUTPUT_AUTO_LINK_SPEED_MASK_40GB \
3228 /* 50Gb link speed */
3229 #define HWRM_PORT_PHY_QCFG_OUTPUT_AUTO_LINK_SPEED_MASK_50GB \
3231 /* 100Gb link speed */
3232 #define HWRM_PORT_PHY_QCFG_OUTPUT_AUTO_LINK_SPEED_MASK_100GB \
3234 /* 10Mb link speed (Half-duplex) */
3235 #define HWRM_PORT_PHY_QCFG_OUTPUT_AUTO_LINK_SPEED_MASK_10MBHD \
3237 /* 10Mb link speed (Full-duplex) */
3238 #define HWRM_PORT_PHY_QCFG_OUTPUT_AUTO_LINK_SPEED_MASK_10MB \
3240 uint16_t auto_link_speed_mask;
3242 /* Current setting for wirespeed. */
3243 /* Wirespeed feature is disabled. */
3244 #define HWRM_PORT_PHY_QCFG_OUTPUT_WIRESPEED_OFF (UINT32_C(0x0) << 0)
3245 /* Wirespeed feature is enabled. */
3246 #define HWRM_PORT_PHY_QCFG_OUTPUT_WIRESPEED_ON (UINT32_C(0x1) << 0)
3249 /* Current setting for loopback. */
3250 /* No loopback is selected. Normal operation. */
3251 #define HWRM_PORT_PHY_QCFG_OUTPUT_LPBK_NONE (UINT32_C(0x0) << 0)
3253 * The HW will be configured with local loopback such that host
3254 * data is sent back to the host without modification.
3256 #define HWRM_PORT_PHY_QCFG_OUTPUT_LPBK_LOCAL (UINT32_C(0x1) << 0)
3258 * The HW will be configured with remote loopback such that port
3259 * logic will send packets back out the transmitter that are
3262 #define HWRM_PORT_PHY_QCFG_OUTPUT_LPBK_REMOTE (UINT32_C(0x2) << 0)
3266 * Current setting of forced pause. When the pause configuration is not
3267 * being forced, then this value shall be set to 0.
3270 * When this bit is '1', Generation of tx pause messages is supported.
3271 * Disabled otherwise.
3273 #define HWRM_PORT_PHY_QCFG_OUTPUT_FORCE_PAUSE_TX \
3276 * When this bit is '1', Reception of rx pause messages is supported.
3277 * Disabled otherwise.
3279 #define HWRM_PORT_PHY_QCFG_OUTPUT_FORCE_PAUSE_RX \
3281 uint8_t force_pause;
3284 * This value indicates the current status of the optics module on this
3287 /* Module is inserted and accepted */
3288 #define HWRM_PORT_PHY_QCFG_OUTPUT_MODULE_STATUS_NONE \
3289 (UINT32_C(0x0) << 0)
3290 /* Module is rejected and transmit side Laser is disabled. */
3291 #define HWRM_PORT_PHY_QCFG_OUTPUT_MODULE_STATUS_DISABLETX \
3292 (UINT32_C(0x1) << 0)
3293 /* Module mismatch warning. */
3294 #define HWRM_PORT_PHY_QCFG_OUTPUT_MODULE_STATUS_WARNINGMSG \
3295 (UINT32_C(0x2) << 0)
3296 /* Module is rejected and powered down. */
3297 #define HWRM_PORT_PHY_QCFG_OUTPUT_MODULE_STATUS_PWRDOWN \
3298 (UINT32_C(0x3) << 0)
3299 /* Module is not inserted. */
3300 #define HWRM_PORT_PHY_QCFG_OUTPUT_MODULE_STATUS_NOTINSERTED \
3301 (UINT32_C(0x4) << 0)
3302 /* Module status is not applicable. */
3303 #define HWRM_PORT_PHY_QCFG_OUTPUT_MODULE_STATUS_NOTAPPLICABLE \
3304 (UINT32_C(0xff) << 0)
3305 uint8_t module_status;
3307 /* Current setting for preemphasis. */
3308 uint32_t preemphasis;
3310 /* This field represents the major version of the PHY. */
3313 /* This field represents the minor version of the PHY. */
3316 /* This field represents the build version of the PHY. */
3319 /* This value represents a PHY type. */
3321 #define HWRM_PORT_PHY_QCFG_OUTPUT_PHY_TYPE_UNKNOWN \
3322 (UINT32_C(0x0) << 0)
3324 #define HWRM_PORT_PHY_QCFG_OUTPUT_PHY_TYPE_BASECR \
3325 (UINT32_C(0x1) << 0)
3326 /* BASE-KR4 (Deprecated) */
3327 #define HWRM_PORT_PHY_QCFG_OUTPUT_PHY_TYPE_BASEKR4 \
3328 (UINT32_C(0x2) << 0)
3330 #define HWRM_PORT_PHY_QCFG_OUTPUT_PHY_TYPE_BASELR \
3331 (UINT32_C(0x3) << 0)
3333 #define HWRM_PORT_PHY_QCFG_OUTPUT_PHY_TYPE_BASESR \
3334 (UINT32_C(0x4) << 0)
3335 /* BASE-KR2 (Deprecated) */
3336 #define HWRM_PORT_PHY_QCFG_OUTPUT_PHY_TYPE_BASEKR2 \
3337 (UINT32_C(0x5) << 0)
3339 #define HWRM_PORT_PHY_QCFG_OUTPUT_PHY_TYPE_BASEKX \
3340 (UINT32_C(0x6) << 0)
3342 #define HWRM_PORT_PHY_QCFG_OUTPUT_PHY_TYPE_BASEKR \
3343 (UINT32_C(0x7) << 0)
3345 #define HWRM_PORT_PHY_QCFG_OUTPUT_PHY_TYPE_BASET \
3346 (UINT32_C(0x8) << 0)
3347 /* EEE capable BASE-T */
3348 #define HWRM_PORT_PHY_QCFG_OUTPUT_PHY_TYPE_BASETE \
3349 (UINT32_C(0x9) << 0)
3350 /* SGMII connected external PHY */
3351 #define HWRM_PORT_PHY_QCFG_OUTPUT_PHY_TYPE_SGMIIEXTPHY \
3352 (UINT32_C(0xa) << 0)
3355 /* This value represents a media type. */
3357 #define HWRM_PORT_PHY_QCFG_OUTPUT_MEDIA_TYPE_UNKNOWN \
3358 (UINT32_C(0x0) << 0)
3360 #define HWRM_PORT_PHY_QCFG_OUTPUT_MEDIA_TYPE_TP (UINT32_C(0x1) << 0)
3361 /* Direct Attached Copper */
3362 #define HWRM_PORT_PHY_QCFG_OUTPUT_MEDIA_TYPE_DAC \
3363 (UINT32_C(0x2) << 0)
3365 #define HWRM_PORT_PHY_QCFG_OUTPUT_MEDIA_TYPE_FIBRE \
3366 (UINT32_C(0x3) << 0)
3369 /* This value represents a transceiver type. */
3370 /* PHY and MAC are in the same package */
3371 #define HWRM_PORT_PHY_QCFG_OUTPUT_XCVR_PKG_TYPE_XCVR_INTERNAL \
3372 (UINT32_C(0x1) << 0)
3373 /* PHY and MAC are in different packages */
3374 #define HWRM_PORT_PHY_QCFG_OUTPUT_XCVR_PKG_TYPE_XCVR_EXTERNAL \
3375 (UINT32_C(0x2) << 0)
3376 uint8_t xcvr_pkg_type;
3379 * This field represents flags related to EEE configuration. These EEE
3380 * configuration flags are valid only when the auto_mode is not set to
3381 * none (in other words autonegotiation is enabled).
3383 /* This field represents PHY address. */
3384 #define HWRM_PORT_PHY_QCFG_OUTPUT_PHY_ADDR_MASK UINT32_C(0x1f)
3385 #define HWRM_PORT_PHY_QCFG_OUTPUT_PHY_ADDR_SFT 0
3387 * When set to 1, Energy Efficient Ethernet (EEE) mode is enabled.
3388 * Speeds for autoneg with EEE mode enabled are based on
3389 * eee_link_speed_mask.
3391 #define HWRM_PORT_PHY_QCFG_OUTPUT_EEE_CONFIG_EEE_ENABLED \
3394 * This flag is valid only when eee_enabled is set to 1. # If
3395 * eee_enabled is set to 0, then EEE mode is disabled and this flag
3396 * shall be ignored. # If eee_enabled is set to 1 and this flag is set
3397 * to 1, then Energy Efficient Ethernet (EEE) mode is enabled and in
3398 * use. # If eee_enabled is set to 1 and this flag is set to 0, then
3399 * Energy Efficient Ethernet (EEE) mode is enabled but is currently not
3402 #define HWRM_PORT_PHY_QCFG_OUTPUT_EEE_CONFIG_EEE_ACTIVE \
3405 * This flag is valid only when eee_enabled is set to 1. # If
3406 * eee_enabled is set to 0, then EEE mode is disabled and this flag
3407 * shall be ignored. # If eee_enabled is set to 1 and this flag is set
3408 * to 1, then Energy Efficient Ethernet (EEE) mode is enabled and TX LPI
3409 * is enabled. # If eee_enabled is set to 1 and this flag is set to 0,
3410 * then Energy Efficient Ethernet (EEE) mode is enabled but TX LPI is
3413 #define HWRM_PORT_PHY_QCFG_OUTPUT_EEE_CONFIG_EEE_TX_LPI \
3416 * This field represents flags related to EEE configuration. These EEE
3417 * configuration flags are valid only when the auto_mode is not set to
3418 * none (in other words autonegotiation is enabled).
3420 #define HWRM_PORT_PHY_QCFG_OUTPUT_EEE_CONFIG_MASK \
3422 #define HWRM_PORT_PHY_QCFG_OUTPUT_EEE_CONFIG_SFT 5
3423 uint8_t eee_config_phy_addr;
3425 /* Reserved field, set to 0 */
3427 * When set to 1, the parallel detection is used to determine the speed
3428 * of the link partner. Parallel detection is used when a
3429 * autonegotiation capable device is connected to a link parter that is
3430 * not capable of autonegotiation.
3432 #define HWRM_PORT_PHY_QCFG_OUTPUT_PARALLEL_DETECT \
3434 /* Reserved field, set to 0 */
3435 #define HWRM_PORT_PHY_QCFG_OUTPUT_RESERVED_MASK UINT32_C(0xfe)
3436 #define HWRM_PORT_PHY_QCFG_OUTPUT_RESERVED_SFT 1
3437 uint8_t parallel_detect;
3440 * The advertised speeds for the port by the link partner. Each
3441 * advertised speed will be set to '1'.
3443 /* 100Mb link speed (Half-duplex) */
3444 #define HWRM_PORT_PHY_QCFG_OUTPUT_LINK_PARTNER_ADV_SPEEDS_100MBHD \
3446 /* 100Mb link speed (Full-duplex) */
3447 #define HWRM_PORT_PHY_QCFG_OUTPUT_LINK_PARTNER_ADV_SPEEDS_100MB \
3449 /* 1Gb link speed (Half-duplex) */
3450 #define HWRM_PORT_PHY_QCFG_OUTPUT_LINK_PARTNER_ADV_SPEEDS_1GBHD \
3452 /* 1Gb link speed (Full-duplex) */
3453 #define HWRM_PORT_PHY_QCFG_OUTPUT_LINK_PARTNER_ADV_SPEEDS_1GB \
3455 /* 2Gb link speed */
3456 #define HWRM_PORT_PHY_QCFG_OUTPUT_LINK_PARTNER_ADV_SPEEDS_2GB \
3458 /* 2.5Gb link speed */
3459 #define HWRM_PORT_PHY_QCFG_OUTPUT_LINK_PARTNER_ADV_SPEEDS_2_5GB \
3461 /* 10Gb link speed */
3462 #define HWRM_PORT_PHY_QCFG_OUTPUT_LINK_PARTNER_ADV_SPEEDS_10GB \
3464 /* 20Gb link speed */
3465 #define HWRM_PORT_PHY_QCFG_OUTPUT_LINK_PARTNER_ADV_SPEEDS_20GB \
3467 /* 25Gb link speed */
3468 #define HWRM_PORT_PHY_QCFG_OUTPUT_LINK_PARTNER_ADV_SPEEDS_25GB \
3470 /* 40Gb link speed */
3471 #define HWRM_PORT_PHY_QCFG_OUTPUT_LINK_PARTNER_ADV_SPEEDS_40GB \
3473 /* 50Gb link speed */
3474 #define HWRM_PORT_PHY_QCFG_OUTPUT_LINK_PARTNER_ADV_SPEEDS_50GB \
3476 /* 100Gb link speed */
3477 #define HWRM_PORT_PHY_QCFG_OUTPUT_LINK_PARTNER_ADV_SPEEDS_100GB \
3479 /* 10Mb link speed (Half-duplex) */
3480 #define HWRM_PORT_PHY_QCFG_OUTPUT_LINK_PARTNER_ADV_SPEEDS_10MBHD \
3482 /* 10Mb link speed (Full-duplex) */
3483 #define HWRM_PORT_PHY_QCFG_OUTPUT_LINK_PARTNER_ADV_SPEEDS_10MB \
3485 uint16_t link_partner_adv_speeds;
3488 * The advertised autoneg for the port by the link partner. This field
3489 * is deprecated and should be set to 0.
3492 * Disable autoneg or autoneg disabled. No speeds are selected.
3494 #define HWRM_PORT_PHY_QCFG_OUTPUT_LINK_PARTNER_ADV_AUTO_MODE_NONE \
3495 (UINT32_C(0x0) << 0)
3496 /* Select all possible speeds for autoneg mode. */
3497 #define HWRM_PORT_PHY_QCFG_OUTPUT_LINK_PARTNER_ADV_AUTO_MODE_ALL_SPEEDS\
3498 (UINT32_C(0x1) << 0)
3500 * Select only the auto_link_speed speed for autoneg mode. This
3501 * mode has been DEPRECATED. An HWRM client should not use this
3504 #define HWRM_PORT_PHY_QCFG_OUTPUT_LINK_PARTNER_ADV_AUTO_MODE_ONE_SPEED \
3505 (UINT32_C(0x2) << 0)
3507 * Select the auto_link_speed or any speed below that speed for
3508 * autoneg. This mode has been DEPRECATED. An HWRM client should
3509 * not use this mode.
3512 HWRM_PORT_PHY_QCFG_OUTPUT_LINK_PARTNER_ADV_AUTO_MODE_ONE_OR_BELOW \
3513 (UINT32_C(0x3) << 0)
3515 * Select the speeds based on the corresponding link speed mask
3516 * value that is provided.
3518 #define HWRM_PORT_PHY_QCFG_OUTPUT_LINK_PARTNER_ADV_AUTO_MODE_SPEED_MASK\
3519 (UINT32_C(0x4) << 0)
3520 uint8_t link_partner_adv_auto_mode;
3522 /* The advertised pause settings on the port by the link partner. */
3524 * When this bit is '1', Generation of tx pause messages is supported.
3525 * Disabled otherwise.
3527 #define HWRM_PORT_PHY_QCFG_OUTPUT_LINK_PARTNER_ADV_PAUSE_TX \
3530 * When this bit is '1', Reception of rx pause messages is supported.
3531 * Disabled otherwise.
3533 #define HWRM_PORT_PHY_QCFG_OUTPUT_LINK_PARTNER_ADV_PAUSE_RX \
3535 uint8_t link_partner_adv_pause;
3538 * Current setting for link speed mask that is used to advertise speeds
3539 * during autonegotiation when EEE is enabled. This field is valid only
3540 * when eee_enabled flags is set to 1. The speeds specified in this
3541 * field shall be a subset of speeds specified in auto_link_speed_mask.
3544 #define HWRM_PORT_PHY_QCFG_OUTPUT_ADV_EEE_LINK_SPEED_MASK_RSVD1 \
3546 /* 100Mb link speed (Full-duplex) */
3547 #define HWRM_PORT_PHY_QCFG_OUTPUT_ADV_EEE_LINK_SPEED_MASK_100MB \
3550 #define HWRM_PORT_PHY_QCFG_OUTPUT_ADV_EEE_LINK_SPEED_MASK_RSVD2 \
3552 /* 1Gb link speed (Full-duplex) */
3553 #define HWRM_PORT_PHY_QCFG_OUTPUT_ADV_EEE_LINK_SPEED_MASK_1GB \
3556 #define HWRM_PORT_PHY_QCFG_OUTPUT_ADV_EEE_LINK_SPEED_MASK_RSVD3 \
3559 #define HWRM_PORT_PHY_QCFG_OUTPUT_ADV_EEE_LINK_SPEED_MASK_RSVD4 \
3561 /* 10Gb link speed */
3562 #define HWRM_PORT_PHY_QCFG_OUTPUT_ADV_EEE_LINK_SPEED_MASK_10GB \
3564 uint16_t adv_eee_link_speed_mask;
3567 * Current setting for link speed mask that is advertised by the link
3568 * partner when EEE is enabled. This field is valid only when
3569 * eee_enabled flags is set to 1.
3573 HWRM_PORT_PHY_QCFG_OUTPUT_LINK_PARTNER_ADV_EEE_LINK_SPEED_MASK_RSVD1 \
3575 /* 100Mb link speed (Full-duplex) */
3577 HWRM_PORT_PHY_QCFG_OUTPUT_LINK_PARTNER_ADV_EEE_LINK_SPEED_MASK_100MB \
3581 HWRM_PORT_PHY_QCFG_OUTPUT_LINK_PARTNER_ADV_EEE_LINK_SPEED_MASK_RSVD2 \
3583 /* 1Gb link speed (Full-duplex) */
3585 HWRM_PORT_PHY_QCFG_OUTPUT_LINK_PARTNER_ADV_EEE_LINK_SPEED_MASK_1GB \
3589 HWRM_PORT_PHY_QCFG_OUTPUT_LINK_PARTNER_ADV_EEE_LINK_SPEED_MASK_RSVD3 \
3593 HWRM_PORT_PHY_QCFG_OUTPUT_LINK_PARTNER_ADV_EEE_LINK_SPEED_MASK_RSVD4 \
3595 /* 10Gb link speed */
3597 HWRM_PORT_PHY_QCFG_OUTPUT_LINK_PARTNER_ADV_EEE_LINK_SPEED_MASK_10GB \
3599 uint16_t link_partner_adv_eee_link_speed_mask;
3601 /* This value represents transceiver identifier type. */
3603 * Current setting of TX LPI timer in microseconds. This field is valid
3604 * only when_eee_enabled flag is set to 1 and tx_lpi_enabled is set to
3607 #define HWRM_PORT_PHY_QCFG_OUTPUT_TX_LPI_TIMER_MASK \
3609 #define HWRM_PORT_PHY_QCFG_OUTPUT_TX_LPI_TIMER_SFT 0
3610 /* This value represents transceiver identifier type. */
3611 #define HWRM_PORT_PHY_QCFG_OUTPUT_XCVR_IDENTIFIER_TYPE_MASK \
3612 UINT32_C(0xff000000)
3613 #define HWRM_PORT_PHY_QCFG_OUTPUT_XCVR_IDENTIFIER_TYPE_SFT \
3616 #define HWRM_PORT_PHY_QCFG_OUTPUT_XCVR_IDENTIFIER_TYPE_UNKNOWN \
3617 (UINT32_C(0x0) << 24)
3618 /* SFP/SFP+/SFP28 */
3619 #define HWRM_PORT_PHY_QCFG_OUTPUT_XCVR_IDENTIFIER_TYPE_SFP \
3620 (UINT32_C(0x3) << 24)
3622 #define HWRM_PORT_PHY_QCFG_OUTPUT_XCVR_IDENTIFIER_TYPE_QSFP \
3623 (UINT32_C(0xc) << 24)
3625 #define HWRM_PORT_PHY_QCFG_OUTPUT_XCVR_IDENTIFIER_TYPE_QSFPPLUS \
3626 (UINT32_C(0xd) << 24)
3628 #define HWRM_PORT_PHY_QCFG_OUTPUT_XCVR_IDENTIFIER_TYPE_QSFP28 \
3629 (UINT32_C(0x11) << 24)
3630 uint32_t xcvr_identifier_type_tx_lpi_timer;
3635 * Up to 16 bytes of null padded ASCII string representing PHY vendor.
3636 * If the string is set to null, then the vendor name is not available.
3638 char phy_vendor_name[16];
3641 * Up to 16 bytes of null padded ASCII string that identifies vendor
3642 * specific part number of the PHY. If the string is set to null, then
3643 * the vendor specific part number is not available.
3645 char phy_vendor_partnumber[16];
3653 * This field is used in Output records to indicate that the output is
3654 * completely written to RAM. This field should be read as '1' to
3655 * indicate that the output has been completely written. When writing a
3656 * command completion or response to an internal processor, the order of
3657 * writes has to be such that this field is written last.
3660 } __attribute__((packed));
3664 * Description: This function is called by a driver to determine the HWRM
3665 * interface version supported by the HWRM firmware, the version of HWRM
3666 * firmware implementation, the name of HWRM firmware, the versions of other
3667 * embedded firmwares, and the names of other embedded firmwares, etc. Any
3668 * interface or firmware version with major = 0, minor = 0, and update = 0 shall
3669 * be considered an invalid version.
3672 /* Input (24 bytes) */
3673 struct hwrm_ver_get_input {
3675 * This value indicates what type of request this is. The format for the
3676 * rest of the command is determined by this field.
3681 * This value indicates the what completion ring the request will be
3682 * optionally completed on. If the value is -1, then no CR completion
3683 * will be generated. Any other value must be a valid CR ring_id value
3684 * for this function.
3688 /* This value indicates the command sequence number. */
3692 * Target ID of this command. 0x0 - 0xFFF8 - Used for function ids
3693 * 0xFFF8 - 0xFFFE - Reserved for internal processors 0xFFFF - HWRM
3698 * This is the host address where the response will be written when the
3699 * request is complete. This area must be 16B aligned and must be
3700 * cleared to zero before the request is made.
3705 * This field represents the major version of HWRM interface
3706 * specification supported by the driver HWRM implementation. The
3707 * interface major version is intended to change only when non backward
3708 * compatible changes are made to the HWRM interface specification.
3710 uint8_t hwrm_intf_maj;
3713 * This field represents the minor version of HWRM interface
3714 * specification supported by the driver HWRM implementation. A change
3715 * in interface minor version is used to reflect significant backward
3716 * compatible modification to HWRM interface specification. This can be
3717 * due to addition or removal of functionality. HWRM interface
3718 * specifications with the same major version but different minor
3719 * versions are compatible.
3721 uint8_t hwrm_intf_min;
3724 * This field represents the update version of HWRM interface
3725 * specification supported by the driver HWRM implementation. The
3726 * interface update version is used to reflect minor changes or bug
3727 * fixes to a released HWRM interface specification.
3729 uint8_t hwrm_intf_upd;
3731 uint8_t unused_0[5];
3732 } __attribute__((packed));
3734 /* Output (128 bytes) */
3735 struct hwrm_ver_get_output {
3737 * Pass/Fail or error type Note: receiver to verify the in parameters,
3738 * and fail the call with an error when appropriate
3740 uint16_t error_code;
3742 /* This field returns the type of original request. */
3745 /* This field provides original sequence number of the command. */
3749 * This field is the length of the response in bytes. The last byte of
3750 * the response is a valid flag that will read as '1' when the command
3751 * has been completely written to memory.
3756 * This field represents the major version of HWRM interface
3757 * specification supported by the HWRM implementation. The interface
3758 * major version is intended to change only when non backward compatible
3759 * changes are made to the HWRM interface specification. A HWRM
3760 * implementation that is compliant with this specification shall
3761 * provide value of 1 in this field.
3763 uint8_t hwrm_intf_maj;
3766 * This field represents the minor version of HWRM interface
3767 * specification supported by the HWRM implementation. A change in
3768 * interface minor version is used to reflect significant backward
3769 * compatible modification to HWRM interface specification. This can be
3770 * due to addition or removal of functionality. HWRM interface
3771 * specifications with the same major version but different minor
3772 * versions are compatible. A HWRM implementation that is compliant with
3773 * this specification shall provide value of 0 in this field.
3775 uint8_t hwrm_intf_min;
3778 * This field represents the update version of HWRM interface
3779 * specification supported by the HWRM implementation. The interface
3780 * update version is used to reflect minor changes or bug fixes to a
3781 * released HWRM interface specification. A HWRM implementation that is
3782 * compliant with this specification shall provide value of 1 in this
3785 uint8_t hwrm_intf_upd;
3787 uint8_t hwrm_intf_rsvd;
3790 * This field represents the major version of HWRM firmware. A change in
3791 * firmware major version represents a major firmware release.
3793 uint8_t hwrm_fw_maj;
3796 * This field represents the minor version of HWRM firmware. A change in
3797 * firmware minor version represents significant firmware functionality
3800 uint8_t hwrm_fw_min;
3803 * This field represents the build version of HWRM firmware. A change in
3804 * firmware build version represents bug fixes to a released firmware.
3806 uint8_t hwrm_fw_bld;
3809 * This field is a reserved field. This field can be used to represent
3810 * firmware branches or customer specific releases tied to a specific
3811 * (major,minor,update) version of the HWRM firmware.
3813 uint8_t hwrm_fw_rsvd;
3816 * This field represents the major version of mgmt firmware. A change in
3817 * major version represents a major release.
3819 uint8_t mgmt_fw_maj;
3822 * This field represents the minor version of mgmt firmware. A change in
3823 * minor version represents significant functionality changes.
3825 uint8_t mgmt_fw_min;
3828 * This field represents the build version of mgmt firmware. A change in
3829 * update version represents bug fixes.
3831 uint8_t mgmt_fw_bld;
3834 * This field is a reserved field. This field can be used to represent
3835 * firmware branches or customer specific releases tied to a specific
3836 * (major,minor,update) version
3838 uint8_t mgmt_fw_rsvd;
3841 * This field represents the major version of network control firmware.
3842 * A change in major version represents a major release.
3844 uint8_t netctrl_fw_maj;
3847 * This field represents the minor version of network control firmware.
3848 * A change in minor version represents significant functionality
3851 uint8_t netctrl_fw_min;
3854 * This field represents the build version of network control firmware.
3855 * A change in update version represents bug fixes.
3857 uint8_t netctrl_fw_bld;
3860 * This field is a reserved field. This field can be used to represent
3861 * firmware branches or customer specific releases tied to a specific
3862 * (major,minor,update) version
3864 uint8_t netctrl_fw_rsvd;
3867 * This field is reserved for future use. The responder should set it to
3868 * 0. The requester should ignore this field.
3873 * This field represents the major version of RoCE firmware. A change in
3874 * major version represents a major release.
3876 uint8_t roce_fw_maj;
3879 * This field represents the minor version of RoCE firmware. A change in
3880 * minor version represents significant functionality changes.
3882 uint8_t roce_fw_min;
3885 * This field represents the build version of RoCE firmware. A change in
3886 * update version represents bug fixes.
3888 uint8_t roce_fw_bld;
3891 * This field is a reserved field. This field can be used to represent
3892 * firmware branches or customer specific releases tied to a specific
3893 * (major,minor,update) version
3895 uint8_t roce_fw_rsvd;
3898 * This field represents the name of HWRM FW (ASCII chars without NULL
3901 char hwrm_fw_name[16];
3904 * This field represents the name of mgmt FW (ASCII chars without NULL
3907 char mgmt_fw_name[16];
3910 * This field represents the name of network control firmware (ASCII
3911 * chars without NULL at the end).
3913 char netctrl_fw_name[16];
3916 * This field is reserved for future use. The responder should set it to
3917 * 0. The requester should ignore this field.
3919 uint32_t reserved2[4];
3922 * This field represents the name of RoCE FW (ASCII chars without NULL
3925 char roce_fw_name[16];
3927 /* This field returns the chip number. */
3930 /* This field returns the revision of chip. */
3933 /* This field returns the chip metal number. */
3936 /* This field returns the bond id of the chip. */
3937 uint8_t chip_bond_id;
3940 * This value indicates the type of platform used for chip
3944 #define HWRM_VER_GET_OUTPUT_CHIP_PLATFORM_TYPE_ASIC \
3945 (UINT32_C(0x0) << 0)
3946 /* FPGA platform of the chip. */
3947 #define HWRM_VER_GET_OUTPUT_CHIP_PLATFORM_TYPE_FPGA \
3948 (UINT32_C(0x1) << 0)
3949 /* Palladium platform of the chip. */
3950 #define HWRM_VER_GET_OUTPUT_CHIP_PLATFORM_TYPE_PALLADIUM \
3951 (UINT32_C(0x2) << 0)
3952 uint8_t chip_platform_type;
3955 * This field returns the maximum value of request window that is
3956 * supported by the HWRM. The request window is mapped into device
3957 * address space using MMIO.
3959 uint16_t max_req_win_len;
3962 * This field returns the maximum value of response buffer in bytes. If
3963 * a request specifies the response buffer length that is greater than
3964 * this value, then the HWRM should fail it. The value of this field
3965 * shall be 4KB or more.
3967 uint16_t max_resp_len;
3970 * This field returns the default request timeout value in milliseconds.
3972 uint16_t def_req_timeout;
3979 * This field is used in Output records to indicate that the output is
3980 * completely written to RAM. This field should be read as '1' to
3981 * indicate that the output has been completely written. When writing a
3982 * command completion or response to an internal processor, the order of
3983 * writes has to be such that this field is written last.
3986 } __attribute__((packed));
3988 /* hwrm_queue_qportcfg */
3990 * Description: This function is called by a driver to query queue configuration
3991 * of a port. # The HWRM shall at least advertise one queue with lossy service
3992 * profile. # The driver shall use this command to query queue ids before
3993 * configuring or using any queues. # If a service profile is not set for a
3994 * queue, then the driver shall not use that queue without configuring a service
3995 * profile for it. # If the driver is not allowed to configure service profiles,
3996 * then the driver shall only use queues for which service profiles are pre-
4000 /* Input (24 bytes) */
4001 struct hwrm_queue_qportcfg_input {
4003 * This value indicates what type of request this is. The format for the
4004 * rest of the command is determined by this field.
4009 * This value indicates the what completion ring the request will be
4010 * optionally completed on. If the value is -1, then no CR completion
4011 * will be generated. Any other value must be a valid CR ring_id value
4012 * for this function.
4016 /* This value indicates the command sequence number. */
4020 * Target ID of this command. 0x0 - 0xFFF8 - Used for function ids
4021 * 0xFFF8 - 0xFFFE - Reserved for internal processors 0xFFFF - HWRM
4026 * This is the host address where the response will be written when the
4027 * request is complete. This area must be 16B aligned and must be
4028 * cleared to zero before the request is made.
4033 * Enumeration denoting the RX, TX type of the resource. This
4034 * enumeration is used for resources that are similar for both TX and RX
4035 * paths of the chip.
4037 #define HWRM_QUEUE_QPORTCFG_INPUT_FLAGS_PATH \
4040 #define HWRM_QUEUE_QPORTCFG_INPUT_FLAGS_PATH_TX \
4041 (UINT32_C(0x0) << 0)
4043 #define HWRM_QUEUE_QPORTCFG_INPUT_FLAGS_PATH_RX \
4044 (UINT32_C(0x1) << 0)
4045 #define HWRM_QUEUE_QPORTCFG_INPUT_FLAGS_PATH_LAST \
4046 HWRM_QUEUE_QPORTCFG_INPUT_FLAGS_PATH_RX
4050 * Port ID of port for which the queue configuration is being queried.
4051 * This field is only required when sent by IPC.
4056 } __attribute__((packed));
4058 /* hwrm_ring_alloc */
4060 * Description: This command allocates and does basic preparation for a ring.
4063 /* Input (80 bytes) */
4064 struct hwrm_ring_alloc_input {
4066 * This value indicates what type of request this is. The format for the
4067 * rest of the command is determined by this field.
4072 * This value indicates the what completion ring the request will be
4073 * optionally completed on. If the value is -1, then no CR completion
4074 * will be generated. Any other value must be a valid CR ring_id value
4075 * for this function.
4079 /* This value indicates the command sequence number. */
4083 * Target ID of this command. 0x0 - 0xFFF8 - Used for function ids
4084 * 0xFFF8 - 0xFFFE - Reserved for internal processors 0xFFFF - HWRM
4089 * This is the host address where the response will be written when the
4090 * request is complete. This area must be 16B aligned and must be
4091 * cleared to zero before the request is made.
4095 /* This bit must be '1' for the Reserved1 field to be configured. */
4096 #define HWRM_RING_ALLOC_INPUT_ENABLES_RESERVED1 UINT32_C(0x1)
4097 /* This bit must be '1' for the Reserved2 field to be configured. */
4098 #define HWRM_RING_ALLOC_INPUT_ENABLES_RESERVED2 UINT32_C(0x2)
4099 /* This bit must be '1' for the Reserved3 field to be configured. */
4100 #define HWRM_RING_ALLOC_INPUT_ENABLES_RESERVED3 UINT32_C(0x4)
4102 * This bit must be '1' for the stat_ctx_id_valid field to be
4105 #define HWRM_RING_ALLOC_INPUT_ENABLES_STAT_CTX_ID_VALID UINT32_C(0x8)
4106 /* This bit must be '1' for the Reserved4 field to be configured. */
4107 #define HWRM_RING_ALLOC_INPUT_ENABLES_RESERVED4 UINT32_C(0x10)
4108 /* This bit must be '1' for the max_bw_valid field to be configured. */
4109 #define HWRM_RING_ALLOC_INPUT_ENABLES_MAX_BW_VALID UINT32_C(0x20)
4113 /* Completion Ring (CR) */
4114 #define HWRM_RING_ALLOC_INPUT_RING_TYPE_CMPL (UINT32_C(0x0) << 0)
4116 #define HWRM_RING_ALLOC_INPUT_RING_TYPE_TX (UINT32_C(0x1) << 0)
4118 #define HWRM_RING_ALLOC_INPUT_RING_TYPE_RX (UINT32_C(0x2) << 0)
4124 /* This value is a pointer to the page table for the Ring. */
4125 uint64_t page_tbl_addr;
4127 /* First Byte Offset of the first entry in the first page. */
4131 * Actual page size in 2^page_size. The supported range is increments in
4132 * powers of 2 from 16 bytes to 1GB. - 4 = 16 B Page size is 16 B. - 12
4133 * = 4 KB Page size is 4 KB. - 13 = 8 KB Page size is 8 KB. - 16 = 64 KB
4134 * Page size is 64 KB. - 22 = 2 MB Page size is 2 MB. - 23 = 4 MB Page
4135 * size is 4 MB. - 31 = 1 GB Page size is 1 GB.
4140 * This value indicates the depth of page table. For this version of the
4141 * specification, value other than 0 or 1 shall be considered as an
4142 * invalid value. When the page_tbl_depth = 0, then it is treated as a
4143 * special case with the following. 1. FBO and page size fields are not
4144 * valid. 2. page_tbl_addr is the physical address of the first element
4147 uint8_t page_tbl_depth;
4153 * Number of 16B units in the ring. Minimum size for a ring is 16 16B
4159 * Logical ring number for the ring to be allocated. This value
4160 * determines the position in the doorbell area where the update to the
4161 * ring will be made. For completion rings, this value is also the MSI-X
4162 * vector number for the function the completion ring is associated
4165 uint16_t logical_id;
4168 * This field is used only when ring_type is a TX ring. This value
4169 * indicates what completion ring the TX ring is associated with.
4171 uint16_t cmpl_ring_id;
4174 * This field is used only when ring_type is a TX ring. This value
4175 * indicates what CoS queue the TX ring is associated with.
4182 /* This field is reserved for the future use. It shall be set to 0. */
4184 /* This field is reserved for the future use. It shall be set to 0. */
4189 /* This field is reserved for the future use. It shall be set to 0. */
4193 * This field is used only when ring_type is a TX ring. This input
4194 * indicates what statistics context this ring should be associated
4197 uint32_t stat_ctx_id;
4199 /* This field is reserved for the future use. It shall be set to 0. */
4203 * This field is used only when ring_type is a TX ring. Maximum BW
4204 * allocated to this TX ring in Mbps. The HWRM will translate this value
4205 * into byte counter and time interval used for this ring inside the
4211 * This field is used only when ring_type is a Completion ring. This
4212 * value indicates what interrupt mode should be used on this completion
4213 * ring. Note: In the legacy interrupt mode, no more than 16 completion
4214 * rings are allowed.
4217 #define HWRM_RING_ALLOC_INPUT_INT_MODE_LEGACY (UINT32_C(0x0) << 0)
4219 #define HWRM_RING_ALLOC_INPUT_INT_MODE_RSVD (UINT32_C(0x1) << 0)
4221 #define HWRM_RING_ALLOC_INPUT_INT_MODE_MSIX (UINT32_C(0x2) << 0)
4222 /* No Interrupt - Polled mode */
4223 #define HWRM_RING_ALLOC_INPUT_INT_MODE_POLL (UINT32_C(0x3) << 0)
4226 uint8_t unused_8[3];
4227 } __attribute__((packed));
4229 /* Output (16 bytes) */
4231 struct hwrm_ring_alloc_output {
4233 * Pass/Fail or error type Note: receiver to verify the in parameters,
4234 * and fail the call with an error when appropriate
4236 uint16_t error_code;
4238 /* This field returns the type of original request. */
4241 /* This field provides original sequence number of the command. */
4245 * This field is the length of the response in bytes. The last byte of
4246 * the response is a valid flag that will read as '1' when the command
4247 * has been completely written to memory.
4251 /* Physical number of ring allocated. */
4254 /* Logical number of ring allocated. */
4255 uint16_t logical_ring_id;
4262 * This field is used in Output records to indicate that the output is
4263 * completely written to RAM. This field should be read as '1' to
4264 * indicate that the output has been completely written. When writing a
4265 * command completion or response to an internal processor, the order of
4266 * writes has to be such that this field is written last.
4269 } __attribute__((packed));
4271 /* hwrm_ring_free */
4273 * Description: This command is used to free a ring and associated resources.
4275 /* Input (24 bytes) */
4277 struct hwrm_ring_free_input {
4279 * This value indicates what type of request this is. The format for the
4280 * rest of the command is determined by this field.
4285 * This value indicates the what completion ring the request will be
4286 * optionally completed on. If the value is -1, then no CR completion
4287 * will be generated. Any other value must be a valid CR ring_id value
4288 * for this function.
4292 /* This value indicates the command sequence number. */
4296 * Target ID of this command. 0x0 - 0xFFF8 - Used for function ids
4297 * 0xFFF8 - 0xFFFE - Reserved for internal processors 0xFFFF - HWRM
4302 * This is the host address where the response will be written when the
4303 * request is complete. This area must be 16B aligned and must be
4304 * cleared to zero before the request is made.
4309 /* Completion Ring (CR) */
4310 #define HWRM_RING_FREE_INPUT_RING_TYPE_CMPL (UINT32_C(0x0) << 0)
4312 #define HWRM_RING_FREE_INPUT_RING_TYPE_TX (UINT32_C(0x1) << 0)
4314 #define HWRM_RING_FREE_INPUT_RING_TYPE_RX (UINT32_C(0x2) << 0)
4319 /* Physical number of ring allocated. */
4323 } __attribute__((packed));
4325 /* Output (16 bytes) */
4326 struct hwrm_ring_free_output {
4328 * Pass/Fail or error type Note: receiver to verify the in parameters,
4329 * and fail the call with an error when appropriate
4331 uint16_t error_code;
4333 /* This field returns the type of original request. */
4336 /* This field provides original sequence number of the command. */
4340 * This field is the length of the response in bytes. The last byte of
4341 * the response is a valid flag that will read as '1' when the command
4342 * has been completely written to memory.
4352 * This field is used in Output records to indicate that the output is
4353 * completely written to RAM. This field should be read as '1' to
4354 * indicate that the output has been completely written. When writing a
4355 * command completion or response to an internal processor, the order of
4356 * writes has to be such that this field is written last.
4359 } __attribute__((packed));
4361 /* hwrm_ring_grp_alloc */
4363 * Description: This API allocates and does basic preparation for a ring group.
4366 /* Input (24 bytes) */
4367 struct hwrm_ring_grp_alloc_input {
4369 * This value indicates what type of request this is. The format for the
4370 * rest of the command is determined by this field.
4375 * This value indicates the what completion ring the request will be
4376 * optionally completed on. If the value is -1, then no CR completion
4377 * will be generated. Any other value must be a valid CR ring_id value
4378 * for this function.
4382 /* This value indicates the command sequence number. */
4386 * Target ID of this command. 0x0 - 0xFFF8 - Used for function ids
4387 * 0xFFF8 - 0xFFFE - Reserved for internal processors 0xFFFF - HWRM
4392 * This is the host address where the response will be written when the
4393 * request is complete. This area must be 16B aligned and must be
4394 * cleared to zero before the request is made.
4398 /* This value identifies the CR associated with the ring group. */
4401 /* This value identifies the main RR associated with the ring group. */
4405 * This value identifies the aggregation RR associated with the ring
4406 * group. If this value is 0xFF... (All Fs), then no Aggregation ring
4412 * This value identifies the statistics context associated with the ring
4416 } __attribute__((packed));
4418 /* Output (16 bytes) */
4419 struct hwrm_ring_grp_alloc_output {
4421 * Pass/Fail or error type Note: receiver to verify the in parameters,
4422 * and fail the call with an error when appropriate
4424 uint16_t error_code;
4426 /* This field returns the type of original request. */
4429 /* This field provides original sequence number of the command. */
4433 * This field is the length of the response in bytes. The last byte of
4434 * the response is a valid flag that will read as '1' when the command
4435 * has been completely written to memory.
4440 * This is the ring group ID value. Use this value to program the
4441 * default ring group for the VNIC or as table entries in an RSS/COS
4444 uint32_t ring_group_id;
4451 * This field is used in Output records to indicate that the output is
4452 * completely written to RAM. This field should be read as '1' to
4453 * indicate that the output has been completely written. When writing a
4454 * command completion or response to an internal processor, the order of
4455 * writes has to be such that this field is written last.
4458 } __attribute__((packed));
4460 /* hwrm_ring_grp_free */
4462 * Description: This API frees a ring group and associated resources. # If a
4463 * ring in the ring group is reset or free, then the associated rings in the
4464 * ring group shall also be reset/free using hwrm_ring_free. # A function driver
4465 * shall always use hwrm_ring_grp_free after freeing all rings in a group. # As
4466 * a part of executing this command, the HWRM shall reset all associated ring
4470 /* Input (24 bytes) */
4471 struct hwrm_ring_grp_free_input {
4473 * This value indicates what type of request this is. The format for the
4474 * rest of the command is determined by this field.
4479 * This value indicates the what completion ring the request will be
4480 * optionally completed on. If the value is -1, then no CR completion
4481 * will be generated. Any other value must be a valid CR ring_id value
4482 * for this function.
4486 /* This value indicates the command sequence number. */
4490 * Target ID of this command. 0x0 - 0xFFF8 - Used for function ids
4491 * 0xFFF8 - 0xFFFE - Reserved for internal processors 0xFFFF - HWRM
4496 * This is the host address where the response will be written when the
4497 * request is complete. This area must be 16B aligned and must be
4498 * cleared to zero before the request is made.
4502 /* This is the ring group ID value. */
4503 uint32_t ring_group_id;
4506 } __attribute__((packed));
4508 /* Output (16 bytes) */
4509 struct hwrm_ring_grp_free_output {
4511 * Pass/Fail or error type Note: receiver to verify the in parameters,
4512 * and fail the call with an error when appropriate
4514 uint16_t error_code;
4516 /* This field returns the type of original request. */
4519 /* This field provides original sequence number of the command. */
4523 * This field is the length of the response in bytes. The last byte of
4524 * the response is a valid flag that will read as '1' when the command
4525 * has been completely written to memory.
4535 * This field is used in Output records to indicate that the output is
4536 * completely written to RAM. This field should be read as '1' to
4537 * indicate that the output has been completely written. When writing a
4538 * command completion or response to an internal processor, the order of
4539 * writes has to be such that this field is written last.
4542 } __attribute__((packed));
4544 /* hwrm_stat_ctx_alloc */
4546 * Description: This command allocates and does basic preparation for a stat
4550 /* Input (32 bytes) */
4551 struct hwrm_stat_ctx_alloc_input {
4553 * This value indicates what type of request this is. The format for the
4554 * rest of the command is determined by this field.
4559 * This value indicates the what completion ring the request will be
4560 * optionally completed on. If the value is -1, then no CR completion
4561 * will be generated. Any other value must be a valid CR ring_id value
4562 * for this function.
4566 /* This value indicates the command sequence number. */
4570 * Target ID of this command. 0x0 - 0xFFF8 - Used for function ids
4571 * 0xFFF8 - 0xFFFE - Reserved for internal processors 0xFFFF - HWRM
4576 * This is the host address where the response will be written when the
4577 * request is complete. This area must be 16B aligned and must be
4578 * cleared to zero before the request is made.
4582 /* This is the address for statistic block. */
4583 uint64_t stats_dma_addr;
4586 * The statistic block update period in ms. e.g. 250ms, 500ms, 750ms,
4589 uint32_t update_period_ms;
4592 } __attribute__((packed));
4594 /* Output (16 bytes) */
4595 struct hwrm_stat_ctx_alloc_output {
4597 * Pass/Fail or error type Note: receiver to verify the in parameters,
4598 * and fail the call with an error when appropriate
4600 uint16_t error_code;
4602 /* This field returns the type of original request. */
4605 /* This field provides original sequence number of the command. */
4609 * This field is the length of the response in bytes. The last byte of
4610 * the response is a valid flag that will read as '1' when the command
4611 * has been completely written to memory.
4615 /* This is the statistics context ID value. */
4616 uint32_t stat_ctx_id;
4623 * This field is used in Output records to indicate that the output is
4624 * completely written to RAM. This field should be read as '1' to
4625 * indicate that the output has been completely written. When writing a
4626 * command completion or response to an internal processor, the order of
4627 * writes has to be such that this field is written last.
4630 } __attribute__((packed));
4632 /* hwrm_stat_ctx_clr_stats */
4633 /* Description: This command clears statistics of a context. */
4635 /* Input (24 bytes) */
4636 struct hwrm_stat_ctx_clr_stats_input {
4638 * This value indicates what type of request this is. The format for the
4639 * rest of the command is determined by this field.
4644 * This value indicates the what completion ring the request will be
4645 * optionally completed on. If the value is -1, then no CR completion
4646 * will be generated. Any other value must be a valid CR ring_id value
4647 * for this function.
4651 /* This value indicates the command sequence number. */
4655 * Target ID of this command. 0x0 - 0xFFF8 - Used for function ids
4656 * 0xFFF8 - 0xFFFE - Reserved for internal processors 0xFFFF - HWRM
4661 * This is the host address where the response will be written when the
4662 * request is complete. This area must be 16B aligned and must be
4663 * cleared to zero before the request is made.
4667 /* ID of the statistics context that is being queried. */
4668 uint32_t stat_ctx_id;
4671 } __attribute__((packed));
4673 /* Output (16 bytes) */
4674 struct hwrm_stat_ctx_clr_stats_output {
4676 * Pass/Fail or error type Note: receiver to verify the in parameters,
4677 * and fail the call with an error when appropriate
4679 uint16_t error_code;
4681 /* This field returns the type of original request. */
4684 /* This field provides original sequence number of the command. */
4688 * This field is the length of the response in bytes. The last byte of
4689 * the response is a valid flag that will read as '1' when the command
4690 * has been completely written to memory.
4700 * This field is used in Output records to indicate that the output is
4701 * completely written to RAM. This field should be read as '1' to
4702 * indicate that the output has been completely written. When writing a
4703 * command completion or response to an internal processor, the order of
4704 * writes has to be such that this field is written last.
4707 } __attribute__((packed));
4709 /* hwrm_stat_ctx_free */
4710 /* Description: This command is used to free a stat context. */
4711 /* Input (24 bytes) */
4713 struct hwrm_stat_ctx_free_input {
4715 * This value indicates what type of request this is. The format for the
4716 * rest of the command is determined by this field.
4721 * This value indicates the what completion ring the request will be
4722 * optionally completed on. If the value is -1, then no CR completion
4723 * will be generated. Any other value must be a valid CR ring_id value
4724 * for this function.
4728 /* This value indicates the command sequence number. */
4732 * Target ID of this command. 0x0 - 0xFFF8 - Used for function ids
4733 * 0xFFF8 - 0xFFFE - Reserved for internal processors 0xFFFF - HWRM
4738 * This is the host address where the response will be written when the
4739 * request is complete. This area must be 16B aligned and must be
4740 * cleared to zero before the request is made.
4744 /* ID of the statistics context that is being queried. */
4745 uint32_t stat_ctx_id;
4748 } __attribute__((packed));
4750 /* Output (16 bytes) */
4752 struct hwrm_stat_ctx_free_output {
4754 * Pass/Fail or error type Note: receiver to verify the in parameters,
4755 * and fail the call with an error when appropriate
4757 uint16_t error_code;
4759 /* This field returns the type of original request. */
4762 /* This field provides original sequence number of the command. */
4766 * This field is the length of the response in bytes. The last byte of
4767 * the response is a valid flag that will read as '1' when the command
4768 * has been completely written to memory.
4772 /* This is the statistics context ID value. */
4773 uint32_t stat_ctx_id;
4780 * This field is used in Output records to indicate that the output is
4781 * completely written to RAM. This field should be read as '1' to
4782 * indicate that the output has been completely written. When writing a
4783 * command completion or response to an internal processor, the order of
4784 * writes has to be such that this field is written last.
4787 } __attribute__((packed));
4789 /* hwrm_vnic_alloc */
4791 * Description: This VNIC is a resource in the RX side of the chip that is used
4792 * to represent a virtual host "interface". # At the time of VNIC allocation or
4793 * configuration, the function can specify whether it wants the requested VNIC
4794 * to be the default VNIC for the function or not. # If a function requests
4795 * allocation of a VNIC for the first time and a VNIC is successfully allocated
4796 * by the HWRM, then the HWRM shall make the allocated VNIC as the default VNIC
4797 * for that function. # The default VNIC shall be used for the default action
4798 * for a partition or function. # For each VNIC allocated on a function, a
4799 * mapping on the RX side to map the allocated VNIC to source virtual interface
4800 * shall be performed by the HWRM. This should be hidden to the function driver
4801 * requesting the VNIC allocation. This enables broadcast/multicast replication
4802 * with source knockout. # If multicast replication with source knockout is
4803 * enabled, then the internal VNIC to SVIF mapping data structures shall be
4804 * programmed at the time of VNIC allocation.
4807 /* Input (24 bytes) */
4808 struct hwrm_vnic_alloc_input {
4810 * This value indicates what type of request this is. The format for the
4811 * rest of the command is determined by this field.
4816 * This value indicates the what completion ring the request will be
4817 * optionally completed on. If the value is -1, then no CR completion
4818 * will be generated. Any other value must be a valid CR ring_id value
4819 * for this function.
4823 /* This value indicates the command sequence number. */
4827 * Target ID of this command. 0x0 - 0xFFF8 - Used for function ids
4828 * 0xFFF8 - 0xFFFE - Reserved for internal processors 0xFFFF - HWRM
4833 * This is the host address where the response will be written when the
4834 * request is complete. This area must be 16B aligned and must be
4835 * cleared to zero before the request is made.
4840 * When this bit is '1', this VNIC is requested to be the default VNIC
4841 * for this function.
4843 #define HWRM_VNIC_ALLOC_INPUT_FLAGS_DEFAULT UINT32_C(0x1)
4847 } __attribute__((packed));
4849 /* Output (16 bytes) */
4850 struct hwrm_vnic_alloc_output {
4852 * Pass/Fail or error type Note: receiver to verify the in parameters,
4853 * and fail the call with an error when appropriate
4855 uint16_t error_code;
4857 /* This field returns the type of original request. */
4860 /* This field provides original sequence number of the command. */
4864 * This field is the length of the response in bytes. The last byte of
4865 * the response is a valid flag that will read as '1' when the command
4866 * has been completely written to memory.
4870 /* Logical vnic ID */
4878 * This field is used in Output records to indicate that the output is
4879 * completely written to RAM. This field should be read as '1' to
4880 * indicate that the output has been completely written. When writing a
4881 * command completion or response to an internal processor, the order of
4882 * writes has to be such that this field is written last.
4885 } __attribute__((packed));
4888 /* Description: Configure the RX VNIC structure. */
4890 /* Input (40 bytes) */
4891 struct hwrm_vnic_cfg_input {
4893 * This value indicates what type of request this is. The format for the
4894 * rest of the command is determined by this field.
4899 * This value indicates the what completion ring the request will be
4900 * optionally completed on. If the value is -1, then no CR completion
4901 * will be generated. Any other value must be a valid CR ring_id value
4902 * for this function.
4906 /* This value indicates the command sequence number. */
4910 * Target ID of this command. 0x0 - 0xFFF8 - Used for function ids
4911 * 0xFFF8 - 0xFFFE - Reserved for internal processors 0xFFFF - HWRM
4916 * This is the host address where the response will be written when the
4917 * request is complete. This area must be 16B aligned and must be
4918 * cleared to zero before the request is made.
4923 * When this bit is '1', the VNIC is requested to be the default VNIC
4926 #define HWRM_VNIC_CFG_INPUT_FLAGS_DEFAULT UINT32_C(0x1)
4928 * When this bit is '1', the VNIC is being configured to strip VLAN in
4929 * the RX path. If set to '0', then VLAN stripping is disabled on this
4932 #define HWRM_VNIC_CFG_INPUT_FLAGS_VLAN_STRIP_MODE UINT32_C(0x2)
4934 * When this bit is '1', the VNIC is being configured to buffer receive
4935 * packets in the hardware until the host posts new receive buffers. If
4936 * set to '0', then bd_stall is being configured to be disabled on this
4939 #define HWRM_VNIC_CFG_INPUT_FLAGS_BD_STALL_MODE UINT32_C(0x4)
4941 * When this bit is '1', the VNIC is being configured to receive both
4942 * RoCE and non-RoCE traffic. If set to '0', then this VNIC is not
4943 * configured to be operating in dual VNIC mode.
4945 #define HWRM_VNIC_CFG_INPUT_FLAGS_ROCE_DUAL_VNIC_MODE UINT32_C(0x8)
4947 * When this flag is set to '1', the VNIC is requested to be configured
4948 * to receive only RoCE traffic. If this flag is set to '0', then this
4949 * flag shall be ignored by the HWRM. If roce_dual_vnic_mode flag is set
4950 * to '1', then the HWRM client shall not set this flag to '1'.
4952 #define HWRM_VNIC_CFG_INPUT_FLAGS_ROCE_ONLY_VNIC_MODE UINT32_C(0x10)
4955 /* This bit must be '1' for the dflt_ring_grp field to be configured. */
4956 #define HWRM_VNIC_CFG_INPUT_ENABLES_DFLT_RING_GRP UINT32_C(0x1)
4957 /* This bit must be '1' for the rss_rule field to be configured. */
4958 #define HWRM_VNIC_CFG_INPUT_ENABLES_RSS_RULE UINT32_C(0x2)
4959 /* This bit must be '1' for the cos_rule field to be configured. */
4960 #define HWRM_VNIC_CFG_INPUT_ENABLES_COS_RULE UINT32_C(0x4)
4961 /* This bit must be '1' for the lb_rule field to be configured. */
4962 #define HWRM_VNIC_CFG_INPUT_ENABLES_LB_RULE UINT32_C(0x8)
4963 /* This bit must be '1' for the mru field to be configured. */
4964 #define HWRM_VNIC_CFG_INPUT_ENABLES_MRU UINT32_C(0x10)
4967 /* Logical vnic ID */
4971 * Default Completion ring for the VNIC. This ring will be chosen if
4972 * packet does not match any RSS rules and if there is no COS rule.
4974 uint16_t dflt_ring_grp;
4977 * RSS ID for RSS rule/table structure. 0xFF... (All Fs) if there is no
4983 * RSS ID for COS rule/table structure. 0xFF... (All Fs) if there is no
4989 * RSS ID for load balancing rule/table structure. 0xFF... (All Fs) if
4990 * there is no LB rule.
4995 * The maximum receive unit of the vnic. Each vnic is associated with a
4996 * function. The vnic mru value overwrites the mru setting of the
4997 * associated function. The HWRM shall make sure that vnic mru does not
4998 * exceed the mru of the port the function is associated with.
5003 } __attribute__((packed));
5005 /* Output (16 bytes) */
5006 struct hwrm_vnic_cfg_output {
5008 * Pass/Fail or error type Note: receiver to verify the in parameters,
5009 * and fail the call with an error when appropriate
5011 uint16_t error_code;
5013 /* This field returns the type of original request. */
5016 /* This field provides original sequence number of the command. */
5020 * This field is the length of the response in bytes. The last byte of
5021 * the response is a valid flag that will read as '1' when the command
5022 * has been completely written to memory.
5032 * This field is used in Output records to indicate that the output is
5033 * completely written to RAM. This field should be read as '1' to
5034 * indicate that the output has been completely written. When writing a
5035 * command completion or response to an internal processor, the order of
5036 * writes has to be such that this field is written last.
5039 } __attribute__((packed));
5041 /* hwrm_vnic_free */
5043 * Description: Free a VNIC resource. Idle any resources associated with the
5044 * VNIC as well as the VNIC. Reset and release all resources associated with the
5048 /* Input (24 bytes) */
5049 struct hwrm_vnic_free_input {
5051 * This value indicates what type of request this is. The format for the
5052 * rest of the command is determined by this field.
5057 * This value indicates the what completion ring the request will be
5058 * optionally completed on. If the value is -1, then no CR completion
5059 * will be generated. Any other value must be a valid CR ring_id value
5060 * for this function.
5064 /* This value indicates the command sequence number. */
5068 * Target ID of this command. 0x0 - 0xFFF8 - Used for function ids
5069 * 0xFFF8 - 0xFFFE - Reserved for internal processors 0xFFFF - HWRM
5074 * This is the host address where the response will be written when the
5075 * request is complete. This area must be 16B aligned and must be
5076 * cleared to zero before the request is made.
5080 /* Logical vnic ID */
5084 } __attribute__((packed));
5086 /* Output (16 bytes) */
5087 struct hwrm_vnic_free_output {
5089 * Pass/Fail or error type Note: receiver to verify the in parameters,
5090 * and fail the call with an error when appropriate
5092 uint16_t error_code;
5094 /* This field returns the type of original request. */
5097 /* This field provides original sequence number of the command. */
5101 * This field is the length of the response in bytes. The last byte of
5102 * the response is a valid flag that will read as '1' when the command
5103 * has been completely written to memory.
5113 * This field is used in Output records to indicate that the output is
5114 * completely written to RAM. This field should be read as '1' to
5115 * indicate that the output has been completely written. When writing a
5116 * command completion or response to an internal processor, the order of
5117 * writes has to be such that this field is written last.
5120 } __attribute__((packed));
5122 /* hwrm_vnic_rss_cfg */
5123 /* Description: This function is used to enable RSS configuration. */
5125 /* Input (48 bytes) */
5126 struct hwrm_vnic_rss_cfg_input {
5128 * This value indicates what type of request this is. The format for the
5129 * rest of the command is determined by this field.
5134 * This value indicates the what completion ring the request will be
5135 * optionally completed on. If the value is -1, then no CR completion
5136 * will be generated. Any other value must be a valid CR ring_id value
5137 * for this function.
5141 /* This value indicates the command sequence number. */
5145 * Target ID of this command. 0x0 - 0xFFF8 - Used for function ids
5146 * 0xFFF8 - 0xFFFE - Reserved for internal processors 0xFFFF - HWRM
5151 * This is the host address where the response will be written when the
5152 * request is complete. This area must be 16B aligned and must be
5153 * cleared to zero before the request is made.
5158 * When this bit is '1', the RSS hash shall be computed over source and
5159 * destination IPv4 addresses of IPv4 packets.
5161 #define HWRM_VNIC_RSS_CFG_INPUT_HASH_TYPE_IPV4 UINT32_C(0x1)
5163 * When this bit is '1', the RSS hash shall be computed over
5164 * source/destination IPv4 addresses and source/destination ports of
5167 #define HWRM_VNIC_RSS_CFG_INPUT_HASH_TYPE_TCP_IPV4 UINT32_C(0x2)
5169 * When this bit is '1', the RSS hash shall be computed over
5170 * source/destination IPv4 addresses and source/destination ports of
5173 #define HWRM_VNIC_RSS_CFG_INPUT_HASH_TYPE_UDP_IPV4 UINT32_C(0x4)
5175 * When this bit is '1', the RSS hash shall be computed over source and
5176 * destination IPv4 addresses of IPv6 packets.
5178 #define HWRM_VNIC_RSS_CFG_INPUT_HASH_TYPE_IPV6 UINT32_C(0x8)
5180 * When this bit is '1', the RSS hash shall be computed over
5181 * source/destination IPv6 addresses and source/destination ports of
5184 #define HWRM_VNIC_RSS_CFG_INPUT_HASH_TYPE_TCP_IPV6 UINT32_C(0x10)
5186 * When this bit is '1', the RSS hash shall be computed over
5187 * source/destination IPv6 addresses and source/destination ports of
5190 #define HWRM_VNIC_RSS_CFG_INPUT_HASH_TYPE_UDP_IPV6 UINT32_C(0x20)
5195 /* This is the address for rss ring group table */
5196 uint64_t ring_grp_tbl_addr;
5198 /* This is the address for rss hash key table */
5199 uint64_t hash_key_tbl_addr;
5201 /* Index to the rss indirection table. */
5202 uint16_t rss_ctx_idx;
5204 uint16_t unused_1[3];
5205 } __attribute__((packed));
5207 /* Output (16 bytes) */
5208 struct hwrm_vnic_rss_cfg_output {
5210 * Pass/Fail or error type Note: receiver to verify the in parameters,
5211 * and fail the call with an error when appropriate
5213 uint16_t error_code;
5215 /* This field returns the type of original request. */
5218 /* This field provides original sequence number of the command. */
5222 * This field is the length of the response in bytes. The last byte of
5223 * the response is a valid flag that will read as '1' when the command
5224 * has been completely written to memory.
5234 * This field is used in Output records to indicate that the output is
5235 * completely written to RAM. This field should be read as '1' to
5236 * indicate that the output has been completely written. When writing a
5237 * command completion or response to an internal processor, the order of
5238 * writes has to be such that this field is written last.
5241 } __attribute__((packed));
5243 /* Input (16 bytes) */
5244 struct hwrm_vnic_rss_cos_lb_ctx_alloc_input {
5246 * This value indicates what type of request this is. The format for the
5247 * rest of the command is determined by this field.
5252 * This value indicates the what completion ring the request will be
5253 * optionally completed on. If the value is -1, then no CR completion
5254 * will be generated. Any other value must be a valid CR ring_id value
5255 * for this function.
5259 /* This value indicates the command sequence number. */
5263 * Target ID of this command. 0x0 - 0xFFF8 - Used for function ids
5264 * 0xFFF8 - 0xFFFE - Reserved for internal processors 0xFFFF - HWRM
5269 * This is the host address where the response will be written when the
5270 * request is complete. This area must be 16B aligned and must be
5271 * cleared to zero before the request is made.
5274 } __attribute__((packed));
5276 /* Output (16 bytes) */
5278 struct hwrm_vnic_rss_cos_lb_ctx_alloc_output {
5280 * Pass/Fail or error type Note: receiver to verify the in parameters,
5281 * and fail the call with an error when appropriate
5283 uint16_t error_code;
5285 /* This field returns the type of original request. */
5288 /* This field provides original sequence number of the command. */
5292 * This field is the length of the response in bytes. The last byte of
5293 * the response is a valid flag that will read as '1' when the command
5294 * has been completely written to memory.
5298 /* rss_cos_lb_ctx_id is 16 b */
5299 uint16_t rss_cos_lb_ctx_id;
5308 * This field is used in Output records to indicate that the output is
5309 * completely written to RAM. This field should be read as '1' to
5310 * indicate that the output has been completely written. When writing a
5311 * command completion or response to an internal processor, the order of
5312 * writes has to be such that this field is written last.
5315 } __attribute__((packed));
5317 /* hwrm_vnic_rss_cos_lb_ctx_free */
5318 /* Description: This function can be used to free COS/Load Balance context. */
5319 /* Input (24 bytes) */
5321 struct hwrm_vnic_rss_cos_lb_ctx_free_input {
5323 * This value indicates what type of request this is. The format for the
5324 * rest of the command is determined by this field.
5329 * This value indicates the what completion ring the request will be
5330 * optionally completed on. If the value is -1, then no CR completion
5331 * will be generated. Any other value must be a valid CR ring_id value
5332 * for this function.
5336 /* This value indicates the command sequence number. */
5340 * Target ID of this command. 0x0 - 0xFFF8 - Used for function ids
5341 * 0xFFF8 - 0xFFFE - Reserved for internal processors 0xFFFF - HWRM
5346 * This is the host address where the response will be written when the
5347 * request is complete. This area must be 16B aligned and must be
5348 * cleared to zero before the request is made.
5352 /* rss_cos_lb_ctx_id is 16 b */
5353 uint16_t rss_cos_lb_ctx_id;
5355 uint16_t unused_0[3];
5356 } __attribute__((packed));
5358 /* Output (16 bytes) */
5359 struct hwrm_vnic_rss_cos_lb_ctx_free_output {
5361 * Pass/Fail or error type Note: receiver to verify the in parameters,
5362 * and fail the call with an error when appropriate
5364 uint16_t error_code;
5366 /* This field returns the type of original request. */
5369 /* This field provides original sequence number of the command. */
5373 * This field is the length of the response in bytes. The last byte of
5374 * the response is a valid flag that will read as '1' when the command
5375 * has been completely written to memory.
5385 * This field is used in Output records to indicate that the output is
5386 * completely written to RAM. This field should be read as '1' to
5387 * indicate that the output has been completely written. When writing a
5388 * command completion or response to an internal processor, the order of
5389 * writes has to be such that this field is written last.
5392 } __attribute__((packed));
5394 /* Output (32 bytes) */
5395 struct hwrm_queue_qportcfg_output {
5397 * Pass/Fail or error type Note: receiver to verify the in parameters,
5398 * and fail the call with an error when appropriate
5400 uint16_t error_code;
5402 /* This field returns the type of original request. */
5405 /* This field provides original sequence number of the command. */
5409 * This field is the length of the response in bytes. The last byte of
5410 * the response is a valid flag that will read as '1' when the command
5411 * has been completely written to memory.
5415 /* The maximum number of queues that can be configured. */
5416 uint8_t max_configurable_queues;
5418 /* The maximum number of lossless queues that can be configured. */
5419 uint8_t max_configurable_lossless_queues;
5422 * 0 - Not allowed. Non-zero - Allowed. If this value is non-zero, then
5423 * the HWRM shall allow the host SW driver to configure queues using
5426 uint8_t queue_cfg_allowed;
5429 * 0 - Not allowed. Non-zero - Allowed If this value is non-zero, then
5430 * the HWRM shall allow the host SW driver to configure queue buffers
5431 * using hwrm_queue_buffers_cfg.
5433 uint8_t queue_buffers_cfg_allowed;
5436 * 0 - Not allowed. Non-zero - Allowed If this value is non-zero, then
5437 * the HWRM shall allow the host SW driver to configure PFC using
5438 * hwrm_queue_pfcenable_cfg.
5440 uint8_t queue_pfcenable_cfg_allowed;
5443 * 0 - Not allowed. Non-zero - Allowed If this value is non-zero, then
5444 * the HWRM shall allow the host SW driver to configure Priority to CoS
5445 * mapping using hwrm_queue_pri2cos_cfg.
5447 uint8_t queue_pri2cos_cfg_allowed;
5450 * 0 - Not allowed. Non-zero - Allowed If this value is non-zero, then
5451 * the HWRM shall allow the host SW driver to configure CoS Bandwidth
5452 * configuration using hwrm_queue_cos2bw_cfg.
5454 uint8_t queue_cos2bw_cfg_allowed;
5456 /* ID of CoS Queue 0. FF - Invalid id */
5459 /* This value is applicable to CoS queues only. */
5460 /* Lossy (best-effort) */
5461 #define HWRM_QUEUE_QPORTCFG_OUTPUT_QUEUE_ID0_SERVICE_PROFILE_LOSSY \
5462 (UINT32_C(0x0) << 0)
5464 #define HWRM_QUEUE_QPORTCFG_OUTPUT_QUEUE_ID0_SERVICE_PROFILE_LOSSLESS \
5465 (UINT32_C(0x1) << 0)
5467 * Set to 0xFF... (All Fs) if there is no service profile
5470 #define HWRM_QUEUE_QPORTCFG_OUTPUT_QUEUE_ID0_SERVICE_PROFILE_UNKNOWN \
5471 (UINT32_C(0xff) << 0)
5472 uint8_t queue_id0_service_profile;
5474 /* ID of CoS Queue 1. FF - Invalid id */
5476 /* This value is applicable to CoS queues only. */
5477 /* Lossy (best-effort) */
5478 #define HWRM_QUEUE_QPORTCFG_OUTPUT_QUEUE_ID1_SERVICE_PROFILE_LOSSY \
5479 (UINT32_C(0x0) << 0)
5481 #define HWRM_QUEUE_QPORTCFG_OUTPUT_QUEUE_ID1_SERVICE_PROFILE_LOSSLESS \
5482 (UINT32_C(0x1) << 0)
5484 * Set to 0xFF... (All Fs) if there is no service profile
5487 #define HWRM_QUEUE_QPORTCFG_OUTPUT_QUEUE_ID1_SERVICE_PROFILE_UNKNOWN \
5488 (UINT32_C(0xff) << 0)
5489 uint8_t queue_id1_service_profile;
5491 /* ID of CoS Queue 2. FF - Invalid id */
5493 /* This value is applicable to CoS queues only. */
5494 /* Lossy (best-effort) */
5495 #define HWRM_QUEUE_QPORTCFG_OUTPUT_QUEUE_ID2_SERVICE_PROFILE_LOSSY \
5496 (UINT32_C(0x0) << 0)
5498 #define HWRM_QUEUE_QPORTCFG_OUTPUT_QUEUE_ID2_SERVICE_PROFILE_LOSSLESS \
5499 (UINT32_C(0x1) << 0)
5501 * Set to 0xFF... (All Fs) if there is no service profile
5504 #define HWRM_QUEUE_QPORTCFG_OUTPUT_QUEUE_ID2_SERVICE_PROFILE_UNKNOWN \
5505 (UINT32_C(0xff) << 0)
5506 uint8_t queue_id2_service_profile;
5508 /* ID of CoS Queue 3. FF - Invalid id */
5511 /* This value is applicable to CoS queues only. */
5512 /* Lossy (best-effort) */
5513 #define HWRM_QUEUE_QPORTCFG_OUTPUT_QUEUE_ID3_SERVICE_PROFILE_LOSSY \
5514 (UINT32_C(0x0) << 0)
5516 #define HWRM_QUEUE_QPORTCFG_OUTPUT_QUEUE_ID3_SERVICE_PROFILE_LOSSLESS \
5517 (UINT32_C(0x1) << 0)
5519 * Set to 0xFF... (All Fs) if there is no service profile
5522 #define HWRM_QUEUE_QPORTCFG_OUTPUT_QUEUE_ID3_SERVICE_PROFILE_UNKNOWN \
5523 (UINT32_C(0xff) << 0)
5524 uint8_t queue_id3_service_profile;
5526 /* ID of CoS Queue 4. FF - Invalid id */
5528 /* This value is applicable to CoS queues only. */
5529 /* Lossy (best-effort) */
5530 #define HWRM_QUEUE_QPORTCFG_OUTPUT_QUEUE_ID4_SERVICE_PROFILE_LOSSY \
5531 (UINT32_C(0x0) << 0)
5533 #define HWRM_QUEUE_QPORTCFG_OUTPUT_QUEUE_ID4_SERVICE_PROFILE_LOSSLESS \
5534 (UINT32_C(0x1) << 0)
5536 * Set to 0xFF... (All Fs) if there is no service profile
5539 #define HWRM_QUEUE_QPORTCFG_OUTPUT_QUEUE_ID4_SERVICE_PROFILE_UNKNOWN \
5540 (UINT32_C(0xff) << 0)
5541 uint8_t queue_id4_service_profile;
5543 /* ID of CoS Queue 5. FF - Invalid id */
5546 /* This value is applicable to CoS queues only. */
5547 /* Lossy (best-effort) */
5548 #define HWRM_QUEUE_QPORTCFG_OUTPUT_QUEUE_ID5_SERVICE_PROFILE_LOSSY \
5549 (UINT32_C(0x0) << 0)
5551 #define HWRM_QUEUE_QPORTCFG_OUTPUT_QUEUE_ID5_SERVICE_PROFILE_LOSSLESS \
5552 (UINT32_C(0x1) << 0)
5554 * Set to 0xFF... (All Fs) if there is no service profile
5557 #define HWRM_QUEUE_QPORTCFG_OUTPUT_QUEUE_ID5_SERVICE_PROFILE_UNKNOWN \
5558 (UINT32_C(0xff) << 0)
5559 uint8_t queue_id5_service_profile;
5561 /* ID of CoS Queue 6. FF - Invalid id */
5562 uint8_t queue_id6_service_profile;
5563 /* This value is applicable to CoS queues only. */
5564 /* Lossy (best-effort) */
5565 #define HWRM_QUEUE_QPORTCFG_OUTPUT_QUEUE_ID6_SERVICE_PROFILE_LOSSY \
5566 (UINT32_C(0x0) << 0)
5568 #define HWRM_QUEUE_QPORTCFG_OUTPUT_QUEUE_ID6_SERVICE_PROFILE_LOSSLESS \
5569 (UINT32_C(0x1) << 0)
5571 * Set to 0xFF... (All Fs) if there is no service profile
5574 #define HWRM_QUEUE_QPORTCFG_OUTPUT_QUEUE_ID6_SERVICE_PROFILE_UNKNOWN \
5575 (UINT32_C(0xff) << 0)
5578 /* ID of CoS Queue 7. FF - Invalid id */
5581 /* This value is applicable to CoS queues only. */
5582 /* Lossy (best-effort) */
5583 #define HWRM_QUEUE_QPORTCFG_OUTPUT_QUEUE_ID7_SERVICE_PROFILE_LOSSY \
5584 (UINT32_C(0x0) << 0)
5586 #define HWRM_QUEUE_QPORTCFG_OUTPUT_QUEUE_ID7_SERVICE_PROFILE_LOSSLESS \
5587 (UINT32_C(0x1) << 0)
5589 * Set to 0xFF... (All Fs) if there is no service profile
5592 #define HWRM_QUEUE_QPORTCFG_OUTPUT_QUEUE_ID7_SERVICE_PROFILE_UNKNOWN \
5593 (UINT32_C(0xff) << 0)
5594 uint8_t queue_id7_service_profile;
5597 * This field is used in Output records to indicate that the output is
5598 * completely written to RAM. This field should be read as '1' to
5599 * indicate that the output has been completely written. When writing a
5600 * command completion or response to an internal processor, the order of
5601 * writes has to be such that this field is written last.
5604 } __attribute__((packed));
5606 /* hwrm_func_drv_rgtr */
5608 * Description: This command is used by the function driver to register its
5609 * information with the HWRM. A function driver shall implement this command. A
5610 * function driver shall use this command during the driver initialization right
5611 * after the HWRM version discovery and default ring resources allocation.
5614 /* Input (80 bytes) */
5615 struct hwrm_func_drv_rgtr_input {
5617 * This value indicates what type of request this is. The format for the
5618 * rest of the command is determined by this field.
5623 * This value indicates the what completion ring the request will be
5624 * optionally completed on. If the value is -1, then no CR completion
5625 * will be generated. Any other value must be a valid CR ring_id value
5626 * for this function.
5630 /* This value indicates the command sequence number. */
5634 * Target ID of this command. 0x0 - 0xFFF8 - Used for function ids
5635 * 0xFFF8 - 0xFFFE - Reserved for internal processors 0xFFFF - HWRM
5640 * This is the host address where the response will be written when the
5641 * request is complete. This area must be 16B aligned and must be
5642 * cleared to zero before the request is made.
5647 * When this bit is '1', the function driver is requesting all requests
5648 * from its children VF drivers to be forwarded to itself. This flag can
5649 * only be set by the PF driver. If a VF driver sets this flag, it
5650 * should be ignored by the HWRM.
5652 #define HWRM_FUNC_DRV_RGTR_INPUT_FLAGS_FWD_ALL_MODE UINT32_C(0x1)
5654 * When this bit is '1', the function is requesting none of the requests
5655 * from its children VF drivers to be forwarded to itself. This flag can
5656 * only be set by the PF driver. If a VF driver sets this flag, it
5657 * should be ignored by the HWRM.
5659 #define HWRM_FUNC_DRV_RGTR_INPUT_FLAGS_FWD_NONE_MODE UINT32_C(0x2)
5662 /* This bit must be '1' for the os_type field to be configured. */
5663 #define HWRM_FUNC_DRV_RGTR_INPUT_ENABLES_OS_TYPE UINT32_C(0x1)
5664 /* This bit must be '1' for the ver field to be configured. */
5665 #define HWRM_FUNC_DRV_RGTR_INPUT_ENABLES_VER UINT32_C(0x2)
5666 /* This bit must be '1' for the timestamp field to be configured. */
5667 #define HWRM_FUNC_DRV_RGTR_INPUT_ENABLES_TIMESTAMP UINT32_C(0x4)
5668 /* This bit must be '1' for the vf_req_fwd field to be configured. */
5669 #define HWRM_FUNC_DRV_RGTR_INPUT_ENABLES_VF_REQ_FWD UINT32_C(0x8)
5671 * This bit must be '1' for the async_event_fwd field to be configured.
5673 #define HWRM_FUNC_DRV_RGTR_INPUT_ENABLES_ASYNC_EVENT_FWD \
5677 /* This value indicates the type of OS. */
5679 #define HWRM_FUNC_DRV_RGTR_INPUT_OS_TYPE_UNKNOWN \
5680 (UINT32_C(0x0) << 0)
5681 /* Other OS not listed below. */
5682 #define HWRM_FUNC_DRV_RGTR_INPUT_OS_TYPE_OTHER \
5683 (UINT32_C(0x1) << 0)
5685 #define HWRM_FUNC_DRV_RGTR_INPUT_OS_TYPE_MSDOS \
5686 (UINT32_C(0xe) << 0)
5688 #define HWRM_FUNC_DRV_RGTR_INPUT_OS_TYPE_WINDOWS \
5689 (UINT32_C(0x12) << 0)
5691 #define HWRM_FUNC_DRV_RGTR_INPUT_OS_TYPE_SOLARIS \
5692 (UINT32_C(0x1d) << 0)
5694 #define HWRM_FUNC_DRV_RGTR_INPUT_OS_TYPE_LINUX \
5695 (UINT32_C(0x24) << 0)
5697 #define HWRM_FUNC_DRV_RGTR_INPUT_OS_TYPE_FREEBSD \
5698 (UINT32_C(0x2a) << 0)
5699 /* VMware ESXi OS. */
5700 #define HWRM_FUNC_DRV_RGTR_INPUT_OS_TYPE_ESXI \
5701 (UINT32_C(0x68) << 0)
5702 /* Microsoft Windows 8 64-bit OS. */
5703 #define HWRM_FUNC_DRV_RGTR_INPUT_OS_TYPE_WIN864 \
5704 (UINT32_C(0x73) << 0)
5705 /* Microsoft Windows Server 2012 R2 OS. */
5706 #define HWRM_FUNC_DRV_RGTR_INPUT_OS_TYPE_WIN2012R2 \
5707 (UINT32_C(0x74) << 0)
5710 /* This is the major version of the driver. */
5713 /* This is the minor version of the driver. */
5716 /* This is the update version of the driver. */
5723 * This is a 32-bit timestamp provided by the driver for keep alive. The
5724 * timestamp is in multiples of 1ms.
5731 * This is a 256-bit bit mask provided by the PF driver for letting the
5732 * HWRM know what commands issued by the VF driver to the HWRM should be
5733 * forwarded to the PF driver. Nth bit refers to the Nth req_type.
5734 * Setting Nth bit to 1 indicates that requests from the VF driver with
5735 * req_type equal to N shall be forwarded to the parent PF driver. This
5736 * field is not valid for the VF driver.
5738 uint32_t vf_req_fwd[8];
5741 * This is a 256-bit bit mask provided by the function driver (PF or VF
5742 * driver) to indicate the list of asynchronous event completions to be
5743 * forwarded. Nth bit refers to the Nth event_id. Setting Nth bit to 1
5744 * by the function driver shall result in the HWRM forwarding
5745 * asynchronous event completion with event_id equal to N. If all bits
5746 * are set to 0 (value of 0), then the HWRM shall not forward any
5747 * asynchronous event completion to this function driver.
5749 uint32_t async_event_fwd[8];
5750 } __attribute__((packed));
5752 /* Output (16 bytes) */
5754 struct hwrm_func_drv_rgtr_output {
5756 * Pass/Fail or error type Note: receiver to verify the in parameters,
5757 * and fail the call with an error when appropriate
5759 uint16_t error_code;
5761 /* This field returns the type of original request. */
5764 /* This field provides original sequence number of the command. */
5768 * This field is the length of the response in bytes. The last byte of
5769 * the response is a valid flag that will read as '1' when the command
5770 * has been completely written to memory.
5780 * This field is used in Output records to indicate that the output is
5781 * completely written to RAM. This field should be read as '1' to
5782 * indicate that the output has been completely written. When writing a
5783 * command completion or response to an internal processor, the order of
5784 * writes has to be such that this field is written last.
5787 } __attribute__((packed));
5789 /* hwrm_func_drv_unrgtr */
5791 * Description: This command is used by the function driver to un register with
5792 * the HWRM. A function driver shall implement this command. A function driver
5793 * shall use this command during the driver unloading.
5795 /* Input (24 bytes) */
5797 struct hwrm_func_drv_unrgtr_input {
5799 * This value indicates what type of request this is. The format for the
5800 * rest of the command is determined by this field.
5805 * This value indicates the what completion ring the request will be
5806 * optionally completed on. If the value is -1, then no CR completion
5807 * will be generated. Any other value must be a valid CR ring_id value
5808 * for this function.
5812 /* This value indicates the command sequence number. */
5816 * Target ID of this command. 0x0 - 0xFFF8 - Used for function ids
5817 * 0xFFF8 - 0xFFFE - Reserved for internal processors 0xFFFF - HWRM
5822 * This is the host address where the response will be written when the
5823 * request is complete. This area must be 16B aligned and must be
5824 * cleared to zero before the request is made.
5829 * When this bit is '1', the function driver is notifying the HWRM to
5830 * prepare for the shutdown.
5832 #define HWRM_FUNC_DRV_UNRGTR_INPUT_FLAGS_PREPARE_FOR_SHUTDOWN \
5837 } __attribute__((packed));
5839 /* Output (16 bytes) */
5840 struct hwrm_func_drv_unrgtr_output {
5842 * Pass/Fail or error type Note: receiver to verify the in parameters,
5843 * and fail the call with an error when appropriate
5845 uint16_t error_code;
5847 /* This field returns the type of original request. */
5850 /* This field provides original sequence number of the command. */
5854 * This field is the length of the response in bytes. The last byte of
5855 * the response is a valid flag that will read as '1' when the command
5856 * has been completely written to memory.
5866 * This field is used in Output records to indicate that the output is
5867 * completely written to RAM. This field should be read as '1' to
5868 * indicate that the output has been completely written. When writing a
5869 * command completion or response to an internal processor, the order of
5870 * writes has to be such that this field is written last.
5873 } __attribute__((packed));
5875 /* hwrm_func_qcfg */
5877 * Description: This command returns the current configuration of a function.
5878 * The input FID value is used to indicate what function is being queried. This
5879 * allows a physical function driver to query virtual functions that are
5880 * children of the physical function. The output FID value is needed to
5881 * configure Rings and MSI-X vectors so their DMA operations appear correctly on
5884 /* Input (24 bytes) */
5885 struct hwrm_func_qcfg_input {
5887 * This value indicates what type of request this is. The format for the
5888 * rest of the command is determined by this field.
5892 * This value indicates the what completion ring the request will be
5893 * optionally completed on. If the value is -1, then no CR completion
5894 * will be generated. Any other value must be a valid CR ring_id value
5895 * for this function.
5898 /* This value indicates the command sequence number. */
5901 * Target ID of this command. 0x0 - 0xFFF8 - Used for function ids
5902 * 0xFFF8 - 0xFFFE - Reserved for internal processors 0xFFFF - HWRM
5906 * This is the host address where the response will be written when the
5907 * request is complete. This area must be 16B aligned and must be
5908 * cleared to zero before the request is made.
5912 * Function ID of the function that is being queried. 0xFF... (All Fs)
5913 * if the query is for the requesting function.
5917 uint16_t unused_0[3];
5918 } __attribute__((packed));
5920 /* Output (72 bytes) */
5921 struct hwrm_func_qcfg_output {
5923 * Pass/Fail or error type Note: receiver to verify the in parameters,
5924 * and fail the call with an error when appropriate
5926 uint16_t error_code;
5927 /* This field returns the type of original request. */
5929 /* This field provides original sequence number of the command. */
5932 * This field is the length of the response in bytes. The last byte of
5933 * the response is a valid flag that will read as '1' when the command
5934 * has been completely written to memory.
5938 * FID value. This value is used to identify operations on the PCI bus
5939 * as belonging to a particular PCI function.
5943 * Port ID of port that this function is associated with. 0xFF... (All
5944 * Fs) if this function is not associated with any port.
5948 * This value is the current VLAN setting for this function. The value
5949 * of 0 for this field indicates no priority tagging or VLAN is used.
5950 * This VLAN is in 802.1Q tag format.
5958 * This value is current MAC address configured for this function. A
5959 * value of 00-00-00-00-00-00 indicates no MAC address is currently
5962 uint8_t mac_address[6];
5965 * This value is current PCI ID of this function. If ARI is enabled,
5966 * then it is Bus Number (8b):Function Number(8b). Otherwise, it is Bus
5967 * Number (8b):Device Number (4b):Function Number(4b).
5970 /* The number of RSS/COS contexts currently allocated to the function. */
5971 uint16_t alloc_rsscos_ctx;
5973 * The number of completion rings currently allocated to the function.
5974 * This does not include the rings allocated to any children functions
5977 uint16_t alloc_cmpl_rings;
5979 * The number of transmit rings currently allocated to the function.
5980 * This does not include the rings allocated to any children functions
5983 uint16_t alloc_tx_rings;
5985 * The number of receive rings currently allocated to the function. This
5986 * does not include the rings allocated to any children functions if
5989 uint16_t alloc_rx_rings;
5990 /* The allocated number of L2 contexts to the function. */
5991 uint16_t alloc_l2_ctx;
5992 /* The allocated number of vnics to the function. */
5993 uint16_t alloc_vnics;
5995 * The maximum transmission unit of the function. For rings allocated on
5996 * this function, this default value is used if ring MTU is not
6001 * The maximum receive unit of the function. For vnics allocated on this
6002 * function, this default value is used if vnic MRU is not specified.
6005 /* The statistics context assigned to a function. */
6006 uint16_t stat_ctx_id;
6008 * The HWRM shall return Unknown value for this field when this command
6009 * is used to query VF's configuration.
6011 /* Single physical function */
6012 #define HWRM_FUNC_QCFG_OUTPUT_PORT_PARTITION_TYPE_SPF \
6013 (UINT32_C(0x0) << 0)
6014 /* Multiple physical functions */
6015 #define HWRM_FUNC_QCFG_OUTPUT_PORT_PARTITION_TYPE_MPFS \
6016 (UINT32_C(0x1) << 0)
6017 /* Network Partitioning 1.0 */
6018 #define HWRM_FUNC_QCFG_OUTPUT_PORT_PARTITION_TYPE_NPAR1_0 \
6019 (UINT32_C(0x2) << 0)
6020 /* Network Partitioning 1.5 */
6021 #define HWRM_FUNC_QCFG_OUTPUT_PORT_PARTITION_TYPE_NPAR1_5 \
6022 (UINT32_C(0x3) << 0)
6023 /* Network Partitioning 2.0 */
6024 #define HWRM_FUNC_QCFG_OUTPUT_PORT_PARTITION_TYPE_NPAR2_0 \
6025 (UINT32_C(0x4) << 0)
6027 #define HWRM_FUNC_QCFG_OUTPUT_PORT_PARTITION_TYPE_UNKNOWN \
6028 (UINT32_C(0xff) << 0)
6029 uint8_t port_partition_type;
6032 /* The default VNIC ID assigned to a function that is being queried. */
6033 uint16_t dflt_vnic_id;
6038 * Minimum BW allocated for this function in Mbps. The HWRM will
6039 * translate this value into byte counter and time interval used for the
6040 * scheduler inside the device. A value of 0 indicates the minimum
6041 * bandwidth is not configured.
6045 * Maximum BW allocated for this function in Mbps. The HWRM will
6046 * translate this value into byte counter and time interval used for the
6047 * scheduler inside the device. A value of 0 indicates that the maximum
6048 * bandwidth is not configured.
6052 * This value indicates the Edge virtual bridge mode for the domain that
6053 * this function belongs to.
6055 /* No Edge Virtual Bridging (EVB) */
6056 #define HWRM_FUNC_QCFG_OUTPUT_EVB_MODE_NO_EVB (UINT32_C(0x0) << 0)
6057 /* Virtual Ethernet Bridge (VEB) */
6058 #define HWRM_FUNC_QCFG_OUTPUT_EVB_MODE_VEB (UINT32_C(0x1) << 0)
6059 /* Virtual Ethernet Port Aggregator (VEPA) */
6060 #define HWRM_FUNC_QCFG_OUTPUT_EVB_MODE_VEPA (UINT32_C(0x2) << 0)
6066 * The number of allocated multicast filters for this function on the RX
6069 uint32_t alloc_mcast_filters;
6070 /* The number of allocated HW ring groups for this function. */
6071 uint32_t alloc_hw_ring_grps;
6077 * This field is used in Output records to indicate that the output is
6078 * completely written to RAM. This field should be read as '1' to
6079 * indicate that the output has been completely written. When writing a
6080 * command completion or response to an internal processor, the order of
6081 * writes has to be such that this field is written last.
6084 } __attribute__((packed));