b35e65a8ded473791de56b25bc218524b91fd893
[dpdk.git] / drivers / net / bnxt / tf_core / tf_device_p4.c
1 /* SPDX-License-Identifier: BSD-3-Clause
2  * Copyright(c) 2019-2020 Broadcom
3  * All rights reserved.
4  */
5
6 #include <rte_common.h>
7 #include <cfa_resource_types.h>
8
9 #include "tf_device.h"
10 #include "tf_identifier.h"
11 #include "tf_tbl.h"
12 #include "tf_tcam.h"
13 #include "tf_em.h"
14 #include "tf_if_tbl.h"
15 #include "tfp.h"
16
17 #define TF_DEV_P4_PARIF_MAX 16
18 #define TF_DEV_P4_PF_MASK 0xfUL
19
20 /**
21  * Device specific function that retrieves the MAX number of HCAPI
22  * types the device supports.
23  *
24  * [in] tfp
25  *   Pointer to TF handle
26  *
27  * [out] max_types
28  *   Pointer to the MAX number of HCAPI types supported
29  *
30  * Returns
31  *   - (0) if successful.
32  *   - (-EINVAL) on failure.
33  */
34 static int
35 tf_dev_p4_get_max_types(struct tf *tfp,
36                         uint16_t *max_types)
37 {
38         struct tf_session *tfs;
39         struct tf_dev_info *dev;
40         int rc;
41
42         if (max_types == NULL || tfp == NULL)
43                 return -EINVAL;
44
45         /* Retrieve the session information */
46         rc = tf_session_get_session(tfp, &tfs);
47         if (rc)
48                 return rc;
49
50         /* Retrieve the device information */
51         rc = tf_session_get_device(tfs, &dev);
52         if (rc)
53                 return rc;
54
55         if (dev->type == TF_DEVICE_TYPE_WH)
56                 *max_types = CFA_RESOURCE_TYPE_P4_LAST + 1;
57         else if (dev->type == TF_DEVICE_TYPE_SR)
58                 *max_types = CFA_RESOURCE_TYPE_P45_LAST + 1;
59         else
60                 return -ENODEV;
61
62         return 0;
63 }
64
65 /**
66  * Device specific function that retrieves the WC TCAM slices the
67  * device supports.
68  *
69  * [in] tfp
70  *   Pointer to TF handle
71  *
72  * [out] slice_size
73  *   Pointer to the WC TCAM slice size
74  *
75  * [out] num_slices_per_row
76  *   Pointer to the WC TCAM row slice configuration
77  *
78  * Returns
79  *   - (0) if successful.
80  *   - (-EINVAL) on failure.
81  */
82 static int
83 tf_dev_p4_get_tcam_slice_info(struct tf *tfp __rte_unused,
84                               enum tf_tcam_tbl_type type,
85                               uint16_t key_sz,
86                               uint16_t *num_slices_per_row)
87 {
88 #define CFA_P4_WC_TCAM_SLICES_PER_ROW 2
89 #define CFA_P4_WC_TCAM_SLICE_SIZE     12
90
91         if (type == TF_TCAM_TBL_TYPE_WC_TCAM) {
92                 *num_slices_per_row = CFA_P4_WC_TCAM_SLICES_PER_ROW;
93                 if (key_sz > *num_slices_per_row * CFA_P4_WC_TCAM_SLICE_SIZE)
94                         return -ENOTSUP;
95
96                 *num_slices_per_row = 1;
97         } else { /* for other type of tcam */
98                 *num_slices_per_row = 1;
99         }
100
101         return 0;
102 }
103
104 static int
105 tf_dev_p4_map_parif(struct tf *tfp __rte_unused,
106                     uint16_t parif_bitmask,
107                     uint16_t pf,
108                     uint8_t *data,
109                     uint8_t *mask,
110                     uint16_t sz_in_bytes)
111 {
112         uint32_t parif_pf[2] = { 0 };
113         uint32_t parif_pf_mask[2] = { 0 };
114         uint32_t parif;
115         uint32_t shift;
116
117         if (sz_in_bytes != sizeof(uint64_t))
118                 return -ENOTSUP;
119
120         for (parif = 0; parif < TF_DEV_P4_PARIF_MAX; parif++) {
121                 if (parif_bitmask & (1UL << parif)) {
122                         if (parif < 8) {
123                                 shift = 4 * parif;
124                                 parif_pf_mask[0] |= TF_DEV_P4_PF_MASK << shift;
125                                 parif_pf[0] |= pf << shift;
126                         } else {
127                                 shift = 4 * (parif - 8);
128                                 parif_pf_mask[1] |= TF_DEV_P4_PF_MASK << shift;
129                                 parif_pf[1] |= pf << shift;
130                         }
131                 }
132         }
133         tfp_memcpy(data, parif_pf, sz_in_bytes);
134         tfp_memcpy(mask, parif_pf_mask, sz_in_bytes);
135
136         return 0;
137 }
138
139
140 /**
141  * Truflow P4 device specific functions
142  */
143 const struct tf_dev_ops tf_dev_ops_p4_init = {
144         .tf_dev_get_max_types = tf_dev_p4_get_max_types,
145         .tf_dev_get_tcam_slice_info = tf_dev_p4_get_tcam_slice_info,
146         .tf_dev_alloc_ident = NULL,
147         .tf_dev_free_ident = NULL,
148         .tf_dev_search_ident = NULL,
149         .tf_dev_alloc_ext_tbl = NULL,
150         .tf_dev_alloc_tbl = NULL,
151         .tf_dev_free_ext_tbl = NULL,
152         .tf_dev_free_tbl = NULL,
153         .tf_dev_alloc_search_tbl = NULL,
154         .tf_dev_set_tbl = NULL,
155         .tf_dev_set_ext_tbl = NULL,
156         .tf_dev_get_tbl = NULL,
157         .tf_dev_get_bulk_tbl = NULL,
158         .tf_dev_alloc_tcam = NULL,
159         .tf_dev_free_tcam = NULL,
160         .tf_dev_alloc_search_tcam = NULL,
161         .tf_dev_set_tcam = NULL,
162         .tf_dev_get_tcam = NULL,
163         .tf_dev_insert_int_em_entry = NULL,
164         .tf_dev_delete_int_em_entry = NULL,
165         .tf_dev_insert_ext_em_entry = NULL,
166         .tf_dev_delete_ext_em_entry = NULL,
167         .tf_dev_alloc_tbl_scope = NULL,
168         .tf_dev_map_tbl_scope = NULL,
169         .tf_dev_map_parif = NULL,
170         .tf_dev_free_tbl_scope = NULL,
171         .tf_dev_set_if_tbl = NULL,
172         .tf_dev_get_if_tbl = NULL,
173         .tf_dev_set_global_cfg = NULL,
174         .tf_dev_get_global_cfg = NULL,
175 };
176
177 /**
178  * Truflow P4 device specific functions
179  */
180 const struct tf_dev_ops tf_dev_ops_p4 = {
181         .tf_dev_get_max_types = tf_dev_p4_get_max_types,
182         .tf_dev_get_tcam_slice_info = tf_dev_p4_get_tcam_slice_info,
183         .tf_dev_alloc_ident = tf_ident_alloc,
184         .tf_dev_free_ident = tf_ident_free,
185         .tf_dev_search_ident = tf_ident_search,
186         .tf_dev_alloc_tbl = tf_tbl_alloc,
187         .tf_dev_alloc_ext_tbl = tf_tbl_ext_alloc,
188         .tf_dev_free_tbl = tf_tbl_free,
189         .tf_dev_free_ext_tbl = tf_tbl_ext_free,
190         .tf_dev_alloc_search_tbl = tf_tbl_alloc_search,
191         .tf_dev_set_tbl = tf_tbl_set,
192         .tf_dev_set_ext_tbl = tf_tbl_ext_common_set,
193         .tf_dev_get_tbl = tf_tbl_get,
194         .tf_dev_get_bulk_tbl = tf_tbl_bulk_get,
195         .tf_dev_alloc_tcam = tf_tcam_alloc,
196         .tf_dev_free_tcam = tf_tcam_free,
197         .tf_dev_alloc_search_tcam = tf_tcam_alloc_search,
198         .tf_dev_set_tcam = tf_tcam_set,
199         .tf_dev_get_tcam = NULL,
200         .tf_dev_insert_int_em_entry = tf_em_insert_int_entry,
201         .tf_dev_delete_int_em_entry = tf_em_delete_int_entry,
202         .tf_dev_insert_ext_em_entry = tf_em_insert_ext_entry,
203         .tf_dev_delete_ext_em_entry = tf_em_delete_ext_entry,
204         .tf_dev_alloc_tbl_scope = tf_em_ext_common_alloc,
205         .tf_dev_map_tbl_scope = tf_em_ext_map_tbl_scope,
206         .tf_dev_map_parif = tf_dev_p4_map_parif,
207         .tf_dev_free_tbl_scope = tf_em_ext_common_free,
208         .tf_dev_set_if_tbl = tf_if_tbl_set,
209         .tf_dev_get_if_tbl = tf_if_tbl_get,
210         .tf_dev_set_global_cfg = tf_global_cfg_set,
211         .tf_dev_get_global_cfg = tf_global_cfg_get,
212 };