drivers/net/bnxt/tf_ulp/ulp_template_db.c

   1 /* SPDX-License-Identifier: BSD-3-Clause
   2  * Copyright(c) 2014-2020 Broadcom
   3  * All rights reserved.
   4  */
   5
   6 /*
   7  * date: Mon Mar  9 02:37:53 2020
   8  * version: 0.0
   9  */
  10
  11 #include "ulp_template_db.h"
  12 #include "ulp_template_field_db.h"
  13 #include "ulp_template_struct.h"
  14 #include "ulp_rte_parser.h"
  15
  16 uint32_t ulp_act_prop_map_table[] = {
  17         [BNXT_ULP_ACT_PROP_IDX_ENCAP_TUN_SZ] =
  18                 BNXT_ULP_ACT_PROP_SZ_ENCAP_TUN_SZ,
  19         [BNXT_ULP_ACT_PROP_IDX_ENCAP_IP_SZ] =
  20                 BNXT_ULP_ACT_PROP_SZ_ENCAP_IP_SZ,
  21         [BNXT_ULP_ACT_PROP_IDX_ENCAP_VTAG_SZ] =
  22                 BNXT_ULP_ACT_PROP_SZ_ENCAP_VTAG_SZ,
  23         [BNXT_ULP_ACT_PROP_IDX_ENCAP_VTAG_TYPE] =
  24                 BNXT_ULP_ACT_PROP_SZ_ENCAP_VTAG_TYPE,
  25         [BNXT_ULP_ACT_PROP_IDX_ENCAP_VTAG_NUM] =
  26                 BNXT_ULP_ACT_PROP_SZ_ENCAP_VTAG_NUM,
  27         [BNXT_ULP_ACT_PROP_IDX_ENCAP_L3_TYPE] =
  28                 BNXT_ULP_ACT_PROP_SZ_ENCAP_L3_TYPE,
  29         [BNXT_ULP_ACT_PROP_IDX_MPLS_POP_NUM] =
  30                 BNXT_ULP_ACT_PROP_SZ_MPLS_POP_NUM,
  31         [BNXT_ULP_ACT_PROP_IDX_MPLS_PUSH_NUM] =
  32                 BNXT_ULP_ACT_PROP_SZ_MPLS_PUSH_NUM,
  33         [BNXT_ULP_ACT_PROP_IDX_PORT_ID] =
  34                 BNXT_ULP_ACT_PROP_SZ_PORT_ID,
  35         [BNXT_ULP_ACT_PROP_IDX_VNIC] =
  36                 BNXT_ULP_ACT_PROP_SZ_VNIC,
  37         [BNXT_ULP_ACT_PROP_IDX_VPORT] =
  38                 BNXT_ULP_ACT_PROP_SZ_VPORT,
  39         [BNXT_ULP_ACT_PROP_IDX_MARK] =
  40                 BNXT_ULP_ACT_PROP_SZ_MARK,
  41         [BNXT_ULP_ACT_PROP_IDX_COUNT] =
  42                 BNXT_ULP_ACT_PROP_SZ_COUNT,
  43         [BNXT_ULP_ACT_PROP_IDX_METER] =
  44                 BNXT_ULP_ACT_PROP_SZ_METER,
  45         [BNXT_ULP_ACT_PROP_IDX_SET_MAC_SRC] =
  46                 BNXT_ULP_ACT_PROP_SZ_SET_MAC_SRC,
  47         [BNXT_ULP_ACT_PROP_IDX_SET_MAC_DST] =
  48                 BNXT_ULP_ACT_PROP_SZ_SET_MAC_DST,
  49         [BNXT_ULP_ACT_PROP_IDX_OF_PUSH_VLAN] =
  50                 BNXT_ULP_ACT_PROP_SZ_OF_PUSH_VLAN,
  51         [BNXT_ULP_ACT_PROP_IDX_OF_SET_VLAN_PCP] =
  52                 BNXT_ULP_ACT_PROP_SZ_OF_SET_VLAN_PCP,
  53         [BNXT_ULP_ACT_PROP_IDX_OF_SET_VLAN_VID] =
  54                 BNXT_ULP_ACT_PROP_SZ_OF_SET_VLAN_VID,
  55         [BNXT_ULP_ACT_PROP_IDX_SET_IPV4_SRC] =
  56                 BNXT_ULP_ACT_PROP_SZ_SET_IPV4_SRC,
  57         [BNXT_ULP_ACT_PROP_IDX_SET_IPV4_DST] =
  58                 BNXT_ULP_ACT_PROP_SZ_SET_IPV4_DST,
  59         [BNXT_ULP_ACT_PROP_IDX_SET_IPV6_SRC] =
  60                 BNXT_ULP_ACT_PROP_SZ_SET_IPV6_SRC,
  61         [BNXT_ULP_ACT_PROP_IDX_SET_IPV6_DST] =
  62                 BNXT_ULP_ACT_PROP_SZ_SET_IPV6_DST,
  63         [BNXT_ULP_ACT_PROP_IDX_SET_TP_SRC] =
  64                 BNXT_ULP_ACT_PROP_SZ_SET_TP_SRC,
  65         [BNXT_ULP_ACT_PROP_IDX_SET_TP_DST] =
  66                 BNXT_ULP_ACT_PROP_SZ_SET_TP_DST,
  67         [BNXT_ULP_ACT_PROP_IDX_OF_PUSH_MPLS_0] =
  68                 BNXT_ULP_ACT_PROP_SZ_OF_PUSH_MPLS_0,
  69         [BNXT_ULP_ACT_PROP_IDX_OF_PUSH_MPLS_1] =
  70                 BNXT_ULP_ACT_PROP_SZ_OF_PUSH_MPLS_1,
  71         [BNXT_ULP_ACT_PROP_IDX_OF_PUSH_MPLS_2] =
  72                 BNXT_ULP_ACT_PROP_SZ_OF_PUSH_MPLS_2,
  73         [BNXT_ULP_ACT_PROP_IDX_OF_PUSH_MPLS_3] =
  74                 BNXT_ULP_ACT_PROP_SZ_OF_PUSH_MPLS_3,
  75         [BNXT_ULP_ACT_PROP_IDX_OF_PUSH_MPLS_4] =
  76                 BNXT_ULP_ACT_PROP_SZ_OF_PUSH_MPLS_4,
  77         [BNXT_ULP_ACT_PROP_IDX_OF_PUSH_MPLS_5] =
  78                 BNXT_ULP_ACT_PROP_SZ_OF_PUSH_MPLS_5,
  79         [BNXT_ULP_ACT_PROP_IDX_OF_PUSH_MPLS_6] =
  80                 BNXT_ULP_ACT_PROP_SZ_OF_PUSH_MPLS_6,
  81         [BNXT_ULP_ACT_PROP_IDX_OF_PUSH_MPLS_7] =
  82                 BNXT_ULP_ACT_PROP_SZ_OF_PUSH_MPLS_7,
  83         [BNXT_ULP_ACT_PROP_IDX_ENCAP_L2_DMAC] =
  84                 BNXT_ULP_ACT_PROP_SZ_ENCAP_L2_DMAC,
  85         [BNXT_ULP_ACT_PROP_IDX_ENCAP_L2_SMAC] =
  86                 BNXT_ULP_ACT_PROP_SZ_ENCAP_L2_SMAC,
  87         [BNXT_ULP_ACT_PROP_IDX_ENCAP_VTAG] =
  88                 BNXT_ULP_ACT_PROP_SZ_ENCAP_VTAG,
  89         [BNXT_ULP_ACT_PROP_IDX_ENCAP_IP] =
  90                 BNXT_ULP_ACT_PROP_SZ_ENCAP_IP,
  91         [BNXT_ULP_ACT_PROP_IDX_ENCAP_IP_SRC] =
  92                 BNXT_ULP_ACT_PROP_SZ_ENCAP_IP_SRC,
  93         [BNXT_ULP_ACT_PROP_IDX_ENCAP_UDP] =
  94                 BNXT_ULP_ACT_PROP_SZ_ENCAP_UDP,
  95         [BNXT_ULP_ACT_PROP_IDX_ENCAP_TUN] =
  96                 BNXT_ULP_ACT_PROP_SZ_ENCAP_TUN,
  97         [BNXT_ULP_ACT_PROP_IDX_LAST] =
  98                 BNXT_ULP_ACT_PROP_SZ_LAST
  99 };
 100
 101 struct bnxt_ulp_rte_act_info ulp_act_info[] = {
 102         [RTE_FLOW_ACTION_TYPE_END] = {
 103                 .act_type                = BNXT_ULP_ACT_TYPE_END,
 104                 .proto_act_func          = NULL
 105         },
 106         [RTE_FLOW_ACTION_TYPE_VOID] = {
 107                 .act_type                = BNXT_ULP_ACT_TYPE_SUPPORTED,
 108                 .proto_act_func          = ulp_rte_void_act_handler
 109         },
 110         [RTE_FLOW_ACTION_TYPE_PASSTHRU] = {
 111                 .act_type                = BNXT_ULP_ACT_TYPE_NOT_SUPPORTED,
 112                 .proto_act_func          = NULL
 113         },
 114         [RTE_FLOW_ACTION_TYPE_JUMP] = {
 115                 .act_type                = BNXT_ULP_ACT_TYPE_NOT_SUPPORTED,
 116                 .proto_act_func          = NULL
 117         },
 118         [RTE_FLOW_ACTION_TYPE_MARK] = {
 119                 .act_type                = BNXT_ULP_ACT_TYPE_SUPPORTED,
 120                 .proto_act_func          = ulp_rte_mark_act_handler
 121         },
 122         [RTE_FLOW_ACTION_TYPE_FLAG] = {
 123                 .act_type                = BNXT_ULP_ACT_TYPE_NOT_SUPPORTED,
 124                 .proto_act_func          = NULL
 125         },
 126         [RTE_FLOW_ACTION_TYPE_QUEUE] = {
 127                 .act_type                = BNXT_ULP_ACT_TYPE_NOT_SUPPORTED,
 128                 .proto_act_func          = NULL
 129         },
 130         [RTE_FLOW_ACTION_TYPE_DROP] = {
 131                 .act_type                = BNXT_ULP_ACT_TYPE_SUPPORTED,
 132                 .proto_act_func          = ulp_rte_drop_act_handler
 133         },
 134         [RTE_FLOW_ACTION_TYPE_COUNT] = {
 135                 .act_type                = BNXT_ULP_ACT_TYPE_SUPPORTED,
 136                 .proto_act_func          = ulp_rte_count_act_handler
 137         },
 138         [RTE_FLOW_ACTION_TYPE_RSS] = {
 139                 .act_type                = BNXT_ULP_ACT_TYPE_SUPPORTED,
 140                 .proto_act_func          = ulp_rte_rss_act_handler
 141         },
 142         [RTE_FLOW_ACTION_TYPE_PF] = {
 143                 .act_type                = BNXT_ULP_ACT_TYPE_SUPPORTED,
 144                 .proto_act_func          = ulp_rte_pf_act_handler
 145         },
 146         [RTE_FLOW_ACTION_TYPE_VF] = {
 147                 .act_type                = BNXT_ULP_ACT_TYPE_SUPPORTED,
 148                 .proto_act_func          = ulp_rte_vf_act_handler
 149         },
 150         [RTE_FLOW_ACTION_TYPE_PHY_PORT] = {
 151                 .act_type                = BNXT_ULP_ACT_TYPE_SUPPORTED,
 152                 .proto_act_func          = ulp_rte_phy_port_act_handler
 153         },
 154         [RTE_FLOW_ACTION_TYPE_PORT_ID] = {
 155                 .act_type                = BNXT_ULP_ACT_TYPE_SUPPORTED,
 156                 .proto_act_func          = ulp_rte_port_id_act_handler
 157         },
 158         [RTE_FLOW_ACTION_TYPE_METER] = {
 159                 .act_type                = BNXT_ULP_ACT_TYPE_NOT_SUPPORTED,
 160                 .proto_act_func          = NULL
 161         },
 162         [RTE_FLOW_ACTION_TYPE_SECURITY] = {
 163                 .act_type                = BNXT_ULP_ACT_TYPE_NOT_SUPPORTED,
 164                 .proto_act_func          = NULL
 165         },
 166         [RTE_FLOW_ACTION_TYPE_OF_SET_MPLS_TTL] = {
 167                 .act_type                = BNXT_ULP_ACT_TYPE_NOT_SUPPORTED,
 168                 .proto_act_func          = NULL
 169         },
 170         [RTE_FLOW_ACTION_TYPE_OF_DEC_MPLS_TTL] = {
 171                 .act_type                = BNXT_ULP_ACT_TYPE_NOT_SUPPORTED,
 172                 .proto_act_func          = NULL
 173         },
 174         [RTE_FLOW_ACTION_TYPE_OF_SET_NW_TTL] = {
 175                 .act_type                = BNXT_ULP_ACT_TYPE_NOT_SUPPORTED,
 176                 .proto_act_func          = NULL
 177         },
 178         [RTE_FLOW_ACTION_TYPE_OF_DEC_NW_TTL] = {
 179                 .act_type                = BNXT_ULP_ACT_TYPE_NOT_SUPPORTED,
 180                 .proto_act_func          = NULL
 181         },
 182         [RTE_FLOW_ACTION_TYPE_OF_COPY_TTL_OUT] = {
 183                 .act_type                = BNXT_ULP_ACT_TYPE_NOT_SUPPORTED,
 184                 .proto_act_func          = NULL
 185         },
 186         [RTE_FLOW_ACTION_TYPE_OF_COPY_TTL_IN] = {
 187                 .act_type                = BNXT_ULP_ACT_TYPE_NOT_SUPPORTED,
 188                 .proto_act_func          = NULL
 189         },
 190         [RTE_FLOW_ACTION_TYPE_OF_POP_VLAN] = {
 191                 .act_type                = BNXT_ULP_ACT_TYPE_NOT_SUPPORTED,
 192                 .proto_act_func          = NULL
 193         },
 194         [RTE_FLOW_ACTION_TYPE_OF_PUSH_VLAN] = {
 195                 .act_type                = BNXT_ULP_ACT_TYPE_NOT_SUPPORTED,
 196                 .proto_act_func          = NULL
 197         },
 198         [RTE_FLOW_ACTION_TYPE_OF_SET_VLAN_VID] = {
 199                 .act_type                = BNXT_ULP_ACT_TYPE_NOT_SUPPORTED,
 200                 .proto_act_func          = NULL
 201         },
 202         [RTE_FLOW_ACTION_TYPE_OF_SET_VLAN_PCP] = {
 203                 .act_type                = BNXT_ULP_ACT_TYPE_NOT_SUPPORTED,
 204                 .proto_act_func          = NULL
 205         },
 206         [RTE_FLOW_ACTION_TYPE_OF_POP_MPLS] = {
 207                 .act_type                = BNXT_ULP_ACT_TYPE_NOT_SUPPORTED,
 208                 .proto_act_func          = NULL
 209         },
 210         [RTE_FLOW_ACTION_TYPE_OF_PUSH_MPLS] = {
 211                 .act_type                = BNXT_ULP_ACT_TYPE_NOT_SUPPORTED,
 212                 .proto_act_func          = NULL
 213         },
 214         [RTE_FLOW_ACTION_TYPE_VXLAN_ENCAP] = {
 215                 .act_type                = BNXT_ULP_ACT_TYPE_SUPPORTED,
 216                 .proto_act_func          = ulp_rte_vxlan_encap_act_handler
 217         },
 218         [RTE_FLOW_ACTION_TYPE_VXLAN_DECAP] = {
 219                 .act_type                = BNXT_ULP_ACT_TYPE_SUPPORTED,
 220                 .proto_act_func          = ulp_rte_vxlan_decap_act_handler
 221         },
 222         [RTE_FLOW_ACTION_TYPE_NVGRE_ENCAP] = {
 223                 .act_type                = BNXT_ULP_ACT_TYPE_NOT_SUPPORTED,
 224                 .proto_act_func          = NULL
 225         },
 226         [RTE_FLOW_ACTION_TYPE_NVGRE_DECAP] = {
 227                 .act_type                = BNXT_ULP_ACT_TYPE_NOT_SUPPORTED,
 228                 .proto_act_func          = NULL
 229         },
 230         [RTE_FLOW_ACTION_TYPE_RAW_ENCAP] = {
 231                 .act_type                = BNXT_ULP_ACT_TYPE_NOT_SUPPORTED,
 232                 .proto_act_func          = NULL
 233         },
 234         [RTE_FLOW_ACTION_TYPE_RAW_DECAP] = {
 235                 .act_type                = BNXT_ULP_ACT_TYPE_NOT_SUPPORTED,
 236                 .proto_act_func          = NULL
 237         },
 238         [RTE_FLOW_ACTION_TYPE_SET_IPV4_SRC] = {
 239                 .act_type                = BNXT_ULP_ACT_TYPE_NOT_SUPPORTED,
 240                 .proto_act_func          = NULL
 241         },
 242         [RTE_FLOW_ACTION_TYPE_SET_IPV4_DST] = {
 243                 .act_type                = BNXT_ULP_ACT_TYPE_NOT_SUPPORTED,
 244                 .proto_act_func          = NULL
 245         },
 246         [RTE_FLOW_ACTION_TYPE_SET_IPV6_SRC] = {
 247                 .act_type                = BNXT_ULP_ACT_TYPE_NOT_SUPPORTED,
 248                 .proto_act_func          = NULL
 249         },
 250         [RTE_FLOW_ACTION_TYPE_SET_IPV6_DST] = {
 251                 .act_type                = BNXT_ULP_ACT_TYPE_NOT_SUPPORTED,
 252                 .proto_act_func          = NULL
 253         },
 254         [RTE_FLOW_ACTION_TYPE_SET_TP_SRC] = {
 255                 .act_type                = BNXT_ULP_ACT_TYPE_NOT_SUPPORTED,
 256                 .proto_act_func          = NULL
 257         },
 258         [RTE_FLOW_ACTION_TYPE_SET_TP_DST] = {
 259                 .act_type                = BNXT_ULP_ACT_TYPE_NOT_SUPPORTED,
 260                 .proto_act_func          = NULL
 261         },
 262         [RTE_FLOW_ACTION_TYPE_MAC_SWAP] = {
 263                 .act_type                = BNXT_ULP_ACT_TYPE_NOT_SUPPORTED,
 264                 .proto_act_func          = NULL
 265         },
 266         [RTE_FLOW_ACTION_TYPE_DEC_TTL] = {
 267                 .act_type                = BNXT_ULP_ACT_TYPE_NOT_SUPPORTED,
 268                 .proto_act_func          = NULL
 269         },
 270         [RTE_FLOW_ACTION_TYPE_SET_TTL] = {
 271                 .act_type                = BNXT_ULP_ACT_TYPE_NOT_SUPPORTED,
 272                 .proto_act_func          = NULL
 273         },
 274         [RTE_FLOW_ACTION_TYPE_SET_MAC_SRC] = {
 275                 .act_type                = BNXT_ULP_ACT_TYPE_NOT_SUPPORTED,
 276                 .proto_act_func          = NULL
 277         },
 278         [RTE_FLOW_ACTION_TYPE_SET_MAC_DST] = {
 279                 .act_type                = BNXT_ULP_ACT_TYPE_NOT_SUPPORTED,
 280                 .proto_act_func          = NULL
 281         },
 282         [RTE_FLOW_ACTION_TYPE_INC_TCP_SEQ] = {
 283                 .act_type                = BNXT_ULP_ACT_TYPE_NOT_SUPPORTED,
 284                 .proto_act_func          = NULL
 285         },
 286         [RTE_FLOW_ACTION_TYPE_DEC_TCP_SEQ] = {
 287                 .act_type                = BNXT_ULP_ACT_TYPE_NOT_SUPPORTED,
 288                 .proto_act_func          = NULL
 289         },
 290         [RTE_FLOW_ACTION_TYPE_INC_TCP_ACK] = {
 291                 .act_type                = BNXT_ULP_ACT_TYPE_NOT_SUPPORTED,
 292                 .proto_act_func          = NULL
 293         },
 294         [RTE_FLOW_ACTION_TYPE_DEC_TCP_ACK] = {
 295                 .act_type                = BNXT_ULP_ACT_TYPE_NOT_SUPPORTED,
 296                 .proto_act_func          = NULL
 297         }
 298 };
 299
 300 struct bnxt_ulp_device_params ulp_device_params[] = {
 301         [BNXT_ULP_DEVICE_ID_WH_PLUS] = {
 302                 .global_fid_enable       = BNXT_ULP_SYM_YES,
 303                 .byte_order              = (enum bnxt_ulp_byte_order)
 304                                                 BNXT_ULP_SYM_LITTLE_ENDIAN,
 305                 .encap_byte_swap         = 1,
 306                 .lfid_entries            = 16384,
 307                 .lfid_entry_size         = 4,
 308                 .gfid_entries            = 65536,
 309                 .gfid_entry_size         = 4,
 310                 .num_flows               = 32768,
 311                 .num_resources_per_flow  = 8
 312         }
 313 };
 314
 315 struct bnxt_ulp_rte_hdr_info ulp_hdr_info[] = {
 316         [RTE_FLOW_ITEM_TYPE_END] = {
 317                 .hdr_type                = BNXT_ULP_HDR_TYPE_END,
 318                 .proto_hdr_func          = NULL
 319         },
 320         [RTE_FLOW_ITEM_TYPE_VOID] = {
 321                 .hdr_type                = BNXT_ULP_HDR_TYPE_SUPPORTED,
 322                 .proto_hdr_func          = ulp_rte_void_hdr_handler
 323         },
 324         [RTE_FLOW_ITEM_TYPE_INVERT] = {
 325                 .hdr_type                = BNXT_ULP_HDR_TYPE_NOT_SUPPORTED,
 326                 .proto_hdr_func          = NULL
 327         },
 328         [RTE_FLOW_ITEM_TYPE_ANY] = {
 329                 .hdr_type                = BNXT_ULP_HDR_TYPE_NOT_SUPPORTED,
 330                 .proto_hdr_func          = NULL
 331         },
 332         [RTE_FLOW_ITEM_TYPE_PF] = {
 333                 .hdr_type                = BNXT_ULP_HDR_TYPE_SUPPORTED,
 334                 .proto_hdr_func          = ulp_rte_pf_hdr_handler
 335         },
 336         [RTE_FLOW_ITEM_TYPE_VF] = {
 337                 .hdr_type                = BNXT_ULP_HDR_TYPE_SUPPORTED,
 338                 .proto_hdr_func          = ulp_rte_vf_hdr_handler
 339         },
 340         [RTE_FLOW_ITEM_TYPE_PHY_PORT] = {
 341                 .hdr_type                = BNXT_ULP_HDR_TYPE_SUPPORTED,
 342                 .proto_hdr_func          = ulp_rte_phy_port_hdr_handler
 343         },
 344         [RTE_FLOW_ITEM_TYPE_PORT_ID] = {
 345                 .hdr_type                = BNXT_ULP_HDR_TYPE_SUPPORTED,
 346                 .proto_hdr_func          = ulp_rte_port_id_hdr_handler
 347         },
 348         [RTE_FLOW_ITEM_TYPE_RAW] = {
 349                 .hdr_type                = BNXT_ULP_HDR_TYPE_NOT_SUPPORTED,
 350                 .proto_hdr_func          = NULL
 351         },
 352         [RTE_FLOW_ITEM_TYPE_ETH] = {
 353                 .hdr_type                = BNXT_ULP_HDR_TYPE_SUPPORTED,
 354                 .proto_hdr_func          = ulp_rte_eth_hdr_handler
 355         },
 356         [RTE_FLOW_ITEM_TYPE_VLAN] = {
 357                 .hdr_type                = BNXT_ULP_HDR_TYPE_SUPPORTED,
 358                 .proto_hdr_func          = ulp_rte_vlan_hdr_handler
 359         },
 360         [RTE_FLOW_ITEM_TYPE_IPV4] = {
 361                 .hdr_type                = BNXT_ULP_HDR_TYPE_SUPPORTED,
 362                 .proto_hdr_func          = ulp_rte_ipv4_hdr_handler
 363         },
 364         [RTE_FLOW_ITEM_TYPE_IPV6] = {
 365                 .hdr_type                = BNXT_ULP_HDR_TYPE_SUPPORTED,
 366                 .proto_hdr_func          = ulp_rte_ipv6_hdr_handler
 367         },
 368         [RTE_FLOW_ITEM_TYPE_ICMP] = {
 369                 .hdr_type                = BNXT_ULP_HDR_TYPE_NOT_SUPPORTED,
 370                 .proto_hdr_func          = NULL
 371         },
 372         [RTE_FLOW_ITEM_TYPE_UDP] = {
 373                 .hdr_type                = BNXT_ULP_HDR_TYPE_SUPPORTED,
 374                 .proto_hdr_func          = ulp_rte_udp_hdr_handler
 375         },
 376         [RTE_FLOW_ITEM_TYPE_TCP] = {
 377                 .hdr_type                = BNXT_ULP_HDR_TYPE_SUPPORTED,
 378                 .proto_hdr_func          = ulp_rte_tcp_hdr_handler
 379         },
 380         [RTE_FLOW_ITEM_TYPE_SCTP] = {
 381                 .hdr_type                = BNXT_ULP_HDR_TYPE_NOT_SUPPORTED,
 382                 .proto_hdr_func          = NULL
 383         },
 384         [RTE_FLOW_ITEM_TYPE_VXLAN] = {
 385                 .hdr_type                = BNXT_ULP_HDR_TYPE_SUPPORTED,
 386                 .proto_hdr_func          = ulp_rte_vxlan_hdr_handler
 387         },
 388         [RTE_FLOW_ITEM_TYPE_E_TAG] = {
 389                 .hdr_type                = BNXT_ULP_HDR_TYPE_NOT_SUPPORTED,
 390                 .proto_hdr_func          = NULL
 391         },
 392         [RTE_FLOW_ITEM_TYPE_NVGRE] = {
 393                 .hdr_type                = BNXT_ULP_HDR_TYPE_NOT_SUPPORTED,
 394                 .proto_hdr_func          = NULL
 395         },
 396         [RTE_FLOW_ITEM_TYPE_MPLS] = {
 397                 .hdr_type                = BNXT_ULP_HDR_TYPE_NOT_SUPPORTED,
 398                 .proto_hdr_func          = NULL
 399         },
 400         [RTE_FLOW_ITEM_TYPE_GRE] = {
 401                 .hdr_type                = BNXT_ULP_HDR_TYPE_NOT_SUPPORTED,
 402                 .proto_hdr_func          = NULL
 403         },
 404         [RTE_FLOW_ITEM_TYPE_FUZZY] = {
 405                 .hdr_type                = BNXT_ULP_HDR_TYPE_NOT_SUPPORTED,
 406                 .proto_hdr_func          = NULL
 407         },
 408         [RTE_FLOW_ITEM_TYPE_GTP] = {
 409                 .hdr_type                = BNXT_ULP_HDR_TYPE_NOT_SUPPORTED,
 410                 .proto_hdr_func          = NULL
 411         },
 412         [RTE_FLOW_ITEM_TYPE_GTPC] = {
 413                 .hdr_type                = BNXT_ULP_HDR_TYPE_NOT_SUPPORTED,
 414                 .proto_hdr_func          = NULL
 415         },
 416         [RTE_FLOW_ITEM_TYPE_GTPU] = {
 417                 .hdr_type                = BNXT_ULP_HDR_TYPE_NOT_SUPPORTED,
 418                 .proto_hdr_func          = NULL
 419         },
 420         [RTE_FLOW_ITEM_TYPE_ESP] = {
 421                 .hdr_type                = BNXT_ULP_HDR_TYPE_NOT_SUPPORTED,
 422                 .proto_hdr_func          = NULL
 423         },
 424         [RTE_FLOW_ITEM_TYPE_GENEVE] = {
 425                 .hdr_type                = BNXT_ULP_HDR_TYPE_NOT_SUPPORTED,
 426                 .proto_hdr_func          = NULL
 427         },
 428         [RTE_FLOW_ITEM_TYPE_VXLAN_GPE] = {
 429                 .hdr_type                = BNXT_ULP_HDR_TYPE_NOT_SUPPORTED,
 430                 .proto_hdr_func          = NULL
 431         },
 432         [RTE_FLOW_ITEM_TYPE_ARP_ETH_IPV4] = {
 433                 .hdr_type                = BNXT_ULP_HDR_TYPE_NOT_SUPPORTED,
 434                 .proto_hdr_func          = NULL
 435         },
 436         [RTE_FLOW_ITEM_TYPE_IPV6_EXT] = {
 437                 .hdr_type                = BNXT_ULP_HDR_TYPE_NOT_SUPPORTED,
 438                 .proto_hdr_func          = NULL
 439         },
 440         [RTE_FLOW_ITEM_TYPE_ICMP6] = {
 441                 .hdr_type                = BNXT_ULP_HDR_TYPE_NOT_SUPPORTED,
 442                 .proto_hdr_func          = NULL
 443         },
 444         [RTE_FLOW_ITEM_TYPE_ICMP6_ND_NS] = {
 445                 .hdr_type                = BNXT_ULP_HDR_TYPE_NOT_SUPPORTED,
 446                 .proto_hdr_func          = NULL
 447         },
 448         [RTE_FLOW_ITEM_TYPE_ICMP6_ND_NA] = {
 449                 .hdr_type                = BNXT_ULP_HDR_TYPE_NOT_SUPPORTED,
 450                 .proto_hdr_func          = NULL
 451         },
 452         [RTE_FLOW_ITEM_TYPE_ICMP6_ND_OPT] = {
 453                 .hdr_type                = BNXT_ULP_HDR_TYPE_NOT_SUPPORTED,
 454                 .proto_hdr_func          = NULL
 455         },
 456         [RTE_FLOW_ITEM_TYPE_ICMP6_ND_OPT_SLA_ETH] = {
 457                 .hdr_type                = BNXT_ULP_HDR_TYPE_NOT_SUPPORTED,
 458                 .proto_hdr_func          = NULL
 459         },
 460         [RTE_FLOW_ITEM_TYPE_ICMP6_ND_OPT_TLA_ETH] = {
 461                 .hdr_type                = BNXT_ULP_HDR_TYPE_NOT_SUPPORTED,
 462                 .proto_hdr_func          = NULL
 463         },
 464         [RTE_FLOW_ITEM_TYPE_MARK] = {
 465                 .hdr_type                = BNXT_ULP_HDR_TYPE_NOT_SUPPORTED,
 466                 .proto_hdr_func          = NULL
 467         },
 468         [RTE_FLOW_ITEM_TYPE_META] = {
 469                 .hdr_type                = BNXT_ULP_HDR_TYPE_NOT_SUPPORTED,
 470                 .proto_hdr_func          = NULL
 471         },
 472         [RTE_FLOW_ITEM_TYPE_GRE_KEY] = {
 473                 .hdr_type                = BNXT_ULP_HDR_TYPE_NOT_SUPPORTED,
 474                 .proto_hdr_func          = NULL
 475         },
 476         [RTE_FLOW_ITEM_TYPE_GTP_PSC] = {
 477                 .hdr_type                = BNXT_ULP_HDR_TYPE_NOT_SUPPORTED,
 478                 .proto_hdr_func          = NULL
 479         },
 480         [RTE_FLOW_ITEM_TYPE_PPPOES] = {
 481                 .hdr_type                = BNXT_ULP_HDR_TYPE_NOT_SUPPORTED,
 482                 .proto_hdr_func          = NULL
 483         },
 484         [RTE_FLOW_ITEM_TYPE_PPPOED] = {
 485                 .hdr_type                = BNXT_ULP_HDR_TYPE_NOT_SUPPORTED,
 486                 .proto_hdr_func          = NULL
 487         },
 488         [RTE_FLOW_ITEM_TYPE_PPPOE_PROTO_ID] = {
 489                 .hdr_type                = BNXT_ULP_HDR_TYPE_NOT_SUPPORTED,
 490                 .proto_hdr_func          = NULL
 491         },
 492         [RTE_FLOW_ITEM_TYPE_NSH] = {
 493                 .hdr_type                = BNXT_ULP_HDR_TYPE_NOT_SUPPORTED,
 494                 .proto_hdr_func          = NULL
 495         },
 496         [RTE_FLOW_ITEM_TYPE_IGMP] = {
 497                 .hdr_type                = BNXT_ULP_HDR_TYPE_NOT_SUPPORTED,
 498                 .proto_hdr_func          = NULL
 499         },
 500         [RTE_FLOW_ITEM_TYPE_AH] = {
 501                 .hdr_type                = BNXT_ULP_HDR_TYPE_NOT_SUPPORTED,
 502                 .proto_hdr_func          = NULL
 503         },
 504         [RTE_FLOW_ITEM_TYPE_HIGIG2] = {
 505                 .hdr_type                = BNXT_ULP_HDR_TYPE_NOT_SUPPORTED,
 506                 .proto_hdr_func          = NULL
 507         }
 508 };
 509
 510 uint32_t bnxt_ulp_encap_vtag_map[] = {
 511         [0] = BNXT_ULP_ENCAP_VTAG_ENCODING_NOP,
 512         [1] = BNXT_ULP_ENCAP_VTAG_ENCODING_STAG_ECAP_PRI,
 513         [2] = BNXT_ULP_ENCAP_VTAG_ENCODING_DTAG_ECAP_PRI
 514 };
 515
 516 uint16_t ulp_class_sig_tbl[BNXT_ULP_CLASS_SIG_TBL_MAX_SZ] = {
 517         [BNXT_ULP_CLASS_HID_0092] = 1
 518 };
 519
 520 struct bnxt_ulp_class_match_info ulp_class_match_list[] = {
 521         [1] = {
 522         .class_hid = BNXT_ULP_CLASS_HID_0092,
 523         .hdr_sig = { .bits =
 524                 BNXT_ULP_HDR_BIT_O_ETH |
 525                 BNXT_ULP_HDR_BIT_O_IPV4 |
 526                 BNXT_ULP_HDR_BIT_O_UDP |
 527                 BNXT_ULP_FLOW_DIR_BITMASK_ING },
 528         .field_sig = { .bits =
 529                 BNXT_ULP_HF0_BITMASK_O_IPV4_SRC_ADDR |
 530                 BNXT_ULP_HF0_BITMASK_O_IPV4_DST_ADDR |
 531                 BNXT_ULP_HF0_BITMASK_O_UDP_SRC_PORT |
 532                 BNXT_ULP_HF0_BITMASK_O_UDP_DST_PORT |
 533                 BNXT_ULP_MATCH_TYPE_BITMASK_EM },
 534         .class_tid = 0,
 535         .act_vnic = 0,
 536         .wc_pri = 0
 537         }
 538 };
 539
 540 uint16_t ulp_act_sig_tbl[BNXT_ULP_ACT_SIG_TBL_MAX_SZ] = {
 541         [BNXT_ULP_ACT_HID_0029] = 1
 542 };
 543
 544 struct bnxt_ulp_act_match_info ulp_act_match_list[] = {
 545         [1] = {
 546         .act_hid = BNXT_ULP_ACT_HID_0029,
 547         .act_sig = { .bits =
 548                 BNXT_ULP_ACTION_BIT_MARK |
 549                 BNXT_ULP_ACTION_BIT_RSS |
 550                 BNXT_ULP_ACTION_BIT_VNIC |
 551                 BNXT_ULP_FLOW_DIR_BITMASK_ING },
 552         .act_tid = 0
 553         }
 554 };
 555
 556 struct bnxt_ulp_mapper_tbl_list_info ulp_class_tmpl_list[] = {
 557         [((0 << BNXT_ULP_LOG2_MAX_NUM_DEV) |
 558                 BNXT_ULP_DEVICE_ID_WH_PLUS)] = {
 559         .device_name = BNXT_ULP_DEVICE_ID_WH_PLUS,
 560         .num_tbls = 3,
 561         .start_tbl_idx = 0
 562         }
 563 };
 564
 565 struct bnxt_ulp_mapper_class_tbl_info ulp_class_tbl_list[] = {
 566         {
 567         .resource_func = BNXT_ULP_RESOURCE_FUNC_TCAM_TABLE,
 568         .table_type = TF_TCAM_TBL_TYPE_L2_CTXT_TCAM,
 569         .direction = TF_DIR_RX,
 570         .priority = BNXT_ULP_PRIORITY_LEVEL_0,
 571         .srch_b4_alloc = BNXT_ULP_SEARCH_BEFORE_ALLOC_NO,
 572         .key_start_idx = 0,
 573         .blob_key_bit_size = 167,
 574         .key_bit_size = 167,
 575         .key_num_fields = 13,
 576         .result_start_idx = 0,
 577         .result_bit_size = 64,
 578         .result_num_fields = 13,
 579         .ident_start_idx = 0,
 580         .ident_nums = 2,
 581         .mark_enable = BNXT_ULP_MARK_ENABLE_NO,
 582         .critical_resource = 0,
 583         .regfile_wr_idx = BNXT_ULP_REGFILE_INDEX_NOT_USED
 584         },
 585         {
 586         .resource_func = BNXT_ULP_RESOURCE_FUNC_TCAM_TABLE,
 587         .table_type = TF_TCAM_TBL_TYPE_PROF_TCAM,
 588         .direction = TF_DIR_RX,
 589         .priority = BNXT_ULP_PRIORITY_LEVEL_0,
 590         .srch_b4_alloc = BNXT_ULP_SEARCH_BEFORE_ALLOC_NO,
 591         .key_start_idx = 13,
 592         .blob_key_bit_size = 81,
 593         .key_bit_size = 81,
 594         .key_num_fields = 42,
 595         .result_start_idx = 13,
 596         .result_bit_size = 38,
 597         .result_num_fields = 8,
 598         .ident_start_idx = 2,
 599         .ident_nums = 1,
 600         .mark_enable = BNXT_ULP_MARK_ENABLE_NO,
 601         .critical_resource = 0,
 602         .regfile_wr_idx = BNXT_ULP_REGFILE_INDEX_NOT_USED
 603         },
 604         {
 605         .resource_func = BNXT_ULP_RESOURCE_FUNC_EM_TABLE,
 606         .table_type = TF_MEM_EXTERNAL,
 607         .direction = TF_DIR_RX,
 608         .priority = BNXT_ULP_PRIORITY_NOT_USED,
 609         .srch_b4_alloc = BNXT_ULP_SEARCH_BEFORE_ALLOC_NO,
 610         .key_start_idx = 55,
 611         .blob_key_bit_size = 448,
 612         .key_bit_size = 448,
 613         .key_num_fields = 11,
 614         .result_start_idx = 21,
 615         .result_bit_size = 64,
 616         .result_num_fields = 9,
 617         .ident_nums = 0,
 618         .mark_enable = BNXT_ULP_MARK_ENABLE_YES,
 619         .critical_resource = 1,
 620         .regfile_wr_idx = BNXT_ULP_REGFILE_INDEX_NOT_USED
 621         }
 622 };
 623
 624 struct bnxt_ulp_mapper_class_key_field_info ulp_class_key_field_list[] = {
 625         {
 626         .field_bit_size = 12,
 627         .mask_opcode = BNXT_ULP_MASK_OPC_SET_TO_CONSTANT,
 628         .mask_operand = {0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
 629                 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00},
 630         .spec_opcode = BNXT_ULP_SPEC_OPC_SET_TO_CONSTANT,
 631         .spec_operand = {0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
 632                 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}
 633         },
 634         {
 635         .field_bit_size = 12,
 636         .mask_opcode = BNXT_ULP_MASK_OPC_SET_TO_CONSTANT,
 637         .mask_operand = {0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
 638                 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00},
 639         .spec_opcode = BNXT_ULP_SPEC_OPC_SET_TO_CONSTANT,
 640         .spec_operand = {0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
 641                 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}
 642         },
 643         {
 644         .field_bit_size = 48,
 645         .mask_opcode = BNXT_ULP_MASK_OPC_SET_TO_CONSTANT,
 646         .mask_operand = {0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
 647                 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00},
 648         .spec_opcode = BNXT_ULP_SPEC_OPC_SET_TO_CONSTANT,
 649         .spec_operand = {0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
 650                 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}
 651         },
 652         {
 653         .field_bit_size = 8,
 654         .mask_opcode = BNXT_ULP_MASK_OPC_SET_TO_HDR_FIELD,
 655         .mask_operand = {(BNXT_ULP_HF0_IDX_SVIF_INDEX >> 8) & 0xff,
 656                 BNXT_ULP_HF0_IDX_SVIF_INDEX & 0xff,
 657                 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
 658                 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00},
 659         .spec_opcode = BNXT_ULP_SPEC_OPC_SET_TO_HDR_FIELD,
 660         .spec_operand = {(BNXT_ULP_HF0_IDX_SVIF_INDEX >> 8) & 0xff,
 661                 BNXT_ULP_HF0_IDX_SVIF_INDEX & 0xff,
 662                 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
 663                 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}
 664         },
 665         {
 666         .field_bit_size = 4,
 667         .mask_opcode = BNXT_ULP_MASK_OPC_SET_TO_CONSTANT,
 668         .mask_operand = {0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
 669                 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00},
 670         .spec_opcode = BNXT_ULP_SPEC_OPC_SET_TO_CONSTANT,
 671         .spec_operand = {0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
 672                 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}
 673         },
 674         {
 675         .field_bit_size = 12,
 676         .mask_opcode = BNXT_ULP_MASK_OPC_SET_TO_CONSTANT,
 677         .mask_operand = {0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
 678                 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00},
 679         .spec_opcode = BNXT_ULP_SPEC_OPC_SET_TO_CONSTANT,
 680         .spec_operand = {0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
 681                 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}
 682         },
 683         {
 684         .field_bit_size = 12,
 685         .mask_opcode = BNXT_ULP_MASK_OPC_SET_TO_CONSTANT,
 686         .mask_operand = {0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
 687                 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00},
 688         .spec_opcode = BNXT_ULP_SPEC_OPC_SET_TO_CONSTANT,
 689         .spec_operand = {0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
 690                 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}
 691         },
 692         {
 693         .field_bit_size = 48,
 694         .mask_opcode = BNXT_ULP_MASK_OPC_SET_TO_CONSTANT,
 695         .mask_operand = {0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
 696                 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00},
 697         .spec_opcode = BNXT_ULP_SPEC_OPC_SET_TO_CONSTANT,
 698         .spec_operand = {0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
 699                 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}
 700         },
 701         {
 702         .field_bit_size = 2,
 703         .mask_opcode = BNXT_ULP_MASK_OPC_SET_TO_CONSTANT,
 704         .mask_operand = {0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
 705                 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00},
 706         .spec_opcode = BNXT_ULP_SPEC_OPC_SET_TO_CONSTANT,
 707         .spec_operand = {0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
 708                 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}
 709         },
 710         {
 711         .field_bit_size = 2,
 712         .mask_opcode = BNXT_ULP_MASK_OPC_SET_TO_CONSTANT,
 713         .mask_operand = {0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
 714                 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00},
 715         .spec_opcode = BNXT_ULP_SPEC_OPC_SET_TO_CONSTANT,
 716         .spec_operand = {0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
 717                 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}
 718         },
 719         {
 720         .field_bit_size = 4,
 721         .mask_opcode = BNXT_ULP_MASK_OPC_SET_TO_CONSTANT,
 722         .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
 723                 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff},
 724         .spec_opcode = BNXT_ULP_SPEC_OPC_SET_TO_CONSTANT,
 725         .spec_operand = {BNXT_ULP_SYM_TUN_HDR_TYPE_NONE,
 726                 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
 727                 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}
 728         },
 729         {
 730         .field_bit_size = 2,
 731         .mask_opcode = BNXT_ULP_MASK_OPC_SET_TO_CONSTANT,
 732         .mask_operand = {0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
 733                 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00},
 734         .spec_opcode = BNXT_ULP_SPEC_OPC_SET_TO_CONSTANT,
 735         .spec_operand = {0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
 736                 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}
 737         },
 738         {
 739         .field_bit_size = 1,
 740         .mask_opcode = BNXT_ULP_MASK_OPC_SET_TO_CONSTANT,
 741         .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
 742                 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff},
 743         .spec_opcode = BNXT_ULP_SPEC_OPC_SET_TO_CONSTANT,
 744         .spec_operand = {0x01, 0x00, 0x00, 0x00, 0x00, 0x00,
 745                 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}
 746         },
 747         {
 748         .field_bit_size = 1,
 749         .mask_opcode = BNXT_ULP_MASK_OPC_SET_TO_CONSTANT,
 750         .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
 751                 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff},
 752         .spec_opcode = BNXT_ULP_SPEC_OPC_SET_TO_CONSTANT,
 753         .spec_operand = {0x01, 0x00, 0x00, 0x00, 0x00, 0x00,
 754                 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}
 755         },
 756         {
 757         .field_bit_size = 4,
 758         .mask_opcode = BNXT_ULP_MASK_OPC_SET_TO_CONSTANT,
 759         .mask_operand = {0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
 760                 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00},
 761         .spec_opcode = BNXT_ULP_SPEC_OPC_SET_TO_CONSTANT,
 762         .spec_operand = {0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
 763                 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}
 764         },
 765         {
 766         .field_bit_size = 1,
 767         .mask_opcode = BNXT_ULP_MASK_OPC_SET_TO_CONSTANT,
 768         .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
 769                 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff},
 770         .spec_opcode = BNXT_ULP_SPEC_OPC_SET_TO_CONSTANT,
 771         .spec_operand = {0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
 772                 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}
 773         },
 774         {
 775         .field_bit_size = 1,
 776         .mask_opcode = BNXT_ULP_MASK_OPC_SET_TO_CONSTANT,
 777         .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
 778                 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff},
 779         .spec_opcode = BNXT_ULP_SPEC_OPC_SET_TO_CONSTANT,
 780         .spec_operand = {0x01, 0x00, 0x00, 0x00, 0x00, 0x00,
 781                 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}
 782         },
 783         {
 784         .field_bit_size = 1,
 785         .mask_opcode = BNXT_ULP_MASK_OPC_SET_TO_CONSTANT,
 786         .mask_operand = {0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
 787                 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00},
 788         .spec_opcode = BNXT_ULP_SPEC_OPC_SET_TO_CONSTANT,
 789         .spec_operand = {0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
 790                 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}
 791         },
 792         {
 793         .field_bit_size = 1,
 794         .mask_opcode = BNXT_ULP_MASK_OPC_SET_TO_CONSTANT,
 795         .mask_operand = {0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
 796                 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00},
 797         .spec_opcode = BNXT_ULP_SPEC_OPC_SET_TO_CONSTANT,
 798         .spec_operand = {0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
 799                 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}
 800         },
 801         {
 802         .field_bit_size = 1,
 803         .mask_opcode = BNXT_ULP_MASK_OPC_SET_TO_CONSTANT,
 804         .mask_operand = {0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
 805                 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00},
 806         .spec_opcode = BNXT_ULP_SPEC_OPC_SET_TO_CONSTANT,
 807         .spec_operand = {0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
 808                 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}
 809         },
 810         {
 811         .field_bit_size = 4,
 812         .mask_opcode = BNXT_ULP_MASK_OPC_SET_TO_CONSTANT,
 813         .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
 814                 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff},
 815         .spec_opcode = BNXT_ULP_SPEC_OPC_SET_TO_CONSTANT,
 816         .spec_operand = {BNXT_ULP_SYM_L3_HDR_TYPE_IPV4,
 817                 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
 818                 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}
 819         },
 820         {
 821         .field_bit_size = 1,
 822         .mask_opcode = BNXT_ULP_MASK_OPC_SET_TO_CONSTANT,
 823         .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
 824                 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff},
 825         .spec_opcode = BNXT_ULP_SPEC_OPC_SET_TO_CONSTANT,
 826         .spec_operand = {0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
 827                 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}
 828         },
 829         {
 830         .field_bit_size = 1,
 831         .mask_opcode = BNXT_ULP_MASK_OPC_SET_TO_CONSTANT,
 832         .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
 833                 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff},
 834         .spec_opcode = BNXT_ULP_SPEC_OPC_SET_TO_CONSTANT,
 835         .spec_operand = {0x01, 0x00, 0x00, 0x00, 0x00, 0x00,
 836                 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}
 837         },
 838         {
 839         .field_bit_size = 1,
 840         .mask_opcode = BNXT_ULP_MASK_OPC_SET_TO_CONSTANT,
 841         .mask_operand = {0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
 842                 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00},
 843         .spec_opcode = BNXT_ULP_SPEC_OPC_SET_TO_CONSTANT,
 844         .spec_operand = {0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
 845                 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}
 846         },
 847         {
 848         .field_bit_size = 1,
 849         .mask_opcode = BNXT_ULP_MASK_OPC_SET_TO_CONSTANT,
 850         .mask_operand = {0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
 851                 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00},
 852         .spec_opcode = BNXT_ULP_SPEC_OPC_SET_TO_CONSTANT,
 853         .spec_operand = {0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
 854                 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}
 855         },
 856         {
 857         .field_bit_size = 2,
 858         .mask_opcode = BNXT_ULP_MASK_OPC_SET_TO_CONSTANT,
 859         .mask_operand = {0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
 860                 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00},
 861         .spec_opcode = BNXT_ULP_SPEC_OPC_SET_TO_CONSTANT,
 862         .spec_operand = {0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
 863                 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}
 864         },
 865         {
 866         .field_bit_size = 2,
 867         .mask_opcode = BNXT_ULP_MASK_OPC_SET_TO_CONSTANT,
 868         .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
 869                 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff},
 870         .spec_opcode = BNXT_ULP_SPEC_OPC_SET_TO_CONSTANT,
 871         .spec_operand = {BNXT_ULP_SYM_L2_HDR_TYPE_DIX,
 872                 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
 873                 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}
 874         },
 875         {
 876         .field_bit_size = 1,
 877         .mask_opcode = BNXT_ULP_MASK_OPC_SET_TO_CONSTANT,
 878         .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
 879                 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff},
 880         .spec_opcode = BNXT_ULP_SPEC_OPC_SET_TO_CONSTANT,
 881         .spec_operand = {0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
 882                 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}
 883         },
 884         {
 885         .field_bit_size = 1,
 886         .mask_opcode = BNXT_ULP_MASK_OPC_SET_TO_CONSTANT,
 887         .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
 888                 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff},
 889         .spec_opcode = BNXT_ULP_SPEC_OPC_SET_TO_CONSTANT,
 890         .spec_operand = {0x01, 0x00, 0x00, 0x00, 0x00, 0x00,
 891                 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}
 892         },
 893         {
 894         .field_bit_size = 3,
 895         .mask_opcode = BNXT_ULP_MASK_OPC_SET_TO_CONSTANT,
 896         .mask_operand = {0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
 897                 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00},
 898         .spec_opcode = BNXT_ULP_SPEC_OPC_SET_TO_CONSTANT,
 899         .spec_operand = {0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
 900                 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}
 901         },
 902         {
 903         .field_bit_size = 4,
 904         .mask_opcode = BNXT_ULP_MASK_OPC_SET_TO_CONSTANT,
 905         .mask_operand = {0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
 906                 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00},
 907         .spec_opcode = BNXT_ULP_SPEC_OPC_SET_TO_CONSTANT,
 908         .spec_operand = {BNXT_ULP_SYM_TUN_HDR_TYPE_NONE,
 909                 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
 910                 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}
 911         },
 912         {
 913         .field_bit_size = 1,
 914         .mask_opcode = BNXT_ULP_MASK_OPC_SET_TO_CONSTANT,
 915         .mask_operand = {0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
 916                 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00},
 917         .spec_opcode = BNXT_ULP_SPEC_OPC_SET_TO_CONSTANT,
 918         .spec_operand = {0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
 919                 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}
 920         },
 921         {
 922         .field_bit_size = 1,
 923         .mask_opcode = BNXT_ULP_MASK_OPC_SET_TO_CONSTANT,
 924         .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
 925                 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff},
 926         .spec_opcode = BNXT_ULP_SPEC_OPC_SET_TO_CONSTANT,
 927         .spec_operand = {0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
 928                 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}
 929         },
 930         {
 931         .field_bit_size = 1,
 932         .mask_opcode = BNXT_ULP_MASK_OPC_SET_TO_CONSTANT,
 933         .mask_operand = {0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
 934                 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00},
 935         .spec_opcode = BNXT_ULP_SPEC_OPC_SET_TO_CONSTANT,
 936         .spec_operand = {0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
 937                 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}
 938         },
 939         {
 940         .field_bit_size = 4,
 941         .mask_opcode = BNXT_ULP_MASK_OPC_SET_TO_CONSTANT,
 942         .mask_operand = {0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
 943                 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00},
 944         .spec_opcode = BNXT_ULP_SPEC_OPC_SET_TO_CONSTANT,
 945         .spec_operand = {BNXT_ULP_SYM_TL4_HDR_TYPE_UDP,
 946                 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
 947                 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}
 948         },
 949         {
 950         .field_bit_size = 1,
 951         .mask_opcode = BNXT_ULP_MASK_OPC_SET_TO_CONSTANT,
 952         .mask_operand = {0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
 953                 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00},
 954         .spec_opcode = BNXT_ULP_SPEC_OPC_SET_TO_CONSTANT,
 955         .spec_operand = {0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
 956                 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}
 957         },
 958         {
 959         .field_bit_size = 1,
 960         .mask_opcode = BNXT_ULP_MASK_OPC_SET_TO_CONSTANT,
 961         .mask_operand = {0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
 962                 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00},
 963         .spec_opcode = BNXT_ULP_SPEC_OPC_SET_TO_CONSTANT,
 964         .spec_operand = {0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
 965                 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}
 966         },
 967         {
 968         .field_bit_size = 1,
 969         .mask_opcode = BNXT_ULP_MASK_OPC_SET_TO_CONSTANT,
 970         .mask_operand = {0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
 971                 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00},
 972         .spec_opcode = BNXT_ULP_SPEC_OPC_SET_TO_CONSTANT,
 973         .spec_operand = {0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
 974                 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}
 975         },
 976         {
 977         .field_bit_size = 1,
 978         .mask_opcode = BNXT_ULP_MASK_OPC_SET_TO_CONSTANT,
 979         .mask_operand = {0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
 980                 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00},
 981         .spec_opcode = BNXT_ULP_SPEC_OPC_SET_TO_CONSTANT,
 982         .spec_operand = {0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
 983                 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}
 984         },
 985         {
 986         .field_bit_size = 1,
 987         .mask_opcode = BNXT_ULP_MASK_OPC_SET_TO_CONSTANT,
 988         .mask_operand = {0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
 989                 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00},
 990         .spec_opcode = BNXT_ULP_SPEC_OPC_SET_TO_CONSTANT,
 991         .spec_operand = {0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
 992                 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}
 993         },
 994         {
 995         .field_bit_size = 4,
 996         .mask_opcode = BNXT_ULP_MASK_OPC_SET_TO_CONSTANT,
 997         .mask_operand = {0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
 998                 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00},
 999         .spec_opcode = BNXT_ULP_SPEC_OPC_SET_TO_CONSTANT,
1000         .spec_operand = {BNXT_ULP_SYM_TL3_HDR_TYPE_IPV4,
1001                 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
1002                 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}
1003         },
1004         {
1005         .field_bit_size = 1,
1006         .mask_opcode = BNXT_ULP_MASK_OPC_SET_TO_CONSTANT,
1007         .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
1008                 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff},
1009         .spec_opcode = BNXT_ULP_SPEC_OPC_SET_TO_CONSTANT,
1010         .spec_operand = {0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
1011                 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}
1012         },
1013         {
1014         .field_bit_size = 1,
1015         .mask_opcode = BNXT_ULP_MASK_OPC_SET_TO_CONSTANT,
1016         .mask_operand = {0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
1017                 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00},
1018         .spec_opcode = BNXT_ULP_SPEC_OPC_SET_TO_CONSTANT,
1019         .spec_operand = {0x01, 0x00, 0x00, 0x00, 0x00, 0x00,
1020                 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}
1021         },
1022         {
1023         .field_bit_size = 1,
1024         .mask_opcode = BNXT_ULP_MASK_OPC_SET_TO_CONSTANT,
1025         .mask_operand = {0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
1026                 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00},
1027         .spec_opcode = BNXT_ULP_SPEC_OPC_SET_TO_CONSTANT,
1028         .spec_operand = {0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
1029                 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}
1030         },
1031         {
1032         .field_bit_size = 1,
1033         .mask_opcode = BNXT_ULP_MASK_OPC_SET_TO_CONSTANT,
1034         .mask_operand = {0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
1035                 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00},
1036         .spec_opcode = BNXT_ULP_SPEC_OPC_SET_TO_CONSTANT,
1037         .spec_operand = {0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
1038                 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}
1039         },
1040         {
1041         .field_bit_size = 2,
1042         .mask_opcode = BNXT_ULP_MASK_OPC_SET_TO_CONSTANT,
1043         .mask_operand = {0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
1044                 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00},
1045         .spec_opcode = BNXT_ULP_SPEC_OPC_SET_TO_CONSTANT,
1046         .spec_operand = {0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
1047                 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}
1048         },
1049         {
1050         .field_bit_size = 2,
1051         .mask_opcode = BNXT_ULP_MASK_OPC_SET_TO_CONSTANT,
1052         .mask_operand = {0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
1053                 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00},
1054         .spec_opcode = BNXT_ULP_SPEC_OPC_SET_TO_CONSTANT,
1055         .spec_operand = {BNXT_ULP_SYM_TL2_HDR_TYPE_DIX,
1056                 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
1057                 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}
1058         },
1059         {
1060         .field_bit_size = 1,
1061         .mask_opcode = BNXT_ULP_MASK_OPC_SET_TO_CONSTANT,
1062         .mask_operand = {0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
1063                 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00},
1064         .spec_opcode = BNXT_ULP_SPEC_OPC_SET_TO_CONSTANT,
1065         .spec_operand = {0x01, 0x00, 0x00, 0x00, 0x00, 0x00,
1066                 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}
1067         },
1068         {
1069         .field_bit_size = 1,
1070         .mask_opcode = BNXT_ULP_MASK_OPC_SET_TO_CONSTANT,
1071         .mask_operand = {0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
1072                 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00},
1073         .spec_opcode = BNXT_ULP_SPEC_OPC_SET_TO_CONSTANT,
1074         .spec_operand = {0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
1075                 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}
1076         },
1077         {
1078         .field_bit_size = 9,
1079         .mask_opcode = BNXT_ULP_MASK_OPC_SET_TO_CONSTANT,
1080         .mask_operand = {0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
1081                 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00},
1082         .spec_opcode = BNXT_ULP_SPEC_OPC_SET_TO_CONSTANT,
1083         .spec_operand = {0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
1084                 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}
1085         },
1086         {
1087         .field_bit_size = 7,
1088         .mask_opcode = BNXT_ULP_MASK_OPC_SET_TO_CONSTANT,
1089         .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
1090                 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff},
1091         .spec_opcode = BNXT_ULP_SPEC_OPC_SET_TO_REGFILE,
1092         .spec_operand = {(BNXT_ULP_REGFILE_INDEX_PROF_FUNC_ID_0 >> 8) & 0xff,
1093                 BNXT_ULP_REGFILE_INDEX_PROF_FUNC_ID_0 & 0xff,
1094                 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
1095                 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}
1096         },
1097         {
1098         .field_bit_size = 1,
1099         .mask_opcode = BNXT_ULP_MASK_OPC_SET_TO_CONSTANT,
1100         .mask_operand = {0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
1101                 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00},
1102         .spec_opcode = BNXT_ULP_SPEC_OPC_SET_TO_CONSTANT,
1103         .spec_operand = {0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
1104                 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}
1105         },
1106         {
1107         .field_bit_size = 2,
1108         .mask_opcode = BNXT_ULP_MASK_OPC_SET_TO_CONSTANT,
1109         .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
1110                 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff},
1111         .spec_opcode = BNXT_ULP_SPEC_OPC_SET_TO_CONSTANT,
1112         .spec_operand = {0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
1113                 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}
1114         },
1115         {
1116         .field_bit_size = 4,
1117         .mask_opcode = BNXT_ULP_MASK_OPC_SET_TO_CONSTANT,
1118         .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
1119                 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff},
1120         .spec_opcode = BNXT_ULP_SPEC_OPC_SET_TO_CONSTANT,
1121         .spec_operand = {BNXT_ULP_SYM_PKT_TYPE_L2,
1122                 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
1123                 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}
1124         },
1125         {
1126         .field_bit_size = 1,
1127         .mask_opcode = BNXT_ULP_MASK_OPC_SET_TO_CONSTANT,
1128         .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
1129                 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff},
1130         .spec_opcode = BNXT_ULP_SPEC_OPC_SET_TO_CONSTANT,
1131         .spec_operand = {0x01, 0x00, 0x00, 0x00, 0x00, 0x00,
1132                 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}
1133         },
1134         {
1135         .field_bit_size = 251,
1136         .mask_opcode = BNXT_ULP_MASK_OPC_SET_TO_CONSTANT,
1137         .mask_operand = {0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
1138                 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00},
1139         .spec_opcode = BNXT_ULP_SPEC_OPC_ADD_PAD,
1140         .spec_operand = {0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
1141                 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}
1142         },
1143         {
1144         .field_bit_size = 3,
1145         .mask_opcode = BNXT_ULP_MASK_OPC_SET_TO_CONSTANT,
1146         .mask_operand = {0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
1147                 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00},
1148         .spec_opcode = BNXT_ULP_SPEC_OPC_SET_TO_CONSTANT,
1149         .spec_operand = {0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
1150                 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}
1151         },
1152         {
1153         .field_bit_size = 16,
1154         .mask_opcode = BNXT_ULP_MASK_OPC_SET_TO_CONSTANT,
1155         .mask_operand = {0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
1156                 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00},
1157         .spec_opcode = BNXT_ULP_SPEC_OPC_SET_TO_HDR_FIELD,
1158         .spec_operand = {(BNXT_ULP_HF0_IDX_O_UDP_DST_PORT >> 8) & 0xff,
1159                 BNXT_ULP_HF0_IDX_O_UDP_DST_PORT & 0xff,
1160                 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
1161                 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}
1162         },
1163         {
1164         .field_bit_size = 16,
1165         .mask_opcode = BNXT_ULP_MASK_OPC_SET_TO_CONSTANT,
1166         .mask_operand = {0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
1167                 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00},
1168         .spec_opcode = BNXT_ULP_SPEC_OPC_SET_TO_HDR_FIELD,
1169         .spec_operand = {(BNXT_ULP_HF0_IDX_O_UDP_SRC_PORT >> 8) & 0xff,
1170                 BNXT_ULP_HF0_IDX_O_UDP_SRC_PORT & 0xff,
1171                 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
1172                 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}
1173         },
1174         {
1175         .field_bit_size = 8,
1176         .mask_opcode = BNXT_ULP_MASK_OPC_SET_TO_CONSTANT,
1177         .mask_operand = {0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
1178                 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00},
1179         .spec_opcode = BNXT_ULP_SPEC_OPC_SET_TO_CONSTANT,
1180         .spec_operand = {BNXT_ULP_SYM_IP_PROTO_UDP,
1181                 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
1182                 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}
1183         },
1184         {
1185         .field_bit_size = 32,
1186         .mask_opcode = BNXT_ULP_MASK_OPC_SET_TO_CONSTANT,
1187         .mask_operand = {0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
1188                 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00},
1189         .spec_opcode = BNXT_ULP_SPEC_OPC_SET_TO_HDR_FIELD,
1190         .spec_operand = {(BNXT_ULP_HF0_IDX_O_IPV4_DST_ADDR >> 8) & 0xff,
1191                 BNXT_ULP_HF0_IDX_O_IPV4_DST_ADDR & 0xff,
1192                 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
1193                 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}
1194         },
1195         {
1196         .field_bit_size = 32,
1197         .mask_opcode = BNXT_ULP_MASK_OPC_SET_TO_CONSTANT,
1198         .mask_operand = {0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
1199                 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00},
1200         .spec_opcode = BNXT_ULP_SPEC_OPC_SET_TO_HDR_FIELD,
1201         .spec_operand = {(BNXT_ULP_HF0_IDX_O_IPV4_SRC_ADDR >> 8) & 0xff,
1202                 BNXT_ULP_HF0_IDX_O_IPV4_SRC_ADDR & 0xff,
1203                 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
1204                 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}
1205         },
1206         {
1207         .field_bit_size = 48,
1208         .mask_opcode = BNXT_ULP_MASK_OPC_SET_TO_CONSTANT,
1209         .mask_operand = {0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
1210                 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00},
1211         .spec_opcode = BNXT_ULP_SPEC_OPC_SET_TO_CONSTANT,
1212         .spec_operand = {0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
1213                 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}
1214         },
1215         {
1216         .field_bit_size = 24,
1217         .mask_opcode = BNXT_ULP_MASK_OPC_SET_TO_CONSTANT,
1218         .mask_operand = {0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
1219                 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00},
1220         .spec_opcode = BNXT_ULP_SPEC_OPC_SET_TO_CONSTANT,
1221         .spec_operand = {0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
1222                 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}
1223         },
1224         {
1225         .field_bit_size = 10,
1226         .mask_opcode = BNXT_ULP_MASK_OPC_SET_TO_CONSTANT,
1227         .mask_operand = {0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
1228                 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00},
1229         .spec_opcode = BNXT_ULP_SPEC_OPC_SET_TO_REGFILE,
1230         .spec_operand = {(BNXT_ULP_REGFILE_INDEX_L2_CNTXT_ID_0 >> 8) & 0xff,
1231                 BNXT_ULP_REGFILE_INDEX_L2_CNTXT_ID_0 & 0xff,
1232                 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
1233                 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}
1234         },
1235         {
1236         .field_bit_size = 8,
1237         .mask_opcode = BNXT_ULP_MASK_OPC_SET_TO_CONSTANT,
1238         .mask_operand = {0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
1239                 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00},
1240         .spec_opcode = BNXT_ULP_SPEC_OPC_SET_TO_REGFILE,
1241         .spec_operand = {(BNXT_ULP_REGFILE_INDEX_EM_PROFILE_ID_0 >> 8) & 0xff,
1242                 BNXT_ULP_REGFILE_INDEX_EM_PROFILE_ID_0 & 0xff,
1243                 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
1244                 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}
1245         }
1246 };
1247
1248 struct bnxt_ulp_mapper_result_field_info ulp_class_result_field_list[] = {
1249         {
1250         .field_bit_size = 10,
1251         .result_opcode = BNXT_ULP_RESULT_OPC_SET_TO_REGFILE,
1252         .result_operand = {(BNXT_ULP_REGFILE_INDEX_L2_CNTXT_ID_0 >> 8) & 0xff,
1253                 BNXT_ULP_REGFILE_INDEX_L2_CNTXT_ID_0 & 0xff,
1254                 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
1255                 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}
1256         },
1257         {
1258         .field_bit_size = 7,
1259         .result_opcode = BNXT_ULP_RESULT_OPC_SET_TO_REGFILE,
1260         .result_operand = {(BNXT_ULP_REGFILE_INDEX_PROF_FUNC_ID_0 >> 8) & 0xff,
1261                 BNXT_ULP_REGFILE_INDEX_PROF_FUNC_ID_0 & 0xff,
1262                 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
1263                 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}
1264         },
1265         {
1266         .field_bit_size = 1,
1267         .result_opcode = BNXT_ULP_RESULT_OPC_SET_TO_CONSTANT,
1268         .result_operand = {0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
1269                 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}
1270         },
1271         {
1272         .field_bit_size = 4,
1273         .result_opcode = BNXT_ULP_RESULT_OPC_SET_TO_CONSTANT,
1274         .result_operand = {0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
1275                 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}
1276         },
1277         {
1278         .field_bit_size = 8,
1279         .result_opcode = BNXT_ULP_RESULT_OPC_SET_TO_CONSTANT,
1280         .result_operand = {0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
1281                 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}
1282         },
1283         {
1284         .field_bit_size = 3,
1285         .result_opcode = BNXT_ULP_RESULT_OPC_SET_TO_CONSTANT,
1286         .result_operand = {0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
1287                 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}
1288         },
1289         {
1290         .field_bit_size = 6,
1291         .result_opcode = BNXT_ULP_RESULT_OPC_SET_TO_CONSTANT,
1292         .result_operand = {0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
1293                 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}
1294         },
1295         {
1296         .field_bit_size = 3,
1297         .result_opcode = BNXT_ULP_RESULT_OPC_SET_TO_CONSTANT,
1298         .result_operand = {0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
1299                 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}
1300         },
1301         {
1302         .field_bit_size = 1,
1303         .result_opcode = BNXT_ULP_RESULT_OPC_SET_TO_CONSTANT,
1304         .result_operand = {0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
1305                 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}
1306         },
1307         {
1308         .field_bit_size = 16,
1309         .result_opcode = BNXT_ULP_RESULT_OPC_SET_TO_CONSTANT,
1310         .result_operand = {0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
1311                 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}
1312         },
1313         {
1314         .field_bit_size = 1,
1315         .result_opcode = BNXT_ULP_RESULT_OPC_SET_TO_CONSTANT,
1316         .result_operand = {0x01, 0x00, 0x00, 0x00, 0x00, 0x00,
1317                 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}
1318         },
1319         {
1320         .field_bit_size = 2,
1321         .result_opcode = BNXT_ULP_RESULT_OPC_SET_TO_CONSTANT,
1322         .result_operand = {0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
1323                 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}
1324         },
1325         {
1326         .field_bit_size = 2,
1327         .result_opcode = BNXT_ULP_RESULT_OPC_SET_TO_CONSTANT,
1328         .result_operand = {0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
1329                 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}
1330         },
1331         {
1332         .field_bit_size = 4,
1333         .result_opcode = BNXT_ULP_RESULT_OPC_SET_TO_CONSTANT,
1334         .result_operand = {0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
1335                 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}
1336         },
1337         {
1338         .field_bit_size = 8,
1339         .result_opcode = BNXT_ULP_RESULT_OPC_SET_TO_CONSTANT,
1340         .result_operand = {0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
1341                 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}
1342         },
1343         {
1344         .field_bit_size = 1,
1345         .result_opcode = BNXT_ULP_RESULT_OPC_SET_TO_CONSTANT,
1346         .result_operand = {0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
1347                 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}
1348         },
1349         {
1350         .field_bit_size = 10,
1351         .result_opcode = BNXT_ULP_RESULT_OPC_SET_TO_CONSTANT,
1352         .result_operand = {(0x00f9 >> 8) & 0xff,
1353                 0x00f9 & 0xff,
1354                 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
1355                 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}
1356         },
1357         {
1358         .field_bit_size = 5,
1359         .result_opcode = BNXT_ULP_RESULT_OPC_SET_TO_CONSTANT,
1360         .result_operand = {0x15, 0x00, 0x00, 0x00, 0x00, 0x00,
1361                 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}
1362         },
1363         {
1364         .field_bit_size = 8,
1365         .result_opcode = BNXT_ULP_RESULT_OPC_SET_TO_REGFILE,
1366         .result_operand = {(BNXT_ULP_REGFILE_INDEX_EM_PROFILE_ID_0 >> 8) & 0xff,
1367                 BNXT_ULP_REGFILE_INDEX_EM_PROFILE_ID_0 & 0xff,
1368                 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
1369                 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}
1370         },
1371         {
1372         .field_bit_size = 1,
1373         .result_opcode = BNXT_ULP_RESULT_OPC_SET_TO_CONSTANT,
1374         .result_operand = {0x01, 0x00, 0x00, 0x00, 0x00, 0x00,
1375                 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}
1376         },
1377         {
1378         .field_bit_size = 1,
1379         .result_opcode = BNXT_ULP_RESULT_OPC_SET_TO_CONSTANT,
1380         .result_operand = {0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
1381                 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}
1382         },
1383         {
1384         .field_bit_size = 33,
1385         .result_opcode = BNXT_ULP_RESULT_OPC_SET_TO_REGFILE,
1386         .result_operand = {(BNXT_ULP_REGFILE_INDEX_ACTION_PTR_MAIN >> 8) & 0xff,
1387                 BNXT_ULP_REGFILE_INDEX_ACTION_PTR_MAIN & 0xff,
1388                 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
1389                 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}
1390         },
1391         {
1392         .field_bit_size = 1,
1393         .result_opcode = BNXT_ULP_RESULT_OPC_SET_TO_CONSTANT,
1394         .result_operand = {0x01, 0x00, 0x00, 0x00, 0x00, 0x00,
1395                 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}
1396         },
1397         {
1398         .field_bit_size = 1,
1399         .result_opcode = BNXT_ULP_RESULT_OPC_SET_TO_CONSTANT,
1400         .result_operand = {0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
1401                 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}
1402         },
1403         {
1404         .field_bit_size = 5,
1405         .result_opcode = BNXT_ULP_RESULT_OPC_SET_TO_CONSTANT,
1406         .result_operand = {0x02, 0x00, 0x00, 0x00, 0x00, 0x00,
1407                 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}
1408         },
1409         {
1410         .field_bit_size = 9,
1411         .result_opcode = BNXT_ULP_RESULT_OPC_SET_TO_CONSTANT,
1412         .result_operand = {(0x00c5 >> 8) & 0xff,
1413                 0x00c5 & 0xff,
1414                 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
1415                 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}
1416         },
1417         {
1418         .field_bit_size = 11,
1419         .result_opcode = BNXT_ULP_RESULT_OPC_SET_TO_CONSTANT,
1420         .result_operand = {0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
1421                 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}
1422         },
1423         {
1424         .field_bit_size = 2,
1425         .result_opcode = BNXT_ULP_RESULT_OPC_SET_TO_CONSTANT,
1426         .result_operand = {0x03, 0x00, 0x00, 0x00, 0x00, 0x00,
1427                 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}
1428         },
1429         {
1430         .field_bit_size = 1,
1431         .result_opcode = BNXT_ULP_RESULT_OPC_SET_TO_CONSTANT,
1432         .result_operand = {0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
1433                 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}
1434         },
1435         {
1436         .field_bit_size = 1,
1437         .result_opcode = BNXT_ULP_RESULT_OPC_SET_TO_CONSTANT,
1438         .result_operand = {0x01, 0x00, 0x00, 0x00, 0x00, 0x00,
1439                 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}
1440         }
1441 };
1442
1443 struct bnxt_ulp_mapper_ident_info ulp_ident_list[] = {
1444         {
1445         .resource_func = BNXT_ULP_RESOURCE_FUNC_IDENTIFIER,
1446         .ident_type = TF_IDENT_TYPE_PROF_FUNC,
1447         .regfile_wr_idx = BNXT_ULP_REGFILE_INDEX_PROF_FUNC_ID_0,
1448         .ident_bit_size = 7,
1449         .ident_bit_pos = 47
1450         },
1451         {
1452         .resource_func = BNXT_ULP_RESOURCE_FUNC_IDENTIFIER,
1453         .ident_type = TF_IDENT_TYPE_L2_CTXT,
1454         .regfile_wr_idx = BNXT_ULP_REGFILE_INDEX_L2_CNTXT_ID_0,
1455         .ident_bit_size = 10,
1456         .ident_bit_pos = 54
1457         },
1458         {
1459         .resource_func = BNXT_ULP_RESOURCE_FUNC_IDENTIFIER,
1460         .ident_type = TF_IDENT_TYPE_EM_PROF,
1461         .regfile_wr_idx = BNXT_ULP_REGFILE_INDEX_EM_PROFILE_ID_0,
1462         .ident_bit_size = 8,
1463         .ident_bit_pos = 2
1464         }
1465 };
1466
1467 struct bnxt_ulp_mapper_tbl_list_info ulp_act_tmpl_list[] = {
1468         [((0 << BNXT_ULP_LOG2_MAX_NUM_DEV) |
1469                 BNXT_ULP_DEVICE_ID_WH_PLUS)] = {
1470         .device_name = BNXT_ULP_DEVICE_ID_WH_PLUS,
1471         .num_tbls = 1,
1472         .start_tbl_idx = 0
1473         }
1474 };
1475
1476 struct bnxt_ulp_mapper_act_tbl_info ulp_act_tbl_list[] = {
1477         {
1478         .resource_func = BNXT_ULP_RESOURCE_FUNC_INDEX_TABLE,
1479         .table_type = TF_TBL_TYPE_EXT,
1480         .direction = TF_DIR_RX,
1481         .srch_b4_alloc = BNXT_ULP_SEARCH_BEFORE_ALLOC_NO,
1482         .result_start_idx = 0,
1483         .result_bit_size = 128,
1484         .result_num_fields = 26,
1485         .encap_num_fields = 0,
1486         .regfile_wr_idx = BNXT_ULP_REGFILE_INDEX_ACTION_PTR_MAIN
1487         }
1488 };
1489
1490 struct bnxt_ulp_mapper_result_field_info ulp_act_result_field_list[] = {
1491         {
1492         .field_bit_size = 14,
1493         .result_opcode = BNXT_ULP_RESULT_OPC_SET_TO_CONSTANT,
1494         .result_operand = {0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
1495                 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}
1496         },
1497         {
1498         .field_bit_size = 1,
1499         .result_opcode = BNXT_ULP_RESULT_OPC_SET_TO_CONSTANT,
1500         .result_operand = {0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
1501                 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}
1502         },
1503         {
1504         .field_bit_size = 1,
1505         .result_opcode = BNXT_ULP_RESULT_OPC_SET_TO_CONSTANT,
1506         .result_operand = {0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
1507                 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}
1508         },
1509         {
1510         .field_bit_size = 1,
1511         .result_opcode = BNXT_ULP_RESULT_OPC_SET_TO_CONSTANT,
1512         .result_operand = {0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
1513                 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}
1514         },
1515         {
1516         .field_bit_size = 1,
1517         .result_opcode = BNXT_ULP_RESULT_OPC_SET_TO_CONSTANT,
1518         .result_operand = {0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
1519                 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}
1520         },
1521         {
1522         .field_bit_size = 1,
1523         .result_opcode = BNXT_ULP_RESULT_OPC_SET_TO_CONSTANT,
1524         .result_operand = {0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
1525                 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}
1526         },
1527         {
1528         .field_bit_size = 8,
1529         .result_opcode = BNXT_ULP_RESULT_OPC_SET_TO_CONSTANT,
1530         .result_operand = {0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
1531                 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}
1532         },
1533         {
1534         .field_bit_size = 1,
1535         .result_opcode = BNXT_ULP_RESULT_OPC_SET_TO_CONSTANT,
1536         .result_operand = {0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
1537                 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}
1538         },
1539         {
1540         .field_bit_size = 1,
1541         .result_opcode = BNXT_ULP_RESULT_OPC_SET_TO_CONSTANT,
1542         .result_operand = {0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
1543                 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}
1544         },
1545         {
1546         .field_bit_size = 11,
1547         .result_opcode = BNXT_ULP_RESULT_OPC_SET_TO_CONSTANT,
1548         .result_operand = {0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
1549                 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}
1550         },
1551         {
1552         .field_bit_size = 1,
1553         .result_opcode = BNXT_ULP_RESULT_OPC_SET_TO_CONSTANT,
1554         .result_operand = {0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
1555                 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}
1556         },
1557         {
1558         .field_bit_size = 10,
1559         .result_opcode = BNXT_ULP_RESULT_OPC_SET_TO_CONSTANT,
1560         .result_operand = {0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
1561                 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}
1562         },
1563         {
1564         .field_bit_size = 16,
1565         .result_opcode = BNXT_ULP_RESULT_OPC_SET_TO_CONSTANT,
1566         .result_operand = {0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
1567                 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}
1568         },
1569         {
1570         .field_bit_size = 10,
1571         .result_opcode = BNXT_ULP_RESULT_OPC_SET_TO_CONSTANT,
1572         .result_operand = {0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
1573                 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}
1574         },
1575         {
1576         .field_bit_size = 16,
1577         .result_opcode = BNXT_ULP_RESULT_OPC_SET_TO_CONSTANT,
1578         .result_operand = {0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
1579                 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}
1580         },
1581         {
1582         .field_bit_size = 10,
1583         .result_opcode = BNXT_ULP_RESULT_OPC_SET_TO_CONSTANT,
1584         .result_operand = {0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
1585                 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}
1586         },
1587         {
1588         .field_bit_size = 1,
1589         .result_opcode = BNXT_ULP_RESULT_OPC_SET_TO_CONSTANT,
1590         .result_operand = {0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
1591                 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}
1592         },
1593         {
1594         .field_bit_size = 1,
1595         .result_opcode = BNXT_ULP_RESULT_OPC_SET_TO_CONSTANT,
1596         .result_operand = {0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
1597                 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}
1598         },
1599         {
1600         .field_bit_size = 1,
1601         .result_opcode = BNXT_ULP_RESULT_OPC_SET_TO_CONSTANT,
1602         .result_operand = {0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
1603                 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}
1604         },
1605         {
1606         .field_bit_size = 1,
1607         .result_opcode = BNXT_ULP_RESULT_OPC_SET_TO_CONSTANT,
1608         .result_operand = {0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
1609                 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}
1610         },
1611         {
1612         .field_bit_size = 4,
1613         .result_opcode = BNXT_ULP_RESULT_OPC_SET_TO_CONSTANT,
1614         .result_operand = {BNXT_ULP_SYM_DECAP_FUNC_NONE,
1615                 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
1616                 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}
1617         },
1618         {
1619         .field_bit_size = 12,
1620         .result_opcode = BNXT_ULP_RESULT_OPC_SET_TO_ACT_PROP,
1621         .result_operand = {(BNXT_ULP_ACT_PROP_IDX_VNIC >> 8) & 0xff,
1622                 BNXT_ULP_ACT_PROP_IDX_VNIC & 0xff,
1623                 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
1624                 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}
1625         },
1626         {
1627         .field_bit_size = 1,
1628         .result_opcode = BNXT_ULP_RESULT_OPC_SET_TO_CONSTANT,
1629         .result_operand = {0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
1630                 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}
1631         },
1632         {
1633         .field_bit_size = 1,
1634         .result_opcode = BNXT_ULP_RESULT_OPC_SET_TO_CONSTANT,
1635         .result_operand = {0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
1636                 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}
1637         },
1638         {
1639         .field_bit_size = 2,
1640         .result_opcode = BNXT_ULP_RESULT_OPC_SET_TO_CONSTANT,
1641         .result_operand = {0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
1642                 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}
1643         },
1644         {
1645         .field_bit_size = 1,
1646         .result_opcode = BNXT_ULP_RESULT_OPC_SET_TO_CONSTANT,
1647         .result_operand = {0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
1648                 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}
1649         }
1650 };