drivers/net/bnxt/tf_ulp/ulp_template_db.c

   1 /* SPDX-License-Identifier: BSD-3-Clause
   2  * Copyright(c) 2014-2020 Broadcom
   3  * All rights reserved.
   4  */
   5
   6
   7 #include "ulp_template_db.h"
   8 #include "ulp_template_field_db.h"
   9 #include "ulp_template_struct.h"
  10 #include "ulp_rte_parser.h"
  11
  12 uint32_t ulp_act_prop_map_table[] = {
  13         [BNXT_ULP_ACT_PROP_IDX_ENCAP_TUN_SZ] =
  14                 BNXT_ULP_ACT_PROP_SZ_ENCAP_TUN_SZ,
  15         [BNXT_ULP_ACT_PROP_IDX_ENCAP_IP_SZ] =
  16                 BNXT_ULP_ACT_PROP_SZ_ENCAP_IP_SZ,
  17         [BNXT_ULP_ACT_PROP_IDX_ENCAP_VTAG_SZ] =
  18                 BNXT_ULP_ACT_PROP_SZ_ENCAP_VTAG_SZ,
  19         [BNXT_ULP_ACT_PROP_IDX_ENCAP_VTAG_TYPE] =
  20                 BNXT_ULP_ACT_PROP_SZ_ENCAP_VTAG_TYPE,
  21         [BNXT_ULP_ACT_PROP_IDX_ENCAP_VTAG_NUM] =
  22                 BNXT_ULP_ACT_PROP_SZ_ENCAP_VTAG_NUM,
  23         [BNXT_ULP_ACT_PROP_IDX_ENCAP_L3_TYPE] =
  24                 BNXT_ULP_ACT_PROP_SZ_ENCAP_L3_TYPE,
  25         [BNXT_ULP_ACT_PROP_IDX_MPLS_POP_NUM] =
  26                 BNXT_ULP_ACT_PROP_SZ_MPLS_POP_NUM,
  27         [BNXT_ULP_ACT_PROP_IDX_MPLS_PUSH_NUM] =
  28                 BNXT_ULP_ACT_PROP_SZ_MPLS_PUSH_NUM,
  29         [BNXT_ULP_ACT_PROP_IDX_PORT_ID] =
  30                 BNXT_ULP_ACT_PROP_SZ_PORT_ID,
  31         [BNXT_ULP_ACT_PROP_IDX_VNIC] =
  32                 BNXT_ULP_ACT_PROP_SZ_VNIC,
  33         [BNXT_ULP_ACT_PROP_IDX_VPORT] =
  34                 BNXT_ULP_ACT_PROP_SZ_VPORT,
  35         [BNXT_ULP_ACT_PROP_IDX_MARK] =
  36                 BNXT_ULP_ACT_PROP_SZ_MARK,
  37         [BNXT_ULP_ACT_PROP_IDX_COUNT] =
  38                 BNXT_ULP_ACT_PROP_SZ_COUNT,
  39         [BNXT_ULP_ACT_PROP_IDX_METER] =
  40                 BNXT_ULP_ACT_PROP_SZ_METER,
  41         [BNXT_ULP_ACT_PROP_IDX_SET_MAC_SRC] =
  42                 BNXT_ULP_ACT_PROP_SZ_SET_MAC_SRC,
  43         [BNXT_ULP_ACT_PROP_IDX_SET_MAC_DST] =
  44                 BNXT_ULP_ACT_PROP_SZ_SET_MAC_DST,
  45         [BNXT_ULP_ACT_PROP_IDX_OF_PUSH_VLAN] =
  46                 BNXT_ULP_ACT_PROP_SZ_OF_PUSH_VLAN,
  47         [BNXT_ULP_ACT_PROP_IDX_OF_SET_VLAN_PCP] =
  48                 BNXT_ULP_ACT_PROP_SZ_OF_SET_VLAN_PCP,
  49         [BNXT_ULP_ACT_PROP_IDX_OF_SET_VLAN_VID] =
  50                 BNXT_ULP_ACT_PROP_SZ_OF_SET_VLAN_VID,
  51         [BNXT_ULP_ACT_PROP_IDX_SET_IPV4_SRC] =
  52                 BNXT_ULP_ACT_PROP_SZ_SET_IPV4_SRC,
  53         [BNXT_ULP_ACT_PROP_IDX_SET_IPV4_DST] =
  54                 BNXT_ULP_ACT_PROP_SZ_SET_IPV4_DST,
  55         [BNXT_ULP_ACT_PROP_IDX_SET_IPV6_SRC] =
  56                 BNXT_ULP_ACT_PROP_SZ_SET_IPV6_SRC,
  57         [BNXT_ULP_ACT_PROP_IDX_SET_IPV6_DST] =
  58                 BNXT_ULP_ACT_PROP_SZ_SET_IPV6_DST,
  59         [BNXT_ULP_ACT_PROP_IDX_SET_TP_SRC] =
  60                 BNXT_ULP_ACT_PROP_SZ_SET_TP_SRC,
  61         [BNXT_ULP_ACT_PROP_IDX_SET_TP_DST] =
  62                 BNXT_ULP_ACT_PROP_SZ_SET_TP_DST,
  63         [BNXT_ULP_ACT_PROP_IDX_OF_PUSH_MPLS_0] =
  64                 BNXT_ULP_ACT_PROP_SZ_OF_PUSH_MPLS_0,
  65         [BNXT_ULP_ACT_PROP_IDX_OF_PUSH_MPLS_1] =
  66                 BNXT_ULP_ACT_PROP_SZ_OF_PUSH_MPLS_1,
  67         [BNXT_ULP_ACT_PROP_IDX_OF_PUSH_MPLS_2] =
  68                 BNXT_ULP_ACT_PROP_SZ_OF_PUSH_MPLS_2,
  69         [BNXT_ULP_ACT_PROP_IDX_OF_PUSH_MPLS_3] =
  70                 BNXT_ULP_ACT_PROP_SZ_OF_PUSH_MPLS_3,
  71         [BNXT_ULP_ACT_PROP_IDX_OF_PUSH_MPLS_4] =
  72                 BNXT_ULP_ACT_PROP_SZ_OF_PUSH_MPLS_4,
  73         [BNXT_ULP_ACT_PROP_IDX_OF_PUSH_MPLS_5] =
  74                 BNXT_ULP_ACT_PROP_SZ_OF_PUSH_MPLS_5,
  75         [BNXT_ULP_ACT_PROP_IDX_OF_PUSH_MPLS_6] =
  76                 BNXT_ULP_ACT_PROP_SZ_OF_PUSH_MPLS_6,
  77         [BNXT_ULP_ACT_PROP_IDX_OF_PUSH_MPLS_7] =
  78                 BNXT_ULP_ACT_PROP_SZ_OF_PUSH_MPLS_7,
  79         [BNXT_ULP_ACT_PROP_IDX_ENCAP_L2_DMAC] =
  80                 BNXT_ULP_ACT_PROP_SZ_ENCAP_L2_DMAC,
  81         [BNXT_ULP_ACT_PROP_IDX_ENCAP_L2_SMAC] =
  82                 BNXT_ULP_ACT_PROP_SZ_ENCAP_L2_SMAC,
  83         [BNXT_ULP_ACT_PROP_IDX_ENCAP_VTAG] =
  84                 BNXT_ULP_ACT_PROP_SZ_ENCAP_VTAG,
  85         [BNXT_ULP_ACT_PROP_IDX_ENCAP_IP] =
  86                 BNXT_ULP_ACT_PROP_SZ_ENCAP_IP,
  87         [BNXT_ULP_ACT_PROP_IDX_ENCAP_IP_SRC] =
  88                 BNXT_ULP_ACT_PROP_SZ_ENCAP_IP_SRC,
  89         [BNXT_ULP_ACT_PROP_IDX_ENCAP_UDP] =
  90                 BNXT_ULP_ACT_PROP_SZ_ENCAP_UDP,
  91         [BNXT_ULP_ACT_PROP_IDX_ENCAP_TUN] =
  92                 BNXT_ULP_ACT_PROP_SZ_ENCAP_TUN,
  93         [BNXT_ULP_ACT_PROP_IDX_LAST] =
  94                 BNXT_ULP_ACT_PROP_SZ_LAST
  95 };
  96
  97 struct bnxt_ulp_rte_act_info ulp_act_info[] = {
  98         [RTE_FLOW_ACTION_TYPE_END] = {
  99                 .act_type                = BNXT_ULP_ACT_TYPE_END,
 100                 .proto_act_func          = NULL
 101         },
 102         [RTE_FLOW_ACTION_TYPE_VOID] = {
 103                 .act_type                = BNXT_ULP_ACT_TYPE_SUPPORTED,
 104                 .proto_act_func          = ulp_rte_void_act_handler
 105         },
 106         [RTE_FLOW_ACTION_TYPE_PASSTHRU] = {
 107                 .act_type                = BNXT_ULP_ACT_TYPE_NOT_SUPPORTED,
 108                 .proto_act_func          = NULL
 109         },
 110         [RTE_FLOW_ACTION_TYPE_JUMP] = {
 111                 .act_type                = BNXT_ULP_ACT_TYPE_NOT_SUPPORTED,
 112                 .proto_act_func          = NULL
 113         },
 114         [RTE_FLOW_ACTION_TYPE_MARK] = {
 115                 .act_type                = BNXT_ULP_ACT_TYPE_SUPPORTED,
 116                 .proto_act_func          = ulp_rte_mark_act_handler
 117         },
 118         [RTE_FLOW_ACTION_TYPE_FLAG] = {
 119                 .act_type                = BNXT_ULP_ACT_TYPE_NOT_SUPPORTED,
 120                 .proto_act_func          = NULL
 121         },
 122         [RTE_FLOW_ACTION_TYPE_QUEUE] = {
 123                 .act_type                = BNXT_ULP_ACT_TYPE_NOT_SUPPORTED,
 124                 .proto_act_func          = NULL
 125         },
 126         [RTE_FLOW_ACTION_TYPE_DROP] = {
 127                 .act_type                = BNXT_ULP_ACT_TYPE_SUPPORTED,
 128                 .proto_act_func          = ulp_rte_drop_act_handler
 129         },
 130         [RTE_FLOW_ACTION_TYPE_COUNT] = {
 131                 .act_type                = BNXT_ULP_ACT_TYPE_SUPPORTED,
 132                 .proto_act_func          = ulp_rte_count_act_handler
 133         },
 134         [RTE_FLOW_ACTION_TYPE_RSS] = {
 135                 .act_type                = BNXT_ULP_ACT_TYPE_SUPPORTED,
 136                 .proto_act_func          = ulp_rte_rss_act_handler
 137         },
 138         [RTE_FLOW_ACTION_TYPE_PF] = {
 139                 .act_type                = BNXT_ULP_ACT_TYPE_SUPPORTED,
 140                 .proto_act_func          = ulp_rte_pf_act_handler
 141         },
 142         [RTE_FLOW_ACTION_TYPE_VF] = {
 143                 .act_type                = BNXT_ULP_ACT_TYPE_SUPPORTED,
 144                 .proto_act_func          = ulp_rte_vf_act_handler
 145         },
 146         [RTE_FLOW_ACTION_TYPE_PHY_PORT] = {
 147                 .act_type                = BNXT_ULP_ACT_TYPE_SUPPORTED,
 148                 .proto_act_func          = ulp_rte_phy_port_act_handler
 149         },
 150         [RTE_FLOW_ACTION_TYPE_PORT_ID] = {
 151                 .act_type                = BNXT_ULP_ACT_TYPE_SUPPORTED,
 152                 .proto_act_func          = ulp_rte_port_id_act_handler
 153         },
 154         [RTE_FLOW_ACTION_TYPE_METER] = {
 155                 .act_type                = BNXT_ULP_ACT_TYPE_NOT_SUPPORTED,
 156                 .proto_act_func          = NULL
 157         },
 158         [RTE_FLOW_ACTION_TYPE_SECURITY] = {
 159                 .act_type                = BNXT_ULP_ACT_TYPE_NOT_SUPPORTED,
 160                 .proto_act_func          = NULL
 161         },
 162         [RTE_FLOW_ACTION_TYPE_OF_SET_MPLS_TTL] = {
 163                 .act_type                = BNXT_ULP_ACT_TYPE_NOT_SUPPORTED,
 164                 .proto_act_func          = NULL
 165         },
 166         [RTE_FLOW_ACTION_TYPE_OF_DEC_MPLS_TTL] = {
 167                 .act_type                = BNXT_ULP_ACT_TYPE_NOT_SUPPORTED,
 168                 .proto_act_func          = NULL
 169         },
 170         [RTE_FLOW_ACTION_TYPE_OF_SET_NW_TTL] = {
 171                 .act_type                = BNXT_ULP_ACT_TYPE_NOT_SUPPORTED,
 172                 .proto_act_func          = NULL
 173         },
 174         [RTE_FLOW_ACTION_TYPE_OF_DEC_NW_TTL] = {
 175                 .act_type                = BNXT_ULP_ACT_TYPE_NOT_SUPPORTED,
 176                 .proto_act_func          = NULL
 177         },
 178         [RTE_FLOW_ACTION_TYPE_OF_COPY_TTL_OUT] = {
 179                 .act_type                = BNXT_ULP_ACT_TYPE_NOT_SUPPORTED,
 180                 .proto_act_func          = NULL
 181         },
 182         [RTE_FLOW_ACTION_TYPE_OF_COPY_TTL_IN] = {
 183                 .act_type                = BNXT_ULP_ACT_TYPE_NOT_SUPPORTED,
 184                 .proto_act_func          = NULL
 185         },
 186         [RTE_FLOW_ACTION_TYPE_OF_POP_VLAN] = {
 187                 .act_type                = BNXT_ULP_ACT_TYPE_NOT_SUPPORTED,
 188                 .proto_act_func          = NULL
 189         },
 190         [RTE_FLOW_ACTION_TYPE_OF_PUSH_VLAN] = {
 191                 .act_type                = BNXT_ULP_ACT_TYPE_NOT_SUPPORTED,
 192                 .proto_act_func          = NULL
 193         },
 194         [RTE_FLOW_ACTION_TYPE_OF_SET_VLAN_VID] = {
 195                 .act_type                = BNXT_ULP_ACT_TYPE_NOT_SUPPORTED,
 196                 .proto_act_func          = NULL
 197         },
 198         [RTE_FLOW_ACTION_TYPE_OF_SET_VLAN_PCP] = {
 199                 .act_type                = BNXT_ULP_ACT_TYPE_NOT_SUPPORTED,
 200                 .proto_act_func          = NULL
 201         },
 202         [RTE_FLOW_ACTION_TYPE_OF_POP_MPLS] = {
 203                 .act_type                = BNXT_ULP_ACT_TYPE_NOT_SUPPORTED,
 204                 .proto_act_func          = NULL
 205         },
 206         [RTE_FLOW_ACTION_TYPE_OF_PUSH_MPLS] = {
 207                 .act_type                = BNXT_ULP_ACT_TYPE_NOT_SUPPORTED,
 208                 .proto_act_func          = NULL
 209         },
 210         [RTE_FLOW_ACTION_TYPE_VXLAN_ENCAP] = {
 211                 .act_type                = BNXT_ULP_ACT_TYPE_SUPPORTED,
 212                 .proto_act_func          = ulp_rte_vxlan_encap_act_handler
 213         },
 214         [RTE_FLOW_ACTION_TYPE_VXLAN_DECAP] = {
 215                 .act_type                = BNXT_ULP_ACT_TYPE_SUPPORTED,
 216                 .proto_act_func          = ulp_rte_vxlan_decap_act_handler
 217         },
 218         [RTE_FLOW_ACTION_TYPE_NVGRE_ENCAP] = {
 219                 .act_type                = BNXT_ULP_ACT_TYPE_NOT_SUPPORTED,
 220                 .proto_act_func          = NULL
 221         },
 222         [RTE_FLOW_ACTION_TYPE_NVGRE_DECAP] = {
 223                 .act_type                = BNXT_ULP_ACT_TYPE_NOT_SUPPORTED,
 224                 .proto_act_func          = NULL
 225         },
 226         [RTE_FLOW_ACTION_TYPE_RAW_ENCAP] = {
 227                 .act_type                = BNXT_ULP_ACT_TYPE_NOT_SUPPORTED,
 228                 .proto_act_func          = NULL
 229         },
 230         [RTE_FLOW_ACTION_TYPE_RAW_DECAP] = {
 231                 .act_type                = BNXT_ULP_ACT_TYPE_NOT_SUPPORTED,
 232                 .proto_act_func          = NULL
 233         },
 234         [RTE_FLOW_ACTION_TYPE_SET_IPV4_SRC] = {
 235                 .act_type                = BNXT_ULP_ACT_TYPE_NOT_SUPPORTED,
 236                 .proto_act_func          = NULL
 237         },
 238         [RTE_FLOW_ACTION_TYPE_SET_IPV4_DST] = {
 239                 .act_type                = BNXT_ULP_ACT_TYPE_NOT_SUPPORTED,
 240                 .proto_act_func          = NULL
 241         },
 242         [RTE_FLOW_ACTION_TYPE_SET_IPV6_SRC] = {
 243                 .act_type                = BNXT_ULP_ACT_TYPE_NOT_SUPPORTED,
 244                 .proto_act_func          = NULL
 245         },
 246         [RTE_FLOW_ACTION_TYPE_SET_IPV6_DST] = {
 247                 .act_type                = BNXT_ULP_ACT_TYPE_NOT_SUPPORTED,
 248                 .proto_act_func          = NULL
 249         },
 250         [RTE_FLOW_ACTION_TYPE_SET_TP_SRC] = {
 251                 .act_type                = BNXT_ULP_ACT_TYPE_NOT_SUPPORTED,
 252                 .proto_act_func          = NULL
 253         },
 254         [RTE_FLOW_ACTION_TYPE_SET_TP_DST] = {
 255                 .act_type                = BNXT_ULP_ACT_TYPE_NOT_SUPPORTED,
 256                 .proto_act_func          = NULL
 257         },
 258         [RTE_FLOW_ACTION_TYPE_MAC_SWAP] = {
 259                 .act_type                = BNXT_ULP_ACT_TYPE_NOT_SUPPORTED,
 260                 .proto_act_func          = NULL
 261         },
 262         [RTE_FLOW_ACTION_TYPE_DEC_TTL] = {
 263                 .act_type                = BNXT_ULP_ACT_TYPE_NOT_SUPPORTED,
 264                 .proto_act_func          = NULL
 265         },
 266         [RTE_FLOW_ACTION_TYPE_SET_TTL] = {
 267                 .act_type                = BNXT_ULP_ACT_TYPE_NOT_SUPPORTED,
 268                 .proto_act_func          = NULL
 269         },
 270         [RTE_FLOW_ACTION_TYPE_SET_MAC_SRC] = {
 271                 .act_type                = BNXT_ULP_ACT_TYPE_NOT_SUPPORTED,
 272                 .proto_act_func          = NULL
 273         },
 274         [RTE_FLOW_ACTION_TYPE_SET_MAC_DST] = {
 275                 .act_type                = BNXT_ULP_ACT_TYPE_NOT_SUPPORTED,
 276                 .proto_act_func          = NULL
 277         },
 278         [RTE_FLOW_ACTION_TYPE_INC_TCP_SEQ] = {
 279                 .act_type                = BNXT_ULP_ACT_TYPE_NOT_SUPPORTED,
 280                 .proto_act_func          = NULL
 281         },
 282         [RTE_FLOW_ACTION_TYPE_DEC_TCP_SEQ] = {
 283                 .act_type                = BNXT_ULP_ACT_TYPE_NOT_SUPPORTED,
 284                 .proto_act_func          = NULL
 285         },
 286         [RTE_FLOW_ACTION_TYPE_INC_TCP_ACK] = {
 287                 .act_type                = BNXT_ULP_ACT_TYPE_NOT_SUPPORTED,
 288                 .proto_act_func          = NULL
 289         },
 290         [RTE_FLOW_ACTION_TYPE_DEC_TCP_ACK] = {
 291                 .act_type                = BNXT_ULP_ACT_TYPE_NOT_SUPPORTED,
 292                 .proto_act_func          = NULL
 293         }
 294 };
 295
 296 struct bnxt_ulp_cache_tbl_params ulp_cache_tbl_params[] = {
 297         [BNXT_ULP_CACHE_TBL_ID_L2_CNTXT_TCAM_INGRESS] = {
 298                 .num_entries             = 16384
 299         },
 300         [BNXT_ULP_CACHE_TBL_ID_L2_CNTXT_TCAM_EGRESS] = {
 301                 .num_entries             = 16384
 302         },
 303         [BNXT_ULP_CACHE_TBL_ID_PROFILE_TCAM_INGRESS] = {
 304                 .num_entries             = 16384
 305         },
 306         [BNXT_ULP_CACHE_TBL_ID_PROFILE_TCAM_EGRESS] = {
 307                 .num_entries             = 16384
 308         }
 309 };
 310
 311 struct bnxt_ulp_device_params ulp_device_params[BNXT_ULP_DEVICE_ID_LAST] = {
 312         [BNXT_ULP_DEVICE_ID_WH_PLUS] = {
 313                 .global_fid_enable       = BNXT_ULP_SYM_YES,
 314                 .byte_order              = BNXT_ULP_BYTE_ORDER_LE,
 315                 .encap_byte_swap         = 1,
 316                 .lfid_entries            = 16384,
 317                 .lfid_entry_size         = 4,
 318                 .gfid_entries            = 65536,
 319                 .gfid_entry_size         = 4,
 320                 .num_flows               = 32768,
 321                 .num_resources_per_flow  = 8
 322         }
 323 };
 324
 325 struct bnxt_ulp_glb_resource_info ulp_glb_resource_tbl[] = {
 326         [0] = {
 327         .resource_func           = BNXT_ULP_RESOURCE_FUNC_IDENTIFIER,
 328         .resource_type           = TF_IDENT_TYPE_PROF_FUNC,
 329         .glb_regfile_index       = BNXT_ULP_GLB_REGFILE_INDEX_GLB_PROF_FUNC_ID,
 330         .direction               = TF_DIR_RX
 331         },
 332         [1] = {
 333         .resource_func           = BNXT_ULP_RESOURCE_FUNC_IDENTIFIER,
 334         .resource_type           = TF_IDENT_TYPE_PROF_FUNC,
 335         .glb_regfile_index       = BNXT_ULP_GLB_REGFILE_INDEX_GLB_PROF_FUNC_ID,
 336         .direction               = TF_DIR_TX
 337         }
 338 };
 339
 340 struct bnxt_ulp_rte_hdr_info ulp_hdr_info[] = {
 341         [RTE_FLOW_ITEM_TYPE_END] = {
 342                 .hdr_type                = BNXT_ULP_HDR_TYPE_END,
 343                 .proto_hdr_func          = NULL
 344         },
 345         [RTE_FLOW_ITEM_TYPE_VOID] = {
 346                 .hdr_type                = BNXT_ULP_HDR_TYPE_SUPPORTED,
 347                 .proto_hdr_func          = ulp_rte_void_hdr_handler
 348         },
 349         [RTE_FLOW_ITEM_TYPE_INVERT] = {
 350                 .hdr_type                = BNXT_ULP_HDR_TYPE_NOT_SUPPORTED,
 351                 .proto_hdr_func          = NULL
 352         },
 353         [RTE_FLOW_ITEM_TYPE_ANY] = {
 354                 .hdr_type                = BNXT_ULP_HDR_TYPE_NOT_SUPPORTED,
 355                 .proto_hdr_func          = NULL
 356         },
 357         [RTE_FLOW_ITEM_TYPE_PF] = {
 358                 .hdr_type                = BNXT_ULP_HDR_TYPE_SUPPORTED,
 359                 .proto_hdr_func          = ulp_rte_pf_hdr_handler
 360         },
 361         [RTE_FLOW_ITEM_TYPE_VF] = {
 362                 .hdr_type                = BNXT_ULP_HDR_TYPE_SUPPORTED,
 363                 .proto_hdr_func          = ulp_rte_vf_hdr_handler
 364         },
 365         [RTE_FLOW_ITEM_TYPE_PHY_PORT] = {
 366                 .hdr_type                = BNXT_ULP_HDR_TYPE_SUPPORTED,
 367                 .proto_hdr_func          = ulp_rte_phy_port_hdr_handler
 368         },
 369         [RTE_FLOW_ITEM_TYPE_PORT_ID] = {
 370                 .hdr_type                = BNXT_ULP_HDR_TYPE_SUPPORTED,
 371                 .proto_hdr_func          = ulp_rte_port_id_hdr_handler
 372         },
 373         [RTE_FLOW_ITEM_TYPE_RAW] = {
 374                 .hdr_type                = BNXT_ULP_HDR_TYPE_NOT_SUPPORTED,
 375                 .proto_hdr_func          = NULL
 376         },
 377         [RTE_FLOW_ITEM_TYPE_ETH] = {
 378                 .hdr_type                = BNXT_ULP_HDR_TYPE_SUPPORTED,
 379                 .proto_hdr_func          = ulp_rte_eth_hdr_handler
 380         },
 381         [RTE_FLOW_ITEM_TYPE_VLAN] = {
 382                 .hdr_type                = BNXT_ULP_HDR_TYPE_SUPPORTED,
 383                 .proto_hdr_func          = ulp_rte_vlan_hdr_handler
 384         },
 385         [RTE_FLOW_ITEM_TYPE_IPV4] = {
 386                 .hdr_type                = BNXT_ULP_HDR_TYPE_SUPPORTED,
 387                 .proto_hdr_func          = ulp_rte_ipv4_hdr_handler
 388         },
 389         [RTE_FLOW_ITEM_TYPE_IPV6] = {
 390                 .hdr_type                = BNXT_ULP_HDR_TYPE_SUPPORTED,
 391                 .proto_hdr_func          = ulp_rte_ipv6_hdr_handler
 392         },
 393         [RTE_FLOW_ITEM_TYPE_ICMP] = {
 394                 .hdr_type                = BNXT_ULP_HDR_TYPE_NOT_SUPPORTED,
 395                 .proto_hdr_func          = NULL
 396         },
 397         [RTE_FLOW_ITEM_TYPE_UDP] = {
 398                 .hdr_type                = BNXT_ULP_HDR_TYPE_SUPPORTED,
 399                 .proto_hdr_func          = ulp_rte_udp_hdr_handler
 400         },
 401         [RTE_FLOW_ITEM_TYPE_TCP] = {
 402                 .hdr_type                = BNXT_ULP_HDR_TYPE_SUPPORTED,
 403                 .proto_hdr_func          = ulp_rte_tcp_hdr_handler
 404         },
 405         [RTE_FLOW_ITEM_TYPE_SCTP] = {
 406                 .hdr_type                = BNXT_ULP_HDR_TYPE_NOT_SUPPORTED,
 407                 .proto_hdr_func          = NULL
 408         },
 409         [RTE_FLOW_ITEM_TYPE_VXLAN] = {
 410                 .hdr_type                = BNXT_ULP_HDR_TYPE_SUPPORTED,
 411                 .proto_hdr_func          = ulp_rte_vxlan_hdr_handler
 412         },
 413         [RTE_FLOW_ITEM_TYPE_E_TAG] = {
 414                 .hdr_type                = BNXT_ULP_HDR_TYPE_NOT_SUPPORTED,
 415                 .proto_hdr_func          = NULL
 416         },
 417         [RTE_FLOW_ITEM_TYPE_NVGRE] = {
 418                 .hdr_type                = BNXT_ULP_HDR_TYPE_NOT_SUPPORTED,
 419                 .proto_hdr_func          = NULL
 420         },
 421         [RTE_FLOW_ITEM_TYPE_MPLS] = {
 422                 .hdr_type                = BNXT_ULP_HDR_TYPE_NOT_SUPPORTED,
 423                 .proto_hdr_func          = NULL
 424         },
 425         [RTE_FLOW_ITEM_TYPE_GRE] = {
 426                 .hdr_type                = BNXT_ULP_HDR_TYPE_NOT_SUPPORTED,
 427                 .proto_hdr_func          = NULL
 428         },
 429         [RTE_FLOW_ITEM_TYPE_FUZZY] = {
 430                 .hdr_type                = BNXT_ULP_HDR_TYPE_NOT_SUPPORTED,
 431                 .proto_hdr_func          = NULL
 432         },
 433         [RTE_FLOW_ITEM_TYPE_GTP] = {
 434                 .hdr_type                = BNXT_ULP_HDR_TYPE_NOT_SUPPORTED,
 435                 .proto_hdr_func          = NULL
 436         },
 437         [RTE_FLOW_ITEM_TYPE_GTPC] = {
 438                 .hdr_type                = BNXT_ULP_HDR_TYPE_NOT_SUPPORTED,
 439                 .proto_hdr_func          = NULL
 440         },
 441         [RTE_FLOW_ITEM_TYPE_GTPU] = {
 442                 .hdr_type                = BNXT_ULP_HDR_TYPE_NOT_SUPPORTED,
 443                 .proto_hdr_func          = NULL
 444         },
 445         [RTE_FLOW_ITEM_TYPE_ESP] = {
 446                 .hdr_type                = BNXT_ULP_HDR_TYPE_NOT_SUPPORTED,
 447                 .proto_hdr_func          = NULL
 448         },
 449         [RTE_FLOW_ITEM_TYPE_GENEVE] = {
 450                 .hdr_type                = BNXT_ULP_HDR_TYPE_NOT_SUPPORTED,
 451                 .proto_hdr_func          = NULL
 452         },
 453         [RTE_FLOW_ITEM_TYPE_VXLAN_GPE] = {
 454                 .hdr_type                = BNXT_ULP_HDR_TYPE_NOT_SUPPORTED,
 455                 .proto_hdr_func          = NULL
 456         },
 457         [RTE_FLOW_ITEM_TYPE_ARP_ETH_IPV4] = {
 458                 .hdr_type                = BNXT_ULP_HDR_TYPE_NOT_SUPPORTED,
 459                 .proto_hdr_func          = NULL
 460         },
 461         [RTE_FLOW_ITEM_TYPE_IPV6_EXT] = {
 462                 .hdr_type                = BNXT_ULP_HDR_TYPE_NOT_SUPPORTED,
 463                 .proto_hdr_func          = NULL
 464         },
 465         [RTE_FLOW_ITEM_TYPE_ICMP6] = {
 466                 .hdr_type                = BNXT_ULP_HDR_TYPE_NOT_SUPPORTED,
 467                 .proto_hdr_func          = NULL
 468         },
 469         [RTE_FLOW_ITEM_TYPE_ICMP6_ND_NS] = {
 470                 .hdr_type                = BNXT_ULP_HDR_TYPE_NOT_SUPPORTED,
 471                 .proto_hdr_func          = NULL
 472         },
 473         [RTE_FLOW_ITEM_TYPE_ICMP6_ND_NA] = {
 474                 .hdr_type                = BNXT_ULP_HDR_TYPE_NOT_SUPPORTED,
 475                 .proto_hdr_func          = NULL
 476         },
 477         [RTE_FLOW_ITEM_TYPE_ICMP6_ND_OPT] = {
 478                 .hdr_type                = BNXT_ULP_HDR_TYPE_NOT_SUPPORTED,
 479                 .proto_hdr_func          = NULL
 480         },
 481         [RTE_FLOW_ITEM_TYPE_ICMP6_ND_OPT_SLA_ETH] = {
 482                 .hdr_type                = BNXT_ULP_HDR_TYPE_NOT_SUPPORTED,
 483                 .proto_hdr_func          = NULL
 484         },
 485         [RTE_FLOW_ITEM_TYPE_ICMP6_ND_OPT_TLA_ETH] = {
 486                 .hdr_type                = BNXT_ULP_HDR_TYPE_NOT_SUPPORTED,
 487                 .proto_hdr_func          = NULL
 488         },
 489         [RTE_FLOW_ITEM_TYPE_MARK] = {
 490                 .hdr_type                = BNXT_ULP_HDR_TYPE_NOT_SUPPORTED,
 491                 .proto_hdr_func          = NULL
 492         },
 493         [RTE_FLOW_ITEM_TYPE_META] = {
 494                 .hdr_type                = BNXT_ULP_HDR_TYPE_NOT_SUPPORTED,
 495                 .proto_hdr_func          = NULL
 496         },
 497         [RTE_FLOW_ITEM_TYPE_GRE_KEY] = {
 498                 .hdr_type                = BNXT_ULP_HDR_TYPE_NOT_SUPPORTED,
 499                 .proto_hdr_func          = NULL
 500         },
 501         [RTE_FLOW_ITEM_TYPE_GTP_PSC] = {
 502                 .hdr_type                = BNXT_ULP_HDR_TYPE_NOT_SUPPORTED,
 503                 .proto_hdr_func          = NULL
 504         },
 505         [RTE_FLOW_ITEM_TYPE_PPPOES] = {
 506                 .hdr_type                = BNXT_ULP_HDR_TYPE_NOT_SUPPORTED,
 507                 .proto_hdr_func          = NULL
 508         },
 509         [RTE_FLOW_ITEM_TYPE_PPPOED] = {
 510                 .hdr_type                = BNXT_ULP_HDR_TYPE_NOT_SUPPORTED,
 511                 .proto_hdr_func          = NULL
 512         },
 513         [RTE_FLOW_ITEM_TYPE_PPPOE_PROTO_ID] = {
 514                 .hdr_type                = BNXT_ULP_HDR_TYPE_NOT_SUPPORTED,
 515                 .proto_hdr_func          = NULL
 516         },
 517         [RTE_FLOW_ITEM_TYPE_NSH] = {
 518                 .hdr_type                = BNXT_ULP_HDR_TYPE_NOT_SUPPORTED,
 519                 .proto_hdr_func          = NULL
 520         },
 521         [RTE_FLOW_ITEM_TYPE_IGMP] = {
 522                 .hdr_type                = BNXT_ULP_HDR_TYPE_NOT_SUPPORTED,
 523                 .proto_hdr_func          = NULL
 524         },
 525         [RTE_FLOW_ITEM_TYPE_AH] = {
 526                 .hdr_type                = BNXT_ULP_HDR_TYPE_NOT_SUPPORTED,
 527                 .proto_hdr_func          = NULL
 528         },
 529         [RTE_FLOW_ITEM_TYPE_HIGIG2] = {
 530                 .hdr_type                = BNXT_ULP_HDR_TYPE_NOT_SUPPORTED,
 531                 .proto_hdr_func          = NULL
 532         }
 533 };
 534
 535 uint32_t bnxt_ulp_encap_vtag_map[] = {
 536         [0] = BNXT_ULP_ENCAP_VTAG_ENCODING_NOP,
 537         [1] = BNXT_ULP_ENCAP_VTAG_ENCODING_STAG_ECAP_PRI,
 538         [2] = BNXT_ULP_ENCAP_VTAG_ENCODING_DTAG_ECAP_PRI
 539 };
 540
 541 uint16_t ulp_class_sig_tbl[BNXT_ULP_CLASS_SIG_TBL_MAX_SZ] = {
 542         [BNXT_ULP_CLASS_HID_0013] = 1
 543 };
 544
 545 struct bnxt_ulp_class_match_info ulp_class_match_list[] = {
 546         [1] = {
 547         .class_hid = BNXT_ULP_CLASS_HID_0013,
 548         .hdr_sig = { .bits =
 549                 BNXT_ULP_HDR_BIT_O_ETH |
 550                 BNXT_ULP_HDR_BIT_O_IPV4 |
 551                 BNXT_ULP_HDR_BIT_O_UDP |
 552                 BNXT_ULP_FLOW_DIR_BITMASK_ING },
 553         .field_sig = { .bits =
 554                 BNXT_ULP_HF0_BITMASK_O_IPV4_SRC_ADDR |
 555                 BNXT_ULP_HF0_BITMASK_O_IPV4_DST_ADDR |
 556                 BNXT_ULP_HF0_BITMASK_O_UDP_SRC_PORT |
 557                 BNXT_ULP_HF0_BITMASK_O_UDP_DST_PORT |
 558                 BNXT_ULP_MATCH_TYPE_BITMASK_EM },
 559         .class_tid = 0,
 560         .act_vnic = 0,
 561         .wc_pri = 0
 562         }
 563 };
 564
 565 uint16_t ulp_act_sig_tbl[BNXT_ULP_ACT_SIG_TBL_MAX_SZ] = {
 566         [BNXT_ULP_ACT_HID_0029] = 1
 567 };
 568
 569 struct bnxt_ulp_act_match_info ulp_act_match_list[] = {
 570         [1] = {
 571         .act_hid = BNXT_ULP_ACT_HID_0029,
 572         .act_sig = { .bits =
 573                 BNXT_ULP_ACTION_BIT_MARK |
 574                 BNXT_ULP_ACTION_BIT_RSS |
 575                 BNXT_ULP_ACTION_BIT_VNIC |
 576                 BNXT_ULP_FLOW_DIR_BITMASK_ING },
 577         .act_tid = 0
 578         }
 579 };
 580
 581 struct bnxt_ulp_mapper_tbl_list_info ulp_class_tmpl_list[] = {
 582         [((0 << BNXT_ULP_LOG2_MAX_NUM_DEV) |
 583                 BNXT_ULP_DEVICE_ID_WH_PLUS)] = {
 584         .device_name = BNXT_ULP_DEVICE_ID_WH_PLUS,
 585         .num_tbls = 5,
 586         .start_tbl_idx = 0
 587         }
 588 };
 589
 590 struct bnxt_ulp_mapper_class_tbl_info ulp_class_tbl_list[] = {
 591         {
 592         .resource_func = BNXT_ULP_RESOURCE_FUNC_CACHE_TABLE,
 593         .resource_type = TF_TCAM_TBL_TYPE_L2_CTXT_TCAM,
 594         .resource_sub_type = BNXT_ULP_RESOURCE_SUB_TYPE_TT_L2_CNTXT_TCAM_CACHE,
 595         .direction = TF_DIR_RX,
 596         .priority = BNXT_ULP_PRIORITY_NOT_USED,
 597         .srch_b4_alloc = BNXT_ULP_SEARCH_BEFORE_ALLOC_NO,
 598         .key_start_idx = 0,
 599         .blob_key_bit_size = 12,
 600         .key_bit_size = 12,
 601         .key_num_fields = 2,
 602         .result_start_idx = 0,
 603         .result_bit_size = 10,
 604         .result_num_fields = 1,
 605         .ident_start_idx = 0,
 606         .ident_nums = 1,
 607         .mark_enable = BNXT_ULP_MARK_ENABLE_NO,
 608         .critical_resource = 0,
 609         .cache_tbl_id = BNXT_ULP_CACHE_TBL_ID_L2_CNTXT_TCAM_INGRESS,
 610         .regfile_wr_idx = BNXT_ULP_REGFILE_INDEX_NOT_USED
 611         },
 612         {
 613         .resource_func = BNXT_ULP_RESOURCE_FUNC_TCAM_TABLE,
 614         .resource_type = TF_TCAM_TBL_TYPE_L2_CTXT_TCAM,
 615         .resource_sub_type = BNXT_ULP_RESOURCE_SUB_TYPE_NOT_USED,
 616         .direction = TF_DIR_RX,
 617         .priority = BNXT_ULP_PRIORITY_LEVEL_0,
 618         .srch_b4_alloc = BNXT_ULP_SEARCH_BEFORE_ALLOC_NO,
 619         .key_start_idx = 2,
 620         .blob_key_bit_size = 167,
 621         .key_bit_size = 167,
 622         .key_num_fields = 13,
 623         .result_start_idx = 1,
 624         .result_bit_size = 64,
 625         .result_num_fields = 13,
 626         .ident_start_idx = 1,
 627         .ident_nums = 0,
 628         .mark_enable = BNXT_ULP_MARK_ENABLE_NO,
 629         .critical_resource = 0,
 630         .cache_tbl_id = 0,
 631         .regfile_wr_idx = BNXT_ULP_REGFILE_INDEX_NOT_USED
 632         },
 633         {
 634         .resource_func = BNXT_ULP_RESOURCE_FUNC_CACHE_TABLE,
 635         .resource_type = TF_TCAM_TBL_TYPE_PROF_TCAM,
 636         .resource_sub_type = BNXT_ULP_RESOURCE_SUB_TYPE_TT_PROFILE_TCAM_CACHE,
 637         .direction = TF_DIR_RX,
 638         .priority = BNXT_ULP_PRIORITY_NOT_USED,
 639         .srch_b4_alloc = BNXT_ULP_SEARCH_BEFORE_ALLOC_NO,
 640         .key_start_idx = 15,
 641         .blob_key_bit_size = 16,
 642         .key_bit_size = 16,
 643         .key_num_fields = 3,
 644         .result_start_idx = 14,
 645         .result_bit_size = 10,
 646         .result_num_fields = 1,
 647         .ident_start_idx = 1,
 648         .ident_nums = 1,
 649         .mark_enable = BNXT_ULP_MARK_ENABLE_NO,
 650         .critical_resource = 0,
 651         .cache_tbl_id = BNXT_ULP_CACHE_TBL_ID_PROFILE_TCAM_INGRESS,
 652         .regfile_wr_idx = BNXT_ULP_REGFILE_INDEX_NOT_USED
 653         },
 654         {
 655         .resource_func = BNXT_ULP_RESOURCE_FUNC_TCAM_TABLE,
 656         .resource_type = TF_TCAM_TBL_TYPE_PROF_TCAM,
 657         .resource_sub_type = BNXT_ULP_RESOURCE_SUB_TYPE_TT_PROFILE_TCAM_CACHE,
 658         .direction = TF_DIR_RX,
 659         .priority = BNXT_ULP_PRIORITY_LEVEL_0,
 660         .srch_b4_alloc = BNXT_ULP_SEARCH_BEFORE_ALLOC_NO,
 661         .key_start_idx = 18,
 662         .blob_key_bit_size = 81,
 663         .key_bit_size = 81,
 664         .key_num_fields = 42,
 665         .result_start_idx = 15,
 666         .result_bit_size = 38,
 667         .result_num_fields = 8,
 668         .ident_start_idx = 2,
 669         .ident_nums = 0,
 670         .mark_enable = BNXT_ULP_MARK_ENABLE_NO,
 671         .critical_resource = 0,
 672         .cache_tbl_id = 0,
 673         .regfile_wr_idx = BNXT_ULP_REGFILE_INDEX_NOT_USED
 674         },
 675         {
 676         .resource_func = BNXT_ULP_RESOURCE_FUNC_EM_TABLE,
 677         .resource_type = TF_MEM_EXTERNAL,
 678         .resource_sub_type = BNXT_ULP_RESOURCE_SUB_TYPE_NOT_USED,
 679         .direction = TF_DIR_RX,
 680         .priority = BNXT_ULP_PRIORITY_NOT_USED,
 681         .srch_b4_alloc = BNXT_ULP_SEARCH_BEFORE_ALLOC_NO,
 682         .key_start_idx = 60,
 683         .blob_key_bit_size = 448,
 684         .key_bit_size = 448,
 685         .key_num_fields = 11,
 686         .result_start_idx = 23,
 687         .result_bit_size = 64,
 688         .result_num_fields = 9,
 689         .ident_start_idx = 2,
 690         .ident_nums = 0,
 691         .mark_enable = BNXT_ULP_MARK_ENABLE_YES,
 692         .critical_resource = 1,
 693         .cache_tbl_id = 0,
 694         .regfile_wr_idx = BNXT_ULP_REGFILE_INDEX_NOT_USED
 695         }
 696 };
 697
 698 struct bnxt_ulp_mapper_class_key_field_info ulp_class_key_field_list[] = {
 699         {
 700         .field_bit_size = 8,
 701         .mask_opcode = BNXT_ULP_MASK_OPC_SET_TO_CONSTANT,
 702         .mask_operand = {0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
 703                 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00},
 704         .spec_opcode = BNXT_ULP_SPEC_OPC_SET_TO_HDR_FIELD,
 705         .spec_operand = {(BNXT_ULP_HF0_IDX_SVIF_INDEX >> 8) & 0xff,
 706                 BNXT_ULP_HF0_IDX_SVIF_INDEX & 0xff,
 707                 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
 708                 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}
 709         },
 710         {
 711         .field_bit_size = 4,
 712         .mask_opcode = BNXT_ULP_MASK_OPC_SET_TO_CONSTANT,
 713         .mask_operand = {0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
 714                 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00},
 715         .spec_opcode = BNXT_ULP_SPEC_OPC_SET_TO_CONSTANT,
 716         .spec_operand = {BNXT_ULP_SYM_TUN_HDR_TYPE_NONE,
 717                 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
 718                 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}
 719         },
 720         {
 721         .field_bit_size = 12,
 722         .mask_opcode = BNXT_ULP_MASK_OPC_SET_TO_CONSTANT,
 723         .mask_operand = {0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
 724                 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00},
 725         .spec_opcode = BNXT_ULP_SPEC_OPC_SET_TO_CONSTANT,
 726         .spec_operand = {0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
 727                 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}
 728         },
 729         {
 730         .field_bit_size = 12,
 731         .mask_opcode = BNXT_ULP_MASK_OPC_SET_TO_CONSTANT,
 732         .mask_operand = {0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
 733                 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00},
 734         .spec_opcode = BNXT_ULP_SPEC_OPC_SET_TO_CONSTANT,
 735         .spec_operand = {0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
 736                 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}
 737         },
 738         {
 739         .field_bit_size = 48,
 740         .mask_opcode = BNXT_ULP_MASK_OPC_SET_TO_CONSTANT,
 741         .mask_operand = {0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
 742                 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00},
 743         .spec_opcode = BNXT_ULP_SPEC_OPC_SET_TO_CONSTANT,
 744         .spec_operand = {0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
 745                 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}
 746         },
 747         {
 748         .field_bit_size = 8,
 749         .mask_opcode = BNXT_ULP_MASK_OPC_SET_TO_HDR_FIELD,
 750         .mask_operand = {(BNXT_ULP_HF0_IDX_SVIF_INDEX >> 8) & 0xff,
 751                 BNXT_ULP_HF0_IDX_SVIF_INDEX & 0xff,
 752                 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
 753                 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00},
 754         .spec_opcode = BNXT_ULP_SPEC_OPC_SET_TO_HDR_FIELD,
 755         .spec_operand = {(BNXT_ULP_HF0_IDX_SVIF_INDEX >> 8) & 0xff,
 756                 BNXT_ULP_HF0_IDX_SVIF_INDEX & 0xff,
 757                 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
 758                 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}
 759         },
 760         {
 761         .field_bit_size = 4,
 762         .mask_opcode = BNXT_ULP_MASK_OPC_SET_TO_CONSTANT,
 763         .mask_operand = {0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
 764                 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00},
 765         .spec_opcode = BNXT_ULP_SPEC_OPC_SET_TO_CONSTANT,
 766         .spec_operand = {0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
 767                 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}
 768         },
 769         {
 770         .field_bit_size = 12,
 771         .mask_opcode = BNXT_ULP_MASK_OPC_SET_TO_CONSTANT,
 772         .mask_operand = {0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
 773                 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00},
 774         .spec_opcode = BNXT_ULP_SPEC_OPC_SET_TO_CONSTANT,
 775         .spec_operand = {0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
 776                 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}
 777         },
 778         {
 779         .field_bit_size = 12,
 780         .mask_opcode = BNXT_ULP_MASK_OPC_SET_TO_CONSTANT,
 781         .mask_operand = {0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
 782                 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00},
 783         .spec_opcode = BNXT_ULP_SPEC_OPC_SET_TO_CONSTANT,
 784         .spec_operand = {0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
 785                 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}
 786         },
 787         {
 788         .field_bit_size = 48,
 789         .mask_opcode = BNXT_ULP_MASK_OPC_SET_TO_CONSTANT,
 790         .mask_operand = {0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
 791                 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00},
 792         .spec_opcode = BNXT_ULP_SPEC_OPC_SET_TO_CONSTANT,
 793         .spec_operand = {0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
 794                 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}
 795         },
 796         {
 797         .field_bit_size = 2,
 798         .mask_opcode = BNXT_ULP_MASK_OPC_SET_TO_CONSTANT,
 799         .mask_operand = {0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
 800                 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00},
 801         .spec_opcode = BNXT_ULP_SPEC_OPC_SET_TO_CONSTANT,
 802         .spec_operand = {0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
 803                 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}
 804         },
 805         {
 806         .field_bit_size = 2,
 807         .mask_opcode = BNXT_ULP_MASK_OPC_SET_TO_CONSTANT,
 808         .mask_operand = {0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
 809                 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00},
 810         .spec_opcode = BNXT_ULP_SPEC_OPC_SET_TO_CONSTANT,
 811         .spec_operand = {0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
 812                 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}
 813         },
 814         {
 815         .field_bit_size = 4,
 816         .mask_opcode = BNXT_ULP_MASK_OPC_SET_TO_CONSTANT,
 817         .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
 818                 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff},
 819         .spec_opcode = BNXT_ULP_SPEC_OPC_SET_TO_CONSTANT,
 820         .spec_operand = {BNXT_ULP_SYM_TUN_HDR_TYPE_NONE,
 821                 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
 822                 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}
 823         },
 824         {
 825         .field_bit_size = 2,
 826         .mask_opcode = BNXT_ULP_MASK_OPC_SET_TO_CONSTANT,
 827         .mask_operand = {0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
 828                 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00},
 829         .spec_opcode = BNXT_ULP_SPEC_OPC_SET_TO_CONSTANT,
 830         .spec_operand = {0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
 831                 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}
 832         },
 833         {
 834         .field_bit_size = 1,
 835         .mask_opcode = BNXT_ULP_MASK_OPC_SET_TO_CONSTANT,
 836         .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
 837                 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff},
 838         .spec_opcode = BNXT_ULP_SPEC_OPC_SET_TO_CONSTANT,
 839         .spec_operand = {0x01, 0x00, 0x00, 0x00, 0x00, 0x00,
 840                 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}
 841         },
 842         {
 843         .field_bit_size = 1,
 844         .mask_opcode = BNXT_ULP_MASK_OPC_SET_TO_CONSTANT,
 845         .mask_operand = {0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
 846                 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00},
 847         .spec_opcode = BNXT_ULP_SPEC_OPC_SET_TO_COMP_FIELD,
 848         .spec_operand = {
 849                 (BNXT_ULP_CF_IDX_O_VTAG_NUM >> 8) & 0xff,
 850                 BNXT_ULP_CF_IDX_O_VTAG_NUM & 0xff,
 851                 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
 852                 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}
 853         },
 854         {
 855         .field_bit_size = 7,
 856         .mask_opcode = BNXT_ULP_MASK_OPC_SET_TO_CONSTANT,
 857         .mask_operand = {0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
 858                 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00},
 859         .spec_opcode = BNXT_ULP_SPEC_OPC_SET_TO_GLB_REGFILE,
 860         .spec_operand = {
 861                 (BNXT_ULP_GLB_REGFILE_INDEX_GLB_PROF_FUNC_ID >> 8) & 0xff,
 862                 BNXT_ULP_GLB_REGFILE_INDEX_GLB_PROF_FUNC_ID & 0xff,
 863                 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
 864                 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}
 865         },
 866         {
 867         .field_bit_size = 8,
 868         .mask_opcode = BNXT_ULP_MASK_OPC_SET_TO_CONSTANT,
 869         .mask_operand = {0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
 870                 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00},
 871         .spec_opcode = BNXT_ULP_SPEC_OPC_SET_TO_REGFILE,
 872         .spec_operand = {(BNXT_ULP_REGFILE_INDEX_CLASS_TID >> 8) & 0xff,
 873                 BNXT_ULP_REGFILE_INDEX_CLASS_TID & 0xff,
 874                 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
 875                 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}
 876         },
 877         {
 878         .field_bit_size = 1,
 879         .mask_opcode = BNXT_ULP_MASK_OPC_SET_TO_CONSTANT,
 880         .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
 881                 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff},
 882         .spec_opcode = BNXT_ULP_SPEC_OPC_SET_TO_CONSTANT,
 883         .spec_operand = {0x01, 0x00, 0x00, 0x00, 0x00, 0x00,
 884                 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}
 885         },
 886         {
 887         .field_bit_size = 4,
 888         .mask_opcode = BNXT_ULP_MASK_OPC_SET_TO_CONSTANT,
 889         .mask_operand = {0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
 890                 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00},
 891         .spec_opcode = BNXT_ULP_SPEC_OPC_SET_TO_CONSTANT,
 892         .spec_operand = {0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
 893                 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}
 894         },
 895         {
 896         .field_bit_size = 1,
 897         .mask_opcode = BNXT_ULP_MASK_OPC_SET_TO_CONSTANT,
 898         .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
 899                 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff},
 900         .spec_opcode = BNXT_ULP_SPEC_OPC_SET_TO_CONSTANT,
 901         .spec_operand = {0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
 902                 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}
 903         },
 904         {
 905         .field_bit_size = 1,
 906         .mask_opcode = BNXT_ULP_MASK_OPC_SET_TO_CONSTANT,
 907         .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
 908                 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff},
 909         .spec_opcode = BNXT_ULP_SPEC_OPC_SET_TO_CONSTANT,
 910         .spec_operand = {0x01, 0x00, 0x00, 0x00, 0x00, 0x00,
 911                 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}
 912         },
 913         {
 914         .field_bit_size = 1,
 915         .mask_opcode = BNXT_ULP_MASK_OPC_SET_TO_CONSTANT,
 916         .mask_operand = {0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
 917                 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00},
 918         .spec_opcode = BNXT_ULP_SPEC_OPC_SET_TO_CONSTANT,
 919         .spec_operand = {0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
 920                 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}
 921         },
 922         {
 923         .field_bit_size = 1,
 924         .mask_opcode = BNXT_ULP_MASK_OPC_SET_TO_CONSTANT,
 925         .mask_operand = {0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
 926                 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00},
 927         .spec_opcode = BNXT_ULP_SPEC_OPC_SET_TO_CONSTANT,
 928         .spec_operand = {0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
 929                 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}
 930         },
 931         {
 932         .field_bit_size = 1,
 933         .mask_opcode = BNXT_ULP_MASK_OPC_SET_TO_CONSTANT,
 934         .mask_operand = {0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
 935                 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00},
 936         .spec_opcode = BNXT_ULP_SPEC_OPC_SET_TO_CONSTANT,
 937         .spec_operand = {0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
 938                 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}
 939         },
 940         {
 941         .field_bit_size = 4,
 942         .mask_opcode = BNXT_ULP_MASK_OPC_SET_TO_CONSTANT,
 943         .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
 944                 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff},
 945         .spec_opcode = BNXT_ULP_SPEC_OPC_SET_TO_CONSTANT,
 946         .spec_operand = {BNXT_ULP_SYM_L3_HDR_TYPE_IPV4,
 947                 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
 948                 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}
 949         },
 950         {
 951         .field_bit_size = 1,
 952         .mask_opcode = BNXT_ULP_MASK_OPC_SET_TO_CONSTANT,
 953         .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
 954                 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff},
 955         .spec_opcode = BNXT_ULP_SPEC_OPC_SET_TO_CONSTANT,
 956         .spec_operand = {0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
 957                 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}
 958         },
 959         {
 960         .field_bit_size = 1,
 961         .mask_opcode = BNXT_ULP_MASK_OPC_SET_TO_CONSTANT,
 962         .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
 963                 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff},
 964         .spec_opcode = BNXT_ULP_SPEC_OPC_SET_TO_CONSTANT,
 965         .spec_operand = {0x01, 0x00, 0x00, 0x00, 0x00, 0x00,
 966                 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}
 967         },
 968         {
 969         .field_bit_size = 1,
 970         .mask_opcode = BNXT_ULP_MASK_OPC_SET_TO_CONSTANT,
 971         .mask_operand = {0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
 972                 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00},
 973         .spec_opcode = BNXT_ULP_SPEC_OPC_SET_TO_CONSTANT,
 974         .spec_operand = {0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
 975                 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}
 976         },
 977         {
 978         .field_bit_size = 1,
 979         .mask_opcode = BNXT_ULP_MASK_OPC_SET_TO_CONSTANT,
 980         .mask_operand = {0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
 981                 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00},
 982         .spec_opcode = BNXT_ULP_SPEC_OPC_SET_TO_CONSTANT,
 983         .spec_operand = {0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
 984                 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}
 985         },
 986         {
 987         .field_bit_size = 2,
 988         .mask_opcode = BNXT_ULP_MASK_OPC_SET_TO_CONSTANT,
 989         .mask_operand = {0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
 990                 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00},
 991         .spec_opcode = BNXT_ULP_SPEC_OPC_SET_TO_CONSTANT,
 992         .spec_operand = {0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
 993                 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}
 994         },
 995         {
 996         .field_bit_size = 2,
 997         .mask_opcode = BNXT_ULP_MASK_OPC_SET_TO_CONSTANT,
 998         .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
 999                 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff},
1000         .spec_opcode = BNXT_ULP_SPEC_OPC_SET_TO_CONSTANT,
1001         .spec_operand = {BNXT_ULP_SYM_L2_HDR_TYPE_DIX,
1002                 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
1003                 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}
1004         },
1005         {
1006         .field_bit_size = 1,
1007         .mask_opcode = BNXT_ULP_MASK_OPC_SET_TO_CONSTANT,
1008         .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
1009                 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff},
1010         .spec_opcode = BNXT_ULP_SPEC_OPC_SET_TO_CONSTANT,
1011         .spec_operand = {0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
1012                 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}
1013         },
1014         {
1015         .field_bit_size = 1,
1016         .mask_opcode = BNXT_ULP_MASK_OPC_SET_TO_CONSTANT,
1017         .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
1018                 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff},
1019         .spec_opcode = BNXT_ULP_SPEC_OPC_SET_TO_CONSTANT,
1020         .spec_operand = {0x01, 0x00, 0x00, 0x00, 0x00, 0x00,
1021                 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}
1022         },
1023         {
1024         .field_bit_size = 3,
1025         .mask_opcode = BNXT_ULP_MASK_OPC_SET_TO_CONSTANT,
1026         .mask_operand = {0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
1027                 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00},
1028         .spec_opcode = BNXT_ULP_SPEC_OPC_SET_TO_CONSTANT,
1029         .spec_operand = {0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
1030                 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}
1031         },
1032         {
1033         .field_bit_size = 4,
1034         .mask_opcode = BNXT_ULP_MASK_OPC_SET_TO_CONSTANT,
1035         .mask_operand = {0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
1036                 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00},
1037         .spec_opcode = BNXT_ULP_SPEC_OPC_SET_TO_CONSTANT,
1038         .spec_operand = {BNXT_ULP_SYM_TUN_HDR_TYPE_NONE,
1039                 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
1040                 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}
1041         },
1042         {
1043         .field_bit_size = 1,
1044         .mask_opcode = BNXT_ULP_MASK_OPC_SET_TO_CONSTANT,
1045         .mask_operand = {0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
1046                 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00},
1047         .spec_opcode = BNXT_ULP_SPEC_OPC_SET_TO_CONSTANT,
1048         .spec_operand = {0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
1049                 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}
1050         },
1051         {
1052         .field_bit_size = 1,
1053         .mask_opcode = BNXT_ULP_MASK_OPC_SET_TO_CONSTANT,
1054         .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
1055                 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff},
1056         .spec_opcode = BNXT_ULP_SPEC_OPC_SET_TO_CONSTANT,
1057         .spec_operand = {0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
1058                 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}
1059         },
1060         {
1061         .field_bit_size = 1,
1062         .mask_opcode = BNXT_ULP_MASK_OPC_SET_TO_CONSTANT,
1063         .mask_operand = {0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
1064                 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00},
1065         .spec_opcode = BNXT_ULP_SPEC_OPC_SET_TO_CONSTANT,
1066         .spec_operand = {0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
1067                 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}
1068         },
1069         {
1070         .field_bit_size = 4,
1071         .mask_opcode = BNXT_ULP_MASK_OPC_SET_TO_CONSTANT,
1072         .mask_operand = {0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
1073                 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00},
1074         .spec_opcode = BNXT_ULP_SPEC_OPC_SET_TO_CONSTANT,
1075         .spec_operand = {BNXT_ULP_SYM_TL4_HDR_TYPE_UDP,
1076                 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
1077                 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}
1078         },
1079         {
1080         .field_bit_size = 1,
1081         .mask_opcode = BNXT_ULP_MASK_OPC_SET_TO_CONSTANT,
1082         .mask_operand = {0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
1083                 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00},
1084         .spec_opcode = BNXT_ULP_SPEC_OPC_SET_TO_CONSTANT,
1085         .spec_operand = {0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
1086                 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}
1087         },
1088         {
1089         .field_bit_size = 1,
1090         .mask_opcode = BNXT_ULP_MASK_OPC_SET_TO_CONSTANT,
1091         .mask_operand = {0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
1092                 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00},
1093         .spec_opcode = BNXT_ULP_SPEC_OPC_SET_TO_CONSTANT,
1094         .spec_operand = {0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
1095                 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}
1096         },
1097         {
1098         .field_bit_size = 1,
1099         .mask_opcode = BNXT_ULP_MASK_OPC_SET_TO_CONSTANT,
1100         .mask_operand = {0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
1101                 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00},
1102         .spec_opcode = BNXT_ULP_SPEC_OPC_SET_TO_CONSTANT,
1103         .spec_operand = {0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
1104                 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}
1105         },
1106         {
1107         .field_bit_size = 1,
1108         .mask_opcode = BNXT_ULP_MASK_OPC_SET_TO_CONSTANT,
1109         .mask_operand = {0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
1110                 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00},
1111         .spec_opcode = BNXT_ULP_SPEC_OPC_SET_TO_CONSTANT,
1112         .spec_operand = {0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
1113                 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}
1114         },
1115         {
1116         .field_bit_size = 1,
1117         .mask_opcode = BNXT_ULP_MASK_OPC_SET_TO_CONSTANT,
1118         .mask_operand = {0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
1119                 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00},
1120         .spec_opcode = BNXT_ULP_SPEC_OPC_SET_TO_CONSTANT,
1121         .spec_operand = {0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
1122                 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}
1123         },
1124         {
1125         .field_bit_size = 4,
1126         .mask_opcode = BNXT_ULP_MASK_OPC_SET_TO_CONSTANT,
1127         .mask_operand = {0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
1128                 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00},
1129         .spec_opcode = BNXT_ULP_SPEC_OPC_SET_TO_CONSTANT,
1130         .spec_operand = {BNXT_ULP_SYM_TL3_HDR_TYPE_IPV4,
1131                 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
1132                 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}
1133         },
1134         {
1135         .field_bit_size = 1,
1136         .mask_opcode = BNXT_ULP_MASK_OPC_SET_TO_CONSTANT,
1137         .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
1138                 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff},
1139         .spec_opcode = BNXT_ULP_SPEC_OPC_SET_TO_CONSTANT,
1140         .spec_operand = {0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
1141                 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}
1142         },
1143         {
1144         .field_bit_size = 1,
1145         .mask_opcode = BNXT_ULP_MASK_OPC_SET_TO_CONSTANT,
1146         .mask_operand = {0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
1147                 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00},
1148         .spec_opcode = BNXT_ULP_SPEC_OPC_SET_TO_CONSTANT,
1149         .spec_operand = {0x01, 0x00, 0x00, 0x00, 0x00, 0x00,
1150                 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}
1151         },
1152         {
1153         .field_bit_size = 1,
1154         .mask_opcode = BNXT_ULP_MASK_OPC_SET_TO_CONSTANT,
1155         .mask_operand = {0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
1156                 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00},
1157         .spec_opcode = BNXT_ULP_SPEC_OPC_SET_TO_CONSTANT,
1158         .spec_operand = {0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
1159                 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}
1160         },
1161         {
1162         .field_bit_size = 1,
1163         .mask_opcode = BNXT_ULP_MASK_OPC_SET_TO_CONSTANT,
1164         .mask_operand = {0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
1165                 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00},
1166         .spec_opcode = BNXT_ULP_SPEC_OPC_SET_TO_CONSTANT,
1167         .spec_operand = {0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
1168                 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}
1169         },
1170         {
1171         .field_bit_size = 2,
1172         .mask_opcode = BNXT_ULP_MASK_OPC_SET_TO_CONSTANT,
1173         .mask_operand = {0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
1174                 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00},
1175         .spec_opcode = BNXT_ULP_SPEC_OPC_SET_TO_CONSTANT,
1176         .spec_operand = {0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
1177                 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}
1178         },
1179         {
1180         .field_bit_size = 2,
1181         .mask_opcode = BNXT_ULP_MASK_OPC_SET_TO_CONSTANT,
1182         .mask_operand = {0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
1183                 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00},
1184         .spec_opcode = BNXT_ULP_SPEC_OPC_SET_TO_CONSTANT,
1185         .spec_operand = {BNXT_ULP_SYM_TL2_HDR_TYPE_DIX,
1186                 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
1187                 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}
1188         },
1189         {
1190         .field_bit_size = 1,
1191         .mask_opcode = BNXT_ULP_MASK_OPC_SET_TO_CONSTANT,
1192         .mask_operand = {0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
1193                 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00},
1194         .spec_opcode = BNXT_ULP_SPEC_OPC_SET_TO_CONSTANT,
1195         .spec_operand = {0x01, 0x00, 0x00, 0x00, 0x00, 0x00,
1196                 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}
1197         },
1198         {
1199         .field_bit_size = 1,
1200         .mask_opcode = BNXT_ULP_MASK_OPC_SET_TO_CONSTANT,
1201         .mask_operand = {0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
1202                 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00},
1203         .spec_opcode = BNXT_ULP_SPEC_OPC_SET_TO_CONSTANT,
1204         .spec_operand = {0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
1205                 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}
1206         },
1207         {
1208         .field_bit_size = 9,
1209         .mask_opcode = BNXT_ULP_MASK_OPC_SET_TO_CONSTANT,
1210         .mask_operand = {0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
1211                 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00},
1212         .spec_opcode = BNXT_ULP_SPEC_OPC_SET_TO_CONSTANT,
1213         .spec_operand = {0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
1214                 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}
1215         },
1216         {
1217         .field_bit_size = 7,
1218         .mask_opcode = BNXT_ULP_MASK_OPC_SET_TO_CONSTANT,
1219         .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
1220                 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff},
1221         .spec_opcode = BNXT_ULP_SPEC_OPC_SET_TO_GLB_REGFILE,
1222         .spec_operand = {
1223                 (BNXT_ULP_GLB_REGFILE_INDEX_GLB_PROF_FUNC_ID >> 8) & 0xff,
1224                 BNXT_ULP_GLB_REGFILE_INDEX_GLB_PROF_FUNC_ID & 0xff,
1225                 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
1226                 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}
1227         },
1228         {
1229         .field_bit_size = 1,
1230         .mask_opcode = BNXT_ULP_MASK_OPC_SET_TO_CONSTANT,
1231         .mask_operand = {0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
1232                 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00},
1233         .spec_opcode = BNXT_ULP_SPEC_OPC_SET_TO_CONSTANT,
1234         .spec_operand = {0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
1235                 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}
1236         },
1237         {
1238         .field_bit_size = 2,
1239         .mask_opcode = BNXT_ULP_MASK_OPC_SET_TO_CONSTANT,
1240         .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
1241                 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff},
1242         .spec_opcode = BNXT_ULP_SPEC_OPC_SET_TO_CONSTANT,
1243         .spec_operand = {0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
1244                 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}
1245         },
1246         {
1247         .field_bit_size = 4,
1248         .mask_opcode = BNXT_ULP_MASK_OPC_SET_TO_CONSTANT,
1249         .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
1250                 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff},
1251         .spec_opcode = BNXT_ULP_SPEC_OPC_SET_TO_CONSTANT,
1252         .spec_operand = {BNXT_ULP_SYM_PKT_TYPE_L2,
1253                 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
1254                 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}
1255         },
1256         {
1257         .field_bit_size = 1,
1258         .mask_opcode = BNXT_ULP_MASK_OPC_SET_TO_CONSTANT,
1259         .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
1260                 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff},
1261         .spec_opcode = BNXT_ULP_SPEC_OPC_SET_TO_CONSTANT,
1262         .spec_operand = {0x01, 0x00, 0x00, 0x00, 0x00, 0x00,
1263                 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}
1264         },
1265         {
1266         .field_bit_size = 251,
1267         .mask_opcode = BNXT_ULP_MASK_OPC_SET_TO_CONSTANT,
1268         .mask_operand = {0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
1269                 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00},
1270         .spec_opcode = BNXT_ULP_SPEC_OPC_ADD_PAD,
1271         .spec_operand = {0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
1272                 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}
1273         },
1274         {
1275         .field_bit_size = 3,
1276         .mask_opcode = BNXT_ULP_MASK_OPC_SET_TO_CONSTANT,
1277         .mask_operand = {0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
1278                 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00},
1279         .spec_opcode = BNXT_ULP_SPEC_OPC_SET_TO_CONSTANT,
1280         .spec_operand = {0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
1281                 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}
1282         },
1283         {
1284         .field_bit_size = 16,
1285         .mask_opcode = BNXT_ULP_MASK_OPC_SET_TO_CONSTANT,
1286         .mask_operand = {0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
1287                 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00},
1288         .spec_opcode = BNXT_ULP_SPEC_OPC_SET_TO_HDR_FIELD,
1289         .spec_operand = {(BNXT_ULP_HF0_IDX_O_UDP_DST_PORT >> 8) & 0xff,
1290                 BNXT_ULP_HF0_IDX_O_UDP_DST_PORT & 0xff,
1291                 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
1292                 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}
1293         },
1294         {
1295         .field_bit_size = 16,
1296         .mask_opcode = BNXT_ULP_MASK_OPC_SET_TO_CONSTANT,
1297         .mask_operand = {0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
1298                 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00},
1299         .spec_opcode = BNXT_ULP_SPEC_OPC_SET_TO_HDR_FIELD,
1300         .spec_operand = {(BNXT_ULP_HF0_IDX_O_UDP_SRC_PORT >> 8) & 0xff,
1301                 BNXT_ULP_HF0_IDX_O_UDP_SRC_PORT & 0xff,
1302                 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
1303                 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}
1304         },
1305         {
1306         .field_bit_size = 8,
1307         .mask_opcode = BNXT_ULP_MASK_OPC_SET_TO_CONSTANT,
1308         .mask_operand = {0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
1309                 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00},
1310         .spec_opcode = BNXT_ULP_SPEC_OPC_SET_TO_CONSTANT,
1311         .spec_operand = {BNXT_ULP_SYM_IP_PROTO_UDP,
1312                 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
1313                 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}
1314         },
1315         {
1316         .field_bit_size = 32,
1317         .mask_opcode = BNXT_ULP_MASK_OPC_SET_TO_CONSTANT,
1318         .mask_operand = {0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
1319                 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00},
1320         .spec_opcode = BNXT_ULP_SPEC_OPC_SET_TO_HDR_FIELD,
1321         .spec_operand = {(BNXT_ULP_HF0_IDX_O_IPV4_DST_ADDR >> 8) & 0xff,
1322                 BNXT_ULP_HF0_IDX_O_IPV4_DST_ADDR & 0xff,
1323                 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
1324                 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}
1325         },
1326         {
1327         .field_bit_size = 32,
1328         .mask_opcode = BNXT_ULP_MASK_OPC_SET_TO_CONSTANT,
1329         .mask_operand = {0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
1330                 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00},
1331         .spec_opcode = BNXT_ULP_SPEC_OPC_SET_TO_HDR_FIELD,
1332         .spec_operand = {(BNXT_ULP_HF0_IDX_O_IPV4_SRC_ADDR >> 8) & 0xff,
1333                 BNXT_ULP_HF0_IDX_O_IPV4_SRC_ADDR & 0xff,
1334                 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
1335                 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}
1336         },
1337         {
1338         .field_bit_size = 48,
1339         .mask_opcode = BNXT_ULP_MASK_OPC_SET_TO_CONSTANT,
1340         .mask_operand = {0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
1341                 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00},
1342         .spec_opcode = BNXT_ULP_SPEC_OPC_SET_TO_CONSTANT,
1343         .spec_operand = {0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
1344                 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}
1345         },
1346         {
1347         .field_bit_size = 24,
1348         .mask_opcode = BNXT_ULP_MASK_OPC_SET_TO_CONSTANT,
1349         .mask_operand = {0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
1350                 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00},
1351         .spec_opcode = BNXT_ULP_SPEC_OPC_SET_TO_CONSTANT,
1352         .spec_operand = {0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
1353                 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}
1354         },
1355         {
1356         .field_bit_size = 10,
1357         .mask_opcode = BNXT_ULP_MASK_OPC_SET_TO_CONSTANT,
1358         .mask_operand = {0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
1359                 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00},
1360         .spec_opcode = BNXT_ULP_SPEC_OPC_SET_TO_REGFILE,
1361         .spec_operand = {(BNXT_ULP_REGFILE_INDEX_L2_CNTXT_ID_0 >> 8) & 0xff,
1362                 BNXT_ULP_REGFILE_INDEX_L2_CNTXT_ID_0 & 0xff,
1363                 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
1364                 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}
1365         },
1366         {
1367         .field_bit_size = 8,
1368         .mask_opcode = BNXT_ULP_MASK_OPC_SET_TO_CONSTANT,
1369         .mask_operand = {0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
1370                 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00},
1371         .spec_opcode = BNXT_ULP_SPEC_OPC_SET_TO_REGFILE,
1372         .spec_operand = {(BNXT_ULP_REGFILE_INDEX_EM_PROFILE_ID_0 >> 8) & 0xff,
1373                 BNXT_ULP_REGFILE_INDEX_EM_PROFILE_ID_0 & 0xff,
1374                 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
1375                 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}
1376         }
1377 };
1378
1379 struct bnxt_ulp_mapper_result_field_info ulp_class_result_field_list[] = {
1380         {
1381         .field_bit_size = 10,
1382         .result_opcode = BNXT_ULP_RESULT_OPC_SET_TO_REGFILE,
1383         .result_operand = {(BNXT_ULP_REGFILE_INDEX_L2_CNTXT_ID_0 >> 8) & 0xff,
1384                 BNXT_ULP_REGFILE_INDEX_L2_CNTXT_ID_0 & 0xff,
1385                 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
1386                 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}
1387         },
1388         {
1389         .field_bit_size = 10,
1390         .result_opcode = BNXT_ULP_RESULT_OPC_SET_TO_REGFILE,
1391         .result_operand = {(BNXT_ULP_REGFILE_INDEX_L2_CNTXT_ID_0 >> 8) & 0xff,
1392                 BNXT_ULP_REGFILE_INDEX_L2_CNTXT_ID_0 & 0xff,
1393                 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
1394                 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}
1395         },
1396         {
1397         .field_bit_size = 7,
1398         .result_opcode = BNXT_ULP_RESULT_OPC_SET_TO_GLB_REGFILE,
1399         .result_operand = {
1400                 (BNXT_ULP_GLB_REGFILE_INDEX_GLB_PROF_FUNC_ID >> 8) & 0xff,
1401                 BNXT_ULP_GLB_REGFILE_INDEX_GLB_PROF_FUNC_ID & 0xff,
1402                 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
1403                 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}
1404         },
1405         {
1406         .field_bit_size = 1,
1407         .result_opcode = BNXT_ULP_RESULT_OPC_SET_TO_CONSTANT,
1408         .result_operand = {0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
1409                 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}
1410         },
1411         {
1412         .field_bit_size = 4,
1413         .result_opcode = BNXT_ULP_RESULT_OPC_SET_TO_CONSTANT,
1414         .result_operand = {0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
1415                 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}
1416         },
1417         {
1418         .field_bit_size = 8,
1419         .result_opcode = BNXT_ULP_RESULT_OPC_SET_TO_CONSTANT,
1420         .result_operand = {0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
1421                 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}
1422         },
1423         {
1424         .field_bit_size = 3,
1425         .result_opcode = BNXT_ULP_RESULT_OPC_SET_TO_CONSTANT,
1426         .result_operand = {0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
1427                 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}
1428         },
1429         {
1430         .field_bit_size = 6,
1431         .result_opcode = BNXT_ULP_RESULT_OPC_SET_TO_CONSTANT,
1432         .result_operand = {0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
1433                 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}
1434         },
1435         {
1436         .field_bit_size = 3,
1437         .result_opcode = BNXT_ULP_RESULT_OPC_SET_TO_CONSTANT,
1438         .result_operand = {0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
1439                 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}
1440         },
1441         {
1442         .field_bit_size = 1,
1443         .result_opcode = BNXT_ULP_RESULT_OPC_SET_TO_CONSTANT,
1444         .result_operand = {0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
1445                 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}
1446         },
1447         {
1448         .field_bit_size = 16,
1449         .result_opcode = BNXT_ULP_RESULT_OPC_SET_TO_CONSTANT,
1450         .result_operand = {0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
1451                 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}
1452         },
1453         {
1454         .field_bit_size = 1,
1455         .result_opcode = BNXT_ULP_RESULT_OPC_SET_TO_CONSTANT,
1456         .result_operand = {0x01, 0x00, 0x00, 0x00, 0x00, 0x00,
1457                 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}
1458         },
1459         {
1460         .field_bit_size = 2,
1461         .result_opcode = BNXT_ULP_RESULT_OPC_SET_TO_CONSTANT,
1462         .result_operand = {0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
1463                 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}
1464         },
1465         {
1466         .field_bit_size = 2,
1467         .result_opcode = BNXT_ULP_RESULT_OPC_SET_TO_CONSTANT,
1468         .result_operand = {0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
1469                 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}
1470         },
1471
1472         {
1473         .field_bit_size = 10,
1474         .result_opcode = BNXT_ULP_RESULT_OPC_SET_TO_REGFILE,
1475         .result_operand = {(BNXT_ULP_REGFILE_INDEX_EM_PROFILE_ID_0 >> 8) & 0xff,
1476                 BNXT_ULP_REGFILE_INDEX_EM_PROFILE_ID_0 & 0xff,
1477                 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
1478                 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}
1479         },
1480         {
1481         .field_bit_size = 4,
1482         .result_opcode = BNXT_ULP_RESULT_OPC_SET_TO_CONSTANT,
1483         .result_operand = {0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
1484                 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}
1485         },
1486         {
1487         .field_bit_size = 8,
1488         .result_opcode = BNXT_ULP_RESULT_OPC_SET_TO_CONSTANT,
1489         .result_operand = {0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
1490                 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}
1491         },
1492         {
1493         .field_bit_size = 1,
1494         .result_opcode = BNXT_ULP_RESULT_OPC_SET_TO_CONSTANT,
1495         .result_operand = {0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
1496                 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}
1497         },
1498         {
1499         .field_bit_size = 10,
1500         .result_opcode = BNXT_ULP_RESULT_OPC_SET_TO_CONSTANT,
1501         .result_operand = {(0x00f9 >> 8) & 0xff,
1502                 0x00f9 & 0xff,
1503                 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
1504                 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}
1505         },
1506         {
1507         .field_bit_size = 5,
1508         .result_opcode = BNXT_ULP_RESULT_OPC_SET_TO_CONSTANT,
1509         .result_operand = {0x15, 0x00, 0x00, 0x00, 0x00, 0x00,
1510                 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}
1511         },
1512         {
1513         .field_bit_size = 8,
1514         .result_opcode = BNXT_ULP_RESULT_OPC_SET_TO_REGFILE,
1515         .result_operand = {(BNXT_ULP_REGFILE_INDEX_EM_PROFILE_ID_0 >> 8) & 0xff,
1516                 BNXT_ULP_REGFILE_INDEX_EM_PROFILE_ID_0 & 0xff,
1517                 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
1518                 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}
1519         },
1520         {
1521         .field_bit_size = 1,
1522         .result_opcode = BNXT_ULP_RESULT_OPC_SET_TO_CONSTANT,
1523         .result_operand = {0x01, 0x00, 0x00, 0x00, 0x00, 0x00,
1524                 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}
1525         },
1526         {
1527         .field_bit_size = 1,
1528         .result_opcode = BNXT_ULP_RESULT_OPC_SET_TO_CONSTANT,
1529         .result_operand = {0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
1530                 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}
1531         },
1532         {
1533         .field_bit_size = 33,
1534         .result_opcode = BNXT_ULP_RESULT_OPC_SET_TO_REGFILE,
1535         .result_operand = {(BNXT_ULP_REGFILE_INDEX_ACTION_PTR_MAIN >> 8) & 0xff,
1536                 BNXT_ULP_REGFILE_INDEX_ACTION_PTR_MAIN & 0xff,
1537                 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
1538                 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}
1539         },
1540         {
1541         .field_bit_size = 1,
1542         .result_opcode = BNXT_ULP_RESULT_OPC_SET_TO_CONSTANT,
1543         .result_operand = {0x01, 0x00, 0x00, 0x00, 0x00, 0x00,
1544                 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}
1545         },
1546         {
1547         .field_bit_size = 1,
1548         .result_opcode = BNXT_ULP_RESULT_OPC_SET_TO_CONSTANT,
1549         .result_operand = {0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
1550                 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}
1551         },
1552         {
1553         .field_bit_size = 5,
1554         .result_opcode = BNXT_ULP_RESULT_OPC_SET_TO_CONSTANT,
1555         .result_operand = {0x02, 0x00, 0x00, 0x00, 0x00, 0x00,
1556                 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}
1557         },
1558         {
1559         .field_bit_size = 9,
1560         .result_opcode = BNXT_ULP_RESULT_OPC_SET_TO_CONSTANT,
1561         .result_operand = {(0x00c5 >> 8) & 0xff,
1562                 0x00c5 & 0xff,
1563                 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
1564                 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}
1565         },
1566         {
1567         .field_bit_size = 11,
1568         .result_opcode = BNXT_ULP_RESULT_OPC_SET_TO_CONSTANT,
1569         .result_operand = {0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
1570                 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}
1571         },
1572         {
1573         .field_bit_size = 2,
1574         .result_opcode = BNXT_ULP_RESULT_OPC_SET_TO_CONSTANT,
1575         .result_operand = {0x03, 0x00, 0x00, 0x00, 0x00, 0x00,
1576                 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}
1577         },
1578         {
1579         .field_bit_size = 1,
1580         .result_opcode = BNXT_ULP_RESULT_OPC_SET_TO_CONSTANT,
1581         .result_operand = {0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
1582                 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}
1583         },
1584         {
1585         .field_bit_size = 1,
1586         .result_opcode = BNXT_ULP_RESULT_OPC_SET_TO_CONSTANT,
1587         .result_operand = {0x01, 0x00, 0x00, 0x00, 0x00, 0x00,
1588                 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}
1589         }
1590 };
1591
1592 struct bnxt_ulp_mapper_ident_info ulp_ident_list[] = {
1593         {
1594         .resource_func = BNXT_ULP_RESOURCE_FUNC_IDENTIFIER,
1595         .ident_type = TF_IDENT_TYPE_L2_CTXT,
1596         .regfile_wr_idx = BNXT_ULP_REGFILE_INDEX_L2_CNTXT_ID_0,
1597         .ident_bit_size = 10,
1598         .ident_bit_pos = 0
1599         },
1600         {
1601         .resource_func = BNXT_ULP_RESOURCE_FUNC_IDENTIFIER,
1602         .ident_type = TF_IDENT_TYPE_EM_PROF,
1603         .regfile_wr_idx = BNXT_ULP_REGFILE_INDEX_EM_PROFILE_ID_0,
1604         .ident_bit_size = 10,
1605         .ident_bit_pos = 0
1606         }
1607 };
1608
1609 struct bnxt_ulp_mapper_tbl_list_info ulp_act_tmpl_list[] = {
1610         [((0 << BNXT_ULP_LOG2_MAX_NUM_DEV) |
1611                 BNXT_ULP_DEVICE_ID_WH_PLUS)] = {
1612         .device_name = BNXT_ULP_DEVICE_ID_WH_PLUS,
1613         .num_tbls = 1,
1614         .start_tbl_idx = 0
1615         }
1616 };
1617
1618 struct bnxt_ulp_mapper_act_tbl_info ulp_act_tbl_list[] = {
1619         {
1620         .resource_func = BNXT_ULP_RESOURCE_FUNC_INDEX_TABLE,
1621         .resource_type = TF_TBL_TYPE_EXT,
1622         .resource_sub_type = BNXT_ULP_RESOURCE_SUB_TYPE_IT_NORMAL,
1623         .direction = TF_DIR_RX,
1624         .srch_b4_alloc = BNXT_ULP_SEARCH_BEFORE_ALLOC_NO,
1625         .result_start_idx = 0,
1626         .result_bit_size = 128,
1627         .result_num_fields = 26,
1628         .encap_num_fields = 0,
1629         .regfile_wr_idx = BNXT_ULP_REGFILE_INDEX_ACTION_PTR_MAIN
1630         }
1631 };
1632
1633 struct bnxt_ulp_mapper_result_field_info ulp_act_result_field_list[] = {
1634         {
1635         .field_bit_size = 14,
1636         .result_opcode = BNXT_ULP_RESULT_OPC_SET_TO_CONSTANT,
1637         .result_operand = {0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
1638                 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}
1639         },
1640         {
1641         .field_bit_size = 1,
1642         .result_opcode = BNXT_ULP_RESULT_OPC_SET_TO_CONSTANT,
1643         .result_operand = {0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
1644                 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}
1645         },
1646         {
1647         .field_bit_size = 1,
1648         .result_opcode = BNXT_ULP_RESULT_OPC_SET_TO_CONSTANT,
1649         .result_operand = {0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
1650                 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}
1651         },
1652         {
1653         .field_bit_size = 1,
1654         .result_opcode = BNXT_ULP_RESULT_OPC_SET_TO_CONSTANT,
1655         .result_operand = {0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
1656                 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}
1657         },
1658         {
1659         .field_bit_size = 1,
1660         .result_opcode = BNXT_ULP_RESULT_OPC_SET_TO_CONSTANT,
1661         .result_operand = {0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
1662                 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}
1663         },
1664         {
1665         .field_bit_size = 1,
1666         .result_opcode = BNXT_ULP_RESULT_OPC_SET_TO_CONSTANT,
1667         .result_operand = {0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
1668                 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}
1669         },
1670         {
1671         .field_bit_size = 8,
1672         .result_opcode = BNXT_ULP_RESULT_OPC_SET_TO_CONSTANT,
1673         .result_operand = {0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
1674                 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}
1675         },
1676         {
1677         .field_bit_size = 1,
1678         .result_opcode = BNXT_ULP_RESULT_OPC_SET_TO_CONSTANT,
1679         .result_operand = {0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
1680                 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}
1681         },
1682         {
1683         .field_bit_size = 1,
1684         .result_opcode = BNXT_ULP_RESULT_OPC_SET_TO_CONSTANT,
1685         .result_operand = {0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
1686                 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}
1687         },
1688         {
1689         .field_bit_size = 11,
1690         .result_opcode = BNXT_ULP_RESULT_OPC_SET_TO_CONSTANT,
1691         .result_operand = {0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
1692                 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}
1693         },
1694         {
1695         .field_bit_size = 1,
1696         .result_opcode = BNXT_ULP_RESULT_OPC_SET_TO_CONSTANT,
1697         .result_operand = {0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
1698                 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}
1699         },
1700         {
1701         .field_bit_size = 10,
1702         .result_opcode = BNXT_ULP_RESULT_OPC_SET_TO_CONSTANT,
1703         .result_operand = {0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
1704                 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}
1705         },
1706         {
1707         .field_bit_size = 16,
1708         .result_opcode = BNXT_ULP_RESULT_OPC_SET_TO_CONSTANT,
1709         .result_operand = {0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
1710                 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}
1711         },
1712         {
1713         .field_bit_size = 10,
1714         .result_opcode = BNXT_ULP_RESULT_OPC_SET_TO_CONSTANT,
1715         .result_operand = {0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
1716                 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}
1717         },
1718         {
1719         .field_bit_size = 16,
1720         .result_opcode = BNXT_ULP_RESULT_OPC_SET_TO_CONSTANT,
1721         .result_operand = {0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
1722                 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}
1723         },
1724         {
1725         .field_bit_size = 10,
1726         .result_opcode = BNXT_ULP_RESULT_OPC_SET_TO_CONSTANT,
1727         .result_operand = {0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
1728                 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}
1729         },
1730         {
1731         .field_bit_size = 1,
1732         .result_opcode = BNXT_ULP_RESULT_OPC_SET_TO_CONSTANT,
1733         .result_operand = {0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
1734                 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}
1735         },
1736         {
1737         .field_bit_size = 1,
1738         .result_opcode = BNXT_ULP_RESULT_OPC_SET_TO_CONSTANT,
1739         .result_operand = {0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
1740                 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}
1741         },
1742         {
1743         .field_bit_size = 1,
1744         .result_opcode = BNXT_ULP_RESULT_OPC_SET_TO_CONSTANT,
1745         .result_operand = {0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
1746                 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}
1747         },
1748         {
1749         .field_bit_size = 1,
1750         .result_opcode = BNXT_ULP_RESULT_OPC_SET_TO_CONSTANT,
1751         .result_operand = {0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
1752                 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}
1753         },
1754         {
1755         .field_bit_size = 4,
1756         .result_opcode = BNXT_ULP_RESULT_OPC_SET_TO_CONSTANT,
1757         .result_operand = {BNXT_ULP_SYM_DECAP_FUNC_NONE,
1758                 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
1759                 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}
1760         },
1761         {
1762         .field_bit_size = 12,
1763         .result_opcode = BNXT_ULP_RESULT_OPC_SET_TO_ACT_PROP,
1764         .result_operand = {(BNXT_ULP_ACT_PROP_IDX_VNIC >> 8) & 0xff,
1765                 BNXT_ULP_ACT_PROP_IDX_VNIC & 0xff,
1766                 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
1767                 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}
1768         },
1769         {
1770         .field_bit_size = 1,
1771         .result_opcode = BNXT_ULP_RESULT_OPC_SET_TO_CONSTANT,
1772         .result_operand = {0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
1773                 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}
1774         },
1775         {
1776         .field_bit_size = 1,
1777         .result_opcode = BNXT_ULP_RESULT_OPC_SET_TO_CONSTANT,
1778         .result_operand = {0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
1779                 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}
1780         },
1781         {
1782         .field_bit_size = 2,
1783         .result_opcode = BNXT_ULP_RESULT_OPC_SET_TO_CONSTANT,
1784         .result_operand = {0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
1785                 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}
1786         },
1787         {
1788         .field_bit_size = 1,
1789         .result_opcode = BNXT_ULP_RESULT_OPC_SET_TO_CONSTANT,
1790         .result_operand = {0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
1791                 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}
1792         }
1793 };