drivers/net/bnxt/tf_ulp/ulp_template_db.c

   1 /* SPDX-License-Identifier: BSD-3-Clause
   2  * Copyright(c) 2014-2020 Broadcom
   3  * All rights reserved.
   4  */
   5
   6
   7 #include "ulp_template_db.h"
   8 #include "ulp_template_field_db.h"
   9 #include "ulp_template_struct.h"
  10 #include "ulp_rte_parser.h"
  11
  12 uint32_t ulp_act_prop_map_table[] = {
  13         [BNXT_ULP_ACT_PROP_IDX_ENCAP_TUN_SZ] =
  14                 BNXT_ULP_ACT_PROP_SZ_ENCAP_TUN_SZ,
  15         [BNXT_ULP_ACT_PROP_IDX_ENCAP_IP_SZ] =
  16                 BNXT_ULP_ACT_PROP_SZ_ENCAP_IP_SZ,
  17         [BNXT_ULP_ACT_PROP_IDX_ENCAP_VTAG_SZ] =
  18                 BNXT_ULP_ACT_PROP_SZ_ENCAP_VTAG_SZ,
  19         [BNXT_ULP_ACT_PROP_IDX_ENCAP_VTAG_TYPE] =
  20                 BNXT_ULP_ACT_PROP_SZ_ENCAP_VTAG_TYPE,
  21         [BNXT_ULP_ACT_PROP_IDX_ENCAP_VTAG_NUM] =
  22                 BNXT_ULP_ACT_PROP_SZ_ENCAP_VTAG_NUM,
  23         [BNXT_ULP_ACT_PROP_IDX_ENCAP_L3_TYPE] =
  24                 BNXT_ULP_ACT_PROP_SZ_ENCAP_L3_TYPE,
  25         [BNXT_ULP_ACT_PROP_IDX_MPLS_POP_NUM] =
  26                 BNXT_ULP_ACT_PROP_SZ_MPLS_POP_NUM,
  27         [BNXT_ULP_ACT_PROP_IDX_MPLS_PUSH_NUM] =
  28                 BNXT_ULP_ACT_PROP_SZ_MPLS_PUSH_NUM,
  29         [BNXT_ULP_ACT_PROP_IDX_PORT_ID] =
  30                 BNXT_ULP_ACT_PROP_SZ_PORT_ID,
  31         [BNXT_ULP_ACT_PROP_IDX_VNIC] =
  32                 BNXT_ULP_ACT_PROP_SZ_VNIC,
  33         [BNXT_ULP_ACT_PROP_IDX_VPORT] =
  34                 BNXT_ULP_ACT_PROP_SZ_VPORT,
  35         [BNXT_ULP_ACT_PROP_IDX_MARK] =
  36                 BNXT_ULP_ACT_PROP_SZ_MARK,
  37         [BNXT_ULP_ACT_PROP_IDX_COUNT] =
  38                 BNXT_ULP_ACT_PROP_SZ_COUNT,
  39         [BNXT_ULP_ACT_PROP_IDX_METER] =
  40                 BNXT_ULP_ACT_PROP_SZ_METER,
  41         [BNXT_ULP_ACT_PROP_IDX_SET_MAC_SRC] =
  42                 BNXT_ULP_ACT_PROP_SZ_SET_MAC_SRC,
  43         [BNXT_ULP_ACT_PROP_IDX_SET_MAC_DST] =
  44                 BNXT_ULP_ACT_PROP_SZ_SET_MAC_DST,
  45         [BNXT_ULP_ACT_PROP_IDX_OF_PUSH_VLAN] =
  46                 BNXT_ULP_ACT_PROP_SZ_OF_PUSH_VLAN,
  47         [BNXT_ULP_ACT_PROP_IDX_OF_SET_VLAN_PCP] =
  48                 BNXT_ULP_ACT_PROP_SZ_OF_SET_VLAN_PCP,
  49         [BNXT_ULP_ACT_PROP_IDX_OF_SET_VLAN_VID] =
  50                 BNXT_ULP_ACT_PROP_SZ_OF_SET_VLAN_VID,
  51         [BNXT_ULP_ACT_PROP_IDX_SET_IPV4_SRC] =
  52                 BNXT_ULP_ACT_PROP_SZ_SET_IPV4_SRC,
  53         [BNXT_ULP_ACT_PROP_IDX_SET_IPV4_DST] =
  54                 BNXT_ULP_ACT_PROP_SZ_SET_IPV4_DST,
  55         [BNXT_ULP_ACT_PROP_IDX_SET_IPV6_SRC] =
  56                 BNXT_ULP_ACT_PROP_SZ_SET_IPV6_SRC,
  57         [BNXT_ULP_ACT_PROP_IDX_SET_IPV6_DST] =
  58                 BNXT_ULP_ACT_PROP_SZ_SET_IPV6_DST,
  59         [BNXT_ULP_ACT_PROP_IDX_SET_TP_SRC] =
  60                 BNXT_ULP_ACT_PROP_SZ_SET_TP_SRC,
  61         [BNXT_ULP_ACT_PROP_IDX_SET_TP_DST] =
  62                 BNXT_ULP_ACT_PROP_SZ_SET_TP_DST,
  63         [BNXT_ULP_ACT_PROP_IDX_OF_PUSH_MPLS_0] =
  64                 BNXT_ULP_ACT_PROP_SZ_OF_PUSH_MPLS_0,
  65         [BNXT_ULP_ACT_PROP_IDX_OF_PUSH_MPLS_1] =
  66                 BNXT_ULP_ACT_PROP_SZ_OF_PUSH_MPLS_1,
  67         [BNXT_ULP_ACT_PROP_IDX_OF_PUSH_MPLS_2] =
  68                 BNXT_ULP_ACT_PROP_SZ_OF_PUSH_MPLS_2,
  69         [BNXT_ULP_ACT_PROP_IDX_OF_PUSH_MPLS_3] =
  70                 BNXT_ULP_ACT_PROP_SZ_OF_PUSH_MPLS_3,
  71         [BNXT_ULP_ACT_PROP_IDX_OF_PUSH_MPLS_4] =
  72                 BNXT_ULP_ACT_PROP_SZ_OF_PUSH_MPLS_4,
  73         [BNXT_ULP_ACT_PROP_IDX_OF_PUSH_MPLS_5] =
  74                 BNXT_ULP_ACT_PROP_SZ_OF_PUSH_MPLS_5,
  75         [BNXT_ULP_ACT_PROP_IDX_OF_PUSH_MPLS_6] =
  76                 BNXT_ULP_ACT_PROP_SZ_OF_PUSH_MPLS_6,
  77         [BNXT_ULP_ACT_PROP_IDX_OF_PUSH_MPLS_7] =
  78                 BNXT_ULP_ACT_PROP_SZ_OF_PUSH_MPLS_7,
  79         [BNXT_ULP_ACT_PROP_IDX_ENCAP_L2_DMAC] =
  80                 BNXT_ULP_ACT_PROP_SZ_ENCAP_L2_DMAC,
  81         [BNXT_ULP_ACT_PROP_IDX_ENCAP_L2_SMAC] =
  82                 BNXT_ULP_ACT_PROP_SZ_ENCAP_L2_SMAC,
  83         [BNXT_ULP_ACT_PROP_IDX_ENCAP_VTAG] =
  84                 BNXT_ULP_ACT_PROP_SZ_ENCAP_VTAG,
  85         [BNXT_ULP_ACT_PROP_IDX_ENCAP_IP] =
  86                 BNXT_ULP_ACT_PROP_SZ_ENCAP_IP,
  87         [BNXT_ULP_ACT_PROP_IDX_ENCAP_IP_SRC] =
  88                 BNXT_ULP_ACT_PROP_SZ_ENCAP_IP_SRC,
  89         [BNXT_ULP_ACT_PROP_IDX_ENCAP_UDP] =
  90                 BNXT_ULP_ACT_PROP_SZ_ENCAP_UDP,
  91         [BNXT_ULP_ACT_PROP_IDX_ENCAP_TUN] =
  92                 BNXT_ULP_ACT_PROP_SZ_ENCAP_TUN,
  93         [BNXT_ULP_ACT_PROP_IDX_LAST] =
  94                 BNXT_ULP_ACT_PROP_SZ_LAST
  95 };
  96
  97 struct bnxt_ulp_rte_act_info ulp_act_info[] = {
  98         [RTE_FLOW_ACTION_TYPE_END] = {
  99                 .act_type                = BNXT_ULP_ACT_TYPE_END,
 100                 .proto_act_func          = NULL
 101         },
 102         [RTE_FLOW_ACTION_TYPE_VOID] = {
 103                 .act_type                = BNXT_ULP_ACT_TYPE_SUPPORTED,
 104                 .proto_act_func          = ulp_rte_void_act_handler
 105         },
 106         [RTE_FLOW_ACTION_TYPE_PASSTHRU] = {
 107                 .act_type                = BNXT_ULP_ACT_TYPE_NOT_SUPPORTED,
 108                 .proto_act_func          = NULL
 109         },
 110         [RTE_FLOW_ACTION_TYPE_JUMP] = {
 111                 .act_type                = BNXT_ULP_ACT_TYPE_NOT_SUPPORTED,
 112                 .proto_act_func          = NULL
 113         },
 114         [RTE_FLOW_ACTION_TYPE_MARK] = {
 115                 .act_type                = BNXT_ULP_ACT_TYPE_SUPPORTED,
 116                 .proto_act_func          = ulp_rte_mark_act_handler
 117         },
 118         [RTE_FLOW_ACTION_TYPE_FLAG] = {
 119                 .act_type                = BNXT_ULP_ACT_TYPE_NOT_SUPPORTED,
 120                 .proto_act_func          = NULL
 121         },
 122         [RTE_FLOW_ACTION_TYPE_QUEUE] = {
 123                 .act_type                = BNXT_ULP_ACT_TYPE_NOT_SUPPORTED,
 124                 .proto_act_func          = NULL
 125         },
 126         [RTE_FLOW_ACTION_TYPE_DROP] = {
 127                 .act_type                = BNXT_ULP_ACT_TYPE_SUPPORTED,
 128                 .proto_act_func          = ulp_rte_drop_act_handler
 129         },
 130         [RTE_FLOW_ACTION_TYPE_COUNT] = {
 131                 .act_type                = BNXT_ULP_ACT_TYPE_SUPPORTED,
 132                 .proto_act_func          = ulp_rte_count_act_handler
 133         },
 134         [RTE_FLOW_ACTION_TYPE_RSS] = {
 135                 .act_type                = BNXT_ULP_ACT_TYPE_SUPPORTED,
 136                 .proto_act_func          = ulp_rte_rss_act_handler
 137         },
 138         [RTE_FLOW_ACTION_TYPE_PF] = {
 139                 .act_type                = BNXT_ULP_ACT_TYPE_SUPPORTED,
 140                 .proto_act_func          = ulp_rte_pf_act_handler
 141         },
 142         [RTE_FLOW_ACTION_TYPE_VF] = {
 143                 .act_type                = BNXT_ULP_ACT_TYPE_SUPPORTED,
 144                 .proto_act_func          = ulp_rte_vf_act_handler
 145         },
 146         [RTE_FLOW_ACTION_TYPE_PHY_PORT] = {
 147                 .act_type                = BNXT_ULP_ACT_TYPE_SUPPORTED,
 148                 .proto_act_func          = ulp_rte_phy_port_act_handler
 149         },
 150         [RTE_FLOW_ACTION_TYPE_PORT_ID] = {
 151                 .act_type                = BNXT_ULP_ACT_TYPE_SUPPORTED,
 152                 .proto_act_func          = ulp_rte_port_id_act_handler
 153         },
 154         [RTE_FLOW_ACTION_TYPE_METER] = {
 155                 .act_type                = BNXT_ULP_ACT_TYPE_NOT_SUPPORTED,
 156                 .proto_act_func          = NULL
 157         },
 158         [RTE_FLOW_ACTION_TYPE_SECURITY] = {
 159                 .act_type                = BNXT_ULP_ACT_TYPE_NOT_SUPPORTED,
 160                 .proto_act_func          = NULL
 161         },
 162         [RTE_FLOW_ACTION_TYPE_OF_SET_MPLS_TTL] = {
 163                 .act_type                = BNXT_ULP_ACT_TYPE_NOT_SUPPORTED,
 164                 .proto_act_func          = NULL
 165         },
 166         [RTE_FLOW_ACTION_TYPE_OF_DEC_MPLS_TTL] = {
 167                 .act_type                = BNXT_ULP_ACT_TYPE_NOT_SUPPORTED,
 168                 .proto_act_func          = NULL
 169         },
 170         [RTE_FLOW_ACTION_TYPE_OF_SET_NW_TTL] = {
 171                 .act_type                = BNXT_ULP_ACT_TYPE_NOT_SUPPORTED,
 172                 .proto_act_func          = NULL
 173         },
 174         [RTE_FLOW_ACTION_TYPE_OF_DEC_NW_TTL] = {
 175                 .act_type                = BNXT_ULP_ACT_TYPE_NOT_SUPPORTED,
 176                 .proto_act_func          = NULL
 177         },
 178         [RTE_FLOW_ACTION_TYPE_OF_COPY_TTL_OUT] = {
 179                 .act_type                = BNXT_ULP_ACT_TYPE_NOT_SUPPORTED,
 180                 .proto_act_func          = NULL
 181         },
 182         [RTE_FLOW_ACTION_TYPE_OF_COPY_TTL_IN] = {
 183                 .act_type                = BNXT_ULP_ACT_TYPE_NOT_SUPPORTED,
 184                 .proto_act_func          = NULL
 185         },
 186         [RTE_FLOW_ACTION_TYPE_OF_POP_VLAN] = {
 187                 .act_type                = BNXT_ULP_ACT_TYPE_NOT_SUPPORTED,
 188                 .proto_act_func          = NULL
 189         },
 190         [RTE_FLOW_ACTION_TYPE_OF_PUSH_VLAN] = {
 191                 .act_type                = BNXT_ULP_ACT_TYPE_NOT_SUPPORTED,
 192                 .proto_act_func          = NULL
 193         },
 194         [RTE_FLOW_ACTION_TYPE_OF_SET_VLAN_VID] = {
 195                 .act_type                = BNXT_ULP_ACT_TYPE_NOT_SUPPORTED,
 196                 .proto_act_func          = NULL
 197         },
 198         [RTE_FLOW_ACTION_TYPE_OF_SET_VLAN_PCP] = {
 199                 .act_type                = BNXT_ULP_ACT_TYPE_NOT_SUPPORTED,
 200                 .proto_act_func          = NULL
 201         },
 202         [RTE_FLOW_ACTION_TYPE_OF_POP_MPLS] = {
 203                 .act_type                = BNXT_ULP_ACT_TYPE_NOT_SUPPORTED,
 204                 .proto_act_func          = NULL
 205         },
 206         [RTE_FLOW_ACTION_TYPE_OF_PUSH_MPLS] = {
 207                 .act_type                = BNXT_ULP_ACT_TYPE_NOT_SUPPORTED,
 208                 .proto_act_func          = NULL
 209         },
 210         [RTE_FLOW_ACTION_TYPE_VXLAN_ENCAP] = {
 211                 .act_type                = BNXT_ULP_ACT_TYPE_SUPPORTED,
 212                 .proto_act_func          = ulp_rte_vxlan_encap_act_handler
 213         },
 214         [RTE_FLOW_ACTION_TYPE_VXLAN_DECAP] = {
 215                 .act_type                = BNXT_ULP_ACT_TYPE_SUPPORTED,
 216                 .proto_act_func          = ulp_rte_vxlan_decap_act_handler
 217         },
 218         [RTE_FLOW_ACTION_TYPE_NVGRE_ENCAP] = {
 219                 .act_type                = BNXT_ULP_ACT_TYPE_NOT_SUPPORTED,
 220                 .proto_act_func          = NULL
 221         },
 222         [RTE_FLOW_ACTION_TYPE_NVGRE_DECAP] = {
 223                 .act_type                = BNXT_ULP_ACT_TYPE_NOT_SUPPORTED,
 224                 .proto_act_func          = NULL
 225         },
 226         [RTE_FLOW_ACTION_TYPE_RAW_ENCAP] = {
 227                 .act_type                = BNXT_ULP_ACT_TYPE_NOT_SUPPORTED,
 228                 .proto_act_func          = NULL
 229         },
 230         [RTE_FLOW_ACTION_TYPE_RAW_DECAP] = {
 231                 .act_type                = BNXT_ULP_ACT_TYPE_NOT_SUPPORTED,
 232                 .proto_act_func          = NULL
 233         },
 234         [RTE_FLOW_ACTION_TYPE_SET_IPV4_SRC] = {
 235                 .act_type                = BNXT_ULP_ACT_TYPE_NOT_SUPPORTED,
 236                 .proto_act_func          = NULL
 237         },
 238         [RTE_FLOW_ACTION_TYPE_SET_IPV4_DST] = {
 239                 .act_type                = BNXT_ULP_ACT_TYPE_NOT_SUPPORTED,
 240                 .proto_act_func          = NULL
 241         },
 242         [RTE_FLOW_ACTION_TYPE_SET_IPV6_SRC] = {
 243                 .act_type                = BNXT_ULP_ACT_TYPE_NOT_SUPPORTED,
 244                 .proto_act_func          = NULL
 245         },
 246         [RTE_FLOW_ACTION_TYPE_SET_IPV6_DST] = {
 247                 .act_type                = BNXT_ULP_ACT_TYPE_NOT_SUPPORTED,
 248                 .proto_act_func          = NULL
 249         },
 250         [RTE_FLOW_ACTION_TYPE_SET_TP_SRC] = {
 251                 .act_type                = BNXT_ULP_ACT_TYPE_NOT_SUPPORTED,
 252                 .proto_act_func          = NULL
 253         },
 254         [RTE_FLOW_ACTION_TYPE_SET_TP_DST] = {
 255                 .act_type                = BNXT_ULP_ACT_TYPE_NOT_SUPPORTED,
 256                 .proto_act_func          = NULL
 257         },
 258         [RTE_FLOW_ACTION_TYPE_MAC_SWAP] = {
 259                 .act_type                = BNXT_ULP_ACT_TYPE_NOT_SUPPORTED,
 260                 .proto_act_func          = NULL
 261         },
 262         [RTE_FLOW_ACTION_TYPE_DEC_TTL] = {
 263                 .act_type                = BNXT_ULP_ACT_TYPE_NOT_SUPPORTED,
 264                 .proto_act_func          = NULL
 265         },
 266         [RTE_FLOW_ACTION_TYPE_SET_TTL] = {
 267                 .act_type                = BNXT_ULP_ACT_TYPE_NOT_SUPPORTED,
 268                 .proto_act_func          = NULL
 269         },
 270         [RTE_FLOW_ACTION_TYPE_SET_MAC_SRC] = {
 271                 .act_type                = BNXT_ULP_ACT_TYPE_NOT_SUPPORTED,
 272                 .proto_act_func          = NULL
 273         },
 274         [RTE_FLOW_ACTION_TYPE_SET_MAC_DST] = {
 275                 .act_type                = BNXT_ULP_ACT_TYPE_NOT_SUPPORTED,
 276                 .proto_act_func          = NULL
 277         },
 278         [RTE_FLOW_ACTION_TYPE_INC_TCP_SEQ] = {
 279                 .act_type                = BNXT_ULP_ACT_TYPE_NOT_SUPPORTED,
 280                 .proto_act_func          = NULL
 281         },
 282         [RTE_FLOW_ACTION_TYPE_DEC_TCP_SEQ] = {
 283                 .act_type                = BNXT_ULP_ACT_TYPE_NOT_SUPPORTED,
 284                 .proto_act_func          = NULL
 285         },
 286         [RTE_FLOW_ACTION_TYPE_INC_TCP_ACK] = {
 287                 .act_type                = BNXT_ULP_ACT_TYPE_NOT_SUPPORTED,
 288                 .proto_act_func          = NULL
 289         },
 290         [RTE_FLOW_ACTION_TYPE_DEC_TCP_ACK] = {
 291                 .act_type                = BNXT_ULP_ACT_TYPE_NOT_SUPPORTED,
 292                 .proto_act_func          = NULL
 293         }
 294 };
 295
 296 struct bnxt_ulp_cache_tbl_params ulp_cache_tbl_params[] = {
 297         [BNXT_ULP_CACHE_TBL_ID_L2_CNTXT_TCAM_INGRESS] = {
 298                 .num_entries             = 16384
 299         },
 300         [BNXT_ULP_CACHE_TBL_ID_L2_CNTXT_TCAM_EGRESS] = {
 301                 .num_entries             = 16384
 302         },
 303         [BNXT_ULP_CACHE_TBL_ID_PROFILE_TCAM_INGRESS] = {
 304                 .num_entries             = 16384
 305         },
 306         [BNXT_ULP_CACHE_TBL_ID_PROFILE_TCAM_EGRESS] = {
 307                 .num_entries             = 16384
 308         }
 309 };
 310
 311 struct bnxt_ulp_device_params ulp_device_params[BNXT_ULP_DEVICE_ID_LAST] = {
 312         [BNXT_ULP_DEVICE_ID_WH_PLUS] = {
 313                 .global_fid_enable       = BNXT_ULP_SYM_YES,
 314                 .byte_order              = BNXT_ULP_BYTE_ORDER_LE,
 315                 .encap_byte_swap         = 1,
 316                 .lfid_entries            = 16384,
 317                 .lfid_entry_size         = 4,
 318                 .gfid_entries            = 65536,
 319                 .gfid_entry_size         = 4,
 320                 .num_flows               = 32768,
 321                 .num_resources_per_flow  = 8
 322         }
 323 };
 324
 325 struct bnxt_ulp_glb_resource_info ulp_glb_resource_tbl[] = {
 326         [0] = {
 327         .resource_func           = BNXT_ULP_RESOURCE_FUNC_IDENTIFIER,
 328         .resource_type           = TF_IDENT_TYPE_PROF_FUNC,
 329         .glb_regfile_index       = BNXT_ULP_GLB_REGFILE_INDEX_GLB_PROF_FUNC_ID,
 330         .direction               = TF_DIR_RX
 331         },
 332         [1] = {
 333         .resource_func           = BNXT_ULP_RESOURCE_FUNC_IDENTIFIER,
 334         .resource_type           = TF_IDENT_TYPE_PROF_FUNC,
 335         .glb_regfile_index       = BNXT_ULP_GLB_REGFILE_INDEX_GLB_PROF_FUNC_ID,
 336         .direction               = TF_DIR_TX
 337         }
 338 };
 339
 340 struct bnxt_ulp_rte_hdr_info ulp_hdr_info[] = {
 341         [RTE_FLOW_ITEM_TYPE_END] = {
 342                 .hdr_type                = BNXT_ULP_HDR_TYPE_END,
 343                 .proto_hdr_func          = NULL
 344         },
 345         [RTE_FLOW_ITEM_TYPE_VOID] = {
 346                 .hdr_type                = BNXT_ULP_HDR_TYPE_SUPPORTED,
 347                 .proto_hdr_func          = ulp_rte_void_hdr_handler
 348         },
 349         [RTE_FLOW_ITEM_TYPE_INVERT] = {
 350                 .hdr_type                = BNXT_ULP_HDR_TYPE_NOT_SUPPORTED,
 351                 .proto_hdr_func          = NULL
 352         },
 353         [RTE_FLOW_ITEM_TYPE_ANY] = {
 354                 .hdr_type                = BNXT_ULP_HDR_TYPE_NOT_SUPPORTED,
 355                 .proto_hdr_func          = NULL
 356         },
 357         [RTE_FLOW_ITEM_TYPE_PF] = {
 358                 .hdr_type                = BNXT_ULP_HDR_TYPE_SUPPORTED,
 359                 .proto_hdr_func          = ulp_rte_pf_hdr_handler
 360         },
 361         [RTE_FLOW_ITEM_TYPE_VF] = {
 362                 .hdr_type                = BNXT_ULP_HDR_TYPE_SUPPORTED,
 363                 .proto_hdr_func          = ulp_rte_vf_hdr_handler
 364         },
 365         [RTE_FLOW_ITEM_TYPE_PHY_PORT] = {
 366                 .hdr_type                = BNXT_ULP_HDR_TYPE_SUPPORTED,
 367                 .proto_hdr_func          = ulp_rte_phy_port_hdr_handler
 368         },
 369         [RTE_FLOW_ITEM_TYPE_PORT_ID] = {
 370                 .hdr_type                = BNXT_ULP_HDR_TYPE_SUPPORTED,
 371                 .proto_hdr_func          = ulp_rte_port_id_hdr_handler
 372         },
 373         [RTE_FLOW_ITEM_TYPE_RAW] = {
 374                 .hdr_type                = BNXT_ULP_HDR_TYPE_NOT_SUPPORTED,
 375                 .proto_hdr_func          = NULL
 376         },
 377         [RTE_FLOW_ITEM_TYPE_ETH] = {
 378                 .hdr_type                = BNXT_ULP_HDR_TYPE_SUPPORTED,
 379                 .proto_hdr_func          = ulp_rte_eth_hdr_handler
 380         },
 381         [RTE_FLOW_ITEM_TYPE_VLAN] = {
 382                 .hdr_type                = BNXT_ULP_HDR_TYPE_SUPPORTED,
 383                 .proto_hdr_func          = ulp_rte_vlan_hdr_handler
 384         },
 385         [RTE_FLOW_ITEM_TYPE_IPV4] = {
 386                 .hdr_type                = BNXT_ULP_HDR_TYPE_SUPPORTED,
 387                 .proto_hdr_func          = ulp_rte_ipv4_hdr_handler
 388         },
 389         [RTE_FLOW_ITEM_TYPE_IPV6] = {
 390                 .hdr_type                = BNXT_ULP_HDR_TYPE_SUPPORTED,
 391                 .proto_hdr_func          = ulp_rte_ipv6_hdr_handler
 392         },
 393         [RTE_FLOW_ITEM_TYPE_ICMP] = {
 394                 .hdr_type                = BNXT_ULP_HDR_TYPE_NOT_SUPPORTED,
 395                 .proto_hdr_func          = NULL
 396         },
 397         [RTE_FLOW_ITEM_TYPE_UDP] = {
 398                 .hdr_type                = BNXT_ULP_HDR_TYPE_SUPPORTED,
 399                 .proto_hdr_func          = ulp_rte_udp_hdr_handler
 400         },
 401         [RTE_FLOW_ITEM_TYPE_TCP] = {
 402                 .hdr_type                = BNXT_ULP_HDR_TYPE_SUPPORTED,
 403                 .proto_hdr_func          = ulp_rte_tcp_hdr_handler
 404         },
 405         [RTE_FLOW_ITEM_TYPE_SCTP] = {
 406                 .hdr_type                = BNXT_ULP_HDR_TYPE_NOT_SUPPORTED,
 407                 .proto_hdr_func          = NULL
 408         },
 409         [RTE_FLOW_ITEM_TYPE_VXLAN] = {
 410                 .hdr_type                = BNXT_ULP_HDR_TYPE_SUPPORTED,
 411                 .proto_hdr_func          = ulp_rte_vxlan_hdr_handler
 412         },
 413         [RTE_FLOW_ITEM_TYPE_E_TAG] = {
 414                 .hdr_type                = BNXT_ULP_HDR_TYPE_NOT_SUPPORTED,
 415                 .proto_hdr_func          = NULL
 416         },
 417         [RTE_FLOW_ITEM_TYPE_NVGRE] = {
 418                 .hdr_type                = BNXT_ULP_HDR_TYPE_NOT_SUPPORTED,
 419                 .proto_hdr_func          = NULL
 420         },
 421         [RTE_FLOW_ITEM_TYPE_MPLS] = {
 422                 .hdr_type                = BNXT_ULP_HDR_TYPE_NOT_SUPPORTED,
 423                 .proto_hdr_func          = NULL
 424         },
 425         [RTE_FLOW_ITEM_TYPE_GRE] = {
 426                 .hdr_type                = BNXT_ULP_HDR_TYPE_NOT_SUPPORTED,
 427                 .proto_hdr_func          = NULL
 428         },
 429         [RTE_FLOW_ITEM_TYPE_FUZZY] = {
 430                 .hdr_type                = BNXT_ULP_HDR_TYPE_NOT_SUPPORTED,
 431                 .proto_hdr_func          = NULL
 432         },
 433         [RTE_FLOW_ITEM_TYPE_GTP] = {
 434                 .hdr_type                = BNXT_ULP_HDR_TYPE_NOT_SUPPORTED,
 435                 .proto_hdr_func          = NULL
 436         },
 437         [RTE_FLOW_ITEM_TYPE_GTPC] = {
 438                 .hdr_type                = BNXT_ULP_HDR_TYPE_NOT_SUPPORTED,
 439                 .proto_hdr_func          = NULL
 440         },
 441         [RTE_FLOW_ITEM_TYPE_GTPU] = {
 442                 .hdr_type                = BNXT_ULP_HDR_TYPE_NOT_SUPPORTED,
 443                 .proto_hdr_func          = NULL
 444         },
 445         [RTE_FLOW_ITEM_TYPE_ESP] = {
 446                 .hdr_type                = BNXT_ULP_HDR_TYPE_NOT_SUPPORTED,
 447                 .proto_hdr_func          = NULL
 448         },
 449         [RTE_FLOW_ITEM_TYPE_GENEVE] = {
 450                 .hdr_type                = BNXT_ULP_HDR_TYPE_NOT_SUPPORTED,
 451                 .proto_hdr_func          = NULL
 452         },
 453         [RTE_FLOW_ITEM_TYPE_VXLAN_GPE] = {
 454                 .hdr_type                = BNXT_ULP_HDR_TYPE_NOT_SUPPORTED,
 455                 .proto_hdr_func          = NULL
 456         },
 457         [RTE_FLOW_ITEM_TYPE_ARP_ETH_IPV4] = {
 458                 .hdr_type                = BNXT_ULP_HDR_TYPE_NOT_SUPPORTED,
 459                 .proto_hdr_func          = NULL
 460         },
 461         [RTE_FLOW_ITEM_TYPE_IPV6_EXT] = {
 462                 .hdr_type                = BNXT_ULP_HDR_TYPE_NOT_SUPPORTED,
 463                 .proto_hdr_func          = NULL
 464         },
 465         [RTE_FLOW_ITEM_TYPE_ICMP6] = {
 466                 .hdr_type                = BNXT_ULP_HDR_TYPE_NOT_SUPPORTED,
 467                 .proto_hdr_func          = NULL
 468         },
 469         [RTE_FLOW_ITEM_TYPE_ICMP6_ND_NS] = {
 470                 .hdr_type                = BNXT_ULP_HDR_TYPE_NOT_SUPPORTED,
 471                 .proto_hdr_func          = NULL
 472         },
 473         [RTE_FLOW_ITEM_TYPE_ICMP6_ND_NA] = {
 474                 .hdr_type                = BNXT_ULP_HDR_TYPE_NOT_SUPPORTED,
 475                 .proto_hdr_func          = NULL
 476         },
 477         [RTE_FLOW_ITEM_TYPE_ICMP6_ND_OPT] = {
 478                 .hdr_type                = BNXT_ULP_HDR_TYPE_NOT_SUPPORTED,
 479                 .proto_hdr_func          = NULL
 480         },
 481         [RTE_FLOW_ITEM_TYPE_ICMP6_ND_OPT_SLA_ETH] = {
 482                 .hdr_type                = BNXT_ULP_HDR_TYPE_NOT_SUPPORTED,
 483                 .proto_hdr_func          = NULL
 484         },
 485         [RTE_FLOW_ITEM_TYPE_ICMP6_ND_OPT_TLA_ETH] = {
 486                 .hdr_type                = BNXT_ULP_HDR_TYPE_NOT_SUPPORTED,
 487                 .proto_hdr_func          = NULL
 488         },
 489         [RTE_FLOW_ITEM_TYPE_MARK] = {
 490                 .hdr_type                = BNXT_ULP_HDR_TYPE_NOT_SUPPORTED,
 491                 .proto_hdr_func          = NULL
 492         },
 493         [RTE_FLOW_ITEM_TYPE_META] = {
 494                 .hdr_type                = BNXT_ULP_HDR_TYPE_NOT_SUPPORTED,
 495                 .proto_hdr_func          = NULL
 496         },
 497         [RTE_FLOW_ITEM_TYPE_GRE_KEY] = {
 498                 .hdr_type                = BNXT_ULP_HDR_TYPE_NOT_SUPPORTED,
 499                 .proto_hdr_func          = NULL
 500         },
 501         [RTE_FLOW_ITEM_TYPE_GTP_PSC] = {
 502                 .hdr_type                = BNXT_ULP_HDR_TYPE_NOT_SUPPORTED,
 503                 .proto_hdr_func          = NULL
 504         },
 505         [RTE_FLOW_ITEM_TYPE_PPPOES] = {
 506                 .hdr_type                = BNXT_ULP_HDR_TYPE_NOT_SUPPORTED,
 507                 .proto_hdr_func          = NULL
 508         },
 509         [RTE_FLOW_ITEM_TYPE_PPPOED] = {
 510                 .hdr_type                = BNXT_ULP_HDR_TYPE_NOT_SUPPORTED,
 511                 .proto_hdr_func          = NULL
 512         },
 513         [RTE_FLOW_ITEM_TYPE_PPPOE_PROTO_ID] = {
 514                 .hdr_type                = BNXT_ULP_HDR_TYPE_NOT_SUPPORTED,
 515                 .proto_hdr_func          = NULL
 516         },
 517         [RTE_FLOW_ITEM_TYPE_NSH] = {
 518                 .hdr_type                = BNXT_ULP_HDR_TYPE_NOT_SUPPORTED,
 519                 .proto_hdr_func          = NULL
 520         },
 521         [RTE_FLOW_ITEM_TYPE_IGMP] = {
 522                 .hdr_type                = BNXT_ULP_HDR_TYPE_NOT_SUPPORTED,
 523                 .proto_hdr_func          = NULL
 524         },
 525         [RTE_FLOW_ITEM_TYPE_AH] = {
 526                 .hdr_type                = BNXT_ULP_HDR_TYPE_NOT_SUPPORTED,
 527                 .proto_hdr_func          = NULL
 528         },
 529         [RTE_FLOW_ITEM_TYPE_HIGIG2] = {
 530                 .hdr_type                = BNXT_ULP_HDR_TYPE_NOT_SUPPORTED,
 531                 .proto_hdr_func          = NULL
 532         }
 533 };
 534
 535 uint32_t bnxt_ulp_encap_vtag_map[] = {
 536         [0] = BNXT_ULP_ENCAP_VTAG_ENCODING_NOP,
 537         [1] = BNXT_ULP_ENCAP_VTAG_ENCODING_STAG_ECAP_PRI,
 538         [2] = BNXT_ULP_ENCAP_VTAG_ENCODING_DTAG_ECAP_PRI
 539 };
 540
 541 uint16_t ulp_class_sig_tbl[BNXT_ULP_CLASS_SIG_TBL_MAX_SZ] = {
 542         [BNXT_ULP_CLASS_HID_0013] = 1
 543 };
 544
 545 struct bnxt_ulp_class_match_info ulp_class_match_list[] = {
 546         [1] = {
 547         .class_hid = BNXT_ULP_CLASS_HID_0013,
 548         .hdr_sig = { .bits =
 549                 BNXT_ULP_HDR_BIT_O_ETH |
 550                 BNXT_ULP_HDR_BIT_O_IPV4 |
 551                 BNXT_ULP_HDR_BIT_O_UDP |
 552                 BNXT_ULP_FLOW_DIR_BITMASK_ING },
 553         .field_sig = { .bits =
 554                 BNXT_ULP_HF0_BITMASK_O_IPV4_SRC_ADDR |
 555                 BNXT_ULP_HF0_BITMASK_O_IPV4_DST_ADDR |
 556                 BNXT_ULP_HF0_BITMASK_O_UDP_SRC_PORT |
 557                 BNXT_ULP_HF0_BITMASK_O_UDP_DST_PORT |
 558                 BNXT_ULP_MATCH_TYPE_BITMASK_EM },
 559         .class_tid = 0,
 560         .act_vnic = 0,
 561         .wc_pri = 0
 562         }
 563 };
 564
 565 uint16_t ulp_act_sig_tbl[BNXT_ULP_ACT_SIG_TBL_MAX_SZ] = {
 566         [BNXT_ULP_ACT_HID_0029] = 1
 567 };
 568
 569 struct bnxt_ulp_act_match_info ulp_act_match_list[] = {
 570         [1] = {
 571         .act_hid = BNXT_ULP_ACT_HID_0029,
 572         .act_sig = { .bits =
 573                 BNXT_ULP_ACTION_BIT_MARK |
 574                 BNXT_ULP_ACTION_BIT_RSS |
 575                 BNXT_ULP_ACTION_BIT_VNIC |
 576                 BNXT_ULP_FLOW_DIR_BITMASK_ING },
 577         .act_tid = 0
 578         }
 579 };
 580
 581 struct bnxt_ulp_mapper_tbl_list_info ulp_class_tmpl_list[] = {
 582         [((0 << BNXT_ULP_LOG2_MAX_NUM_DEV) |
 583                 BNXT_ULP_DEVICE_ID_WH_PLUS)] = {
 584         .device_name = BNXT_ULP_DEVICE_ID_WH_PLUS,
 585         .num_tbls = 5,
 586         .start_tbl_idx = 0
 587         }
 588 };
 589
 590 struct bnxt_ulp_mapper_class_tbl_info ulp_class_tbl_list[] = {
 591         {
 592         .resource_func = BNXT_ULP_RESOURCE_FUNC_CACHE_TABLE,
 593         .resource_type = TF_TCAM_TBL_TYPE_L2_CTXT_TCAM,
 594         .resource_sub_type = BNXT_ULP_RESOURCE_SUB_TYPE_TT_L2_CNTXT_TCAM_CACHE,
 595         .direction = TF_DIR_RX,
 596         .priority = BNXT_ULP_PRIORITY_NOT_USED,
 597         .srch_b4_alloc = BNXT_ULP_SEARCH_BEFORE_ALLOC_NO,
 598         .key_start_idx = 0,
 599         .blob_key_bit_size = 12,
 600         .key_bit_size = 12,
 601         .key_num_fields = 2,
 602         .result_start_idx = 0,
 603         .result_bit_size = 10,
 604         .result_num_fields = 1,
 605         .ident_start_idx = 0,
 606         .ident_nums = 1,
 607         .mark_enable = BNXT_ULP_MARK_ENABLE_NO,
 608         .critical_resource = 0,
 609         .regfile_wr_idx = BNXT_ULP_REGFILE_INDEX_NOT_USED
 610         },
 611         {
 612         .resource_func = BNXT_ULP_RESOURCE_FUNC_TCAM_TABLE,
 613         .resource_type = TF_TCAM_TBL_TYPE_L2_CTXT_TCAM,
 614         .resource_sub_type = BNXT_ULP_RESOURCE_SUB_TYPE_NOT_USED,
 615         .direction = TF_DIR_RX,
 616         .priority = BNXT_ULP_PRIORITY_LEVEL_0,
 617         .srch_b4_alloc = BNXT_ULP_SEARCH_BEFORE_ALLOC_NO,
 618         .key_start_idx = 2,
 619         .blob_key_bit_size = 167,
 620         .key_bit_size = 167,
 621         .key_num_fields = 13,
 622         .result_start_idx = 1,
 623         .result_bit_size = 64,
 624         .result_num_fields = 13,
 625         .ident_start_idx = 1,
 626         .ident_nums = 0,
 627         .mark_enable = BNXT_ULP_MARK_ENABLE_NO,
 628         .critical_resource = 0,
 629         .regfile_wr_idx = BNXT_ULP_REGFILE_INDEX_NOT_USED
 630         },
 631         {
 632         .resource_func = BNXT_ULP_RESOURCE_FUNC_CACHE_TABLE,
 633         .resource_type = TF_TCAM_TBL_TYPE_PROF_TCAM,
 634         .resource_sub_type = BNXT_ULP_RESOURCE_SUB_TYPE_TT_PROFILE_TCAM_CACHE,
 635         .direction = TF_DIR_RX,
 636         .priority = BNXT_ULP_PRIORITY_NOT_USED,
 637         .srch_b4_alloc = BNXT_ULP_SEARCH_BEFORE_ALLOC_NO,
 638         .key_start_idx = 15,
 639         .blob_key_bit_size = 16,
 640         .key_bit_size = 16,
 641         .key_num_fields = 3,
 642         .result_start_idx = 14,
 643         .result_bit_size = 10,
 644         .result_num_fields = 1,
 645         .ident_start_idx = 1,
 646         .ident_nums = 1,
 647         .mark_enable = BNXT_ULP_MARK_ENABLE_NO,
 648         .critical_resource = 0,
 649         .regfile_wr_idx = BNXT_ULP_REGFILE_INDEX_NOT_USED
 650         },
 651         {
 652         .resource_func = BNXT_ULP_RESOURCE_FUNC_TCAM_TABLE,
 653         .resource_type = TF_TCAM_TBL_TYPE_PROF_TCAM,
 654         .resource_sub_type = BNXT_ULP_RESOURCE_SUB_TYPE_TT_PROFILE_TCAM_CACHE,
 655         .direction = TF_DIR_RX,
 656         .priority = BNXT_ULP_PRIORITY_LEVEL_0,
 657         .srch_b4_alloc = BNXT_ULP_SEARCH_BEFORE_ALLOC_NO,
 658         .key_start_idx = 18,
 659         .blob_key_bit_size = 81,
 660         .key_bit_size = 81,
 661         .key_num_fields = 42,
 662         .result_start_idx = 15,
 663         .result_bit_size = 38,
 664         .result_num_fields = 8,
 665         .ident_start_idx = 2,
 666         .ident_nums = 0,
 667         .mark_enable = BNXT_ULP_MARK_ENABLE_NO,
 668         .critical_resource = 0,
 669         .regfile_wr_idx = BNXT_ULP_REGFILE_INDEX_NOT_USED
 670         },
 671         {
 672         .resource_func = BNXT_ULP_RESOURCE_FUNC_EM_TABLE,
 673         .resource_type = TF_MEM_EXTERNAL,
 674         .resource_sub_type = BNXT_ULP_RESOURCE_SUB_TYPE_NOT_USED,
 675         .direction = TF_DIR_RX,
 676         .priority = BNXT_ULP_PRIORITY_NOT_USED,
 677         .srch_b4_alloc = BNXT_ULP_SEARCH_BEFORE_ALLOC_NO,
 678         .key_start_idx = 60,
 679         .blob_key_bit_size = 448,
 680         .key_bit_size = 448,
 681         .key_num_fields = 11,
 682         .result_start_idx = 23,
 683         .result_bit_size = 64,
 684         .result_num_fields = 9,
 685         .ident_start_idx = 2,
 686         .ident_nums = 0,
 687         .mark_enable = BNXT_ULP_MARK_ENABLE_YES,
 688         .critical_resource = 1,
 689         .regfile_wr_idx = BNXT_ULP_REGFILE_INDEX_NOT_USED
 690         }
 691 };
 692
 693 struct bnxt_ulp_mapper_class_key_field_info ulp_class_key_field_list[] = {
 694         {
 695         .field_bit_size = 8,
 696         .mask_opcode = BNXT_ULP_MASK_OPC_SET_TO_CONSTANT,
 697         .mask_operand = {0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
 698                 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00},
 699         .spec_opcode = BNXT_ULP_SPEC_OPC_SET_TO_HDR_FIELD,
 700         .spec_operand = {(BNXT_ULP_HF0_IDX_SVIF_INDEX >> 8) & 0xff,
 701                 BNXT_ULP_HF0_IDX_SVIF_INDEX & 0xff,
 702                 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
 703                 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}
 704         },
 705         {
 706         .field_bit_size = 4,
 707         .mask_opcode = BNXT_ULP_MASK_OPC_SET_TO_CONSTANT,
 708         .mask_operand = {0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
 709                 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00},
 710         .spec_opcode = BNXT_ULP_SPEC_OPC_SET_TO_CONSTANT,
 711         .spec_operand = {BNXT_ULP_SYM_TUN_HDR_TYPE_NONE,
 712                 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
 713                 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}
 714         },
 715         {
 716         .field_bit_size = 12,
 717         .mask_opcode = BNXT_ULP_MASK_OPC_SET_TO_CONSTANT,
 718         .mask_operand = {0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
 719                 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00},
 720         .spec_opcode = BNXT_ULP_SPEC_OPC_SET_TO_CONSTANT,
 721         .spec_operand = {0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
 722                 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}
 723         },
 724         {
 725         .field_bit_size = 12,
 726         .mask_opcode = BNXT_ULP_MASK_OPC_SET_TO_CONSTANT,
 727         .mask_operand = {0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
 728                 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00},
 729         .spec_opcode = BNXT_ULP_SPEC_OPC_SET_TO_CONSTANT,
 730         .spec_operand = {0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
 731                 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}
 732         },
 733         {
 734         .field_bit_size = 48,
 735         .mask_opcode = BNXT_ULP_MASK_OPC_SET_TO_CONSTANT,
 736         .mask_operand = {0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
 737                 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00},
 738         .spec_opcode = BNXT_ULP_SPEC_OPC_SET_TO_CONSTANT,
 739         .spec_operand = {0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
 740                 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}
 741         },
 742         {
 743         .field_bit_size = 8,
 744         .mask_opcode = BNXT_ULP_MASK_OPC_SET_TO_HDR_FIELD,
 745         .mask_operand = {(BNXT_ULP_HF0_IDX_SVIF_INDEX >> 8) & 0xff,
 746                 BNXT_ULP_HF0_IDX_SVIF_INDEX & 0xff,
 747                 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
 748                 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00},
 749         .spec_opcode = BNXT_ULP_SPEC_OPC_SET_TO_HDR_FIELD,
 750         .spec_operand = {(BNXT_ULP_HF0_IDX_SVIF_INDEX >> 8) & 0xff,
 751                 BNXT_ULP_HF0_IDX_SVIF_INDEX & 0xff,
 752                 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
 753                 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}
 754         },
 755         {
 756         .field_bit_size = 4,
 757         .mask_opcode = BNXT_ULP_MASK_OPC_SET_TO_CONSTANT,
 758         .mask_operand = {0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
 759                 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00},
 760         .spec_opcode = BNXT_ULP_SPEC_OPC_SET_TO_CONSTANT,
 761         .spec_operand = {0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
 762                 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}
 763         },
 764         {
 765         .field_bit_size = 12,
 766         .mask_opcode = BNXT_ULP_MASK_OPC_SET_TO_CONSTANT,
 767         .mask_operand = {0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
 768                 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00},
 769         .spec_opcode = BNXT_ULP_SPEC_OPC_SET_TO_CONSTANT,
 770         .spec_operand = {0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
 771                 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}
 772         },
 773         {
 774         .field_bit_size = 12,
 775         .mask_opcode = BNXT_ULP_MASK_OPC_SET_TO_CONSTANT,
 776         .mask_operand = {0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
 777                 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00},
 778         .spec_opcode = BNXT_ULP_SPEC_OPC_SET_TO_CONSTANT,
 779         .spec_operand = {0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
 780                 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}
 781         },
 782         {
 783         .field_bit_size = 48,
 784         .mask_opcode = BNXT_ULP_MASK_OPC_SET_TO_CONSTANT,
 785         .mask_operand = {0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
 786                 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00},
 787         .spec_opcode = BNXT_ULP_SPEC_OPC_SET_TO_CONSTANT,
 788         .spec_operand = {0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
 789                 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}
 790         },
 791         {
 792         .field_bit_size = 2,
 793         .mask_opcode = BNXT_ULP_MASK_OPC_SET_TO_CONSTANT,
 794         .mask_operand = {0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
 795                 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00},
 796         .spec_opcode = BNXT_ULP_SPEC_OPC_SET_TO_CONSTANT,
 797         .spec_operand = {0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
 798                 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}
 799         },
 800         {
 801         .field_bit_size = 2,
 802         .mask_opcode = BNXT_ULP_MASK_OPC_SET_TO_CONSTANT,
 803         .mask_operand = {0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
 804                 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00},
 805         .spec_opcode = BNXT_ULP_SPEC_OPC_SET_TO_CONSTANT,
 806         .spec_operand = {0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
 807                 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}
 808         },
 809         {
 810         .field_bit_size = 4,
 811         .mask_opcode = BNXT_ULP_MASK_OPC_SET_TO_CONSTANT,
 812         .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
 813                 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff},
 814         .spec_opcode = BNXT_ULP_SPEC_OPC_SET_TO_CONSTANT,
 815         .spec_operand = {BNXT_ULP_SYM_TUN_HDR_TYPE_NONE,
 816                 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
 817                 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}
 818         },
 819         {
 820         .field_bit_size = 2,
 821         .mask_opcode = BNXT_ULP_MASK_OPC_SET_TO_CONSTANT,
 822         .mask_operand = {0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
 823                 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00},
 824         .spec_opcode = BNXT_ULP_SPEC_OPC_SET_TO_CONSTANT,
 825         .spec_operand = {0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
 826                 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}
 827         },
 828         {
 829         .field_bit_size = 1,
 830         .mask_opcode = BNXT_ULP_MASK_OPC_SET_TO_CONSTANT,
 831         .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
 832                 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff},
 833         .spec_opcode = BNXT_ULP_SPEC_OPC_SET_TO_CONSTANT,
 834         .spec_operand = {0x01, 0x00, 0x00, 0x00, 0x00, 0x00,
 835                 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}
 836         },
 837         {
 838         .field_bit_size = 1,
 839         .mask_opcode = BNXT_ULP_MASK_OPC_SET_TO_CONSTANT,
 840         .mask_operand = {0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
 841                 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00},
 842         .spec_opcode = BNXT_ULP_SPEC_OPC_SET_TO_COMP_FIELD,
 843         .spec_operand = {
 844                 (BNXT_ULP_CF_IDX_O_VTAG_NUM >> 8) & 0xff,
 845                 BNXT_ULP_CF_IDX_O_VTAG_NUM & 0xff,
 846                 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
 847                 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}
 848         },
 849         {
 850         .field_bit_size = 7,
 851         .mask_opcode = BNXT_ULP_MASK_OPC_SET_TO_CONSTANT,
 852         .mask_operand = {0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
 853                 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00},
 854         .spec_opcode = BNXT_ULP_SPEC_OPC_SET_TO_GLB_REGFILE,
 855         .spec_operand = {
 856                 (BNXT_ULP_GLB_REGFILE_INDEX_GLB_PROF_FUNC_ID >> 8) & 0xff,
 857                 BNXT_ULP_GLB_REGFILE_INDEX_GLB_PROF_FUNC_ID & 0xff,
 858                 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
 859                 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}
 860         },
 861         {
 862         .field_bit_size = 8,
 863         .mask_opcode = BNXT_ULP_MASK_OPC_SET_TO_CONSTANT,
 864         .mask_operand = {0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
 865                 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00},
 866         .spec_opcode = BNXT_ULP_SPEC_OPC_SET_TO_REGFILE,
 867         .spec_operand = {(BNXT_ULP_REGFILE_INDEX_CLASS_TID >> 8) & 0xff,
 868                 BNXT_ULP_REGFILE_INDEX_CLASS_TID & 0xff,
 869                 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
 870                 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}
 871         },
 872         {
 873         .field_bit_size = 1,
 874         .mask_opcode = BNXT_ULP_MASK_OPC_SET_TO_CONSTANT,
 875         .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
 876                 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff},
 877         .spec_opcode = BNXT_ULP_SPEC_OPC_SET_TO_CONSTANT,
 878         .spec_operand = {0x01, 0x00, 0x00, 0x00, 0x00, 0x00,
 879                 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}
 880         },
 881         {
 882         .field_bit_size = 4,
 883         .mask_opcode = BNXT_ULP_MASK_OPC_SET_TO_CONSTANT,
 884         .mask_operand = {0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
 885                 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00},
 886         .spec_opcode = BNXT_ULP_SPEC_OPC_SET_TO_CONSTANT,
 887         .spec_operand = {0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
 888                 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}
 889         },
 890         {
 891         .field_bit_size = 1,
 892         .mask_opcode = BNXT_ULP_MASK_OPC_SET_TO_CONSTANT,
 893         .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
 894                 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff},
 895         .spec_opcode = BNXT_ULP_SPEC_OPC_SET_TO_CONSTANT,
 896         .spec_operand = {0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
 897                 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}
 898         },
 899         {
 900         .field_bit_size = 1,
 901         .mask_opcode = BNXT_ULP_MASK_OPC_SET_TO_CONSTANT,
 902         .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
 903                 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff},
 904         .spec_opcode = BNXT_ULP_SPEC_OPC_SET_TO_CONSTANT,
 905         .spec_operand = {0x01, 0x00, 0x00, 0x00, 0x00, 0x00,
 906                 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}
 907         },
 908         {
 909         .field_bit_size = 1,
 910         .mask_opcode = BNXT_ULP_MASK_OPC_SET_TO_CONSTANT,
 911         .mask_operand = {0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
 912                 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00},
 913         .spec_opcode = BNXT_ULP_SPEC_OPC_SET_TO_CONSTANT,
 914         .spec_operand = {0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
 915                 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}
 916         },
 917         {
 918         .field_bit_size = 1,
 919         .mask_opcode = BNXT_ULP_MASK_OPC_SET_TO_CONSTANT,
 920         .mask_operand = {0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
 921                 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00},
 922         .spec_opcode = BNXT_ULP_SPEC_OPC_SET_TO_CONSTANT,
 923         .spec_operand = {0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
 924                 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}
 925         },
 926         {
 927         .field_bit_size = 1,
 928         .mask_opcode = BNXT_ULP_MASK_OPC_SET_TO_CONSTANT,
 929         .mask_operand = {0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
 930                 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00},
 931         .spec_opcode = BNXT_ULP_SPEC_OPC_SET_TO_CONSTANT,
 932         .spec_operand = {0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
 933                 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}
 934         },
 935         {
 936         .field_bit_size = 4,
 937         .mask_opcode = BNXT_ULP_MASK_OPC_SET_TO_CONSTANT,
 938         .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
 939                 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff},
 940         .spec_opcode = BNXT_ULP_SPEC_OPC_SET_TO_CONSTANT,
 941         .spec_operand = {BNXT_ULP_SYM_L3_HDR_TYPE_IPV4,
 942                 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
 943                 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}
 944         },
 945         {
 946         .field_bit_size = 1,
 947         .mask_opcode = BNXT_ULP_MASK_OPC_SET_TO_CONSTANT,
 948         .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
 949                 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff},
 950         .spec_opcode = BNXT_ULP_SPEC_OPC_SET_TO_CONSTANT,
 951         .spec_operand = {0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
 952                 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}
 953         },
 954         {
 955         .field_bit_size = 1,
 956         .mask_opcode = BNXT_ULP_MASK_OPC_SET_TO_CONSTANT,
 957         .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
 958                 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff},
 959         .spec_opcode = BNXT_ULP_SPEC_OPC_SET_TO_CONSTANT,
 960         .spec_operand = {0x01, 0x00, 0x00, 0x00, 0x00, 0x00,
 961                 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}
 962         },
 963         {
 964         .field_bit_size = 1,
 965         .mask_opcode = BNXT_ULP_MASK_OPC_SET_TO_CONSTANT,
 966         .mask_operand = {0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
 967                 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00},
 968         .spec_opcode = BNXT_ULP_SPEC_OPC_SET_TO_CONSTANT,
 969         .spec_operand = {0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
 970                 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}
 971         },
 972         {
 973         .field_bit_size = 1,
 974         .mask_opcode = BNXT_ULP_MASK_OPC_SET_TO_CONSTANT,
 975         .mask_operand = {0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
 976                 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00},
 977         .spec_opcode = BNXT_ULP_SPEC_OPC_SET_TO_CONSTANT,
 978         .spec_operand = {0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
 979                 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}
 980         },
 981         {
 982         .field_bit_size = 2,
 983         .mask_opcode = BNXT_ULP_MASK_OPC_SET_TO_CONSTANT,
 984         .mask_operand = {0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
 985                 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00},
 986         .spec_opcode = BNXT_ULP_SPEC_OPC_SET_TO_CONSTANT,
 987         .spec_operand = {0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
 988                 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}
 989         },
 990         {
 991         .field_bit_size = 2,
 992         .mask_opcode = BNXT_ULP_MASK_OPC_SET_TO_CONSTANT,
 993         .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
 994                 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff},
 995         .spec_opcode = BNXT_ULP_SPEC_OPC_SET_TO_CONSTANT,
 996         .spec_operand = {BNXT_ULP_SYM_L2_HDR_TYPE_DIX,
 997                 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
 998                 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}
 999         },
1000         {
1001         .field_bit_size = 1,
1002         .mask_opcode = BNXT_ULP_MASK_OPC_SET_TO_CONSTANT,
1003         .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
1004                 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff},
1005         .spec_opcode = BNXT_ULP_SPEC_OPC_SET_TO_CONSTANT,
1006         .spec_operand = {0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
1007                 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}
1008         },
1009         {
1010         .field_bit_size = 1,
1011         .mask_opcode = BNXT_ULP_MASK_OPC_SET_TO_CONSTANT,
1012         .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
1013                 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff},
1014         .spec_opcode = BNXT_ULP_SPEC_OPC_SET_TO_CONSTANT,
1015         .spec_operand = {0x01, 0x00, 0x00, 0x00, 0x00, 0x00,
1016                 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}
1017         },
1018         {
1019         .field_bit_size = 3,
1020         .mask_opcode = BNXT_ULP_MASK_OPC_SET_TO_CONSTANT,
1021         .mask_operand = {0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
1022                 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00},
1023         .spec_opcode = BNXT_ULP_SPEC_OPC_SET_TO_CONSTANT,
1024         .spec_operand = {0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
1025                 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}
1026         },
1027         {
1028         .field_bit_size = 4,
1029         .mask_opcode = BNXT_ULP_MASK_OPC_SET_TO_CONSTANT,
1030         .mask_operand = {0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
1031                 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00},
1032         .spec_opcode = BNXT_ULP_SPEC_OPC_SET_TO_CONSTANT,
1033         .spec_operand = {BNXT_ULP_SYM_TUN_HDR_TYPE_NONE,
1034                 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
1035                 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}
1036         },
1037         {
1038         .field_bit_size = 1,
1039         .mask_opcode = BNXT_ULP_MASK_OPC_SET_TO_CONSTANT,
1040         .mask_operand = {0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
1041                 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00},
1042         .spec_opcode = BNXT_ULP_SPEC_OPC_SET_TO_CONSTANT,
1043         .spec_operand = {0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
1044                 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}
1045         },
1046         {
1047         .field_bit_size = 1,
1048         .mask_opcode = BNXT_ULP_MASK_OPC_SET_TO_CONSTANT,
1049         .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
1050                 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff},
1051         .spec_opcode = BNXT_ULP_SPEC_OPC_SET_TO_CONSTANT,
1052         .spec_operand = {0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
1053                 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}
1054         },
1055         {
1056         .field_bit_size = 1,
1057         .mask_opcode = BNXT_ULP_MASK_OPC_SET_TO_CONSTANT,
1058         .mask_operand = {0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
1059                 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00},
1060         .spec_opcode = BNXT_ULP_SPEC_OPC_SET_TO_CONSTANT,
1061         .spec_operand = {0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
1062                 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}
1063         },
1064         {
1065         .field_bit_size = 4,
1066         .mask_opcode = BNXT_ULP_MASK_OPC_SET_TO_CONSTANT,
1067         .mask_operand = {0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
1068                 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00},
1069         .spec_opcode = BNXT_ULP_SPEC_OPC_SET_TO_CONSTANT,
1070         .spec_operand = {BNXT_ULP_SYM_TL4_HDR_TYPE_UDP,
1071                 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
1072                 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}
1073         },
1074         {
1075         .field_bit_size = 1,
1076         .mask_opcode = BNXT_ULP_MASK_OPC_SET_TO_CONSTANT,
1077         .mask_operand = {0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
1078                 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00},
1079         .spec_opcode = BNXT_ULP_SPEC_OPC_SET_TO_CONSTANT,
1080         .spec_operand = {0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
1081                 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}
1082         },
1083         {
1084         .field_bit_size = 1,
1085         .mask_opcode = BNXT_ULP_MASK_OPC_SET_TO_CONSTANT,
1086         .mask_operand = {0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
1087                 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00},
1088         .spec_opcode = BNXT_ULP_SPEC_OPC_SET_TO_CONSTANT,
1089         .spec_operand = {0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
1090                 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}
1091         },
1092         {
1093         .field_bit_size = 1,
1094         .mask_opcode = BNXT_ULP_MASK_OPC_SET_TO_CONSTANT,
1095         .mask_operand = {0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
1096                 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00},
1097         .spec_opcode = BNXT_ULP_SPEC_OPC_SET_TO_CONSTANT,
1098         .spec_operand = {0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
1099                 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}
1100         },
1101         {
1102         .field_bit_size = 1,
1103         .mask_opcode = BNXT_ULP_MASK_OPC_SET_TO_CONSTANT,
1104         .mask_operand = {0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
1105                 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00},
1106         .spec_opcode = BNXT_ULP_SPEC_OPC_SET_TO_CONSTANT,
1107         .spec_operand = {0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
1108                 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}
1109         },
1110         {
1111         .field_bit_size = 1,
1112         .mask_opcode = BNXT_ULP_MASK_OPC_SET_TO_CONSTANT,
1113         .mask_operand = {0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
1114                 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00},
1115         .spec_opcode = BNXT_ULP_SPEC_OPC_SET_TO_CONSTANT,
1116         .spec_operand = {0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
1117                 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}
1118         },
1119         {
1120         .field_bit_size = 4,
1121         .mask_opcode = BNXT_ULP_MASK_OPC_SET_TO_CONSTANT,
1122         .mask_operand = {0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
1123                 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00},
1124         .spec_opcode = BNXT_ULP_SPEC_OPC_SET_TO_CONSTANT,
1125         .spec_operand = {BNXT_ULP_SYM_TL3_HDR_TYPE_IPV4,
1126                 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
1127                 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}
1128         },
1129         {
1130         .field_bit_size = 1,
1131         .mask_opcode = BNXT_ULP_MASK_OPC_SET_TO_CONSTANT,
1132         .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
1133                 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff},
1134         .spec_opcode = BNXT_ULP_SPEC_OPC_SET_TO_CONSTANT,
1135         .spec_operand = {0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
1136                 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}
1137         },
1138         {
1139         .field_bit_size = 1,
1140         .mask_opcode = BNXT_ULP_MASK_OPC_SET_TO_CONSTANT,
1141         .mask_operand = {0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
1142                 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00},
1143         .spec_opcode = BNXT_ULP_SPEC_OPC_SET_TO_CONSTANT,
1144         .spec_operand = {0x01, 0x00, 0x00, 0x00, 0x00, 0x00,
1145                 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}
1146         },
1147         {
1148         .field_bit_size = 1,
1149         .mask_opcode = BNXT_ULP_MASK_OPC_SET_TO_CONSTANT,
1150         .mask_operand = {0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
1151                 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00},
1152         .spec_opcode = BNXT_ULP_SPEC_OPC_SET_TO_CONSTANT,
1153         .spec_operand = {0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
1154                 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}
1155         },
1156         {
1157         .field_bit_size = 1,
1158         .mask_opcode = BNXT_ULP_MASK_OPC_SET_TO_CONSTANT,
1159         .mask_operand = {0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
1160                 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00},
1161         .spec_opcode = BNXT_ULP_SPEC_OPC_SET_TO_CONSTANT,
1162         .spec_operand = {0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
1163                 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}
1164         },
1165         {
1166         .field_bit_size = 2,
1167         .mask_opcode = BNXT_ULP_MASK_OPC_SET_TO_CONSTANT,
1168         .mask_operand = {0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
1169                 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00},
1170         .spec_opcode = BNXT_ULP_SPEC_OPC_SET_TO_CONSTANT,
1171         .spec_operand = {0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
1172                 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}
1173         },
1174         {
1175         .field_bit_size = 2,
1176         .mask_opcode = BNXT_ULP_MASK_OPC_SET_TO_CONSTANT,
1177         .mask_operand = {0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
1178                 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00},
1179         .spec_opcode = BNXT_ULP_SPEC_OPC_SET_TO_CONSTANT,
1180         .spec_operand = {BNXT_ULP_SYM_TL2_HDR_TYPE_DIX,
1181                 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
1182                 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}
1183         },
1184         {
1185         .field_bit_size = 1,
1186         .mask_opcode = BNXT_ULP_MASK_OPC_SET_TO_CONSTANT,
1187         .mask_operand = {0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
1188                 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00},
1189         .spec_opcode = BNXT_ULP_SPEC_OPC_SET_TO_CONSTANT,
1190         .spec_operand = {0x01, 0x00, 0x00, 0x00, 0x00, 0x00,
1191                 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}
1192         },
1193         {
1194         .field_bit_size = 1,
1195         .mask_opcode = BNXT_ULP_MASK_OPC_SET_TO_CONSTANT,
1196         .mask_operand = {0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
1197                 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00},
1198         .spec_opcode = BNXT_ULP_SPEC_OPC_SET_TO_CONSTANT,
1199         .spec_operand = {0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
1200                 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}
1201         },
1202         {
1203         .field_bit_size = 9,
1204         .mask_opcode = BNXT_ULP_MASK_OPC_SET_TO_CONSTANT,
1205         .mask_operand = {0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
1206                 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00},
1207         .spec_opcode = BNXT_ULP_SPEC_OPC_SET_TO_CONSTANT,
1208         .spec_operand = {0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
1209                 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}
1210         },
1211         {
1212         .field_bit_size = 7,
1213         .mask_opcode = BNXT_ULP_MASK_OPC_SET_TO_CONSTANT,
1214         .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
1215                 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff},
1216         .spec_opcode = BNXT_ULP_SPEC_OPC_SET_TO_GLB_REGFILE,
1217         .spec_operand = {
1218                 (BNXT_ULP_GLB_REGFILE_INDEX_GLB_PROF_FUNC_ID >> 8) & 0xff,
1219                 BNXT_ULP_GLB_REGFILE_INDEX_GLB_PROF_FUNC_ID & 0xff,
1220                 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
1221                 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}
1222         },
1223         {
1224         .field_bit_size = 1,
1225         .mask_opcode = BNXT_ULP_MASK_OPC_SET_TO_CONSTANT,
1226         .mask_operand = {0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
1227                 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00},
1228         .spec_opcode = BNXT_ULP_SPEC_OPC_SET_TO_CONSTANT,
1229         .spec_operand = {0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
1230                 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}
1231         },
1232         {
1233         .field_bit_size = 2,
1234         .mask_opcode = BNXT_ULP_MASK_OPC_SET_TO_CONSTANT,
1235         .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
1236                 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff},
1237         .spec_opcode = BNXT_ULP_SPEC_OPC_SET_TO_CONSTANT,
1238         .spec_operand = {0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
1239                 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}
1240         },
1241         {
1242         .field_bit_size = 4,
1243         .mask_opcode = BNXT_ULP_MASK_OPC_SET_TO_CONSTANT,
1244         .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
1245                 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff},
1246         .spec_opcode = BNXT_ULP_SPEC_OPC_SET_TO_CONSTANT,
1247         .spec_operand = {BNXT_ULP_SYM_PKT_TYPE_L2,
1248                 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
1249                 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}
1250         },
1251         {
1252         .field_bit_size = 1,
1253         .mask_opcode = BNXT_ULP_MASK_OPC_SET_TO_CONSTANT,
1254         .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
1255                 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff},
1256         .spec_opcode = BNXT_ULP_SPEC_OPC_SET_TO_CONSTANT,
1257         .spec_operand = {0x01, 0x00, 0x00, 0x00, 0x00, 0x00,
1258                 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}
1259         },
1260         {
1261         .field_bit_size = 251,
1262         .mask_opcode = BNXT_ULP_MASK_OPC_SET_TO_CONSTANT,
1263         .mask_operand = {0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
1264                 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00},
1265         .spec_opcode = BNXT_ULP_SPEC_OPC_ADD_PAD,
1266         .spec_operand = {0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
1267                 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}
1268         },
1269         {
1270         .field_bit_size = 3,
1271         .mask_opcode = BNXT_ULP_MASK_OPC_SET_TO_CONSTANT,
1272         .mask_operand = {0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
1273                 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00},
1274         .spec_opcode = BNXT_ULP_SPEC_OPC_SET_TO_CONSTANT,
1275         .spec_operand = {0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
1276                 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}
1277         },
1278         {
1279         .field_bit_size = 16,
1280         .mask_opcode = BNXT_ULP_MASK_OPC_SET_TO_CONSTANT,
1281         .mask_operand = {0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
1282                 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00},
1283         .spec_opcode = BNXT_ULP_SPEC_OPC_SET_TO_HDR_FIELD,
1284         .spec_operand = {(BNXT_ULP_HF0_IDX_O_UDP_DST_PORT >> 8) & 0xff,
1285                 BNXT_ULP_HF0_IDX_O_UDP_DST_PORT & 0xff,
1286                 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
1287                 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}
1288         },
1289         {
1290         .field_bit_size = 16,
1291         .mask_opcode = BNXT_ULP_MASK_OPC_SET_TO_CONSTANT,
1292         .mask_operand = {0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
1293                 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00},
1294         .spec_opcode = BNXT_ULP_SPEC_OPC_SET_TO_HDR_FIELD,
1295         .spec_operand = {(BNXT_ULP_HF0_IDX_O_UDP_SRC_PORT >> 8) & 0xff,
1296                 BNXT_ULP_HF0_IDX_O_UDP_SRC_PORT & 0xff,
1297                 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
1298                 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}
1299         },
1300         {
1301         .field_bit_size = 8,
1302         .mask_opcode = BNXT_ULP_MASK_OPC_SET_TO_CONSTANT,
1303         .mask_operand = {0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
1304                 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00},
1305         .spec_opcode = BNXT_ULP_SPEC_OPC_SET_TO_CONSTANT,
1306         .spec_operand = {BNXT_ULP_SYM_IP_PROTO_UDP,
1307                 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
1308                 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}
1309         },
1310         {
1311         .field_bit_size = 32,
1312         .mask_opcode = BNXT_ULP_MASK_OPC_SET_TO_CONSTANT,
1313         .mask_operand = {0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
1314                 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00},
1315         .spec_opcode = BNXT_ULP_SPEC_OPC_SET_TO_HDR_FIELD,
1316         .spec_operand = {(BNXT_ULP_HF0_IDX_O_IPV4_DST_ADDR >> 8) & 0xff,
1317                 BNXT_ULP_HF0_IDX_O_IPV4_DST_ADDR & 0xff,
1318                 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
1319                 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}
1320         },
1321         {
1322         .field_bit_size = 32,
1323         .mask_opcode = BNXT_ULP_MASK_OPC_SET_TO_CONSTANT,
1324         .mask_operand = {0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
1325                 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00},
1326         .spec_opcode = BNXT_ULP_SPEC_OPC_SET_TO_HDR_FIELD,
1327         .spec_operand = {(BNXT_ULP_HF0_IDX_O_IPV4_SRC_ADDR >> 8) & 0xff,
1328                 BNXT_ULP_HF0_IDX_O_IPV4_SRC_ADDR & 0xff,
1329                 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
1330                 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}
1331         },
1332         {
1333         .field_bit_size = 48,
1334         .mask_opcode = BNXT_ULP_MASK_OPC_SET_TO_CONSTANT,
1335         .mask_operand = {0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
1336                 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00},
1337         .spec_opcode = BNXT_ULP_SPEC_OPC_SET_TO_CONSTANT,
1338         .spec_operand = {0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
1339                 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}
1340         },
1341         {
1342         .field_bit_size = 24,
1343         .mask_opcode = BNXT_ULP_MASK_OPC_SET_TO_CONSTANT,
1344         .mask_operand = {0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
1345                 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00},
1346         .spec_opcode = BNXT_ULP_SPEC_OPC_SET_TO_CONSTANT,
1347         .spec_operand = {0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
1348                 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}
1349         },
1350         {
1351         .field_bit_size = 10,
1352         .mask_opcode = BNXT_ULP_MASK_OPC_SET_TO_CONSTANT,
1353         .mask_operand = {0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
1354                 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00},
1355         .spec_opcode = BNXT_ULP_SPEC_OPC_SET_TO_REGFILE,
1356         .spec_operand = {(BNXT_ULP_REGFILE_INDEX_L2_CNTXT_ID_0 >> 8) & 0xff,
1357                 BNXT_ULP_REGFILE_INDEX_L2_CNTXT_ID_0 & 0xff,
1358                 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
1359                 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}
1360         },
1361         {
1362         .field_bit_size = 8,
1363         .mask_opcode = BNXT_ULP_MASK_OPC_SET_TO_CONSTANT,
1364         .mask_operand = {0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
1365                 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00},
1366         .spec_opcode = BNXT_ULP_SPEC_OPC_SET_TO_REGFILE,
1367         .spec_operand = {(BNXT_ULP_REGFILE_INDEX_EM_PROFILE_ID_0 >> 8) & 0xff,
1368                 BNXT_ULP_REGFILE_INDEX_EM_PROFILE_ID_0 & 0xff,
1369                 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
1370                 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}
1371         }
1372 };
1373
1374 struct bnxt_ulp_mapper_result_field_info ulp_class_result_field_list[] = {
1375         {
1376         .field_bit_size = 10,
1377         .result_opcode = BNXT_ULP_RESULT_OPC_SET_TO_REGFILE,
1378         .result_operand = {(BNXT_ULP_REGFILE_INDEX_L2_CNTXT_ID_0 >> 8) & 0xff,
1379                 BNXT_ULP_REGFILE_INDEX_L2_CNTXT_ID_0 & 0xff,
1380                 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
1381                 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}
1382         },
1383         {
1384         .field_bit_size = 10,
1385         .result_opcode = BNXT_ULP_RESULT_OPC_SET_TO_REGFILE,
1386         .result_operand = {(BNXT_ULP_REGFILE_INDEX_L2_CNTXT_ID_0 >> 8) & 0xff,
1387                 BNXT_ULP_REGFILE_INDEX_L2_CNTXT_ID_0 & 0xff,
1388                 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
1389                 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}
1390         },
1391         {
1392         .field_bit_size = 7,
1393         .result_opcode = BNXT_ULP_RESULT_OPC_SET_TO_GLB_REGFILE,
1394         .result_operand = {
1395                 (BNXT_ULP_GLB_REGFILE_INDEX_GLB_PROF_FUNC_ID >> 8) & 0xff,
1396                 BNXT_ULP_GLB_REGFILE_INDEX_GLB_PROF_FUNC_ID & 0xff,
1397                 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
1398                 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}
1399         },
1400         {
1401         .field_bit_size = 1,
1402         .result_opcode = BNXT_ULP_RESULT_OPC_SET_TO_CONSTANT,
1403         .result_operand = {0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
1404                 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}
1405         },
1406         {
1407         .field_bit_size = 4,
1408         .result_opcode = BNXT_ULP_RESULT_OPC_SET_TO_CONSTANT,
1409         .result_operand = {0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
1410                 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}
1411         },
1412         {
1413         .field_bit_size = 8,
1414         .result_opcode = BNXT_ULP_RESULT_OPC_SET_TO_CONSTANT,
1415         .result_operand = {0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
1416                 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}
1417         },
1418         {
1419         .field_bit_size = 3,
1420         .result_opcode = BNXT_ULP_RESULT_OPC_SET_TO_CONSTANT,
1421         .result_operand = {0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
1422                 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}
1423         },
1424         {
1425         .field_bit_size = 6,
1426         .result_opcode = BNXT_ULP_RESULT_OPC_SET_TO_CONSTANT,
1427         .result_operand = {0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
1428                 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}
1429         },
1430         {
1431         .field_bit_size = 3,
1432         .result_opcode = BNXT_ULP_RESULT_OPC_SET_TO_CONSTANT,
1433         .result_operand = {0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
1434                 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}
1435         },
1436         {
1437         .field_bit_size = 1,
1438         .result_opcode = BNXT_ULP_RESULT_OPC_SET_TO_CONSTANT,
1439         .result_operand = {0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
1440                 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}
1441         },
1442         {
1443         .field_bit_size = 16,
1444         .result_opcode = BNXT_ULP_RESULT_OPC_SET_TO_CONSTANT,
1445         .result_operand = {0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
1446                 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}
1447         },
1448         {
1449         .field_bit_size = 1,
1450         .result_opcode = BNXT_ULP_RESULT_OPC_SET_TO_CONSTANT,
1451         .result_operand = {0x01, 0x00, 0x00, 0x00, 0x00, 0x00,
1452                 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}
1453         },
1454         {
1455         .field_bit_size = 2,
1456         .result_opcode = BNXT_ULP_RESULT_OPC_SET_TO_CONSTANT,
1457         .result_operand = {0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
1458                 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}
1459         },
1460         {
1461         .field_bit_size = 2,
1462         .result_opcode = BNXT_ULP_RESULT_OPC_SET_TO_CONSTANT,
1463         .result_operand = {0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
1464                 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}
1465         },
1466
1467         {
1468         .field_bit_size = 10,
1469         .result_opcode = BNXT_ULP_RESULT_OPC_SET_TO_REGFILE,
1470         .result_operand = {(BNXT_ULP_REGFILE_INDEX_EM_PROFILE_ID_0 >> 8) & 0xff,
1471                 BNXT_ULP_REGFILE_INDEX_EM_PROFILE_ID_0 & 0xff,
1472                 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
1473                 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}
1474         },
1475         {
1476         .field_bit_size = 4,
1477         .result_opcode = BNXT_ULP_RESULT_OPC_SET_TO_CONSTANT,
1478         .result_operand = {0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
1479                 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}
1480         },
1481         {
1482         .field_bit_size = 8,
1483         .result_opcode = BNXT_ULP_RESULT_OPC_SET_TO_CONSTANT,
1484         .result_operand = {0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
1485                 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}
1486         },
1487         {
1488         .field_bit_size = 1,
1489         .result_opcode = BNXT_ULP_RESULT_OPC_SET_TO_CONSTANT,
1490         .result_operand = {0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
1491                 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}
1492         },
1493         {
1494         .field_bit_size = 10,
1495         .result_opcode = BNXT_ULP_RESULT_OPC_SET_TO_CONSTANT,
1496         .result_operand = {(0x00f9 >> 8) & 0xff,
1497                 0x00f9 & 0xff,
1498                 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
1499                 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}
1500         },
1501         {
1502         .field_bit_size = 5,
1503         .result_opcode = BNXT_ULP_RESULT_OPC_SET_TO_CONSTANT,
1504         .result_operand = {0x15, 0x00, 0x00, 0x00, 0x00, 0x00,
1505                 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}
1506         },
1507         {
1508         .field_bit_size = 8,
1509         .result_opcode = BNXT_ULP_RESULT_OPC_SET_TO_REGFILE,
1510         .result_operand = {(BNXT_ULP_REGFILE_INDEX_EM_PROFILE_ID_0 >> 8) & 0xff,
1511                 BNXT_ULP_REGFILE_INDEX_EM_PROFILE_ID_0 & 0xff,
1512                 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
1513                 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}
1514         },
1515         {
1516         .field_bit_size = 1,
1517         .result_opcode = BNXT_ULP_RESULT_OPC_SET_TO_CONSTANT,
1518         .result_operand = {0x01, 0x00, 0x00, 0x00, 0x00, 0x00,
1519                 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}
1520         },
1521         {
1522         .field_bit_size = 1,
1523         .result_opcode = BNXT_ULP_RESULT_OPC_SET_TO_CONSTANT,
1524         .result_operand = {0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
1525                 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}
1526         },
1527         {
1528         .field_bit_size = 33,
1529         .result_opcode = BNXT_ULP_RESULT_OPC_SET_TO_REGFILE,
1530         .result_operand = {(BNXT_ULP_REGFILE_INDEX_ACTION_PTR_MAIN >> 8) & 0xff,
1531                 BNXT_ULP_REGFILE_INDEX_ACTION_PTR_MAIN & 0xff,
1532                 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
1533                 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}
1534         },
1535         {
1536         .field_bit_size = 1,
1537         .result_opcode = BNXT_ULP_RESULT_OPC_SET_TO_CONSTANT,
1538         .result_operand = {0x01, 0x00, 0x00, 0x00, 0x00, 0x00,
1539                 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}
1540         },
1541         {
1542         .field_bit_size = 1,
1543         .result_opcode = BNXT_ULP_RESULT_OPC_SET_TO_CONSTANT,
1544         .result_operand = {0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
1545                 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}
1546         },
1547         {
1548         .field_bit_size = 5,
1549         .result_opcode = BNXT_ULP_RESULT_OPC_SET_TO_CONSTANT,
1550         .result_operand = {0x02, 0x00, 0x00, 0x00, 0x00, 0x00,
1551                 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}
1552         },
1553         {
1554         .field_bit_size = 9,
1555         .result_opcode = BNXT_ULP_RESULT_OPC_SET_TO_CONSTANT,
1556         .result_operand = {(0x00c5 >> 8) & 0xff,
1557                 0x00c5 & 0xff,
1558                 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
1559                 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}
1560         },
1561         {
1562         .field_bit_size = 11,
1563         .result_opcode = BNXT_ULP_RESULT_OPC_SET_TO_CONSTANT,
1564         .result_operand = {0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
1565                 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}
1566         },
1567         {
1568         .field_bit_size = 2,
1569         .result_opcode = BNXT_ULP_RESULT_OPC_SET_TO_CONSTANT,
1570         .result_operand = {0x03, 0x00, 0x00, 0x00, 0x00, 0x00,
1571                 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}
1572         },
1573         {
1574         .field_bit_size = 1,
1575         .result_opcode = BNXT_ULP_RESULT_OPC_SET_TO_CONSTANT,
1576         .result_operand = {0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
1577                 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}
1578         },
1579         {
1580         .field_bit_size = 1,
1581         .result_opcode = BNXT_ULP_RESULT_OPC_SET_TO_CONSTANT,
1582         .result_operand = {0x01, 0x00, 0x00, 0x00, 0x00, 0x00,
1583                 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}
1584         }
1585 };
1586
1587 struct bnxt_ulp_mapper_ident_info ulp_ident_list[] = {
1588         {
1589         .resource_func = BNXT_ULP_RESOURCE_FUNC_IDENTIFIER,
1590         .ident_type = TF_IDENT_TYPE_L2_CTXT,
1591         .regfile_wr_idx = BNXT_ULP_REGFILE_INDEX_L2_CNTXT_ID_0,
1592         .ident_bit_size = 10,
1593         .ident_bit_pos = 0
1594         },
1595         {
1596         .resource_func = BNXT_ULP_RESOURCE_FUNC_IDENTIFIER,
1597         .ident_type = TF_IDENT_TYPE_EM_PROF,
1598         .regfile_wr_idx = BNXT_ULP_REGFILE_INDEX_EM_PROFILE_ID_0,
1599         .ident_bit_size = 10,
1600         .ident_bit_pos = 0
1601         }
1602 };
1603
1604 struct bnxt_ulp_mapper_tbl_list_info ulp_act_tmpl_list[] = {
1605         [((0 << BNXT_ULP_LOG2_MAX_NUM_DEV) |
1606                 BNXT_ULP_DEVICE_ID_WH_PLUS)] = {
1607         .device_name = BNXT_ULP_DEVICE_ID_WH_PLUS,
1608         .num_tbls = 1,
1609         .start_tbl_idx = 0
1610         }
1611 };
1612
1613 struct bnxt_ulp_mapper_act_tbl_info ulp_act_tbl_list[] = {
1614         {
1615         .resource_func = BNXT_ULP_RESOURCE_FUNC_INDEX_TABLE,
1616         .resource_type = TF_TBL_TYPE_EXT,
1617         .resource_sub_type = BNXT_ULP_RESOURCE_SUB_TYPE_IT_NORMAL,
1618         .direction = TF_DIR_RX,
1619         .srch_b4_alloc = BNXT_ULP_SEARCH_BEFORE_ALLOC_NO,
1620         .result_start_idx = 0,
1621         .result_bit_size = 128,
1622         .result_num_fields = 26,
1623         .encap_num_fields = 0,
1624         .regfile_wr_idx = BNXT_ULP_REGFILE_INDEX_ACTION_PTR_MAIN
1625         }
1626 };
1627
1628 struct bnxt_ulp_mapper_result_field_info ulp_act_result_field_list[] = {
1629         {
1630         .field_bit_size = 14,
1631         .result_opcode = BNXT_ULP_RESULT_OPC_SET_TO_CONSTANT,
1632         .result_operand = {0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
1633                 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}
1634         },
1635         {
1636         .field_bit_size = 1,
1637         .result_opcode = BNXT_ULP_RESULT_OPC_SET_TO_CONSTANT,
1638         .result_operand = {0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
1639                 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}
1640         },
1641         {
1642         .field_bit_size = 1,
1643         .result_opcode = BNXT_ULP_RESULT_OPC_SET_TO_CONSTANT,
1644         .result_operand = {0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
1645                 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}
1646         },
1647         {
1648         .field_bit_size = 1,
1649         .result_opcode = BNXT_ULP_RESULT_OPC_SET_TO_CONSTANT,
1650         .result_operand = {0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
1651                 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}
1652         },
1653         {
1654         .field_bit_size = 1,
1655         .result_opcode = BNXT_ULP_RESULT_OPC_SET_TO_CONSTANT,
1656         .result_operand = {0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
1657                 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}
1658         },
1659         {
1660         .field_bit_size = 1,
1661         .result_opcode = BNXT_ULP_RESULT_OPC_SET_TO_CONSTANT,
1662         .result_operand = {0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
1663                 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}
1664         },
1665         {
1666         .field_bit_size = 8,
1667         .result_opcode = BNXT_ULP_RESULT_OPC_SET_TO_CONSTANT,
1668         .result_operand = {0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
1669                 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}
1670         },
1671         {
1672         .field_bit_size = 1,
1673         .result_opcode = BNXT_ULP_RESULT_OPC_SET_TO_CONSTANT,
1674         .result_operand = {0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
1675                 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}
1676         },
1677         {
1678         .field_bit_size = 1,
1679         .result_opcode = BNXT_ULP_RESULT_OPC_SET_TO_CONSTANT,
1680         .result_operand = {0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
1681                 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}
1682         },
1683         {
1684         .field_bit_size = 11,
1685         .result_opcode = BNXT_ULP_RESULT_OPC_SET_TO_CONSTANT,
1686         .result_operand = {0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
1687                 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}
1688         },
1689         {
1690         .field_bit_size = 1,
1691         .result_opcode = BNXT_ULP_RESULT_OPC_SET_TO_CONSTANT,
1692         .result_operand = {0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
1693                 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}
1694         },
1695         {
1696         .field_bit_size = 10,
1697         .result_opcode = BNXT_ULP_RESULT_OPC_SET_TO_CONSTANT,
1698         .result_operand = {0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
1699                 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}
1700         },
1701         {
1702         .field_bit_size = 16,
1703         .result_opcode = BNXT_ULP_RESULT_OPC_SET_TO_CONSTANT,
1704         .result_operand = {0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
1705                 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}
1706         },
1707         {
1708         .field_bit_size = 10,
1709         .result_opcode = BNXT_ULP_RESULT_OPC_SET_TO_CONSTANT,
1710         .result_operand = {0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
1711                 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}
1712         },
1713         {
1714         .field_bit_size = 16,
1715         .result_opcode = BNXT_ULP_RESULT_OPC_SET_TO_CONSTANT,
1716         .result_operand = {0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
1717                 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}
1718         },
1719         {
1720         .field_bit_size = 10,
1721         .result_opcode = BNXT_ULP_RESULT_OPC_SET_TO_CONSTANT,
1722         .result_operand = {0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
1723                 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}
1724         },
1725         {
1726         .field_bit_size = 1,
1727         .result_opcode = BNXT_ULP_RESULT_OPC_SET_TO_CONSTANT,
1728         .result_operand = {0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
1729                 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}
1730         },
1731         {
1732         .field_bit_size = 1,
1733         .result_opcode = BNXT_ULP_RESULT_OPC_SET_TO_CONSTANT,
1734         .result_operand = {0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
1735                 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}
1736         },
1737         {
1738         .field_bit_size = 1,
1739         .result_opcode = BNXT_ULP_RESULT_OPC_SET_TO_CONSTANT,
1740         .result_operand = {0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
1741                 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}
1742         },
1743         {
1744         .field_bit_size = 1,
1745         .result_opcode = BNXT_ULP_RESULT_OPC_SET_TO_CONSTANT,
1746         .result_operand = {0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
1747                 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}
1748         },
1749         {
1750         .field_bit_size = 4,
1751         .result_opcode = BNXT_ULP_RESULT_OPC_SET_TO_CONSTANT,
1752         .result_operand = {BNXT_ULP_SYM_DECAP_FUNC_NONE,
1753                 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
1754                 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}
1755         },
1756         {
1757         .field_bit_size = 12,
1758         .result_opcode = BNXT_ULP_RESULT_OPC_SET_TO_ACT_PROP,
1759         .result_operand = {(BNXT_ULP_ACT_PROP_IDX_VNIC >> 8) & 0xff,
1760                 BNXT_ULP_ACT_PROP_IDX_VNIC & 0xff,
1761                 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
1762                 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}
1763         },
1764         {
1765         .field_bit_size = 1,
1766         .result_opcode = BNXT_ULP_RESULT_OPC_SET_TO_CONSTANT,
1767         .result_operand = {0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
1768                 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}
1769         },
1770         {
1771         .field_bit_size = 1,
1772         .result_opcode = BNXT_ULP_RESULT_OPC_SET_TO_ACT_BIT,
1773         .result_operand = {
1774                 ((uint64_t)BNXT_ULP_ACTION_BIT_POP_VLAN >> 56) & 0xff,
1775                 ((uint64_t)BNXT_ULP_ACTION_BIT_POP_VLAN >> 48) & 0xff,
1776                 ((uint64_t)BNXT_ULP_ACTION_BIT_POP_VLAN >> 40) & 0xff,
1777                 ((uint64_t)BNXT_ULP_ACTION_BIT_POP_VLAN >> 32) & 0xff,
1778                 ((uint64_t)BNXT_ULP_ACTION_BIT_POP_VLAN >> 24) & 0xff,
1779                 ((uint64_t)BNXT_ULP_ACTION_BIT_POP_VLAN >> 16) & 0xff,
1780                 ((uint64_t)BNXT_ULP_ACTION_BIT_POP_VLAN >> 8) & 0xff,
1781                 (uint64_t)BNXT_ULP_ACTION_BIT_POP_VLAN & 0xff,
1782                 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}
1783         },
1784         {
1785         .field_bit_size = 2,
1786         .result_opcode = BNXT_ULP_RESULT_OPC_SET_TO_CONSTANT,
1787         .result_operand = {0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
1788                 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}
1789         },
1790         {
1791         .field_bit_size = 1,
1792         .result_opcode = BNXT_ULP_RESULT_OPC_SET_TO_CONSTANT,
1793         .result_operand = {0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
1794                 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}
1795         }
1796 };