net/bnxt: add default identifiers to ULP mapper
[dpdk.git] / drivers / net / bnxt / tf_ulp / ulp_template_db.h
1 /* SPDX-License-Identifier: BSD-3-Clause
2  * Copyright(c) 2014-2020 Broadcom
3  * All rights reserved.
4  */
5
6 /*
7  * date: Mon Mar  9 02:37:53 2020
8  * version: 0.0
9  */
10
11 #ifndef ULP_TEMPLATE_DB_H_
12 #define ULP_TEMPLATE_DB_H_
13
14 #define BNXT_ULP_REGFILE_MAX_SZ 15
15 #define BNXT_ULP_MAX_NUM_DEVICES 4
16 #define BNXT_ULP_LOG2_MAX_NUM_DEV 2
17 #define BNXT_ULP_CLASS_SIG_TBL_MAX_SZ 256
18 #define BNXT_ULP_CLASS_MATCH_LIST_MAX_SZ 2
19 #define BNXT_ULP_CLASS_HID_LOW_PRIME 7919
20 #define BNXT_ULP_CLASS_HID_HIGH_PRIME 7919
21 #define BNXT_ULP_CLASS_HID_SHFTR 0
22 #define BNXT_ULP_CLASS_HID_SHFTL 23
23 #define BNXT_ULP_CLASS_HID_MASK 255
24 #define BNXT_ULP_ACT_SIG_TBL_MAX_SZ 256
25 #define BNXT_ULP_ACT_MATCH_LIST_MAX_SZ 2
26 #define BNXT_ULP_ACT_HID_LOW_PRIME 7919
27 #define BNXT_ULP_ACT_HID_HIGH_PRIME 7919
28 #define BNXT_ULP_ACT_HID_SHFTR 0
29 #define BNXT_ULP_ACT_HID_SHFTL 23
30 #define BNXT_ULP_ACT_HID_MASK 255
31 #define BNXT_ULP_DEF_IDENT_INFO_TBL_MAX_SZ 1
32
33 enum bnxt_ulp_action_bit {
34         BNXT_ULP_ACTION_BIT_MARK             = 0x0000000000000001,
35         BNXT_ULP_ACTION_BIT_DROP             = 0x0000000000000002,
36         BNXT_ULP_ACTION_BIT_COUNT            = 0x0000000000000004,
37         BNXT_ULP_ACTION_BIT_RSS              = 0x0000000000000008,
38         BNXT_ULP_ACTION_BIT_METER            = 0x0000000000000010,
39         BNXT_ULP_ACTION_BIT_VNIC             = 0x0000000000000020,
40         BNXT_ULP_ACTION_BIT_VPORT            = 0x0000000000000040,
41         BNXT_ULP_ACTION_BIT_VXLAN_DECAP      = 0x0000000000000080,
42         BNXT_ULP_ACTION_BIT_NVGRE_DECAP      = 0x0000000000000100,
43         BNXT_ULP_ACTION_BIT_OF_POP_MPLS      = 0x0000000000000200,
44         BNXT_ULP_ACTION_BIT_OF_PUSH_MPLS     = 0x0000000000000400,
45         BNXT_ULP_ACTION_BIT_MAC_SWAP         = 0x0000000000000800,
46         BNXT_ULP_ACTION_BIT_SET_MAC_SRC      = 0x0000000000001000,
47         BNXT_ULP_ACTION_BIT_SET_MAC_DST      = 0x0000000000002000,
48         BNXT_ULP_ACTION_BIT_OF_POP_VLAN      = 0x0000000000004000,
49         BNXT_ULP_ACTION_BIT_OF_PUSH_VLAN     = 0x0000000000008000,
50         BNXT_ULP_ACTION_BIT_OF_SET_VLAN_PCP  = 0x0000000000010000,
51         BNXT_ULP_ACTION_BIT_OF_SET_VLAN_VID  = 0x0000000000020000,
52         BNXT_ULP_ACTION_BIT_SET_IPV4_SRC     = 0x0000000000040000,
53         BNXT_ULP_ACTION_BIT_SET_IPV4_DST     = 0x0000000000080000,
54         BNXT_ULP_ACTION_BIT_SET_IPV6_SRC     = 0x0000000000100000,
55         BNXT_ULP_ACTION_BIT_SET_IPV6_DST     = 0x0000000000200000,
56         BNXT_ULP_ACTION_BIT_DEC_TTL          = 0x0000000000400000,
57         BNXT_ULP_ACTION_BIT_SET_TP_SRC       = 0x0000000000800000,
58         BNXT_ULP_ACTION_BIT_SET_TP_DST       = 0x0000000001000000,
59         BNXT_ULP_ACTION_BIT_VXLAN_ENCAP      = 0x0000000002000000,
60         BNXT_ULP_ACTION_BIT_NVGRE_ENCAP      = 0x0000000004000000,
61         BNXT_ULP_ACTION_BIT_LAST             = 0x0000000008000000
62 };
63
64 enum bnxt_ulp_hdr_bit {
65         BNXT_ULP_HDR_BIT_SVIF                = 0x0000000000000001,
66         BNXT_ULP_HDR_BIT_O_ETH               = 0x0000000000000002,
67         BNXT_ULP_HDR_BIT_OO_VLAN             = 0x0000000000000004,
68         BNXT_ULP_HDR_BIT_OI_VLAN             = 0x0000000000000008,
69         BNXT_ULP_HDR_BIT_O_IPV4              = 0x0000000000000010,
70         BNXT_ULP_HDR_BIT_O_IPV6              = 0x0000000000000020,
71         BNXT_ULP_HDR_BIT_O_TCP               = 0x0000000000000040,
72         BNXT_ULP_HDR_BIT_O_UDP               = 0x0000000000000080,
73         BNXT_ULP_HDR_BIT_T_VXLAN             = 0x0000000000000100,
74         BNXT_ULP_HDR_BIT_T_GRE               = 0x0000000000000200,
75         BNXT_ULP_HDR_BIT_I_ETH               = 0x0000000000000400,
76         BNXT_ULP_HDR_BIT_IO_VLAN             = 0x0000000000000800,
77         BNXT_ULP_HDR_BIT_II_VLAN             = 0x0000000000001000,
78         BNXT_ULP_HDR_BIT_I_IPV4              = 0x0000000000002000,
79         BNXT_ULP_HDR_BIT_I_IPV6              = 0x0000000000004000,
80         BNXT_ULP_HDR_BIT_I_TCP               = 0x0000000000008000,
81         BNXT_ULP_HDR_BIT_I_UDP               = 0x0000000000010000,
82         BNXT_ULP_HDR_BIT_LAST                = 0x0000000000020000
83 };
84
85 enum bnxt_ulp_act_type {
86         BNXT_ULP_ACT_TYPE_NOT_SUPPORTED = 0,
87         BNXT_ULP_ACT_TYPE_SUPPORTED = 1,
88         BNXT_ULP_ACT_TYPE_END = 2,
89         BNXT_ULP_ACT_TYPE_LAST = 3
90 };
91
92 enum bnxt_ulp_byte_order {
93         BNXT_ULP_BYTE_ORDER_BE = 0,
94         BNXT_ULP_BYTE_ORDER_LE = 1,
95         BNXT_ULP_BYTE_ORDER_LAST = 2
96 };
97
98 enum bnxt_ulp_chf_idx {
99         BNXT_ULP_CHF_IDX_MPLS_TAG_NUM = 0,
100         BNXT_ULP_CHF_IDX_O_VTAG_NUM = 1,
101         BNXT_ULP_CHF_IDX_O_VTAG_PRESENT = 2,
102         BNXT_ULP_CHF_IDX_O_TWO_VTAGS = 3,
103         BNXT_ULP_CHF_IDX_I_VTAG_NUM = 4,
104         BNXT_ULP_CHF_IDX_I_VTAG_PRESENT = 5,
105         BNXT_ULP_CHF_IDX_I_TWO_VTAGS = 6,
106         BNXT_ULP_CHF_IDX_INCOMING_IF = 7,
107         BNXT_ULP_CHF_IDX_DIRECTION = 8,
108         BNXT_ULP_CHF_IDX_SVIF = 9,
109         BNXT_ULP_CHF_IDX_O_L3 = 10,
110         BNXT_ULP_CHF_IDX_I_L3 = 11,
111         BNXT_ULP_CHF_IDX_O_L4 = 12,
112         BNXT_ULP_CHF_IDX_I_L4 = 13,
113         BNXT_ULP_CHF_IDX_LAST = 14
114 };
115
116 enum bnxt_ulp_def_regfile_index {
117         BNXT_ULP_DEF_REGFILE_INDEX_DEF_PROF_FUNC_ID = 0,
118         BNXT_ULP_DEF_REGFILE_INDEX_LAST = 1
119 };
120
121 enum bnxt_ulp_device_id {
122         BNXT_ULP_DEVICE_ID_WH_PLUS = 0,
123         BNXT_ULP_DEVICE_ID_THOR = 1,
124         BNXT_ULP_DEVICE_ID_STINGRAY = 2,
125         BNXT_ULP_DEVICE_ID_STINGRAY2 = 3,
126         BNXT_ULP_DEVICE_ID_LAST = 4
127 };
128
129 enum bnxt_ulp_direction {
130         BNXT_ULP_DIRECTION_INGRESS = 0,
131         BNXT_ULP_DIRECTION_EGRESS = 1,
132         BNXT_ULP_DIRECTION_LAST = 2
133 };
134
135 enum bnxt_ulp_hdr_type {
136         BNXT_ULP_HDR_TYPE_NOT_SUPPORTED = 0,
137         BNXT_ULP_HDR_TYPE_SUPPORTED = 1,
138         BNXT_ULP_HDR_TYPE_END = 2,
139         BNXT_ULP_HDR_TYPE_LAST = 3
140 };
141
142 enum bnxt_ulp_mark_enable {
143         BNXT_ULP_MARK_ENABLE_NO = 0,
144         BNXT_ULP_MARK_ENABLE_YES = 1,
145         BNXT_ULP_MARK_ENABLE_LAST = 2
146 };
147
148 enum bnxt_ulp_mask_opc {
149         BNXT_ULP_MASK_OPC_SET_TO_CONSTANT = 0,
150         BNXT_ULP_MASK_OPC_SET_TO_HDR_FIELD = 1,
151         BNXT_ULP_MASK_OPC_SET_TO_REGFILE = 2,
152         BNXT_ULP_MASK_OPC_SET_TO_DEF_REGFILE = 3,
153         BNXT_ULP_MASK_OPC_ADD_PAD = 4,
154         BNXT_ULP_MASK_OPC_LAST = 5
155 };
156
157 enum bnxt_ulp_match_type {
158         BNXT_ULP_MATCH_TYPE_EM = 0,
159         BNXT_ULP_MATCH_TYPE_WC = 1,
160         BNXT_ULP_MATCH_TYPE_LAST = 2
161 };
162
163 enum bnxt_ulp_priority {
164         BNXT_ULP_PRIORITY_LEVEL_0 = 0,
165         BNXT_ULP_PRIORITY_LEVEL_1 = 1,
166         BNXT_ULP_PRIORITY_LEVEL_2 = 2,
167         BNXT_ULP_PRIORITY_LEVEL_3 = 3,
168         BNXT_ULP_PRIORITY_LEVEL_4 = 4,
169         BNXT_ULP_PRIORITY_LEVEL_5 = 5,
170         BNXT_ULP_PRIORITY_LEVEL_6 = 6,
171         BNXT_ULP_PRIORITY_LEVEL_7 = 7,
172         BNXT_ULP_PRIORITY_NOT_USED = 8,
173         BNXT_ULP_PRIORITY_LAST = 9
174 };
175
176 enum bnxt_ulp_regfile_index {
177         BNXT_ULP_REGFILE_INDEX_CLASS_TID = 0,
178         BNXT_ULP_REGFILE_INDEX_L2_CNTXT_ID_0 = 1,
179         BNXT_ULP_REGFILE_INDEX_L2_CNTXT_ID_1 = 2,
180         BNXT_ULP_REGFILE_INDEX_PROF_FUNC_ID_0 = 3,
181         BNXT_ULP_REGFILE_INDEX_PROF_FUNC_ID_1 = 4,
182         BNXT_ULP_REGFILE_INDEX_EM_PROFILE_ID_0 = 5,
183         BNXT_ULP_REGFILE_INDEX_EM_PROFILE_ID_1 = 6,
184         BNXT_ULP_REGFILE_INDEX_WC_PROFILE_ID_0 = 7,
185         BNXT_ULP_REGFILE_INDEX_WC_PROFILE_ID_1 = 8,
186         BNXT_ULP_REGFILE_INDEX_ACTION_PTR_MAIN = 9,
187         BNXT_ULP_REGFILE_INDEX_ACTION_PTR_0 = 10,
188         BNXT_ULP_REGFILE_INDEX_ENCAP_PTR_0 = 11,
189         BNXT_ULP_REGFILE_INDEX_ENCAP_PTR_1 = 12,
190         BNXT_ULP_REGFILE_INDEX_CRITICAL_RESOURCE = 13,
191         BNXT_ULP_REGFILE_INDEX_NOT_USED = 14,
192         BNXT_ULP_REGFILE_INDEX_LAST = 15
193 };
194
195 enum bnxt_ulp_resource_func {
196         BNXT_ULP_RESOURCE_FUNC_TCAM_TABLE = 0,
197         BNXT_ULP_RESOURCE_FUNC_EM_TABLE = 1,
198         BNXT_ULP_RESOURCE_FUNC_INDEX_TABLE = 2,
199         BNXT_ULP_RESOURCE_FUNC_IDENTIFIER = 3,
200         BNXT_ULP_RESOURCE_FUNC_HW_FID = 4,
201         BNXT_ULP_RESOURCE_FUNC_LAST = 5
202 };
203
204 enum bnxt_ulp_result_opc {
205         BNXT_ULP_RESULT_OPC_SET_TO_CONSTANT = 0,
206         BNXT_ULP_RESULT_OPC_SET_TO_ACT_PROP = 1,
207         BNXT_ULP_RESULT_OPC_SET_TO_ENCAP_ACT_PROP_SZ = 2,
208         BNXT_ULP_RESULT_OPC_SET_TO_REGFILE = 3,
209         BNXT_ULP_RESULT_OPC_SET_TO_DEF_REGFILE = 4,
210         BNXT_ULP_RESULT_OPC_LAST = 5
211 };
212
213 enum bnxt_ulp_search_before_alloc {
214         BNXT_ULP_SEARCH_BEFORE_ALLOC_NO = 0,
215         BNXT_ULP_SEARCH_BEFORE_ALLOC_YES = 1,
216         BNXT_ULP_SEARCH_BEFORE_ALLOC_LAST = 2
217 };
218
219 enum bnxt_ulp_spec_opc {
220         BNXT_ULP_SPEC_OPC_SET_TO_CONSTANT = 0,
221         BNXT_ULP_SPEC_OPC_SET_TO_HDR_FIELD = 1,
222         BNXT_ULP_SPEC_OPC_SET_TO_REGFILE = 2,
223         BNXT_ULP_SPEC_OPC_SET_TO_DEF_REGFILE = 3,
224         BNXT_ULP_SPEC_OPC_ADD_PAD = 4,
225         BNXT_ULP_SPEC_OPC_LAST = 5
226 };
227
228 enum bnxt_ulp_encap_vtag_encoding {
229         BNXT_ULP_ENCAP_VTAG_ENCODING_DTAG_ECAP_PRI = 4,
230         BNXT_ULP_ENCAP_VTAG_ENCODING_DTAG_REMAP_DIFFSERV = 5,
231         BNXT_ULP_ENCAP_VTAG_ENCODING_NO_TAG_ECAP_PRI = 6,
232         BNXT_ULP_ENCAP_VTAG_ENCODING_NO_TAG_REMAP_DIFFSERV = 7,
233         BNXT_ULP_ENCAP_VTAG_ENCODING_NO_TAG_REMAP_PRI_0 = 8,
234         BNXT_ULP_ENCAP_VTAG_ENCODING_NO_TAG_REMAP_PRI_1 = 9,
235         BNXT_ULP_ENCAP_VTAG_ENCODING_NO_TAG_REMAP_PRI_2 = 10,
236         BNXT_ULP_ENCAP_VTAG_ENCODING_NO_TAG_REMAP_PRI_3 = 11,
237         BNXT_ULP_ENCAP_VTAG_ENCODING_NO_TAG_REMAP_PRI_4 = 12,
238         BNXT_ULP_ENCAP_VTAG_ENCODING_NO_TAG_REMAP_PRI_5 = 13,
239         BNXT_ULP_ENCAP_VTAG_ENCODING_NO_TAG_REMAP_PRI_6 = 14,
240         BNXT_ULP_ENCAP_VTAG_ENCODING_NO_TAG_REMAP_PRI_7 = 15,
241         BNXT_ULP_ENCAP_VTAG_ENCODING_NOP = 0,
242         BNXT_ULP_ENCAP_VTAG_ENCODING_STAG_ECAP_PRI = 1,
243         BNXT_ULP_ENCAP_VTAG_ENCODING_STAG_IVLAN_PRI = 2,
244         BNXT_ULP_ENCAP_VTAG_ENCODING_STAG_REMAP_DIFFSERV = 3
245 };
246
247 enum bnxt_ulp_fdb_resource_flags {
248         BNXT_ULP_FDB_RESOURCE_FLAGS_DIR_EGR = 0x01,
249         BNXT_ULP_FDB_RESOURCE_FLAGS_DIR_INGR = 0x00
250 };
251
252 enum bnxt_ulp_fdb_type {
253         BNXT_ULP_FDB_TYPE_DEFAULT = 1,
254         BNXT_ULP_FDB_TYPE_REGULAR = 0
255 };
256
257 enum bnxt_ulp_flow_dir_bitmask {
258         BNXT_ULP_FLOW_DIR_BITMASK_EGR = 0x8000000000000000,
259         BNXT_ULP_FLOW_DIR_BITMASK_ING = 0x0000000000000000
260 };
261
262 enum bnxt_ulp_match_type_bitmask {
263         BNXT_ULP_MATCH_TYPE_BITMASK_EM = 0x0000000000000000,
264         BNXT_ULP_MATCH_TYPE_BITMASK_WM = 0x0000000000000001
265 };
266
267 enum bnxt_ulp_sym {
268         BNXT_ULP_SYM_BIG_ENDIAN = 0,
269         BNXT_ULP_SYM_DECAP_FUNC_NONE = 0,
270         BNXT_ULP_SYM_DECAP_FUNC_THRU_L2 = 11,
271         BNXT_ULP_SYM_DECAP_FUNC_THRU_L3 = 12,
272         BNXT_ULP_SYM_DECAP_FUNC_THRU_L4 = 13,
273         BNXT_ULP_SYM_DECAP_FUNC_THRU_TL2 = 3,
274         BNXT_ULP_SYM_DECAP_FUNC_THRU_TL3 = 8,
275         BNXT_ULP_SYM_DECAP_FUNC_THRU_TL4 = 9,
276         BNXT_ULP_SYM_DECAP_FUNC_THRU_TUN = 10,
277         BNXT_ULP_SYM_ECV_CUSTOM_EN_NO = 0,
278         BNXT_ULP_SYM_ECV_CUSTOM_EN_YES = 1,
279         BNXT_ULP_SYM_ECV_L2_EN_NO = 0,
280         BNXT_ULP_SYM_ECV_L2_EN_YES = 1,
281         BNXT_ULP_SYM_ECV_L3_TYPE_IPV4 = 4,
282         BNXT_ULP_SYM_ECV_L3_TYPE_IPV6 = 5,
283         BNXT_ULP_SYM_ECV_L3_TYPE_MPLS_8847 = 6,
284         BNXT_ULP_SYM_ECV_L3_TYPE_MPLS_8848 = 7,
285         BNXT_ULP_SYM_ECV_L3_TYPE_NONE = 0,
286         BNXT_ULP_SYM_ECV_L4_TYPE_NONE = 0,
287         BNXT_ULP_SYM_ECV_L4_TYPE_UDP = 4,
288         BNXT_ULP_SYM_ECV_L4_TYPE_UDP_CSUM = 5,
289         BNXT_ULP_SYM_ECV_L4_TYPE_UDP_ENTROPY = 6,
290         BNXT_ULP_SYM_ECV_L4_TYPE_UDP_ENTROPY_CSUM = 7,
291         BNXT_ULP_SYM_ECV_TUN_TYPE_GENERIC = 1,
292         BNXT_ULP_SYM_ECV_TUN_TYPE_GRE = 5,
293         BNXT_ULP_SYM_ECV_TUN_TYPE_NGE = 3,
294         BNXT_ULP_SYM_ECV_TUN_TYPE_NONE = 0,
295         BNXT_ULP_SYM_ECV_TUN_TYPE_NVGRE = 4,
296         BNXT_ULP_SYM_ECV_TUN_TYPE_VXLAN = 2,
297         BNXT_ULP_SYM_ECV_VALID_NO = 0,
298         BNXT_ULP_SYM_ECV_VALID_YES = 1,
299         BNXT_ULP_SYM_IP_PROTO_UDP = 17,
300         BNXT_ULP_SYM_L2_HDR_TYPE_DIX = 0,
301         BNXT_ULP_SYM_L2_HDR_TYPE_LLC = 2,
302         BNXT_ULP_SYM_L2_HDR_TYPE_LLC_SNAP = 1,
303         BNXT_ULP_SYM_L3_HDR_TYPE_ARP = 2,
304         BNXT_ULP_SYM_L3_HDR_TYPE_EAPOL = 4,
305         BNXT_ULP_SYM_L3_HDR_TYPE_FCOE = 6,
306         BNXT_ULP_SYM_L3_HDR_TYPE_IPV4 = 0,
307         BNXT_ULP_SYM_L3_HDR_TYPE_IPV6 = 1,
308         BNXT_ULP_SYM_L3_HDR_TYPE_PTP = 3,
309         BNXT_ULP_SYM_L3_HDR_TYPE_ROCE = 5,
310         BNXT_ULP_SYM_L3_HDR_TYPE_UPAR1 = 7,
311         BNXT_ULP_SYM_L3_HDR_TYPE_UPAR2 = 8,
312         BNXT_ULP_SYM_L4_HDR_TYPE_BTH_V1 = 5,
313         BNXT_ULP_SYM_L4_HDR_TYPE_ICMP = 2,
314         BNXT_ULP_SYM_L4_HDR_TYPE_TCP = 0,
315         BNXT_ULP_SYM_L4_HDR_TYPE_UDP = 1,
316         BNXT_ULP_SYM_L4_HDR_TYPE_UPAR1 = 3,
317         BNXT_ULP_SYM_L4_HDR_TYPE_UPAR2 = 4,
318         BNXT_ULP_SYM_LITTLE_ENDIAN = 1,
319         BNXT_ULP_SYM_MATCH_TYPE_EM = 0,
320         BNXT_ULP_SYM_MATCH_TYPE_WM = 1,
321         BNXT_ULP_SYM_NO = 0,
322         BNXT_ULP_SYM_PKT_TYPE_L2 = 0,
323         BNXT_ULP_SYM_POP_VLAN_NO = 0,
324         BNXT_ULP_SYM_POP_VLAN_YES = 1,
325         BNXT_ULP_SYM_STINGRAY2_LOOPBACK_PORT = 3,
326         BNXT_ULP_SYM_STINGRAY_LOOPBACK_PORT = 3,
327         BNXT_ULP_SYM_THOR_LOOPBACK_PORT = 3,
328         BNXT_ULP_SYM_TL2_HDR_TYPE_DIX = 0,
329         BNXT_ULP_SYM_TL3_HDR_TYPE_IPV4 = 0,
330         BNXT_ULP_SYM_TL3_HDR_TYPE_IPV6 = 1,
331         BNXT_ULP_SYM_TL4_HDR_TYPE_TCP = 0,
332         BNXT_ULP_SYM_TL4_HDR_TYPE_UDP = 1,
333         BNXT_ULP_SYM_TUN_HDR_TYPE_GENEVE = 1,
334         BNXT_ULP_SYM_TUN_HDR_TYPE_GRE = 3,
335         BNXT_ULP_SYM_TUN_HDR_TYPE_IPV4 = 4,
336         BNXT_ULP_SYM_TUN_HDR_TYPE_IPV6 = 5,
337         BNXT_ULP_SYM_TUN_HDR_TYPE_MPLS = 7,
338         BNXT_ULP_SYM_TUN_HDR_TYPE_NONE = 15,
339         BNXT_ULP_SYM_TUN_HDR_TYPE_NVGRE = 2,
340         BNXT_ULP_SYM_TUN_HDR_TYPE_PPPOE = 6,
341         BNXT_ULP_SYM_TUN_HDR_TYPE_UPAR1 = 8,
342         BNXT_ULP_SYM_TUN_HDR_TYPE_UPAR2 = 9,
343         BNXT_ULP_SYM_TUN_HDR_TYPE_VXLAN = 0,
344         BNXT_ULP_SYM_WH_PLUS_LOOPBACK_PORT = 3,
345         BNXT_ULP_SYM_YES = 1
346 };
347
348 enum bnxt_ulp_act_prop_sz {
349         BNXT_ULP_ACT_PROP_SZ_ENCAP_TUN_SZ = 4,
350         BNXT_ULP_ACT_PROP_SZ_ENCAP_IP_SZ = 4,
351         BNXT_ULP_ACT_PROP_SZ_ENCAP_VTAG_SZ = 4,
352         BNXT_ULP_ACT_PROP_SZ_ENCAP_VTAG_TYPE = 4,
353         BNXT_ULP_ACT_PROP_SZ_ENCAP_VTAG_NUM = 4,
354         BNXT_ULP_ACT_PROP_SZ_ENCAP_L3_TYPE = 4,
355         BNXT_ULP_ACT_PROP_SZ_MPLS_POP_NUM = 4,
356         BNXT_ULP_ACT_PROP_SZ_MPLS_PUSH_NUM = 4,
357         BNXT_ULP_ACT_PROP_SZ_PORT_ID = 4,
358         BNXT_ULP_ACT_PROP_SZ_VNIC = 4,
359         BNXT_ULP_ACT_PROP_SZ_VPORT = 4,
360         BNXT_ULP_ACT_PROP_SZ_MARK = 4,
361         BNXT_ULP_ACT_PROP_SZ_COUNT = 4,
362         BNXT_ULP_ACT_PROP_SZ_METER = 4,
363         BNXT_ULP_ACT_PROP_SZ_SET_MAC_SRC = 8,
364         BNXT_ULP_ACT_PROP_SZ_SET_MAC_DST = 8,
365         BNXT_ULP_ACT_PROP_SZ_OF_PUSH_VLAN = 4,
366         BNXT_ULP_ACT_PROP_SZ_OF_SET_VLAN_PCP = 4,
367         BNXT_ULP_ACT_PROP_SZ_OF_SET_VLAN_VID = 4,
368         BNXT_ULP_ACT_PROP_SZ_SET_IPV4_SRC = 4,
369         BNXT_ULP_ACT_PROP_SZ_SET_IPV4_DST = 4,
370         BNXT_ULP_ACT_PROP_SZ_SET_IPV6_SRC = 16,
371         BNXT_ULP_ACT_PROP_SZ_SET_IPV6_DST = 16,
372         BNXT_ULP_ACT_PROP_SZ_SET_TP_SRC = 4,
373         BNXT_ULP_ACT_PROP_SZ_SET_TP_DST = 4,
374         BNXT_ULP_ACT_PROP_SZ_OF_PUSH_MPLS_0 = 4,
375         BNXT_ULP_ACT_PROP_SZ_OF_PUSH_MPLS_1 = 4,
376         BNXT_ULP_ACT_PROP_SZ_OF_PUSH_MPLS_2 = 4,
377         BNXT_ULP_ACT_PROP_SZ_OF_PUSH_MPLS_3 = 4,
378         BNXT_ULP_ACT_PROP_SZ_OF_PUSH_MPLS_4 = 4,
379         BNXT_ULP_ACT_PROP_SZ_OF_PUSH_MPLS_5 = 4,
380         BNXT_ULP_ACT_PROP_SZ_OF_PUSH_MPLS_6 = 4,
381         BNXT_ULP_ACT_PROP_SZ_OF_PUSH_MPLS_7 = 4,
382         BNXT_ULP_ACT_PROP_SZ_ENCAP_L2_DMAC = 6,
383         BNXT_ULP_ACT_PROP_SZ_ENCAP_L2_SMAC = 6,
384         BNXT_ULP_ACT_PROP_SZ_ENCAP_VTAG = 8,
385         BNXT_ULP_ACT_PROP_SZ_ENCAP_IP = 32,
386         BNXT_ULP_ACT_PROP_SZ_ENCAP_IP_SRC = 16,
387         BNXT_ULP_ACT_PROP_SZ_ENCAP_UDP = 4,
388         BNXT_ULP_ACT_PROP_SZ_ENCAP_TUN = 32,
389         BNXT_ULP_ACT_PROP_SZ_LAST = 4
390 };
391
392 enum bnxt_ulp_act_prop_idx {
393         BNXT_ULP_ACT_PROP_IDX_ENCAP_TUN_SZ = 0,
394         BNXT_ULP_ACT_PROP_IDX_ENCAP_IP_SZ = 4,
395         BNXT_ULP_ACT_PROP_IDX_ENCAP_VTAG_SZ = 8,
396         BNXT_ULP_ACT_PROP_IDX_ENCAP_VTAG_TYPE = 12,
397         BNXT_ULP_ACT_PROP_IDX_ENCAP_VTAG_NUM = 16,
398         BNXT_ULP_ACT_PROP_IDX_ENCAP_L3_TYPE = 20,
399         BNXT_ULP_ACT_PROP_IDX_MPLS_POP_NUM = 24,
400         BNXT_ULP_ACT_PROP_IDX_MPLS_PUSH_NUM = 28,
401         BNXT_ULP_ACT_PROP_IDX_PORT_ID = 32,
402         BNXT_ULP_ACT_PROP_IDX_VNIC = 36,
403         BNXT_ULP_ACT_PROP_IDX_VPORT = 40,
404         BNXT_ULP_ACT_PROP_IDX_MARK = 44,
405         BNXT_ULP_ACT_PROP_IDX_COUNT = 48,
406         BNXT_ULP_ACT_PROP_IDX_METER = 52,
407         BNXT_ULP_ACT_PROP_IDX_SET_MAC_SRC = 56,
408         BNXT_ULP_ACT_PROP_IDX_SET_MAC_DST = 64,
409         BNXT_ULP_ACT_PROP_IDX_OF_PUSH_VLAN = 72,
410         BNXT_ULP_ACT_PROP_IDX_OF_SET_VLAN_PCP = 76,
411         BNXT_ULP_ACT_PROP_IDX_OF_SET_VLAN_VID = 80,
412         BNXT_ULP_ACT_PROP_IDX_SET_IPV4_SRC = 84,
413         BNXT_ULP_ACT_PROP_IDX_SET_IPV4_DST = 88,
414         BNXT_ULP_ACT_PROP_IDX_SET_IPV6_SRC = 92,
415         BNXT_ULP_ACT_PROP_IDX_SET_IPV6_DST = 108,
416         BNXT_ULP_ACT_PROP_IDX_SET_TP_SRC = 124,
417         BNXT_ULP_ACT_PROP_IDX_SET_TP_DST = 128,
418         BNXT_ULP_ACT_PROP_IDX_OF_PUSH_MPLS_0 = 132,
419         BNXT_ULP_ACT_PROP_IDX_OF_PUSH_MPLS_1 = 136,
420         BNXT_ULP_ACT_PROP_IDX_OF_PUSH_MPLS_2 = 140,
421         BNXT_ULP_ACT_PROP_IDX_OF_PUSH_MPLS_3 = 144,
422         BNXT_ULP_ACT_PROP_IDX_OF_PUSH_MPLS_4 = 148,
423         BNXT_ULP_ACT_PROP_IDX_OF_PUSH_MPLS_5 = 152,
424         BNXT_ULP_ACT_PROP_IDX_OF_PUSH_MPLS_6 = 156,
425         BNXT_ULP_ACT_PROP_IDX_OF_PUSH_MPLS_7 = 160,
426         BNXT_ULP_ACT_PROP_IDX_ENCAP_L2_DMAC = 164,
427         BNXT_ULP_ACT_PROP_IDX_ENCAP_L2_SMAC = 170,
428         BNXT_ULP_ACT_PROP_IDX_ENCAP_VTAG = 176,
429         BNXT_ULP_ACT_PROP_IDX_ENCAP_IP = 184,
430         BNXT_ULP_ACT_PROP_IDX_ENCAP_IP_SRC = 216,
431         BNXT_ULP_ACT_PROP_IDX_ENCAP_UDP = 232,
432         BNXT_ULP_ACT_PROP_IDX_ENCAP_TUN = 236,
433         BNXT_ULP_ACT_PROP_IDX_LAST = 268
434 };
435 enum bnxt_ulp_class_hid {
436         BNXT_ULP_CLASS_HID_0092 = 0x0092
437 };
438
439 enum bnxt_ulp_act_hid {
440         BNXT_ULP_ACT_HID_0029 = 0x0029
441 };
442
443 #endif /* _ULP_TEMPLATE_DB_H_ */