drivers/net/bnxt/tf_ulp/ulp_template_db_act.c

   1 /* SPDX-License-Identifier: BSD-3-Clause
   2  * Copyright(c) 2014-2020 Broadcom
   3  * All rights reserved.
   4  */
   5
   6 #include "ulp_template_db_enum.h"
   7 #include "ulp_template_db_field.h"
   8 #include "ulp_template_struct.h"
   9 #include "ulp_rte_parser.h"
  10
  11 /*
  12  * Action signature table:
  13  * maps hash id to ulp_act_match_list[] index
  14  */
  15 uint16_t ulp_act_sig_tbl[BNXT_ULP_ACT_SIG_TBL_MAX_SZ] = {
  16         [BNXT_ULP_ACT_HID_015a] = 1,
  17         [BNXT_ULP_ACT_HID_00eb] = 2,
  18         [BNXT_ULP_ACT_HID_0043] = 3,
  19         [BNXT_ULP_ACT_HID_03d8] = 4,
  20         [BNXT_ULP_ACT_HID_02c1] = 5,
  21         [BNXT_ULP_ACT_HID_015e] = 6,
  22         [BNXT_ULP_ACT_HID_00ef] = 7,
  23         [BNXT_ULP_ACT_HID_0047] = 8,
  24         [BNXT_ULP_ACT_HID_03dc] = 9,
  25         [BNXT_ULP_ACT_HID_02c5] = 10,
  26         [BNXT_ULP_ACT_HID_025b] = 11,
  27         [BNXT_ULP_ACT_HID_01ec] = 12,
  28         [BNXT_ULP_ACT_HID_0144] = 13,
  29         [BNXT_ULP_ACT_HID_04d9] = 14,
  30         [BNXT_ULP_ACT_HID_03c2] = 15,
  31         [BNXT_ULP_ACT_HID_025f] = 16,
  32         [BNXT_ULP_ACT_HID_01f0] = 17,
  33         [BNXT_ULP_ACT_HID_0148] = 18,
  34         [BNXT_ULP_ACT_HID_04dd] = 19,
  35         [BNXT_ULP_ACT_HID_03c6] = 20,
  36         [BNXT_ULP_ACT_HID_0000] = 21,
  37         [BNXT_ULP_ACT_HID_0002] = 22,
  38         [BNXT_ULP_ACT_HID_0800] = 23,
  39         [BNXT_ULP_ACT_HID_0101] = 24,
  40         [BNXT_ULP_ACT_HID_0020] = 25,
  41         [BNXT_ULP_ACT_HID_0901] = 26,
  42         [BNXT_ULP_ACT_HID_0121] = 27,
  43         [BNXT_ULP_ACT_HID_0004] = 28,
  44         [BNXT_ULP_ACT_HID_0006] = 29,
  45         [BNXT_ULP_ACT_HID_0804] = 30,
  46         [BNXT_ULP_ACT_HID_0105] = 31,
  47         [BNXT_ULP_ACT_HID_0024] = 32,
  48         [BNXT_ULP_ACT_HID_0905] = 33,
  49         [BNXT_ULP_ACT_HID_0125] = 34,
  50         [BNXT_ULP_ACT_HID_0001] = 35,
  51         [BNXT_ULP_ACT_HID_0005] = 36,
  52         [BNXT_ULP_ACT_HID_0009] = 37,
  53         [BNXT_ULP_ACT_HID_000d] = 38,
  54         [BNXT_ULP_ACT_HID_0021] = 39,
  55         [BNXT_ULP_ACT_HID_0029] = 40,
  56         [BNXT_ULP_ACT_HID_0025] = 41,
  57         [BNXT_ULP_ACT_HID_002d] = 42,
  58         [BNXT_ULP_ACT_HID_0801] = 43,
  59         [BNXT_ULP_ACT_HID_0809] = 44,
  60         [BNXT_ULP_ACT_HID_0805] = 45,
  61         [BNXT_ULP_ACT_HID_080d] = 46,
  62         [BNXT_ULP_ACT_HID_0c15] = 47,
  63         [BNXT_ULP_ACT_HID_0c19] = 48,
  64         [BNXT_ULP_ACT_HID_02f6] = 49,
  65         [BNXT_ULP_ACT_HID_04f8] = 50,
  66         [BNXT_ULP_ACT_HID_01df] = 51,
  67         [BNXT_ULP_ACT_HID_07e5] = 52,
  68         [BNXT_ULP_ACT_HID_06ce] = 53,
  69         [BNXT_ULP_ACT_HID_02fa] = 54,
  70         [BNXT_ULP_ACT_HID_04fc] = 55,
  71         [BNXT_ULP_ACT_HID_01e3] = 56,
  72         [BNXT_ULP_ACT_HID_07e9] = 57,
  73         [BNXT_ULP_ACT_HID_06d2] = 58,
  74         [BNXT_ULP_ACT_HID_03f7] = 59,
  75         [BNXT_ULP_ACT_HID_05f9] = 60,
  76         [BNXT_ULP_ACT_HID_02e0] = 61,
  77         [BNXT_ULP_ACT_HID_08e6] = 62,
  78         [BNXT_ULP_ACT_HID_07cf] = 63,
  79         [BNXT_ULP_ACT_HID_03fb] = 64,
  80         [BNXT_ULP_ACT_HID_05fd] = 65,
  81         [BNXT_ULP_ACT_HID_02e4] = 66,
  82         [BNXT_ULP_ACT_HID_08ea] = 67,
  83         [BNXT_ULP_ACT_HID_07d3] = 68,
  84         [BNXT_ULP_ACT_HID_040d] = 69,
  85         [BNXT_ULP_ACT_HID_040f] = 70,
  86         [BNXT_ULP_ACT_HID_0413] = 71,
  87         [BNXT_ULP_ACT_HID_0567] = 72,
  88         [BNXT_ULP_ACT_HID_0a49] = 73,
  89         [BNXT_ULP_ACT_HID_050e] = 74,
  90         [BNXT_ULP_ACT_HID_0668] = 75,
  91         [BNXT_ULP_ACT_HID_0b4a] = 76,
  92         [BNXT_ULP_ACT_HID_0411] = 77,
  93         [BNXT_ULP_ACT_HID_056b] = 78,
  94         [BNXT_ULP_ACT_HID_0a4d] = 79,
  95         [BNXT_ULP_ACT_HID_0512] = 80,
  96         [BNXT_ULP_ACT_HID_066c] = 81,
  97         [BNXT_ULP_ACT_HID_0b4e] = 82
  98 };
  99
 100 /* Array for the act matcher list */
 101 struct bnxt_ulp_act_match_info ulp_act_match_list[] = {
 102         [1] = {
 103         .act_hid = BNXT_ULP_ACT_HID_015a,
 104         .act_sig = { .bits =
 105                 BNXT_ULP_ACTION_BIT_SET_IPV4_SRC |
 106                 BNXT_ULP_FLOW_DIR_BITMASK_ING },
 107         .act_tid = 1
 108         },
 109         [2] = {
 110         .act_hid = BNXT_ULP_ACT_HID_00eb,
 111         .act_sig = { .bits =
 112                 BNXT_ULP_ACTION_BIT_SET_IPV4_SRC |
 113                 BNXT_ULP_ACTION_BIT_SET_TP_SRC |
 114                 BNXT_ULP_FLOW_DIR_BITMASK_ING },
 115         .act_tid = 1
 116         },
 117         [3] = {
 118         .act_hid = BNXT_ULP_ACT_HID_0043,
 119         .act_sig = { .bits =
 120                 BNXT_ULP_ACTION_BIT_SET_IPV4_DST |
 121                 BNXT_ULP_FLOW_DIR_BITMASK_ING },
 122         .act_tid = 1
 123         },
 124         [4] = {
 125         .act_hid = BNXT_ULP_ACT_HID_03d8,
 126         .act_sig = { .bits =
 127                 BNXT_ULP_ACTION_BIT_SET_IPV4_DST |
 128                 BNXT_ULP_ACTION_BIT_SET_TP_SRC |
 129                 BNXT_ULP_ACTION_BIT_SET_TP_DST |
 130                 BNXT_ULP_FLOW_DIR_BITMASK_ING },
 131         .act_tid = 1
 132         },
 133         [5] = {
 134         .act_hid = BNXT_ULP_ACT_HID_02c1,
 135         .act_sig = { .bits =
 136                 BNXT_ULP_ACTION_BIT_SET_IPV4_SRC |
 137                 BNXT_ULP_ACTION_BIT_SET_IPV4_DST |
 138                 BNXT_ULP_ACTION_BIT_SET_TP_SRC |
 139                 BNXT_ULP_ACTION_BIT_SET_TP_DST |
 140                 BNXT_ULP_FLOW_DIR_BITMASK_ING },
 141         .act_tid = 1
 142         },
 143         [6] = {
 144         .act_hid = BNXT_ULP_ACT_HID_015e,
 145         .act_sig = { .bits =
 146                 BNXT_ULP_ACTION_BIT_COUNT |
 147                 BNXT_ULP_ACTION_BIT_SET_IPV4_SRC |
 148                 BNXT_ULP_FLOW_DIR_BITMASK_ING },
 149         .act_tid = 1
 150         },
 151         [7] = {
 152         .act_hid = BNXT_ULP_ACT_HID_00ef,
 153         .act_sig = { .bits =
 154                 BNXT_ULP_ACTION_BIT_COUNT |
 155                 BNXT_ULP_ACTION_BIT_SET_IPV4_SRC |
 156                 BNXT_ULP_ACTION_BIT_SET_TP_SRC |
 157                 BNXT_ULP_FLOW_DIR_BITMASK_ING },
 158         .act_tid = 1
 159         },
 160         [8] = {
 161         .act_hid = BNXT_ULP_ACT_HID_0047,
 162         .act_sig = { .bits =
 163                 BNXT_ULP_ACTION_BIT_COUNT |
 164                 BNXT_ULP_ACTION_BIT_SET_IPV4_DST |
 165                 BNXT_ULP_FLOW_DIR_BITMASK_ING },
 166         .act_tid = 1
 167         },
 168         [9] = {
 169         .act_hid = BNXT_ULP_ACT_HID_03dc,
 170         .act_sig = { .bits =
 171                 BNXT_ULP_ACTION_BIT_COUNT |
 172                 BNXT_ULP_ACTION_BIT_SET_IPV4_DST |
 173                 BNXT_ULP_ACTION_BIT_SET_TP_SRC |
 174                 BNXT_ULP_ACTION_BIT_SET_TP_DST |
 175                 BNXT_ULP_FLOW_DIR_BITMASK_ING },
 176         .act_tid = 1
 177         },
 178         [10] = {
 179         .act_hid = BNXT_ULP_ACT_HID_02c5,
 180         .act_sig = { .bits =
 181                 BNXT_ULP_ACTION_BIT_COUNT |
 182                 BNXT_ULP_ACTION_BIT_SET_IPV4_SRC |
 183                 BNXT_ULP_ACTION_BIT_SET_IPV4_DST |
 184                 BNXT_ULP_ACTION_BIT_SET_TP_SRC |
 185                 BNXT_ULP_ACTION_BIT_SET_TP_DST |
 186                 BNXT_ULP_FLOW_DIR_BITMASK_ING },
 187         .act_tid = 1
 188         },
 189         [11] = {
 190         .act_hid = BNXT_ULP_ACT_HID_025b,
 191         .act_sig = { .bits =
 192                 BNXT_ULP_ACTION_BIT_DEC_TTL |
 193                 BNXT_ULP_ACTION_BIT_SET_IPV4_SRC |
 194                 BNXT_ULP_FLOW_DIR_BITMASK_ING },
 195         .act_tid = 1
 196         },
 197         [12] = {
 198         .act_hid = BNXT_ULP_ACT_HID_01ec,
 199         .act_sig = { .bits =
 200                 BNXT_ULP_ACTION_BIT_DEC_TTL |
 201                 BNXT_ULP_ACTION_BIT_SET_IPV4_SRC |
 202                 BNXT_ULP_ACTION_BIT_SET_TP_SRC |
 203                 BNXT_ULP_FLOW_DIR_BITMASK_ING },
 204         .act_tid = 1
 205         },
 206         [13] = {
 207         .act_hid = BNXT_ULP_ACT_HID_0144,
 208         .act_sig = { .bits =
 209                 BNXT_ULP_ACTION_BIT_DEC_TTL |
 210                 BNXT_ULP_ACTION_BIT_SET_IPV4_DST |
 211                 BNXT_ULP_FLOW_DIR_BITMASK_ING },
 212         .act_tid = 1
 213         },
 214         [14] = {
 215         .act_hid = BNXT_ULP_ACT_HID_04d9,
 216         .act_sig = { .bits =
 217                 BNXT_ULP_ACTION_BIT_DEC_TTL |
 218                 BNXT_ULP_ACTION_BIT_SET_IPV4_DST |
 219                 BNXT_ULP_ACTION_BIT_SET_TP_SRC |
 220                 BNXT_ULP_ACTION_BIT_SET_TP_DST |
 221                 BNXT_ULP_FLOW_DIR_BITMASK_ING },
 222         .act_tid = 1
 223         },
 224         [15] = {
 225         .act_hid = BNXT_ULP_ACT_HID_03c2,
 226         .act_sig = { .bits =
 227                 BNXT_ULP_ACTION_BIT_DEC_TTL |
 228                 BNXT_ULP_ACTION_BIT_SET_IPV4_SRC |
 229                 BNXT_ULP_ACTION_BIT_SET_IPV4_DST |
 230                 BNXT_ULP_ACTION_BIT_SET_TP_SRC |
 231                 BNXT_ULP_ACTION_BIT_SET_TP_DST |
 232                 BNXT_ULP_FLOW_DIR_BITMASK_ING },
 233         .act_tid = 1
 234         },
 235         [16] = {
 236         .act_hid = BNXT_ULP_ACT_HID_025f,
 237         .act_sig = { .bits =
 238                 BNXT_ULP_ACTION_BIT_DEC_TTL |
 239                 BNXT_ULP_ACTION_BIT_COUNT |
 240                 BNXT_ULP_ACTION_BIT_SET_IPV4_SRC |
 241                 BNXT_ULP_FLOW_DIR_BITMASK_ING },
 242         .act_tid = 1
 243         },
 244         [17] = {
 245         .act_hid = BNXT_ULP_ACT_HID_01f0,
 246         .act_sig = { .bits =
 247                 BNXT_ULP_ACTION_BIT_DEC_TTL |
 248                 BNXT_ULP_ACTION_BIT_COUNT |
 249                 BNXT_ULP_ACTION_BIT_SET_IPV4_SRC |
 250                 BNXT_ULP_ACTION_BIT_SET_TP_SRC |
 251                 BNXT_ULP_FLOW_DIR_BITMASK_ING },
 252         .act_tid = 1
 253         },
 254         [18] = {
 255         .act_hid = BNXT_ULP_ACT_HID_0148,
 256         .act_sig = { .bits =
 257                 BNXT_ULP_ACTION_BIT_DEC_TTL |
 258                 BNXT_ULP_ACTION_BIT_COUNT |
 259                 BNXT_ULP_ACTION_BIT_SET_IPV4_DST |
 260                 BNXT_ULP_FLOW_DIR_BITMASK_ING },
 261         .act_tid = 1
 262         },
 263         [19] = {
 264         .act_hid = BNXT_ULP_ACT_HID_04dd,
 265         .act_sig = { .bits =
 266                 BNXT_ULP_ACTION_BIT_DEC_TTL |
 267                 BNXT_ULP_ACTION_BIT_COUNT |
 268                 BNXT_ULP_ACTION_BIT_SET_IPV4_DST |
 269                 BNXT_ULP_ACTION_BIT_SET_TP_SRC |
 270                 BNXT_ULP_ACTION_BIT_SET_TP_DST |
 271                 BNXT_ULP_FLOW_DIR_BITMASK_ING },
 272         .act_tid = 1
 273         },
 274         [20] = {
 275         .act_hid = BNXT_ULP_ACT_HID_03c6,
 276         .act_sig = { .bits =
 277                 BNXT_ULP_ACTION_BIT_DEC_TTL |
 278                 BNXT_ULP_ACTION_BIT_COUNT |
 279                 BNXT_ULP_ACTION_BIT_SET_IPV4_SRC |
 280                 BNXT_ULP_ACTION_BIT_SET_IPV4_DST |
 281                 BNXT_ULP_ACTION_BIT_SET_TP_SRC |
 282                 BNXT_ULP_ACTION_BIT_SET_TP_DST |
 283                 BNXT_ULP_FLOW_DIR_BITMASK_ING },
 284         .act_tid = 1
 285         },
 286         [21] = {
 287         .act_hid = BNXT_ULP_ACT_HID_0000,
 288         .act_sig = { .bits =
 289                 BNXT_ULP_FLOW_DIR_BITMASK_ING },
 290         .act_tid = 2
 291         },
 292         [22] = {
 293         .act_hid = BNXT_ULP_ACT_HID_0002,
 294         .act_sig = { .bits =
 295                 BNXT_ULP_ACTION_BIT_DROP |
 296                 BNXT_ULP_FLOW_DIR_BITMASK_ING },
 297         .act_tid = 2
 298         },
 299         [23] = {
 300         .act_hid = BNXT_ULP_ACT_HID_0800,
 301         .act_sig = { .bits =
 302                 BNXT_ULP_ACTION_BIT_POP_VLAN |
 303                 BNXT_ULP_FLOW_DIR_BITMASK_ING },
 304         .act_tid = 2
 305         },
 306         [24] = {
 307         .act_hid = BNXT_ULP_ACT_HID_0101,
 308         .act_sig = { .bits =
 309                 BNXT_ULP_ACTION_BIT_DEC_TTL |
 310                 BNXT_ULP_FLOW_DIR_BITMASK_ING },
 311         .act_tid = 2
 312         },
 313         [25] = {
 314         .act_hid = BNXT_ULP_ACT_HID_0020,
 315         .act_sig = { .bits =
 316                 BNXT_ULP_ACTION_BIT_VXLAN_DECAP |
 317                 BNXT_ULP_FLOW_DIR_BITMASK_ING },
 318         .act_tid = 2
 319         },
 320         [26] = {
 321         .act_hid = BNXT_ULP_ACT_HID_0901,
 322         .act_sig = { .bits =
 323                 BNXT_ULP_ACTION_BIT_DEC_TTL |
 324                 BNXT_ULP_ACTION_BIT_POP_VLAN |
 325                 BNXT_ULP_FLOW_DIR_BITMASK_ING },
 326         .act_tid = 2
 327         },
 328         [27] = {
 329         .act_hid = BNXT_ULP_ACT_HID_0121,
 330         .act_sig = { .bits =
 331                 BNXT_ULP_ACTION_BIT_VXLAN_DECAP |
 332                 BNXT_ULP_ACTION_BIT_DEC_TTL |
 333                 BNXT_ULP_FLOW_DIR_BITMASK_ING },
 334         .act_tid = 2
 335         },
 336         [28] = {
 337         .act_hid = BNXT_ULP_ACT_HID_0004,
 338         .act_sig = { .bits =
 339                 BNXT_ULP_ACTION_BIT_COUNT |
 340                 BNXT_ULP_FLOW_DIR_BITMASK_ING },
 341         .act_tid = 2
 342         },
 343         [29] = {
 344         .act_hid = BNXT_ULP_ACT_HID_0006,
 345         .act_sig = { .bits =
 346                 BNXT_ULP_ACTION_BIT_COUNT |
 347                 BNXT_ULP_ACTION_BIT_DROP |
 348                 BNXT_ULP_FLOW_DIR_BITMASK_ING },
 349         .act_tid = 2
 350         },
 351         [30] = {
 352         .act_hid = BNXT_ULP_ACT_HID_0804,
 353         .act_sig = { .bits =
 354                 BNXT_ULP_ACTION_BIT_COUNT |
 355                 BNXT_ULP_ACTION_BIT_POP_VLAN |
 356                 BNXT_ULP_FLOW_DIR_BITMASK_ING },
 357         .act_tid = 2
 358         },
 359         [31] = {
 360         .act_hid = BNXT_ULP_ACT_HID_0105,
 361         .act_sig = { .bits =
 362                 BNXT_ULP_ACTION_BIT_COUNT |
 363                 BNXT_ULP_ACTION_BIT_DEC_TTL |
 364                 BNXT_ULP_FLOW_DIR_BITMASK_ING },
 365         .act_tid = 2
 366         },
 367         [32] = {
 368         .act_hid = BNXT_ULP_ACT_HID_0024,
 369         .act_sig = { .bits =
 370                 BNXT_ULP_ACTION_BIT_COUNT |
 371                 BNXT_ULP_ACTION_BIT_VXLAN_DECAP |
 372                 BNXT_ULP_FLOW_DIR_BITMASK_ING },
 373         .act_tid = 2
 374         },
 375         [33] = {
 376         .act_hid = BNXT_ULP_ACT_HID_0905,
 377         .act_sig = { .bits =
 378                 BNXT_ULP_ACTION_BIT_COUNT |
 379                 BNXT_ULP_ACTION_BIT_DEC_TTL |
 380                 BNXT_ULP_ACTION_BIT_POP_VLAN |
 381                 BNXT_ULP_FLOW_DIR_BITMASK_ING },
 382         .act_tid = 2
 383         },
 384         [34] = {
 385         .act_hid = BNXT_ULP_ACT_HID_0125,
 386         .act_sig = { .bits =
 387                 BNXT_ULP_ACTION_BIT_COUNT |
 388                 BNXT_ULP_ACTION_BIT_VXLAN_DECAP |
 389                 BNXT_ULP_ACTION_BIT_DEC_TTL |
 390                 BNXT_ULP_FLOW_DIR_BITMASK_ING },
 391         .act_tid = 2
 392         },
 393         [35] = {
 394         .act_hid = BNXT_ULP_ACT_HID_0001,
 395         .act_sig = { .bits =
 396                 BNXT_ULP_ACTION_BIT_MARK |
 397                 BNXT_ULP_FLOW_DIR_BITMASK_ING },
 398         .act_tid = 3
 399         },
 400         [36] = {
 401         .act_hid = BNXT_ULP_ACT_HID_0005,
 402         .act_sig = { .bits =
 403                 BNXT_ULP_ACTION_BIT_MARK |
 404                 BNXT_ULP_ACTION_BIT_COUNT |
 405                 BNXT_ULP_FLOW_DIR_BITMASK_ING },
 406         .act_tid = 3
 407         },
 408         [37] = {
 409         .act_hid = BNXT_ULP_ACT_HID_0009,
 410         .act_sig = { .bits =
 411                 BNXT_ULP_ACTION_BIT_MARK |
 412                 BNXT_ULP_ACTION_BIT_RSS |
 413                 BNXT_ULP_FLOW_DIR_BITMASK_ING },
 414         .act_tid = 3
 415         },
 416         [38] = {
 417         .act_hid = BNXT_ULP_ACT_HID_000d,
 418         .act_sig = { .bits =
 419                 BNXT_ULP_ACTION_BIT_MARK |
 420                 BNXT_ULP_ACTION_BIT_RSS |
 421                 BNXT_ULP_ACTION_BIT_COUNT |
 422                 BNXT_ULP_FLOW_DIR_BITMASK_ING },
 423         .act_tid = 3
 424         },
 425         [39] = {
 426         .act_hid = BNXT_ULP_ACT_HID_0021,
 427         .act_sig = { .bits =
 428                 BNXT_ULP_ACTION_BIT_MARK |
 429                 BNXT_ULP_ACTION_BIT_VXLAN_DECAP |
 430                 BNXT_ULP_FLOW_DIR_BITMASK_ING },
 431         .act_tid = 3
 432         },
 433         [40] = {
 434         .act_hid = BNXT_ULP_ACT_HID_0029,
 435         .act_sig = { .bits =
 436                 BNXT_ULP_ACTION_BIT_MARK |
 437                 BNXT_ULP_ACTION_BIT_RSS |
 438                 BNXT_ULP_ACTION_BIT_VXLAN_DECAP |
 439                 BNXT_ULP_FLOW_DIR_BITMASK_ING },
 440         .act_tid = 3
 441         },
 442         [41] = {
 443         .act_hid = BNXT_ULP_ACT_HID_0025,
 444         .act_sig = { .bits =
 445                 BNXT_ULP_ACTION_BIT_MARK |
 446                 BNXT_ULP_ACTION_BIT_COUNT |
 447                 BNXT_ULP_ACTION_BIT_VXLAN_DECAP |
 448                 BNXT_ULP_FLOW_DIR_BITMASK_ING },
 449         .act_tid = 3
 450         },
 451         [42] = {
 452         .act_hid = BNXT_ULP_ACT_HID_002d,
 453         .act_sig = { .bits =
 454                 BNXT_ULP_ACTION_BIT_MARK |
 455                 BNXT_ULP_ACTION_BIT_RSS |
 456                 BNXT_ULP_ACTION_BIT_COUNT |
 457                 BNXT_ULP_ACTION_BIT_VXLAN_DECAP |
 458                 BNXT_ULP_FLOW_DIR_BITMASK_ING },
 459         .act_tid = 3
 460         },
 461         [43] = {
 462         .act_hid = BNXT_ULP_ACT_HID_0801,
 463         .act_sig = { .bits =
 464                 BNXT_ULP_ACTION_BIT_MARK |
 465                 BNXT_ULP_ACTION_BIT_POP_VLAN |
 466                 BNXT_ULP_FLOW_DIR_BITMASK_ING },
 467         .act_tid = 3
 468         },
 469         [44] = {
 470         .act_hid = BNXT_ULP_ACT_HID_0809,
 471         .act_sig = { .bits =
 472                 BNXT_ULP_ACTION_BIT_MARK |
 473                 BNXT_ULP_ACTION_BIT_RSS |
 474                 BNXT_ULP_ACTION_BIT_POP_VLAN |
 475                 BNXT_ULP_FLOW_DIR_BITMASK_ING },
 476         .act_tid = 3
 477         },
 478         [45] = {
 479         .act_hid = BNXT_ULP_ACT_HID_0805,
 480         .act_sig = { .bits =
 481                 BNXT_ULP_ACTION_BIT_MARK |
 482                 BNXT_ULP_ACTION_BIT_COUNT |
 483                 BNXT_ULP_ACTION_BIT_POP_VLAN |
 484                 BNXT_ULP_FLOW_DIR_BITMASK_ING },
 485         .act_tid = 3
 486         },
 487         [46] = {
 488         .act_hid = BNXT_ULP_ACT_HID_080d,
 489         .act_sig = { .bits =
 490                 BNXT_ULP_ACTION_BIT_MARK |
 491                 BNXT_ULP_ACTION_BIT_RSS |
 492                 BNXT_ULP_ACTION_BIT_COUNT |
 493                 BNXT_ULP_ACTION_BIT_POP_VLAN |
 494                 BNXT_ULP_FLOW_DIR_BITMASK_ING },
 495         .act_tid = 3
 496         },
 497         [47] = {
 498         .act_hid = BNXT_ULP_ACT_HID_0c15,
 499         .act_sig = { .bits =
 500                 BNXT_ULP_ACTION_BIT_VXLAN_ENCAP |
 501                 BNXT_ULP_FLOW_DIR_BITMASK_EGR },
 502         .act_tid = 4
 503         },
 504         [48] = {
 505         .act_hid = BNXT_ULP_ACT_HID_0c19,
 506         .act_sig = { .bits =
 507                 BNXT_ULP_ACTION_BIT_VXLAN_ENCAP |
 508                 BNXT_ULP_ACTION_BIT_COUNT |
 509                 BNXT_ULP_FLOW_DIR_BITMASK_EGR },
 510         .act_tid = 4
 511         },
 512         [49] = {
 513         .act_hid = BNXT_ULP_ACT_HID_02f6,
 514         .act_sig = { .bits =
 515                 BNXT_ULP_ACTION_BIT_SET_IPV4_SRC |
 516                 BNXT_ULP_FLOW_DIR_BITMASK_EGR },
 517         .act_tid = 5
 518         },
 519         [50] = {
 520         .act_hid = BNXT_ULP_ACT_HID_04f8,
 521         .act_sig = { .bits =
 522                 BNXT_ULP_ACTION_BIT_SET_IPV4_SRC |
 523                 BNXT_ULP_ACTION_BIT_SET_TP_SRC |
 524                 BNXT_ULP_FLOW_DIR_BITMASK_EGR },
 525         .act_tid = 5
 526         },
 527         [51] = {
 528         .act_hid = BNXT_ULP_ACT_HID_01df,
 529         .act_sig = { .bits =
 530                 BNXT_ULP_ACTION_BIT_SET_IPV4_DST |
 531                 BNXT_ULP_FLOW_DIR_BITMASK_EGR },
 532         .act_tid = 5
 533         },
 534         [52] = {
 535         .act_hid = BNXT_ULP_ACT_HID_07e5,
 536         .act_sig = { .bits =
 537                 BNXT_ULP_ACTION_BIT_SET_IPV4_DST |
 538                 BNXT_ULP_ACTION_BIT_SET_TP_SRC |
 539                 BNXT_ULP_ACTION_BIT_SET_TP_DST |
 540                 BNXT_ULP_FLOW_DIR_BITMASK_EGR },
 541         .act_tid = 5
 542         },
 543         [53] = {
 544         .act_hid = BNXT_ULP_ACT_HID_06ce,
 545         .act_sig = { .bits =
 546                 BNXT_ULP_ACTION_BIT_SET_IPV4_SRC |
 547                 BNXT_ULP_ACTION_BIT_SET_IPV4_DST |
 548                 BNXT_ULP_ACTION_BIT_SET_TP_SRC |
 549                 BNXT_ULP_ACTION_BIT_SET_TP_DST |
 550                 BNXT_ULP_FLOW_DIR_BITMASK_EGR },
 551         .act_tid = 5
 552         },
 553         [54] = {
 554         .act_hid = BNXT_ULP_ACT_HID_02fa,
 555         .act_sig = { .bits =
 556                 BNXT_ULP_ACTION_BIT_COUNT |
 557                 BNXT_ULP_ACTION_BIT_SET_IPV4_SRC |
 558                 BNXT_ULP_FLOW_DIR_BITMASK_EGR },
 559         .act_tid = 5
 560         },
 561         [55] = {
 562         .act_hid = BNXT_ULP_ACT_HID_04fc,
 563         .act_sig = { .bits =
 564                 BNXT_ULP_ACTION_BIT_COUNT |
 565                 BNXT_ULP_ACTION_BIT_SET_IPV4_SRC |
 566                 BNXT_ULP_ACTION_BIT_SET_TP_SRC |
 567                 BNXT_ULP_FLOW_DIR_BITMASK_EGR },
 568         .act_tid = 5
 569         },
 570         [56] = {
 571         .act_hid = BNXT_ULP_ACT_HID_01e3,
 572         .act_sig = { .bits =
 573                 BNXT_ULP_ACTION_BIT_COUNT |
 574                 BNXT_ULP_ACTION_BIT_SET_IPV4_DST |
 575                 BNXT_ULP_FLOW_DIR_BITMASK_EGR },
 576         .act_tid = 5
 577         },
 578         [57] = {
 579         .act_hid = BNXT_ULP_ACT_HID_07e9,
 580         .act_sig = { .bits =
 581                 BNXT_ULP_ACTION_BIT_COUNT |
 582                 BNXT_ULP_ACTION_BIT_SET_IPV4_DST |
 583                 BNXT_ULP_ACTION_BIT_SET_TP_SRC |
 584                 BNXT_ULP_ACTION_BIT_SET_TP_DST |
 585                 BNXT_ULP_FLOW_DIR_BITMASK_EGR },
 586         .act_tid = 5
 587         },
 588         [58] = {
 589         .act_hid = BNXT_ULP_ACT_HID_06d2,
 590         .act_sig = { .bits =
 591                 BNXT_ULP_ACTION_BIT_COUNT |
 592                 BNXT_ULP_ACTION_BIT_SET_IPV4_SRC |
 593                 BNXT_ULP_ACTION_BIT_SET_IPV4_DST |
 594                 BNXT_ULP_ACTION_BIT_SET_TP_SRC |
 595                 BNXT_ULP_ACTION_BIT_SET_TP_DST |
 596                 BNXT_ULP_FLOW_DIR_BITMASK_EGR },
 597         .act_tid = 5
 598         },
 599         [59] = {
 600         .act_hid = BNXT_ULP_ACT_HID_03f7,
 601         .act_sig = { .bits =
 602                 BNXT_ULP_ACTION_BIT_DEC_TTL |
 603                 BNXT_ULP_ACTION_BIT_SET_IPV4_SRC |
 604                 BNXT_ULP_FLOW_DIR_BITMASK_EGR },
 605         .act_tid = 5
 606         },
 607         [60] = {
 608         .act_hid = BNXT_ULP_ACT_HID_05f9,
 609         .act_sig = { .bits =
 610                 BNXT_ULP_ACTION_BIT_DEC_TTL |
 611                 BNXT_ULP_ACTION_BIT_SET_IPV4_SRC |
 612                 BNXT_ULP_ACTION_BIT_SET_TP_SRC |
 613                 BNXT_ULP_FLOW_DIR_BITMASK_EGR },
 614         .act_tid = 5
 615         },
 616         [61] = {
 617         .act_hid = BNXT_ULP_ACT_HID_02e0,
 618         .act_sig = { .bits =
 619                 BNXT_ULP_ACTION_BIT_DEC_TTL |
 620                 BNXT_ULP_ACTION_BIT_SET_IPV4_DST |
 621                 BNXT_ULP_FLOW_DIR_BITMASK_EGR },
 622         .act_tid = 5
 623         },
 624         [62] = {
 625         .act_hid = BNXT_ULP_ACT_HID_08e6,
 626         .act_sig = { .bits =
 627                 BNXT_ULP_ACTION_BIT_DEC_TTL |
 628                 BNXT_ULP_ACTION_BIT_SET_IPV4_DST |
 629                 BNXT_ULP_ACTION_BIT_SET_TP_SRC |
 630                 BNXT_ULP_ACTION_BIT_SET_TP_DST |
 631                 BNXT_ULP_FLOW_DIR_BITMASK_EGR },
 632         .act_tid = 5
 633         },
 634         [63] = {
 635         .act_hid = BNXT_ULP_ACT_HID_07cf,
 636         .act_sig = { .bits =
 637                 BNXT_ULP_ACTION_BIT_DEC_TTL |
 638                 BNXT_ULP_ACTION_BIT_SET_IPV4_SRC |
 639                 BNXT_ULP_ACTION_BIT_SET_IPV4_DST |
 640                 BNXT_ULP_ACTION_BIT_SET_TP_SRC |
 641                 BNXT_ULP_ACTION_BIT_SET_TP_DST |
 642                 BNXT_ULP_FLOW_DIR_BITMASK_EGR },
 643         .act_tid = 5
 644         },
 645         [64] = {
 646         .act_hid = BNXT_ULP_ACT_HID_03fb,
 647         .act_sig = { .bits =
 648                 BNXT_ULP_ACTION_BIT_DEC_TTL |
 649                 BNXT_ULP_ACTION_BIT_COUNT |
 650                 BNXT_ULP_ACTION_BIT_SET_IPV4_SRC |
 651                 BNXT_ULP_FLOW_DIR_BITMASK_EGR },
 652         .act_tid = 5
 653         },
 654         [65] = {
 655         .act_hid = BNXT_ULP_ACT_HID_05fd,
 656         .act_sig = { .bits =
 657                 BNXT_ULP_ACTION_BIT_DEC_TTL |
 658                 BNXT_ULP_ACTION_BIT_COUNT |
 659                 BNXT_ULP_ACTION_BIT_SET_IPV4_SRC |
 660                 BNXT_ULP_ACTION_BIT_SET_TP_SRC |
 661                 BNXT_ULP_FLOW_DIR_BITMASK_EGR },
 662         .act_tid = 5
 663         },
 664         [66] = {
 665         .act_hid = BNXT_ULP_ACT_HID_02e4,
 666         .act_sig = { .bits =
 667                 BNXT_ULP_ACTION_BIT_DEC_TTL |
 668                 BNXT_ULP_ACTION_BIT_COUNT |
 669                 BNXT_ULP_ACTION_BIT_SET_IPV4_DST |
 670                 BNXT_ULP_FLOW_DIR_BITMASK_EGR },
 671         .act_tid = 5
 672         },
 673         [67] = {
 674         .act_hid = BNXT_ULP_ACT_HID_08ea,
 675         .act_sig = { .bits =
 676                 BNXT_ULP_ACTION_BIT_DEC_TTL |
 677                 BNXT_ULP_ACTION_BIT_COUNT |
 678                 BNXT_ULP_ACTION_BIT_SET_IPV4_DST |
 679                 BNXT_ULP_ACTION_BIT_SET_TP_SRC |
 680                 BNXT_ULP_ACTION_BIT_SET_TP_DST |
 681                 BNXT_ULP_FLOW_DIR_BITMASK_EGR },
 682         .act_tid = 5
 683         },
 684         [68] = {
 685         .act_hid = BNXT_ULP_ACT_HID_07d3,
 686         .act_sig = { .bits =
 687                 BNXT_ULP_ACTION_BIT_DEC_TTL |
 688                 BNXT_ULP_ACTION_BIT_COUNT |
 689                 BNXT_ULP_ACTION_BIT_SET_IPV4_SRC |
 690                 BNXT_ULP_ACTION_BIT_SET_IPV4_DST |
 691                 BNXT_ULP_ACTION_BIT_SET_TP_SRC |
 692                 BNXT_ULP_ACTION_BIT_SET_TP_DST |
 693                 BNXT_ULP_FLOW_DIR_BITMASK_EGR },
 694         .act_tid = 5
 695         },
 696         [69] = {
 697         .act_hid = BNXT_ULP_ACT_HID_040d,
 698         .act_sig = { .bits =
 699                 BNXT_ULP_FLOW_DIR_BITMASK_EGR },
 700         .act_tid = 6
 701         },
 702         [70] = {
 703         .act_hid = BNXT_ULP_ACT_HID_040f,
 704         .act_sig = { .bits =
 705                 BNXT_ULP_ACTION_BIT_DROP |
 706                 BNXT_ULP_FLOW_DIR_BITMASK_EGR },
 707         .act_tid = 6
 708         },
 709         [71] = {
 710         .act_hid = BNXT_ULP_ACT_HID_0413,
 711         .act_sig = { .bits =
 712                 BNXT_ULP_ACTION_BIT_DROP |
 713                 BNXT_ULP_ACTION_BIT_COUNT |
 714                 BNXT_ULP_FLOW_DIR_BITMASK_EGR },
 715         .act_tid = 6
 716         },
 717         [72] = {
 718         .act_hid = BNXT_ULP_ACT_HID_0567,
 719         .act_sig = { .bits =
 720                 BNXT_ULP_ACTION_BIT_SET_VLAN_PCP |
 721                 BNXT_ULP_ACTION_BIT_SET_VLAN_VID |
 722                 BNXT_ULP_ACTION_BIT_PUSH_VLAN |
 723                 BNXT_ULP_FLOW_DIR_BITMASK_EGR },
 724         .act_tid = 6
 725         },
 726         [73] = {
 727         .act_hid = BNXT_ULP_ACT_HID_0a49,
 728         .act_sig = { .bits =
 729                 BNXT_ULP_ACTION_BIT_SET_VLAN_VID |
 730                 BNXT_ULP_ACTION_BIT_PUSH_VLAN |
 731                 BNXT_ULP_FLOW_DIR_BITMASK_EGR },
 732         .act_tid = 6
 733         },
 734         [74] = {
 735         .act_hid = BNXT_ULP_ACT_HID_050e,
 736         .act_sig = { .bits =
 737                 BNXT_ULP_ACTION_BIT_DEC_TTL |
 738                 BNXT_ULP_FLOW_DIR_BITMASK_EGR },
 739         .act_tid = 6
 740         },
 741         [75] = {
 742         .act_hid = BNXT_ULP_ACT_HID_0668,
 743         .act_sig = { .bits =
 744                 BNXT_ULP_ACTION_BIT_DEC_TTL |
 745                 BNXT_ULP_ACTION_BIT_SET_VLAN_PCP |
 746                 BNXT_ULP_ACTION_BIT_SET_VLAN_VID |
 747                 BNXT_ULP_ACTION_BIT_PUSH_VLAN |
 748                 BNXT_ULP_FLOW_DIR_BITMASK_EGR },
 749         .act_tid = 6
 750         },
 751         [76] = {
 752         .act_hid = BNXT_ULP_ACT_HID_0b4a,
 753         .act_sig = { .bits =
 754                 BNXT_ULP_ACTION_BIT_DEC_TTL |
 755                 BNXT_ULP_ACTION_BIT_SET_VLAN_VID |
 756                 BNXT_ULP_ACTION_BIT_PUSH_VLAN |
 757                 BNXT_ULP_FLOW_DIR_BITMASK_EGR },
 758         .act_tid = 6
 759         },
 760         [77] = {
 761         .act_hid = BNXT_ULP_ACT_HID_0411,
 762         .act_sig = { .bits =
 763                 BNXT_ULP_ACTION_BIT_COUNT |
 764                 BNXT_ULP_FLOW_DIR_BITMASK_EGR },
 765         .act_tid = 6
 766         },
 767         [78] = {
 768         .act_hid = BNXT_ULP_ACT_HID_056b,
 769         .act_sig = { .bits =
 770                 BNXT_ULP_ACTION_BIT_COUNT |
 771                 BNXT_ULP_ACTION_BIT_SET_VLAN_PCP |
 772                 BNXT_ULP_ACTION_BIT_SET_VLAN_VID |
 773                 BNXT_ULP_ACTION_BIT_PUSH_VLAN |
 774                 BNXT_ULP_FLOW_DIR_BITMASK_EGR },
 775         .act_tid = 6
 776         },
 777         [79] = {
 778         .act_hid = BNXT_ULP_ACT_HID_0a4d,
 779         .act_sig = { .bits =
 780                 BNXT_ULP_ACTION_BIT_COUNT |
 781                 BNXT_ULP_ACTION_BIT_SET_VLAN_VID |
 782                 BNXT_ULP_ACTION_BIT_PUSH_VLAN |
 783                 BNXT_ULP_FLOW_DIR_BITMASK_EGR },
 784         .act_tid = 6
 785         },
 786         [80] = {
 787         .act_hid = BNXT_ULP_ACT_HID_0512,
 788         .act_sig = { .bits =
 789                 BNXT_ULP_ACTION_BIT_COUNT |
 790                 BNXT_ULP_ACTION_BIT_DEC_TTL |
 791                 BNXT_ULP_FLOW_DIR_BITMASK_EGR },
 792         .act_tid = 6
 793         },
 794         [81] = {
 795         .act_hid = BNXT_ULP_ACT_HID_066c,
 796         .act_sig = { .bits =
 797                 BNXT_ULP_ACTION_BIT_COUNT |
 798                 BNXT_ULP_ACTION_BIT_DEC_TTL |
 799                 BNXT_ULP_ACTION_BIT_SET_VLAN_PCP |
 800                 BNXT_ULP_ACTION_BIT_SET_VLAN_VID |
 801                 BNXT_ULP_ACTION_BIT_PUSH_VLAN |
 802                 BNXT_ULP_FLOW_DIR_BITMASK_EGR },
 803         .act_tid = 6
 804         },
 805         [82] = {
 806         .act_hid = BNXT_ULP_ACT_HID_0b4e,
 807         .act_sig = { .bits =
 808                 BNXT_ULP_ACTION_BIT_COUNT |
 809                 BNXT_ULP_ACTION_BIT_DEC_TTL |
 810                 BNXT_ULP_ACTION_BIT_SET_VLAN_VID |
 811                 BNXT_ULP_ACTION_BIT_PUSH_VLAN |
 812                 BNXT_ULP_FLOW_DIR_BITMASK_EGR },
 813         .act_tid = 6
 814         }
 815 };