drivers/net/cnxk/cn10k_rx.c

   1 /* SPDX-License-Identifier: BSD-3-Clause
   2  * Copyright(C) 2021 Marvell.
   3  */
   4
   5 #include "cn10k_ethdev.h"
   6 #include "cn10k_rx.h"
   7
   8 #define R(name, f5, f4, f3, f2, f1, f0, flags)                                 \
   9         uint16_t __rte_noinline __rte_hot cn10k_nix_recv_pkts_##name(          \
  10                 void *rx_queue, struct rte_mbuf **rx_pkts, uint16_t pkts)      \
  11         {                                                                      \
  12                 return cn10k_nix_recv_pkts(rx_queue, rx_pkts, pkts, (flags));  \
  13         }                                                                      \
  14
  15 NIX_RX_FASTPATH_MODES
  16 #undef R
  17
  18 static inline void
  19 pick_rx_func(struct rte_eth_dev *eth_dev,
  20              const eth_rx_burst_t rx_burst[2][2][2][2][2][2])
  21 {
  22         struct cnxk_eth_dev *dev = cnxk_eth_pmd_priv(eth_dev);
  23
  24         /* [VLAN] [TSP] [MARK] [CKSUM] [PTYPE] [RSS] */
  25         eth_dev->rx_pkt_burst = rx_burst
  26                 [!!(dev->rx_offload_flags & NIX_RX_OFFLOAD_VLAN_STRIP_F)]
  27                 [!!(dev->rx_offload_flags & NIX_RX_OFFLOAD_TSTAMP_F)]
  28                 [!!(dev->rx_offload_flags & NIX_RX_OFFLOAD_MARK_UPDATE_F)]
  29                 [!!(dev->rx_offload_flags & NIX_RX_OFFLOAD_CHECKSUM_F)]
  30                 [!!(dev->rx_offload_flags & NIX_RX_OFFLOAD_PTYPE_F)]
  31                 [!!(dev->rx_offload_flags & NIX_RX_OFFLOAD_RSS_F)];
  32
  33         rte_atomic_thread_fence(__ATOMIC_RELEASE);
  34 }
  35
  36 void
  37 cn10k_eth_set_rx_function(struct rte_eth_dev *eth_dev)
  38 {
  39         struct cnxk_eth_dev *dev = cnxk_eth_pmd_priv(eth_dev);
  40
  41         const eth_rx_burst_t nix_eth_rx_burst[2][2][2][2][2][2] = {
  42 #define R(name, f5, f4, f3, f2, f1, f0, flags)                                 \
  43         [f5][f4][f3][f2][f1][f0] = cn10k_nix_recv_pkts_##name,
  44
  45                 NIX_RX_FASTPATH_MODES
  46 #undef R
  47         };
  48
  49         const eth_rx_burst_t nix_eth_rx_burst_mseg[2][2][2][2][2][2] = {
  50 #define R(name, f5, f4, f3, f2, f1, f0, flags)                                 \
  51         [f5][f4][f3][f2][f1][f0] = cn10k_nix_recv_pkts_mseg_##name,
  52
  53                 NIX_RX_FASTPATH_MODES
  54 #undef R
  55         };
  56
  57         const eth_rx_burst_t nix_eth_rx_vec_burst[2][2][2][2][2][2] = {
  58 #define R(name, f5, f4, f3, f2, f1, f0, flags)                                 \
  59         [f5][f4][f3][f2][f1][f0] = cn10k_nix_recv_pkts_vec_##name,
  60
  61                 NIX_RX_FASTPATH_MODES
  62 #undef R
  63         };
  64
  65         const eth_rx_burst_t nix_eth_rx_vec_burst_mseg[2][2][2][2][2][2] = {
  66 #define R(name, f5, f4, f3, f2, f1, f0, flags)                                 \
  67         [f5][f4][f3][f2][f1][f0] = cn10k_nix_recv_pkts_vec_mseg_##name,
  68
  69                 NIX_RX_FASTPATH_MODES
  70 #undef R
  71         };
  72
  73         /* Copy multi seg version with no offload for tear down sequence */
  74         if (rte_eal_process_type() == RTE_PROC_PRIMARY)
  75                 dev->rx_pkt_burst_no_offload =
  76                         nix_eth_rx_burst_mseg[0][0][0][0][0][0];
  77
  78         /* For PTP enabled, scalar rx function should be chosen as most of the
  79          * PTP apps are implemented to rx burst 1 pkt.
  80          */
  81         if (dev->scalar_ena || dev->rx_offloads & DEV_RX_OFFLOAD_TIMESTAMP) {
  82                 if (dev->rx_offloads & DEV_RX_OFFLOAD_SCATTER)
  83                         return pick_rx_func(eth_dev, nix_eth_rx_burst_mseg);
  84                 return pick_rx_func(eth_dev, nix_eth_rx_burst);
  85         }
  86
  87         if (dev->rx_offloads & DEV_RX_OFFLOAD_SCATTER)
  88                 return pick_rx_func(eth_dev, nix_eth_rx_vec_burst_mseg);
  89         return pick_rx_func(eth_dev, nix_eth_rx_vec_burst);
  90 }