1 /* SPDX-License-Identifier: BSD-3-Clause
2 * Copyright(C) 2021 Marvell.
10 #include <cnxk_ethdev.h>
12 #define NIX_RX_OFFLOAD_NONE (0)
13 #define NIX_RX_OFFLOAD_RSS_F BIT(0)
14 #define NIX_RX_OFFLOAD_PTYPE_F BIT(1)
15 #define NIX_RX_OFFLOAD_CHECKSUM_F BIT(2)
16 #define NIX_RX_OFFLOAD_MARK_UPDATE_F BIT(3)
17 #define NIX_RX_OFFLOAD_TSTAMP_F BIT(4)
18 #define NIX_RX_OFFLOAD_VLAN_STRIP_F BIT(5)
20 /* Flags to control cqe_to_mbuf conversion function.
21 * Defining it from backwards to denote its been
22 * not used as offload flags to pick function
24 #define NIX_RX_MULTI_SEG_F BIT(15)
26 #define CNXK_NIX_CQ_ENTRY_SZ 128
27 #define NIX_DESCS_PER_LOOP 4
28 #define CQE_CAST(x) ((struct nix_cqe_hdr_s *)(x))
29 #define CQE_SZ(x) ((x) * CNXK_NIX_CQ_ENTRY_SZ)
31 union mbuf_initializer {
41 static __rte_always_inline uint64_t
42 nix_clear_data_off(uint64_t oldval)
44 union mbuf_initializer mbuf_init = {.value = oldval};
46 mbuf_init.fields.data_off = 0;
47 return mbuf_init.value;
50 static __rte_always_inline struct rte_mbuf *
51 nix_get_mbuf_from_cqe(void *cq, const uint64_t data_off)
55 /* Skip CQE, NIX_RX_PARSE_S and SG HDR(9 DWORDs) and peek buff addr */
56 buff = *((rte_iova_t *)((uint64_t *)cq + 9));
57 return (struct rte_mbuf *)(buff - data_off);
60 static __rte_always_inline uint32_t
61 nix_ptype_get(const void *const lookup_mem, const uint64_t in)
63 const uint16_t *const ptype = lookup_mem;
64 const uint16_t lh_lg_lf = (in & 0xFFF0000000000000) >> 52;
65 const uint16_t tu_l2 = ptype[(in & 0x000FFFF000000000) >> 36];
66 const uint16_t il4_tu = ptype[PTYPE_NON_TUNNEL_ARRAY_SZ + lh_lg_lf];
68 return (il4_tu << PTYPE_NON_TUNNEL_WIDTH) | tu_l2;
71 static __rte_always_inline uint32_t
72 nix_rx_olflags_get(const void *const lookup_mem, const uint64_t in)
74 const uint32_t *const ol_flags =
75 (const uint32_t *)((const uint8_t *)lookup_mem +
78 return ol_flags[(in & 0xfff00000) >> 20];
81 static inline uint64_t
82 nix_update_match_id(const uint16_t match_id, uint64_t ol_flags,
83 struct rte_mbuf *mbuf)
85 /* There is no separate bit to check match_id
86 * is valid or not? and no flag to identify it is an
87 * RTE_FLOW_ACTION_TYPE_FLAG vs RTE_FLOW_ACTION_TYPE_MARK
88 * action. The former case addressed through 0 being invalid
89 * value and inc/dec match_id pair when MARK is activated.
90 * The later case addressed through defining
91 * CNXK_FLOW_MARK_DEFAULT as value for
92 * RTE_FLOW_ACTION_TYPE_MARK.
93 * This would translate to not use
94 * CNXK_FLOW_ACTION_FLAG_DEFAULT - 1 and
95 * CNXK_FLOW_ACTION_FLAG_DEFAULT for match_id.
96 * i.e valid mark_id's are from
97 * 0 to CNXK_FLOW_ACTION_FLAG_DEFAULT - 2
99 if (likely(match_id)) {
100 ol_flags |= PKT_RX_FDIR;
101 if (match_id != CNXK_FLOW_ACTION_FLAG_DEFAULT) {
102 ol_flags |= PKT_RX_FDIR_ID;
103 mbuf->hash.fdir.hi = match_id - 1;
110 static __rte_always_inline void
111 nix_cqe_xtract_mseg(const union nix_rx_parse_u *rx, struct rte_mbuf *mbuf,
114 const rte_iova_t *iova_list;
115 struct rte_mbuf *head;
116 const rte_iova_t *eol;
120 sg = *(const uint64_t *)(rx + 1);
121 nb_segs = (sg >> 48) & 0x3;
128 mbuf->pkt_len = rx->pkt_lenm1 + 1;
129 mbuf->data_len = sg & 0xFFFF;
130 mbuf->nb_segs = nb_segs;
133 eol = ((const rte_iova_t *)(rx + 1) + ((rx->desc_sizem1 + 1) << 1));
134 /* Skip SG_S and first IOVA*/
135 iova_list = ((const rte_iova_t *)(rx + 1)) + 2;
138 rearm = rearm & ~0xFFFF;
142 mbuf->next = ((struct rte_mbuf *)*iova_list) - 1;
145 __mempool_check_cookies(mbuf->pool, (void **)&mbuf, 1, 1);
147 mbuf->data_len = sg & 0xFFFF;
149 *(uint64_t *)(&mbuf->rearm_data) = rearm;
153 if (!nb_segs && (iova_list + 1 < eol)) {
154 sg = *(const uint64_t *)(iova_list);
155 nb_segs = (sg >> 48) & 0x3;
156 head->nb_segs += nb_segs;
157 iova_list = (const rte_iova_t *)(iova_list + 1);
163 static __rte_always_inline void
164 cn10k_nix_cqe_to_mbuf(const struct nix_cqe_hdr_s *cq, const uint32_t tag,
165 struct rte_mbuf *mbuf, const void *lookup_mem,
166 const uint64_t val, const uint16_t flag)
168 const union nix_rx_parse_u *rx =
169 (const union nix_rx_parse_u *)((const uint64_t *)cq + 1);
170 const uint16_t len = rx->pkt_lenm1 + 1;
171 const uint64_t w1 = *(const uint64_t *)rx;
172 uint64_t ol_flags = 0;
174 /* Mark mempool obj as "get" as it is alloc'ed by NIX */
175 __mempool_check_cookies(mbuf->pool, (void **)&mbuf, 1, 1);
177 if (flag & NIX_RX_OFFLOAD_PTYPE_F)
178 mbuf->packet_type = nix_ptype_get(lookup_mem, w1);
180 mbuf->packet_type = 0;
182 if (flag & NIX_RX_OFFLOAD_RSS_F) {
183 mbuf->hash.rss = tag;
184 ol_flags |= PKT_RX_RSS_HASH;
187 if (flag & NIX_RX_OFFLOAD_CHECKSUM_F)
188 ol_flags |= nix_rx_olflags_get(lookup_mem, w1);
190 if (flag & NIX_RX_OFFLOAD_VLAN_STRIP_F) {
191 if (rx->vtag0_gone) {
192 ol_flags |= PKT_RX_VLAN | PKT_RX_VLAN_STRIPPED;
193 mbuf->vlan_tci = rx->vtag0_tci;
195 if (rx->vtag1_gone) {
196 ol_flags |= PKT_RX_QINQ | PKT_RX_QINQ_STRIPPED;
197 mbuf->vlan_tci_outer = rx->vtag1_tci;
201 if (flag & NIX_RX_OFFLOAD_MARK_UPDATE_F)
202 ol_flags = nix_update_match_id(rx->match_id, ol_flags, mbuf);
204 mbuf->ol_flags = ol_flags;
206 mbuf->data_len = len;
207 *(uint64_t *)(&mbuf->rearm_data) = val;
209 if (flag & NIX_RX_MULTI_SEG_F)
210 nix_cqe_xtract_mseg(rx, mbuf, val);
215 static inline uint16_t
216 nix_rx_nb_pkts(struct cn10k_eth_rxq *rxq, const uint64_t wdata,
217 const uint16_t pkts, const uint32_t qmask)
219 uint32_t available = rxq->available;
221 /* Update the available count if cached value is not enough */
222 if (unlikely(available < pkts)) {
223 uint64_t reg, head, tail;
225 /* Use LDADDA version to avoid reorder */
226 reg = roc_atomic64_add_sync(wdata, rxq->cq_status);
227 /* CQ_OP_STATUS operation error */
228 if (reg & BIT_ULL(NIX_CQ_OP_STAT_OP_ERR) ||
229 reg & BIT_ULL(NIX_CQ_OP_STAT_CQ_ERR))
232 tail = reg & 0xFFFFF;
233 head = (reg >> 20) & 0xFFFFF;
235 available = tail - head + qmask + 1;
237 available = tail - head;
239 rxq->available = available;
242 return RTE_MIN(pkts, available);
245 static __rte_always_inline uint16_t
246 cn10k_nix_recv_pkts(void *rx_queue, struct rte_mbuf **rx_pkts, uint16_t pkts,
247 const uint16_t flags)
249 struct cn10k_eth_rxq *rxq = rx_queue;
250 const uint64_t mbuf_init = rxq->mbuf_initializer;
251 const void *lookup_mem = rxq->lookup_mem;
252 const uint64_t data_off = rxq->data_off;
253 const uintptr_t desc = rxq->desc;
254 const uint64_t wdata = rxq->wdata;
255 const uint32_t qmask = rxq->qmask;
256 uint16_t packets = 0, nb_pkts;
257 uint32_t head = rxq->head;
258 struct nix_cqe_hdr_s *cq;
259 struct rte_mbuf *mbuf;
261 nb_pkts = nix_rx_nb_pkts(rxq, wdata, pkts, qmask);
263 while (packets < nb_pkts) {
264 /* Prefetch N desc ahead */
265 rte_prefetch_non_temporal(
266 (void *)(desc + (CQE_SZ((head + 2) & qmask))));
267 cq = (struct nix_cqe_hdr_s *)(desc + CQE_SZ(head));
269 mbuf = nix_get_mbuf_from_cqe(cq, data_off);
271 cn10k_nix_cqe_to_mbuf(cq, cq->tag, mbuf, lookup_mem, mbuf_init,
273 cnxk_nix_mbuf_to_tstamp(mbuf, rxq->tstamp,
274 (flags & NIX_RX_OFFLOAD_TSTAMP_F),
275 (uint64_t *)((uint8_t *)mbuf + data_off)
277 rx_pkts[packets++] = mbuf;
278 roc_prefetch_store_keep(mbuf);
284 rxq->available -= nb_pkts;
286 /* Free all the CQs that we've processed */
287 plt_write64((wdata | nb_pkts), rxq->cq_door);
292 #if defined(RTE_ARCH_ARM64)
294 static __rte_always_inline uint64_t
295 nix_vlan_update(const uint64_t w2, uint64_t ol_flags, uint8x16_t *f)
297 if (w2 & BIT_ULL(21) /* vtag0_gone */) {
298 ol_flags |= PKT_RX_VLAN | PKT_RX_VLAN_STRIPPED;
299 *f = vsetq_lane_u16((uint16_t)(w2 >> 32), *f, 5);
305 static __rte_always_inline uint64_t
306 nix_qinq_update(const uint64_t w2, uint64_t ol_flags, struct rte_mbuf *mbuf)
308 if (w2 & BIT_ULL(23) /* vtag1_gone */) {
309 ol_flags |= PKT_RX_QINQ | PKT_RX_QINQ_STRIPPED;
310 mbuf->vlan_tci_outer = (uint16_t)(w2 >> 48);
316 static __rte_always_inline uint16_t
317 cn10k_nix_recv_pkts_vector(void *rx_queue, struct rte_mbuf **rx_pkts,
318 uint16_t pkts, const uint16_t flags)
320 struct cn10k_eth_rxq *rxq = rx_queue;
321 uint16_t packets = 0;
322 uint64x2_t cq0_w8, cq1_w8, cq2_w8, cq3_w8, mbuf01, mbuf23;
323 const uint64_t mbuf_initializer = rxq->mbuf_initializer;
324 const uint64x2_t data_off = vdupq_n_u64(rxq->data_off);
325 uint64_t ol_flags0, ol_flags1, ol_flags2, ol_flags3;
326 uint64x2_t rearm0 = vdupq_n_u64(mbuf_initializer);
327 uint64x2_t rearm1 = vdupq_n_u64(mbuf_initializer);
328 uint64x2_t rearm2 = vdupq_n_u64(mbuf_initializer);
329 uint64x2_t rearm3 = vdupq_n_u64(mbuf_initializer);
330 struct rte_mbuf *mbuf0, *mbuf1, *mbuf2, *mbuf3;
331 const uint16_t *lookup_mem = rxq->lookup_mem;
332 const uint32_t qmask = rxq->qmask;
333 const uint64_t wdata = rxq->wdata;
334 const uintptr_t desc = rxq->desc;
335 uint8x16_t f0, f1, f2, f3;
336 uint32_t head = rxq->head;
339 pkts = nix_rx_nb_pkts(rxq, wdata, pkts, qmask);
340 pkts_left = pkts & (NIX_DESCS_PER_LOOP - 1);
342 /* Packets has to be floor-aligned to NIX_DESCS_PER_LOOP */
343 pkts = RTE_ALIGN_FLOOR(pkts, NIX_DESCS_PER_LOOP);
345 while (packets < pkts) {
346 /* Exit loop if head is about to wrap and become unaligned */
347 if (((head + NIX_DESCS_PER_LOOP - 1) & qmask) <
348 NIX_DESCS_PER_LOOP) {
349 pkts_left += (pkts - packets);
353 const uintptr_t cq0 = desc + CQE_SZ(head);
355 /* Prefetch N desc ahead */
356 rte_prefetch_non_temporal((void *)(cq0 + CQE_SZ(8)));
357 rte_prefetch_non_temporal((void *)(cq0 + CQE_SZ(9)));
358 rte_prefetch_non_temporal((void *)(cq0 + CQE_SZ(10)));
359 rte_prefetch_non_temporal((void *)(cq0 + CQE_SZ(11)));
361 /* Get NIX_RX_SG_S for size and buffer pointer */
362 cq0_w8 = vld1q_u64((uint64_t *)(cq0 + CQE_SZ(0) + 64));
363 cq1_w8 = vld1q_u64((uint64_t *)(cq0 + CQE_SZ(1) + 64));
364 cq2_w8 = vld1q_u64((uint64_t *)(cq0 + CQE_SZ(2) + 64));
365 cq3_w8 = vld1q_u64((uint64_t *)(cq0 + CQE_SZ(3) + 64));
367 /* Extract mbuf from NIX_RX_SG_S */
368 mbuf01 = vzip2q_u64(cq0_w8, cq1_w8);
369 mbuf23 = vzip2q_u64(cq2_w8, cq3_w8);
370 mbuf01 = vqsubq_u64(mbuf01, data_off);
371 mbuf23 = vqsubq_u64(mbuf23, data_off);
373 /* Move mbufs to scalar registers for future use */
374 mbuf0 = (struct rte_mbuf *)vgetq_lane_u64(mbuf01, 0);
375 mbuf1 = (struct rte_mbuf *)vgetq_lane_u64(mbuf01, 1);
376 mbuf2 = (struct rte_mbuf *)vgetq_lane_u64(mbuf23, 0);
377 mbuf3 = (struct rte_mbuf *)vgetq_lane_u64(mbuf23, 1);
379 /* Mask to get packet len from NIX_RX_SG_S */
380 const uint8x16_t shuf_msk = {
381 0xFF, 0xFF, /* pkt_type set as unknown */
382 0xFF, 0xFF, /* pkt_type set as unknown */
383 0, 1, /* octet 1~0, low 16 bits pkt_len */
384 0xFF, 0xFF, /* skip high 16 bits pkt_len, zero out */
385 0, 1, /* octet 1~0, 16 bits data_len */
386 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF};
388 /* Form the rx_descriptor_fields1 with pkt_len and data_len */
389 f0 = vqtbl1q_u8(cq0_w8, shuf_msk);
390 f1 = vqtbl1q_u8(cq1_w8, shuf_msk);
391 f2 = vqtbl1q_u8(cq2_w8, shuf_msk);
392 f3 = vqtbl1q_u8(cq3_w8, shuf_msk);
394 /* Load CQE word0 and word 1 */
395 uint64_t cq0_w0 = ((uint64_t *)(cq0 + CQE_SZ(0)))[0];
396 uint64_t cq0_w1 = ((uint64_t *)(cq0 + CQE_SZ(0)))[1];
397 uint64_t cq1_w0 = ((uint64_t *)(cq0 + CQE_SZ(1)))[0];
398 uint64_t cq1_w1 = ((uint64_t *)(cq0 + CQE_SZ(1)))[1];
399 uint64_t cq2_w0 = ((uint64_t *)(cq0 + CQE_SZ(2)))[0];
400 uint64_t cq2_w1 = ((uint64_t *)(cq0 + CQE_SZ(2)))[1];
401 uint64_t cq3_w0 = ((uint64_t *)(cq0 + CQE_SZ(3)))[0];
402 uint64_t cq3_w1 = ((uint64_t *)(cq0 + CQE_SZ(3)))[1];
404 if (flags & NIX_RX_OFFLOAD_RSS_F) {
405 /* Fill rss in the rx_descriptor_fields1 */
406 f0 = vsetq_lane_u32(cq0_w0, f0, 3);
407 f1 = vsetq_lane_u32(cq1_w0, f1, 3);
408 f2 = vsetq_lane_u32(cq2_w0, f2, 3);
409 f3 = vsetq_lane_u32(cq3_w0, f3, 3);
410 ol_flags0 = PKT_RX_RSS_HASH;
411 ol_flags1 = PKT_RX_RSS_HASH;
412 ol_flags2 = PKT_RX_RSS_HASH;
413 ol_flags3 = PKT_RX_RSS_HASH;
421 if (flags & NIX_RX_OFFLOAD_PTYPE_F) {
422 /* Fill packet_type in the rx_descriptor_fields1 */
423 f0 = vsetq_lane_u32(nix_ptype_get(lookup_mem, cq0_w1),
425 f1 = vsetq_lane_u32(nix_ptype_get(lookup_mem, cq1_w1),
427 f2 = vsetq_lane_u32(nix_ptype_get(lookup_mem, cq2_w1),
429 f3 = vsetq_lane_u32(nix_ptype_get(lookup_mem, cq3_w1),
433 if (flags & NIX_RX_OFFLOAD_CHECKSUM_F) {
434 ol_flags0 |= nix_rx_olflags_get(lookup_mem, cq0_w1);
435 ol_flags1 |= nix_rx_olflags_get(lookup_mem, cq1_w1);
436 ol_flags2 |= nix_rx_olflags_get(lookup_mem, cq2_w1);
437 ol_flags3 |= nix_rx_olflags_get(lookup_mem, cq3_w1);
440 if (flags & NIX_RX_OFFLOAD_VLAN_STRIP_F) {
441 uint64_t cq0_w2 = *(uint64_t *)(cq0 + CQE_SZ(0) + 16);
442 uint64_t cq1_w2 = *(uint64_t *)(cq0 + CQE_SZ(1) + 16);
443 uint64_t cq2_w2 = *(uint64_t *)(cq0 + CQE_SZ(2) + 16);
444 uint64_t cq3_w2 = *(uint64_t *)(cq0 + CQE_SZ(3) + 16);
446 ol_flags0 = nix_vlan_update(cq0_w2, ol_flags0, &f0);
447 ol_flags1 = nix_vlan_update(cq1_w2, ol_flags1, &f1);
448 ol_flags2 = nix_vlan_update(cq2_w2, ol_flags2, &f2);
449 ol_flags3 = nix_vlan_update(cq3_w2, ol_flags3, &f3);
451 ol_flags0 = nix_qinq_update(cq0_w2, ol_flags0, mbuf0);
452 ol_flags1 = nix_qinq_update(cq1_w2, ol_flags1, mbuf1);
453 ol_flags2 = nix_qinq_update(cq2_w2, ol_flags2, mbuf2);
454 ol_flags3 = nix_qinq_update(cq3_w2, ol_flags3, mbuf3);
457 if (flags & NIX_RX_OFFLOAD_MARK_UPDATE_F) {
458 ol_flags0 = nix_update_match_id(
459 *(uint16_t *)(cq0 + CQE_SZ(0) + 38), ol_flags0,
461 ol_flags1 = nix_update_match_id(
462 *(uint16_t *)(cq0 + CQE_SZ(1) + 38), ol_flags1,
464 ol_flags2 = nix_update_match_id(
465 *(uint16_t *)(cq0 + CQE_SZ(2) + 38), ol_flags2,
467 ol_flags3 = nix_update_match_id(
468 *(uint16_t *)(cq0 + CQE_SZ(3) + 38), ol_flags3,
472 /* Form rearm_data with ol_flags */
473 rearm0 = vsetq_lane_u64(ol_flags0, rearm0, 1);
474 rearm1 = vsetq_lane_u64(ol_flags1, rearm1, 1);
475 rearm2 = vsetq_lane_u64(ol_flags2, rearm2, 1);
476 rearm3 = vsetq_lane_u64(ol_flags3, rearm3, 1);
478 /* Update rx_descriptor_fields1 */
479 vst1q_u64((uint64_t *)mbuf0->rx_descriptor_fields1, f0);
480 vst1q_u64((uint64_t *)mbuf1->rx_descriptor_fields1, f1);
481 vst1q_u64((uint64_t *)mbuf2->rx_descriptor_fields1, f2);
482 vst1q_u64((uint64_t *)mbuf3->rx_descriptor_fields1, f3);
484 /* Update rearm_data */
485 vst1q_u64((uint64_t *)mbuf0->rearm_data, rearm0);
486 vst1q_u64((uint64_t *)mbuf1->rearm_data, rearm1);
487 vst1q_u64((uint64_t *)mbuf2->rearm_data, rearm2);
488 vst1q_u64((uint64_t *)mbuf3->rearm_data, rearm3);
490 /* Store the mbufs to rx_pkts */
491 vst1q_u64((uint64_t *)&rx_pkts[packets], mbuf01);
492 vst1q_u64((uint64_t *)&rx_pkts[packets + 2], mbuf23);
494 if (flags & NIX_RX_MULTI_SEG_F) {
495 /* Multi segment is enable build mseg list for
496 * individual mbufs in scalar mode.
498 nix_cqe_xtract_mseg((union nix_rx_parse_u *)
499 (cq0 + CQE_SZ(0) + 8), mbuf0,
501 nix_cqe_xtract_mseg((union nix_rx_parse_u *)
502 (cq0 + CQE_SZ(1) + 8), mbuf1,
504 nix_cqe_xtract_mseg((union nix_rx_parse_u *)
505 (cq0 + CQE_SZ(2) + 8), mbuf2,
507 nix_cqe_xtract_mseg((union nix_rx_parse_u *)
508 (cq0 + CQE_SZ(3) + 8), mbuf3,
511 /* Update that no more segments */
519 roc_prefetch_store_keep(mbuf0);
520 roc_prefetch_store_keep(mbuf1);
521 roc_prefetch_store_keep(mbuf2);
522 roc_prefetch_store_keep(mbuf3);
524 /* Mark mempool obj as "get" as it is alloc'ed by NIX */
525 __mempool_check_cookies(mbuf0->pool, (void **)&mbuf0, 1, 1);
526 __mempool_check_cookies(mbuf1->pool, (void **)&mbuf1, 1, 1);
527 __mempool_check_cookies(mbuf2->pool, (void **)&mbuf2, 1, 1);
528 __mempool_check_cookies(mbuf3->pool, (void **)&mbuf3, 1, 1);
530 /* Advance head pointer and packets */
531 head += NIX_DESCS_PER_LOOP;
533 packets += NIX_DESCS_PER_LOOP;
537 rxq->available -= packets;
540 /* Free all the CQs that we've processed */
541 plt_write64((rxq->wdata | packets), rxq->cq_door);
543 if (unlikely(pkts_left))
544 packets += cn10k_nix_recv_pkts(rx_queue, &rx_pkts[packets],
552 static inline uint16_t
553 cn10k_nix_recv_pkts_vector(void *rx_queue, struct rte_mbuf **rx_pkts,
554 uint16_t pkts, const uint16_t flags)
556 RTE_SET_USED(rx_queue);
557 RTE_SET_USED(rx_pkts);
567 #define RSS_F NIX_RX_OFFLOAD_RSS_F
568 #define PTYPE_F NIX_RX_OFFLOAD_PTYPE_F
569 #define CKSUM_F NIX_RX_OFFLOAD_CHECKSUM_F
570 #define MARK_F NIX_RX_OFFLOAD_MARK_UPDATE_F
571 #define TS_F NIX_RX_OFFLOAD_TSTAMP_F
572 #define RX_VLAN_F NIX_RX_OFFLOAD_VLAN_STRIP_F
574 /* [RX_VLAN_F] [TS] [MARK] [CKSUM] [PTYPE] [RSS] */
575 #define NIX_RX_FASTPATH_MODES \
576 R(no_offload, 0, 0, 0, 0, 0, 0, NIX_RX_OFFLOAD_NONE) \
577 R(rss, 0, 0, 0, 0, 0, 1, RSS_F) \
578 R(ptype, 0, 0, 0, 0, 1, 0, PTYPE_F) \
579 R(ptype_rss, 0, 0, 0, 0, 1, 1, PTYPE_F | RSS_F) \
580 R(cksum, 0, 0, 0, 1, 0, 0, CKSUM_F) \
581 R(cksum_rss, 0, 0, 0, 1, 0, 1, CKSUM_F | RSS_F) \
582 R(cksum_ptype, 0, 0, 0, 1, 1, 0, CKSUM_F | PTYPE_F) \
583 R(cksum_ptype_rss, 0, 0, 0, 1, 1, 1, CKSUM_F | PTYPE_F | RSS_F) \
584 R(mark, 0, 0, 1, 0, 0, 0, MARK_F) \
585 R(mark_rss, 0, 0, 1, 0, 0, 1, MARK_F | RSS_F) \
586 R(mark_ptype, 0, 0, 1, 0, 1, 0, MARK_F | PTYPE_F) \
587 R(mark_ptype_rss, 0, 0, 1, 0, 1, 1, MARK_F | PTYPE_F | RSS_F) \
588 R(mark_cksum, 0, 0, 1, 1, 0, 0, MARK_F | CKSUM_F) \
589 R(mark_cksum_rss, 0, 0, 1, 1, 0, 1, MARK_F | CKSUM_F | RSS_F) \
590 R(mark_cksum_ptype, 0, 0, 1, 1, 1, 0, MARK_F | CKSUM_F | PTYPE_F) \
591 R(mark_cksum_ptype_rss, 0, 0, 1, 1, 1, 1, \
592 MARK_F | CKSUM_F | PTYPE_F | RSS_F) \
593 R(ts, 0, 1, 0, 0, 0, 0, TS_F) \
594 R(ts_rss, 0, 1, 0, 0, 0, 1, TS_F | RSS_F) \
595 R(ts_ptype, 0, 1, 0, 0, 1, 0, TS_F | PTYPE_F) \
596 R(ts_ptype_rss, 0, 1, 0, 0, 1, 1, TS_F | PTYPE_F | RSS_F) \
597 R(ts_cksum, 0, 1, 0, 1, 0, 0, TS_F | CKSUM_F) \
598 R(ts_cksum_rss, 0, 1, 0, 1, 0, 1, TS_F | CKSUM_F | RSS_F) \
599 R(ts_cksum_ptype, 0, 1, 0, 1, 1, 0, TS_F | CKSUM_F | PTYPE_F) \
600 R(ts_cksum_ptype_rss, 0, 1, 0, 1, 1, 1, \
601 TS_F | CKSUM_F | PTYPE_F | RSS_F) \
602 R(ts_mark, 0, 1, 1, 0, 0, 0, TS_F | MARK_F) \
603 R(ts_mark_rss, 0, 1, 1, 0, 0, 1, TS_F | MARK_F | RSS_F) \
604 R(ts_mark_ptype, 0, 1, 1, 0, 1, 0, TS_F | MARK_F | PTYPE_F) \
605 R(ts_mark_ptype_rss, 0, 1, 1, 0, 1, 1, \
606 TS_F | MARK_F | PTYPE_F | RSS_F) \
607 R(ts_mark_cksum, 0, 1, 1, 1, 0, 0, TS_F | MARK_F | CKSUM_F) \
608 R(ts_mark_cksum_rss, 0, 1, 1, 1, 0, 1, \
609 TS_F | MARK_F | CKSUM_F | RSS_F) \
610 R(ts_mark_cksum_ptype, 0, 1, 1, 1, 1, 0, \
611 TS_F | MARK_F | CKSUM_F | PTYPE_F) \
612 R(ts_mark_cksum_ptype_rss, 0, 1, 1, 1, 1, 1, \
613 TS_F | MARK_F | CKSUM_F | PTYPE_F | RSS_F) \
614 R(vlan, 1, 0, 0, 0, 0, 0, RX_VLAN_F) \
615 R(vlan_rss, 1, 0, 0, 0, 0, 1, RX_VLAN_F | RSS_F) \
616 R(vlan_ptype, 1, 0, 0, 0, 1, 0, RX_VLAN_F | PTYPE_F) \
617 R(vlan_ptype_rss, 1, 0, 0, 0, 1, 1, RX_VLAN_F | PTYPE_F | RSS_F) \
618 R(vlan_cksum, 1, 0, 0, 1, 0, 0, RX_VLAN_F | CKSUM_F) \
619 R(vlan_cksum_rss, 1, 0, 0, 1, 0, 1, RX_VLAN_F | CKSUM_F | RSS_F) \
620 R(vlan_cksum_ptype, 1, 0, 0, 1, 1, 0, \
621 RX_VLAN_F | CKSUM_F | PTYPE_F) \
622 R(vlan_cksum_ptype_rss, 1, 0, 0, 1, 1, 1, \
623 RX_VLAN_F | CKSUM_F | PTYPE_F | RSS_F) \
624 R(vlan_mark, 1, 0, 1, 0, 0, 0, RX_VLAN_F | MARK_F) \
625 R(vlan_mark_rss, 1, 0, 1, 0, 0, 1, RX_VLAN_F | MARK_F | RSS_F) \
626 R(vlan_mark_ptype, 1, 0, 1, 0, 1, 0, RX_VLAN_F | MARK_F | PTYPE_F)\
627 R(vlan_mark_ptype_rss, 1, 0, 1, 0, 1, 1, \
628 RX_VLAN_F | MARK_F | PTYPE_F | RSS_F) \
629 R(vlan_mark_cksum, 1, 0, 1, 1, 0, 0, RX_VLAN_F | MARK_F | CKSUM_F)\
630 R(vlan_mark_cksum_rss, 1, 0, 1, 1, 0, 1, \
631 RX_VLAN_F | MARK_F | CKSUM_F | RSS_F) \
632 R(vlan_mark_cksum_ptype, 1, 0, 1, 1, 1, 0, \
633 RX_VLAN_F | MARK_F | CKSUM_F | PTYPE_F) \
634 R(vlan_mark_cksum_ptype_rss, 1, 0, 1, 1, 1, 1, \
635 RX_VLAN_F | MARK_F | CKSUM_F | PTYPE_F | RSS_F) \
636 R(vlan_ts, 1, 1, 0, 0, 0, 0, RX_VLAN_F | TS_F) \
637 R(vlan_ts_rss, 1, 1, 0, 0, 0, 1, RX_VLAN_F | TS_F | RSS_F) \
638 R(vlan_ts_ptype, 1, 1, 0, 0, 1, 0, RX_VLAN_F | TS_F | PTYPE_F) \
639 R(vlan_ts_ptype_rss, 1, 1, 0, 0, 1, 1, \
640 RX_VLAN_F | TS_F | PTYPE_F | RSS_F) \
641 R(vlan_ts_cksum, 1, 1, 0, 1, 0, 0, RX_VLAN_F | TS_F | CKSUM_F) \
642 R(vlan_ts_cksum_rss, 1, 1, 0, 1, 0, 1, \
643 RX_VLAN_F | TS_F | CKSUM_F | RSS_F) \
644 R(vlan_ts_cksum_ptype, 1, 1, 0, 1, 1, 0, \
645 RX_VLAN_F | TS_F | CKSUM_F | PTYPE_F) \
646 R(vlan_ts_cksum_ptype_rss, 1, 1, 0, 1, 1, 1, \
647 RX_VLAN_F | TS_F | CKSUM_F | PTYPE_F | RSS_F) \
648 R(vlan_ts_mark, 1, 1, 1, 0, 0, 0, RX_VLAN_F | TS_F | MARK_F) \
649 R(vlan_ts_mark_rss, 1, 1, 1, 0, 0, 1, \
650 RX_VLAN_F | TS_F | MARK_F | RSS_F) \
651 R(vlan_ts_mark_ptype, 1, 1, 1, 0, 1, 0, \
652 RX_VLAN_F | TS_F | MARK_F | PTYPE_F) \
653 R(vlan_ts_mark_ptype_rss, 1, 1, 1, 0, 1, 1, \
654 RX_VLAN_F | TS_F | MARK_F | PTYPE_F | RSS_F) \
655 R(vlan_ts_mark_cksum, 1, 1, 1, 1, 0, 0, \
656 RX_VLAN_F | TS_F | MARK_F | CKSUM_F) \
657 R(vlan_ts_mark_cksum_rss, 1, 1, 1, 1, 0, 1, \
658 RX_VLAN_F | TS_F | MARK_F | CKSUM_F | RSS_F) \
659 R(vlan_ts_mark_cksum_ptype, 1, 1, 1, 1, 1, 0, \
660 RX_VLAN_F | TS_F | MARK_F | CKSUM_F | PTYPE_F) \
661 R(vlan_ts_mark_cksum_ptype_rss, 1, 1, 1, 1, 1, 1, \
662 RX_VLAN_F | TS_F | MARK_F | CKSUM_F | PTYPE_F | RSS_F)
664 #define R(name, f5, f4, f3, f2, f1, f0, flags) \
665 uint16_t __rte_noinline __rte_hot cn10k_nix_recv_pkts_##name( \
666 void *rx_queue, struct rte_mbuf **rx_pkts, uint16_t pkts); \
668 uint16_t __rte_noinline __rte_hot cn10k_nix_recv_pkts_mseg_##name( \
669 void *rx_queue, struct rte_mbuf **rx_pkts, uint16_t pkts); \
671 uint16_t __rte_noinline __rte_hot cn10k_nix_recv_pkts_vec_##name( \
672 void *rx_queue, struct rte_mbuf **rx_pkts, uint16_t pkts); \
674 uint16_t __rte_noinline __rte_hot cn10k_nix_recv_pkts_vec_mseg_##name( \
675 void *rx_queue, struct rte_mbuf **rx_pkts, uint16_t pkts);
677 NIX_RX_FASTPATH_MODES
680 #endif /* __CN10K_RX_H__ */