drivers/net/cnxk/cnxk_ethdev_devargs.c

   1 /* SPDX-License-Identifier: BSD-3-Clause
   2  * Copyright(C) 2021 Marvell.
   3  */
   4
   5 #include <inttypes.h>
   6 #include <math.h>
   7
   8 #include "cnxk_ethdev.h"
   9
  10 static int
  11 parse_flow_max_priority(const char *key, const char *value, void *extra_args)
  12 {
  13         RTE_SET_USED(key);
  14         uint16_t val;
  15
  16         val = atoi(value);
  17
  18         /* Limit the max priority to 32 */
  19         if (val < 1 || val > 32)
  20                 return -EINVAL;
  21
  22         *(uint16_t *)extra_args = val;
  23
  24         return 0;
  25 }
  26
  27 static int
  28 parse_flow_prealloc_size(const char *key, const char *value, void *extra_args)
  29 {
  30         RTE_SET_USED(key);
  31         uint16_t val;
  32
  33         val = atoi(value);
  34
  35         /* Limit the prealloc size to 32 */
  36         if (val < 1 || val > 32)
  37                 return -EINVAL;
  38
  39         *(uint16_t *)extra_args = val;
  40
  41         return 0;
  42 }
  43
  44 static int
  45 parse_reta_size(const char *key, const char *value, void *extra_args)
  46 {
  47         RTE_SET_USED(key);
  48         uint32_t val;
  49
  50         val = atoi(value);
  51
  52         if (val <= ETH_RSS_RETA_SIZE_64)
  53                 val = ROC_NIX_RSS_RETA_SZ_64;
  54         else if (val > ETH_RSS_RETA_SIZE_64 && val <= ETH_RSS_RETA_SIZE_128)
  55                 val = ROC_NIX_RSS_RETA_SZ_128;
  56         else if (val > ETH_RSS_RETA_SIZE_128 && val <= ETH_RSS_RETA_SIZE_256)
  57                 val = ROC_NIX_RSS_RETA_SZ_256;
  58         else
  59                 val = ROC_NIX_RSS_RETA_SZ_64;
  60
  61         *(uint16_t *)extra_args = val;
  62
  63         return 0;
  64 }
  65
  66 static int
  67 parse_flag(const char *key, const char *value, void *extra_args)
  68 {
  69         RTE_SET_USED(key);
  70
  71         *(uint16_t *)extra_args = atoi(value);
  72
  73         return 0;
  74 }
  75
  76 static int
  77 parse_sqb_count(const char *key, const char *value, void *extra_args)
  78 {
  79         RTE_SET_USED(key);
  80         uint32_t val;
  81
  82         val = atoi(value);
  83
  84         *(uint16_t *)extra_args = val;
  85
  86         return 0;
  87 }
  88
  89 static int
  90 parse_switch_header_type(const char *key, const char *value, void *extra_args)
  91 {
  92         RTE_SET_USED(key);
  93
  94         if (strcmp(value, "higig2") == 0)
  95                 *(uint16_t *)extra_args = ROC_PRIV_FLAGS_HIGIG;
  96
  97         if (strcmp(value, "dsa") == 0)
  98                 *(uint16_t *)extra_args = ROC_PRIV_FLAGS_EDSA;
  99
 100         if (strcmp(value, "chlen90b") == 0)
 101                 *(uint16_t *)extra_args = ROC_PRIV_FLAGS_LEN_90B;
 102         return 0;
 103 }
 104
 105 #define CNXK_RSS_RETA_SIZE      "reta_size"
 106 #define CNXK_SCL_ENABLE         "scalar_enable"
 107 #define CNXK_MAX_SQB_COUNT      "max_sqb_count"
 108 #define CNXK_FLOW_PREALLOC_SIZE "flow_prealloc_size"
 109 #define CNXK_FLOW_MAX_PRIORITY  "flow_max_priority"
 110 #define CNXK_SWITCH_HEADER_TYPE "switch_header"
 111 #define CNXK_RSS_TAG_AS_XOR     "tag_as_xor"
 112 #define CNXK_LOCK_RX_CTX        "lock_rx_ctx"
 113
 114 int
 115 cnxk_ethdev_parse_devargs(struct rte_devargs *devargs, struct cnxk_eth_dev *dev)
 116 {
 117         uint16_t reta_sz = ROC_NIX_RSS_RETA_SZ_64;
 118         uint16_t sqb_count = CNXK_NIX_TX_MAX_SQB;
 119         uint16_t flow_prealloc_size = 8;
 120         uint16_t switch_header_type = 0;
 121         uint16_t flow_max_priority = 3;
 122         uint16_t rss_tag_as_xor = 0;
 123         uint16_t scalar_enable = 0;
 124         uint8_t lock_rx_ctx = 0;
 125         struct rte_kvargs *kvlist;
 126
 127         if (devargs == NULL)
 128                 goto null_devargs;
 129
 130         kvlist = rte_kvargs_parse(devargs->args, NULL);
 131         if (kvlist == NULL)
 132                 goto exit;
 133
 134         rte_kvargs_process(kvlist, CNXK_RSS_RETA_SIZE, &parse_reta_size,
 135                            &reta_sz);
 136         rte_kvargs_process(kvlist, CNXK_SCL_ENABLE, &parse_flag,
 137                            &scalar_enable);
 138         rte_kvargs_process(kvlist, CNXK_MAX_SQB_COUNT, &parse_sqb_count,
 139                            &sqb_count);
 140         rte_kvargs_process(kvlist, CNXK_FLOW_PREALLOC_SIZE,
 141                            &parse_flow_prealloc_size, &flow_prealloc_size);
 142         rte_kvargs_process(kvlist, CNXK_FLOW_MAX_PRIORITY,
 143                            &parse_flow_max_priority, &flow_max_priority);
 144         rte_kvargs_process(kvlist, CNXK_SWITCH_HEADER_TYPE,
 145                            &parse_switch_header_type, &switch_header_type);
 146         rte_kvargs_process(kvlist, CNXK_RSS_TAG_AS_XOR, &parse_flag,
 147                            &rss_tag_as_xor);
 148         rte_kvargs_process(kvlist, CNXK_LOCK_RX_CTX, &parse_flag, &lock_rx_ctx);
 149         rte_kvargs_free(kvlist);
 150
 151 null_devargs:
 152         dev->scalar_ena = !!scalar_enable;
 153         dev->nix.rss_tag_as_xor = !!rss_tag_as_xor;
 154         dev->nix.max_sqb_count = sqb_count;
 155         dev->nix.reta_sz = reta_sz;
 156         dev->nix.lock_rx_ctx = lock_rx_ctx;
 157         dev->npc.flow_prealloc_size = flow_prealloc_size;
 158         dev->npc.flow_max_priority = flow_max_priority;
 159         dev->npc.switch_header_type = switch_header_type;
 160         return 0;
 161
 162 exit:
 163         return -EINVAL;
 164 }
 165
 166 RTE_PMD_REGISTER_PARAM_STRING(net_cnxk,
 167                               CNXK_RSS_RETA_SIZE "=<64|128|256>"
 168                               CNXK_SCL_ENABLE "=1"
 169                               CNXK_MAX_SQB_COUNT "=<8-512>"
 170                               CNXK_FLOW_PREALLOC_SIZE "=<1-32>"
 171                               CNXK_FLOW_MAX_PRIORITY "=<1-32>"
 172                               CNXK_SWITCH_HEADER_TYPE "=<higig2|dsa|chlen90b>"
 173                               CNXK_RSS_TAG_AS_XOR "=1");