1 /* SPDX-License-Identifier: BSD-3-Clause
2 * Copyright(c) 2014-2018 Chelsio Communications.
10 NCHAN = 4, /* # of HW channels */
11 EEPROMSIZE = 17408, /* Serial EEPROM physical size */
12 EEPROMVSIZE = 32768, /* Serial EEPROM virtual address space size */
13 EEPROMPFSIZE = 1024, /* EEPROM writable area size for PFn, n>0 */
14 NMTUS = 16, /* size of MTU table */
15 NCCTRL_WIN = 32, /* # of congestion control windows */
16 MBOX_LEN = 64, /* mailbox size in bytes */
17 UDBS_SEG_SIZE = 128, /* segment size for BAR2 user doorbells */
21 CIMLA_SIZE = 2048, /* # of 32-bit words in CIM LA */
25 SF_SEC_SIZE = 64 * 1024, /* serial flash sector size */
29 SGE_NTIMERS = 6, /* # of interrupt holdoff timer values */
30 SGE_NCOUNTERS = 4, /* # of interrupt packet counter values */
33 /* PCI-e memory window access */
39 SGE_MAX_WR_LEN = 512, /* max WR size in bytes */
40 SGE_EQ_IDXSIZE = 64, /* egress queue pidx/cidx unit size */
41 /* max no. of desc allowed in WR */
42 SGE_MAX_WR_NDESC = SGE_MAX_WR_LEN / SGE_EQ_IDXSIZE,
46 TCB_SIZE = 128, /* TCB size */
49 struct sge_qstat { /* data written to SGE queue status entries */
56 * Structure for last 128 bits of response descriptors
59 __be32 hdrbuflen_pidx;
67 #define S_RSPD_NEWBUF 31
68 #define V_RSPD_NEWBUF(x) ((x) << S_RSPD_NEWBUF)
69 #define F_RSPD_NEWBUF V_RSPD_NEWBUF(1U)
72 #define M_RSPD_LEN 0x7fffffff
73 #define V_RSPD_LEN(x) ((x) << S_RSPD_LEN)
74 #define G_RSPD_LEN(x) (((x) >> S_RSPD_LEN) & M_RSPD_LEN)
77 #define V_RSPD_GEN(x) ((x) << S_RSPD_GEN)
78 #define F_RSPD_GEN V_RSPD_GEN(1U)
81 #define M_RSPD_TYPE 0x3
82 #define V_RSPD_TYPE(x) ((x) << S_RSPD_TYPE)
83 #define G_RSPD_TYPE(x) (((x) >> S_RSPD_TYPE) & M_RSPD_TYPE)
85 /* Rx queue interrupt deferral field: timer index */
86 #define S_QINTR_CNT_EN 0
87 #define V_QINTR_CNT_EN(x) ((x) << S_QINTR_CNT_EN)
88 #define F_QINTR_CNT_EN V_QINTR_CNT_EN(1U)
90 #define S_QINTR_TIMER_IDX 1
91 #define M_QINTR_TIMER_IDX 0x7
92 #define V_QINTR_TIMER_IDX(x) ((x) << S_QINTR_TIMER_IDX)
93 #define G_QINTR_TIMER_IDX(x) (((x) >> S_QINTR_TIMER_IDX) & M_QINTR_TIMER_IDX)
98 #define FLASH_START(start) ((start) * SF_SEC_SIZE)
99 #define FLASH_MAX_SIZE(nsecs) ((nsecs) * SF_SEC_SIZE)
103 * Various Expansion-ROM boot images, etc.
105 FLASH_EXP_ROM_START_SEC = 0,
106 FLASH_EXP_ROM_NSECS = 6,
107 FLASH_EXP_ROM_START = FLASH_START(FLASH_EXP_ROM_START_SEC),
108 FLASH_EXP_ROM_MAX_SIZE = FLASH_MAX_SIZE(FLASH_EXP_ROM_NSECS),
111 * Location of firmware image in FLASH.
113 FLASH_FW_START_SEC = 8,
115 FLASH_FW_START = FLASH_START(FLASH_FW_START_SEC),
116 FLASH_FW_MAX_SIZE = FLASH_MAX_SIZE(FLASH_FW_NSECS),
119 * Location of bootstrap firmware image in FLASH.
121 FLASH_FWBOOTSTRAP_START_SEC = 27,
122 FLASH_FWBOOTSTRAP_NSECS = 1,
123 FLASH_FWBOOTSTRAP_START = FLASH_START(FLASH_FWBOOTSTRAP_START_SEC),
124 FLASH_FWBOOTSTRAP_MAX_SIZE = FLASH_MAX_SIZE(FLASH_FWBOOTSTRAP_NSECS),
127 * Location of Firmware Configuration File in FLASH.
129 FLASH_CFG_START_SEC = 31,
131 FLASH_CFG_START = FLASH_START(FLASH_CFG_START_SEC),
132 FLASH_CFG_MAX_SIZE = FLASH_MAX_SIZE(FLASH_CFG_NSECS),
135 * We don't support FLASH devices which can't support the full
136 * standard set of sections which we need for normal operations.
138 FLASH_MIN_SIZE = FLASH_CFG_START + FLASH_CFG_MAX_SIZE,
142 #undef FLASH_MAX_SIZE
144 #endif /* __T4_HW_H */