drivers: copy PCI device info to ethdev data
[dpdk.git] / drivers / net / cxgbe / cxgbe_ethdev.c
1 /*-
2  *   BSD LICENSE
3  *
4  *   Copyright(c) 2014-2015 Chelsio Communications.
5  *   All rights reserved.
6  *
7  *   Redistribution and use in source and binary forms, with or without
8  *   modification, are permitted provided that the following conditions
9  *   are met:
10  *
11  *     * Redistributions of source code must retain the above copyright
12  *       notice, this list of conditions and the following disclaimer.
13  *     * Redistributions in binary form must reproduce the above copyright
14  *       notice, this list of conditions and the following disclaimer in
15  *       the documentation and/or other materials provided with the
16  *       distribution.
17  *     * Neither the name of Chelsio Communications nor the names of its
18  *       contributors may be used to endorse or promote products derived
19  *       from this software without specific prior written permission.
20  *
21  *   THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
22  *   "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
23  *   LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
24  *   A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
25  *   OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
26  *   SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
27  *   LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
28  *   DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
29  *   THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
30  *   (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
31  *   OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
32  */
33
34 #include <sys/queue.h>
35 #include <stdio.h>
36 #include <errno.h>
37 #include <stdint.h>
38 #include <string.h>
39 #include <unistd.h>
40 #include <stdarg.h>
41 #include <inttypes.h>
42 #include <netinet/in.h>
43
44 #include <rte_byteorder.h>
45 #include <rte_common.h>
46 #include <rte_cycles.h>
47 #include <rte_interrupts.h>
48 #include <rte_log.h>
49 #include <rte_debug.h>
50 #include <rte_pci.h>
51 #include <rte_atomic.h>
52 #include <rte_branch_prediction.h>
53 #include <rte_memory.h>
54 #include <rte_memzone.h>
55 #include <rte_tailq.h>
56 #include <rte_eal.h>
57 #include <rte_alarm.h>
58 #include <rte_ether.h>
59 #include <rte_ethdev.h>
60 #include <rte_atomic.h>
61 #include <rte_malloc.h>
62 #include <rte_random.h>
63 #include <rte_dev.h>
64
65 #include "cxgbe.h"
66
67 /*
68  * Macros needed to support the PCI Device ID Table ...
69  */
70 #define CH_PCI_DEVICE_ID_TABLE_DEFINE_BEGIN \
71         static struct rte_pci_id cxgb4_pci_tbl[] = {
72 #define CH_PCI_DEVICE_ID_FUNCTION 0x4
73
74 #define PCI_VENDOR_ID_CHELSIO 0x1425
75
76 #define CH_PCI_ID_TABLE_ENTRY(devid) \
77                 { RTE_PCI_DEVICE(PCI_VENDOR_ID_CHELSIO, (devid)) }
78
79 #define CH_PCI_DEVICE_ID_TABLE_DEFINE_END \
80                 { .vendor_id = 0, } \
81         }
82
83 /*
84  *... and the PCI ID Table itself ...
85  */
86 #include "t4_pci_id_tbl.h"
87
88 static uint16_t cxgbe_xmit_pkts(void *tx_queue, struct rte_mbuf **tx_pkts,
89                                 uint16_t nb_pkts)
90 {
91         struct sge_eth_txq *txq = (struct sge_eth_txq *)tx_queue;
92         uint16_t pkts_sent, pkts_remain;
93         uint16_t total_sent = 0;
94         int ret = 0;
95
96         CXGBE_DEBUG_TX(adapter, "%s: txq = %p; tx_pkts = %p; nb_pkts = %d\n",
97                        __func__, txq, tx_pkts, nb_pkts);
98
99         t4_os_lock(&txq->txq_lock);
100         /* free up desc from already completed tx */
101         reclaim_completed_tx(&txq->q);
102         while (total_sent < nb_pkts) {
103                 pkts_remain = nb_pkts - total_sent;
104
105                 for (pkts_sent = 0; pkts_sent < pkts_remain; pkts_sent++) {
106                         ret = t4_eth_xmit(txq, tx_pkts[total_sent + pkts_sent]);
107                         if (ret < 0)
108                                 break;
109                 }
110                 if (!pkts_sent)
111                         break;
112                 total_sent += pkts_sent;
113                 /* reclaim as much as possible */
114                 reclaim_completed_tx(&txq->q);
115         }
116
117         t4_os_unlock(&txq->txq_lock);
118         return total_sent;
119 }
120
121 static uint16_t cxgbe_recv_pkts(void *rx_queue, struct rte_mbuf **rx_pkts,
122                                 uint16_t nb_pkts)
123 {
124         struct sge_eth_rxq *rxq = (struct sge_eth_rxq *)rx_queue;
125         unsigned int work_done;
126
127         CXGBE_DEBUG_RX(adapter, "%s: rxq->rspq.cntxt_id = %u; nb_pkts = %d\n",
128                        __func__, rxq->rspq.cntxt_id, nb_pkts);
129
130         if (cxgbe_poll(&rxq->rspq, rx_pkts, (unsigned int)nb_pkts, &work_done))
131                 dev_err(adapter, "error in cxgbe poll\n");
132
133         CXGBE_DEBUG_RX(adapter, "%s: work_done = %u\n", __func__, work_done);
134         return work_done;
135 }
136
137 static void cxgbe_dev_info_get(struct rte_eth_dev *eth_dev,
138                                struct rte_eth_dev_info *device_info)
139 {
140         struct port_info *pi = (struct port_info *)(eth_dev->data->dev_private);
141         struct adapter *adapter = pi->adapter;
142         int max_queues = adapter->sge.max_ethqsets / adapter->params.nports;
143
144         static const struct rte_eth_desc_lim cxgbe_desc_lim = {
145                 .nb_max = CXGBE_MAX_RING_DESC_SIZE,
146                 .nb_min = CXGBE_MIN_RING_DESC_SIZE,
147                 .nb_align = 1,
148         };
149
150         device_info->min_rx_bufsize = CXGBE_MIN_RX_BUFSIZE;
151         device_info->max_rx_pktlen = CXGBE_MAX_RX_PKTLEN;
152         device_info->max_rx_queues = max_queues;
153         device_info->max_tx_queues = max_queues;
154         device_info->max_mac_addrs = 1;
155         /* XXX: For now we support one MAC/port */
156         device_info->max_vfs = adapter->params.arch.vfcount;
157         device_info->max_vmdq_pools = 0; /* XXX: For now no support for VMDQ */
158
159         device_info->rx_offload_capa = DEV_RX_OFFLOAD_VLAN_STRIP |
160                                        DEV_RX_OFFLOAD_IPV4_CKSUM |
161                                        DEV_RX_OFFLOAD_UDP_CKSUM |
162                                        DEV_RX_OFFLOAD_TCP_CKSUM;
163
164         device_info->tx_offload_capa = DEV_TX_OFFLOAD_VLAN_INSERT |
165                                        DEV_TX_OFFLOAD_IPV4_CKSUM |
166                                        DEV_TX_OFFLOAD_UDP_CKSUM |
167                                        DEV_TX_OFFLOAD_TCP_CKSUM |
168                                        DEV_TX_OFFLOAD_TCP_TSO;
169
170         device_info->reta_size = pi->rss_size;
171
172         device_info->rx_desc_lim = cxgbe_desc_lim;
173         device_info->tx_desc_lim = cxgbe_desc_lim;
174 }
175
176 static void cxgbe_dev_promiscuous_enable(struct rte_eth_dev *eth_dev)
177 {
178         struct port_info *pi = (struct port_info *)(eth_dev->data->dev_private);
179         struct adapter *adapter = pi->adapter;
180
181         t4_set_rxmode(adapter, adapter->mbox, pi->viid, -1,
182                       1, -1, 1, -1, false);
183 }
184
185 static void cxgbe_dev_promiscuous_disable(struct rte_eth_dev *eth_dev)
186 {
187         struct port_info *pi = (struct port_info *)(eth_dev->data->dev_private);
188         struct adapter *adapter = pi->adapter;
189
190         t4_set_rxmode(adapter, adapter->mbox, pi->viid, -1,
191                       0, -1, 1, -1, false);
192 }
193
194 static void cxgbe_dev_allmulticast_enable(struct rte_eth_dev *eth_dev)
195 {
196         struct port_info *pi = (struct port_info *)(eth_dev->data->dev_private);
197         struct adapter *adapter = pi->adapter;
198
199         /* TODO: address filters ?? */
200
201         t4_set_rxmode(adapter, adapter->mbox, pi->viid, -1,
202                       -1, 1, 1, -1, false);
203 }
204
205 static void cxgbe_dev_allmulticast_disable(struct rte_eth_dev *eth_dev)
206 {
207         struct port_info *pi = (struct port_info *)(eth_dev->data->dev_private);
208         struct adapter *adapter = pi->adapter;
209
210         /* TODO: address filters ?? */
211
212         t4_set_rxmode(adapter, adapter->mbox, pi->viid, -1,
213                       -1, 0, 1, -1, false);
214 }
215
216 static int cxgbe_dev_link_update(struct rte_eth_dev *eth_dev,
217                                  __rte_unused int wait_to_complete)
218 {
219         struct port_info *pi = (struct port_info *)(eth_dev->data->dev_private);
220         struct adapter *adapter = pi->adapter;
221         struct sge *s = &adapter->sge;
222         struct rte_eth_link *old_link = &eth_dev->data->dev_link;
223         unsigned int work_done, budget = 4;
224
225         cxgbe_poll(&s->fw_evtq, NULL, budget, &work_done);
226         if (old_link->link_status == pi->link_cfg.link_ok)
227                 return -1;  /* link not changed */
228
229         eth_dev->data->dev_link.link_status = pi->link_cfg.link_ok;
230         eth_dev->data->dev_link.link_duplex = ETH_LINK_FULL_DUPLEX;
231         eth_dev->data->dev_link.link_speed = pi->link_cfg.speed;
232
233         /* link has changed */
234         return 0;
235 }
236
237 static int cxgbe_dev_mtu_set(struct rte_eth_dev *eth_dev, uint16_t mtu)
238 {
239         struct port_info *pi = (struct port_info *)(eth_dev->data->dev_private);
240         struct adapter *adapter = pi->adapter;
241         struct rte_eth_dev_info dev_info;
242         int err;
243         uint16_t new_mtu = mtu + ETHER_HDR_LEN + ETHER_CRC_LEN;
244
245         cxgbe_dev_info_get(eth_dev, &dev_info);
246
247         /* Must accommodate at least ETHER_MIN_MTU */
248         if ((new_mtu < ETHER_MIN_MTU) || (new_mtu > dev_info.max_rx_pktlen))
249                 return -EINVAL;
250
251         /* set to jumbo mode if needed */
252         if (new_mtu > ETHER_MAX_LEN)
253                 eth_dev->data->dev_conf.rxmode.jumbo_frame = 1;
254         else
255                 eth_dev->data->dev_conf.rxmode.jumbo_frame = 0;
256
257         err = t4_set_rxmode(adapter, adapter->mbox, pi->viid, new_mtu, -1, -1,
258                             -1, -1, true);
259         if (!err)
260                 eth_dev->data->dev_conf.rxmode.max_rx_pkt_len = new_mtu;
261
262         return err;
263 }
264
265 static int cxgbe_dev_tx_queue_start(struct rte_eth_dev *eth_dev,
266                                     uint16_t tx_queue_id);
267 static int cxgbe_dev_rx_queue_start(struct rte_eth_dev *eth_dev,
268                                     uint16_t tx_queue_id);
269 static void cxgbe_dev_tx_queue_release(void *q);
270 static void cxgbe_dev_rx_queue_release(void *q);
271
272 /*
273  * Stop device.
274  */
275 static void cxgbe_dev_close(struct rte_eth_dev *eth_dev)
276 {
277         struct port_info *pi = (struct port_info *)(eth_dev->data->dev_private);
278         struct adapter *adapter = pi->adapter;
279         int i, dev_down = 0;
280
281         CXGBE_FUNC_TRACE();
282
283         if (!(adapter->flags & FULL_INIT_DONE))
284                 return;
285
286         cxgbe_down(pi);
287
288         /*
289          *  We clear queues only if both tx and rx path of the port
290          *  have been disabled
291          */
292         t4_sge_eth_clear_queues(pi);
293
294         /*  See if all ports are down */
295         for_each_port(adapter, i) {
296                 pi = adap2pinfo(adapter, i);
297                 /*
298                  * Skip first port of the adapter since it will be closed
299                  * by DPDK
300                  */
301                 if (i == 0)
302                         continue;
303                 dev_down += (pi->eth_dev->data->dev_started == 0) ? 1 : 0;
304         }
305
306         /* If rest of the ports are stopped, then free up resources */
307         if (dev_down == (adapter->params.nports - 1))
308                 cxgbe_close(adapter);
309 }
310
311 /* Start the device.
312  * It returns 0 on success.
313  */
314 static int cxgbe_dev_start(struct rte_eth_dev *eth_dev)
315 {
316         struct port_info *pi = (struct port_info *)(eth_dev->data->dev_private);
317         struct adapter *adapter = pi->adapter;
318         int err = 0, i;
319
320         CXGBE_FUNC_TRACE();
321
322         /*
323          * If we don't have a connection to the firmware there's nothing we
324          * can do.
325          */
326         if (!(adapter->flags & FW_OK)) {
327                 err = -ENXIO;
328                 goto out;
329         }
330
331         if (!(adapter->flags & FULL_INIT_DONE)) {
332                 err = cxgbe_up(adapter);
333                 if (err < 0)
334                         goto out;
335         }
336
337         err = setup_rss(pi);
338         if (err)
339                 goto out;
340
341         for (i = 0; i < pi->n_tx_qsets; i++) {
342                 err = cxgbe_dev_tx_queue_start(eth_dev, i);
343                 if (err)
344                         goto out;
345         }
346
347         for (i = 0; i < pi->n_rx_qsets; i++) {
348                 err = cxgbe_dev_rx_queue_start(eth_dev, i);
349                 if (err)
350                         goto out;
351         }
352
353         err = link_start(pi);
354         if (err)
355                 goto out;
356
357 out:
358         return err;
359 }
360
361 /*
362  * Stop device: disable rx and tx functions to allow for reconfiguring.
363  */
364 static void cxgbe_dev_stop(struct rte_eth_dev *eth_dev)
365 {
366         struct port_info *pi = (struct port_info *)(eth_dev->data->dev_private);
367         struct adapter *adapter = pi->adapter;
368
369         CXGBE_FUNC_TRACE();
370
371         if (!(adapter->flags & FULL_INIT_DONE))
372                 return;
373
374         cxgbe_down(pi);
375
376         /*
377          *  We clear queues only if both tx and rx path of the port
378          *  have been disabled
379          */
380         t4_sge_eth_clear_queues(pi);
381 }
382
383 static int cxgbe_dev_configure(struct rte_eth_dev *eth_dev)
384 {
385         struct port_info *pi = (struct port_info *)(eth_dev->data->dev_private);
386         struct adapter *adapter = pi->adapter;
387         int err;
388
389         CXGBE_FUNC_TRACE();
390
391         if (!(adapter->flags & FW_QUEUE_BOUND)) {
392                 err = setup_sge_fwevtq(adapter);
393                 if (err)
394                         return err;
395                 adapter->flags |= FW_QUEUE_BOUND;
396         }
397
398         err = cfg_queue_count(eth_dev);
399         if (err)
400                 return err;
401
402         return 0;
403 }
404
405 static int cxgbe_dev_tx_queue_start(struct rte_eth_dev *eth_dev,
406                                     uint16_t tx_queue_id)
407 {
408         struct sge_eth_txq *txq = (struct sge_eth_txq *)
409                                   (eth_dev->data->tx_queues[tx_queue_id]);
410
411         dev_debug(NULL, "%s: tx_queue_id = %d\n", __func__, tx_queue_id);
412
413         return t4_sge_eth_txq_start(txq);
414 }
415
416 static int cxgbe_dev_tx_queue_stop(struct rte_eth_dev *eth_dev,
417                                    uint16_t tx_queue_id)
418 {
419         struct sge_eth_txq *txq = (struct sge_eth_txq *)
420                                   (eth_dev->data->tx_queues[tx_queue_id]);
421
422         dev_debug(NULL, "%s: tx_queue_id = %d\n", __func__, tx_queue_id);
423
424         return t4_sge_eth_txq_stop(txq);
425 }
426
427 static int cxgbe_dev_tx_queue_setup(struct rte_eth_dev *eth_dev,
428                                     uint16_t queue_idx, uint16_t nb_desc,
429                                     unsigned int socket_id,
430                                     const struct rte_eth_txconf *tx_conf)
431 {
432         struct port_info *pi = (struct port_info *)(eth_dev->data->dev_private);
433         struct adapter *adapter = pi->adapter;
434         struct sge *s = &adapter->sge;
435         struct sge_eth_txq *txq = &s->ethtxq[pi->first_qset + queue_idx];
436         int err = 0;
437         unsigned int temp_nb_desc;
438
439         RTE_SET_USED(tx_conf);
440
441         dev_debug(adapter, "%s: eth_dev->data->nb_tx_queues = %d; queue_idx = %d; nb_desc = %d; socket_id = %d; pi->first_qset = %u\n",
442                   __func__, eth_dev->data->nb_tx_queues, queue_idx, nb_desc,
443                   socket_id, pi->first_qset);
444
445         /*  Free up the existing queue  */
446         if (eth_dev->data->tx_queues[queue_idx]) {
447                 cxgbe_dev_tx_queue_release(eth_dev->data->tx_queues[queue_idx]);
448                 eth_dev->data->tx_queues[queue_idx] = NULL;
449         }
450
451         eth_dev->data->tx_queues[queue_idx] = (void *)txq;
452
453         /* Sanity Checking
454          *
455          * nb_desc should be > 1023 and <= CXGBE_MAX_RING_DESC_SIZE
456          */
457         temp_nb_desc = nb_desc;
458         if (nb_desc < CXGBE_MIN_RING_DESC_SIZE) {
459                 dev_warn(adapter, "%s: number of descriptors must be >= %d. Using default [%d]\n",
460                          __func__, CXGBE_MIN_RING_DESC_SIZE,
461                          CXGBE_DEFAULT_TX_DESC_SIZE);
462                 temp_nb_desc = CXGBE_DEFAULT_TX_DESC_SIZE;
463         } else if (nb_desc > CXGBE_MAX_RING_DESC_SIZE) {
464                 dev_err(adapter, "%s: number of descriptors must be between %d and %d inclusive. Default [%d]\n",
465                         __func__, CXGBE_MIN_RING_DESC_SIZE,
466                         CXGBE_MAX_RING_DESC_SIZE, CXGBE_DEFAULT_TX_DESC_SIZE);
467                 return -(EINVAL);
468         }
469
470         txq->q.size = temp_nb_desc;
471
472         err = t4_sge_alloc_eth_txq(adapter, txq, eth_dev, queue_idx,
473                                    s->fw_evtq.cntxt_id, socket_id);
474
475         dev_debug(adapter, "%s: txq->q.cntxt_id= %d err = %d\n",
476                   __func__, txq->q.cntxt_id, err);
477
478         return err;
479 }
480
481 static void cxgbe_dev_tx_queue_release(void *q)
482 {
483         struct sge_eth_txq *txq = (struct sge_eth_txq *)q;
484
485         if (txq) {
486                 struct port_info *pi = (struct port_info *)
487                                        (txq->eth_dev->data->dev_private);
488                 struct adapter *adap = pi->adapter;
489
490                 dev_debug(adapter, "%s: pi->port_id = %d; tx_queue_id = %d\n",
491                           __func__, pi->port_id, txq->q.cntxt_id);
492
493                 t4_sge_eth_txq_release(adap, txq);
494         }
495 }
496
497 static int cxgbe_dev_rx_queue_start(struct rte_eth_dev *eth_dev,
498                                     uint16_t rx_queue_id)
499 {
500         struct port_info *pi = (struct port_info *)(eth_dev->data->dev_private);
501         struct adapter *adap = pi->adapter;
502         struct sge_rspq *q;
503
504         dev_debug(adapter, "%s: pi->port_id = %d; rx_queue_id = %d\n",
505                   __func__, pi->port_id, rx_queue_id);
506
507         q = eth_dev->data->rx_queues[rx_queue_id];
508         return t4_sge_eth_rxq_start(adap, q);
509 }
510
511 static int cxgbe_dev_rx_queue_stop(struct rte_eth_dev *eth_dev,
512                                    uint16_t rx_queue_id)
513 {
514         struct port_info *pi = (struct port_info *)(eth_dev->data->dev_private);
515         struct adapter *adap = pi->adapter;
516         struct sge_rspq *q;
517
518         dev_debug(adapter, "%s: pi->port_id = %d; rx_queue_id = %d\n",
519                   __func__, pi->port_id, rx_queue_id);
520
521         q = eth_dev->data->rx_queues[rx_queue_id];
522         return t4_sge_eth_rxq_stop(adap, q);
523 }
524
525 static int cxgbe_dev_rx_queue_setup(struct rte_eth_dev *eth_dev,
526                                     uint16_t queue_idx, uint16_t nb_desc,
527                                     unsigned int socket_id,
528                                     const struct rte_eth_rxconf *rx_conf,
529                                     struct rte_mempool *mp)
530 {
531         struct port_info *pi = (struct port_info *)(eth_dev->data->dev_private);
532         struct adapter *adapter = pi->adapter;
533         struct sge *s = &adapter->sge;
534         struct sge_eth_rxq *rxq = &s->ethrxq[pi->first_qset + queue_idx];
535         int err = 0;
536         int msi_idx = 0;
537         unsigned int temp_nb_desc;
538         struct rte_eth_dev_info dev_info;
539         unsigned int pkt_len = eth_dev->data->dev_conf.rxmode.max_rx_pkt_len;
540
541         RTE_SET_USED(rx_conf);
542
543         dev_debug(adapter, "%s: eth_dev->data->nb_rx_queues = %d; queue_idx = %d; nb_desc = %d; socket_id = %d; mp = %p\n",
544                   __func__, eth_dev->data->nb_rx_queues, queue_idx, nb_desc,
545                   socket_id, mp);
546
547         cxgbe_dev_info_get(eth_dev, &dev_info);
548
549         /* Must accommodate at least ETHER_MIN_MTU */
550         if ((pkt_len < dev_info.min_rx_bufsize) ||
551             (pkt_len > dev_info.max_rx_pktlen)) {
552                 dev_err(adap, "%s: max pkt len must be > %d and <= %d\n",
553                         __func__, dev_info.min_rx_bufsize,
554                         dev_info.max_rx_pktlen);
555                 return -EINVAL;
556         }
557
558         /*  Free up the existing queue  */
559         if (eth_dev->data->rx_queues[queue_idx]) {
560                 cxgbe_dev_rx_queue_release(eth_dev->data->rx_queues[queue_idx]);
561                 eth_dev->data->rx_queues[queue_idx] = NULL;
562         }
563
564         eth_dev->data->rx_queues[queue_idx] = (void *)rxq;
565
566         /* Sanity Checking
567          *
568          * nb_desc should be > 0 and <= CXGBE_MAX_RING_DESC_SIZE
569          */
570         temp_nb_desc = nb_desc;
571         if (nb_desc < CXGBE_MIN_RING_DESC_SIZE) {
572                 dev_warn(adapter, "%s: number of descriptors must be >= %d. Using default [%d]\n",
573                          __func__, CXGBE_MIN_RING_DESC_SIZE,
574                          CXGBE_DEFAULT_RX_DESC_SIZE);
575                 temp_nb_desc = CXGBE_DEFAULT_RX_DESC_SIZE;
576         } else if (nb_desc > CXGBE_MAX_RING_DESC_SIZE) {
577                 dev_err(adapter, "%s: number of descriptors must be between %d and %d inclusive. Default [%d]\n",
578                         __func__, CXGBE_MIN_RING_DESC_SIZE,
579                         CXGBE_MAX_RING_DESC_SIZE, CXGBE_DEFAULT_RX_DESC_SIZE);
580                 return -(EINVAL);
581         }
582
583         rxq->rspq.size = temp_nb_desc;
584         if ((&rxq->fl) != NULL)
585                 rxq->fl.size = temp_nb_desc;
586
587         /* Set to jumbo mode if necessary */
588         if (pkt_len > ETHER_MAX_LEN)
589                 eth_dev->data->dev_conf.rxmode.jumbo_frame = 1;
590         else
591                 eth_dev->data->dev_conf.rxmode.jumbo_frame = 0;
592
593         err = t4_sge_alloc_rxq(adapter, &rxq->rspq, false, eth_dev, msi_idx,
594                                &rxq->fl, t4_ethrx_handler,
595                                t4_get_mps_bg_map(adapter, pi->tx_chan), mp,
596                                queue_idx, socket_id);
597
598         dev_debug(adapter, "%s: err = %d; port_id = %d; cntxt_id = %u\n",
599                   __func__, err, pi->port_id, rxq->rspq.cntxt_id);
600         return err;
601 }
602
603 static void cxgbe_dev_rx_queue_release(void *q)
604 {
605         struct sge_eth_rxq *rxq = (struct sge_eth_rxq *)q;
606         struct sge_rspq *rq = &rxq->rspq;
607
608         if (rq) {
609                 struct port_info *pi = (struct port_info *)
610                                        (rq->eth_dev->data->dev_private);
611                 struct adapter *adap = pi->adapter;
612
613                 dev_debug(adapter, "%s: pi->port_id = %d; rx_queue_id = %d\n",
614                           __func__, pi->port_id, rxq->rspq.cntxt_id);
615
616                 t4_sge_eth_rxq_release(adap, rxq);
617         }
618 }
619
620 /*
621  * Get port statistics.
622  */
623 static void cxgbe_dev_stats_get(struct rte_eth_dev *eth_dev,
624                                 struct rte_eth_stats *eth_stats)
625 {
626         struct port_info *pi = (struct port_info *)(eth_dev->data->dev_private);
627         struct adapter *adapter = pi->adapter;
628         struct sge *s = &adapter->sge;
629         struct port_stats ps;
630         unsigned int i;
631
632         cxgbe_stats_get(pi, &ps);
633
634         /* RX Stats */
635         eth_stats->ipackets = ps.rx_frames;
636         eth_stats->ibytes   = ps.rx_octets;
637         eth_stats->imcasts  = ps.rx_mcast_frames;
638         eth_stats->imissed  = ps.rx_ovflow0 + ps.rx_ovflow1 +
639                               ps.rx_ovflow2 + ps.rx_ovflow3 +
640                               ps.rx_trunc0 + ps.rx_trunc1 +
641                               ps.rx_trunc2 + ps.rx_trunc3;
642         eth_stats->ibadcrc  = ps.rx_fcs_err;
643         eth_stats->ibadlen  = ps.rx_jabber + ps.rx_too_long + ps.rx_runt;
644         eth_stats->ierrors  = ps.rx_symbol_err + eth_stats->ibadcrc +
645                               eth_stats->ibadlen + ps.rx_len_err +
646                               eth_stats->imissed;
647         eth_stats->rx_pause_xon  = ps.rx_pause;
648
649         /* TX Stats */
650         eth_stats->opackets = ps.tx_frames;
651         eth_stats->obytes   = ps.tx_octets;
652         eth_stats->oerrors  = ps.tx_error_frames;
653         eth_stats->tx_pause_xon  = ps.tx_pause;
654
655         for (i = 0; i < pi->n_rx_qsets; i++) {
656                 struct sge_eth_rxq *rxq =
657                         &s->ethrxq[pi->first_qset + i];
658
659                 eth_stats->q_ipackets[i] = rxq->stats.pkts;
660                 eth_stats->q_ibytes[i] = rxq->stats.rx_bytes;
661         }
662
663         for (i = 0; i < pi->n_tx_qsets; i++) {
664                 struct sge_eth_txq *txq =
665                         &s->ethtxq[pi->first_qset + i];
666
667                 eth_stats->q_opackets[i] = txq->stats.pkts;
668                 eth_stats->q_obytes[i] = txq->stats.tx_bytes;
669                 eth_stats->q_errors[i] = txq->stats.mapping_err;
670         }
671 }
672
673 /*
674  * Reset port statistics.
675  */
676 static void cxgbe_dev_stats_reset(struct rte_eth_dev *eth_dev)
677 {
678         struct port_info *pi = (struct port_info *)(eth_dev->data->dev_private);
679         struct adapter *adapter = pi->adapter;
680         struct sge *s = &adapter->sge;
681         unsigned int i;
682
683         cxgbe_stats_reset(pi);
684         for (i = 0; i < pi->n_rx_qsets; i++) {
685                 struct sge_eth_rxq *rxq =
686                         &s->ethrxq[pi->first_qset + i];
687
688                 rxq->stats.pkts = 0;
689                 rxq->stats.rx_bytes = 0;
690         }
691         for (i = 0; i < pi->n_tx_qsets; i++) {
692                 struct sge_eth_txq *txq =
693                         &s->ethtxq[pi->first_qset + i];
694
695                 txq->stats.pkts = 0;
696                 txq->stats.tx_bytes = 0;
697                 txq->stats.mapping_err = 0;
698         }
699 }
700
701 static int cxgbe_flow_ctrl_get(struct rte_eth_dev *eth_dev,
702                                struct rte_eth_fc_conf *fc_conf)
703 {
704         struct port_info *pi = (struct port_info *)(eth_dev->data->dev_private);
705         struct link_config *lc = &pi->link_cfg;
706         int rx_pause, tx_pause;
707
708         fc_conf->autoneg = lc->fc & PAUSE_AUTONEG;
709         rx_pause = lc->fc & PAUSE_RX;
710         tx_pause = lc->fc & PAUSE_TX;
711
712         if (rx_pause && tx_pause)
713                 fc_conf->mode = RTE_FC_FULL;
714         else if (rx_pause)
715                 fc_conf->mode = RTE_FC_RX_PAUSE;
716         else if (tx_pause)
717                 fc_conf->mode = RTE_FC_TX_PAUSE;
718         else
719                 fc_conf->mode = RTE_FC_NONE;
720         return 0;
721 }
722
723 static int cxgbe_flow_ctrl_set(struct rte_eth_dev *eth_dev,
724                                struct rte_eth_fc_conf *fc_conf)
725 {
726         struct port_info *pi = (struct port_info *)(eth_dev->data->dev_private);
727         struct adapter *adapter = pi->adapter;
728         struct link_config *lc = &pi->link_cfg;
729
730         if (lc->supported & FW_PORT_CAP_ANEG) {
731                 if (fc_conf->autoneg)
732                         lc->requested_fc |= PAUSE_AUTONEG;
733                 else
734                         lc->requested_fc &= ~PAUSE_AUTONEG;
735         }
736
737         if (((fc_conf->mode & RTE_FC_FULL) == RTE_FC_FULL) ||
738             (fc_conf->mode & RTE_FC_RX_PAUSE))
739                 lc->requested_fc |= PAUSE_RX;
740         else
741                 lc->requested_fc &= ~PAUSE_RX;
742
743         if (((fc_conf->mode & RTE_FC_FULL) == RTE_FC_FULL) ||
744             (fc_conf->mode & RTE_FC_TX_PAUSE))
745                 lc->requested_fc |= PAUSE_TX;
746         else
747                 lc->requested_fc &= ~PAUSE_TX;
748
749         return t4_link_l1cfg(adapter, adapter->mbox, pi->tx_chan,
750                              &pi->link_cfg);
751 }
752
753 static struct eth_dev_ops cxgbe_eth_dev_ops = {
754         .dev_start              = cxgbe_dev_start,
755         .dev_stop               = cxgbe_dev_stop,
756         .dev_close              = cxgbe_dev_close,
757         .promiscuous_enable     = cxgbe_dev_promiscuous_enable,
758         .promiscuous_disable    = cxgbe_dev_promiscuous_disable,
759         .allmulticast_enable    = cxgbe_dev_allmulticast_enable,
760         .allmulticast_disable   = cxgbe_dev_allmulticast_disable,
761         .dev_configure          = cxgbe_dev_configure,
762         .dev_infos_get          = cxgbe_dev_info_get,
763         .link_update            = cxgbe_dev_link_update,
764         .mtu_set                = cxgbe_dev_mtu_set,
765         .tx_queue_setup         = cxgbe_dev_tx_queue_setup,
766         .tx_queue_start         = cxgbe_dev_tx_queue_start,
767         .tx_queue_stop          = cxgbe_dev_tx_queue_stop,
768         .tx_queue_release       = cxgbe_dev_tx_queue_release,
769         .rx_queue_setup         = cxgbe_dev_rx_queue_setup,
770         .rx_queue_start         = cxgbe_dev_rx_queue_start,
771         .rx_queue_stop          = cxgbe_dev_rx_queue_stop,
772         .rx_queue_release       = cxgbe_dev_rx_queue_release,
773         .stats_get              = cxgbe_dev_stats_get,
774         .stats_reset            = cxgbe_dev_stats_reset,
775         .flow_ctrl_get          = cxgbe_flow_ctrl_get,
776         .flow_ctrl_set          = cxgbe_flow_ctrl_set,
777 };
778
779 /*
780  * Initialize driver
781  * It returns 0 on success.
782  */
783 static int eth_cxgbe_dev_init(struct rte_eth_dev *eth_dev)
784 {
785         struct rte_pci_device *pci_dev;
786         struct port_info *pi = (struct port_info *)(eth_dev->data->dev_private);
787         struct adapter *adapter = NULL;
788         char name[RTE_ETH_NAME_MAX_LEN];
789         int err = 0;
790
791         CXGBE_FUNC_TRACE();
792
793         eth_dev->dev_ops = &cxgbe_eth_dev_ops;
794         eth_dev->rx_pkt_burst = &cxgbe_recv_pkts;
795         eth_dev->tx_pkt_burst = &cxgbe_xmit_pkts;
796
797         /* for secondary processes, we don't initialise any further as primary
798          * has already done this work.
799          */
800         if (rte_eal_process_type() != RTE_PROC_PRIMARY)
801                 return 0;
802
803         pci_dev = eth_dev->pci_dev;
804
805         rte_eth_copy_pci_info(eth_dev, pci_dev);
806
807         snprintf(name, sizeof(name), "cxgbeadapter%d", eth_dev->data->port_id);
808         adapter = rte_zmalloc(name, sizeof(*adapter), 0);
809         if (!adapter)
810                 return -1;
811
812         adapter->use_unpacked_mode = 1;
813         adapter->regs = (void *)pci_dev->mem_resource[0].addr;
814         if (!adapter->regs) {
815                 dev_err(adapter, "%s: cannot map device registers\n", __func__);
816                 err = -ENOMEM;
817                 goto out_free_adapter;
818         }
819         adapter->pdev = pci_dev;
820         adapter->eth_dev = eth_dev;
821         pi->adapter = adapter;
822
823         err = cxgbe_probe(adapter);
824         if (err)
825                 dev_err(adapter, "%s: cxgbe probe failed with err %d\n",
826                         __func__, err);
827
828 out_free_adapter:
829         return err;
830 }
831
832 static struct eth_driver rte_cxgbe_pmd = {
833         {
834                 .name = "rte_cxgbe_pmd",
835                 .id_table = cxgb4_pci_tbl,
836                 .drv_flags = RTE_PCI_DRV_NEED_MAPPING | RTE_PCI_DRV_INTR_LSC,
837         },
838         .eth_dev_init = eth_cxgbe_dev_init,
839         .dev_private_size = sizeof(struct port_info),
840 };
841
842 /*
843  * Driver initialization routine.
844  * Invoked once at EAL init time.
845  * Register itself as the [Poll Mode] Driver of PCI CXGBE devices.
846  */
847 static int rte_cxgbe_pmd_init(const char *name __rte_unused,
848                               const char *params __rte_unused)
849 {
850         CXGBE_FUNC_TRACE();
851
852         rte_eth_driver_register(&rte_cxgbe_pmd);
853         return 0;
854 }
855
856 static struct rte_driver rte_cxgbe_driver = {
857         .name = "cxgbe_driver",
858         .type = PMD_PDEV,
859         .init = rte_cxgbe_pmd_init,
860 };
861
862 PMD_REGISTER_DRIVER(rte_cxgbe_driver);