drivers/net/dpaa/dpaa_ethdev.c

   1 /* SPDX-License-Identifier: BSD-3-Clause
   2  *
   3  *   Copyright 2016 Freescale Semiconductor, Inc. All rights reserved.
   4  *   Copyright 2017 NXP
   5  *
   6  */
   7 /* System headers */
   8 #include <stdio.h>
   9 #include <inttypes.h>
  10 #include <unistd.h>
  11 #include <limits.h>
  12 #include <sched.h>
  13 #include <signal.h>
  14 #include <pthread.h>
  15 #include <sys/types.h>
  16 #include <sys/syscall.h>
  17
  18 #include <rte_byteorder.h>
  19 #include <rte_common.h>
  20 #include <rte_interrupts.h>
  21 #include <rte_log.h>
  22 #include <rte_debug.h>
  23 #include <rte_pci.h>
  24 #include <rte_atomic.h>
  25 #include <rte_branch_prediction.h>
  26 #include <rte_memory.h>
  27 #include <rte_tailq.h>
  28 #include <rte_eal.h>
  29 #include <rte_alarm.h>
  30 #include <rte_ether.h>
  31 #include <rte_ethdev.h>
  32 #include <rte_malloc.h>
  33 #include <rte_ring.h>
  34
  35 #include <rte_dpaa_bus.h>
  36 #include <rte_dpaa_logs.h>
  37 #include <dpaa_mempool.h>
  38
  39 #include <dpaa_ethdev.h>
  40 #include <dpaa_rxtx.h>
  41
  42 #include <fsl_usd.h>
  43 #include <fsl_qman.h>
  44 #include <fsl_bman.h>
  45 #include <fsl_fman.h>
  46
  47 /* Keep track of whether QMAN and BMAN have been globally initialized */
  48 static int is_global_init;
  49
  50 /* Per FQ Taildrop in frame count */
  51 static unsigned int td_threshold = CGR_RX_PERFQ_THRESH;
  52
  53 struct rte_dpaa_xstats_name_off {
  54         char name[RTE_ETH_XSTATS_NAME_SIZE];
  55         uint32_t offset;
  56 };
  57
  58 static const struct rte_dpaa_xstats_name_off dpaa_xstats_strings[] = {
  59         {"rx_align_err",
  60                 offsetof(struct dpaa_if_stats, raln)},
  61         {"rx_valid_pause",
  62                 offsetof(struct dpaa_if_stats, rxpf)},
  63         {"rx_fcs_err",
  64                 offsetof(struct dpaa_if_stats, rfcs)},
  65         {"rx_vlan_frame",
  66                 offsetof(struct dpaa_if_stats, rvlan)},
  67         {"rx_frame_err",
  68                 offsetof(struct dpaa_if_stats, rerr)},
  69         {"rx_drop_err",
  70                 offsetof(struct dpaa_if_stats, rdrp)},
  71         {"rx_undersized",
  72                 offsetof(struct dpaa_if_stats, rund)},
  73         {"rx_oversize_err",
  74                 offsetof(struct dpaa_if_stats, rovr)},
  75         {"rx_fragment_pkt",
  76                 offsetof(struct dpaa_if_stats, rfrg)},
  77         {"tx_valid_pause",
  78                 offsetof(struct dpaa_if_stats, txpf)},
  79         {"tx_fcs_err",
  80                 offsetof(struct dpaa_if_stats, terr)},
  81         {"tx_vlan_frame",
  82                 offsetof(struct dpaa_if_stats, tvlan)},
  83         {"rx_undersized",
  84                 offsetof(struct dpaa_if_stats, tund)},
  85 };
  86
  87 static int
  88 dpaa_mtu_set(struct rte_eth_dev *dev, uint16_t mtu)
  89 {
  90         struct dpaa_if *dpaa_intf = dev->data->dev_private;
  91         uint32_t frame_size = mtu + ETHER_HDR_LEN + ETHER_CRC_LEN
  92                                 + VLAN_TAG_SIZE;
  93
  94         PMD_INIT_FUNC_TRACE();
  95
  96         if (mtu < ETHER_MIN_MTU || frame_size > DPAA_MAX_RX_PKT_LEN)
  97                 return -EINVAL;
  98         if (frame_size > ETHER_MAX_LEN)
  99                 dev->data->dev_conf.rxmode.jumbo_frame = 1;
 100         else
 101                 dev->data->dev_conf.rxmode.jumbo_frame = 0;
 102
 103         dev->data->dev_conf.rxmode.max_rx_pkt_len = frame_size;
 104
 105         fman_if_set_maxfrm(dpaa_intf->fif, frame_size);
 106
 107         return 0;
 108 }
 109
 110 static int
 111 dpaa_eth_dev_configure(struct rte_eth_dev *dev __rte_unused)
 112 {
 113         struct dpaa_if *dpaa_intf = dev->data->dev_private;
 114
 115         PMD_INIT_FUNC_TRACE();
 116
 117         if (dev->data->dev_conf.rxmode.jumbo_frame == 1) {
 118                 if (dev->data->dev_conf.rxmode.max_rx_pkt_len <=
 119                     DPAA_MAX_RX_PKT_LEN) {
 120                         fman_if_set_maxfrm(dpaa_intf->fif,
 121                                 dev->data->dev_conf.rxmode.max_rx_pkt_len);
 122                         return 0;
 123                 } else {
 124                         return -1;
 125                 }
 126         }
 127         return 0;
 128 }
 129
 130 static const uint32_t *
 131 dpaa_supported_ptypes_get(struct rte_eth_dev *dev)
 132 {
 133         static const uint32_t ptypes[] = {
 134                 /*todo -= add more types */
 135                 RTE_PTYPE_L2_ETHER,
 136                 RTE_PTYPE_L3_IPV4,
 137                 RTE_PTYPE_L3_IPV4_EXT,
 138                 RTE_PTYPE_L3_IPV6,
 139                 RTE_PTYPE_L3_IPV6_EXT,
 140                 RTE_PTYPE_L4_TCP,
 141                 RTE_PTYPE_L4_UDP,
 142                 RTE_PTYPE_L4_SCTP
 143         };
 144
 145         PMD_INIT_FUNC_TRACE();
 146
 147         if (dev->rx_pkt_burst == dpaa_eth_queue_rx)
 148                 return ptypes;
 149         return NULL;
 150 }
 151
 152 static int dpaa_eth_dev_start(struct rte_eth_dev *dev)
 153 {
 154         struct dpaa_if *dpaa_intf = dev->data->dev_private;
 155
 156         PMD_INIT_FUNC_TRACE();
 157
 158         /* Change tx callback to the real one */
 159         dev->tx_pkt_burst = dpaa_eth_queue_tx;
 160         fman_if_enable_rx(dpaa_intf->fif);
 161
 162         return 0;
 163 }
 164
 165 static void dpaa_eth_dev_stop(struct rte_eth_dev *dev)
 166 {
 167         struct dpaa_if *dpaa_intf = dev->data->dev_private;
 168
 169         PMD_INIT_FUNC_TRACE();
 170
 171         fman_if_disable_rx(dpaa_intf->fif);
 172         dev->tx_pkt_burst = dpaa_eth_tx_drop_all;
 173 }
 174
 175 static void dpaa_eth_dev_close(struct rte_eth_dev *dev)
 176 {
 177         PMD_INIT_FUNC_TRACE();
 178
 179         dpaa_eth_dev_stop(dev);
 180 }
 181
 182 static int
 183 dpaa_fw_version_get(struct rte_eth_dev *dev __rte_unused,
 184                      char *fw_version,
 185                      size_t fw_size)
 186 {
 187         int ret;
 188         FILE *svr_file = NULL;
 189         unsigned int svr_ver = 0;
 190
 191         PMD_INIT_FUNC_TRACE();
 192
 193         svr_file = fopen(DPAA_SOC_ID_FILE, "r");
 194         if (!svr_file) {
 195                 DPAA_PMD_ERR("Unable to open SoC device");
 196                 return -ENOTSUP; /* Not supported on this infra */
 197         }
 198         if (fscanf(svr_file, "svr:%x", &svr_ver) > 0)
 199                 dpaa_svr_family = svr_ver & SVR_MASK;
 200         else
 201                 DPAA_PMD_ERR("Unable to read SoC device");
 202
 203         fclose(svr_file);
 204
 205         ret = snprintf(fw_version, fw_size, "SVR:%x-fman-v%x",
 206                        svr_ver, fman_ip_rev);
 207         ret += 1; /* add the size of '\0' */
 208
 209         if (fw_size < (uint32_t)ret)
 210                 return ret;
 211         else
 212                 return 0;
 213 }
 214
 215 static void dpaa_eth_dev_info(struct rte_eth_dev *dev,
 216                               struct rte_eth_dev_info *dev_info)
 217 {
 218         struct dpaa_if *dpaa_intf = dev->data->dev_private;
 219
 220         PMD_INIT_FUNC_TRACE();
 221
 222         dev_info->max_rx_queues = dpaa_intf->nb_rx_queues;
 223         dev_info->max_tx_queues = dpaa_intf->nb_tx_queues;
 224         dev_info->min_rx_bufsize = DPAA_MIN_RX_BUF_SIZE;
 225         dev_info->max_rx_pktlen = DPAA_MAX_RX_PKT_LEN;
 226         dev_info->max_mac_addrs = DPAA_MAX_MAC_FILTER;
 227         dev_info->max_hash_mac_addrs = 0;
 228         dev_info->max_vfs = 0;
 229         dev_info->max_vmdq_pools = ETH_16_POOLS;
 230         dev_info->flow_type_rss_offloads = DPAA_RSS_OFFLOAD_ALL;
 231         dev_info->speed_capa = (ETH_LINK_SPEED_1G |
 232                                 ETH_LINK_SPEED_10G);
 233         dev_info->rx_offload_capa =
 234                 (DEV_RX_OFFLOAD_IPV4_CKSUM |
 235                 DEV_RX_OFFLOAD_UDP_CKSUM   |
 236                 DEV_RX_OFFLOAD_TCP_CKSUM);
 237         dev_info->tx_offload_capa =
 238                 (DEV_TX_OFFLOAD_IPV4_CKSUM  |
 239                 DEV_TX_OFFLOAD_UDP_CKSUM   |
 240                 DEV_TX_OFFLOAD_TCP_CKSUM);
 241 }
 242
 243 static int dpaa_eth_link_update(struct rte_eth_dev *dev,
 244                                 int wait_to_complete __rte_unused)
 245 {
 246         struct dpaa_if *dpaa_intf = dev->data->dev_private;
 247         struct rte_eth_link *link = &dev->data->dev_link;
 248
 249         PMD_INIT_FUNC_TRACE();
 250
 251         if (dpaa_intf->fif->mac_type == fman_mac_1g)
 252                 link->link_speed = 1000;
 253         else if (dpaa_intf->fif->mac_type == fman_mac_10g)
 254                 link->link_speed = 10000;
 255         else
 256                 DPAA_PMD_ERR("invalid link_speed: %s, %d",
 257                              dpaa_intf->name, dpaa_intf->fif->mac_type);
 258
 259         link->link_status = dpaa_intf->valid;
 260         link->link_duplex = ETH_LINK_FULL_DUPLEX;
 261         link->link_autoneg = ETH_LINK_AUTONEG;
 262         return 0;
 263 }
 264
 265 static int dpaa_eth_stats_get(struct rte_eth_dev *dev,
 266                                struct rte_eth_stats *stats)
 267 {
 268         struct dpaa_if *dpaa_intf = dev->data->dev_private;
 269
 270         PMD_INIT_FUNC_TRACE();
 271
 272         fman_if_stats_get(dpaa_intf->fif, stats);
 273         return 0;
 274 }
 275
 276 static void dpaa_eth_stats_reset(struct rte_eth_dev *dev)
 277 {
 278         struct dpaa_if *dpaa_intf = dev->data->dev_private;
 279
 280         PMD_INIT_FUNC_TRACE();
 281
 282         fman_if_stats_reset(dpaa_intf->fif);
 283 }
 284
 285 static int
 286 dpaa_dev_xstats_get(struct rte_eth_dev *dev, struct rte_eth_xstat *xstats,
 287                     unsigned int n)
 288 {
 289         struct dpaa_if *dpaa_intf = dev->data->dev_private;
 290         unsigned int i = 0, num = RTE_DIM(dpaa_xstats_strings);
 291         uint64_t values[sizeof(struct dpaa_if_stats) / 8];
 292
 293         if (xstats == NULL)
 294                 return 0;
 295
 296         if (n < num)
 297                 return num;
 298
 299         fman_if_stats_get_all(dpaa_intf->fif, values,
 300                               sizeof(struct dpaa_if_stats) / 8);
 301
 302         for (i = 0; i < num; i++) {
 303                 xstats[i].id = i;
 304                 xstats[i].value = values[dpaa_xstats_strings[i].offset / 8];
 305         }
 306         return i;
 307 }
 308
 309 static int
 310 dpaa_xstats_get_names(__rte_unused struct rte_eth_dev *dev,
 311                       struct rte_eth_xstat_name *xstats_names,
 312                       __rte_unused unsigned int limit)
 313 {
 314         unsigned int i, stat_cnt = RTE_DIM(dpaa_xstats_strings);
 315
 316         if (xstats_names != NULL)
 317                 for (i = 0; i < stat_cnt; i++)
 318                         snprintf(xstats_names[i].name,
 319                                  sizeof(xstats_names[i].name),
 320                                  "%s",
 321                                  dpaa_xstats_strings[i].name);
 322
 323         return stat_cnt;
 324 }
 325
 326 static int
 327 dpaa_xstats_get_by_id(struct rte_eth_dev *dev, const uint64_t *ids,
 328                       uint64_t *values, unsigned int n)
 329 {
 330         unsigned int i, stat_cnt = RTE_DIM(dpaa_xstats_strings);
 331         uint64_t values_copy[sizeof(struct dpaa_if_stats) / 8];
 332
 333         if (!ids) {
 334                 struct dpaa_if *dpaa_intf = dev->data->dev_private;
 335
 336                 if (n < stat_cnt)
 337                         return stat_cnt;
 338
 339                 if (!values)
 340                         return 0;
 341
 342                 fman_if_stats_get_all(dpaa_intf->fif, values_copy,
 343                                       sizeof(struct dpaa_if_stats));
 344
 345                 for (i = 0; i < stat_cnt; i++)
 346                         values[i] =
 347                                 values_copy[dpaa_xstats_strings[i].offset / 8];
 348
 349                 return stat_cnt;
 350         }
 351
 352         dpaa_xstats_get_by_id(dev, NULL, values_copy, stat_cnt);
 353
 354         for (i = 0; i < n; i++) {
 355                 if (ids[i] >= stat_cnt) {
 356                         DPAA_PMD_ERR("id value isn't valid");
 357                         return -1;
 358                 }
 359                 values[i] = values_copy[ids[i]];
 360         }
 361         return n;
 362 }
 363
 364 static int
 365 dpaa_xstats_get_names_by_id(
 366         struct rte_eth_dev *dev,
 367         struct rte_eth_xstat_name *xstats_names,
 368         const uint64_t *ids,
 369         unsigned int limit)
 370 {
 371         unsigned int i, stat_cnt = RTE_DIM(dpaa_xstats_strings);
 372         struct rte_eth_xstat_name xstats_names_copy[stat_cnt];
 373
 374         if (!ids)
 375                 return dpaa_xstats_get_names(dev, xstats_names, limit);
 376
 377         dpaa_xstats_get_names(dev, xstats_names_copy, limit);
 378
 379         for (i = 0; i < limit; i++) {
 380                 if (ids[i] >= stat_cnt) {
 381                         DPAA_PMD_ERR("id value isn't valid");
 382                         return -1;
 383                 }
 384                 strcpy(xstats_names[i].name, xstats_names_copy[ids[i]].name);
 385         }
 386         return limit;
 387 }
 388
 389 static void dpaa_eth_promiscuous_enable(struct rte_eth_dev *dev)
 390 {
 391         struct dpaa_if *dpaa_intf = dev->data->dev_private;
 392
 393         PMD_INIT_FUNC_TRACE();
 394
 395         fman_if_promiscuous_enable(dpaa_intf->fif);
 396 }
 397
 398 static void dpaa_eth_promiscuous_disable(struct rte_eth_dev *dev)
 399 {
 400         struct dpaa_if *dpaa_intf = dev->data->dev_private;
 401
 402         PMD_INIT_FUNC_TRACE();
 403
 404         fman_if_promiscuous_disable(dpaa_intf->fif);
 405 }
 406
 407 static void dpaa_eth_multicast_enable(struct rte_eth_dev *dev)
 408 {
 409         struct dpaa_if *dpaa_intf = dev->data->dev_private;
 410
 411         PMD_INIT_FUNC_TRACE();
 412
 413         fman_if_set_mcast_filter_table(dpaa_intf->fif);
 414 }
 415
 416 static void dpaa_eth_multicast_disable(struct rte_eth_dev *dev)
 417 {
 418         struct dpaa_if *dpaa_intf = dev->data->dev_private;
 419
 420         PMD_INIT_FUNC_TRACE();
 421
 422         fman_if_reset_mcast_filter_table(dpaa_intf->fif);
 423 }
 424
 425 static
 426 int dpaa_eth_rx_queue_setup(struct rte_eth_dev *dev, uint16_t queue_idx,
 427                             uint16_t nb_desc,
 428                             unsigned int socket_id __rte_unused,
 429                             const struct rte_eth_rxconf *rx_conf __rte_unused,
 430                             struct rte_mempool *mp)
 431 {
 432         struct dpaa_if *dpaa_intf = dev->data->dev_private;
 433         struct qman_fq *rxq = &dpaa_intf->rx_queues[queue_idx];
 434
 435         PMD_INIT_FUNC_TRACE();
 436
 437         DPAA_PMD_INFO("Rx queue setup for queue index: %d", queue_idx);
 438
 439         if (!dpaa_intf->bp_info || dpaa_intf->bp_info->mp != mp) {
 440                 struct fman_if_ic_params icp;
 441                 uint32_t fd_offset;
 442                 uint32_t bp_size;
 443
 444                 if (!mp->pool_data) {
 445                         DPAA_PMD_ERR("Not an offloaded buffer pool!");
 446                         return -1;
 447                 }
 448                 dpaa_intf->bp_info = DPAA_MEMPOOL_TO_POOL_INFO(mp);
 449
 450                 memset(&icp, 0, sizeof(icp));
 451                 /* set ICEOF for to the default value , which is 0*/
 452                 icp.iciof = DEFAULT_ICIOF;
 453                 icp.iceof = DEFAULT_RX_ICEOF;
 454                 icp.icsz = DEFAULT_ICSZ;
 455                 fman_if_set_ic_params(dpaa_intf->fif, &icp);
 456
 457                 fd_offset = RTE_PKTMBUF_HEADROOM + DPAA_HW_BUF_RESERVE;
 458                 fman_if_set_fdoff(dpaa_intf->fif, fd_offset);
 459
 460                 /* Buffer pool size should be equal to Dataroom Size*/
 461                 bp_size = rte_pktmbuf_data_room_size(mp);
 462                 fman_if_set_bp(dpaa_intf->fif, mp->size,
 463                                dpaa_intf->bp_info->bpid, bp_size);
 464                 dpaa_intf->valid = 1;
 465                 DPAA_PMD_INFO("if =%s - fd_offset = %d offset = %d",
 466                             dpaa_intf->name, fd_offset,
 467                         fman_if_get_fdoff(dpaa_intf->fif));
 468         }
 469
 470         dev->data->rx_queues[queue_idx] = rxq;
 471
 472         /* configure the CGR size as per the desc size */
 473         if (dpaa_intf->cgr_rx) {
 474                 struct qm_mcc_initcgr cgr_opts = {0};
 475                 int ret;
 476
 477                 /* Enable tail drop with cgr on this queue */
 478                 qm_cgr_cs_thres_set64(&cgr_opts.cgr.cs_thres, nb_desc, 0);
 479                 ret = qman_modify_cgr(dpaa_intf->cgr_rx, 0, &cgr_opts);
 480                 if (ret) {
 481                         DPAA_PMD_WARN(
 482                                 "rx taildrop modify fail on fqid %d (ret=%d)",
 483                                 rxq->fqid, ret);
 484                 }
 485         }
 486
 487         return 0;
 488 }
 489
 490 static
 491 void dpaa_eth_rx_queue_release(void *rxq __rte_unused)
 492 {
 493         PMD_INIT_FUNC_TRACE();
 494 }
 495
 496 static
 497 int dpaa_eth_tx_queue_setup(struct rte_eth_dev *dev, uint16_t queue_idx,
 498                             uint16_t nb_desc __rte_unused,
 499                 unsigned int socket_id __rte_unused,
 500                 const struct rte_eth_txconf *tx_conf __rte_unused)
 501 {
 502         struct dpaa_if *dpaa_intf = dev->data->dev_private;
 503
 504         PMD_INIT_FUNC_TRACE();
 505
 506         DPAA_PMD_INFO("Tx queue setup for queue index: %d", queue_idx);
 507         dev->data->tx_queues[queue_idx] = &dpaa_intf->tx_queues[queue_idx];
 508         return 0;
 509 }
 510
 511 static void dpaa_eth_tx_queue_release(void *txq __rte_unused)
 512 {
 513         PMD_INIT_FUNC_TRACE();
 514 }
 515
 516 static uint32_t
 517 dpaa_dev_rx_queue_count(struct rte_eth_dev *dev, uint16_t rx_queue_id)
 518 {
 519         struct dpaa_if *dpaa_intf = dev->data->dev_private;
 520         struct qman_fq *rxq = &dpaa_intf->rx_queues[rx_queue_id];
 521         u32 frm_cnt = 0;
 522
 523         PMD_INIT_FUNC_TRACE();
 524
 525         if (qman_query_fq_frm_cnt(rxq, &frm_cnt) == 0) {
 526                 RTE_LOG(DEBUG, PMD, "RX frame count for q(%d) is %u\n",
 527                         rx_queue_id, frm_cnt);
 528         }
 529         return frm_cnt;
 530 }
 531
 532 static int dpaa_link_down(struct rte_eth_dev *dev)
 533 {
 534         PMD_INIT_FUNC_TRACE();
 535
 536         dpaa_eth_dev_stop(dev);
 537         return 0;
 538 }
 539
 540 static int dpaa_link_up(struct rte_eth_dev *dev)
 541 {
 542         PMD_INIT_FUNC_TRACE();
 543
 544         dpaa_eth_dev_start(dev);
 545         return 0;
 546 }
 547
 548 static int
 549 dpaa_flow_ctrl_set(struct rte_eth_dev *dev,
 550                    struct rte_eth_fc_conf *fc_conf)
 551 {
 552         struct dpaa_if *dpaa_intf = dev->data->dev_private;
 553         struct rte_eth_fc_conf *net_fc;
 554
 555         PMD_INIT_FUNC_TRACE();
 556
 557         if (!(dpaa_intf->fc_conf)) {
 558                 dpaa_intf->fc_conf = rte_zmalloc(NULL,
 559                         sizeof(struct rte_eth_fc_conf), MAX_CACHELINE);
 560                 if (!dpaa_intf->fc_conf) {
 561                         DPAA_PMD_ERR("unable to save flow control info");
 562                         return -ENOMEM;
 563                 }
 564         }
 565         net_fc = dpaa_intf->fc_conf;
 566
 567         if (fc_conf->high_water < fc_conf->low_water) {
 568                 DPAA_PMD_ERR("Incorrect Flow Control Configuration");
 569                 return -EINVAL;
 570         }
 571
 572         if (fc_conf->mode == RTE_FC_NONE) {
 573                 return 0;
 574         } else if (fc_conf->mode == RTE_FC_TX_PAUSE ||
 575                  fc_conf->mode == RTE_FC_FULL) {
 576                 fman_if_set_fc_threshold(dpaa_intf->fif, fc_conf->high_water,
 577                                          fc_conf->low_water,
 578                                 dpaa_intf->bp_info->bpid);
 579                 if (fc_conf->pause_time)
 580                         fman_if_set_fc_quanta(dpaa_intf->fif,
 581                                               fc_conf->pause_time);
 582         }
 583
 584         /* Save the information in dpaa device */
 585         net_fc->pause_time = fc_conf->pause_time;
 586         net_fc->high_water = fc_conf->high_water;
 587         net_fc->low_water = fc_conf->low_water;
 588         net_fc->send_xon = fc_conf->send_xon;
 589         net_fc->mac_ctrl_frame_fwd = fc_conf->mac_ctrl_frame_fwd;
 590         net_fc->mode = fc_conf->mode;
 591         net_fc->autoneg = fc_conf->autoneg;
 592
 593         return 0;
 594 }
 595
 596 static int
 597 dpaa_flow_ctrl_get(struct rte_eth_dev *dev,
 598                    struct rte_eth_fc_conf *fc_conf)
 599 {
 600         struct dpaa_if *dpaa_intf = dev->data->dev_private;
 601         struct rte_eth_fc_conf *net_fc = dpaa_intf->fc_conf;
 602         int ret;
 603
 604         PMD_INIT_FUNC_TRACE();
 605
 606         if (net_fc) {
 607                 fc_conf->pause_time = net_fc->pause_time;
 608                 fc_conf->high_water = net_fc->high_water;
 609                 fc_conf->low_water = net_fc->low_water;
 610                 fc_conf->send_xon = net_fc->send_xon;
 611                 fc_conf->mac_ctrl_frame_fwd = net_fc->mac_ctrl_frame_fwd;
 612                 fc_conf->mode = net_fc->mode;
 613                 fc_conf->autoneg = net_fc->autoneg;
 614                 return 0;
 615         }
 616         ret = fman_if_get_fc_threshold(dpaa_intf->fif);
 617         if (ret) {
 618                 fc_conf->mode = RTE_FC_TX_PAUSE;
 619                 fc_conf->pause_time = fman_if_get_fc_quanta(dpaa_intf->fif);
 620         } else {
 621                 fc_conf->mode = RTE_FC_NONE;
 622         }
 623
 624         return 0;
 625 }
 626
 627 static int
 628 dpaa_dev_add_mac_addr(struct rte_eth_dev *dev,
 629                              struct ether_addr *addr,
 630                              uint32_t index,
 631                              __rte_unused uint32_t pool)
 632 {
 633         int ret;
 634         struct dpaa_if *dpaa_intf = dev->data->dev_private;
 635
 636         PMD_INIT_FUNC_TRACE();
 637
 638         ret = fman_if_add_mac_addr(dpaa_intf->fif, addr->addr_bytes, index);
 639
 640         if (ret)
 641                 RTE_LOG(ERR, PMD, "error: Adding the MAC ADDR failed:"
 642                         " err = %d", ret);
 643         return 0;
 644 }
 645
 646 static void
 647 dpaa_dev_remove_mac_addr(struct rte_eth_dev *dev,
 648                           uint32_t index)
 649 {
 650         struct dpaa_if *dpaa_intf = dev->data->dev_private;
 651
 652         PMD_INIT_FUNC_TRACE();
 653
 654         fman_if_clear_mac_addr(dpaa_intf->fif, index);
 655 }
 656
 657 static void
 658 dpaa_dev_set_mac_addr(struct rte_eth_dev *dev,
 659                        struct ether_addr *addr)
 660 {
 661         int ret;
 662         struct dpaa_if *dpaa_intf = dev->data->dev_private;
 663
 664         PMD_INIT_FUNC_TRACE();
 665
 666         ret = fman_if_add_mac_addr(dpaa_intf->fif, addr->addr_bytes, 0);
 667         if (ret)
 668                 RTE_LOG(ERR, PMD, "error: Setting the MAC ADDR failed %d", ret);
 669 }
 670
 671 static struct eth_dev_ops dpaa_devops = {
 672         .dev_configure            = dpaa_eth_dev_configure,
 673         .dev_start                = dpaa_eth_dev_start,
 674         .dev_stop                 = dpaa_eth_dev_stop,
 675         .dev_close                = dpaa_eth_dev_close,
 676         .dev_infos_get            = dpaa_eth_dev_info,
 677         .dev_supported_ptypes_get = dpaa_supported_ptypes_get,
 678
 679         .rx_queue_setup           = dpaa_eth_rx_queue_setup,
 680         .tx_queue_setup           = dpaa_eth_tx_queue_setup,
 681         .rx_queue_release         = dpaa_eth_rx_queue_release,
 682         .tx_queue_release         = dpaa_eth_tx_queue_release,
 683         .rx_queue_count           = dpaa_dev_rx_queue_count,
 684
 685         .flow_ctrl_get            = dpaa_flow_ctrl_get,
 686         .flow_ctrl_set            = dpaa_flow_ctrl_set,
 687
 688         .link_update              = dpaa_eth_link_update,
 689         .stats_get                = dpaa_eth_stats_get,
 690         .xstats_get               = dpaa_dev_xstats_get,
 691         .xstats_get_by_id         = dpaa_xstats_get_by_id,
 692         .xstats_get_names_by_id   = dpaa_xstats_get_names_by_id,
 693         .xstats_get_names         = dpaa_xstats_get_names,
 694         .xstats_reset             = dpaa_eth_stats_reset,
 695         .stats_reset              = dpaa_eth_stats_reset,
 696         .promiscuous_enable       = dpaa_eth_promiscuous_enable,
 697         .promiscuous_disable      = dpaa_eth_promiscuous_disable,
 698         .allmulticast_enable      = dpaa_eth_multicast_enable,
 699         .allmulticast_disable     = dpaa_eth_multicast_disable,
 700         .mtu_set                  = dpaa_mtu_set,
 701         .dev_set_link_down        = dpaa_link_down,
 702         .dev_set_link_up          = dpaa_link_up,
 703         .mac_addr_add             = dpaa_dev_add_mac_addr,
 704         .mac_addr_remove          = dpaa_dev_remove_mac_addr,
 705         .mac_addr_set             = dpaa_dev_set_mac_addr,
 706
 707         .fw_version_get           = dpaa_fw_version_get,
 708 };
 709
 710 static int dpaa_fc_set_default(struct dpaa_if *dpaa_intf)
 711 {
 712         struct rte_eth_fc_conf *fc_conf;
 713         int ret;
 714
 715         PMD_INIT_FUNC_TRACE();
 716
 717         if (!(dpaa_intf->fc_conf)) {
 718                 dpaa_intf->fc_conf = rte_zmalloc(NULL,
 719                         sizeof(struct rte_eth_fc_conf), MAX_CACHELINE);
 720                 if (!dpaa_intf->fc_conf) {
 721                         DPAA_PMD_ERR("unable to save flow control info");
 722                         return -ENOMEM;
 723                 }
 724         }
 725         fc_conf = dpaa_intf->fc_conf;
 726         ret = fman_if_get_fc_threshold(dpaa_intf->fif);
 727         if (ret) {
 728                 fc_conf->mode = RTE_FC_TX_PAUSE;
 729                 fc_conf->pause_time = fman_if_get_fc_quanta(dpaa_intf->fif);
 730         } else {
 731                 fc_conf->mode = RTE_FC_NONE;
 732         }
 733
 734         return 0;
 735 }
 736
 737 /* Initialise an Rx FQ */
 738 static int dpaa_rx_queue_init(struct qman_fq *fq, struct qman_cgr *cgr_rx,
 739                               uint32_t fqid)
 740 {
 741         struct qm_mcc_initfq opts = {0};
 742         int ret;
 743         u32 flags = 0;
 744         struct qm_mcc_initcgr cgr_opts = {
 745                 .we_mask = QM_CGR_WE_CS_THRES |
 746                                 QM_CGR_WE_CSTD_EN |
 747                                 QM_CGR_WE_MODE,
 748                 .cgr = {
 749                         .cstd_en = QM_CGR_EN,
 750                         .mode = QMAN_CGR_MODE_FRAME
 751                 }
 752         };
 753
 754         PMD_INIT_FUNC_TRACE();
 755
 756         ret = qman_reserve_fqid(fqid);
 757         if (ret) {
 758                 DPAA_PMD_ERR("reserve rx fqid %d failed with ret: %d",
 759                              fqid, ret);
 760                 return -EINVAL;
 761         }
 762
 763         DPAA_PMD_DEBUG("creating rx fq %p, fqid %d", fq, fqid);
 764         ret = qman_create_fq(fqid, QMAN_FQ_FLAG_NO_ENQUEUE, fq);
 765         if (ret) {
 766                 DPAA_PMD_ERR("create rx fqid %d failed with ret: %d",
 767                         fqid, ret);
 768                 return ret;
 769         }
 770
 771         opts.we_mask = QM_INITFQ_WE_DESTWQ | QM_INITFQ_WE_FQCTRL |
 772                        QM_INITFQ_WE_CONTEXTA;
 773
 774         opts.fqd.dest.wq = DPAA_IF_RX_PRIORITY;
 775         opts.fqd.fq_ctrl = QM_FQCTRL_AVOIDBLOCK | QM_FQCTRL_CTXASTASHING |
 776                            QM_FQCTRL_PREFERINCACHE;
 777         opts.fqd.context_a.stashing.exclusive = 0;
 778         opts.fqd.context_a.stashing.annotation_cl = DPAA_IF_RX_ANNOTATION_STASH;
 779         opts.fqd.context_a.stashing.data_cl = DPAA_IF_RX_DATA_STASH;
 780         opts.fqd.context_a.stashing.context_cl = DPAA_IF_RX_CONTEXT_STASH;
 781
 782         if (cgr_rx) {
 783                 /* Enable tail drop with cgr on this queue */
 784                 qm_cgr_cs_thres_set64(&cgr_opts.cgr.cs_thres, td_threshold, 0);
 785                 cgr_rx->cb = NULL;
 786                 ret = qman_create_cgr(cgr_rx, QMAN_CGR_FLAG_USE_INIT,
 787                                       &cgr_opts);
 788                 if (ret) {
 789                         DPAA_PMD_WARN(
 790                                 "rx taildrop init fail on rx fqid %d (ret=%d)",
 791                                 fqid, ret);
 792                         goto without_cgr;
 793                 }
 794                 opts.we_mask |= QM_INITFQ_WE_CGID;
 795                 opts.fqd.cgid = cgr_rx->cgrid;
 796                 opts.fqd.fq_ctrl |= QM_FQCTRL_CGE;
 797         }
 798 without_cgr:
 799         ret = qman_init_fq(fq, flags, &opts);
 800         if (ret)
 801                 DPAA_PMD_ERR("init rx fqid %d failed with ret: %d", fqid, ret);
 802         return ret;
 803 }
 804
 805 /* Initialise a Tx FQ */
 806 static int dpaa_tx_queue_init(struct qman_fq *fq,
 807                               struct fman_if *fman_intf)
 808 {
 809         struct qm_mcc_initfq opts = {0};
 810         int ret;
 811
 812         PMD_INIT_FUNC_TRACE();
 813
 814         ret = qman_create_fq(0, QMAN_FQ_FLAG_DYNAMIC_FQID |
 815                              QMAN_FQ_FLAG_TO_DCPORTAL, fq);
 816         if (ret) {
 817                 DPAA_PMD_ERR("create tx fq failed with ret: %d", ret);
 818                 return ret;
 819         }
 820         opts.we_mask = QM_INITFQ_WE_DESTWQ | QM_INITFQ_WE_FQCTRL |
 821                        QM_INITFQ_WE_CONTEXTB | QM_INITFQ_WE_CONTEXTA;
 822         opts.fqd.dest.channel = fman_intf->tx_channel_id;
 823         opts.fqd.dest.wq = DPAA_IF_TX_PRIORITY;
 824         opts.fqd.fq_ctrl = QM_FQCTRL_PREFERINCACHE;
 825         opts.fqd.context_b = 0;
 826         /* no tx-confirmation */
 827         opts.fqd.context_a.hi = 0x80000000 | fman_dealloc_bufs_mask_hi;
 828         opts.fqd.context_a.lo = 0 | fman_dealloc_bufs_mask_lo;
 829         DPAA_PMD_DEBUG("init tx fq %p, fqid %d", fq, fq->fqid);
 830         ret = qman_init_fq(fq, QMAN_INITFQ_FLAG_SCHED, &opts);
 831         if (ret)
 832                 DPAA_PMD_ERR("init tx fqid %d failed %d", fq->fqid, ret);
 833         return ret;
 834 }
 835
 836 #ifdef RTE_LIBRTE_DPAA_DEBUG_DRIVER
 837 /* Initialise a DEBUG FQ ([rt]x_error, rx_default). */
 838 static int dpaa_debug_queue_init(struct qman_fq *fq, uint32_t fqid)
 839 {
 840         struct qm_mcc_initfq opts = {0};
 841         int ret;
 842
 843         PMD_INIT_FUNC_TRACE();
 844
 845         ret = qman_reserve_fqid(fqid);
 846         if (ret) {
 847                 DPAA_PMD_ERR("Reserve debug fqid %d failed with ret: %d",
 848                         fqid, ret);
 849                 return -EINVAL;
 850         }
 851         /* "map" this Rx FQ to one of the interfaces Tx FQID */
 852         DPAA_PMD_DEBUG("Creating debug fq %p, fqid %d", fq, fqid);
 853         ret = qman_create_fq(fqid, QMAN_FQ_FLAG_NO_ENQUEUE, fq);
 854         if (ret) {
 855                 DPAA_PMD_ERR("create debug fqid %d failed with ret: %d",
 856                         fqid, ret);
 857                 return ret;
 858         }
 859         opts.we_mask = QM_INITFQ_WE_DESTWQ | QM_INITFQ_WE_FQCTRL;
 860         opts.fqd.dest.wq = DPAA_IF_DEBUG_PRIORITY;
 861         ret = qman_init_fq(fq, 0, &opts);
 862         if (ret)
 863                 DPAA_PMD_ERR("init debug fqid %d failed with ret: %d",
 864                             fqid, ret);
 865         return ret;
 866 }
 867 #endif
 868
 869 /* Initialise a network interface */
 870 static int
 871 dpaa_dev_init(struct rte_eth_dev *eth_dev)
 872 {
 873         int num_cores, num_rx_fqs, fqid;
 874         int loop, ret = 0;
 875         int dev_id;
 876         struct rte_dpaa_device *dpaa_device;
 877         struct dpaa_if *dpaa_intf;
 878         struct fm_eth_port_cfg *cfg;
 879         struct fman_if *fman_intf;
 880         struct fman_if_bpool *bp, *tmp_bp;
 881         uint32_t cgrid[DPAA_MAX_NUM_PCD_QUEUES];
 882
 883         PMD_INIT_FUNC_TRACE();
 884
 885         /* For secondary processes, the primary has done all the work */
 886         if (rte_eal_process_type() != RTE_PROC_PRIMARY)
 887                 return 0;
 888
 889         dpaa_device = DEV_TO_DPAA_DEVICE(eth_dev->device);
 890         dev_id = dpaa_device->id.dev_id;
 891         dpaa_intf = eth_dev->data->dev_private;
 892         cfg = &dpaa_netcfg->port_cfg[dev_id];
 893         fman_intf = cfg->fman_if;
 894
 895         dpaa_intf->name = dpaa_device->name;
 896
 897         /* save fman_if & cfg in the interface struture */
 898         dpaa_intf->fif = fman_intf;
 899         dpaa_intf->ifid = dev_id;
 900         dpaa_intf->cfg = cfg;
 901
 902         /* Initialize Rx FQ's */
 903         if (getenv("DPAA_NUM_RX_QUEUES"))
 904                 num_rx_fqs = atoi(getenv("DPAA_NUM_RX_QUEUES"));
 905         else
 906                 num_rx_fqs = DPAA_DEFAULT_NUM_PCD_QUEUES;
 907
 908         /* Each device can not have more than DPAA_PCD_FQID_MULTIPLIER RX
 909          * queues.
 910          */
 911         if (num_rx_fqs <= 0 || num_rx_fqs > DPAA_PCD_FQID_MULTIPLIER) {
 912                 DPAA_PMD_ERR("Invalid number of RX queues\n");
 913                 return -EINVAL;
 914         }
 915
 916         dpaa_intf->rx_queues = rte_zmalloc(NULL,
 917                 sizeof(struct qman_fq) * num_rx_fqs, MAX_CACHELINE);
 918
 919         /* If congestion control is enabled globally*/
 920         if (td_threshold) {
 921                 dpaa_intf->cgr_rx = rte_zmalloc(NULL,
 922                         sizeof(struct qman_cgr) * num_rx_fqs, MAX_CACHELINE);
 923
 924                 ret = qman_alloc_cgrid_range(&cgrid[0], num_rx_fqs, 1, 0);
 925                 if (ret != num_rx_fqs) {
 926                         DPAA_PMD_WARN("insufficient CGRIDs available");
 927                         return -EINVAL;
 928                 }
 929         } else {
 930                 dpaa_intf->cgr_rx = NULL;
 931         }
 932
 933         for (loop = 0; loop < num_rx_fqs; loop++) {
 934                 fqid = DPAA_PCD_FQID_START + dpaa_intf->ifid *
 935                         DPAA_PCD_FQID_MULTIPLIER + loop;
 936
 937                 if (dpaa_intf->cgr_rx)
 938                         dpaa_intf->cgr_rx[loop].cgrid = cgrid[loop];
 939
 940                 ret = dpaa_rx_queue_init(&dpaa_intf->rx_queues[loop],
 941                         dpaa_intf->cgr_rx ? &dpaa_intf->cgr_rx[loop] : NULL,
 942                         fqid);
 943                 if (ret)
 944                         return ret;
 945                 dpaa_intf->rx_queues[loop].dpaa_intf = dpaa_intf;
 946         }
 947         dpaa_intf->nb_rx_queues = num_rx_fqs;
 948
 949         /* Initialise Tx FQs. Have as many Tx FQ's as number of cores */
 950         num_cores = rte_lcore_count();
 951         dpaa_intf->tx_queues = rte_zmalloc(NULL, sizeof(struct qman_fq) *
 952                 num_cores, MAX_CACHELINE);
 953         if (!dpaa_intf->tx_queues)
 954                 return -ENOMEM;
 955
 956         for (loop = 0; loop < num_cores; loop++) {
 957                 ret = dpaa_tx_queue_init(&dpaa_intf->tx_queues[loop],
 958                                          fman_intf);
 959                 if (ret)
 960                         return ret;
 961                 dpaa_intf->tx_queues[loop].dpaa_intf = dpaa_intf;
 962         }
 963         dpaa_intf->nb_tx_queues = num_cores;
 964
 965 #ifdef RTE_LIBRTE_DPAA_DEBUG_DRIVER
 966         dpaa_debug_queue_init(&dpaa_intf->debug_queues[
 967                 DPAA_DEBUG_FQ_RX_ERROR], fman_intf->fqid_rx_err);
 968         dpaa_intf->debug_queues[DPAA_DEBUG_FQ_RX_ERROR].dpaa_intf = dpaa_intf;
 969         dpaa_debug_queue_init(&dpaa_intf->debug_queues[
 970                 DPAA_DEBUG_FQ_TX_ERROR], fman_intf->fqid_tx_err);
 971         dpaa_intf->debug_queues[DPAA_DEBUG_FQ_TX_ERROR].dpaa_intf = dpaa_intf;
 972 #endif
 973
 974         DPAA_PMD_DEBUG("All frame queues created");
 975
 976         /* Get the initial configuration for flow control */
 977         dpaa_fc_set_default(dpaa_intf);
 978
 979         /* reset bpool list, initialize bpool dynamically */
 980         list_for_each_entry_safe(bp, tmp_bp, &cfg->fman_if->bpool_list, node) {
 981                 list_del(&bp->node);
 982                 free(bp);
 983         }
 984
 985         /* Populate ethdev structure */
 986         eth_dev->dev_ops = &dpaa_devops;
 987         eth_dev->rx_pkt_burst = dpaa_eth_queue_rx;
 988         eth_dev->tx_pkt_burst = dpaa_eth_tx_drop_all;
 989
 990         /* Allocate memory for storing MAC addresses */
 991         eth_dev->data->mac_addrs = rte_zmalloc("mac_addr",
 992                 ETHER_ADDR_LEN * DPAA_MAX_MAC_FILTER, 0);
 993         if (eth_dev->data->mac_addrs == NULL) {
 994                 DPAA_PMD_ERR("Failed to allocate %d bytes needed to "
 995                                                 "store MAC addresses",
 996                                 ETHER_ADDR_LEN * DPAA_MAX_MAC_FILTER);
 997                 rte_free(dpaa_intf->cgr_rx);
 998                 rte_free(dpaa_intf->rx_queues);
 999                 rte_free(dpaa_intf->tx_queues);
1000                 dpaa_intf->rx_queues = NULL;
1001                 dpaa_intf->tx_queues = NULL;
1002                 dpaa_intf->nb_rx_queues = 0;
1003                 dpaa_intf->nb_tx_queues = 0;
1004                 return -ENOMEM;
1005         }
1006
1007         /* copy the primary mac address */
1008         ether_addr_copy(&fman_intf->mac_addr, &eth_dev->data->mac_addrs[0]);
1009
1010         RTE_LOG(INFO, PMD, "net: dpaa: %s: %02x:%02x:%02x:%02x:%02x:%02x\n",
1011                 dpaa_device->name,
1012                 fman_intf->mac_addr.addr_bytes[0],
1013                 fman_intf->mac_addr.addr_bytes[1],
1014                 fman_intf->mac_addr.addr_bytes[2],
1015                 fman_intf->mac_addr.addr_bytes[3],
1016                 fman_intf->mac_addr.addr_bytes[4],
1017                 fman_intf->mac_addr.addr_bytes[5]);
1018
1019         /* Disable RX mode */
1020         fman_if_discard_rx_errors(fman_intf);
1021         fman_if_disable_rx(fman_intf);
1022         /* Disable promiscuous mode */
1023         fman_if_promiscuous_disable(fman_intf);
1024         /* Disable multicast */
1025         fman_if_reset_mcast_filter_table(fman_intf);
1026         /* Reset interface statistics */
1027         fman_if_stats_reset(fman_intf);
1028
1029         return 0;
1030 }
1031
1032 static int
1033 dpaa_dev_uninit(struct rte_eth_dev *dev)
1034 {
1035         struct dpaa_if *dpaa_intf = dev->data->dev_private;
1036         int loop;
1037
1038         PMD_INIT_FUNC_TRACE();
1039
1040         if (rte_eal_process_type() != RTE_PROC_PRIMARY)
1041                 return -EPERM;
1042
1043         if (!dpaa_intf) {
1044                 DPAA_PMD_WARN("Already closed or not started");
1045                 return -1;
1046         }
1047
1048         dpaa_eth_dev_close(dev);
1049
1050         /* release configuration memory */
1051         if (dpaa_intf->fc_conf)
1052                 rte_free(dpaa_intf->fc_conf);
1053
1054         /* Release RX congestion Groups */
1055         if (dpaa_intf->cgr_rx) {
1056                 for (loop = 0; loop < dpaa_intf->nb_rx_queues; loop++)
1057                         qman_delete_cgr(&dpaa_intf->cgr_rx[loop]);
1058
1059                 qman_release_cgrid_range(dpaa_intf->cgr_rx[loop].cgrid,
1060                                          dpaa_intf->nb_rx_queues);
1061         }
1062
1063         rte_free(dpaa_intf->cgr_rx);
1064         dpaa_intf->cgr_rx = NULL;
1065
1066         rte_free(dpaa_intf->rx_queues);
1067         dpaa_intf->rx_queues = NULL;
1068
1069         rte_free(dpaa_intf->tx_queues);
1070         dpaa_intf->tx_queues = NULL;
1071
1072         /* free memory for storing MAC addresses */
1073         rte_free(dev->data->mac_addrs);
1074         dev->data->mac_addrs = NULL;
1075
1076         dev->dev_ops = NULL;
1077         dev->rx_pkt_burst = NULL;
1078         dev->tx_pkt_burst = NULL;
1079
1080         return 0;
1081 }
1082
1083 static int
1084 rte_dpaa_probe(struct rte_dpaa_driver *dpaa_drv,
1085                struct rte_dpaa_device *dpaa_dev)
1086 {
1087         int diag;
1088         int ret;
1089         struct rte_eth_dev *eth_dev;
1090
1091         PMD_INIT_FUNC_TRACE();
1092
1093         /* In case of secondary process, the device is already configured
1094          * and no further action is required, except portal initialization
1095          * and verifying secondary attachment to port name.
1096          */
1097         if (rte_eal_process_type() != RTE_PROC_PRIMARY) {
1098                 eth_dev = rte_eth_dev_attach_secondary(dpaa_dev->name);
1099                 if (!eth_dev)
1100                         return -ENOMEM;
1101                 return 0;
1102         }
1103
1104         if (!is_global_init) {
1105                 /* One time load of Qman/Bman drivers */
1106                 ret = qman_global_init();
1107                 if (ret) {
1108                         DPAA_PMD_ERR("QMAN initialization failed: %d",
1109                                      ret);
1110                         return ret;
1111                 }
1112                 ret = bman_global_init();
1113                 if (ret) {
1114                         DPAA_PMD_ERR("BMAN initialization failed: %d",
1115                                      ret);
1116                         return ret;
1117                 }
1118
1119                 is_global_init = 1;
1120         }
1121
1122         ret = rte_dpaa_portal_init((void *)1);
1123         if (ret) {
1124                 DPAA_PMD_ERR("Unable to initialize portal");
1125                 return ret;
1126         }
1127
1128         eth_dev = rte_eth_dev_allocate(dpaa_dev->name);
1129         if (eth_dev == NULL)
1130                 return -ENOMEM;
1131
1132         eth_dev->data->dev_private = rte_zmalloc(
1133                                         "ethdev private structure",
1134                                         sizeof(struct dpaa_if),
1135                                         RTE_CACHE_LINE_SIZE);
1136         if (!eth_dev->data->dev_private) {
1137                 DPAA_PMD_ERR("Cannot allocate memzone for port data");
1138                 rte_eth_dev_release_port(eth_dev);
1139                 return -ENOMEM;
1140         }
1141
1142         eth_dev->device = &dpaa_dev->device;
1143         eth_dev->device->driver = &dpaa_drv->driver;
1144         dpaa_dev->eth_dev = eth_dev;
1145
1146         /* Invoke PMD device initialization function */
1147         diag = dpaa_dev_init(eth_dev);
1148         if (diag == 0)
1149                 return 0;
1150
1151         if (rte_eal_process_type() == RTE_PROC_PRIMARY)
1152                 rte_free(eth_dev->data->dev_private);
1153
1154         rte_eth_dev_release_port(eth_dev);
1155         return diag;
1156 }
1157
1158 static int
1159 rte_dpaa_remove(struct rte_dpaa_device *dpaa_dev)
1160 {
1161         struct rte_eth_dev *eth_dev;
1162
1163         PMD_INIT_FUNC_TRACE();
1164
1165         eth_dev = dpaa_dev->eth_dev;
1166         dpaa_dev_uninit(eth_dev);
1167
1168         if (rte_eal_process_type() == RTE_PROC_PRIMARY)
1169                 rte_free(eth_dev->data->dev_private);
1170
1171         rte_eth_dev_release_port(eth_dev);
1172
1173         return 0;
1174 }
1175
1176 static struct rte_dpaa_driver rte_dpaa_pmd = {
1177         .drv_type = FSL_DPAA_ETH,
1178         .probe = rte_dpaa_probe,
1179         .remove = rte_dpaa_remove,
1180 };
1181
1182 RTE_PMD_REGISTER_DPAA(net_dpaa, rte_dpaa_pmd);