drivers/net/dpaa2/dpaa2_ethdev.c

   1 /* * SPDX-License-Identifier: BSD-3-Clause
   2  *
   3  *   Copyright (c) 2016 Freescale Semiconductor, Inc. All rights reserved.
   4  *   Copyright 2016 NXP
   5  *
   6  */
   7
   8 #include <time.h>
   9 #include <net/if.h>
  10
  11 #include <rte_mbuf.h>
  12 #include <rte_ethdev_driver.h>
  13 #include <rte_malloc.h>
  14 #include <rte_memcpy.h>
  15 #include <rte_string_fns.h>
  16 #include <rte_cycles.h>
  17 #include <rte_kvargs.h>
  18 #include <rte_dev.h>
  19 #include <rte_fslmc.h>
  20 #include <rte_flow_driver.h>
  21
  22 #include "dpaa2_pmd_logs.h"
  23 #include <fslmc_vfio.h>
  24 #include <dpaa2_hw_pvt.h>
  25 #include <dpaa2_hw_mempool.h>
  26 #include <dpaa2_hw_dpio.h>
  27 #include <mc/fsl_dpmng.h>
  28 #include "dpaa2_ethdev.h"
  29 #include "dpaa2_sparser.h"
  30 #include <fsl_qbman_debug.h>
  31
  32 #define DRIVER_LOOPBACK_MODE "drv_loopback"
  33 #define DRIVER_NO_PREFETCH_MODE "drv_no_prefetch"
  34
  35 /* Supported Rx offloads */
  36 static uint64_t dev_rx_offloads_sup =
  37                 DEV_RX_OFFLOAD_CHECKSUM |
  38                 DEV_RX_OFFLOAD_SCTP_CKSUM |
  39                 DEV_RX_OFFLOAD_OUTER_IPV4_CKSUM |
  40                 DEV_RX_OFFLOAD_OUTER_UDP_CKSUM |
  41                 DEV_RX_OFFLOAD_VLAN_STRIP |
  42                 DEV_RX_OFFLOAD_VLAN_FILTER |
  43                 DEV_RX_OFFLOAD_JUMBO_FRAME |
  44                 DEV_RX_OFFLOAD_TIMESTAMP;
  45
  46 /* Rx offloads which cannot be disabled */
  47 static uint64_t dev_rx_offloads_nodis =
  48                 DEV_RX_OFFLOAD_RSS_HASH |
  49                 DEV_RX_OFFLOAD_SCATTER;
  50
  51 /* Supported Tx offloads */
  52 static uint64_t dev_tx_offloads_sup =
  53                 DEV_TX_OFFLOAD_VLAN_INSERT |
  54                 DEV_TX_OFFLOAD_IPV4_CKSUM |
  55                 DEV_TX_OFFLOAD_UDP_CKSUM |
  56                 DEV_TX_OFFLOAD_TCP_CKSUM |
  57                 DEV_TX_OFFLOAD_SCTP_CKSUM |
  58                 DEV_TX_OFFLOAD_OUTER_IPV4_CKSUM |
  59                 DEV_TX_OFFLOAD_MT_LOCKFREE |
  60                 DEV_TX_OFFLOAD_MBUF_FAST_FREE;
  61
  62 /* Tx offloads which cannot be disabled */
  63 static uint64_t dev_tx_offloads_nodis =
  64                 DEV_TX_OFFLOAD_MULTI_SEGS;
  65
  66 /* enable timestamp in mbuf */
  67 enum pmd_dpaa2_ts dpaa2_enable_ts;
  68
  69 struct rte_dpaa2_xstats_name_off {
  70         char name[RTE_ETH_XSTATS_NAME_SIZE];
  71         uint8_t page_id; /* dpni statistics page id */
  72         uint8_t stats_id; /* stats id in the given page */
  73 };
  74
  75 static const struct rte_dpaa2_xstats_name_off dpaa2_xstats_strings[] = {
  76         {"ingress_multicast_frames", 0, 2},
  77         {"ingress_multicast_bytes", 0, 3},
  78         {"ingress_broadcast_frames", 0, 4},
  79         {"ingress_broadcast_bytes", 0, 5},
  80         {"egress_multicast_frames", 1, 2},
  81         {"egress_multicast_bytes", 1, 3},
  82         {"egress_broadcast_frames", 1, 4},
  83         {"egress_broadcast_bytes", 1, 5},
  84         {"ingress_filtered_frames", 2, 0},
  85         {"ingress_discarded_frames", 2, 1},
  86         {"ingress_nobuffer_discards", 2, 2},
  87         {"egress_discarded_frames", 2, 3},
  88         {"egress_confirmed_frames", 2, 4},
  89         {"cgr_reject_frames", 4, 0},
  90         {"cgr_reject_bytes", 4, 1},
  91 };
  92
  93 static const enum rte_filter_op dpaa2_supported_filter_ops[] = {
  94         RTE_ETH_FILTER_ADD,
  95         RTE_ETH_FILTER_DELETE,
  96         RTE_ETH_FILTER_UPDATE,
  97         RTE_ETH_FILTER_FLUSH,
  98         RTE_ETH_FILTER_GET
  99 };
 100
 101 static struct rte_dpaa2_driver rte_dpaa2_pmd;
 102 static int dpaa2_dev_uninit(struct rte_eth_dev *eth_dev);
 103 static int dpaa2_dev_link_update(struct rte_eth_dev *dev,
 104                                  int wait_to_complete);
 105 static int dpaa2_dev_set_link_up(struct rte_eth_dev *dev);
 106 static int dpaa2_dev_set_link_down(struct rte_eth_dev *dev);
 107 static int dpaa2_dev_mtu_set(struct rte_eth_dev *dev, uint16_t mtu);
 108
 109 int dpaa2_logtype_pmd;
 110
 111 void
 112 rte_pmd_dpaa2_set_timestamp(enum pmd_dpaa2_ts enable)
 113 {
 114         dpaa2_enable_ts = enable;
 115 }
 116
 117 static int
 118 dpaa2_vlan_filter_set(struct rte_eth_dev *dev, uint16_t vlan_id, int on)
 119 {
 120         int ret;
 121         struct dpaa2_dev_priv *priv = dev->data->dev_private;
 122         struct fsl_mc_io *dpni = dev->process_private;
 123
 124         PMD_INIT_FUNC_TRACE();
 125
 126         if (dpni == NULL) {
 127                 DPAA2_PMD_ERR("dpni is NULL");
 128                 return -1;
 129         }
 130
 131         if (on)
 132                 ret = dpni_add_vlan_id(dpni, CMD_PRI_LOW, priv->token,
 133                                        vlan_id, 0, 0, 0);
 134         else
 135                 ret = dpni_remove_vlan_id(dpni, CMD_PRI_LOW,
 136                                           priv->token, vlan_id);
 137
 138         if (ret < 0)
 139                 DPAA2_PMD_ERR("ret = %d Unable to add/rem vlan %d hwid =%d",
 140                               ret, vlan_id, priv->hw_id);
 141
 142         return ret;
 143 }
 144
 145 static int
 146 dpaa2_vlan_offload_set(struct rte_eth_dev *dev, int mask)
 147 {
 148         struct dpaa2_dev_priv *priv = dev->data->dev_private;
 149         struct fsl_mc_io *dpni = dev->process_private;
 150         int ret;
 151
 152         PMD_INIT_FUNC_TRACE();
 153
 154         if (mask & ETH_VLAN_FILTER_MASK) {
 155                 /* VLAN Filter not avaialble */
 156                 if (!priv->max_vlan_filters) {
 157                         DPAA2_PMD_INFO("VLAN filter not available");
 158                         goto next_mask;
 159                 }
 160
 161                 if (dev->data->dev_conf.rxmode.offloads &
 162                         DEV_RX_OFFLOAD_VLAN_FILTER)
 163                         ret = dpni_enable_vlan_filter(dpni, CMD_PRI_LOW,
 164                                                       priv->token, true);
 165                 else
 166                         ret = dpni_enable_vlan_filter(dpni, CMD_PRI_LOW,
 167                                                       priv->token, false);
 168                 if (ret < 0)
 169                         DPAA2_PMD_INFO("Unable to set vlan filter = %d", ret);
 170         }
 171 next_mask:
 172         if (mask & ETH_VLAN_EXTEND_MASK) {
 173                 if (dev->data->dev_conf.rxmode.offloads &
 174                         DEV_RX_OFFLOAD_VLAN_EXTEND)
 175                         DPAA2_PMD_INFO("VLAN extend offload not supported");
 176         }
 177
 178         return 0;
 179 }
 180
 181 static int
 182 dpaa2_vlan_tpid_set(struct rte_eth_dev *dev,
 183                       enum rte_vlan_type vlan_type __rte_unused,
 184                       uint16_t tpid)
 185 {
 186         struct dpaa2_dev_priv *priv = dev->data->dev_private;
 187         struct fsl_mc_io *dpni = dev->process_private;
 188         int ret = -ENOTSUP;
 189
 190         PMD_INIT_FUNC_TRACE();
 191
 192         /* nothing to be done for standard vlan tpids */
 193         if (tpid == 0x8100 || tpid == 0x88A8)
 194                 return 0;
 195
 196         ret = dpni_add_custom_tpid(dpni, CMD_PRI_LOW,
 197                                    priv->token, tpid);
 198         if (ret < 0)
 199                 DPAA2_PMD_INFO("Unable to set vlan tpid = %d", ret);
 200         /* if already configured tpids, remove them first */
 201         if (ret == -EBUSY) {
 202                 struct dpni_custom_tpid_cfg tpid_list = {0};
 203
 204                 ret = dpni_get_custom_tpid(dpni, CMD_PRI_LOW,
 205                                    priv->token, &tpid_list);
 206                 if (ret < 0)
 207                         goto fail;
 208                 ret = dpni_remove_custom_tpid(dpni, CMD_PRI_LOW,
 209                                    priv->token, tpid_list.tpid1);
 210                 if (ret < 0)
 211                         goto fail;
 212                 ret = dpni_add_custom_tpid(dpni, CMD_PRI_LOW,
 213                                            priv->token, tpid);
 214         }
 215 fail:
 216         return ret;
 217 }
 218
 219 static int
 220 dpaa2_fw_version_get(struct rte_eth_dev *dev,
 221                      char *fw_version,
 222                      size_t fw_size)
 223 {
 224         int ret;
 225         struct fsl_mc_io *dpni = dev->process_private;
 226         struct mc_soc_version mc_plat_info = {0};
 227         struct mc_version mc_ver_info = {0};
 228
 229         PMD_INIT_FUNC_TRACE();
 230
 231         if (mc_get_soc_version(dpni, CMD_PRI_LOW, &mc_plat_info))
 232                 DPAA2_PMD_WARN("\tmc_get_soc_version failed");
 233
 234         if (mc_get_version(dpni, CMD_PRI_LOW, &mc_ver_info))
 235                 DPAA2_PMD_WARN("\tmc_get_version failed");
 236
 237         ret = snprintf(fw_version, fw_size,
 238                        "%x-%d.%d.%d",
 239                        mc_plat_info.svr,
 240                        mc_ver_info.major,
 241                        mc_ver_info.minor,
 242                        mc_ver_info.revision);
 243
 244         ret += 1; /* add the size of '\0' */
 245         if (fw_size < (uint32_t)ret)
 246                 return ret;
 247         else
 248                 return 0;
 249 }
 250
 251 static int
 252 dpaa2_dev_info_get(struct rte_eth_dev *dev, struct rte_eth_dev_info *dev_info)
 253 {
 254         struct dpaa2_dev_priv *priv = dev->data->dev_private;
 255
 256         PMD_INIT_FUNC_TRACE();
 257
 258         dev_info->if_index = priv->hw_id;
 259
 260         dev_info->max_mac_addrs = priv->max_mac_filters;
 261         dev_info->max_rx_pktlen = DPAA2_MAX_RX_PKT_LEN;
 262         dev_info->min_rx_bufsize = DPAA2_MIN_RX_BUF_SIZE;
 263         dev_info->max_rx_queues = (uint16_t)priv->nb_rx_queues;
 264         dev_info->max_tx_queues = (uint16_t)priv->nb_tx_queues;
 265         dev_info->rx_offload_capa = dev_rx_offloads_sup |
 266                                         dev_rx_offloads_nodis;
 267         dev_info->tx_offload_capa = dev_tx_offloads_sup |
 268                                         dev_tx_offloads_nodis;
 269         dev_info->speed_capa = ETH_LINK_SPEED_1G |
 270                         ETH_LINK_SPEED_2_5G |
 271                         ETH_LINK_SPEED_10G;
 272
 273         dev_info->max_hash_mac_addrs = 0;
 274         dev_info->max_vfs = 0;
 275         dev_info->max_vmdq_pools = ETH_16_POOLS;
 276         dev_info->flow_type_rss_offloads = DPAA2_RSS_OFFLOAD_ALL;
 277
 278         return 0;
 279 }
 280
 281 static int
 282 dpaa2_alloc_rx_tx_queues(struct rte_eth_dev *dev)
 283 {
 284         struct dpaa2_dev_priv *priv = dev->data->dev_private;
 285         uint16_t dist_idx;
 286         uint32_t vq_id;
 287         uint8_t num_rxqueue_per_tc;
 288         struct dpaa2_queue *mc_q, *mcq;
 289         uint32_t tot_queues;
 290         int i;
 291         struct dpaa2_queue *dpaa2_q;
 292
 293         PMD_INIT_FUNC_TRACE();
 294
 295         num_rxqueue_per_tc = (priv->nb_rx_queues / priv->num_rx_tc);
 296         if (priv->tx_conf_en)
 297                 tot_queues = priv->nb_rx_queues + 2 * priv->nb_tx_queues;
 298         else
 299                 tot_queues = priv->nb_rx_queues + priv->nb_tx_queues;
 300         mc_q = rte_malloc(NULL, sizeof(struct dpaa2_queue) * tot_queues,
 301                           RTE_CACHE_LINE_SIZE);
 302         if (!mc_q) {
 303                 DPAA2_PMD_ERR("Memory allocation failed for rx/tx queues");
 304                 return -1;
 305         }
 306
 307         for (i = 0; i < priv->nb_rx_queues; i++) {
 308                 mc_q->eth_data = dev->data;
 309                 priv->rx_vq[i] = mc_q++;
 310                 dpaa2_q = (struct dpaa2_queue *)priv->rx_vq[i];
 311                 dpaa2_q->q_storage = rte_malloc("dq_storage",
 312                                         sizeof(struct queue_storage_info_t),
 313                                         RTE_CACHE_LINE_SIZE);
 314                 if (!dpaa2_q->q_storage)
 315                         goto fail;
 316
 317                 memset(dpaa2_q->q_storage, 0,
 318                        sizeof(struct queue_storage_info_t));
 319                 if (dpaa2_alloc_dq_storage(dpaa2_q->q_storage))
 320                         goto fail;
 321         }
 322
 323         for (i = 0; i < priv->nb_tx_queues; i++) {
 324                 mc_q->eth_data = dev->data;
 325                 mc_q->flow_id = 0xffff;
 326                 priv->tx_vq[i] = mc_q++;
 327                 dpaa2_q = (struct dpaa2_queue *)priv->tx_vq[i];
 328                 dpaa2_q->cscn = rte_malloc(NULL,
 329                                            sizeof(struct qbman_result), 16);
 330                 if (!dpaa2_q->cscn)
 331                         goto fail_tx;
 332         }
 333
 334         if (priv->tx_conf_en) {
 335                 /*Setup tx confirmation queues*/
 336                 for (i = 0; i < priv->nb_tx_queues; i++) {
 337                         mc_q->eth_data = dev->data;
 338                         mc_q->tc_index = i;
 339                         mc_q->flow_id = 0;
 340                         priv->tx_conf_vq[i] = mc_q++;
 341                         dpaa2_q = (struct dpaa2_queue *)priv->tx_conf_vq[i];
 342                         dpaa2_q->q_storage =
 343                                 rte_malloc("dq_storage",
 344                                         sizeof(struct queue_storage_info_t),
 345                                         RTE_CACHE_LINE_SIZE);
 346                         if (!dpaa2_q->q_storage)
 347                                 goto fail_tx_conf;
 348
 349                         memset(dpaa2_q->q_storage, 0,
 350                                sizeof(struct queue_storage_info_t));
 351                         if (dpaa2_alloc_dq_storage(dpaa2_q->q_storage))
 352                                 goto fail_tx_conf;
 353                 }
 354         }
 355
 356         vq_id = 0;
 357         for (dist_idx = 0; dist_idx < priv->nb_rx_queues; dist_idx++) {
 358                 mcq = (struct dpaa2_queue *)priv->rx_vq[vq_id];
 359                 mcq->tc_index = dist_idx / num_rxqueue_per_tc;
 360                 mcq->flow_id = dist_idx % num_rxqueue_per_tc;
 361                 vq_id++;
 362         }
 363
 364         return 0;
 365 fail_tx_conf:
 366         i -= 1;
 367         while (i >= 0) {
 368                 dpaa2_q = (struct dpaa2_queue *)priv->tx_conf_vq[i];
 369                 rte_free(dpaa2_q->q_storage);
 370                 priv->tx_conf_vq[i--] = NULL;
 371         }
 372         i = priv->nb_tx_queues;
 373 fail_tx:
 374         i -= 1;
 375         while (i >= 0) {
 376                 dpaa2_q = (struct dpaa2_queue *)priv->tx_vq[i];
 377                 rte_free(dpaa2_q->cscn);
 378                 priv->tx_vq[i--] = NULL;
 379         }
 380         i = priv->nb_rx_queues;
 381 fail:
 382         i -= 1;
 383         mc_q = priv->rx_vq[0];
 384         while (i >= 0) {
 385                 dpaa2_q = (struct dpaa2_queue *)priv->rx_vq[i];
 386                 dpaa2_free_dq_storage(dpaa2_q->q_storage);
 387                 rte_free(dpaa2_q->q_storage);
 388                 priv->rx_vq[i--] = NULL;
 389         }
 390         rte_free(mc_q);
 391         return -1;
 392 }
 393
 394 static void
 395 dpaa2_free_rx_tx_queues(struct rte_eth_dev *dev)
 396 {
 397         struct dpaa2_dev_priv *priv = dev->data->dev_private;
 398         struct dpaa2_queue *dpaa2_q;
 399         int i;
 400
 401         PMD_INIT_FUNC_TRACE();
 402
 403         /* Queue allocation base */
 404         if (priv->rx_vq[0]) {
 405                 /* cleaning up queue storage */
 406                 for (i = 0; i < priv->nb_rx_queues; i++) {
 407                         dpaa2_q = (struct dpaa2_queue *)priv->rx_vq[i];
 408                         if (dpaa2_q->q_storage)
 409                                 rte_free(dpaa2_q->q_storage);
 410                 }
 411                 /* cleanup tx queue cscn */
 412                 for (i = 0; i < priv->nb_tx_queues; i++) {
 413                         dpaa2_q = (struct dpaa2_queue *)priv->tx_vq[i];
 414                         rte_free(dpaa2_q->cscn);
 415                 }
 416                 if (priv->tx_conf_en) {
 417                         /* cleanup tx conf queue storage */
 418                         for (i = 0; i < priv->nb_tx_queues; i++) {
 419                                 dpaa2_q = (struct dpaa2_queue *)
 420                                                 priv->tx_conf_vq[i];
 421                                 rte_free(dpaa2_q->q_storage);
 422                         }
 423                 }
 424                 /*free memory for all queues (RX+TX) */
 425                 rte_free(priv->rx_vq[0]);
 426                 priv->rx_vq[0] = NULL;
 427         }
 428 }
 429
 430 static int
 431 dpaa2_eth_dev_configure(struct rte_eth_dev *dev)
 432 {
 433         struct dpaa2_dev_priv *priv = dev->data->dev_private;
 434         struct fsl_mc_io *dpni = dev->process_private;
 435         struct rte_eth_conf *eth_conf = &dev->data->dev_conf;
 436         uint64_t rx_offloads = eth_conf->rxmode.offloads;
 437         uint64_t tx_offloads = eth_conf->txmode.offloads;
 438         int rx_l3_csum_offload = false;
 439         int rx_l4_csum_offload = false;
 440         int tx_l3_csum_offload = false;
 441         int tx_l4_csum_offload = false;
 442         int ret;
 443
 444         PMD_INIT_FUNC_TRACE();
 445
 446         /* Rx offloads which are enabled by default */
 447         if (dev_rx_offloads_nodis & ~rx_offloads) {
 448                 DPAA2_PMD_INFO(
 449                 "Some of rx offloads enabled by default - requested 0x%" PRIx64
 450                 " fixed are 0x%" PRIx64,
 451                 rx_offloads, dev_rx_offloads_nodis);
 452         }
 453
 454         /* Tx offloads which are enabled by default */
 455         if (dev_tx_offloads_nodis & ~tx_offloads) {
 456                 DPAA2_PMD_INFO(
 457                 "Some of tx offloads enabled by default - requested 0x%" PRIx64
 458                 " fixed are 0x%" PRIx64,
 459                 tx_offloads, dev_tx_offloads_nodis);
 460         }
 461
 462         if (rx_offloads & DEV_RX_OFFLOAD_JUMBO_FRAME) {
 463                 if (eth_conf->rxmode.max_rx_pkt_len <= DPAA2_MAX_RX_PKT_LEN) {
 464                         ret = dpni_set_max_frame_length(dpni, CMD_PRI_LOW,
 465                                 priv->token, eth_conf->rxmode.max_rx_pkt_len
 466                                 - RTE_ETHER_CRC_LEN);
 467                         if (ret) {
 468                                 DPAA2_PMD_ERR(
 469                                         "Unable to set mtu. check config");
 470                                 return ret;
 471                         }
 472                         dev->data->mtu =
 473                                 dev->data->dev_conf.rxmode.max_rx_pkt_len -
 474                                 RTE_ETHER_HDR_LEN - RTE_ETHER_CRC_LEN -
 475                                 VLAN_TAG_SIZE;
 476                 } else {
 477                         return -1;
 478                 }
 479         }
 480
 481         if (eth_conf->rxmode.mq_mode == ETH_MQ_RX_RSS) {
 482                 ret = dpaa2_setup_flow_dist(dev,
 483                                 eth_conf->rx_adv_conf.rss_conf.rss_hf);
 484                 if (ret) {
 485                         DPAA2_PMD_ERR("Unable to set flow distribution."
 486                                       "Check queue config");
 487                         return ret;
 488                 }
 489         }
 490
 491         if (rx_offloads & DEV_RX_OFFLOAD_IPV4_CKSUM)
 492                 rx_l3_csum_offload = true;
 493
 494         if ((rx_offloads & DEV_RX_OFFLOAD_UDP_CKSUM) ||
 495                 (rx_offloads & DEV_RX_OFFLOAD_TCP_CKSUM) ||
 496                 (rx_offloads & DEV_RX_OFFLOAD_SCTP_CKSUM))
 497                 rx_l4_csum_offload = true;
 498
 499         ret = dpni_set_offload(dpni, CMD_PRI_LOW, priv->token,
 500                                DPNI_OFF_RX_L3_CSUM, rx_l3_csum_offload);
 501         if (ret) {
 502                 DPAA2_PMD_ERR("Error to set RX l3 csum:Error = %d", ret);
 503                 return ret;
 504         }
 505
 506         ret = dpni_set_offload(dpni, CMD_PRI_LOW, priv->token,
 507                                DPNI_OFF_RX_L4_CSUM, rx_l4_csum_offload);
 508         if (ret) {
 509                 DPAA2_PMD_ERR("Error to get RX l4 csum:Error = %d", ret);
 510                 return ret;
 511         }
 512
 513         if (rx_offloads & DEV_RX_OFFLOAD_TIMESTAMP)
 514                 dpaa2_enable_ts = true;
 515
 516         if (tx_offloads & DEV_TX_OFFLOAD_IPV4_CKSUM)
 517                 tx_l3_csum_offload = true;
 518
 519         if ((tx_offloads & DEV_TX_OFFLOAD_UDP_CKSUM) ||
 520                 (tx_offloads & DEV_TX_OFFLOAD_TCP_CKSUM) ||
 521                 (tx_offloads & DEV_TX_OFFLOAD_SCTP_CKSUM))
 522                 tx_l4_csum_offload = true;
 523
 524         ret = dpni_set_offload(dpni, CMD_PRI_LOW, priv->token,
 525                                DPNI_OFF_TX_L3_CSUM, tx_l3_csum_offload);
 526         if (ret) {
 527                 DPAA2_PMD_ERR("Error to set TX l3 csum:Error = %d", ret);
 528                 return ret;
 529         }
 530
 531         ret = dpni_set_offload(dpni, CMD_PRI_LOW, priv->token,
 532                                DPNI_OFF_TX_L4_CSUM, tx_l4_csum_offload);
 533         if (ret) {
 534                 DPAA2_PMD_ERR("Error to get TX l4 csum:Error = %d", ret);
 535                 return ret;
 536         }
 537
 538         /* Enabling hash results in FD requires setting DPNI_FLCTYPE_HASH in
 539          * dpni_set_offload API. Setting this FLCTYPE for DPNI sets the FD[SC]
 540          * to 0 for LS2 in the hardware thus disabling data/annotation
 541          * stashing. For LX2 this is fixed in hardware and thus hash result and
 542          * parse results can be received in FD using this option.
 543          */
 544         if (dpaa2_svr_family == SVR_LX2160A) {
 545                 ret = dpni_set_offload(dpni, CMD_PRI_LOW, priv->token,
 546                                        DPNI_FLCTYPE_HASH, true);
 547                 if (ret) {
 548                         DPAA2_PMD_ERR("Error setting FLCTYPE: Err = %d", ret);
 549                         return ret;
 550                 }
 551         }
 552
 553         if (rx_offloads & DEV_RX_OFFLOAD_VLAN_FILTER)
 554                 dpaa2_vlan_offload_set(dev, ETH_VLAN_FILTER_MASK);
 555
 556         /* update the current status */
 557         dpaa2_dev_link_update(dev, 0);
 558
 559         return 0;
 560 }
 561
 562 /* Function to setup RX flow information. It contains traffic class ID,
 563  * flow ID, destination configuration etc.
 564  */
 565 static int
 566 dpaa2_dev_rx_queue_setup(struct rte_eth_dev *dev,
 567                          uint16_t rx_queue_id,
 568                          uint16_t nb_rx_desc,
 569                          unsigned int socket_id __rte_unused,
 570                          const struct rte_eth_rxconf *rx_conf __rte_unused,
 571                          struct rte_mempool *mb_pool)
 572 {
 573         struct dpaa2_dev_priv *priv = dev->data->dev_private;
 574         struct fsl_mc_io *dpni = (struct fsl_mc_io *)dev->process_private;
 575         struct dpaa2_queue *dpaa2_q;
 576         struct dpni_queue cfg;
 577         uint8_t options = 0;
 578         uint8_t flow_id;
 579         uint32_t bpid;
 580         int i, ret;
 581
 582         PMD_INIT_FUNC_TRACE();
 583
 584         DPAA2_PMD_DEBUG("dev =%p, queue =%d, pool = %p, conf =%p",
 585                         dev, rx_queue_id, mb_pool, rx_conf);
 586
 587         if (!priv->bp_list || priv->bp_list->mp != mb_pool) {
 588                 bpid = mempool_to_bpid(mb_pool);
 589                 ret = dpaa2_attach_bp_list(priv,
 590                                            rte_dpaa2_bpid_info[bpid].bp_list);
 591                 if (ret)
 592                         return ret;
 593         }
 594         dpaa2_q = (struct dpaa2_queue *)priv->rx_vq[rx_queue_id];
 595         dpaa2_q->mb_pool = mb_pool; /**< mbuf pool to populate RX ring. */
 596         dpaa2_q->bp_array = rte_dpaa2_bpid_info;
 597
 598         /*Get the flow id from given VQ id*/
 599         flow_id = dpaa2_q->flow_id;
 600         memset(&cfg, 0, sizeof(struct dpni_queue));
 601
 602         options = options | DPNI_QUEUE_OPT_USER_CTX;
 603         cfg.user_context = (size_t)(dpaa2_q);
 604
 605         /* check if a private cgr available. */
 606         for (i = 0; i < priv->max_cgs; i++) {
 607                 if (!priv->cgid_in_use[i]) {
 608                         priv->cgid_in_use[i] = 1;
 609                         break;
 610                 }
 611         }
 612
 613         if (i < priv->max_cgs) {
 614                 options |= DPNI_QUEUE_OPT_SET_CGID;
 615                 cfg.cgid = i;
 616                 dpaa2_q->cgid = cfg.cgid;
 617         } else {
 618                 dpaa2_q->cgid = 0xff;
 619         }
 620
 621         /*if ls2088 or rev2 device, enable the stashing */
 622
 623         if ((dpaa2_svr_family & 0xffff0000) != SVR_LS2080A) {
 624                 options |= DPNI_QUEUE_OPT_FLC;
 625                 cfg.flc.stash_control = true;
 626                 cfg.flc.value &= 0xFFFFFFFFFFFFFFC0;
 627                 /* 00 00 00 - last 6 bit represent annotation, context stashing,
 628                  * data stashing setting 01 01 00 (0x14)
 629                  * (in following order ->DS AS CS)
 630                  * to enable 1 line data, 1 line annotation.
 631                  * For LX2, this setting should be 01 00 00 (0x10)
 632                  */
 633                 if ((dpaa2_svr_family & 0xffff0000) == SVR_LX2160A)
 634                         cfg.flc.value |= 0x10;
 635                 else
 636                         cfg.flc.value |= 0x14;
 637         }
 638         ret = dpni_set_queue(dpni, CMD_PRI_LOW, priv->token, DPNI_QUEUE_RX,
 639                              dpaa2_q->tc_index, flow_id, options, &cfg);
 640         if (ret) {
 641                 DPAA2_PMD_ERR("Error in setting the rx flow: = %d", ret);
 642                 return -1;
 643         }
 644
 645         if (!(priv->flags & DPAA2_RX_TAILDROP_OFF)) {
 646                 struct dpni_taildrop taildrop;
 647
 648                 taildrop.enable = 1;
 649
 650                 /* Private CGR will use tail drop length as nb_rx_desc.
 651                  * for rest cases we can use standard byte based tail drop.
 652                  * There is no HW restriction, but number of CGRs are limited,
 653                  * hence this restriction is placed.
 654                  */
 655                 if (dpaa2_q->cgid != 0xff) {
 656                         /*enabling per rx queue congestion control */
 657                         taildrop.threshold = nb_rx_desc;
 658                         taildrop.units = DPNI_CONGESTION_UNIT_FRAMES;
 659                         taildrop.oal = 0;
 660                         DPAA2_PMD_DEBUG("Enabling CG Tail Drop on queue = %d",
 661                                         rx_queue_id);
 662                         ret = dpni_set_taildrop(dpni, CMD_PRI_LOW, priv->token,
 663                                                 DPNI_CP_CONGESTION_GROUP,
 664                                                 DPNI_QUEUE_RX,
 665                                                 dpaa2_q->tc_index,
 666                                                 flow_id, &taildrop);
 667                 } else {
 668                         /*enabling per rx queue congestion control */
 669                         taildrop.threshold = CONG_THRESHOLD_RX_BYTES_Q;
 670                         taildrop.units = DPNI_CONGESTION_UNIT_BYTES;
 671                         taildrop.oal = CONG_RX_OAL;
 672                         DPAA2_PMD_DEBUG("Enabling Byte based Drop on queue= %d",
 673                                         rx_queue_id);
 674                         ret = dpni_set_taildrop(dpni, CMD_PRI_LOW, priv->token,
 675                                                 DPNI_CP_QUEUE, DPNI_QUEUE_RX,
 676                                                 dpaa2_q->tc_index, flow_id,
 677                                                 &taildrop);
 678                 }
 679                 if (ret) {
 680                         DPAA2_PMD_ERR("Error in setting taildrop. err=(%d)",
 681                                       ret);
 682                         return -1;
 683                 }
 684         } else { /* Disable tail Drop */
 685                 struct dpni_taildrop taildrop = {0};
 686                 DPAA2_PMD_INFO("Tail drop is disabled on queue");
 687
 688                 taildrop.enable = 0;
 689                 if (dpaa2_q->cgid != 0xff) {
 690                         ret = dpni_set_taildrop(dpni, CMD_PRI_LOW, priv->token,
 691                                         DPNI_CP_CONGESTION_GROUP, DPNI_QUEUE_RX,
 692                                         dpaa2_q->tc_index,
 693                                         flow_id, &taildrop);
 694                 } else {
 695                         ret = dpni_set_taildrop(dpni, CMD_PRI_LOW, priv->token,
 696                                         DPNI_CP_QUEUE, DPNI_QUEUE_RX,
 697                                         dpaa2_q->tc_index, flow_id, &taildrop);
 698                 }
 699                 if (ret) {
 700                         DPAA2_PMD_ERR("Error in setting taildrop. err=(%d)",
 701                                       ret);
 702                         return -1;
 703                 }
 704         }
 705
 706         dev->data->rx_queues[rx_queue_id] = dpaa2_q;
 707         return 0;
 708 }
 709
 710 static int
 711 dpaa2_dev_tx_queue_setup(struct rte_eth_dev *dev,
 712                          uint16_t tx_queue_id,
 713                          uint16_t nb_tx_desc __rte_unused,
 714                          unsigned int socket_id __rte_unused,
 715                          const struct rte_eth_txconf *tx_conf __rte_unused)
 716 {
 717         struct dpaa2_dev_priv *priv = dev->data->dev_private;
 718         struct dpaa2_queue *dpaa2_q = (struct dpaa2_queue *)
 719                 priv->tx_vq[tx_queue_id];
 720         struct dpaa2_queue *dpaa2_tx_conf_q = (struct dpaa2_queue *)
 721                 priv->tx_conf_vq[tx_queue_id];
 722         struct fsl_mc_io *dpni = dev->process_private;
 723         struct dpni_queue tx_conf_cfg;
 724         struct dpni_queue tx_flow_cfg;
 725         uint8_t options = 0, flow_id;
 726         struct dpni_queue_id qid;
 727         uint32_t tc_id;
 728         int ret;
 729
 730         PMD_INIT_FUNC_TRACE();
 731
 732         /* Return if queue already configured */
 733         if (dpaa2_q->flow_id != 0xffff) {
 734                 dev->data->tx_queues[tx_queue_id] = dpaa2_q;
 735                 return 0;
 736         }
 737
 738         memset(&tx_conf_cfg, 0, sizeof(struct dpni_queue));
 739         memset(&tx_flow_cfg, 0, sizeof(struct dpni_queue));
 740
 741         tc_id = tx_queue_id;
 742         flow_id = 0;
 743
 744         ret = dpni_set_queue(dpni, CMD_PRI_LOW, priv->token, DPNI_QUEUE_TX,
 745                              tc_id, flow_id, options, &tx_flow_cfg);
 746         if (ret) {
 747                 DPAA2_PMD_ERR("Error in setting the tx flow: "
 748                               "tc_id=%d, flow=%d err=%d",
 749                               tc_id, flow_id, ret);
 750                         return -1;
 751         }
 752
 753         dpaa2_q->flow_id = flow_id;
 754
 755         if (tx_queue_id == 0) {
 756                 /*Set tx-conf and error configuration*/
 757                 if (priv->tx_conf_en)
 758                         ret = dpni_set_tx_confirmation_mode(dpni, CMD_PRI_LOW,
 759                                                             priv->token,
 760                                                             DPNI_CONF_AFFINE);
 761                 else
 762                         ret = dpni_set_tx_confirmation_mode(dpni, CMD_PRI_LOW,
 763                                                             priv->token,
 764                                                             DPNI_CONF_DISABLE);
 765                 if (ret) {
 766                         DPAA2_PMD_ERR("Error in set tx conf mode settings: "
 767                                       "err=%d", ret);
 768                         return -1;
 769                 }
 770         }
 771         dpaa2_q->tc_index = tc_id;
 772
 773         ret = dpni_get_queue(dpni, CMD_PRI_LOW, priv->token,
 774                              DPNI_QUEUE_TX, dpaa2_q->tc_index,
 775                              dpaa2_q->flow_id, &tx_flow_cfg, &qid);
 776         if (ret) {
 777                 DPAA2_PMD_ERR("Error in getting LFQID err=%d", ret);
 778                 return -1;
 779         }
 780         dpaa2_q->fqid = qid.fqid;
 781
 782         if (!(priv->flags & DPAA2_TX_CGR_OFF)) {
 783                 struct dpni_congestion_notification_cfg cong_notif_cfg = {0};
 784
 785                 cong_notif_cfg.units = DPNI_CONGESTION_UNIT_FRAMES;
 786                 cong_notif_cfg.threshold_entry = CONG_ENTER_TX_THRESHOLD;
 787                 /* Notify that the queue is not congested when the data in
 788                  * the queue is below this thershold.
 789                  */
 790                 cong_notif_cfg.threshold_exit = CONG_EXIT_TX_THRESHOLD;
 791                 cong_notif_cfg.message_ctx = 0;
 792                 cong_notif_cfg.message_iova =
 793                                 (size_t)DPAA2_VADDR_TO_IOVA(dpaa2_q->cscn);
 794                 cong_notif_cfg.dest_cfg.dest_type = DPNI_DEST_NONE;
 795                 cong_notif_cfg.notification_mode =
 796                                          DPNI_CONG_OPT_WRITE_MEM_ON_ENTER |
 797                                          DPNI_CONG_OPT_WRITE_MEM_ON_EXIT |
 798                                          DPNI_CONG_OPT_COHERENT_WRITE;
 799                 cong_notif_cfg.cg_point = DPNI_CP_QUEUE;
 800
 801                 ret = dpni_set_congestion_notification(dpni, CMD_PRI_LOW,
 802                                                        priv->token,
 803                                                        DPNI_QUEUE_TX,
 804                                                        tc_id,
 805                                                        &cong_notif_cfg);
 806                 if (ret) {
 807                         DPAA2_PMD_ERR(
 808                            "Error in setting tx congestion notification: "
 809                            "err=%d", ret);
 810                         return -ret;
 811                 }
 812         }
 813         dpaa2_q->cb_eqresp_free = dpaa2_dev_free_eqresp_buf;
 814         dev->data->tx_queues[tx_queue_id] = dpaa2_q;
 815
 816         if (priv->tx_conf_en) {
 817                 dpaa2_q->tx_conf_queue = dpaa2_tx_conf_q;
 818                 options = options | DPNI_QUEUE_OPT_USER_CTX;
 819                 tx_conf_cfg.user_context = (size_t)(dpaa2_q);
 820                 ret = dpni_set_queue(dpni, CMD_PRI_LOW, priv->token,
 821                              DPNI_QUEUE_TX_CONFIRM, dpaa2_tx_conf_q->tc_index,
 822                              dpaa2_tx_conf_q->flow_id, options, &tx_conf_cfg);
 823                 if (ret) {
 824                         DPAA2_PMD_ERR("Error in setting the tx conf flow: "
 825                               "tc_index=%d, flow=%d err=%d",
 826                               dpaa2_tx_conf_q->tc_index,
 827                               dpaa2_tx_conf_q->flow_id, ret);
 828                         return -1;
 829                 }
 830
 831                 ret = dpni_get_queue(dpni, CMD_PRI_LOW, priv->token,
 832                              DPNI_QUEUE_TX_CONFIRM, dpaa2_tx_conf_q->tc_index,
 833                              dpaa2_tx_conf_q->flow_id, &tx_conf_cfg, &qid);
 834                 if (ret) {
 835                         DPAA2_PMD_ERR("Error in getting LFQID err=%d", ret);
 836                         return -1;
 837                 }
 838                 dpaa2_tx_conf_q->fqid = qid.fqid;
 839         }
 840         return 0;
 841 }
 842
 843 static void
 844 dpaa2_dev_rx_queue_release(void *q __rte_unused)
 845 {
 846         struct dpaa2_queue *dpaa2_q = (struct dpaa2_queue *)q;
 847         struct dpaa2_dev_priv *priv = dpaa2_q->eth_data->dev_private;
 848         struct fsl_mc_io *dpni =
 849                 (struct fsl_mc_io *)priv->eth_dev->process_private;
 850         uint8_t options = 0;
 851         int ret;
 852         struct dpni_queue cfg;
 853
 854         memset(&cfg, 0, sizeof(struct dpni_queue));
 855         PMD_INIT_FUNC_TRACE();
 856         if (dpaa2_q->cgid != 0xff) {
 857                 options = DPNI_QUEUE_OPT_CLEAR_CGID;
 858                 cfg.cgid = dpaa2_q->cgid;
 859
 860                 ret = dpni_set_queue(dpni, CMD_PRI_LOW, priv->token,
 861                                      DPNI_QUEUE_RX,
 862                                      dpaa2_q->tc_index, dpaa2_q->flow_id,
 863                                      options, &cfg);
 864                 if (ret)
 865                         DPAA2_PMD_ERR("Unable to clear CGR from q=%u err=%d",
 866                                         dpaa2_q->fqid, ret);
 867                 priv->cgid_in_use[dpaa2_q->cgid] = 0;
 868                 dpaa2_q->cgid = 0xff;
 869         }
 870 }
 871
 872 static void
 873 dpaa2_dev_tx_queue_release(void *q __rte_unused)
 874 {
 875         PMD_INIT_FUNC_TRACE();
 876 }
 877
 878 static uint32_t
 879 dpaa2_dev_rx_queue_count(struct rte_eth_dev *dev, uint16_t rx_queue_id)
 880 {
 881         int32_t ret;
 882         struct dpaa2_dev_priv *priv = dev->data->dev_private;
 883         struct dpaa2_queue *dpaa2_q;
 884         struct qbman_swp *swp;
 885         struct qbman_fq_query_np_rslt state;
 886         uint32_t frame_cnt = 0;
 887
 888         PMD_INIT_FUNC_TRACE();
 889
 890         if (unlikely(!DPAA2_PER_LCORE_DPIO)) {
 891                 ret = dpaa2_affine_qbman_swp();
 892                 if (ret) {
 893                         DPAA2_PMD_ERR("Failure in affining portal");
 894                         return -EINVAL;
 895                 }
 896         }
 897         swp = DPAA2_PER_LCORE_PORTAL;
 898
 899         dpaa2_q = (struct dpaa2_queue *)priv->rx_vq[rx_queue_id];
 900
 901         if (qbman_fq_query_state(swp, dpaa2_q->fqid, &state) == 0) {
 902                 frame_cnt = qbman_fq_state_frame_count(&state);
 903                 DPAA2_PMD_DEBUG("RX frame count for q(%d) is %u",
 904                                 rx_queue_id, frame_cnt);
 905         }
 906         return frame_cnt;
 907 }
 908
 909 static const uint32_t *
 910 dpaa2_supported_ptypes_get(struct rte_eth_dev *dev)
 911 {
 912         static const uint32_t ptypes[] = {
 913                 /*todo -= add more types */
 914                 RTE_PTYPE_L2_ETHER,
 915                 RTE_PTYPE_L3_IPV4,
 916                 RTE_PTYPE_L3_IPV4_EXT,
 917                 RTE_PTYPE_L3_IPV6,
 918                 RTE_PTYPE_L3_IPV6_EXT,
 919                 RTE_PTYPE_L4_TCP,
 920                 RTE_PTYPE_L4_UDP,
 921                 RTE_PTYPE_L4_SCTP,
 922                 RTE_PTYPE_L4_ICMP,
 923                 RTE_PTYPE_UNKNOWN
 924         };
 925
 926         if (dev->rx_pkt_burst == dpaa2_dev_prefetch_rx ||
 927                 dev->rx_pkt_burst == dpaa2_dev_rx ||
 928                 dev->rx_pkt_burst == dpaa2_dev_loopback_rx)
 929                 return ptypes;
 930         return NULL;
 931 }
 932
 933 /**
 934  * Dpaa2 link Interrupt handler
 935  *
 936  * @param param
 937  *  The address of parameter (struct rte_eth_dev *) regsitered before.
 938  *
 939  * @return
 940  *  void
 941  */
 942 static void
 943 dpaa2_interrupt_handler(void *param)
 944 {
 945         struct rte_eth_dev *dev = param;
 946         struct dpaa2_dev_priv *priv = dev->data->dev_private;
 947         struct fsl_mc_io *dpni = (struct fsl_mc_io *)dev->process_private;
 948         int ret;
 949         int irq_index = DPNI_IRQ_INDEX;
 950         unsigned int status = 0, clear = 0;
 951
 952         PMD_INIT_FUNC_TRACE();
 953
 954         if (dpni == NULL) {
 955                 DPAA2_PMD_ERR("dpni is NULL");
 956                 return;
 957         }
 958
 959         ret = dpni_get_irq_status(dpni, CMD_PRI_LOW, priv->token,
 960                                   irq_index, &status);
 961         if (unlikely(ret)) {
 962                 DPAA2_PMD_ERR("Can't get irq status (err %d)", ret);
 963                 clear = 0xffffffff;
 964                 goto out;
 965         }
 966
 967         if (status & DPNI_IRQ_EVENT_LINK_CHANGED) {
 968                 clear = DPNI_IRQ_EVENT_LINK_CHANGED;
 969                 dpaa2_dev_link_update(dev, 0);
 970                 /* calling all the apps registered for link status event */
 971                 _rte_eth_dev_callback_process(dev, RTE_ETH_EVENT_INTR_LSC,
 972                                               NULL);
 973         }
 974 out:
 975         ret = dpni_clear_irq_status(dpni, CMD_PRI_LOW, priv->token,
 976                                     irq_index, clear);
 977         if (unlikely(ret))
 978                 DPAA2_PMD_ERR("Can't clear irq status (err %d)", ret);
 979 }
 980
 981 static int
 982 dpaa2_eth_setup_irqs(struct rte_eth_dev *dev, int enable)
 983 {
 984         int err = 0;
 985         struct dpaa2_dev_priv *priv = dev->data->dev_private;
 986         struct fsl_mc_io *dpni = (struct fsl_mc_io *)dev->process_private;
 987         int irq_index = DPNI_IRQ_INDEX;
 988         unsigned int mask = DPNI_IRQ_EVENT_LINK_CHANGED;
 989
 990         PMD_INIT_FUNC_TRACE();
 991
 992         err = dpni_set_irq_mask(dpni, CMD_PRI_LOW, priv->token,
 993                                 irq_index, mask);
 994         if (err < 0) {
 995                 DPAA2_PMD_ERR("Error: dpni_set_irq_mask():%d (%s)", err,
 996                               strerror(-err));
 997                 return err;
 998         }
 999
1000         err = dpni_set_irq_enable(dpni, CMD_PRI_LOW, priv->token,
1001                                   irq_index, enable);
1002         if (err < 0)
1003                 DPAA2_PMD_ERR("Error: dpni_set_irq_enable():%d (%s)", err,
1004                               strerror(-err));
1005
1006         return err;
1007 }
1008
1009 static int
1010 dpaa2_dev_start(struct rte_eth_dev *dev)
1011 {
1012         struct rte_device *rdev = dev->device;
1013         struct rte_dpaa2_device *dpaa2_dev;
1014         struct rte_eth_dev_data *data = dev->data;
1015         struct dpaa2_dev_priv *priv = data->dev_private;
1016         struct fsl_mc_io *dpni = (struct fsl_mc_io *)dev->process_private;
1017         struct dpni_queue cfg;
1018         struct dpni_error_cfg   err_cfg;
1019         uint16_t qdid;
1020         struct dpni_queue_id qid;
1021         struct dpaa2_queue *dpaa2_q;
1022         int ret, i;
1023         struct rte_intr_handle *intr_handle;
1024
1025         dpaa2_dev = container_of(rdev, struct rte_dpaa2_device, device);
1026         intr_handle = &dpaa2_dev->intr_handle;
1027
1028         PMD_INIT_FUNC_TRACE();
1029
1030         ret = dpni_enable(dpni, CMD_PRI_LOW, priv->token);
1031         if (ret) {
1032                 DPAA2_PMD_ERR("Failure in enabling dpni %d device: err=%d",
1033                               priv->hw_id, ret);
1034                 return ret;
1035         }
1036
1037         /* Power up the phy. Needed to make the link go UP */
1038         dpaa2_dev_set_link_up(dev);
1039
1040         ret = dpni_get_qdid(dpni, CMD_PRI_LOW, priv->token,
1041                             DPNI_QUEUE_TX, &qdid);
1042         if (ret) {
1043                 DPAA2_PMD_ERR("Error in getting qdid: err=%d", ret);
1044                 return ret;
1045         }
1046         priv->qdid = qdid;
1047
1048         for (i = 0; i < data->nb_rx_queues; i++) {
1049                 dpaa2_q = (struct dpaa2_queue *)data->rx_queues[i];
1050                 ret = dpni_get_queue(dpni, CMD_PRI_LOW, priv->token,
1051                                      DPNI_QUEUE_RX, dpaa2_q->tc_index,
1052                                        dpaa2_q->flow_id, &cfg, &qid);
1053                 if (ret) {
1054                         DPAA2_PMD_ERR("Error in getting flow information: "
1055                                       "err=%d", ret);
1056                         return ret;
1057                 }
1058                 dpaa2_q->fqid = qid.fqid;
1059         }
1060
1061         /*checksum errors, send them to normal path and set it in annotation */
1062         err_cfg.errors = DPNI_ERROR_L3CE | DPNI_ERROR_L4CE;
1063         err_cfg.errors |= DPNI_ERROR_PHE;
1064
1065         err_cfg.error_action = DPNI_ERROR_ACTION_CONTINUE;
1066         err_cfg.set_frame_annotation = true;
1067
1068         ret = dpni_set_errors_behavior(dpni, CMD_PRI_LOW,
1069                                        priv->token, &err_cfg);
1070         if (ret) {
1071                 DPAA2_PMD_ERR("Error to dpni_set_errors_behavior: code = %d",
1072                               ret);
1073                 return ret;
1074         }
1075
1076         /* if the interrupts were configured on this devices*/
1077         if (intr_handle && (intr_handle->fd) &&
1078             (dev->data->dev_conf.intr_conf.lsc != 0)) {
1079                 /* Registering LSC interrupt handler */
1080                 rte_intr_callback_register(intr_handle,
1081                                            dpaa2_interrupt_handler,
1082                                            (void *)dev);
1083
1084                 /* enable vfio intr/eventfd mapping
1085                  * Interrupt index 0 is required, so we can not use
1086                  * rte_intr_enable.
1087                  */
1088                 rte_dpaa2_intr_enable(intr_handle, DPNI_IRQ_INDEX);
1089
1090                 /* enable dpni_irqs */
1091                 dpaa2_eth_setup_irqs(dev, 1);
1092         }
1093
1094         /* Change the tx burst function if ordered queues are used */
1095         if (priv->en_ordered)
1096                 dev->tx_pkt_burst = dpaa2_dev_tx_ordered;
1097
1098         return 0;
1099 }
1100
1101 /**
1102  *  This routine disables all traffic on the adapter by issuing a
1103  *  global reset on the MAC.
1104  */
1105 static void
1106 dpaa2_dev_stop(struct rte_eth_dev *dev)
1107 {
1108         struct dpaa2_dev_priv *priv = dev->data->dev_private;
1109         struct fsl_mc_io *dpni = (struct fsl_mc_io *)dev->process_private;
1110         int ret;
1111         struct rte_eth_link link;
1112         struct rte_intr_handle *intr_handle = dev->intr_handle;
1113
1114         PMD_INIT_FUNC_TRACE();
1115
1116         /* reset interrupt callback  */
1117         if (intr_handle && (intr_handle->fd) &&
1118             (dev->data->dev_conf.intr_conf.lsc != 0)) {
1119                 /*disable dpni irqs */
1120                 dpaa2_eth_setup_irqs(dev, 0);
1121
1122                 /* disable vfio intr before callback unregister */
1123                 rte_dpaa2_intr_disable(intr_handle, DPNI_IRQ_INDEX);
1124
1125                 /* Unregistering LSC interrupt handler */
1126                 rte_intr_callback_unregister(intr_handle,
1127                                              dpaa2_interrupt_handler,
1128                                              (void *)dev);
1129         }
1130
1131         dpaa2_dev_set_link_down(dev);
1132
1133         ret = dpni_disable(dpni, CMD_PRI_LOW, priv->token);
1134         if (ret) {
1135                 DPAA2_PMD_ERR("Failure (ret %d) in disabling dpni %d dev",
1136                               ret, priv->hw_id);
1137                 return;
1138         }
1139
1140         /* clear the recorded link status */
1141         memset(&link, 0, sizeof(link));
1142         rte_eth_linkstatus_set(dev, &link);
1143 }
1144
1145 static void
1146 dpaa2_dev_close(struct rte_eth_dev *dev)
1147 {
1148         struct dpaa2_dev_priv *priv = dev->data->dev_private;
1149         struct fsl_mc_io *dpni = (struct fsl_mc_io *)dev->process_private;
1150         int ret;
1151         struct rte_eth_link link;
1152
1153         PMD_INIT_FUNC_TRACE();
1154
1155         dpaa2_flow_clean(dev);
1156
1157         /* Clean the device first */
1158         ret = dpni_reset(dpni, CMD_PRI_LOW, priv->token);
1159         if (ret) {
1160                 DPAA2_PMD_ERR("Failure cleaning dpni device: err=%d", ret);
1161                 return;
1162         }
1163
1164         memset(&link, 0, sizeof(link));
1165         rte_eth_linkstatus_set(dev, &link);
1166 }
1167
1168 static int
1169 dpaa2_dev_promiscuous_enable(
1170                 struct rte_eth_dev *dev)
1171 {
1172         int ret;
1173         struct dpaa2_dev_priv *priv = dev->data->dev_private;
1174         struct fsl_mc_io *dpni = (struct fsl_mc_io *)dev->process_private;
1175
1176         PMD_INIT_FUNC_TRACE();
1177
1178         if (dpni == NULL) {
1179                 DPAA2_PMD_ERR("dpni is NULL");
1180                 return -ENODEV;
1181         }
1182
1183         ret = dpni_set_unicast_promisc(dpni, CMD_PRI_LOW, priv->token, true);
1184         if (ret < 0)
1185                 DPAA2_PMD_ERR("Unable to enable U promisc mode %d", ret);
1186
1187         ret = dpni_set_multicast_promisc(dpni, CMD_PRI_LOW, priv->token, true);
1188         if (ret < 0)
1189                 DPAA2_PMD_ERR("Unable to enable M promisc mode %d", ret);
1190
1191         return ret;
1192 }
1193
1194 static int
1195 dpaa2_dev_promiscuous_disable(
1196                 struct rte_eth_dev *dev)
1197 {
1198         int ret;
1199         struct dpaa2_dev_priv *priv = dev->data->dev_private;
1200         struct fsl_mc_io *dpni = (struct fsl_mc_io *)dev->process_private;
1201
1202         PMD_INIT_FUNC_TRACE();
1203
1204         if (dpni == NULL) {
1205                 DPAA2_PMD_ERR("dpni is NULL");
1206                 return -ENODEV;
1207         }
1208
1209         ret = dpni_set_unicast_promisc(dpni, CMD_PRI_LOW, priv->token, false);
1210         if (ret < 0)
1211                 DPAA2_PMD_ERR("Unable to disable U promisc mode %d", ret);
1212
1213         if (dev->data->all_multicast == 0) {
1214                 ret = dpni_set_multicast_promisc(dpni, CMD_PRI_LOW,
1215                                                  priv->token, false);
1216                 if (ret < 0)
1217                         DPAA2_PMD_ERR("Unable to disable M promisc mode %d",
1218                                       ret);
1219         }
1220
1221         return ret;
1222 }
1223
1224 static int
1225 dpaa2_dev_allmulticast_enable(
1226                 struct rte_eth_dev *dev)
1227 {
1228         int ret;
1229         struct dpaa2_dev_priv *priv = dev->data->dev_private;
1230         struct fsl_mc_io *dpni = (struct fsl_mc_io *)dev->process_private;
1231
1232         PMD_INIT_FUNC_TRACE();
1233
1234         if (dpni == NULL) {
1235                 DPAA2_PMD_ERR("dpni is NULL");
1236                 return -ENODEV;
1237         }
1238
1239         ret = dpni_set_multicast_promisc(dpni, CMD_PRI_LOW, priv->token, true);
1240         if (ret < 0)
1241                 DPAA2_PMD_ERR("Unable to enable multicast mode %d", ret);
1242
1243         return ret;
1244 }
1245
1246 static int
1247 dpaa2_dev_allmulticast_disable(struct rte_eth_dev *dev)
1248 {
1249         int ret;
1250         struct dpaa2_dev_priv *priv = dev->data->dev_private;
1251         struct fsl_mc_io *dpni = (struct fsl_mc_io *)dev->process_private;
1252
1253         PMD_INIT_FUNC_TRACE();
1254
1255         if (dpni == NULL) {
1256                 DPAA2_PMD_ERR("dpni is NULL");
1257                 return -ENODEV;
1258         }
1259
1260         /* must remain on for all promiscuous */
1261         if (dev->data->promiscuous == 1)
1262                 return 0;
1263
1264         ret = dpni_set_multicast_promisc(dpni, CMD_PRI_LOW, priv->token, false);
1265         if (ret < 0)
1266                 DPAA2_PMD_ERR("Unable to disable multicast mode %d", ret);
1267
1268         return ret;
1269 }
1270
1271 static int
1272 dpaa2_dev_mtu_set(struct rte_eth_dev *dev, uint16_t mtu)
1273 {
1274         int ret;
1275         struct dpaa2_dev_priv *priv = dev->data->dev_private;
1276         struct fsl_mc_io *dpni = (struct fsl_mc_io *)dev->process_private;
1277         uint32_t frame_size = mtu + RTE_ETHER_HDR_LEN + RTE_ETHER_CRC_LEN
1278                                 + VLAN_TAG_SIZE;
1279
1280         PMD_INIT_FUNC_TRACE();
1281
1282         if (dpni == NULL) {
1283                 DPAA2_PMD_ERR("dpni is NULL");
1284                 return -EINVAL;
1285         }
1286
1287         /* check that mtu is within the allowed range */
1288         if (mtu < RTE_ETHER_MIN_MTU || frame_size > DPAA2_MAX_RX_PKT_LEN)
1289                 return -EINVAL;
1290
1291         if (frame_size > RTE_ETHER_MAX_LEN)
1292                 dev->data->dev_conf.rxmode.offloads |=
1293                                                 DEV_RX_OFFLOAD_JUMBO_FRAME;
1294         else
1295                 dev->data->dev_conf.rxmode.offloads &=
1296                                                 ~DEV_RX_OFFLOAD_JUMBO_FRAME;
1297
1298         dev->data->dev_conf.rxmode.max_rx_pkt_len = frame_size;
1299
1300         /* Set the Max Rx frame length as 'mtu' +
1301          * Maximum Ethernet header length
1302          */
1303         ret = dpni_set_max_frame_length(dpni, CMD_PRI_LOW, priv->token,
1304                                         frame_size - RTE_ETHER_CRC_LEN);
1305         if (ret) {
1306                 DPAA2_PMD_ERR("Setting the max frame length failed");
1307                 return -1;
1308         }
1309         DPAA2_PMD_INFO("MTU configured for the device: %d", mtu);
1310         return 0;
1311 }
1312
1313 static int
1314 dpaa2_dev_add_mac_addr(struct rte_eth_dev *dev,
1315                        struct rte_ether_addr *addr,
1316                        __rte_unused uint32_t index,
1317                        __rte_unused uint32_t pool)
1318 {
1319         int ret;
1320         struct dpaa2_dev_priv *priv = dev->data->dev_private;
1321         struct fsl_mc_io *dpni = (struct fsl_mc_io *)dev->process_private;
1322
1323         PMD_INIT_FUNC_TRACE();
1324
1325         if (dpni == NULL) {
1326                 DPAA2_PMD_ERR("dpni is NULL");
1327                 return -1;
1328         }
1329
1330         ret = dpni_add_mac_addr(dpni, CMD_PRI_LOW, priv->token,
1331                                 addr->addr_bytes, 0, 0, 0);
1332         if (ret)
1333                 DPAA2_PMD_ERR(
1334                         "error: Adding the MAC ADDR failed: err = %d", ret);
1335         return 0;
1336 }
1337
1338 static void
1339 dpaa2_dev_remove_mac_addr(struct rte_eth_dev *dev,
1340                           uint32_t index)
1341 {
1342         int ret;
1343         struct dpaa2_dev_priv *priv = dev->data->dev_private;
1344         struct fsl_mc_io *dpni = (struct fsl_mc_io *)dev->process_private;
1345         struct rte_eth_dev_data *data = dev->data;
1346         struct rte_ether_addr *macaddr;
1347
1348         PMD_INIT_FUNC_TRACE();
1349
1350         macaddr = &data->mac_addrs[index];
1351
1352         if (dpni == NULL) {
1353                 DPAA2_PMD_ERR("dpni is NULL");
1354                 return;
1355         }
1356
1357         ret = dpni_remove_mac_addr(dpni, CMD_PRI_LOW,
1358                                    priv->token, macaddr->addr_bytes);
1359         if (ret)
1360                 DPAA2_PMD_ERR(
1361                         "error: Removing the MAC ADDR failed: err = %d", ret);
1362 }
1363
1364 static int
1365 dpaa2_dev_set_mac_addr(struct rte_eth_dev *dev,
1366                        struct rte_ether_addr *addr)
1367 {
1368         int ret;
1369         struct dpaa2_dev_priv *priv = dev->data->dev_private;
1370         struct fsl_mc_io *dpni = (struct fsl_mc_io *)dev->process_private;
1371
1372         PMD_INIT_FUNC_TRACE();
1373
1374         if (dpni == NULL) {
1375                 DPAA2_PMD_ERR("dpni is NULL");
1376                 return -EINVAL;
1377         }
1378
1379         ret = dpni_set_primary_mac_addr(dpni, CMD_PRI_LOW,
1380                                         priv->token, addr->addr_bytes);
1381
1382         if (ret)
1383                 DPAA2_PMD_ERR(
1384                         "error: Setting the MAC ADDR failed %d", ret);
1385
1386         return ret;
1387 }
1388
1389 static
1390 int dpaa2_dev_stats_get(struct rte_eth_dev *dev,
1391                          struct rte_eth_stats *stats)
1392 {
1393         struct dpaa2_dev_priv *priv = dev->data->dev_private;
1394         struct fsl_mc_io *dpni = (struct fsl_mc_io *)dev->process_private;
1395         int32_t  retcode;
1396         uint8_t page0 = 0, page1 = 1, page2 = 2;
1397         union dpni_statistics value;
1398         int i;
1399         struct dpaa2_queue *dpaa2_rxq, *dpaa2_txq;
1400
1401         memset(&value, 0, sizeof(union dpni_statistics));
1402
1403         PMD_INIT_FUNC_TRACE();
1404
1405         if (!dpni) {
1406                 DPAA2_PMD_ERR("dpni is NULL");
1407                 return -EINVAL;
1408         }
1409
1410         if (!stats) {
1411                 DPAA2_PMD_ERR("stats is NULL");
1412                 return -EINVAL;
1413         }
1414
1415         /*Get Counters from page_0*/
1416         retcode = dpni_get_statistics(dpni, CMD_PRI_LOW, priv->token,
1417                                       page0, 0, &value);
1418         if (retcode)
1419                 goto err;
1420
1421         stats->ipackets = value.page_0.ingress_all_frames;
1422         stats->ibytes = value.page_0.ingress_all_bytes;
1423
1424         /*Get Counters from page_1*/
1425         retcode = dpni_get_statistics(dpni, CMD_PRI_LOW, priv->token,
1426                                       page1, 0, &value);
1427         if (retcode)
1428                 goto err;
1429
1430         stats->opackets = value.page_1.egress_all_frames;
1431         stats->obytes = value.page_1.egress_all_bytes;
1432
1433         /*Get Counters from page_2*/
1434         retcode = dpni_get_statistics(dpni, CMD_PRI_LOW, priv->token,
1435                                       page2, 0, &value);
1436         if (retcode)
1437                 goto err;
1438
1439         /* Ingress drop frame count due to configured rules */
1440         stats->ierrors = value.page_2.ingress_filtered_frames;
1441         /* Ingress drop frame count due to error */
1442         stats->ierrors += value.page_2.ingress_discarded_frames;
1443
1444         stats->oerrors = value.page_2.egress_discarded_frames;
1445         stats->imissed = value.page_2.ingress_nobuffer_discards;
1446
1447         /* Fill in per queue stats */
1448         for (i = 0; (i < RTE_ETHDEV_QUEUE_STAT_CNTRS) &&
1449                 (i < priv->nb_rx_queues || i < priv->nb_tx_queues); ++i) {
1450                 dpaa2_rxq = (struct dpaa2_queue *)priv->rx_vq[i];
1451                 dpaa2_txq = (struct dpaa2_queue *)priv->tx_vq[i];
1452                 if (dpaa2_rxq)
1453                         stats->q_ipackets[i] = dpaa2_rxq->rx_pkts;
1454                 if (dpaa2_txq)
1455                         stats->q_opackets[i] = dpaa2_txq->tx_pkts;
1456
1457                 /* Byte counting is not implemented */
1458                 stats->q_ibytes[i]   = 0;
1459                 stats->q_obytes[i]   = 0;
1460         }
1461
1462         return 0;
1463
1464 err:
1465         DPAA2_PMD_ERR("Operation not completed:Error Code = %d", retcode);
1466         return retcode;
1467 };
1468
1469 static int
1470 dpaa2_dev_xstats_get(struct rte_eth_dev *dev, struct rte_eth_xstat *xstats,
1471                      unsigned int n)
1472 {
1473         struct dpaa2_dev_priv *priv = dev->data->dev_private;
1474         struct fsl_mc_io *dpni = (struct fsl_mc_io *)dev->process_private;
1475         int32_t  retcode;
1476         union dpni_statistics value[5] = {};
1477         unsigned int i = 0, num = RTE_DIM(dpaa2_xstats_strings);
1478
1479         if (n < num)
1480                 return num;
1481
1482         if (xstats == NULL)
1483                 return 0;
1484
1485         /* Get Counters from page_0*/
1486         retcode = dpni_get_statistics(dpni, CMD_PRI_LOW, priv->token,
1487                                       0, 0, &value[0]);
1488         if (retcode)
1489                 goto err;
1490
1491         /* Get Counters from page_1*/
1492         retcode = dpni_get_statistics(dpni, CMD_PRI_LOW, priv->token,
1493                                       1, 0, &value[1]);
1494         if (retcode)
1495                 goto err;
1496
1497         /* Get Counters from page_2*/
1498         retcode = dpni_get_statistics(dpni, CMD_PRI_LOW, priv->token,
1499                                       2, 0, &value[2]);
1500         if (retcode)
1501                 goto err;
1502
1503         for (i = 0; i < priv->max_cgs; i++) {
1504                 if (!priv->cgid_in_use[i]) {
1505                         /* Get Counters from page_4*/
1506                         retcode = dpni_get_statistics(dpni, CMD_PRI_LOW,
1507                                                       priv->token,
1508                                                       4, 0, &value[4]);
1509                         if (retcode)
1510                                 goto err;
1511                         break;
1512                 }
1513         }
1514
1515         for (i = 0; i < num; i++) {
1516                 xstats[i].id = i;
1517                 xstats[i].value = value[dpaa2_xstats_strings[i].page_id].
1518                         raw.counter[dpaa2_xstats_strings[i].stats_id];
1519         }
1520         return i;
1521 err:
1522         DPAA2_PMD_ERR("Error in obtaining extended stats (%d)", retcode);
1523         return retcode;
1524 }
1525
1526 static int
1527 dpaa2_xstats_get_names(__rte_unused struct rte_eth_dev *dev,
1528                        struct rte_eth_xstat_name *xstats_names,
1529                        unsigned int limit)
1530 {
1531         unsigned int i, stat_cnt = RTE_DIM(dpaa2_xstats_strings);
1532
1533         if (limit < stat_cnt)
1534                 return stat_cnt;
1535
1536         if (xstats_names != NULL)
1537                 for (i = 0; i < stat_cnt; i++)
1538                         strlcpy(xstats_names[i].name,
1539                                 dpaa2_xstats_strings[i].name,
1540                                 sizeof(xstats_names[i].name));
1541
1542         return stat_cnt;
1543 }
1544
1545 static int
1546 dpaa2_xstats_get_by_id(struct rte_eth_dev *dev, const uint64_t *ids,
1547                        uint64_t *values, unsigned int n)
1548 {
1549         unsigned int i, stat_cnt = RTE_DIM(dpaa2_xstats_strings);
1550         uint64_t values_copy[stat_cnt];
1551
1552         if (!ids) {
1553                 struct dpaa2_dev_priv *priv = dev->data->dev_private;
1554                 struct fsl_mc_io *dpni =
1555                         (struct fsl_mc_io *)dev->process_private;
1556                 int32_t  retcode;
1557                 union dpni_statistics value[5] = {};
1558
1559                 if (n < stat_cnt)
1560                         return stat_cnt;
1561
1562                 if (!values)
1563                         return 0;
1564
1565                 /* Get Counters from page_0*/
1566                 retcode = dpni_get_statistics(dpni, CMD_PRI_LOW, priv->token,
1567                                               0, 0, &value[0]);
1568                 if (retcode)
1569                         return 0;
1570
1571                 /* Get Counters from page_1*/
1572                 retcode = dpni_get_statistics(dpni, CMD_PRI_LOW, priv->token,
1573                                               1, 0, &value[1]);
1574                 if (retcode)
1575                         return 0;
1576
1577                 /* Get Counters from page_2*/
1578                 retcode = dpni_get_statistics(dpni, CMD_PRI_LOW, priv->token,
1579                                               2, 0, &value[2]);
1580                 if (retcode)
1581                         return 0;
1582
1583                 /* Get Counters from page_4*/
1584                 retcode = dpni_get_statistics(dpni, CMD_PRI_LOW, priv->token,
1585                                               4, 0, &value[4]);
1586                 if (retcode)
1587                         return 0;
1588
1589                 for (i = 0; i < stat_cnt; i++) {
1590                         values[i] = value[dpaa2_xstats_strings[i].page_id].
1591                                 raw.counter[dpaa2_xstats_strings[i].stats_id];
1592                 }
1593                 return stat_cnt;
1594         }
1595
1596         dpaa2_xstats_get_by_id(dev, NULL, values_copy, stat_cnt);
1597
1598         for (i = 0; i < n; i++) {
1599                 if (ids[i] >= stat_cnt) {
1600                         DPAA2_PMD_ERR("xstats id value isn't valid");
1601                         return -1;
1602                 }
1603                 values[i] = values_copy[ids[i]];
1604         }
1605         return n;
1606 }
1607
1608 static int
1609 dpaa2_xstats_get_names_by_id(
1610         struct rte_eth_dev *dev,
1611         struct rte_eth_xstat_name *xstats_names,
1612         const uint64_t *ids,
1613         unsigned int limit)
1614 {
1615         unsigned int i, stat_cnt = RTE_DIM(dpaa2_xstats_strings);
1616         struct rte_eth_xstat_name xstats_names_copy[stat_cnt];
1617
1618         if (!ids)
1619                 return dpaa2_xstats_get_names(dev, xstats_names, limit);
1620
1621         dpaa2_xstats_get_names(dev, xstats_names_copy, limit);
1622
1623         for (i = 0; i < limit; i++) {
1624                 if (ids[i] >= stat_cnt) {
1625                         DPAA2_PMD_ERR("xstats id value isn't valid");
1626                         return -1;
1627                 }
1628                 strcpy(xstats_names[i].name, xstats_names_copy[ids[i]].name);
1629         }
1630         return limit;
1631 }
1632
1633 static int
1634 dpaa2_dev_stats_reset(struct rte_eth_dev *dev)
1635 {
1636         struct dpaa2_dev_priv *priv = dev->data->dev_private;
1637         struct fsl_mc_io *dpni = (struct fsl_mc_io *)dev->process_private;
1638         int retcode;
1639         int i;
1640         struct dpaa2_queue *dpaa2_q;
1641
1642         PMD_INIT_FUNC_TRACE();
1643
1644         if (dpni == NULL) {
1645                 DPAA2_PMD_ERR("dpni is NULL");
1646                 return -EINVAL;
1647         }
1648
1649         retcode =  dpni_reset_statistics(dpni, CMD_PRI_LOW, priv->token);
1650         if (retcode)
1651                 goto error;
1652
1653         /* Reset the per queue stats in dpaa2_queue structure */
1654         for (i = 0; i < priv->nb_rx_queues; i++) {
1655                 dpaa2_q = (struct dpaa2_queue *)priv->rx_vq[i];
1656                 if (dpaa2_q)
1657                         dpaa2_q->rx_pkts = 0;
1658         }
1659
1660         for (i = 0; i < priv->nb_tx_queues; i++) {
1661                 dpaa2_q = (struct dpaa2_queue *)priv->tx_vq[i];
1662                 if (dpaa2_q)
1663                         dpaa2_q->tx_pkts = 0;
1664         }
1665
1666         return 0;
1667
1668 error:
1669         DPAA2_PMD_ERR("Operation not completed:Error Code = %d", retcode);
1670         return retcode;
1671 };
1672
1673 /* return 0 means link status changed, -1 means not changed */
1674 static int
1675 dpaa2_dev_link_update(struct rte_eth_dev *dev,
1676                         int wait_to_complete __rte_unused)
1677 {
1678         int ret;
1679         struct dpaa2_dev_priv *priv = dev->data->dev_private;
1680         struct fsl_mc_io *dpni = (struct fsl_mc_io *)dev->process_private;
1681         struct rte_eth_link link;
1682         struct dpni_link_state state = {0};
1683
1684         if (dpni == NULL) {
1685                 DPAA2_PMD_ERR("dpni is NULL");
1686                 return 0;
1687         }
1688
1689         ret = dpni_get_link_state(dpni, CMD_PRI_LOW, priv->token, &state);
1690         if (ret < 0) {
1691                 DPAA2_PMD_DEBUG("error: dpni_get_link_state %d", ret);
1692                 return -1;
1693         }
1694
1695         memset(&link, 0, sizeof(struct rte_eth_link));
1696         link.link_status = state.up;
1697         link.link_speed = state.rate;
1698
1699         if (state.options & DPNI_LINK_OPT_HALF_DUPLEX)
1700                 link.link_duplex = ETH_LINK_HALF_DUPLEX;
1701         else
1702                 link.link_duplex = ETH_LINK_FULL_DUPLEX;
1703
1704         ret = rte_eth_linkstatus_set(dev, &link);
1705         if (ret == -1)
1706                 DPAA2_PMD_DEBUG("No change in status");
1707         else
1708                 DPAA2_PMD_INFO("Port %d Link is %s\n", dev->data->port_id,
1709                                link.link_status ? "Up" : "Down");
1710
1711         return ret;
1712 }
1713
1714 /**
1715  * Toggle the DPNI to enable, if not already enabled.
1716  * This is not strictly PHY up/down - it is more of logical toggling.
1717  */
1718 static int
1719 dpaa2_dev_set_link_up(struct rte_eth_dev *dev)
1720 {
1721         int ret = -EINVAL;
1722         struct dpaa2_dev_priv *priv;
1723         struct fsl_mc_io *dpni;
1724         int en = 0;
1725         struct dpni_link_state state = {0};
1726
1727         priv = dev->data->dev_private;
1728         dpni = (struct fsl_mc_io *)dev->process_private;
1729
1730         if (dpni == NULL) {
1731                 DPAA2_PMD_ERR("dpni is NULL");
1732                 return ret;
1733         }
1734
1735         /* Check if DPNI is currently enabled */
1736         ret = dpni_is_enabled(dpni, CMD_PRI_LOW, priv->token, &en);
1737         if (ret) {
1738                 /* Unable to obtain dpni status; Not continuing */
1739                 DPAA2_PMD_ERR("Interface Link UP failed (%d)", ret);
1740                 return -EINVAL;
1741         }
1742
1743         /* Enable link if not already enabled */
1744         if (!en) {
1745                 ret = dpni_enable(dpni, CMD_PRI_LOW, priv->token);
1746                 if (ret) {
1747                         DPAA2_PMD_ERR("Interface Link UP failed (%d)", ret);
1748                         return -EINVAL;
1749                 }
1750         }
1751         ret = dpni_get_link_state(dpni, CMD_PRI_LOW, priv->token, &state);
1752         if (ret < 0) {
1753                 DPAA2_PMD_DEBUG("Unable to get link state (%d)", ret);
1754                 return -1;
1755         }
1756
1757         /* changing tx burst function to start enqueues */
1758         dev->tx_pkt_burst = dpaa2_dev_tx;
1759         dev->data->dev_link.link_status = state.up;
1760
1761         if (state.up)
1762                 DPAA2_PMD_INFO("Port %d Link is Up", dev->data->port_id);
1763         else
1764                 DPAA2_PMD_INFO("Port %d Link is Down", dev->data->port_id);
1765         return ret;
1766 }
1767
1768 /**
1769  * Toggle the DPNI to disable, if not already disabled.
1770  * This is not strictly PHY up/down - it is more of logical toggling.
1771  */
1772 static int
1773 dpaa2_dev_set_link_down(struct rte_eth_dev *dev)
1774 {
1775         int ret = -EINVAL;
1776         struct dpaa2_dev_priv *priv;
1777         struct fsl_mc_io *dpni;
1778         int dpni_enabled = 0;
1779         int retries = 10;
1780
1781         PMD_INIT_FUNC_TRACE();
1782
1783         priv = dev->data->dev_private;
1784         dpni = (struct fsl_mc_io *)dev->process_private;
1785
1786         if (dpni == NULL) {
1787                 DPAA2_PMD_ERR("Device has not yet been configured");
1788                 return ret;
1789         }
1790
1791         /*changing  tx burst function to avoid any more enqueues */
1792         dev->tx_pkt_burst = dummy_dev_tx;
1793
1794         /* Loop while dpni_disable() attempts to drain the egress FQs
1795          * and confirm them back to us.
1796          */
1797         do {
1798                 ret = dpni_disable(dpni, 0, priv->token);
1799                 if (ret) {
1800                         DPAA2_PMD_ERR("dpni disable failed (%d)", ret);
1801                         return ret;
1802                 }
1803                 ret = dpni_is_enabled(dpni, 0, priv->token, &dpni_enabled);
1804                 if (ret) {
1805                         DPAA2_PMD_ERR("dpni enable check failed (%d)", ret);
1806                         return ret;
1807                 }
1808                 if (dpni_enabled)
1809                         /* Allow the MC some slack */
1810                         rte_delay_us(100 * 1000);
1811         } while (dpni_enabled && --retries);
1812
1813         if (!retries) {
1814                 DPAA2_PMD_WARN("Retry count exceeded disabling dpni");
1815                 /* todo- we may have to manually cleanup queues.
1816                  */
1817         } else {
1818                 DPAA2_PMD_INFO("Port %d Link DOWN successful",
1819                                dev->data->port_id);
1820         }
1821
1822         dev->data->dev_link.link_status = 0;
1823
1824         return ret;
1825 }
1826
1827 static int
1828 dpaa2_flow_ctrl_get(struct rte_eth_dev *dev, struct rte_eth_fc_conf *fc_conf)
1829 {
1830         int ret = -EINVAL;
1831         struct dpaa2_dev_priv *priv;
1832         struct fsl_mc_io *dpni;
1833         struct dpni_link_state state = {0};
1834
1835         PMD_INIT_FUNC_TRACE();
1836
1837         priv = dev->data->dev_private;
1838         dpni = (struct fsl_mc_io *)dev->process_private;
1839
1840         if (dpni == NULL || fc_conf == NULL) {
1841                 DPAA2_PMD_ERR("device not configured");
1842                 return ret;
1843         }
1844
1845         ret = dpni_get_link_state(dpni, CMD_PRI_LOW, priv->token, &state);
1846         if (ret) {
1847                 DPAA2_PMD_ERR("error: dpni_get_link_state %d", ret);
1848                 return ret;
1849         }
1850
1851         memset(fc_conf, 0, sizeof(struct rte_eth_fc_conf));
1852         if (state.options & DPNI_LINK_OPT_PAUSE) {
1853                 /* DPNI_LINK_OPT_PAUSE set
1854                  *  if ASYM_PAUSE not set,
1855                  *      RX Side flow control (handle received Pause frame)
1856                  *      TX side flow control (send Pause frame)
1857                  *  if ASYM_PAUSE set,
1858                  *      RX Side flow control (handle received Pause frame)
1859                  *      No TX side flow control (send Pause frame disabled)
1860                  */
1861                 if (!(state.options & DPNI_LINK_OPT_ASYM_PAUSE))
1862                         fc_conf->mode = RTE_FC_FULL;
1863                 else
1864                         fc_conf->mode = RTE_FC_RX_PAUSE;
1865         } else {
1866                 /* DPNI_LINK_OPT_PAUSE not set
1867                  *  if ASYM_PAUSE set,
1868                  *      TX side flow control (send Pause frame)
1869                  *      No RX side flow control (No action on pause frame rx)
1870                  *  if ASYM_PAUSE not set,
1871                  *      Flow control disabled
1872                  */
1873                 if (state.options & DPNI_LINK_OPT_ASYM_PAUSE)
1874                         fc_conf->mode = RTE_FC_TX_PAUSE;
1875                 else
1876                         fc_conf->mode = RTE_FC_NONE;
1877         }
1878
1879         return ret;
1880 }
1881
1882 static int
1883 dpaa2_flow_ctrl_set(struct rte_eth_dev *dev, struct rte_eth_fc_conf *fc_conf)
1884 {
1885         int ret = -EINVAL;
1886         struct dpaa2_dev_priv *priv;
1887         struct fsl_mc_io *dpni;
1888         struct dpni_link_state state = {0};
1889         struct dpni_link_cfg cfg = {0};
1890
1891         PMD_INIT_FUNC_TRACE();
1892
1893         priv = dev->data->dev_private;
1894         dpni = (struct fsl_mc_io *)dev->process_private;
1895
1896         if (dpni == NULL) {
1897                 DPAA2_PMD_ERR("dpni is NULL");
1898                 return ret;
1899         }
1900
1901         /* It is necessary to obtain the current state before setting fc_conf
1902          * as MC would return error in case rate, autoneg or duplex values are
1903          * different.
1904          */
1905         ret = dpni_get_link_state(dpni, CMD_PRI_LOW, priv->token, &state);
1906         if (ret) {
1907                 DPAA2_PMD_ERR("Unable to get link state (err=%d)", ret);
1908                 return -1;
1909         }
1910
1911         /* Disable link before setting configuration */
1912         dpaa2_dev_set_link_down(dev);
1913
1914         /* Based on fc_conf, update cfg */
1915         cfg.rate = state.rate;
1916         cfg.options = state.options;
1917
1918         /* update cfg with fc_conf */
1919         switch (fc_conf->mode) {
1920         case RTE_FC_FULL:
1921                 /* Full flow control;
1922                  * OPT_PAUSE set, ASYM_PAUSE not set
1923                  */
1924                 cfg.options |= DPNI_LINK_OPT_PAUSE;
1925                 cfg.options &= ~DPNI_LINK_OPT_ASYM_PAUSE;
1926                 break;
1927         case RTE_FC_TX_PAUSE:
1928                 /* Enable RX flow control
1929                  * OPT_PAUSE not set;
1930                  * ASYM_PAUSE set;
1931                  */
1932                 cfg.options |= DPNI_LINK_OPT_ASYM_PAUSE;
1933                 cfg.options &= ~DPNI_LINK_OPT_PAUSE;
1934                 break;
1935         case RTE_FC_RX_PAUSE:
1936                 /* Enable TX Flow control
1937                  * OPT_PAUSE set
1938                  * ASYM_PAUSE set
1939                  */
1940                 cfg.options |= DPNI_LINK_OPT_PAUSE;
1941                 cfg.options |= DPNI_LINK_OPT_ASYM_PAUSE;
1942                 break;
1943         case RTE_FC_NONE:
1944                 /* Disable Flow control
1945                  * OPT_PAUSE not set
1946                  * ASYM_PAUSE not set
1947                  */
1948                 cfg.options &= ~DPNI_LINK_OPT_PAUSE;
1949                 cfg.options &= ~DPNI_LINK_OPT_ASYM_PAUSE;
1950                 break;
1951         default:
1952                 DPAA2_PMD_ERR("Incorrect Flow control flag (%d)",
1953                               fc_conf->mode);
1954                 return -1;
1955         }
1956
1957         ret = dpni_set_link_cfg(dpni, CMD_PRI_LOW, priv->token, &cfg);
1958         if (ret)
1959                 DPAA2_PMD_ERR("Unable to set Link configuration (err=%d)",
1960                               ret);
1961
1962         /* Enable link */
1963         dpaa2_dev_set_link_up(dev);
1964
1965         return ret;
1966 }
1967
1968 static int
1969 dpaa2_dev_rss_hash_update(struct rte_eth_dev *dev,
1970                           struct rte_eth_rss_conf *rss_conf)
1971 {
1972         struct rte_eth_dev_data *data = dev->data;
1973         struct rte_eth_conf *eth_conf = &data->dev_conf;
1974         int ret;
1975
1976         PMD_INIT_FUNC_TRACE();
1977
1978         if (rss_conf->rss_hf) {
1979                 ret = dpaa2_setup_flow_dist(dev, rss_conf->rss_hf);
1980                 if (ret) {
1981                         DPAA2_PMD_ERR("Unable to set flow dist");
1982                         return ret;
1983                 }
1984         } else {
1985                 ret = dpaa2_remove_flow_dist(dev, 0);
1986                 if (ret) {
1987                         DPAA2_PMD_ERR("Unable to remove flow dist");
1988                         return ret;
1989                 }
1990         }
1991         eth_conf->rx_adv_conf.rss_conf.rss_hf = rss_conf->rss_hf;
1992         return 0;
1993 }
1994
1995 static int
1996 dpaa2_dev_rss_hash_conf_get(struct rte_eth_dev *dev,
1997                             struct rte_eth_rss_conf *rss_conf)
1998 {
1999         struct rte_eth_dev_data *data = dev->data;
2000         struct rte_eth_conf *eth_conf = &data->dev_conf;
2001
2002         /* dpaa2 does not support rss_key, so length should be 0*/
2003         rss_conf->rss_key_len = 0;
2004         rss_conf->rss_hf = eth_conf->rx_adv_conf.rss_conf.rss_hf;
2005         return 0;
2006 }
2007
2008 int dpaa2_eth_eventq_attach(const struct rte_eth_dev *dev,
2009                 int eth_rx_queue_id,
2010                 struct dpaa2_dpcon_dev *dpcon,
2011                 const struct rte_event_eth_rx_adapter_queue_conf *queue_conf)
2012 {
2013         struct dpaa2_dev_priv *eth_priv = dev->data->dev_private;
2014         struct fsl_mc_io *dpni = (struct fsl_mc_io *)dev->process_private;
2015         struct dpaa2_queue *dpaa2_ethq = eth_priv->rx_vq[eth_rx_queue_id];
2016         uint8_t flow_id = dpaa2_ethq->flow_id;
2017         struct dpni_queue cfg;
2018         uint8_t options, priority;
2019         int ret;
2020
2021         if (queue_conf->ev.sched_type == RTE_SCHED_TYPE_PARALLEL)
2022                 dpaa2_ethq->cb = dpaa2_dev_process_parallel_event;
2023         else if (queue_conf->ev.sched_type == RTE_SCHED_TYPE_ATOMIC)
2024                 dpaa2_ethq->cb = dpaa2_dev_process_atomic_event;
2025         else if (queue_conf->ev.sched_type == RTE_SCHED_TYPE_ORDERED)
2026                 dpaa2_ethq->cb = dpaa2_dev_process_ordered_event;
2027         else
2028                 return -EINVAL;
2029
2030         priority = (RTE_EVENT_DEV_PRIORITY_LOWEST / queue_conf->ev.priority) *
2031                    (dpcon->num_priorities - 1);
2032
2033         memset(&cfg, 0, sizeof(struct dpni_queue));
2034         options = DPNI_QUEUE_OPT_DEST;
2035         cfg.destination.type = DPNI_DEST_DPCON;
2036         cfg.destination.id = dpcon->dpcon_id;
2037         cfg.destination.priority = priority;
2038
2039         if (queue_conf->ev.sched_type == RTE_SCHED_TYPE_ATOMIC) {
2040                 options |= DPNI_QUEUE_OPT_HOLD_ACTIVE;
2041                 cfg.destination.hold_active = 1;
2042         }
2043
2044         if (queue_conf->ev.sched_type == RTE_SCHED_TYPE_ORDERED &&
2045                         !eth_priv->en_ordered) {
2046                 struct opr_cfg ocfg;
2047
2048                 /* Restoration window size = 256 frames */
2049                 ocfg.oprrws = 3;
2050                 /* Restoration window size = 512 frames for LX2 */
2051                 if (dpaa2_svr_family == SVR_LX2160A)
2052                         ocfg.oprrws = 4;
2053                 /* Auto advance NESN window enabled */
2054                 ocfg.oa = 1;
2055                 /* Late arrival window size disabled */
2056                 ocfg.olws = 0;
2057                 /* ORL resource exhaustaion advance NESN disabled */
2058                 ocfg.oeane = 0;
2059                 /* Loose ordering enabled */
2060                 ocfg.oloe = 1;
2061                 eth_priv->en_loose_ordered = 1;
2062                 /* Strict ordering enabled if explicitly set */
2063                 if (getenv("DPAA2_STRICT_ORDERING_ENABLE")) {
2064                         ocfg.oloe = 0;
2065                         eth_priv->en_loose_ordered = 0;
2066                 }
2067
2068                 ret = dpni_set_opr(dpni, CMD_PRI_LOW, eth_priv->token,
2069                                    dpaa2_ethq->tc_index, flow_id,
2070                                    OPR_OPT_CREATE, &ocfg);
2071                 if (ret) {
2072                         DPAA2_PMD_ERR("Error setting opr: ret: %d\n", ret);
2073                         return ret;
2074                 }
2075
2076                 eth_priv->en_ordered = 1;
2077         }
2078
2079         options |= DPNI_QUEUE_OPT_USER_CTX;
2080         cfg.user_context = (size_t)(dpaa2_ethq);
2081
2082         ret = dpni_set_queue(dpni, CMD_PRI_LOW, eth_priv->token, DPNI_QUEUE_RX,
2083                              dpaa2_ethq->tc_index, flow_id, options, &cfg);
2084         if (ret) {
2085                 DPAA2_PMD_ERR("Error in dpni_set_queue: ret: %d", ret);
2086                 return ret;
2087         }
2088
2089         memcpy(&dpaa2_ethq->ev, &queue_conf->ev, sizeof(struct rte_event));
2090
2091         return 0;
2092 }
2093
2094 int dpaa2_eth_eventq_detach(const struct rte_eth_dev *dev,
2095                 int eth_rx_queue_id)
2096 {
2097         struct dpaa2_dev_priv *eth_priv = dev->data->dev_private;
2098         struct fsl_mc_io *dpni = (struct fsl_mc_io *)dev->process_private;
2099         struct dpaa2_queue *dpaa2_ethq = eth_priv->rx_vq[eth_rx_queue_id];
2100         uint8_t flow_id = dpaa2_ethq->flow_id;
2101         struct dpni_queue cfg;
2102         uint8_t options;
2103         int ret;
2104
2105         memset(&cfg, 0, sizeof(struct dpni_queue));
2106         options = DPNI_QUEUE_OPT_DEST;
2107         cfg.destination.type = DPNI_DEST_NONE;
2108
2109         ret = dpni_set_queue(dpni, CMD_PRI_LOW, eth_priv->token, DPNI_QUEUE_RX,
2110                              dpaa2_ethq->tc_index, flow_id, options, &cfg);
2111         if (ret)
2112                 DPAA2_PMD_ERR("Error in dpni_set_queue: ret: %d", ret);
2113
2114         return ret;
2115 }
2116
2117 static inline int
2118 dpaa2_dev_verify_filter_ops(enum rte_filter_op filter_op)
2119 {
2120         unsigned int i;
2121
2122         for (i = 0; i < RTE_DIM(dpaa2_supported_filter_ops); i++) {
2123                 if (dpaa2_supported_filter_ops[i] == filter_op)
2124                         return 0;
2125         }
2126         return -ENOTSUP;
2127 }
2128
2129 static int
2130 dpaa2_dev_flow_ctrl(struct rte_eth_dev *dev,
2131                     enum rte_filter_type filter_type,
2132                                  enum rte_filter_op filter_op,
2133                                  void *arg)
2134 {
2135         int ret = 0;
2136
2137         if (!dev)
2138                 return -ENODEV;
2139
2140         switch (filter_type) {
2141         case RTE_ETH_FILTER_GENERIC:
2142                 if (dpaa2_dev_verify_filter_ops(filter_op) < 0) {
2143                         ret = -ENOTSUP;
2144                         break;
2145                 }
2146                 *(const void **)arg = &dpaa2_flow_ops;
2147                 dpaa2_filter_type |= filter_type;
2148                 break;
2149         default:
2150                 RTE_LOG(ERR, PMD, "Filter type (%d) not supported",
2151                         filter_type);
2152                 ret = -ENOTSUP;
2153                 break;
2154         }
2155         return ret;
2156 }
2157
2158 static struct eth_dev_ops dpaa2_ethdev_ops = {
2159         .dev_configure    = dpaa2_eth_dev_configure,
2160         .dev_start            = dpaa2_dev_start,
2161         .dev_stop             = dpaa2_dev_stop,
2162         .dev_close            = dpaa2_dev_close,
2163         .promiscuous_enable   = dpaa2_dev_promiscuous_enable,
2164         .promiscuous_disable  = dpaa2_dev_promiscuous_disable,
2165         .allmulticast_enable  = dpaa2_dev_allmulticast_enable,
2166         .allmulticast_disable = dpaa2_dev_allmulticast_disable,
2167         .dev_set_link_up      = dpaa2_dev_set_link_up,
2168         .dev_set_link_down    = dpaa2_dev_set_link_down,
2169         .link_update       = dpaa2_dev_link_update,
2170         .stats_get             = dpaa2_dev_stats_get,
2171         .xstats_get            = dpaa2_dev_xstats_get,
2172         .xstats_get_by_id     = dpaa2_xstats_get_by_id,
2173         .xstats_get_names_by_id = dpaa2_xstats_get_names_by_id,
2174         .xstats_get_names      = dpaa2_xstats_get_names,
2175         .stats_reset       = dpaa2_dev_stats_reset,
2176         .xstats_reset         = dpaa2_dev_stats_reset,
2177         .fw_version_get    = dpaa2_fw_version_get,
2178         .dev_infos_get     = dpaa2_dev_info_get,
2179         .dev_supported_ptypes_get = dpaa2_supported_ptypes_get,
2180         .mtu_set           = dpaa2_dev_mtu_set,
2181         .vlan_filter_set      = dpaa2_vlan_filter_set,
2182         .vlan_offload_set     = dpaa2_vlan_offload_set,
2183         .vlan_tpid_set        = dpaa2_vlan_tpid_set,
2184         .rx_queue_setup    = dpaa2_dev_rx_queue_setup,
2185         .rx_queue_release  = dpaa2_dev_rx_queue_release,
2186         .tx_queue_setup    = dpaa2_dev_tx_queue_setup,
2187         .tx_queue_release  = dpaa2_dev_tx_queue_release,
2188         .rx_queue_count       = dpaa2_dev_rx_queue_count,
2189         .flow_ctrl_get        = dpaa2_flow_ctrl_get,
2190         .flow_ctrl_set        = dpaa2_flow_ctrl_set,
2191         .mac_addr_add         = dpaa2_dev_add_mac_addr,
2192         .mac_addr_remove      = dpaa2_dev_remove_mac_addr,
2193         .mac_addr_set         = dpaa2_dev_set_mac_addr,
2194         .rss_hash_update      = dpaa2_dev_rss_hash_update,
2195         .rss_hash_conf_get    = dpaa2_dev_rss_hash_conf_get,
2196         .filter_ctrl          = dpaa2_dev_flow_ctrl,
2197 #if defined(RTE_LIBRTE_IEEE1588)
2198         .timesync_enable      = dpaa2_timesync_enable,
2199         .timesync_disable     = dpaa2_timesync_disable,
2200         .timesync_read_time   = dpaa2_timesync_read_time,
2201         .timesync_write_time  = dpaa2_timesync_write_time,
2202         .timesync_adjust_time = dpaa2_timesync_adjust_time,
2203         .timesync_read_rx_timestamp = dpaa2_timesync_read_rx_timestamp,
2204         .timesync_read_tx_timestamp = dpaa2_timesync_read_tx_timestamp,
2205 #endif
2206 };
2207
2208 /* Populate the mac address from physically available (u-boot/firmware) and/or
2209  * one set by higher layers like MC (restool) etc.
2210  * Returns the table of MAC entries (multiple entries)
2211  */
2212 static int
2213 populate_mac_addr(struct fsl_mc_io *dpni_dev, struct dpaa2_dev_priv *priv,
2214                   struct rte_ether_addr *mac_entry)
2215 {
2216         int ret;
2217         struct rte_ether_addr phy_mac, prime_mac;
2218
2219         memset(&phy_mac, 0, sizeof(struct rte_ether_addr));
2220         memset(&prime_mac, 0, sizeof(struct rte_ether_addr));
2221
2222         /* Get the physical device MAC address */
2223         ret = dpni_get_port_mac_addr(dpni_dev, CMD_PRI_LOW, priv->token,
2224                                      phy_mac.addr_bytes);
2225         if (ret) {
2226                 DPAA2_PMD_ERR("DPNI get physical port MAC failed: %d", ret);
2227                 goto cleanup;
2228         }
2229
2230         ret = dpni_get_primary_mac_addr(dpni_dev, CMD_PRI_LOW, priv->token,
2231                                         prime_mac.addr_bytes);
2232         if (ret) {
2233                 DPAA2_PMD_ERR("DPNI get Prime port MAC failed: %d", ret);
2234                 goto cleanup;
2235         }
2236
2237         /* Now that both MAC have been obtained, do:
2238          *  if not_empty_mac(phy) && phy != Prime, overwrite prime with Phy
2239          *     and return phy
2240          *  If empty_mac(phy), return prime.
2241          *  if both are empty, create random MAC, set as prime and return
2242          */
2243         if (!rte_is_zero_ether_addr(&phy_mac)) {
2244                 /* If the addresses are not same, overwrite prime */
2245                 if (!rte_is_same_ether_addr(&phy_mac, &prime_mac)) {
2246                         ret = dpni_set_primary_mac_addr(dpni_dev, CMD_PRI_LOW,
2247                                                         priv->token,
2248                                                         phy_mac.addr_bytes);
2249                         if (ret) {
2250                                 DPAA2_PMD_ERR("Unable to set MAC Address: %d",
2251                                               ret);
2252                                 goto cleanup;
2253                         }
2254                         memcpy(&prime_mac, &phy_mac,
2255                                 sizeof(struct rte_ether_addr));
2256                 }
2257         } else if (rte_is_zero_ether_addr(&prime_mac)) {
2258                 /* In case phys and prime, both are zero, create random MAC */
2259                 rte_eth_random_addr(prime_mac.addr_bytes);
2260                 ret = dpni_set_primary_mac_addr(dpni_dev, CMD_PRI_LOW,
2261                                                 priv->token,
2262                                                 prime_mac.addr_bytes);
2263                 if (ret) {
2264                         DPAA2_PMD_ERR("Unable to set MAC Address: %d", ret);
2265                         goto cleanup;
2266                 }
2267         }
2268
2269         /* prime_mac the final MAC address */
2270         memcpy(mac_entry, &prime_mac, sizeof(struct rte_ether_addr));
2271         return 0;
2272
2273 cleanup:
2274         return -1;
2275 }
2276
2277 static int
2278 check_devargs_handler(__rte_unused const char *key, const char *value,
2279                       __rte_unused void *opaque)
2280 {
2281         if (strcmp(value, "1"))
2282                 return -1;
2283
2284         return 0;
2285 }
2286
2287 static int
2288 dpaa2_get_devargs(struct rte_devargs *devargs, const char *key)
2289 {
2290         struct rte_kvargs *kvlist;
2291
2292         if (!devargs)
2293                 return 0;
2294
2295         kvlist = rte_kvargs_parse(devargs->args, NULL);
2296         if (!kvlist)
2297                 return 0;
2298
2299         if (!rte_kvargs_count(kvlist, key)) {
2300                 rte_kvargs_free(kvlist);
2301                 return 0;
2302         }
2303
2304         if (rte_kvargs_process(kvlist, key,
2305                                check_devargs_handler, NULL) < 0) {
2306                 rte_kvargs_free(kvlist);
2307                 return 0;
2308         }
2309         rte_kvargs_free(kvlist);
2310
2311         return 1;
2312 }
2313
2314 static int
2315 dpaa2_dev_init(struct rte_eth_dev *eth_dev)
2316 {
2317         struct rte_device *dev = eth_dev->device;
2318         struct rte_dpaa2_device *dpaa2_dev;
2319         struct fsl_mc_io *dpni_dev;
2320         struct dpni_attr attr;
2321         struct dpaa2_dev_priv *priv = eth_dev->data->dev_private;
2322         struct dpni_buffer_layout layout;
2323         int ret, hw_id, i;
2324
2325         PMD_INIT_FUNC_TRACE();
2326
2327         dpni_dev = rte_malloc(NULL, sizeof(struct fsl_mc_io), 0);
2328         if (!dpni_dev) {
2329                 DPAA2_PMD_ERR("Memory allocation failed for dpni device");
2330                 return -1;
2331         }
2332         dpni_dev->regs = rte_mcp_ptr_list[0];
2333         eth_dev->process_private = (void *)dpni_dev;
2334
2335         /* For secondary processes, the primary has done all the work */
2336         if (rte_eal_process_type() != RTE_PROC_PRIMARY) {
2337                 /* In case of secondary, only burst and ops API need to be
2338                  * plugged.
2339                  */
2340                 eth_dev->dev_ops = &dpaa2_ethdev_ops;
2341                 if (dpaa2_get_devargs(dev->devargs, DRIVER_LOOPBACK_MODE))
2342                         eth_dev->rx_pkt_burst = dpaa2_dev_loopback_rx;
2343                 else if (dpaa2_get_devargs(dev->devargs,
2344                                         DRIVER_NO_PREFETCH_MODE))
2345                         eth_dev->rx_pkt_burst = dpaa2_dev_rx;
2346                 else
2347                         eth_dev->rx_pkt_burst = dpaa2_dev_prefetch_rx;
2348                 eth_dev->tx_pkt_burst = dpaa2_dev_tx;
2349                 return 0;
2350         }
2351
2352         dpaa2_dev = container_of(dev, struct rte_dpaa2_device, device);
2353
2354         hw_id = dpaa2_dev->object_id;
2355         ret = dpni_open(dpni_dev, CMD_PRI_LOW, hw_id, &priv->token);
2356         if (ret) {
2357                 DPAA2_PMD_ERR(
2358                              "Failure in opening dpni@%d with err code %d",
2359                              hw_id, ret);
2360                 rte_free(dpni_dev);
2361                 return -1;
2362         }
2363
2364         /* Clean the device first */
2365         ret = dpni_reset(dpni_dev, CMD_PRI_LOW, priv->token);
2366         if (ret) {
2367                 DPAA2_PMD_ERR("Failure cleaning dpni@%d with err code %d",
2368                               hw_id, ret);
2369                 goto init_err;
2370         }
2371
2372         ret = dpni_get_attributes(dpni_dev, CMD_PRI_LOW, priv->token, &attr);
2373         if (ret) {
2374                 DPAA2_PMD_ERR(
2375                              "Failure in get dpni@%d attribute, err code %d",
2376                              hw_id, ret);
2377                 goto init_err;
2378         }
2379
2380         priv->num_rx_tc = attr.num_rx_tcs;
2381         /* only if the custom CG is enabled */
2382         if (attr.options & DPNI_OPT_CUSTOM_CG)
2383                 priv->max_cgs = attr.num_cgs;
2384         else
2385                 priv->max_cgs = 0;
2386
2387         for (i = 0; i < priv->max_cgs; i++)
2388                 priv->cgid_in_use[i] = 0;
2389
2390         for (i = 0; i < attr.num_rx_tcs; i++)
2391                 priv->nb_rx_queues += attr.num_queues;
2392
2393         /* Using number of TX queues as number of TX TCs */
2394         priv->nb_tx_queues = attr.num_tx_tcs;
2395
2396         DPAA2_PMD_DEBUG("RX-TC= %d, rx_queues= %d, tx_queues=%d, max_cgs=%d",
2397                         priv->num_rx_tc, priv->nb_rx_queues,
2398                         priv->nb_tx_queues, priv->max_cgs);
2399
2400         priv->hw = dpni_dev;
2401         priv->hw_id = hw_id;
2402         priv->options = attr.options;
2403         priv->max_mac_filters = attr.mac_filter_entries;
2404         priv->max_vlan_filters = attr.vlan_filter_entries;
2405         priv->flags = 0;
2406 #if defined(RTE_LIBRTE_IEEE1588)
2407         priv->tx_conf_en = 1;
2408 #else
2409         priv->tx_conf_en = 0;
2410 #endif
2411
2412         /* Allocate memory for hardware structure for queues */
2413         ret = dpaa2_alloc_rx_tx_queues(eth_dev);
2414         if (ret) {
2415                 DPAA2_PMD_ERR("Queue allocation Failed");
2416                 goto init_err;
2417         }
2418
2419         /* Allocate memory for storing MAC addresses.
2420          * Table of mac_filter_entries size is allocated so that RTE ether lib
2421          * can add MAC entries when rte_eth_dev_mac_addr_add is called.
2422          */
2423         eth_dev->data->mac_addrs = rte_zmalloc("dpni",
2424                 RTE_ETHER_ADDR_LEN * attr.mac_filter_entries, 0);
2425         if (eth_dev->data->mac_addrs == NULL) {
2426                 DPAA2_PMD_ERR(
2427                    "Failed to allocate %d bytes needed to store MAC addresses",
2428                    RTE_ETHER_ADDR_LEN * attr.mac_filter_entries);
2429                 ret = -ENOMEM;
2430                 goto init_err;
2431         }
2432
2433         ret = populate_mac_addr(dpni_dev, priv, &eth_dev->data->mac_addrs[0]);
2434         if (ret) {
2435                 DPAA2_PMD_ERR("Unable to fetch MAC Address for device");
2436                 rte_free(eth_dev->data->mac_addrs);
2437                 eth_dev->data->mac_addrs = NULL;
2438                 goto init_err;
2439         }
2440
2441         /* ... tx buffer layout ... */
2442         memset(&layout, 0, sizeof(struct dpni_buffer_layout));
2443         if (priv->tx_conf_en) {
2444                 layout.options = DPNI_BUF_LAYOUT_OPT_FRAME_STATUS |
2445                                  DPNI_BUF_LAYOUT_OPT_TIMESTAMP;
2446                 layout.pass_timestamp = true;
2447         } else {
2448                 layout.options = DPNI_BUF_LAYOUT_OPT_FRAME_STATUS;
2449         }
2450         layout.pass_frame_status = 1;
2451         ret = dpni_set_buffer_layout(dpni_dev, CMD_PRI_LOW, priv->token,
2452                                      DPNI_QUEUE_TX, &layout);
2453         if (ret) {
2454                 DPAA2_PMD_ERR("Error (%d) in setting tx buffer layout", ret);
2455                 goto init_err;
2456         }
2457
2458         /* ... tx-conf and error buffer layout ... */
2459         memset(&layout, 0, sizeof(struct dpni_buffer_layout));
2460         if (priv->tx_conf_en) {
2461                 layout.options = DPNI_BUF_LAYOUT_OPT_FRAME_STATUS |
2462                                  DPNI_BUF_LAYOUT_OPT_TIMESTAMP;
2463                 layout.pass_timestamp = true;
2464         } else {
2465                 layout.options = DPNI_BUF_LAYOUT_OPT_FRAME_STATUS;
2466         }
2467         layout.pass_frame_status = 1;
2468         ret = dpni_set_buffer_layout(dpni_dev, CMD_PRI_LOW, priv->token,
2469                                      DPNI_QUEUE_TX_CONFIRM, &layout);
2470         if (ret) {
2471                 DPAA2_PMD_ERR("Error (%d) in setting tx-conf buffer layout",
2472                              ret);
2473                 goto init_err;
2474         }
2475
2476         eth_dev->dev_ops = &dpaa2_ethdev_ops;
2477
2478         if (dpaa2_get_devargs(dev->devargs, DRIVER_LOOPBACK_MODE)) {
2479                 eth_dev->rx_pkt_burst = dpaa2_dev_loopback_rx;
2480                 DPAA2_PMD_INFO("Loopback mode");
2481         } else if (dpaa2_get_devargs(dev->devargs, DRIVER_NO_PREFETCH_MODE)) {
2482                 eth_dev->rx_pkt_burst = dpaa2_dev_rx;
2483                 DPAA2_PMD_INFO("No Prefetch mode");
2484         } else {
2485                 eth_dev->rx_pkt_burst = dpaa2_dev_prefetch_rx;
2486         }
2487         eth_dev->tx_pkt_burst = dpaa2_dev_tx;
2488
2489         /*Init fields w.r.t. classficaition*/
2490         memset(&priv->extract.qos_key_cfg, 0, sizeof(struct dpkg_profile_cfg));
2491         priv->extract.qos_extract_param = (size_t)rte_malloc(NULL, 256, 64);
2492         if (!priv->extract.qos_extract_param) {
2493                 DPAA2_PMD_ERR(" Error(%d) in allocation resources for flow "
2494                             " classificaiton ", ret);
2495                 goto init_err;
2496         }
2497         for (i = 0; i < MAX_TCS; i++) {
2498                 memset(&priv->extract.fs_key_cfg[i], 0,
2499                         sizeof(struct dpkg_profile_cfg));
2500                 priv->extract.fs_extract_param[i] =
2501                         (size_t)rte_malloc(NULL, 256, 64);
2502                 if (!priv->extract.fs_extract_param[i]) {
2503                         DPAA2_PMD_ERR(" Error(%d) in allocation resources for flow classificaiton",
2504                                      ret);
2505                         goto init_err;
2506                 }
2507         }
2508
2509         ret = dpni_set_max_frame_length(dpni_dev, CMD_PRI_LOW, priv->token,
2510                                         RTE_ETHER_MAX_LEN - RTE_ETHER_CRC_LEN
2511                                         + VLAN_TAG_SIZE);
2512         if (ret) {
2513                 DPAA2_PMD_ERR("Unable to set mtu. check config");
2514                 goto init_err;
2515         }
2516
2517         /*TODO To enable soft parser support DPAA2 driver needs to integrate
2518          * with external entity to receive byte code for software sequence
2519          * and same will be offload to the H/W using MC interface.
2520          * Currently it is assumed that DPAA2 driver has byte code by some
2521          * mean and same if offloaded to H/W.
2522          */
2523         if (getenv("DPAA2_ENABLE_SOFT_PARSER")) {
2524                 WRIOP_SS_INITIALIZER(priv);
2525                 ret = dpaa2_eth_load_wriop_soft_parser(priv, DPNI_SS_INGRESS);
2526                 if (ret < 0) {
2527                         DPAA2_PMD_ERR(" Error(%d) in loading softparser\n",
2528                                       ret);
2529                         return ret;
2530                 }
2531
2532                 ret = dpaa2_eth_enable_wriop_soft_parser(priv,
2533                                                          DPNI_SS_INGRESS);
2534                 if (ret < 0) {
2535                         DPAA2_PMD_ERR(" Error(%d) in enabling softparser\n",
2536                                       ret);
2537                         return ret;
2538                 }
2539         }
2540         RTE_LOG(INFO, PMD, "%s: netdev created\n", eth_dev->data->name);
2541         return 0;
2542 init_err:
2543         dpaa2_dev_uninit(eth_dev);
2544         return ret;
2545 }
2546
2547 static int
2548 dpaa2_dev_uninit(struct rte_eth_dev *eth_dev)
2549 {
2550         struct dpaa2_dev_priv *priv = eth_dev->data->dev_private;
2551         struct fsl_mc_io *dpni = (struct fsl_mc_io *)eth_dev->process_private;
2552         int i, ret;
2553
2554         PMD_INIT_FUNC_TRACE();
2555
2556         if (rte_eal_process_type() != RTE_PROC_PRIMARY)
2557                 return 0;
2558
2559         if (!dpni) {
2560                 DPAA2_PMD_WARN("Already closed or not started");
2561                 return -1;
2562         }
2563
2564         dpaa2_dev_close(eth_dev);
2565
2566         dpaa2_free_rx_tx_queues(eth_dev);
2567
2568         /* Close the device at underlying layer*/
2569         ret = dpni_close(dpni, CMD_PRI_LOW, priv->token);
2570         if (ret) {
2571                 DPAA2_PMD_ERR(
2572                              "Failure closing dpni device with err code %d",
2573                              ret);
2574         }
2575
2576         /* Free the allocated memory for ethernet private data and dpni*/
2577         priv->hw = NULL;
2578         eth_dev->process_private = NULL;
2579         rte_free(dpni);
2580
2581         for (i = 0; i < MAX_TCS; i++) {
2582                 if (priv->extract.fs_extract_param[i])
2583                         rte_free((void *)(size_t)priv->extract.fs_extract_param[i]);
2584         }
2585
2586         if (priv->extract.qos_extract_param)
2587                 rte_free((void *)(size_t)priv->extract.qos_extract_param);
2588
2589         eth_dev->dev_ops = NULL;
2590         eth_dev->rx_pkt_burst = NULL;
2591         eth_dev->tx_pkt_burst = NULL;
2592
2593         DPAA2_PMD_INFO("%s: netdev deleted", eth_dev->data->name);
2594         return 0;
2595 }
2596
2597 static int
2598 rte_dpaa2_probe(struct rte_dpaa2_driver *dpaa2_drv,
2599                 struct rte_dpaa2_device *dpaa2_dev)
2600 {
2601         struct rte_eth_dev *eth_dev;
2602         struct dpaa2_dev_priv *dev_priv;
2603         int diag;
2604
2605         if ((DPAA2_MBUF_HW_ANNOTATION + DPAA2_FD_PTA_SIZE) >
2606                 RTE_PKTMBUF_HEADROOM) {
2607                 DPAA2_PMD_ERR(
2608                 "RTE_PKTMBUF_HEADROOM(%d) shall be > DPAA2 Annotation req(%d)",
2609                 RTE_PKTMBUF_HEADROOM,
2610                 DPAA2_MBUF_HW_ANNOTATION + DPAA2_FD_PTA_SIZE);
2611
2612                 return -1;
2613         }
2614
2615         if (rte_eal_process_type() == RTE_PROC_PRIMARY) {
2616                 eth_dev = rte_eth_dev_allocate(dpaa2_dev->device.name);
2617                 if (!eth_dev)
2618                         return -ENODEV;
2619                 dev_priv = rte_zmalloc("ethdev private structure",
2620                                        sizeof(struct dpaa2_dev_priv),
2621                                        RTE_CACHE_LINE_SIZE);
2622                 if (dev_priv == NULL) {
2623                         DPAA2_PMD_CRIT(
2624                                 "Unable to allocate memory for private data");
2625                         rte_eth_dev_release_port(eth_dev);
2626                         return -ENOMEM;
2627                 }
2628                 eth_dev->data->dev_private = (void *)dev_priv;
2629                 /* Store a pointer to eth_dev in dev_private */
2630                 dev_priv->eth_dev = eth_dev;
2631                 dev_priv->tx_conf_en = 0;
2632         } else {
2633                 eth_dev = rte_eth_dev_attach_secondary(dpaa2_dev->device.name);
2634                 if (!eth_dev) {
2635                         DPAA2_PMD_DEBUG("returning enodev");
2636                         return -ENODEV;
2637                 }
2638         }
2639
2640         eth_dev->device = &dpaa2_dev->device;
2641
2642         dpaa2_dev->eth_dev = eth_dev;
2643         eth_dev->data->rx_mbuf_alloc_failed = 0;
2644
2645         if (dpaa2_drv->drv_flags & RTE_DPAA2_DRV_INTR_LSC)
2646                 eth_dev->data->dev_flags |= RTE_ETH_DEV_INTR_LSC;
2647
2648         /* Invoke PMD device initialization function */
2649         diag = dpaa2_dev_init(eth_dev);
2650         if (diag == 0) {
2651                 rte_eth_dev_probing_finish(eth_dev);
2652                 return 0;
2653         }
2654
2655         rte_eth_dev_release_port(eth_dev);
2656         return diag;
2657 }
2658
2659 static int
2660 rte_dpaa2_remove(struct rte_dpaa2_device *dpaa2_dev)
2661 {
2662         struct rte_eth_dev *eth_dev;
2663
2664         eth_dev = dpaa2_dev->eth_dev;
2665         dpaa2_dev_uninit(eth_dev);
2666
2667         rte_eth_dev_release_port(eth_dev);
2668
2669         return 0;
2670 }
2671
2672 static struct rte_dpaa2_driver rte_dpaa2_pmd = {
2673         .drv_flags = RTE_DPAA2_DRV_INTR_LSC | RTE_DPAA2_DRV_IOVA_AS_VA,
2674         .drv_type = DPAA2_ETH,
2675         .probe = rte_dpaa2_probe,
2676         .remove = rte_dpaa2_remove,
2677 };
2678
2679 RTE_PMD_REGISTER_DPAA2(net_dpaa2, rte_dpaa2_pmd);
2680 RTE_PMD_REGISTER_PARAM_STRING(net_dpaa2,
2681                 DRIVER_LOOPBACK_MODE "=<int> "
2682                 DRIVER_NO_PREFETCH_MODE "=<int>");
2683 RTE_INIT(dpaa2_pmd_init_log)
2684 {
2685         dpaa2_logtype_pmd = rte_log_register("pmd.net.dpaa2");
2686         if (dpaa2_logtype_pmd >= 0)
2687                 rte_log_set_level(dpaa2_logtype_pmd, RTE_LOG_NOTICE);
2688 }