drivers/net/dpaa2/dpaa2_ethdev.c

   1 /* * SPDX-License-Identifier: BSD-3-Clause
   2  *
   3  *   Copyright (c) 2016 Freescale Semiconductor, Inc. All rights reserved.
   4  *   Copyright 2016 NXP
   5  *
   6  */
   7
   8 #include <time.h>
   9 #include <net/if.h>
  10
  11 #include <rte_mbuf.h>
  12 #include <rte_ethdev_driver.h>
  13 #include <rte_malloc.h>
  14 #include <rte_memcpy.h>
  15 #include <rte_string_fns.h>
  16 #include <rte_cycles.h>
  17 #include <rte_kvargs.h>
  18 #include <rte_dev.h>
  19 #include <rte_fslmc.h>
  20 #include <rte_flow_driver.h>
  21
  22 #include "dpaa2_pmd_logs.h"
  23 #include <fslmc_vfio.h>
  24 #include <dpaa2_hw_pvt.h>
  25 #include <dpaa2_hw_mempool.h>
  26 #include <dpaa2_hw_dpio.h>
  27 #include <mc/fsl_dpmng.h>
  28 #include "dpaa2_ethdev.h"
  29 #include "dpaa2_sparser.h"
  30 #include <fsl_qbman_debug.h>
  31
  32 #define DRIVER_LOOPBACK_MODE "drv_loopback"
  33 #define DRIVER_NO_PREFETCH_MODE "drv_no_prefetch"
  34
  35 /* Supported Rx offloads */
  36 static uint64_t dev_rx_offloads_sup =
  37                 DEV_RX_OFFLOAD_CHECKSUM |
  38                 DEV_RX_OFFLOAD_SCTP_CKSUM |
  39                 DEV_RX_OFFLOAD_OUTER_IPV4_CKSUM |
  40                 DEV_RX_OFFLOAD_OUTER_UDP_CKSUM |
  41                 DEV_RX_OFFLOAD_VLAN_STRIP |
  42                 DEV_RX_OFFLOAD_VLAN_FILTER |
  43                 DEV_RX_OFFLOAD_JUMBO_FRAME |
  44                 DEV_RX_OFFLOAD_TIMESTAMP;
  45
  46 /* Rx offloads which cannot be disabled */
  47 static uint64_t dev_rx_offloads_nodis =
  48                 DEV_RX_OFFLOAD_SCATTER;
  49
  50 /* Supported Tx offloads */
  51 static uint64_t dev_tx_offloads_sup =
  52                 DEV_TX_OFFLOAD_VLAN_INSERT |
  53                 DEV_TX_OFFLOAD_IPV4_CKSUM |
  54                 DEV_TX_OFFLOAD_UDP_CKSUM |
  55                 DEV_TX_OFFLOAD_TCP_CKSUM |
  56                 DEV_TX_OFFLOAD_SCTP_CKSUM |
  57                 DEV_TX_OFFLOAD_OUTER_IPV4_CKSUM |
  58                 DEV_TX_OFFLOAD_MT_LOCKFREE |
  59                 DEV_TX_OFFLOAD_MBUF_FAST_FREE;
  60
  61 /* Tx offloads which cannot be disabled */
  62 static uint64_t dev_tx_offloads_nodis =
  63                 DEV_TX_OFFLOAD_MULTI_SEGS;
  64
  65 /* enable timestamp in mbuf */
  66 enum pmd_dpaa2_ts dpaa2_enable_ts;
  67
  68 struct rte_dpaa2_xstats_name_off {
  69         char name[RTE_ETH_XSTATS_NAME_SIZE];
  70         uint8_t page_id; /* dpni statistics page id */
  71         uint8_t stats_id; /* stats id in the given page */
  72 };
  73
  74 static const struct rte_dpaa2_xstats_name_off dpaa2_xstats_strings[] = {
  75         {"ingress_multicast_frames", 0, 2},
  76         {"ingress_multicast_bytes", 0, 3},
  77         {"ingress_broadcast_frames", 0, 4},
  78         {"ingress_broadcast_bytes", 0, 5},
  79         {"egress_multicast_frames", 1, 2},
  80         {"egress_multicast_bytes", 1, 3},
  81         {"egress_broadcast_frames", 1, 4},
  82         {"egress_broadcast_bytes", 1, 5},
  83         {"ingress_filtered_frames", 2, 0},
  84         {"ingress_discarded_frames", 2, 1},
  85         {"ingress_nobuffer_discards", 2, 2},
  86         {"egress_discarded_frames", 2, 3},
  87         {"egress_confirmed_frames", 2, 4},
  88         {"cgr_reject_frames", 4, 0},
  89         {"cgr_reject_bytes", 4, 1},
  90 };
  91
  92 static const enum rte_filter_op dpaa2_supported_filter_ops[] = {
  93         RTE_ETH_FILTER_ADD,
  94         RTE_ETH_FILTER_DELETE,
  95         RTE_ETH_FILTER_UPDATE,
  96         RTE_ETH_FILTER_FLUSH,
  97         RTE_ETH_FILTER_GET
  98 };
  99
 100 static struct rte_dpaa2_driver rte_dpaa2_pmd;
 101 static int dpaa2_dev_uninit(struct rte_eth_dev *eth_dev);
 102 static int dpaa2_dev_link_update(struct rte_eth_dev *dev,
 103                                  int wait_to_complete);
 104 static int dpaa2_dev_set_link_up(struct rte_eth_dev *dev);
 105 static int dpaa2_dev_set_link_down(struct rte_eth_dev *dev);
 106 static int dpaa2_dev_mtu_set(struct rte_eth_dev *dev, uint16_t mtu);
 107
 108 int dpaa2_logtype_pmd;
 109
 110 void
 111 rte_pmd_dpaa2_set_timestamp(enum pmd_dpaa2_ts enable)
 112 {
 113         dpaa2_enable_ts = enable;
 114 }
 115
 116 static int
 117 dpaa2_vlan_filter_set(struct rte_eth_dev *dev, uint16_t vlan_id, int on)
 118 {
 119         int ret;
 120         struct dpaa2_dev_priv *priv = dev->data->dev_private;
 121         struct fsl_mc_io *dpni = dev->process_private;
 122
 123         PMD_INIT_FUNC_TRACE();
 124
 125         if (dpni == NULL) {
 126                 DPAA2_PMD_ERR("dpni is NULL");
 127                 return -1;
 128         }
 129
 130         if (on)
 131                 ret = dpni_add_vlan_id(dpni, CMD_PRI_LOW,
 132                                        priv->token, vlan_id);
 133         else
 134                 ret = dpni_remove_vlan_id(dpni, CMD_PRI_LOW,
 135                                           priv->token, vlan_id);
 136
 137         if (ret < 0)
 138                 DPAA2_PMD_ERR("ret = %d Unable to add/rem vlan %d hwid =%d",
 139                               ret, vlan_id, priv->hw_id);
 140
 141         return ret;
 142 }
 143
 144 static int
 145 dpaa2_vlan_offload_set(struct rte_eth_dev *dev, int mask)
 146 {
 147         struct dpaa2_dev_priv *priv = dev->data->dev_private;
 148         struct fsl_mc_io *dpni = dev->process_private;
 149         int ret;
 150
 151         PMD_INIT_FUNC_TRACE();
 152
 153         if (mask & ETH_VLAN_FILTER_MASK) {
 154                 /* VLAN Filter not avaialble */
 155                 if (!priv->max_vlan_filters) {
 156                         DPAA2_PMD_INFO("VLAN filter not available");
 157                         goto next_mask;
 158                 }
 159
 160                 if (dev->data->dev_conf.rxmode.offloads &
 161                         DEV_RX_OFFLOAD_VLAN_FILTER)
 162                         ret = dpni_enable_vlan_filter(dpni, CMD_PRI_LOW,
 163                                                       priv->token, true);
 164                 else
 165                         ret = dpni_enable_vlan_filter(dpni, CMD_PRI_LOW,
 166                                                       priv->token, false);
 167                 if (ret < 0)
 168                         DPAA2_PMD_INFO("Unable to set vlan filter = %d", ret);
 169         }
 170 next_mask:
 171         if (mask & ETH_VLAN_EXTEND_MASK) {
 172                 if (dev->data->dev_conf.rxmode.offloads &
 173                         DEV_RX_OFFLOAD_VLAN_EXTEND)
 174                         DPAA2_PMD_INFO("VLAN extend offload not supported");
 175         }
 176
 177         return 0;
 178 }
 179
 180 static int
 181 dpaa2_vlan_tpid_set(struct rte_eth_dev *dev,
 182                       enum rte_vlan_type vlan_type __rte_unused,
 183                       uint16_t tpid)
 184 {
 185         struct dpaa2_dev_priv *priv = dev->data->dev_private;
 186         struct fsl_mc_io *dpni = dev->process_private;
 187         int ret = -ENOTSUP;
 188
 189         PMD_INIT_FUNC_TRACE();
 190
 191         /* nothing to be done for standard vlan tpids */
 192         if (tpid == 0x8100 || tpid == 0x88A8)
 193                 return 0;
 194
 195         ret = dpni_add_custom_tpid(dpni, CMD_PRI_LOW,
 196                                    priv->token, tpid);
 197         if (ret < 0)
 198                 DPAA2_PMD_INFO("Unable to set vlan tpid = %d", ret);
 199         /* if already configured tpids, remove them first */
 200         if (ret == -EBUSY) {
 201                 struct dpni_custom_tpid_cfg tpid_list = {0};
 202
 203                 ret = dpni_get_custom_tpid(dpni, CMD_PRI_LOW,
 204                                    priv->token, &tpid_list);
 205                 if (ret < 0)
 206                         goto fail;
 207                 ret = dpni_remove_custom_tpid(dpni, CMD_PRI_LOW,
 208                                    priv->token, tpid_list.tpid1);
 209                 if (ret < 0)
 210                         goto fail;
 211                 ret = dpni_add_custom_tpid(dpni, CMD_PRI_LOW,
 212                                            priv->token, tpid);
 213         }
 214 fail:
 215         return ret;
 216 }
 217
 218 static int
 219 dpaa2_fw_version_get(struct rte_eth_dev *dev,
 220                      char *fw_version,
 221                      size_t fw_size)
 222 {
 223         int ret;
 224         struct fsl_mc_io *dpni = dev->process_private;
 225         struct mc_soc_version mc_plat_info = {0};
 226         struct mc_version mc_ver_info = {0};
 227
 228         PMD_INIT_FUNC_TRACE();
 229
 230         if (mc_get_soc_version(dpni, CMD_PRI_LOW, &mc_plat_info))
 231                 DPAA2_PMD_WARN("\tmc_get_soc_version failed");
 232
 233         if (mc_get_version(dpni, CMD_PRI_LOW, &mc_ver_info))
 234                 DPAA2_PMD_WARN("\tmc_get_version failed");
 235
 236         ret = snprintf(fw_version, fw_size,
 237                        "%x-%d.%d.%d",
 238                        mc_plat_info.svr,
 239                        mc_ver_info.major,
 240                        mc_ver_info.minor,
 241                        mc_ver_info.revision);
 242
 243         ret += 1; /* add the size of '\0' */
 244         if (fw_size < (uint32_t)ret)
 245                 return ret;
 246         else
 247                 return 0;
 248 }
 249
 250 static int
 251 dpaa2_dev_info_get(struct rte_eth_dev *dev, struct rte_eth_dev_info *dev_info)
 252 {
 253         struct dpaa2_dev_priv *priv = dev->data->dev_private;
 254
 255         PMD_INIT_FUNC_TRACE();
 256
 257         dev_info->if_index = priv->hw_id;
 258
 259         dev_info->max_mac_addrs = priv->max_mac_filters;
 260         dev_info->max_rx_pktlen = DPAA2_MAX_RX_PKT_LEN;
 261         dev_info->min_rx_bufsize = DPAA2_MIN_RX_BUF_SIZE;
 262         dev_info->max_rx_queues = (uint16_t)priv->nb_rx_queues;
 263         dev_info->max_tx_queues = (uint16_t)priv->nb_tx_queues;
 264         dev_info->rx_offload_capa = dev_rx_offloads_sup |
 265                                         dev_rx_offloads_nodis;
 266         dev_info->tx_offload_capa = dev_tx_offloads_sup |
 267                                         dev_tx_offloads_nodis;
 268         dev_info->speed_capa = ETH_LINK_SPEED_1G |
 269                         ETH_LINK_SPEED_2_5G |
 270                         ETH_LINK_SPEED_10G;
 271
 272         dev_info->max_hash_mac_addrs = 0;
 273         dev_info->max_vfs = 0;
 274         dev_info->max_vmdq_pools = ETH_16_POOLS;
 275         dev_info->flow_type_rss_offloads = DPAA2_RSS_OFFLOAD_ALL;
 276
 277         return 0;
 278 }
 279
 280 static int
 281 dpaa2_alloc_rx_tx_queues(struct rte_eth_dev *dev)
 282 {
 283         struct dpaa2_dev_priv *priv = dev->data->dev_private;
 284         uint16_t dist_idx;
 285         uint32_t vq_id;
 286         uint8_t num_rxqueue_per_tc;
 287         struct dpaa2_queue *mc_q, *mcq;
 288         uint32_t tot_queues;
 289         int i;
 290         struct dpaa2_queue *dpaa2_q;
 291
 292         PMD_INIT_FUNC_TRACE();
 293
 294         num_rxqueue_per_tc = (priv->nb_rx_queues / priv->num_rx_tc);
 295         if (priv->tx_conf_en)
 296                 tot_queues = priv->nb_rx_queues + 2 * priv->nb_tx_queues;
 297         else
 298                 tot_queues = priv->nb_rx_queues + priv->nb_tx_queues;
 299         mc_q = rte_malloc(NULL, sizeof(struct dpaa2_queue) * tot_queues,
 300                           RTE_CACHE_LINE_SIZE);
 301         if (!mc_q) {
 302                 DPAA2_PMD_ERR("Memory allocation failed for rx/tx queues");
 303                 return -1;
 304         }
 305
 306         for (i = 0; i < priv->nb_rx_queues; i++) {
 307                 mc_q->eth_data = dev->data;
 308                 priv->rx_vq[i] = mc_q++;
 309                 dpaa2_q = (struct dpaa2_queue *)priv->rx_vq[i];
 310                 dpaa2_q->q_storage = rte_malloc("dq_storage",
 311                                         sizeof(struct queue_storage_info_t),
 312                                         RTE_CACHE_LINE_SIZE);
 313                 if (!dpaa2_q->q_storage)
 314                         goto fail;
 315
 316                 memset(dpaa2_q->q_storage, 0,
 317                        sizeof(struct queue_storage_info_t));
 318                 if (dpaa2_alloc_dq_storage(dpaa2_q->q_storage))
 319                         goto fail;
 320         }
 321
 322         for (i = 0; i < priv->nb_tx_queues; i++) {
 323                 mc_q->eth_data = dev->data;
 324                 mc_q->flow_id = 0xffff;
 325                 priv->tx_vq[i] = mc_q++;
 326                 dpaa2_q = (struct dpaa2_queue *)priv->tx_vq[i];
 327                 dpaa2_q->cscn = rte_malloc(NULL,
 328                                            sizeof(struct qbman_result), 16);
 329                 if (!dpaa2_q->cscn)
 330                         goto fail_tx;
 331         }
 332
 333         if (priv->tx_conf_en) {
 334                 /*Setup tx confirmation queues*/
 335                 for (i = 0; i < priv->nb_tx_queues; i++) {
 336                         mc_q->eth_data = dev->data;
 337                         mc_q->tc_index = i;
 338                         mc_q->flow_id = 0;
 339                         priv->tx_conf_vq[i] = mc_q++;
 340                         dpaa2_q = (struct dpaa2_queue *)priv->tx_conf_vq[i];
 341                         dpaa2_q->q_storage =
 342                                 rte_malloc("dq_storage",
 343                                         sizeof(struct queue_storage_info_t),
 344                                         RTE_CACHE_LINE_SIZE);
 345                         if (!dpaa2_q->q_storage)
 346                                 goto fail_tx_conf;
 347
 348                         memset(dpaa2_q->q_storage, 0,
 349                                sizeof(struct queue_storage_info_t));
 350                         if (dpaa2_alloc_dq_storage(dpaa2_q->q_storage))
 351                                 goto fail_tx_conf;
 352                 }
 353         }
 354
 355         vq_id = 0;
 356         for (dist_idx = 0; dist_idx < priv->nb_rx_queues; dist_idx++) {
 357                 mcq = (struct dpaa2_queue *)priv->rx_vq[vq_id];
 358                 mcq->tc_index = dist_idx / num_rxqueue_per_tc;
 359                 mcq->flow_id = dist_idx % num_rxqueue_per_tc;
 360                 vq_id++;
 361         }
 362
 363         return 0;
 364 fail_tx_conf:
 365         i -= 1;
 366         while (i >= 0) {
 367                 dpaa2_q = (struct dpaa2_queue *)priv->tx_conf_vq[i];
 368                 rte_free(dpaa2_q->q_storage);
 369                 priv->tx_conf_vq[i--] = NULL;
 370         }
 371         i = priv->nb_tx_queues;
 372 fail_tx:
 373         i -= 1;
 374         while (i >= 0) {
 375                 dpaa2_q = (struct dpaa2_queue *)priv->tx_vq[i];
 376                 rte_free(dpaa2_q->cscn);
 377                 priv->tx_vq[i--] = NULL;
 378         }
 379         i = priv->nb_rx_queues;
 380 fail:
 381         i -= 1;
 382         mc_q = priv->rx_vq[0];
 383         while (i >= 0) {
 384                 dpaa2_q = (struct dpaa2_queue *)priv->rx_vq[i];
 385                 dpaa2_free_dq_storage(dpaa2_q->q_storage);
 386                 rte_free(dpaa2_q->q_storage);
 387                 priv->rx_vq[i--] = NULL;
 388         }
 389         rte_free(mc_q);
 390         return -1;
 391 }
 392
 393 static void
 394 dpaa2_free_rx_tx_queues(struct rte_eth_dev *dev)
 395 {
 396         struct dpaa2_dev_priv *priv = dev->data->dev_private;
 397         struct dpaa2_queue *dpaa2_q;
 398         int i;
 399
 400         PMD_INIT_FUNC_TRACE();
 401
 402         /* Queue allocation base */
 403         if (priv->rx_vq[0]) {
 404                 /* cleaning up queue storage */
 405                 for (i = 0; i < priv->nb_rx_queues; i++) {
 406                         dpaa2_q = (struct dpaa2_queue *)priv->rx_vq[i];
 407                         if (dpaa2_q->q_storage)
 408                                 rte_free(dpaa2_q->q_storage);
 409                 }
 410                 /* cleanup tx queue cscn */
 411                 for (i = 0; i < priv->nb_tx_queues; i++) {
 412                         dpaa2_q = (struct dpaa2_queue *)priv->tx_vq[i];
 413                         rte_free(dpaa2_q->cscn);
 414                 }
 415                 if (priv->tx_conf_en) {
 416                         /* cleanup tx conf queue storage */
 417                         for (i = 0; i < priv->nb_tx_queues; i++) {
 418                                 dpaa2_q = (struct dpaa2_queue *)
 419                                                 priv->tx_conf_vq[i];
 420                                 rte_free(dpaa2_q->q_storage);
 421                         }
 422                 }
 423                 /*free memory for all queues (RX+TX) */
 424                 rte_free(priv->rx_vq[0]);
 425                 priv->rx_vq[0] = NULL;
 426         }
 427 }
 428
 429 static int
 430 dpaa2_eth_dev_configure(struct rte_eth_dev *dev)
 431 {
 432         struct dpaa2_dev_priv *priv = dev->data->dev_private;
 433         struct fsl_mc_io *dpni = dev->process_private;
 434         struct rte_eth_conf *eth_conf = &dev->data->dev_conf;
 435         uint64_t rx_offloads = eth_conf->rxmode.offloads;
 436         uint64_t tx_offloads = eth_conf->txmode.offloads;
 437         int rx_l3_csum_offload = false;
 438         int rx_l4_csum_offload = false;
 439         int tx_l3_csum_offload = false;
 440         int tx_l4_csum_offload = false;
 441         int ret;
 442
 443         PMD_INIT_FUNC_TRACE();
 444
 445         /* Rx offloads which are enabled by default */
 446         if (dev_rx_offloads_nodis & ~rx_offloads) {
 447                 DPAA2_PMD_INFO(
 448                 "Some of rx offloads enabled by default - requested 0x%" PRIx64
 449                 " fixed are 0x%" PRIx64,
 450                 rx_offloads, dev_rx_offloads_nodis);
 451         }
 452
 453         /* Tx offloads which are enabled by default */
 454         if (dev_tx_offloads_nodis & ~tx_offloads) {
 455                 DPAA2_PMD_INFO(
 456                 "Some of tx offloads enabled by default - requested 0x%" PRIx64
 457                 " fixed are 0x%" PRIx64,
 458                 tx_offloads, dev_tx_offloads_nodis);
 459         }
 460
 461         if (rx_offloads & DEV_RX_OFFLOAD_JUMBO_FRAME) {
 462                 if (eth_conf->rxmode.max_rx_pkt_len <= DPAA2_MAX_RX_PKT_LEN) {
 463                         ret = dpni_set_max_frame_length(dpni, CMD_PRI_LOW,
 464                                 priv->token, eth_conf->rxmode.max_rx_pkt_len
 465                                 - RTE_ETHER_CRC_LEN);
 466                         if (ret) {
 467                                 DPAA2_PMD_ERR(
 468                                         "Unable to set mtu. check config");
 469                                 return ret;
 470                         }
 471                         dev->data->mtu =
 472                                 dev->data->dev_conf.rxmode.max_rx_pkt_len -
 473                                 RTE_ETHER_HDR_LEN - RTE_ETHER_CRC_LEN -
 474                                 VLAN_TAG_SIZE;
 475                 } else {
 476                         return -1;
 477                 }
 478         }
 479
 480         if (eth_conf->rxmode.mq_mode == ETH_MQ_RX_RSS) {
 481                 ret = dpaa2_setup_flow_dist(dev,
 482                                 eth_conf->rx_adv_conf.rss_conf.rss_hf);
 483                 if (ret) {
 484                         DPAA2_PMD_ERR("Unable to set flow distribution."
 485                                       "Check queue config");
 486                         return ret;
 487                 }
 488         }
 489
 490         if (rx_offloads & DEV_RX_OFFLOAD_IPV4_CKSUM)
 491                 rx_l3_csum_offload = true;
 492
 493         if ((rx_offloads & DEV_RX_OFFLOAD_UDP_CKSUM) ||
 494                 (rx_offloads & DEV_RX_OFFLOAD_TCP_CKSUM) ||
 495                 (rx_offloads & DEV_RX_OFFLOAD_SCTP_CKSUM))
 496                 rx_l4_csum_offload = true;
 497
 498         ret = dpni_set_offload(dpni, CMD_PRI_LOW, priv->token,
 499                                DPNI_OFF_RX_L3_CSUM, rx_l3_csum_offload);
 500         if (ret) {
 501                 DPAA2_PMD_ERR("Error to set RX l3 csum:Error = %d", ret);
 502                 return ret;
 503         }
 504
 505         ret = dpni_set_offload(dpni, CMD_PRI_LOW, priv->token,
 506                                DPNI_OFF_RX_L4_CSUM, rx_l4_csum_offload);
 507         if (ret) {
 508                 DPAA2_PMD_ERR("Error to get RX l4 csum:Error = %d", ret);
 509                 return ret;
 510         }
 511
 512         if (rx_offloads & DEV_RX_OFFLOAD_TIMESTAMP)
 513                 dpaa2_enable_ts = true;
 514
 515         if (tx_offloads & DEV_TX_OFFLOAD_IPV4_CKSUM)
 516                 tx_l3_csum_offload = true;
 517
 518         if ((tx_offloads & DEV_TX_OFFLOAD_UDP_CKSUM) ||
 519                 (tx_offloads & DEV_TX_OFFLOAD_TCP_CKSUM) ||
 520                 (tx_offloads & DEV_TX_OFFLOAD_SCTP_CKSUM))
 521                 tx_l4_csum_offload = true;
 522
 523         ret = dpni_set_offload(dpni, CMD_PRI_LOW, priv->token,
 524                                DPNI_OFF_TX_L3_CSUM, tx_l3_csum_offload);
 525         if (ret) {
 526                 DPAA2_PMD_ERR("Error to set TX l3 csum:Error = %d", ret);
 527                 return ret;
 528         }
 529
 530         ret = dpni_set_offload(dpni, CMD_PRI_LOW, priv->token,
 531                                DPNI_OFF_TX_L4_CSUM, tx_l4_csum_offload);
 532         if (ret) {
 533                 DPAA2_PMD_ERR("Error to get TX l4 csum:Error = %d", ret);
 534                 return ret;
 535         }
 536
 537         /* Enabling hash results in FD requires setting DPNI_FLCTYPE_HASH in
 538          * dpni_set_offload API. Setting this FLCTYPE for DPNI sets the FD[SC]
 539          * to 0 for LS2 in the hardware thus disabling data/annotation
 540          * stashing. For LX2 this is fixed in hardware and thus hash result and
 541          * parse results can be received in FD using this option.
 542          */
 543         if (dpaa2_svr_family == SVR_LX2160A) {
 544                 ret = dpni_set_offload(dpni, CMD_PRI_LOW, priv->token,
 545                                        DPNI_FLCTYPE_HASH, true);
 546                 if (ret) {
 547                         DPAA2_PMD_ERR("Error setting FLCTYPE: Err = %d", ret);
 548                         return ret;
 549                 }
 550         }
 551
 552         if (rx_offloads & DEV_RX_OFFLOAD_VLAN_FILTER)
 553                 dpaa2_vlan_offload_set(dev, ETH_VLAN_FILTER_MASK);
 554
 555         /* update the current status */
 556         dpaa2_dev_link_update(dev, 0);
 557
 558         return 0;
 559 }
 560
 561 /* Function to setup RX flow information. It contains traffic class ID,
 562  * flow ID, destination configuration etc.
 563  */
 564 static int
 565 dpaa2_dev_rx_queue_setup(struct rte_eth_dev *dev,
 566                          uint16_t rx_queue_id,
 567                          uint16_t nb_rx_desc,
 568                          unsigned int socket_id __rte_unused,
 569                          const struct rte_eth_rxconf *rx_conf __rte_unused,
 570                          struct rte_mempool *mb_pool)
 571 {
 572         struct dpaa2_dev_priv *priv = dev->data->dev_private;
 573         struct fsl_mc_io *dpni = (struct fsl_mc_io *)dev->process_private;
 574         struct dpaa2_queue *dpaa2_q;
 575         struct dpni_queue cfg;
 576         uint8_t options = 0;
 577         uint8_t flow_id;
 578         uint32_t bpid;
 579         int i, ret;
 580
 581         PMD_INIT_FUNC_TRACE();
 582
 583         DPAA2_PMD_DEBUG("dev =%p, queue =%d, pool = %p, conf =%p",
 584                         dev, rx_queue_id, mb_pool, rx_conf);
 585
 586         if (!priv->bp_list || priv->bp_list->mp != mb_pool) {
 587                 bpid = mempool_to_bpid(mb_pool);
 588                 ret = dpaa2_attach_bp_list(priv,
 589                                            rte_dpaa2_bpid_info[bpid].bp_list);
 590                 if (ret)
 591                         return ret;
 592         }
 593         dpaa2_q = (struct dpaa2_queue *)priv->rx_vq[rx_queue_id];
 594         dpaa2_q->mb_pool = mb_pool; /**< mbuf pool to populate RX ring. */
 595         dpaa2_q->bp_array = rte_dpaa2_bpid_info;
 596
 597         /*Get the flow id from given VQ id*/
 598         flow_id = dpaa2_q->flow_id;
 599         memset(&cfg, 0, sizeof(struct dpni_queue));
 600
 601         options = options | DPNI_QUEUE_OPT_USER_CTX;
 602         cfg.user_context = (size_t)(dpaa2_q);
 603
 604         /* check if a private cgr available. */
 605         for (i = 0; i < priv->max_cgs; i++) {
 606                 if (!priv->cgid_in_use[i]) {
 607                         priv->cgid_in_use[i] = 1;
 608                         break;
 609                 }
 610         }
 611
 612         if (i < priv->max_cgs) {
 613                 options |= DPNI_QUEUE_OPT_SET_CGID;
 614                 cfg.cgid = i;
 615                 dpaa2_q->cgid = cfg.cgid;
 616         } else {
 617                 dpaa2_q->cgid = 0xff;
 618         }
 619
 620         /*if ls2088 or rev2 device, enable the stashing */
 621
 622         if ((dpaa2_svr_family & 0xffff0000) != SVR_LS2080A) {
 623                 options |= DPNI_QUEUE_OPT_FLC;
 624                 cfg.flc.stash_control = true;
 625                 cfg.flc.value &= 0xFFFFFFFFFFFFFFC0;
 626                 /* 00 00 00 - last 6 bit represent annotation, context stashing,
 627                  * data stashing setting 01 01 00 (0x14)
 628                  * (in following order ->DS AS CS)
 629                  * to enable 1 line data, 1 line annotation.
 630                  * For LX2, this setting should be 01 00 00 (0x10)
 631                  */
 632                 if ((dpaa2_svr_family & 0xffff0000) == SVR_LX2160A)
 633                         cfg.flc.value |= 0x10;
 634                 else
 635                         cfg.flc.value |= 0x14;
 636         }
 637         ret = dpni_set_queue(dpni, CMD_PRI_LOW, priv->token, DPNI_QUEUE_RX,
 638                              dpaa2_q->tc_index, flow_id, options, &cfg);
 639         if (ret) {
 640                 DPAA2_PMD_ERR("Error in setting the rx flow: = %d", ret);
 641                 return -1;
 642         }
 643
 644         if (!(priv->flags & DPAA2_RX_TAILDROP_OFF)) {
 645                 struct dpni_taildrop taildrop;
 646
 647                 taildrop.enable = 1;
 648
 649                 /* Private CGR will use tail drop length as nb_rx_desc.
 650                  * for rest cases we can use standard byte based tail drop.
 651                  * There is no HW restriction, but number of CGRs are limited,
 652                  * hence this restriction is placed.
 653                  */
 654                 if (dpaa2_q->cgid != 0xff) {
 655                         /*enabling per rx queue congestion control */
 656                         taildrop.threshold = nb_rx_desc;
 657                         taildrop.units = DPNI_CONGESTION_UNIT_FRAMES;
 658                         taildrop.oal = 0;
 659                         DPAA2_PMD_DEBUG("Enabling CG Tail Drop on queue = %d",
 660                                         rx_queue_id);
 661                         ret = dpni_set_taildrop(dpni, CMD_PRI_LOW, priv->token,
 662                                                 DPNI_CP_CONGESTION_GROUP,
 663                                                 DPNI_QUEUE_RX,
 664                                                 dpaa2_q->tc_index,
 665                                                 flow_id, &taildrop);
 666                 } else {
 667                         /*enabling per rx queue congestion control */
 668                         taildrop.threshold = CONG_THRESHOLD_RX_BYTES_Q;
 669                         taildrop.units = DPNI_CONGESTION_UNIT_BYTES;
 670                         taildrop.oal = CONG_RX_OAL;
 671                         DPAA2_PMD_DEBUG("Enabling Byte based Drop on queue= %d",
 672                                         rx_queue_id);
 673                         ret = dpni_set_taildrop(dpni, CMD_PRI_LOW, priv->token,
 674                                                 DPNI_CP_QUEUE, DPNI_QUEUE_RX,
 675                                                 dpaa2_q->tc_index, flow_id,
 676                                                 &taildrop);
 677                 }
 678                 if (ret) {
 679                         DPAA2_PMD_ERR("Error in setting taildrop. err=(%d)",
 680                                       ret);
 681                         return -1;
 682                 }
 683         } else { /* Disable tail Drop */
 684                 struct dpni_taildrop taildrop = {0};
 685                 DPAA2_PMD_INFO("Tail drop is disabled on queue");
 686
 687                 taildrop.enable = 0;
 688                 if (dpaa2_q->cgid != 0xff) {
 689                         ret = dpni_set_taildrop(dpni, CMD_PRI_LOW, priv->token,
 690                                         DPNI_CP_CONGESTION_GROUP, DPNI_QUEUE_RX,
 691                                         dpaa2_q->tc_index,
 692                                         flow_id, &taildrop);
 693                 } else {
 694                         ret = dpni_set_taildrop(dpni, CMD_PRI_LOW, priv->token,
 695                                         DPNI_CP_QUEUE, DPNI_QUEUE_RX,
 696                                         dpaa2_q->tc_index, flow_id, &taildrop);
 697                 }
 698                 if (ret) {
 699                         DPAA2_PMD_ERR("Error in setting taildrop. err=(%d)",
 700                                       ret);
 701                         return -1;
 702                 }
 703         }
 704
 705         dev->data->rx_queues[rx_queue_id] = dpaa2_q;
 706         return 0;
 707 }
 708
 709 static int
 710 dpaa2_dev_tx_queue_setup(struct rte_eth_dev *dev,
 711                          uint16_t tx_queue_id,
 712                          uint16_t nb_tx_desc __rte_unused,
 713                          unsigned int socket_id __rte_unused,
 714                          const struct rte_eth_txconf *tx_conf __rte_unused)
 715 {
 716         struct dpaa2_dev_priv *priv = dev->data->dev_private;
 717         struct dpaa2_queue *dpaa2_q = (struct dpaa2_queue *)
 718                 priv->tx_vq[tx_queue_id];
 719         struct dpaa2_queue *dpaa2_tx_conf_q = (struct dpaa2_queue *)
 720                 priv->tx_conf_vq[tx_queue_id];
 721         struct fsl_mc_io *dpni = dev->process_private;
 722         struct dpni_queue tx_conf_cfg;
 723         struct dpni_queue tx_flow_cfg;
 724         uint8_t options = 0, flow_id;
 725         struct dpni_queue_id qid;
 726         uint32_t tc_id;
 727         int ret;
 728
 729         PMD_INIT_FUNC_TRACE();
 730
 731         /* Return if queue already configured */
 732         if (dpaa2_q->flow_id != 0xffff) {
 733                 dev->data->tx_queues[tx_queue_id] = dpaa2_q;
 734                 return 0;
 735         }
 736
 737         memset(&tx_conf_cfg, 0, sizeof(struct dpni_queue));
 738         memset(&tx_flow_cfg, 0, sizeof(struct dpni_queue));
 739
 740         tc_id = tx_queue_id;
 741         flow_id = 0;
 742
 743         ret = dpni_set_queue(dpni, CMD_PRI_LOW, priv->token, DPNI_QUEUE_TX,
 744                              tc_id, flow_id, options, &tx_flow_cfg);
 745         if (ret) {
 746                 DPAA2_PMD_ERR("Error in setting the tx flow: "
 747                               "tc_id=%d, flow=%d err=%d",
 748                               tc_id, flow_id, ret);
 749                         return -1;
 750         }
 751
 752         dpaa2_q->flow_id = flow_id;
 753
 754         if (tx_queue_id == 0) {
 755                 /*Set tx-conf and error configuration*/
 756                 if (priv->tx_conf_en)
 757                         ret = dpni_set_tx_confirmation_mode(dpni, CMD_PRI_LOW,
 758                                                             priv->token,
 759                                                             DPNI_CONF_AFFINE);
 760                 else
 761                         ret = dpni_set_tx_confirmation_mode(dpni, CMD_PRI_LOW,
 762                                                             priv->token,
 763                                                             DPNI_CONF_DISABLE);
 764                 if (ret) {
 765                         DPAA2_PMD_ERR("Error in set tx conf mode settings: "
 766                                       "err=%d", ret);
 767                         return -1;
 768                 }
 769         }
 770         dpaa2_q->tc_index = tc_id;
 771
 772         ret = dpni_get_queue(dpni, CMD_PRI_LOW, priv->token,
 773                              DPNI_QUEUE_TX, dpaa2_q->tc_index,
 774                              dpaa2_q->flow_id, &tx_flow_cfg, &qid);
 775         if (ret) {
 776                 DPAA2_PMD_ERR("Error in getting LFQID err=%d", ret);
 777                 return -1;
 778         }
 779         dpaa2_q->fqid = qid.fqid;
 780
 781         if (!(priv->flags & DPAA2_TX_CGR_OFF)) {
 782                 struct dpni_congestion_notification_cfg cong_notif_cfg = {0};
 783
 784                 cong_notif_cfg.units = DPNI_CONGESTION_UNIT_FRAMES;
 785                 cong_notif_cfg.threshold_entry = CONG_ENTER_TX_THRESHOLD;
 786                 /* Notify that the queue is not congested when the data in
 787                  * the queue is below this thershold.
 788                  */
 789                 cong_notif_cfg.threshold_exit = CONG_EXIT_TX_THRESHOLD;
 790                 cong_notif_cfg.message_ctx = 0;
 791                 cong_notif_cfg.message_iova =
 792                                 (size_t)DPAA2_VADDR_TO_IOVA(dpaa2_q->cscn);
 793                 cong_notif_cfg.dest_cfg.dest_type = DPNI_DEST_NONE;
 794                 cong_notif_cfg.notification_mode =
 795                                          DPNI_CONG_OPT_WRITE_MEM_ON_ENTER |
 796                                          DPNI_CONG_OPT_WRITE_MEM_ON_EXIT |
 797                                          DPNI_CONG_OPT_COHERENT_WRITE;
 798                 cong_notif_cfg.cg_point = DPNI_CP_QUEUE;
 799
 800                 ret = dpni_set_congestion_notification(dpni, CMD_PRI_LOW,
 801                                                        priv->token,
 802                                                        DPNI_QUEUE_TX,
 803                                                        tc_id,
 804                                                        &cong_notif_cfg);
 805                 if (ret) {
 806                         DPAA2_PMD_ERR(
 807                            "Error in setting tx congestion notification: "
 808                            "err=%d", ret);
 809                         return -ret;
 810                 }
 811         }
 812         dpaa2_q->cb_eqresp_free = dpaa2_dev_free_eqresp_buf;
 813         dev->data->tx_queues[tx_queue_id] = dpaa2_q;
 814
 815         if (priv->tx_conf_en) {
 816                 dpaa2_q->tx_conf_queue = dpaa2_tx_conf_q;
 817                 options = options | DPNI_QUEUE_OPT_USER_CTX;
 818                 tx_conf_cfg.user_context = (size_t)(dpaa2_q);
 819                 ret = dpni_set_queue(dpni, CMD_PRI_LOW, priv->token,
 820                              DPNI_QUEUE_TX_CONFIRM, dpaa2_tx_conf_q->tc_index,
 821                              dpaa2_tx_conf_q->flow_id, options, &tx_conf_cfg);
 822                 if (ret) {
 823                         DPAA2_PMD_ERR("Error in setting the tx conf flow: "
 824                               "tc_index=%d, flow=%d err=%d",
 825                               dpaa2_tx_conf_q->tc_index,
 826                               dpaa2_tx_conf_q->flow_id, ret);
 827                         return -1;
 828                 }
 829
 830                 ret = dpni_get_queue(dpni, CMD_PRI_LOW, priv->token,
 831                              DPNI_QUEUE_TX_CONFIRM, dpaa2_tx_conf_q->tc_index,
 832                              dpaa2_tx_conf_q->flow_id, &tx_conf_cfg, &qid);
 833                 if (ret) {
 834                         DPAA2_PMD_ERR("Error in getting LFQID err=%d", ret);
 835                         return -1;
 836                 }
 837                 dpaa2_tx_conf_q->fqid = qid.fqid;
 838         }
 839         return 0;
 840 }
 841
 842 static void
 843 dpaa2_dev_rx_queue_release(void *q __rte_unused)
 844 {
 845         struct dpaa2_queue *dpaa2_q = (struct dpaa2_queue *)q;
 846         struct dpaa2_dev_priv *priv = dpaa2_q->eth_data->dev_private;
 847         struct fsl_mc_io *dpni =
 848                 (struct fsl_mc_io *)priv->eth_dev->process_private;
 849         uint8_t options = 0;
 850         int ret;
 851         struct dpni_queue cfg;
 852
 853         memset(&cfg, 0, sizeof(struct dpni_queue));
 854         PMD_INIT_FUNC_TRACE();
 855         if (dpaa2_q->cgid != 0xff) {
 856                 options = DPNI_QUEUE_OPT_CLEAR_CGID;
 857                 cfg.cgid = dpaa2_q->cgid;
 858
 859                 ret = dpni_set_queue(dpni, CMD_PRI_LOW, priv->token,
 860                                      DPNI_QUEUE_RX,
 861                                      dpaa2_q->tc_index, dpaa2_q->flow_id,
 862                                      options, &cfg);
 863                 if (ret)
 864                         DPAA2_PMD_ERR("Unable to clear CGR from q=%u err=%d",
 865                                         dpaa2_q->fqid, ret);
 866                 priv->cgid_in_use[dpaa2_q->cgid] = 0;
 867                 dpaa2_q->cgid = 0xff;
 868         }
 869 }
 870
 871 static void
 872 dpaa2_dev_tx_queue_release(void *q __rte_unused)
 873 {
 874         PMD_INIT_FUNC_TRACE();
 875 }
 876
 877 static uint32_t
 878 dpaa2_dev_rx_queue_count(struct rte_eth_dev *dev, uint16_t rx_queue_id)
 879 {
 880         int32_t ret;
 881         struct dpaa2_dev_priv *priv = dev->data->dev_private;
 882         struct dpaa2_queue *dpaa2_q;
 883         struct qbman_swp *swp;
 884         struct qbman_fq_query_np_rslt state;
 885         uint32_t frame_cnt = 0;
 886
 887         PMD_INIT_FUNC_TRACE();
 888
 889         if (unlikely(!DPAA2_PER_LCORE_DPIO)) {
 890                 ret = dpaa2_affine_qbman_swp();
 891                 if (ret) {
 892                         DPAA2_PMD_ERR("Failure in affining portal");
 893                         return -EINVAL;
 894                 }
 895         }
 896         swp = DPAA2_PER_LCORE_PORTAL;
 897
 898         dpaa2_q = (struct dpaa2_queue *)priv->rx_vq[rx_queue_id];
 899
 900         if (qbman_fq_query_state(swp, dpaa2_q->fqid, &state) == 0) {
 901                 frame_cnt = qbman_fq_state_frame_count(&state);
 902                 DPAA2_PMD_DEBUG("RX frame count for q(%d) is %u",
 903                                 rx_queue_id, frame_cnt);
 904         }
 905         return frame_cnt;
 906 }
 907
 908 static const uint32_t *
 909 dpaa2_supported_ptypes_get(struct rte_eth_dev *dev)
 910 {
 911         static const uint32_t ptypes[] = {
 912                 /*todo -= add more types */
 913                 RTE_PTYPE_L2_ETHER,
 914                 RTE_PTYPE_L3_IPV4,
 915                 RTE_PTYPE_L3_IPV4_EXT,
 916                 RTE_PTYPE_L3_IPV6,
 917                 RTE_PTYPE_L3_IPV6_EXT,
 918                 RTE_PTYPE_L4_TCP,
 919                 RTE_PTYPE_L4_UDP,
 920                 RTE_PTYPE_L4_SCTP,
 921                 RTE_PTYPE_L4_ICMP,
 922                 RTE_PTYPE_UNKNOWN
 923         };
 924
 925         if (dev->rx_pkt_burst == dpaa2_dev_prefetch_rx ||
 926                 dev->rx_pkt_burst == dpaa2_dev_rx ||
 927                 dev->rx_pkt_burst == dpaa2_dev_loopback_rx)
 928                 return ptypes;
 929         return NULL;
 930 }
 931
 932 /**
 933  * Dpaa2 link Interrupt handler
 934  *
 935  * @param param
 936  *  The address of parameter (struct rte_eth_dev *) regsitered before.
 937  *
 938  * @return
 939  *  void
 940  */
 941 static void
 942 dpaa2_interrupt_handler(void *param)
 943 {
 944         struct rte_eth_dev *dev = param;
 945         struct dpaa2_dev_priv *priv = dev->data->dev_private;
 946         struct fsl_mc_io *dpni = (struct fsl_mc_io *)dev->process_private;
 947         int ret;
 948         int irq_index = DPNI_IRQ_INDEX;
 949         unsigned int status = 0, clear = 0;
 950
 951         PMD_INIT_FUNC_TRACE();
 952
 953         if (dpni == NULL) {
 954                 DPAA2_PMD_ERR("dpni is NULL");
 955                 return;
 956         }
 957
 958         ret = dpni_get_irq_status(dpni, CMD_PRI_LOW, priv->token,
 959                                   irq_index, &status);
 960         if (unlikely(ret)) {
 961                 DPAA2_PMD_ERR("Can't get irq status (err %d)", ret);
 962                 clear = 0xffffffff;
 963                 goto out;
 964         }
 965
 966         if (status & DPNI_IRQ_EVENT_LINK_CHANGED) {
 967                 clear = DPNI_IRQ_EVENT_LINK_CHANGED;
 968                 dpaa2_dev_link_update(dev, 0);
 969                 /* calling all the apps registered for link status event */
 970                 _rte_eth_dev_callback_process(dev, RTE_ETH_EVENT_INTR_LSC,
 971                                               NULL);
 972         }
 973 out:
 974         ret = dpni_clear_irq_status(dpni, CMD_PRI_LOW, priv->token,
 975                                     irq_index, clear);
 976         if (unlikely(ret))
 977                 DPAA2_PMD_ERR("Can't clear irq status (err %d)", ret);
 978 }
 979
 980 static int
 981 dpaa2_eth_setup_irqs(struct rte_eth_dev *dev, int enable)
 982 {
 983         int err = 0;
 984         struct dpaa2_dev_priv *priv = dev->data->dev_private;
 985         struct fsl_mc_io *dpni = (struct fsl_mc_io *)dev->process_private;
 986         int irq_index = DPNI_IRQ_INDEX;
 987         unsigned int mask = DPNI_IRQ_EVENT_LINK_CHANGED;
 988
 989         PMD_INIT_FUNC_TRACE();
 990
 991         err = dpni_set_irq_mask(dpni, CMD_PRI_LOW, priv->token,
 992                                 irq_index, mask);
 993         if (err < 0) {
 994                 DPAA2_PMD_ERR("Error: dpni_set_irq_mask():%d (%s)", err,
 995                               strerror(-err));
 996                 return err;
 997         }
 998
 999         err = dpni_set_irq_enable(dpni, CMD_PRI_LOW, priv->token,
1000                                   irq_index, enable);
1001         if (err < 0)
1002                 DPAA2_PMD_ERR("Error: dpni_set_irq_enable():%d (%s)", err,
1003                               strerror(-err));
1004
1005         return err;
1006 }
1007
1008 static int
1009 dpaa2_dev_start(struct rte_eth_dev *dev)
1010 {
1011         struct rte_device *rdev = dev->device;
1012         struct rte_dpaa2_device *dpaa2_dev;
1013         struct rte_eth_dev_data *data = dev->data;
1014         struct dpaa2_dev_priv *priv = data->dev_private;
1015         struct fsl_mc_io *dpni = (struct fsl_mc_io *)dev->process_private;
1016         struct dpni_queue cfg;
1017         struct dpni_error_cfg   err_cfg;
1018         uint16_t qdid;
1019         struct dpni_queue_id qid;
1020         struct dpaa2_queue *dpaa2_q;
1021         int ret, i;
1022         struct rte_intr_handle *intr_handle;
1023
1024         dpaa2_dev = container_of(rdev, struct rte_dpaa2_device, device);
1025         intr_handle = &dpaa2_dev->intr_handle;
1026
1027         PMD_INIT_FUNC_TRACE();
1028
1029         ret = dpni_enable(dpni, CMD_PRI_LOW, priv->token);
1030         if (ret) {
1031                 DPAA2_PMD_ERR("Failure in enabling dpni %d device: err=%d",
1032                               priv->hw_id, ret);
1033                 return ret;
1034         }
1035
1036         /* Power up the phy. Needed to make the link go UP */
1037         dpaa2_dev_set_link_up(dev);
1038
1039         ret = dpni_get_qdid(dpni, CMD_PRI_LOW, priv->token,
1040                             DPNI_QUEUE_TX, &qdid);
1041         if (ret) {
1042                 DPAA2_PMD_ERR("Error in getting qdid: err=%d", ret);
1043                 return ret;
1044         }
1045         priv->qdid = qdid;
1046
1047         for (i = 0; i < data->nb_rx_queues; i++) {
1048                 dpaa2_q = (struct dpaa2_queue *)data->rx_queues[i];
1049                 ret = dpni_get_queue(dpni, CMD_PRI_LOW, priv->token,
1050                                      DPNI_QUEUE_RX, dpaa2_q->tc_index,
1051                                        dpaa2_q->flow_id, &cfg, &qid);
1052                 if (ret) {
1053                         DPAA2_PMD_ERR("Error in getting flow information: "
1054                                       "err=%d", ret);
1055                         return ret;
1056                 }
1057                 dpaa2_q->fqid = qid.fqid;
1058         }
1059
1060         /*checksum errors, send them to normal path and set it in annotation */
1061         err_cfg.errors = DPNI_ERROR_L3CE | DPNI_ERROR_L4CE;
1062         err_cfg.errors |= DPNI_ERROR_PHE;
1063
1064         err_cfg.error_action = DPNI_ERROR_ACTION_CONTINUE;
1065         err_cfg.set_frame_annotation = true;
1066
1067         ret = dpni_set_errors_behavior(dpni, CMD_PRI_LOW,
1068                                        priv->token, &err_cfg);
1069         if (ret) {
1070                 DPAA2_PMD_ERR("Error to dpni_set_errors_behavior: code = %d",
1071                               ret);
1072                 return ret;
1073         }
1074
1075         /* if the interrupts were configured on this devices*/
1076         if (intr_handle && (intr_handle->fd) &&
1077             (dev->data->dev_conf.intr_conf.lsc != 0)) {
1078                 /* Registering LSC interrupt handler */
1079                 rte_intr_callback_register(intr_handle,
1080                                            dpaa2_interrupt_handler,
1081                                            (void *)dev);
1082
1083                 /* enable vfio intr/eventfd mapping
1084                  * Interrupt index 0 is required, so we can not use
1085                  * rte_intr_enable.
1086                  */
1087                 rte_dpaa2_intr_enable(intr_handle, DPNI_IRQ_INDEX);
1088
1089                 /* enable dpni_irqs */
1090                 dpaa2_eth_setup_irqs(dev, 1);
1091         }
1092
1093         /* Change the tx burst function if ordered queues are used */
1094         if (priv->en_ordered)
1095                 dev->tx_pkt_burst = dpaa2_dev_tx_ordered;
1096
1097         return 0;
1098 }
1099
1100 /**
1101  *  This routine disables all traffic on the adapter by issuing a
1102  *  global reset on the MAC.
1103  */
1104 static void
1105 dpaa2_dev_stop(struct rte_eth_dev *dev)
1106 {
1107         struct dpaa2_dev_priv *priv = dev->data->dev_private;
1108         struct fsl_mc_io *dpni = (struct fsl_mc_io *)dev->process_private;
1109         int ret;
1110         struct rte_eth_link link;
1111         struct rte_intr_handle *intr_handle = dev->intr_handle;
1112
1113         PMD_INIT_FUNC_TRACE();
1114
1115         /* reset interrupt callback  */
1116         if (intr_handle && (intr_handle->fd) &&
1117             (dev->data->dev_conf.intr_conf.lsc != 0)) {
1118                 /*disable dpni irqs */
1119                 dpaa2_eth_setup_irqs(dev, 0);
1120
1121                 /* disable vfio intr before callback unregister */
1122                 rte_dpaa2_intr_disable(intr_handle, DPNI_IRQ_INDEX);
1123
1124                 /* Unregistering LSC interrupt handler */
1125                 rte_intr_callback_unregister(intr_handle,
1126                                              dpaa2_interrupt_handler,
1127                                              (void *)dev);
1128         }
1129
1130         dpaa2_dev_set_link_down(dev);
1131
1132         ret = dpni_disable(dpni, CMD_PRI_LOW, priv->token);
1133         if (ret) {
1134                 DPAA2_PMD_ERR("Failure (ret %d) in disabling dpni %d dev",
1135                               ret, priv->hw_id);
1136                 return;
1137         }
1138
1139         /* clear the recorded link status */
1140         memset(&link, 0, sizeof(link));
1141         rte_eth_linkstatus_set(dev, &link);
1142 }
1143
1144 static void
1145 dpaa2_dev_close(struct rte_eth_dev *dev)
1146 {
1147         struct dpaa2_dev_priv *priv = dev->data->dev_private;
1148         struct fsl_mc_io *dpni = (struct fsl_mc_io *)dev->process_private;
1149         int ret;
1150         struct rte_eth_link link;
1151
1152         PMD_INIT_FUNC_TRACE();
1153
1154         dpaa2_flow_clean(dev);
1155
1156         /* Clean the device first */
1157         ret = dpni_reset(dpni, CMD_PRI_LOW, priv->token);
1158         if (ret) {
1159                 DPAA2_PMD_ERR("Failure cleaning dpni device: err=%d", ret);
1160                 return;
1161         }
1162
1163         memset(&link, 0, sizeof(link));
1164         rte_eth_linkstatus_set(dev, &link);
1165 }
1166
1167 static int
1168 dpaa2_dev_promiscuous_enable(
1169                 struct rte_eth_dev *dev)
1170 {
1171         int ret;
1172         struct dpaa2_dev_priv *priv = dev->data->dev_private;
1173         struct fsl_mc_io *dpni = (struct fsl_mc_io *)dev->process_private;
1174
1175         PMD_INIT_FUNC_TRACE();
1176
1177         if (dpni == NULL) {
1178                 DPAA2_PMD_ERR("dpni is NULL");
1179                 return -ENODEV;
1180         }
1181
1182         ret = dpni_set_unicast_promisc(dpni, CMD_PRI_LOW, priv->token, true);
1183         if (ret < 0)
1184                 DPAA2_PMD_ERR("Unable to enable U promisc mode %d", ret);
1185
1186         ret = dpni_set_multicast_promisc(dpni, CMD_PRI_LOW, priv->token, true);
1187         if (ret < 0)
1188                 DPAA2_PMD_ERR("Unable to enable M promisc mode %d", ret);
1189
1190         return ret;
1191 }
1192
1193 static int
1194 dpaa2_dev_promiscuous_disable(
1195                 struct rte_eth_dev *dev)
1196 {
1197         int ret;
1198         struct dpaa2_dev_priv *priv = dev->data->dev_private;
1199         struct fsl_mc_io *dpni = (struct fsl_mc_io *)dev->process_private;
1200
1201         PMD_INIT_FUNC_TRACE();
1202
1203         if (dpni == NULL) {
1204                 DPAA2_PMD_ERR("dpni is NULL");
1205                 return -ENODEV;
1206         }
1207
1208         ret = dpni_set_unicast_promisc(dpni, CMD_PRI_LOW, priv->token, false);
1209         if (ret < 0)
1210                 DPAA2_PMD_ERR("Unable to disable U promisc mode %d", ret);
1211
1212         if (dev->data->all_multicast == 0) {
1213                 ret = dpni_set_multicast_promisc(dpni, CMD_PRI_LOW,
1214                                                  priv->token, false);
1215                 if (ret < 0)
1216                         DPAA2_PMD_ERR("Unable to disable M promisc mode %d",
1217                                       ret);
1218         }
1219
1220         return ret;
1221 }
1222
1223 static int
1224 dpaa2_dev_allmulticast_enable(
1225                 struct rte_eth_dev *dev)
1226 {
1227         int ret;
1228         struct dpaa2_dev_priv *priv = dev->data->dev_private;
1229         struct fsl_mc_io *dpni = (struct fsl_mc_io *)dev->process_private;
1230
1231         PMD_INIT_FUNC_TRACE();
1232
1233         if (dpni == NULL) {
1234                 DPAA2_PMD_ERR("dpni is NULL");
1235                 return -ENODEV;
1236         }
1237
1238         ret = dpni_set_multicast_promisc(dpni, CMD_PRI_LOW, priv->token, true);
1239         if (ret < 0)
1240                 DPAA2_PMD_ERR("Unable to enable multicast mode %d", ret);
1241
1242         return ret;
1243 }
1244
1245 static int
1246 dpaa2_dev_allmulticast_disable(struct rte_eth_dev *dev)
1247 {
1248         int ret;
1249         struct dpaa2_dev_priv *priv = dev->data->dev_private;
1250         struct fsl_mc_io *dpni = (struct fsl_mc_io *)dev->process_private;
1251
1252         PMD_INIT_FUNC_TRACE();
1253
1254         if (dpni == NULL) {
1255                 DPAA2_PMD_ERR("dpni is NULL");
1256                 return -ENODEV;
1257         }
1258
1259         /* must remain on for all promiscuous */
1260         if (dev->data->promiscuous == 1)
1261                 return 0;
1262
1263         ret = dpni_set_multicast_promisc(dpni, CMD_PRI_LOW, priv->token, false);
1264         if (ret < 0)
1265                 DPAA2_PMD_ERR("Unable to disable multicast mode %d", ret);
1266
1267         return ret;
1268 }
1269
1270 static int
1271 dpaa2_dev_mtu_set(struct rte_eth_dev *dev, uint16_t mtu)
1272 {
1273         int ret;
1274         struct dpaa2_dev_priv *priv = dev->data->dev_private;
1275         struct fsl_mc_io *dpni = (struct fsl_mc_io *)dev->process_private;
1276         uint32_t frame_size = mtu + RTE_ETHER_HDR_LEN + RTE_ETHER_CRC_LEN
1277                                 + VLAN_TAG_SIZE;
1278
1279         PMD_INIT_FUNC_TRACE();
1280
1281         if (dpni == NULL) {
1282                 DPAA2_PMD_ERR("dpni is NULL");
1283                 return -EINVAL;
1284         }
1285
1286         /* check that mtu is within the allowed range */
1287         if (mtu < RTE_ETHER_MIN_MTU || frame_size > DPAA2_MAX_RX_PKT_LEN)
1288                 return -EINVAL;
1289
1290         if (frame_size > RTE_ETHER_MAX_LEN)
1291                 dev->data->dev_conf.rxmode.offloads &=
1292                                                 DEV_RX_OFFLOAD_JUMBO_FRAME;
1293         else
1294                 dev->data->dev_conf.rxmode.offloads &=
1295                                                 ~DEV_RX_OFFLOAD_JUMBO_FRAME;
1296
1297         dev->data->dev_conf.rxmode.max_rx_pkt_len = frame_size;
1298
1299         /* Set the Max Rx frame length as 'mtu' +
1300          * Maximum Ethernet header length
1301          */
1302         ret = dpni_set_max_frame_length(dpni, CMD_PRI_LOW, priv->token,
1303                                         frame_size - RTE_ETHER_CRC_LEN);
1304         if (ret) {
1305                 DPAA2_PMD_ERR("Setting the max frame length failed");
1306                 return -1;
1307         }
1308         DPAA2_PMD_INFO("MTU configured for the device: %d", mtu);
1309         return 0;
1310 }
1311
1312 static int
1313 dpaa2_dev_add_mac_addr(struct rte_eth_dev *dev,
1314                        struct rte_ether_addr *addr,
1315                        __rte_unused uint32_t index,
1316                        __rte_unused uint32_t pool)
1317 {
1318         int ret;
1319         struct dpaa2_dev_priv *priv = dev->data->dev_private;
1320         struct fsl_mc_io *dpni = (struct fsl_mc_io *)dev->process_private;
1321
1322         PMD_INIT_FUNC_TRACE();
1323
1324         if (dpni == NULL) {
1325                 DPAA2_PMD_ERR("dpni is NULL");
1326                 return -1;
1327         }
1328
1329         ret = dpni_add_mac_addr(dpni, CMD_PRI_LOW,
1330                                 priv->token, addr->addr_bytes);
1331         if (ret)
1332                 DPAA2_PMD_ERR(
1333                         "error: Adding the MAC ADDR failed: err = %d", ret);
1334         return 0;
1335 }
1336
1337 static void
1338 dpaa2_dev_remove_mac_addr(struct rte_eth_dev *dev,
1339                           uint32_t index)
1340 {
1341         int ret;
1342         struct dpaa2_dev_priv *priv = dev->data->dev_private;
1343         struct fsl_mc_io *dpni = (struct fsl_mc_io *)dev->process_private;
1344         struct rte_eth_dev_data *data = dev->data;
1345         struct rte_ether_addr *macaddr;
1346
1347         PMD_INIT_FUNC_TRACE();
1348
1349         macaddr = &data->mac_addrs[index];
1350
1351         if (dpni == NULL) {
1352                 DPAA2_PMD_ERR("dpni is NULL");
1353                 return;
1354         }
1355
1356         ret = dpni_remove_mac_addr(dpni, CMD_PRI_LOW,
1357                                    priv->token, macaddr->addr_bytes);
1358         if (ret)
1359                 DPAA2_PMD_ERR(
1360                         "error: Removing the MAC ADDR failed: err = %d", ret);
1361 }
1362
1363 static int
1364 dpaa2_dev_set_mac_addr(struct rte_eth_dev *dev,
1365                        struct rte_ether_addr *addr)
1366 {
1367         int ret;
1368         struct dpaa2_dev_priv *priv = dev->data->dev_private;
1369         struct fsl_mc_io *dpni = (struct fsl_mc_io *)dev->process_private;
1370
1371         PMD_INIT_FUNC_TRACE();
1372
1373         if (dpni == NULL) {
1374                 DPAA2_PMD_ERR("dpni is NULL");
1375                 return -EINVAL;
1376         }
1377
1378         ret = dpni_set_primary_mac_addr(dpni, CMD_PRI_LOW,
1379                                         priv->token, addr->addr_bytes);
1380
1381         if (ret)
1382                 DPAA2_PMD_ERR(
1383                         "error: Setting the MAC ADDR failed %d", ret);
1384
1385         return ret;
1386 }
1387
1388 static
1389 int dpaa2_dev_stats_get(struct rte_eth_dev *dev,
1390                          struct rte_eth_stats *stats)
1391 {
1392         struct dpaa2_dev_priv *priv = dev->data->dev_private;
1393         struct fsl_mc_io *dpni = (struct fsl_mc_io *)dev->process_private;
1394         int32_t  retcode;
1395         uint8_t page0 = 0, page1 = 1, page2 = 2;
1396         union dpni_statistics value;
1397         int i;
1398         struct dpaa2_queue *dpaa2_rxq, *dpaa2_txq;
1399
1400         memset(&value, 0, sizeof(union dpni_statistics));
1401
1402         PMD_INIT_FUNC_TRACE();
1403
1404         if (!dpni) {
1405                 DPAA2_PMD_ERR("dpni is NULL");
1406                 return -EINVAL;
1407         }
1408
1409         if (!stats) {
1410                 DPAA2_PMD_ERR("stats is NULL");
1411                 return -EINVAL;
1412         }
1413
1414         /*Get Counters from page_0*/
1415         retcode = dpni_get_statistics(dpni, CMD_PRI_LOW, priv->token,
1416                                       page0, 0, &value);
1417         if (retcode)
1418                 goto err;
1419
1420         stats->ipackets = value.page_0.ingress_all_frames;
1421         stats->ibytes = value.page_0.ingress_all_bytes;
1422
1423         /*Get Counters from page_1*/
1424         retcode = dpni_get_statistics(dpni, CMD_PRI_LOW, priv->token,
1425                                       page1, 0, &value);
1426         if (retcode)
1427                 goto err;
1428
1429         stats->opackets = value.page_1.egress_all_frames;
1430         stats->obytes = value.page_1.egress_all_bytes;
1431
1432         /*Get Counters from page_2*/
1433         retcode = dpni_get_statistics(dpni, CMD_PRI_LOW, priv->token,
1434                                       page2, 0, &value);
1435         if (retcode)
1436                 goto err;
1437
1438         /* Ingress drop frame count due to configured rules */
1439         stats->ierrors = value.page_2.ingress_filtered_frames;
1440         /* Ingress drop frame count due to error */
1441         stats->ierrors += value.page_2.ingress_discarded_frames;
1442
1443         stats->oerrors = value.page_2.egress_discarded_frames;
1444         stats->imissed = value.page_2.ingress_nobuffer_discards;
1445
1446         /* Fill in per queue stats */
1447         for (i = 0; (i < RTE_ETHDEV_QUEUE_STAT_CNTRS) &&
1448                 (i < priv->nb_rx_queues || i < priv->nb_tx_queues); ++i) {
1449                 dpaa2_rxq = (struct dpaa2_queue *)priv->rx_vq[i];
1450                 dpaa2_txq = (struct dpaa2_queue *)priv->tx_vq[i];
1451                 if (dpaa2_rxq)
1452                         stats->q_ipackets[i] = dpaa2_rxq->rx_pkts;
1453                 if (dpaa2_txq)
1454                         stats->q_opackets[i] = dpaa2_txq->tx_pkts;
1455
1456                 /* Byte counting is not implemented */
1457                 stats->q_ibytes[i]   = 0;
1458                 stats->q_obytes[i]   = 0;
1459         }
1460
1461         return 0;
1462
1463 err:
1464         DPAA2_PMD_ERR("Operation not completed:Error Code = %d", retcode);
1465         return retcode;
1466 };
1467
1468 static int
1469 dpaa2_dev_xstats_get(struct rte_eth_dev *dev, struct rte_eth_xstat *xstats,
1470                      unsigned int n)
1471 {
1472         struct dpaa2_dev_priv *priv = dev->data->dev_private;
1473         struct fsl_mc_io *dpni = (struct fsl_mc_io *)dev->process_private;
1474         int32_t  retcode;
1475         union dpni_statistics value[5] = {};
1476         unsigned int i = 0, num = RTE_DIM(dpaa2_xstats_strings);
1477
1478         if (n < num)
1479                 return num;
1480
1481         if (xstats == NULL)
1482                 return 0;
1483
1484         /* Get Counters from page_0*/
1485         retcode = dpni_get_statistics(dpni, CMD_PRI_LOW, priv->token,
1486                                       0, 0, &value[0]);
1487         if (retcode)
1488                 goto err;
1489
1490         /* Get Counters from page_1*/
1491         retcode = dpni_get_statistics(dpni, CMD_PRI_LOW, priv->token,
1492                                       1, 0, &value[1]);
1493         if (retcode)
1494                 goto err;
1495
1496         /* Get Counters from page_2*/
1497         retcode = dpni_get_statistics(dpni, CMD_PRI_LOW, priv->token,
1498                                       2, 0, &value[2]);
1499         if (retcode)
1500                 goto err;
1501
1502         for (i = 0; i < priv->max_cgs; i++) {
1503                 if (!priv->cgid_in_use[i]) {
1504                         /* Get Counters from page_4*/
1505                         retcode = dpni_get_statistics(dpni, CMD_PRI_LOW,
1506                                                       priv->token,
1507                                                       4, 0, &value[4]);
1508                         if (retcode)
1509                                 goto err;
1510                         break;
1511                 }
1512         }
1513
1514         for (i = 0; i < num; i++) {
1515                 xstats[i].id = i;
1516                 xstats[i].value = value[dpaa2_xstats_strings[i].page_id].
1517                         raw.counter[dpaa2_xstats_strings[i].stats_id];
1518         }
1519         return i;
1520 err:
1521         DPAA2_PMD_ERR("Error in obtaining extended stats (%d)", retcode);
1522         return retcode;
1523 }
1524
1525 static int
1526 dpaa2_xstats_get_names(__rte_unused struct rte_eth_dev *dev,
1527                        struct rte_eth_xstat_name *xstats_names,
1528                        unsigned int limit)
1529 {
1530         unsigned int i, stat_cnt = RTE_DIM(dpaa2_xstats_strings);
1531
1532         if (limit < stat_cnt)
1533                 return stat_cnt;
1534
1535         if (xstats_names != NULL)
1536                 for (i = 0; i < stat_cnt; i++)
1537                         strlcpy(xstats_names[i].name,
1538                                 dpaa2_xstats_strings[i].name,
1539                                 sizeof(xstats_names[i].name));
1540
1541         return stat_cnt;
1542 }
1543
1544 static int
1545 dpaa2_xstats_get_by_id(struct rte_eth_dev *dev, const uint64_t *ids,
1546                        uint64_t *values, unsigned int n)
1547 {
1548         unsigned int i, stat_cnt = RTE_DIM(dpaa2_xstats_strings);
1549         uint64_t values_copy[stat_cnt];
1550
1551         if (!ids) {
1552                 struct dpaa2_dev_priv *priv = dev->data->dev_private;
1553                 struct fsl_mc_io *dpni =
1554                         (struct fsl_mc_io *)dev->process_private;
1555                 int32_t  retcode;
1556                 union dpni_statistics value[5] = {};
1557
1558                 if (n < stat_cnt)
1559                         return stat_cnt;
1560
1561                 if (!values)
1562                         return 0;
1563
1564                 /* Get Counters from page_0*/
1565                 retcode = dpni_get_statistics(dpni, CMD_PRI_LOW, priv->token,
1566                                               0, 0, &value[0]);
1567                 if (retcode)
1568                         return 0;
1569
1570                 /* Get Counters from page_1*/
1571                 retcode = dpni_get_statistics(dpni, CMD_PRI_LOW, priv->token,
1572                                               1, 0, &value[1]);
1573                 if (retcode)
1574                         return 0;
1575
1576                 /* Get Counters from page_2*/
1577                 retcode = dpni_get_statistics(dpni, CMD_PRI_LOW, priv->token,
1578                                               2, 0, &value[2]);
1579                 if (retcode)
1580                         return 0;
1581
1582                 /* Get Counters from page_4*/
1583                 retcode = dpni_get_statistics(dpni, CMD_PRI_LOW, priv->token,
1584                                               4, 0, &value[4]);
1585                 if (retcode)
1586                         return 0;
1587
1588                 for (i = 0; i < stat_cnt; i++) {
1589                         values[i] = value[dpaa2_xstats_strings[i].page_id].
1590                                 raw.counter[dpaa2_xstats_strings[i].stats_id];
1591                 }
1592                 return stat_cnt;
1593         }
1594
1595         dpaa2_xstats_get_by_id(dev, NULL, values_copy, stat_cnt);
1596
1597         for (i = 0; i < n; i++) {
1598                 if (ids[i] >= stat_cnt) {
1599                         DPAA2_PMD_ERR("xstats id value isn't valid");
1600                         return -1;
1601                 }
1602                 values[i] = values_copy[ids[i]];
1603         }
1604         return n;
1605 }
1606
1607 static int
1608 dpaa2_xstats_get_names_by_id(
1609         struct rte_eth_dev *dev,
1610         struct rte_eth_xstat_name *xstats_names,
1611         const uint64_t *ids,
1612         unsigned int limit)
1613 {
1614         unsigned int i, stat_cnt = RTE_DIM(dpaa2_xstats_strings);
1615         struct rte_eth_xstat_name xstats_names_copy[stat_cnt];
1616
1617         if (!ids)
1618                 return dpaa2_xstats_get_names(dev, xstats_names, limit);
1619
1620         dpaa2_xstats_get_names(dev, xstats_names_copy, limit);
1621
1622         for (i = 0; i < limit; i++) {
1623                 if (ids[i] >= stat_cnt) {
1624                         DPAA2_PMD_ERR("xstats id value isn't valid");
1625                         return -1;
1626                 }
1627                 strcpy(xstats_names[i].name, xstats_names_copy[ids[i]].name);
1628         }
1629         return limit;
1630 }
1631
1632 static int
1633 dpaa2_dev_stats_reset(struct rte_eth_dev *dev)
1634 {
1635         struct dpaa2_dev_priv *priv = dev->data->dev_private;
1636         struct fsl_mc_io *dpni = (struct fsl_mc_io *)dev->process_private;
1637         int retcode;
1638         int i;
1639         struct dpaa2_queue *dpaa2_q;
1640
1641         PMD_INIT_FUNC_TRACE();
1642
1643         if (dpni == NULL) {
1644                 DPAA2_PMD_ERR("dpni is NULL");
1645                 return -EINVAL;
1646         }
1647
1648         retcode =  dpni_reset_statistics(dpni, CMD_PRI_LOW, priv->token);
1649         if (retcode)
1650                 goto error;
1651
1652         /* Reset the per queue stats in dpaa2_queue structure */
1653         for (i = 0; i < priv->nb_rx_queues; i++) {
1654                 dpaa2_q = (struct dpaa2_queue *)priv->rx_vq[i];
1655                 if (dpaa2_q)
1656                         dpaa2_q->rx_pkts = 0;
1657         }
1658
1659         for (i = 0; i < priv->nb_tx_queues; i++) {
1660                 dpaa2_q = (struct dpaa2_queue *)priv->tx_vq[i];
1661                 if (dpaa2_q)
1662                         dpaa2_q->tx_pkts = 0;
1663         }
1664
1665         return 0;
1666
1667 error:
1668         DPAA2_PMD_ERR("Operation not completed:Error Code = %d", retcode);
1669         return retcode;
1670 };
1671
1672 /* return 0 means link status changed, -1 means not changed */
1673 static int
1674 dpaa2_dev_link_update(struct rte_eth_dev *dev,
1675                         int wait_to_complete __rte_unused)
1676 {
1677         int ret;
1678         struct dpaa2_dev_priv *priv = dev->data->dev_private;
1679         struct fsl_mc_io *dpni = (struct fsl_mc_io *)dev->process_private;
1680         struct rte_eth_link link;
1681         struct dpni_link_state state = {0};
1682
1683         if (dpni == NULL) {
1684                 DPAA2_PMD_ERR("dpni is NULL");
1685                 return 0;
1686         }
1687
1688         ret = dpni_get_link_state(dpni, CMD_PRI_LOW, priv->token, &state);
1689         if (ret < 0) {
1690                 DPAA2_PMD_DEBUG("error: dpni_get_link_state %d", ret);
1691                 return -1;
1692         }
1693
1694         memset(&link, 0, sizeof(struct rte_eth_link));
1695         link.link_status = state.up;
1696         link.link_speed = state.rate;
1697
1698         if (state.options & DPNI_LINK_OPT_HALF_DUPLEX)
1699                 link.link_duplex = ETH_LINK_HALF_DUPLEX;
1700         else
1701                 link.link_duplex = ETH_LINK_FULL_DUPLEX;
1702
1703         ret = rte_eth_linkstatus_set(dev, &link);
1704         if (ret == -1)
1705                 DPAA2_PMD_DEBUG("No change in status");
1706         else
1707                 DPAA2_PMD_INFO("Port %d Link is %s\n", dev->data->port_id,
1708                                link.link_status ? "Up" : "Down");
1709
1710         return ret;
1711 }
1712
1713 /**
1714  * Toggle the DPNI to enable, if not already enabled.
1715  * This is not strictly PHY up/down - it is more of logical toggling.
1716  */
1717 static int
1718 dpaa2_dev_set_link_up(struct rte_eth_dev *dev)
1719 {
1720         int ret = -EINVAL;
1721         struct dpaa2_dev_priv *priv;
1722         struct fsl_mc_io *dpni;
1723         int en = 0;
1724         struct dpni_link_state state = {0};
1725
1726         priv = dev->data->dev_private;
1727         dpni = (struct fsl_mc_io *)dev->process_private;
1728
1729         if (dpni == NULL) {
1730                 DPAA2_PMD_ERR("dpni is NULL");
1731                 return ret;
1732         }
1733
1734         /* Check if DPNI is currently enabled */
1735         ret = dpni_is_enabled(dpni, CMD_PRI_LOW, priv->token, &en);
1736         if (ret) {
1737                 /* Unable to obtain dpni status; Not continuing */
1738                 DPAA2_PMD_ERR("Interface Link UP failed (%d)", ret);
1739                 return -EINVAL;
1740         }
1741
1742         /* Enable link if not already enabled */
1743         if (!en) {
1744                 ret = dpni_enable(dpni, CMD_PRI_LOW, priv->token);
1745                 if (ret) {
1746                         DPAA2_PMD_ERR("Interface Link UP failed (%d)", ret);
1747                         return -EINVAL;
1748                 }
1749         }
1750         ret = dpni_get_link_state(dpni, CMD_PRI_LOW, priv->token, &state);
1751         if (ret < 0) {
1752                 DPAA2_PMD_DEBUG("Unable to get link state (%d)", ret);
1753                 return -1;
1754         }
1755
1756         /* changing tx burst function to start enqueues */
1757         dev->tx_pkt_burst = dpaa2_dev_tx;
1758         dev->data->dev_link.link_status = state.up;
1759
1760         if (state.up)
1761                 DPAA2_PMD_INFO("Port %d Link is Up", dev->data->port_id);
1762         else
1763                 DPAA2_PMD_INFO("Port %d Link is Down", dev->data->port_id);
1764         return ret;
1765 }
1766
1767 /**
1768  * Toggle the DPNI to disable, if not already disabled.
1769  * This is not strictly PHY up/down - it is more of logical toggling.
1770  */
1771 static int
1772 dpaa2_dev_set_link_down(struct rte_eth_dev *dev)
1773 {
1774         int ret = -EINVAL;
1775         struct dpaa2_dev_priv *priv;
1776         struct fsl_mc_io *dpni;
1777         int dpni_enabled = 0;
1778         int retries = 10;
1779
1780         PMD_INIT_FUNC_TRACE();
1781
1782         priv = dev->data->dev_private;
1783         dpni = (struct fsl_mc_io *)dev->process_private;
1784
1785         if (dpni == NULL) {
1786                 DPAA2_PMD_ERR("Device has not yet been configured");
1787                 return ret;
1788         }
1789
1790         /*changing  tx burst function to avoid any more enqueues */
1791         dev->tx_pkt_burst = dummy_dev_tx;
1792
1793         /* Loop while dpni_disable() attempts to drain the egress FQs
1794          * and confirm them back to us.
1795          */
1796         do {
1797                 ret = dpni_disable(dpni, 0, priv->token);
1798                 if (ret) {
1799                         DPAA2_PMD_ERR("dpni disable failed (%d)", ret);
1800                         return ret;
1801                 }
1802                 ret = dpni_is_enabled(dpni, 0, priv->token, &dpni_enabled);
1803                 if (ret) {
1804                         DPAA2_PMD_ERR("dpni enable check failed (%d)", ret);
1805                         return ret;
1806                 }
1807                 if (dpni_enabled)
1808                         /* Allow the MC some slack */
1809                         rte_delay_us(100 * 1000);
1810         } while (dpni_enabled && --retries);
1811
1812         if (!retries) {
1813                 DPAA2_PMD_WARN("Retry count exceeded disabling dpni");
1814                 /* todo- we may have to manually cleanup queues.
1815                  */
1816         } else {
1817                 DPAA2_PMD_INFO("Port %d Link DOWN successful",
1818                                dev->data->port_id);
1819         }
1820
1821         dev->data->dev_link.link_status = 0;
1822
1823         return ret;
1824 }
1825
1826 static int
1827 dpaa2_flow_ctrl_get(struct rte_eth_dev *dev, struct rte_eth_fc_conf *fc_conf)
1828 {
1829         int ret = -EINVAL;
1830         struct dpaa2_dev_priv *priv;
1831         struct fsl_mc_io *dpni;
1832         struct dpni_link_state state = {0};
1833
1834         PMD_INIT_FUNC_TRACE();
1835
1836         priv = dev->data->dev_private;
1837         dpni = (struct fsl_mc_io *)dev->process_private;
1838
1839         if (dpni == NULL || fc_conf == NULL) {
1840                 DPAA2_PMD_ERR("device not configured");
1841                 return ret;
1842         }
1843
1844         ret = dpni_get_link_state(dpni, CMD_PRI_LOW, priv->token, &state);
1845         if (ret) {
1846                 DPAA2_PMD_ERR("error: dpni_get_link_state %d", ret);
1847                 return ret;
1848         }
1849
1850         memset(fc_conf, 0, sizeof(struct rte_eth_fc_conf));
1851         if (state.options & DPNI_LINK_OPT_PAUSE) {
1852                 /* DPNI_LINK_OPT_PAUSE set
1853                  *  if ASYM_PAUSE not set,
1854                  *      RX Side flow control (handle received Pause frame)
1855                  *      TX side flow control (send Pause frame)
1856                  *  if ASYM_PAUSE set,
1857                  *      RX Side flow control (handle received Pause frame)
1858                  *      No TX side flow control (send Pause frame disabled)
1859                  */
1860                 if (!(state.options & DPNI_LINK_OPT_ASYM_PAUSE))
1861                         fc_conf->mode = RTE_FC_FULL;
1862                 else
1863                         fc_conf->mode = RTE_FC_RX_PAUSE;
1864         } else {
1865                 /* DPNI_LINK_OPT_PAUSE not set
1866                  *  if ASYM_PAUSE set,
1867                  *      TX side flow control (send Pause frame)
1868                  *      No RX side flow control (No action on pause frame rx)
1869                  *  if ASYM_PAUSE not set,
1870                  *      Flow control disabled
1871                  */
1872                 if (state.options & DPNI_LINK_OPT_ASYM_PAUSE)
1873                         fc_conf->mode = RTE_FC_TX_PAUSE;
1874                 else
1875                         fc_conf->mode = RTE_FC_NONE;
1876         }
1877
1878         return ret;
1879 }
1880
1881 static int
1882 dpaa2_flow_ctrl_set(struct rte_eth_dev *dev, struct rte_eth_fc_conf *fc_conf)
1883 {
1884         int ret = -EINVAL;
1885         struct dpaa2_dev_priv *priv;
1886         struct fsl_mc_io *dpni;
1887         struct dpni_link_state state = {0};
1888         struct dpni_link_cfg cfg = {0};
1889
1890         PMD_INIT_FUNC_TRACE();
1891
1892         priv = dev->data->dev_private;
1893         dpni = (struct fsl_mc_io *)dev->process_private;
1894
1895         if (dpni == NULL) {
1896                 DPAA2_PMD_ERR("dpni is NULL");
1897                 return ret;
1898         }
1899
1900         /* It is necessary to obtain the current state before setting fc_conf
1901          * as MC would return error in case rate, autoneg or duplex values are
1902          * different.
1903          */
1904         ret = dpni_get_link_state(dpni, CMD_PRI_LOW, priv->token, &state);
1905         if (ret) {
1906                 DPAA2_PMD_ERR("Unable to get link state (err=%d)", ret);
1907                 return -1;
1908         }
1909
1910         /* Disable link before setting configuration */
1911         dpaa2_dev_set_link_down(dev);
1912
1913         /* Based on fc_conf, update cfg */
1914         cfg.rate = state.rate;
1915         cfg.options = state.options;
1916
1917         /* update cfg with fc_conf */
1918         switch (fc_conf->mode) {
1919         case RTE_FC_FULL:
1920                 /* Full flow control;
1921                  * OPT_PAUSE set, ASYM_PAUSE not set
1922                  */
1923                 cfg.options |= DPNI_LINK_OPT_PAUSE;
1924                 cfg.options &= ~DPNI_LINK_OPT_ASYM_PAUSE;
1925                 break;
1926         case RTE_FC_TX_PAUSE:
1927                 /* Enable RX flow control
1928                  * OPT_PAUSE not set;
1929                  * ASYM_PAUSE set;
1930                  */
1931                 cfg.options |= DPNI_LINK_OPT_ASYM_PAUSE;
1932                 cfg.options &= ~DPNI_LINK_OPT_PAUSE;
1933                 break;
1934         case RTE_FC_RX_PAUSE:
1935                 /* Enable TX Flow control
1936                  * OPT_PAUSE set
1937                  * ASYM_PAUSE set
1938                  */
1939                 cfg.options |= DPNI_LINK_OPT_PAUSE;
1940                 cfg.options |= DPNI_LINK_OPT_ASYM_PAUSE;
1941                 break;
1942         case RTE_FC_NONE:
1943                 /* Disable Flow control
1944                  * OPT_PAUSE not set
1945                  * ASYM_PAUSE not set
1946                  */
1947                 cfg.options &= ~DPNI_LINK_OPT_PAUSE;
1948                 cfg.options &= ~DPNI_LINK_OPT_ASYM_PAUSE;
1949                 break;
1950         default:
1951                 DPAA2_PMD_ERR("Incorrect Flow control flag (%d)",
1952                               fc_conf->mode);
1953                 return -1;
1954         }
1955
1956         ret = dpni_set_link_cfg(dpni, CMD_PRI_LOW, priv->token, &cfg);
1957         if (ret)
1958                 DPAA2_PMD_ERR("Unable to set Link configuration (err=%d)",
1959                               ret);
1960
1961         /* Enable link */
1962         dpaa2_dev_set_link_up(dev);
1963
1964         return ret;
1965 }
1966
1967 static int
1968 dpaa2_dev_rss_hash_update(struct rte_eth_dev *dev,
1969                           struct rte_eth_rss_conf *rss_conf)
1970 {
1971         struct rte_eth_dev_data *data = dev->data;
1972         struct rte_eth_conf *eth_conf = &data->dev_conf;
1973         int ret;
1974
1975         PMD_INIT_FUNC_TRACE();
1976
1977         if (rss_conf->rss_hf) {
1978                 ret = dpaa2_setup_flow_dist(dev, rss_conf->rss_hf);
1979                 if (ret) {
1980                         DPAA2_PMD_ERR("Unable to set flow dist");
1981                         return ret;
1982                 }
1983         } else {
1984                 ret = dpaa2_remove_flow_dist(dev, 0);
1985                 if (ret) {
1986                         DPAA2_PMD_ERR("Unable to remove flow dist");
1987                         return ret;
1988                 }
1989         }
1990         eth_conf->rx_adv_conf.rss_conf.rss_hf = rss_conf->rss_hf;
1991         return 0;
1992 }
1993
1994 static int
1995 dpaa2_dev_rss_hash_conf_get(struct rte_eth_dev *dev,
1996                             struct rte_eth_rss_conf *rss_conf)
1997 {
1998         struct rte_eth_dev_data *data = dev->data;
1999         struct rte_eth_conf *eth_conf = &data->dev_conf;
2000
2001         /* dpaa2 does not support rss_key, so length should be 0*/
2002         rss_conf->rss_key_len = 0;
2003         rss_conf->rss_hf = eth_conf->rx_adv_conf.rss_conf.rss_hf;
2004         return 0;
2005 }
2006
2007 int dpaa2_eth_eventq_attach(const struct rte_eth_dev *dev,
2008                 int eth_rx_queue_id,
2009                 uint16_t dpcon_id,
2010                 const struct rte_event_eth_rx_adapter_queue_conf *queue_conf)
2011 {
2012         struct dpaa2_dev_priv *eth_priv = dev->data->dev_private;
2013         struct fsl_mc_io *dpni = (struct fsl_mc_io *)dev->process_private;
2014         struct dpaa2_queue *dpaa2_ethq = eth_priv->rx_vq[eth_rx_queue_id];
2015         uint8_t flow_id = dpaa2_ethq->flow_id;
2016         struct dpni_queue cfg;
2017         uint8_t options;
2018         int ret;
2019
2020         if (queue_conf->ev.sched_type == RTE_SCHED_TYPE_PARALLEL)
2021                 dpaa2_ethq->cb = dpaa2_dev_process_parallel_event;
2022         else if (queue_conf->ev.sched_type == RTE_SCHED_TYPE_ATOMIC)
2023                 dpaa2_ethq->cb = dpaa2_dev_process_atomic_event;
2024         else if (queue_conf->ev.sched_type == RTE_SCHED_TYPE_ORDERED)
2025                 dpaa2_ethq->cb = dpaa2_dev_process_ordered_event;
2026         else
2027                 return -EINVAL;
2028
2029         memset(&cfg, 0, sizeof(struct dpni_queue));
2030         options = DPNI_QUEUE_OPT_DEST;
2031         cfg.destination.type = DPNI_DEST_DPCON;
2032         cfg.destination.id = dpcon_id;
2033         cfg.destination.priority = queue_conf->ev.priority;
2034
2035         if (queue_conf->ev.sched_type == RTE_SCHED_TYPE_ATOMIC) {
2036                 options |= DPNI_QUEUE_OPT_HOLD_ACTIVE;
2037                 cfg.destination.hold_active = 1;
2038         }
2039
2040         if (queue_conf->ev.sched_type == RTE_SCHED_TYPE_ORDERED &&
2041                         !eth_priv->en_ordered) {
2042                 struct opr_cfg ocfg;
2043
2044                 /* Restoration window size = 256 frames */
2045                 ocfg.oprrws = 3;
2046                 /* Restoration window size = 512 frames for LX2 */
2047                 if (dpaa2_svr_family == SVR_LX2160A)
2048                         ocfg.oprrws = 4;
2049                 /* Auto advance NESN window enabled */
2050                 ocfg.oa = 1;
2051                 /* Late arrival window size disabled */
2052                 ocfg.olws = 0;
2053                 /* ORL resource exhaustaion advance NESN disabled */
2054                 ocfg.oeane = 0;
2055                 /* Loose ordering enabled */
2056                 ocfg.oloe = 1;
2057                 eth_priv->en_loose_ordered = 1;
2058                 /* Strict ordering enabled if explicitly set */
2059                 if (getenv("DPAA2_STRICT_ORDERING_ENABLE")) {
2060                         ocfg.oloe = 0;
2061                         eth_priv->en_loose_ordered = 0;
2062                 }
2063
2064                 ret = dpni_set_opr(dpni, CMD_PRI_LOW, eth_priv->token,
2065                                    dpaa2_ethq->tc_index, flow_id,
2066                                    OPR_OPT_CREATE, &ocfg);
2067                 if (ret) {
2068                         DPAA2_PMD_ERR("Error setting opr: ret: %d\n", ret);
2069                         return ret;
2070                 }
2071
2072                 eth_priv->en_ordered = 1;
2073         }
2074
2075         options |= DPNI_QUEUE_OPT_USER_CTX;
2076         cfg.user_context = (size_t)(dpaa2_ethq);
2077
2078         ret = dpni_set_queue(dpni, CMD_PRI_LOW, eth_priv->token, DPNI_QUEUE_RX,
2079                              dpaa2_ethq->tc_index, flow_id, options, &cfg);
2080         if (ret) {
2081                 DPAA2_PMD_ERR("Error in dpni_set_queue: ret: %d", ret);
2082                 return ret;
2083         }
2084
2085         memcpy(&dpaa2_ethq->ev, &queue_conf->ev, sizeof(struct rte_event));
2086
2087         return 0;
2088 }
2089
2090 int dpaa2_eth_eventq_detach(const struct rte_eth_dev *dev,
2091                 int eth_rx_queue_id)
2092 {
2093         struct dpaa2_dev_priv *eth_priv = dev->data->dev_private;
2094         struct fsl_mc_io *dpni = (struct fsl_mc_io *)dev->process_private;
2095         struct dpaa2_queue *dpaa2_ethq = eth_priv->rx_vq[eth_rx_queue_id];
2096         uint8_t flow_id = dpaa2_ethq->flow_id;
2097         struct dpni_queue cfg;
2098         uint8_t options;
2099         int ret;
2100
2101         memset(&cfg, 0, sizeof(struct dpni_queue));
2102         options = DPNI_QUEUE_OPT_DEST;
2103         cfg.destination.type = DPNI_DEST_NONE;
2104
2105         ret = dpni_set_queue(dpni, CMD_PRI_LOW, eth_priv->token, DPNI_QUEUE_RX,
2106                              dpaa2_ethq->tc_index, flow_id, options, &cfg);
2107         if (ret)
2108                 DPAA2_PMD_ERR("Error in dpni_set_queue: ret: %d", ret);
2109
2110         return ret;
2111 }
2112
2113 static inline int
2114 dpaa2_dev_verify_filter_ops(enum rte_filter_op filter_op)
2115 {
2116         unsigned int i;
2117
2118         for (i = 0; i < RTE_DIM(dpaa2_supported_filter_ops); i++) {
2119                 if (dpaa2_supported_filter_ops[i] == filter_op)
2120                         return 0;
2121         }
2122         return -ENOTSUP;
2123 }
2124
2125 static int
2126 dpaa2_dev_flow_ctrl(struct rte_eth_dev *dev,
2127                     enum rte_filter_type filter_type,
2128                                  enum rte_filter_op filter_op,
2129                                  void *arg)
2130 {
2131         int ret = 0;
2132
2133         if (!dev)
2134                 return -ENODEV;
2135
2136         switch (filter_type) {
2137         case RTE_ETH_FILTER_GENERIC:
2138                 if (dpaa2_dev_verify_filter_ops(filter_op) < 0) {
2139                         ret = -ENOTSUP;
2140                         break;
2141                 }
2142                 *(const void **)arg = &dpaa2_flow_ops;
2143                 dpaa2_filter_type |= filter_type;
2144                 break;
2145         default:
2146                 RTE_LOG(ERR, PMD, "Filter type (%d) not supported",
2147                         filter_type);
2148                 ret = -ENOTSUP;
2149                 break;
2150         }
2151         return ret;
2152 }
2153
2154 static struct eth_dev_ops dpaa2_ethdev_ops = {
2155         .dev_configure    = dpaa2_eth_dev_configure,
2156         .dev_start            = dpaa2_dev_start,
2157         .dev_stop             = dpaa2_dev_stop,
2158         .dev_close            = dpaa2_dev_close,
2159         .promiscuous_enable   = dpaa2_dev_promiscuous_enable,
2160         .promiscuous_disable  = dpaa2_dev_promiscuous_disable,
2161         .allmulticast_enable  = dpaa2_dev_allmulticast_enable,
2162         .allmulticast_disable = dpaa2_dev_allmulticast_disable,
2163         .dev_set_link_up      = dpaa2_dev_set_link_up,
2164         .dev_set_link_down    = dpaa2_dev_set_link_down,
2165         .link_update       = dpaa2_dev_link_update,
2166         .stats_get             = dpaa2_dev_stats_get,
2167         .xstats_get            = dpaa2_dev_xstats_get,
2168         .xstats_get_by_id     = dpaa2_xstats_get_by_id,
2169         .xstats_get_names_by_id = dpaa2_xstats_get_names_by_id,
2170         .xstats_get_names      = dpaa2_xstats_get_names,
2171         .stats_reset       = dpaa2_dev_stats_reset,
2172         .xstats_reset         = dpaa2_dev_stats_reset,
2173         .fw_version_get    = dpaa2_fw_version_get,
2174         .dev_infos_get     = dpaa2_dev_info_get,
2175         .dev_supported_ptypes_get = dpaa2_supported_ptypes_get,
2176         .mtu_set           = dpaa2_dev_mtu_set,
2177         .vlan_filter_set      = dpaa2_vlan_filter_set,
2178         .vlan_offload_set     = dpaa2_vlan_offload_set,
2179         .vlan_tpid_set        = dpaa2_vlan_tpid_set,
2180         .rx_queue_setup    = dpaa2_dev_rx_queue_setup,
2181         .rx_queue_release  = dpaa2_dev_rx_queue_release,
2182         .tx_queue_setup    = dpaa2_dev_tx_queue_setup,
2183         .tx_queue_release  = dpaa2_dev_tx_queue_release,
2184         .rx_queue_count       = dpaa2_dev_rx_queue_count,
2185         .flow_ctrl_get        = dpaa2_flow_ctrl_get,
2186         .flow_ctrl_set        = dpaa2_flow_ctrl_set,
2187         .mac_addr_add         = dpaa2_dev_add_mac_addr,
2188         .mac_addr_remove      = dpaa2_dev_remove_mac_addr,
2189         .mac_addr_set         = dpaa2_dev_set_mac_addr,
2190         .rss_hash_update      = dpaa2_dev_rss_hash_update,
2191         .rss_hash_conf_get    = dpaa2_dev_rss_hash_conf_get,
2192         .filter_ctrl          = dpaa2_dev_flow_ctrl,
2193 #if defined(RTE_LIBRTE_IEEE1588)
2194         .timesync_enable      = dpaa2_timesync_enable,
2195         .timesync_disable     = dpaa2_timesync_disable,
2196         .timesync_read_time   = dpaa2_timesync_read_time,
2197         .timesync_write_time  = dpaa2_timesync_write_time,
2198         .timesync_adjust_time = dpaa2_timesync_adjust_time,
2199         .timesync_read_rx_timestamp = dpaa2_timesync_read_rx_timestamp,
2200         .timesync_read_tx_timestamp = dpaa2_timesync_read_tx_timestamp,
2201 #endif
2202 };
2203
2204 /* Populate the mac address from physically available (u-boot/firmware) and/or
2205  * one set by higher layers like MC (restool) etc.
2206  * Returns the table of MAC entries (multiple entries)
2207  */
2208 static int
2209 populate_mac_addr(struct fsl_mc_io *dpni_dev, struct dpaa2_dev_priv *priv,
2210                   struct rte_ether_addr *mac_entry)
2211 {
2212         int ret;
2213         struct rte_ether_addr phy_mac, prime_mac;
2214
2215         memset(&phy_mac, 0, sizeof(struct rte_ether_addr));
2216         memset(&prime_mac, 0, sizeof(struct rte_ether_addr));
2217
2218         /* Get the physical device MAC address */
2219         ret = dpni_get_port_mac_addr(dpni_dev, CMD_PRI_LOW, priv->token,
2220                                      phy_mac.addr_bytes);
2221         if (ret) {
2222                 DPAA2_PMD_ERR("DPNI get physical port MAC failed: %d", ret);
2223                 goto cleanup;
2224         }
2225
2226         ret = dpni_get_primary_mac_addr(dpni_dev, CMD_PRI_LOW, priv->token,
2227                                         prime_mac.addr_bytes);
2228         if (ret) {
2229                 DPAA2_PMD_ERR("DPNI get Prime port MAC failed: %d", ret);
2230                 goto cleanup;
2231         }
2232
2233         /* Now that both MAC have been obtained, do:
2234          *  if not_empty_mac(phy) && phy != Prime, overwrite prime with Phy
2235          *     and return phy
2236          *  If empty_mac(phy), return prime.
2237          *  if both are empty, create random MAC, set as prime and return
2238          */
2239         if (!rte_is_zero_ether_addr(&phy_mac)) {
2240                 /* If the addresses are not same, overwrite prime */
2241                 if (!rte_is_same_ether_addr(&phy_mac, &prime_mac)) {
2242                         ret = dpni_set_primary_mac_addr(dpni_dev, CMD_PRI_LOW,
2243                                                         priv->token,
2244                                                         phy_mac.addr_bytes);
2245                         if (ret) {
2246                                 DPAA2_PMD_ERR("Unable to set MAC Address: %d",
2247                                               ret);
2248                                 goto cleanup;
2249                         }
2250                         memcpy(&prime_mac, &phy_mac,
2251                                 sizeof(struct rte_ether_addr));
2252                 }
2253         } else if (rte_is_zero_ether_addr(&prime_mac)) {
2254                 /* In case phys and prime, both are zero, create random MAC */
2255                 rte_eth_random_addr(prime_mac.addr_bytes);
2256                 ret = dpni_set_primary_mac_addr(dpni_dev, CMD_PRI_LOW,
2257                                                 priv->token,
2258                                                 prime_mac.addr_bytes);
2259                 if (ret) {
2260                         DPAA2_PMD_ERR("Unable to set MAC Address: %d", ret);
2261                         goto cleanup;
2262                 }
2263         }
2264
2265         /* prime_mac the final MAC address */
2266         memcpy(mac_entry, &prime_mac, sizeof(struct rte_ether_addr));
2267         return 0;
2268
2269 cleanup:
2270         return -1;
2271 }
2272
2273 static int
2274 check_devargs_handler(__rte_unused const char *key, const char *value,
2275                       __rte_unused void *opaque)
2276 {
2277         if (strcmp(value, "1"))
2278                 return -1;
2279
2280         return 0;
2281 }
2282
2283 static int
2284 dpaa2_get_devargs(struct rte_devargs *devargs, const char *key)
2285 {
2286         struct rte_kvargs *kvlist;
2287
2288         if (!devargs)
2289                 return 0;
2290
2291         kvlist = rte_kvargs_parse(devargs->args, NULL);
2292         if (!kvlist)
2293                 return 0;
2294
2295         if (!rte_kvargs_count(kvlist, key)) {
2296                 rte_kvargs_free(kvlist);
2297                 return 0;
2298         }
2299
2300         if (rte_kvargs_process(kvlist, key,
2301                                check_devargs_handler, NULL) < 0) {
2302                 rte_kvargs_free(kvlist);
2303                 return 0;
2304         }
2305         rte_kvargs_free(kvlist);
2306
2307         return 1;
2308 }
2309
2310 static int
2311 dpaa2_dev_init(struct rte_eth_dev *eth_dev)
2312 {
2313         struct rte_device *dev = eth_dev->device;
2314         struct rte_dpaa2_device *dpaa2_dev;
2315         struct fsl_mc_io *dpni_dev;
2316         struct dpni_attr attr;
2317         struct dpaa2_dev_priv *priv = eth_dev->data->dev_private;
2318         struct dpni_buffer_layout layout;
2319         int ret, hw_id, i;
2320
2321         PMD_INIT_FUNC_TRACE();
2322
2323         dpni_dev = rte_malloc(NULL, sizeof(struct fsl_mc_io), 0);
2324         if (!dpni_dev) {
2325                 DPAA2_PMD_ERR("Memory allocation failed for dpni device");
2326                 return -1;
2327         }
2328         dpni_dev->regs = rte_mcp_ptr_list[0];
2329         eth_dev->process_private = (void *)dpni_dev;
2330
2331         /* For secondary processes, the primary has done all the work */
2332         if (rte_eal_process_type() != RTE_PROC_PRIMARY) {
2333                 /* In case of secondary, only burst and ops API need to be
2334                  * plugged.
2335                  */
2336                 eth_dev->dev_ops = &dpaa2_ethdev_ops;
2337                 if (dpaa2_get_devargs(dev->devargs, DRIVER_LOOPBACK_MODE))
2338                         eth_dev->rx_pkt_burst = dpaa2_dev_loopback_rx;
2339                 else if (dpaa2_get_devargs(dev->devargs,
2340                                         DRIVER_NO_PREFETCH_MODE))
2341                         eth_dev->rx_pkt_burst = dpaa2_dev_rx;
2342                 else
2343                         eth_dev->rx_pkt_burst = dpaa2_dev_prefetch_rx;
2344                 eth_dev->tx_pkt_burst = dpaa2_dev_tx;
2345                 return 0;
2346         }
2347
2348         dpaa2_dev = container_of(dev, struct rte_dpaa2_device, device);
2349
2350         hw_id = dpaa2_dev->object_id;
2351         ret = dpni_open(dpni_dev, CMD_PRI_LOW, hw_id, &priv->token);
2352         if (ret) {
2353                 DPAA2_PMD_ERR(
2354                              "Failure in opening dpni@%d with err code %d",
2355                              hw_id, ret);
2356                 rte_free(dpni_dev);
2357                 return -1;
2358         }
2359
2360         /* Clean the device first */
2361         ret = dpni_reset(dpni_dev, CMD_PRI_LOW, priv->token);
2362         if (ret) {
2363                 DPAA2_PMD_ERR("Failure cleaning dpni@%d with err code %d",
2364                               hw_id, ret);
2365                 goto init_err;
2366         }
2367
2368         ret = dpni_get_attributes(dpni_dev, CMD_PRI_LOW, priv->token, &attr);
2369         if (ret) {
2370                 DPAA2_PMD_ERR(
2371                              "Failure in get dpni@%d attribute, err code %d",
2372                              hw_id, ret);
2373                 goto init_err;
2374         }
2375
2376         priv->num_rx_tc = attr.num_rx_tcs;
2377         /* only if the custom CG is enabled */
2378         if (attr.options & DPNI_OPT_CUSTOM_CG)
2379                 priv->max_cgs = attr.num_cgs;
2380         else
2381                 priv->max_cgs = 0;
2382
2383         for (i = 0; i < priv->max_cgs; i++)
2384                 priv->cgid_in_use[i] = 0;
2385
2386         for (i = 0; i < attr.num_rx_tcs; i++)
2387                 priv->nb_rx_queues += attr.num_queues;
2388
2389         /* Using number of TX queues as number of TX TCs */
2390         priv->nb_tx_queues = attr.num_tx_tcs;
2391
2392         DPAA2_PMD_DEBUG("RX-TC= %d, rx_queues= %d, tx_queues=%d, max_cgs=%d",
2393                         priv->num_rx_tc, priv->nb_rx_queues,
2394                         priv->nb_tx_queues, priv->max_cgs);
2395
2396         priv->hw = dpni_dev;
2397         priv->hw_id = hw_id;
2398         priv->options = attr.options;
2399         priv->max_mac_filters = attr.mac_filter_entries;
2400         priv->max_vlan_filters = attr.vlan_filter_entries;
2401         priv->flags = 0;
2402 #if defined(RTE_LIBRTE_IEEE1588)
2403         priv->tx_conf_en = 1;
2404 #else
2405         priv->tx_conf_en = 0;
2406 #endif
2407
2408         /* Allocate memory for hardware structure for queues */
2409         ret = dpaa2_alloc_rx_tx_queues(eth_dev);
2410         if (ret) {
2411                 DPAA2_PMD_ERR("Queue allocation Failed");
2412                 goto init_err;
2413         }
2414
2415         /* Allocate memory for storing MAC addresses.
2416          * Table of mac_filter_entries size is allocated so that RTE ether lib
2417          * can add MAC entries when rte_eth_dev_mac_addr_add is called.
2418          */
2419         eth_dev->data->mac_addrs = rte_zmalloc("dpni",
2420                 RTE_ETHER_ADDR_LEN * attr.mac_filter_entries, 0);
2421         if (eth_dev->data->mac_addrs == NULL) {
2422                 DPAA2_PMD_ERR(
2423                    "Failed to allocate %d bytes needed to store MAC addresses",
2424                    RTE_ETHER_ADDR_LEN * attr.mac_filter_entries);
2425                 ret = -ENOMEM;
2426                 goto init_err;
2427         }
2428
2429         ret = populate_mac_addr(dpni_dev, priv, &eth_dev->data->mac_addrs[0]);
2430         if (ret) {
2431                 DPAA2_PMD_ERR("Unable to fetch MAC Address for device");
2432                 rte_free(eth_dev->data->mac_addrs);
2433                 eth_dev->data->mac_addrs = NULL;
2434                 goto init_err;
2435         }
2436
2437         /* ... tx buffer layout ... */
2438         memset(&layout, 0, sizeof(struct dpni_buffer_layout));
2439         if (priv->tx_conf_en) {
2440                 layout.options = DPNI_BUF_LAYOUT_OPT_FRAME_STATUS |
2441                                  DPNI_BUF_LAYOUT_OPT_TIMESTAMP;
2442                 layout.pass_timestamp = true;
2443         } else {
2444                 layout.options = DPNI_BUF_LAYOUT_OPT_FRAME_STATUS;
2445         }
2446         layout.pass_frame_status = 1;
2447         ret = dpni_set_buffer_layout(dpni_dev, CMD_PRI_LOW, priv->token,
2448                                      DPNI_QUEUE_TX, &layout);
2449         if (ret) {
2450                 DPAA2_PMD_ERR("Error (%d) in setting tx buffer layout", ret);
2451                 goto init_err;
2452         }
2453
2454         /* ... tx-conf and error buffer layout ... */
2455         memset(&layout, 0, sizeof(struct dpni_buffer_layout));
2456         if (priv->tx_conf_en) {
2457                 layout.options = DPNI_BUF_LAYOUT_OPT_FRAME_STATUS |
2458                                  DPNI_BUF_LAYOUT_OPT_TIMESTAMP;
2459                 layout.pass_timestamp = true;
2460         } else {
2461                 layout.options = DPNI_BUF_LAYOUT_OPT_FRAME_STATUS;
2462         }
2463         layout.pass_frame_status = 1;
2464         ret = dpni_set_buffer_layout(dpni_dev, CMD_PRI_LOW, priv->token,
2465                                      DPNI_QUEUE_TX_CONFIRM, &layout);
2466         if (ret) {
2467                 DPAA2_PMD_ERR("Error (%d) in setting tx-conf buffer layout",
2468                              ret);
2469                 goto init_err;
2470         }
2471
2472         eth_dev->dev_ops = &dpaa2_ethdev_ops;
2473
2474         if (dpaa2_get_devargs(dev->devargs, DRIVER_LOOPBACK_MODE)) {
2475                 eth_dev->rx_pkt_burst = dpaa2_dev_loopback_rx;
2476                 DPAA2_PMD_INFO("Loopback mode");
2477         } else if (dpaa2_get_devargs(dev->devargs, DRIVER_NO_PREFETCH_MODE)) {
2478                 eth_dev->rx_pkt_burst = dpaa2_dev_rx;
2479                 DPAA2_PMD_INFO("No Prefetch mode");
2480         } else {
2481                 eth_dev->rx_pkt_burst = dpaa2_dev_prefetch_rx;
2482         }
2483         eth_dev->tx_pkt_burst = dpaa2_dev_tx;
2484
2485         /*Init fields w.r.t. classficaition*/
2486         memset(&priv->extract.qos_key_cfg, 0, sizeof(struct dpkg_profile_cfg));
2487         priv->extract.qos_extract_param = (size_t)rte_malloc(NULL, 256, 64);
2488         if (!priv->extract.qos_extract_param) {
2489                 DPAA2_PMD_ERR(" Error(%d) in allocation resources for flow "
2490                             " classificaiton ", ret);
2491                 goto init_err;
2492         }
2493         for (i = 0; i < MAX_TCS; i++) {
2494                 memset(&priv->extract.fs_key_cfg[i], 0,
2495                         sizeof(struct dpkg_profile_cfg));
2496                 priv->extract.fs_extract_param[i] =
2497                         (size_t)rte_malloc(NULL, 256, 64);
2498                 if (!priv->extract.fs_extract_param[i]) {
2499                         DPAA2_PMD_ERR(" Error(%d) in allocation resources for flow classificaiton",
2500                                      ret);
2501                         goto init_err;
2502                 }
2503         }
2504
2505         ret = dpni_set_max_frame_length(dpni_dev, CMD_PRI_LOW, priv->token,
2506                                         RTE_ETHER_MAX_LEN - RTE_ETHER_CRC_LEN
2507                                         + VLAN_TAG_SIZE);
2508         if (ret) {
2509                 DPAA2_PMD_ERR("Unable to set mtu. check config");
2510                 goto init_err;
2511         }
2512
2513         /*TODO To enable soft parser support DPAA2 driver needs to integrate
2514          * with external entity to receive byte code for software sequence
2515          * and same will be offload to the H/W using MC interface.
2516          * Currently it is assumed that DPAA2 driver has byte code by some
2517          * mean and same if offloaded to H/W.
2518          */
2519         if (getenv("DPAA2_ENABLE_SOFT_PARSER")) {
2520                 WRIOP_SS_INITIALIZER(priv);
2521                 ret = dpaa2_eth_load_wriop_soft_parser(priv, DPNI_SS_INGRESS);
2522                 if (ret < 0) {
2523                         DPAA2_PMD_ERR(" Error(%d) in loading softparser\n",
2524                                       ret);
2525                         return ret;
2526                 }
2527
2528                 ret = dpaa2_eth_enable_wriop_soft_parser(priv,
2529                                                          DPNI_SS_INGRESS);
2530                 if (ret < 0) {
2531                         DPAA2_PMD_ERR(" Error(%d) in enabling softparser\n",
2532                                       ret);
2533                         return ret;
2534                 }
2535         }
2536         RTE_LOG(INFO, PMD, "%s: netdev created\n", eth_dev->data->name);
2537         return 0;
2538 init_err:
2539         dpaa2_dev_uninit(eth_dev);
2540         return ret;
2541 }
2542
2543 static int
2544 dpaa2_dev_uninit(struct rte_eth_dev *eth_dev)
2545 {
2546         struct dpaa2_dev_priv *priv = eth_dev->data->dev_private;
2547         struct fsl_mc_io *dpni = (struct fsl_mc_io *)eth_dev->process_private;
2548         int i, ret;
2549
2550         PMD_INIT_FUNC_TRACE();
2551
2552         if (rte_eal_process_type() != RTE_PROC_PRIMARY)
2553                 return 0;
2554
2555         if (!dpni) {
2556                 DPAA2_PMD_WARN("Already closed or not started");
2557                 return -1;
2558         }
2559
2560         dpaa2_dev_close(eth_dev);
2561
2562         dpaa2_free_rx_tx_queues(eth_dev);
2563
2564         /* Close the device at underlying layer*/
2565         ret = dpni_close(dpni, CMD_PRI_LOW, priv->token);
2566         if (ret) {
2567                 DPAA2_PMD_ERR(
2568                              "Failure closing dpni device with err code %d",
2569                              ret);
2570         }
2571
2572         /* Free the allocated memory for ethernet private data and dpni*/
2573         priv->hw = NULL;
2574         eth_dev->process_private = NULL;
2575         rte_free(dpni);
2576
2577         for (i = 0; i < MAX_TCS; i++) {
2578                 if (priv->extract.fs_extract_param[i])
2579                         rte_free((void *)(size_t)priv->extract.fs_extract_param[i]);
2580         }
2581
2582         if (priv->extract.qos_extract_param)
2583                 rte_free((void *)(size_t)priv->extract.qos_extract_param);
2584
2585         eth_dev->dev_ops = NULL;
2586         eth_dev->rx_pkt_burst = NULL;
2587         eth_dev->tx_pkt_burst = NULL;
2588
2589         DPAA2_PMD_INFO("%s: netdev deleted", eth_dev->data->name);
2590         return 0;
2591 }
2592
2593 static int
2594 rte_dpaa2_probe(struct rte_dpaa2_driver *dpaa2_drv,
2595                 struct rte_dpaa2_device *dpaa2_dev)
2596 {
2597         struct rte_eth_dev *eth_dev;
2598         struct dpaa2_dev_priv *dev_priv;
2599         int diag;
2600
2601         if ((DPAA2_MBUF_HW_ANNOTATION + DPAA2_FD_PTA_SIZE) >
2602                 RTE_PKTMBUF_HEADROOM) {
2603                 DPAA2_PMD_ERR(
2604                 "RTE_PKTMBUF_HEADROOM(%d) shall be > DPAA2 Annotation req(%d)",
2605                 RTE_PKTMBUF_HEADROOM,
2606                 DPAA2_MBUF_HW_ANNOTATION + DPAA2_FD_PTA_SIZE);
2607
2608                 return -1;
2609         }
2610
2611         if (rte_eal_process_type() == RTE_PROC_PRIMARY) {
2612                 eth_dev = rte_eth_dev_allocate(dpaa2_dev->device.name);
2613                 if (!eth_dev)
2614                         return -ENODEV;
2615                 dev_priv = rte_zmalloc("ethdev private structure",
2616                                        sizeof(struct dpaa2_dev_priv),
2617                                        RTE_CACHE_LINE_SIZE);
2618                 if (dev_priv == NULL) {
2619                         DPAA2_PMD_CRIT(
2620                                 "Unable to allocate memory for private data");
2621                         rte_eth_dev_release_port(eth_dev);
2622                         return -ENOMEM;
2623                 }
2624                 eth_dev->data->dev_private = (void *)dev_priv;
2625                 /* Store a pointer to eth_dev in dev_private */
2626                 dev_priv->eth_dev = eth_dev;
2627                 dev_priv->tx_conf_en = 0;
2628         } else {
2629                 eth_dev = rte_eth_dev_attach_secondary(dpaa2_dev->device.name);
2630                 if (!eth_dev) {
2631                         DPAA2_PMD_DEBUG("returning enodev");
2632                         return -ENODEV;
2633                 }
2634         }
2635
2636         eth_dev->device = &dpaa2_dev->device;
2637
2638         dpaa2_dev->eth_dev = eth_dev;
2639         eth_dev->data->rx_mbuf_alloc_failed = 0;
2640
2641         if (dpaa2_drv->drv_flags & RTE_DPAA2_DRV_INTR_LSC)
2642                 eth_dev->data->dev_flags |= RTE_ETH_DEV_INTR_LSC;
2643
2644         /* Invoke PMD device initialization function */
2645         diag = dpaa2_dev_init(eth_dev);
2646         if (diag == 0) {
2647                 rte_eth_dev_probing_finish(eth_dev);
2648                 return 0;
2649         }
2650
2651         rte_eth_dev_release_port(eth_dev);
2652         return diag;
2653 }
2654
2655 static int
2656 rte_dpaa2_remove(struct rte_dpaa2_device *dpaa2_dev)
2657 {
2658         struct rte_eth_dev *eth_dev;
2659
2660         eth_dev = dpaa2_dev->eth_dev;
2661         dpaa2_dev_uninit(eth_dev);
2662
2663         rte_eth_dev_release_port(eth_dev);
2664
2665         return 0;
2666 }
2667
2668 static struct rte_dpaa2_driver rte_dpaa2_pmd = {
2669         .drv_flags = RTE_DPAA2_DRV_INTR_LSC | RTE_DPAA2_DRV_IOVA_AS_VA,
2670         .drv_type = DPAA2_ETH,
2671         .probe = rte_dpaa2_probe,
2672         .remove = rte_dpaa2_remove,
2673 };
2674
2675 RTE_PMD_REGISTER_DPAA2(net_dpaa2, rte_dpaa2_pmd);
2676 RTE_PMD_REGISTER_PARAM_STRING(net_dpaa2,
2677                 DRIVER_LOOPBACK_MODE "=<int> "
2678                 DRIVER_NO_PREFETCH_MODE "=<int>");
2679 RTE_INIT(dpaa2_pmd_init_log)
2680 {
2681         dpaa2_logtype_pmd = rte_log_register("pmd.net.dpaa2");
2682         if (dpaa2_logtype_pmd >= 0)
2683                 rte_log_set_level(dpaa2_logtype_pmd, RTE_LOG_NOTICE);
2684 }