drivers/net/dpaa2/dpaa2_ethdev.c

   1 /* * SPDX-License-Identifier: BSD-3-Clause
   2  *
   3  *   Copyright (c) 2016 Freescale Semiconductor, Inc. All rights reserved.
   4  *   Copyright 2016 NXP
   5  *
   6  */
   7
   8 #include <time.h>
   9 #include <net/if.h>
  10
  11 #include <rte_mbuf.h>
  12 #include <rte_ethdev_driver.h>
  13 #include <rte_malloc.h>
  14 #include <rte_memcpy.h>
  15 #include <rte_string_fns.h>
  16 #include <rte_cycles.h>
  17 #include <rte_kvargs.h>
  18 #include <rte_dev.h>
  19 #include <rte_fslmc.h>
  20 #include <rte_flow_driver.h>
  21
  22 #include "dpaa2_pmd_logs.h"
  23 #include <fslmc_vfio.h>
  24 #include <dpaa2_hw_pvt.h>
  25 #include <dpaa2_hw_mempool.h>
  26 #include <dpaa2_hw_dpio.h>
  27 #include <mc/fsl_dpmng.h>
  28 #include "dpaa2_ethdev.h"
  29 #include <fsl_qbman_debug.h>
  30
  31 #define DRIVER_LOOPBACK_MODE "drv_loopback"
  32 #define DRIVER_NO_PREFETCH_MODE "drv_no_prefetch"
  33
  34 /* Supported Rx offloads */
  35 static uint64_t dev_rx_offloads_sup =
  36                 DEV_RX_OFFLOAD_CHECKSUM |
  37                 DEV_RX_OFFLOAD_SCTP_CKSUM |
  38                 DEV_RX_OFFLOAD_OUTER_IPV4_CKSUM |
  39                 DEV_RX_OFFLOAD_OUTER_UDP_CKSUM |
  40                 DEV_RX_OFFLOAD_VLAN_STRIP |
  41                 DEV_RX_OFFLOAD_VLAN_FILTER |
  42                 DEV_RX_OFFLOAD_JUMBO_FRAME |
  43                 DEV_RX_OFFLOAD_TIMESTAMP;
  44
  45 /* Rx offloads which cannot be disabled */
  46 static uint64_t dev_rx_offloads_nodis =
  47                 DEV_RX_OFFLOAD_SCATTER;
  48
  49 /* Supported Tx offloads */
  50 static uint64_t dev_tx_offloads_sup =
  51                 DEV_TX_OFFLOAD_VLAN_INSERT |
  52                 DEV_TX_OFFLOAD_IPV4_CKSUM |
  53                 DEV_TX_OFFLOAD_UDP_CKSUM |
  54                 DEV_TX_OFFLOAD_TCP_CKSUM |
  55                 DEV_TX_OFFLOAD_SCTP_CKSUM |
  56                 DEV_TX_OFFLOAD_OUTER_IPV4_CKSUM |
  57                 DEV_TX_OFFLOAD_MT_LOCKFREE |
  58                 DEV_TX_OFFLOAD_MBUF_FAST_FREE;
  59
  60 /* Tx offloads which cannot be disabled */
  61 static uint64_t dev_tx_offloads_nodis =
  62                 DEV_TX_OFFLOAD_MULTI_SEGS;
  63
  64 /* enable timestamp in mbuf */
  65 enum pmd_dpaa2_ts dpaa2_enable_ts;
  66
  67 struct rte_dpaa2_xstats_name_off {
  68         char name[RTE_ETH_XSTATS_NAME_SIZE];
  69         uint8_t page_id; /* dpni statistics page id */
  70         uint8_t stats_id; /* stats id in the given page */
  71 };
  72
  73 static const struct rte_dpaa2_xstats_name_off dpaa2_xstats_strings[] = {
  74         {"ingress_multicast_frames", 0, 2},
  75         {"ingress_multicast_bytes", 0, 3},
  76         {"ingress_broadcast_frames", 0, 4},
  77         {"ingress_broadcast_bytes", 0, 5},
  78         {"egress_multicast_frames", 1, 2},
  79         {"egress_multicast_bytes", 1, 3},
  80         {"egress_broadcast_frames", 1, 4},
  81         {"egress_broadcast_bytes", 1, 5},
  82         {"ingress_filtered_frames", 2, 0},
  83         {"ingress_discarded_frames", 2, 1},
  84         {"ingress_nobuffer_discards", 2, 2},
  85         {"egress_discarded_frames", 2, 3},
  86         {"egress_confirmed_frames", 2, 4},
  87         {"cgr_reject_frames", 4, 0},
  88         {"cgr_reject_bytes", 4, 1},
  89 };
  90
  91 static const enum rte_filter_op dpaa2_supported_filter_ops[] = {
  92         RTE_ETH_FILTER_ADD,
  93         RTE_ETH_FILTER_DELETE,
  94         RTE_ETH_FILTER_UPDATE,
  95         RTE_ETH_FILTER_FLUSH,
  96         RTE_ETH_FILTER_GET
  97 };
  98
  99 static struct rte_dpaa2_driver rte_dpaa2_pmd;
 100 static int dpaa2_dev_uninit(struct rte_eth_dev *eth_dev);
 101 static int dpaa2_dev_link_update(struct rte_eth_dev *dev,
 102                                  int wait_to_complete);
 103 static int dpaa2_dev_set_link_up(struct rte_eth_dev *dev);
 104 static int dpaa2_dev_set_link_down(struct rte_eth_dev *dev);
 105 static int dpaa2_dev_mtu_set(struct rte_eth_dev *dev, uint16_t mtu);
 106
 107 int dpaa2_logtype_pmd;
 108
 109 void
 110 rte_pmd_dpaa2_set_timestamp(enum pmd_dpaa2_ts enable)
 111 {
 112         dpaa2_enable_ts = enable;
 113 }
 114
 115 static int
 116 dpaa2_vlan_filter_set(struct rte_eth_dev *dev, uint16_t vlan_id, int on)
 117 {
 118         int ret;
 119         struct dpaa2_dev_priv *priv = dev->data->dev_private;
 120         struct fsl_mc_io *dpni = priv->hw;
 121
 122         PMD_INIT_FUNC_TRACE();
 123
 124         if (dpni == NULL) {
 125                 DPAA2_PMD_ERR("dpni is NULL");
 126                 return -1;
 127         }
 128
 129         if (on)
 130                 ret = dpni_add_vlan_id(dpni, CMD_PRI_LOW,
 131                                        priv->token, vlan_id);
 132         else
 133                 ret = dpni_remove_vlan_id(dpni, CMD_PRI_LOW,
 134                                           priv->token, vlan_id);
 135
 136         if (ret < 0)
 137                 DPAA2_PMD_ERR("ret = %d Unable to add/rem vlan %d hwid =%d",
 138                               ret, vlan_id, priv->hw_id);
 139
 140         return ret;
 141 }
 142
 143 static int
 144 dpaa2_vlan_offload_set(struct rte_eth_dev *dev, int mask)
 145 {
 146         struct dpaa2_dev_priv *priv = dev->data->dev_private;
 147         struct fsl_mc_io *dpni = priv->hw;
 148         int ret;
 149
 150         PMD_INIT_FUNC_TRACE();
 151
 152         if (mask & ETH_VLAN_FILTER_MASK) {
 153                 /* VLAN Filter not avaialble */
 154                 if (!priv->max_vlan_filters) {
 155                         DPAA2_PMD_INFO("VLAN filter not available");
 156                         goto next_mask;
 157                 }
 158
 159                 if (dev->data->dev_conf.rxmode.offloads &
 160                         DEV_RX_OFFLOAD_VLAN_FILTER)
 161                         ret = dpni_enable_vlan_filter(dpni, CMD_PRI_LOW,
 162                                                       priv->token, true);
 163                 else
 164                         ret = dpni_enable_vlan_filter(dpni, CMD_PRI_LOW,
 165                                                       priv->token, false);
 166                 if (ret < 0)
 167                         DPAA2_PMD_INFO("Unable to set vlan filter = %d", ret);
 168         }
 169 next_mask:
 170         if (mask & ETH_VLAN_EXTEND_MASK) {
 171                 if (dev->data->dev_conf.rxmode.offloads &
 172                         DEV_RX_OFFLOAD_VLAN_EXTEND)
 173                         DPAA2_PMD_INFO("VLAN extend offload not supported");
 174         }
 175
 176         return 0;
 177 }
 178
 179 static int
 180 dpaa2_vlan_tpid_set(struct rte_eth_dev *dev,
 181                       enum rte_vlan_type vlan_type __rte_unused,
 182                       uint16_t tpid)
 183 {
 184         struct dpaa2_dev_priv *priv = dev->data->dev_private;
 185         struct fsl_mc_io *dpni = priv->hw;
 186         int ret = -ENOTSUP;
 187
 188         PMD_INIT_FUNC_TRACE();
 189
 190         /* nothing to be done for standard vlan tpids */
 191         if (tpid == 0x8100 || tpid == 0x88A8)
 192                 return 0;
 193
 194         ret = dpni_add_custom_tpid(dpni, CMD_PRI_LOW,
 195                                    priv->token, tpid);
 196         if (ret < 0)
 197                 DPAA2_PMD_INFO("Unable to set vlan tpid = %d", ret);
 198         /* if already configured tpids, remove them first */
 199         if (ret == -EBUSY) {
 200                 struct dpni_custom_tpid_cfg tpid_list = {0};
 201
 202                 ret = dpni_get_custom_tpid(dpni, CMD_PRI_LOW,
 203                                    priv->token, &tpid_list);
 204                 if (ret < 0)
 205                         goto fail;
 206                 ret = dpni_remove_custom_tpid(dpni, CMD_PRI_LOW,
 207                                    priv->token, tpid_list.tpid1);
 208                 if (ret < 0)
 209                         goto fail;
 210                 ret = dpni_add_custom_tpid(dpni, CMD_PRI_LOW,
 211                                            priv->token, tpid);
 212         }
 213 fail:
 214         return ret;
 215 }
 216
 217 static int
 218 dpaa2_fw_version_get(struct rte_eth_dev *dev,
 219                      char *fw_version,
 220                      size_t fw_size)
 221 {
 222         int ret;
 223         struct dpaa2_dev_priv *priv = dev->data->dev_private;
 224         struct fsl_mc_io *dpni = priv->hw;
 225         struct mc_soc_version mc_plat_info = {0};
 226         struct mc_version mc_ver_info = {0};
 227
 228         PMD_INIT_FUNC_TRACE();
 229
 230         if (mc_get_soc_version(dpni, CMD_PRI_LOW, &mc_plat_info))
 231                 DPAA2_PMD_WARN("\tmc_get_soc_version failed");
 232
 233         if (mc_get_version(dpni, CMD_PRI_LOW, &mc_ver_info))
 234                 DPAA2_PMD_WARN("\tmc_get_version failed");
 235
 236         ret = snprintf(fw_version, fw_size,
 237                        "%x-%d.%d.%d",
 238                        mc_plat_info.svr,
 239                        mc_ver_info.major,
 240                        mc_ver_info.minor,
 241                        mc_ver_info.revision);
 242
 243         ret += 1; /* add the size of '\0' */
 244         if (fw_size < (uint32_t)ret)
 245                 return ret;
 246         else
 247                 return 0;
 248 }
 249
 250 static int
 251 dpaa2_dev_info_get(struct rte_eth_dev *dev, struct rte_eth_dev_info *dev_info)
 252 {
 253         struct dpaa2_dev_priv *priv = dev->data->dev_private;
 254
 255         PMD_INIT_FUNC_TRACE();
 256
 257         dev_info->if_index = priv->hw_id;
 258
 259         dev_info->max_mac_addrs = priv->max_mac_filters;
 260         dev_info->max_rx_pktlen = DPAA2_MAX_RX_PKT_LEN;
 261         dev_info->min_rx_bufsize = DPAA2_MIN_RX_BUF_SIZE;
 262         dev_info->max_rx_queues = (uint16_t)priv->nb_rx_queues;
 263         dev_info->max_tx_queues = (uint16_t)priv->nb_tx_queues;
 264         dev_info->rx_offload_capa = dev_rx_offloads_sup |
 265                                         dev_rx_offloads_nodis;
 266         dev_info->tx_offload_capa = dev_tx_offloads_sup |
 267                                         dev_tx_offloads_nodis;
 268         dev_info->speed_capa = ETH_LINK_SPEED_1G |
 269                         ETH_LINK_SPEED_2_5G |
 270                         ETH_LINK_SPEED_10G;
 271
 272         dev_info->max_hash_mac_addrs = 0;
 273         dev_info->max_vfs = 0;
 274         dev_info->max_vmdq_pools = ETH_16_POOLS;
 275         dev_info->flow_type_rss_offloads = DPAA2_RSS_OFFLOAD_ALL;
 276
 277         return 0;
 278 }
 279
 280 static int
 281 dpaa2_alloc_rx_tx_queues(struct rte_eth_dev *dev)
 282 {
 283         struct dpaa2_dev_priv *priv = dev->data->dev_private;
 284         uint16_t dist_idx;
 285         uint32_t vq_id;
 286         uint8_t num_rxqueue_per_tc;
 287         struct dpaa2_queue *mc_q, *mcq;
 288         uint32_t tot_queues;
 289         int i;
 290         struct dpaa2_queue *dpaa2_q;
 291
 292         PMD_INIT_FUNC_TRACE();
 293
 294         num_rxqueue_per_tc = (priv->nb_rx_queues / priv->num_rx_tc);
 295         if (priv->tx_conf_en)
 296                 tot_queues = priv->nb_rx_queues + 2 * priv->nb_tx_queues;
 297         else
 298                 tot_queues = priv->nb_rx_queues + priv->nb_tx_queues;
 299         mc_q = rte_malloc(NULL, sizeof(struct dpaa2_queue) * tot_queues,
 300                           RTE_CACHE_LINE_SIZE);
 301         if (!mc_q) {
 302                 DPAA2_PMD_ERR("Memory allocation failed for rx/tx queues");
 303                 return -1;
 304         }
 305
 306         for (i = 0; i < priv->nb_rx_queues; i++) {
 307                 mc_q->eth_data = dev->data;
 308                 priv->rx_vq[i] = mc_q++;
 309                 dpaa2_q = (struct dpaa2_queue *)priv->rx_vq[i];
 310                 dpaa2_q->q_storage = rte_malloc("dq_storage",
 311                                         sizeof(struct queue_storage_info_t),
 312                                         RTE_CACHE_LINE_SIZE);
 313                 if (!dpaa2_q->q_storage)
 314                         goto fail;
 315
 316                 memset(dpaa2_q->q_storage, 0,
 317                        sizeof(struct queue_storage_info_t));
 318                 if (dpaa2_alloc_dq_storage(dpaa2_q->q_storage))
 319                         goto fail;
 320         }
 321
 322         for (i = 0; i < priv->nb_tx_queues; i++) {
 323                 mc_q->eth_data = dev->data;
 324                 mc_q->flow_id = 0xffff;
 325                 priv->tx_vq[i] = mc_q++;
 326                 dpaa2_q = (struct dpaa2_queue *)priv->tx_vq[i];
 327                 dpaa2_q->cscn = rte_malloc(NULL,
 328                                            sizeof(struct qbman_result), 16);
 329                 if (!dpaa2_q->cscn)
 330                         goto fail_tx;
 331         }
 332
 333         if (priv->tx_conf_en) {
 334                 /*Setup tx confirmation queues*/
 335                 for (i = 0; i < priv->nb_tx_queues; i++) {
 336                         mc_q->eth_data = dev->data;
 337                         mc_q->tc_index = i;
 338                         mc_q->flow_id = 0;
 339                         priv->tx_conf_vq[i] = mc_q++;
 340                         dpaa2_q = (struct dpaa2_queue *)priv->tx_conf_vq[i];
 341                         dpaa2_q->q_storage =
 342                                 rte_malloc("dq_storage",
 343                                         sizeof(struct queue_storage_info_t),
 344                                         RTE_CACHE_LINE_SIZE);
 345                         if (!dpaa2_q->q_storage)
 346                                 goto fail_tx_conf;
 347
 348                         memset(dpaa2_q->q_storage, 0,
 349                                sizeof(struct queue_storage_info_t));
 350                         if (dpaa2_alloc_dq_storage(dpaa2_q->q_storage))
 351                                 goto fail_tx_conf;
 352                 }
 353         }
 354
 355         vq_id = 0;
 356         for (dist_idx = 0; dist_idx < priv->nb_rx_queues; dist_idx++) {
 357                 mcq = (struct dpaa2_queue *)priv->rx_vq[vq_id];
 358                 mcq->tc_index = dist_idx / num_rxqueue_per_tc;
 359                 mcq->flow_id = dist_idx % num_rxqueue_per_tc;
 360                 vq_id++;
 361         }
 362
 363         return 0;
 364 fail_tx_conf:
 365         i -= 1;
 366         while (i >= 0) {
 367                 dpaa2_q = (struct dpaa2_queue *)priv->tx_conf_vq[i];
 368                 rte_free(dpaa2_q->q_storage);
 369                 priv->tx_conf_vq[i--] = NULL;
 370         }
 371         i = priv->nb_tx_queues;
 372 fail_tx:
 373         i -= 1;
 374         while (i >= 0) {
 375                 dpaa2_q = (struct dpaa2_queue *)priv->tx_vq[i];
 376                 rte_free(dpaa2_q->cscn);
 377                 priv->tx_vq[i--] = NULL;
 378         }
 379         i = priv->nb_rx_queues;
 380 fail:
 381         i -= 1;
 382         mc_q = priv->rx_vq[0];
 383         while (i >= 0) {
 384                 dpaa2_q = (struct dpaa2_queue *)priv->rx_vq[i];
 385                 dpaa2_free_dq_storage(dpaa2_q->q_storage);
 386                 rte_free(dpaa2_q->q_storage);
 387                 priv->rx_vq[i--] = NULL;
 388         }
 389         rte_free(mc_q);
 390         return -1;
 391 }
 392
 393 static void
 394 dpaa2_free_rx_tx_queues(struct rte_eth_dev *dev)
 395 {
 396         struct dpaa2_dev_priv *priv = dev->data->dev_private;
 397         struct dpaa2_queue *dpaa2_q;
 398         int i;
 399
 400         PMD_INIT_FUNC_TRACE();
 401
 402         /* Queue allocation base */
 403         if (priv->rx_vq[0]) {
 404                 /* cleaning up queue storage */
 405                 for (i = 0; i < priv->nb_rx_queues; i++) {
 406                         dpaa2_q = (struct dpaa2_queue *)priv->rx_vq[i];
 407                         if (dpaa2_q->q_storage)
 408                                 rte_free(dpaa2_q->q_storage);
 409                 }
 410                 /* cleanup tx queue cscn */
 411                 for (i = 0; i < priv->nb_tx_queues; i++) {
 412                         dpaa2_q = (struct dpaa2_queue *)priv->tx_vq[i];
 413                         rte_free(dpaa2_q->cscn);
 414                 }
 415                 if (priv->tx_conf_en) {
 416                         /* cleanup tx conf queue storage */
 417                         for (i = 0; i < priv->nb_tx_queues; i++) {
 418                                 dpaa2_q = (struct dpaa2_queue *)
 419                                                 priv->tx_conf_vq[i];
 420                                 rte_free(dpaa2_q->q_storage);
 421                         }
 422                 }
 423                 /*free memory for all queues (RX+TX) */
 424                 rte_free(priv->rx_vq[0]);
 425                 priv->rx_vq[0] = NULL;
 426         }
 427 }
 428
 429 static int
 430 dpaa2_eth_dev_configure(struct rte_eth_dev *dev)
 431 {
 432         struct dpaa2_dev_priv *priv = dev->data->dev_private;
 433         struct fsl_mc_io *dpni = priv->hw;
 434         struct rte_eth_conf *eth_conf = &dev->data->dev_conf;
 435         uint64_t rx_offloads = eth_conf->rxmode.offloads;
 436         uint64_t tx_offloads = eth_conf->txmode.offloads;
 437         int rx_l3_csum_offload = false;
 438         int rx_l4_csum_offload = false;
 439         int tx_l3_csum_offload = false;
 440         int tx_l4_csum_offload = false;
 441         int ret;
 442
 443         PMD_INIT_FUNC_TRACE();
 444
 445         /* Rx offloads which are enabled by default */
 446         if (dev_rx_offloads_nodis & ~rx_offloads) {
 447                 DPAA2_PMD_INFO(
 448                 "Some of rx offloads enabled by default - requested 0x%" PRIx64
 449                 " fixed are 0x%" PRIx64,
 450                 rx_offloads, dev_rx_offloads_nodis);
 451         }
 452
 453         /* Tx offloads which are enabled by default */
 454         if (dev_tx_offloads_nodis & ~tx_offloads) {
 455                 DPAA2_PMD_INFO(
 456                 "Some of tx offloads enabled by default - requested 0x%" PRIx64
 457                 " fixed are 0x%" PRIx64,
 458                 tx_offloads, dev_tx_offloads_nodis);
 459         }
 460
 461         if (rx_offloads & DEV_RX_OFFLOAD_JUMBO_FRAME) {
 462                 if (eth_conf->rxmode.max_rx_pkt_len <= DPAA2_MAX_RX_PKT_LEN) {
 463                         ret = dpni_set_max_frame_length(dpni, CMD_PRI_LOW,
 464                                 priv->token, eth_conf->rxmode.max_rx_pkt_len
 465                                 - RTE_ETHER_CRC_LEN);
 466                         if (ret) {
 467                                 DPAA2_PMD_ERR(
 468                                         "Unable to set mtu. check config");
 469                                 return ret;
 470                         }
 471                         dev->data->mtu =
 472                                 dev->data->dev_conf.rxmode.max_rx_pkt_len -
 473                                 RTE_ETHER_HDR_LEN - RTE_ETHER_CRC_LEN -
 474                                 VLAN_TAG_SIZE;
 475                 } else {
 476                         return -1;
 477                 }
 478         }
 479
 480         if (eth_conf->rxmode.mq_mode == ETH_MQ_RX_RSS) {
 481                 ret = dpaa2_setup_flow_dist(dev,
 482                                 eth_conf->rx_adv_conf.rss_conf.rss_hf);
 483                 if (ret) {
 484                         DPAA2_PMD_ERR("Unable to set flow distribution."
 485                                       "Check queue config");
 486                         return ret;
 487                 }
 488         }
 489
 490         if (rx_offloads & DEV_RX_OFFLOAD_IPV4_CKSUM)
 491                 rx_l3_csum_offload = true;
 492
 493         if ((rx_offloads & DEV_RX_OFFLOAD_UDP_CKSUM) ||
 494                 (rx_offloads & DEV_RX_OFFLOAD_TCP_CKSUM) ||
 495                 (rx_offloads & DEV_RX_OFFLOAD_SCTP_CKSUM))
 496                 rx_l4_csum_offload = true;
 497
 498         ret = dpni_set_offload(dpni, CMD_PRI_LOW, priv->token,
 499                                DPNI_OFF_RX_L3_CSUM, rx_l3_csum_offload);
 500         if (ret) {
 501                 DPAA2_PMD_ERR("Error to set RX l3 csum:Error = %d", ret);
 502                 return ret;
 503         }
 504
 505         ret = dpni_set_offload(dpni, CMD_PRI_LOW, priv->token,
 506                                DPNI_OFF_RX_L4_CSUM, rx_l4_csum_offload);
 507         if (ret) {
 508                 DPAA2_PMD_ERR("Error to get RX l4 csum:Error = %d", ret);
 509                 return ret;
 510         }
 511
 512         if (rx_offloads & DEV_RX_OFFLOAD_TIMESTAMP)
 513                 dpaa2_enable_ts = true;
 514
 515         if (tx_offloads & DEV_TX_OFFLOAD_IPV4_CKSUM)
 516                 tx_l3_csum_offload = true;
 517
 518         if ((tx_offloads & DEV_TX_OFFLOAD_UDP_CKSUM) ||
 519                 (tx_offloads & DEV_TX_OFFLOAD_TCP_CKSUM) ||
 520                 (tx_offloads & DEV_TX_OFFLOAD_SCTP_CKSUM))
 521                 tx_l4_csum_offload = true;
 522
 523         ret = dpni_set_offload(dpni, CMD_PRI_LOW, priv->token,
 524                                DPNI_OFF_TX_L3_CSUM, tx_l3_csum_offload);
 525         if (ret) {
 526                 DPAA2_PMD_ERR("Error to set TX l3 csum:Error = %d", ret);
 527                 return ret;
 528         }
 529
 530         ret = dpni_set_offload(dpni, CMD_PRI_LOW, priv->token,
 531                                DPNI_OFF_TX_L4_CSUM, tx_l4_csum_offload);
 532         if (ret) {
 533                 DPAA2_PMD_ERR("Error to get TX l4 csum:Error = %d", ret);
 534                 return ret;
 535         }
 536
 537         /* Enabling hash results in FD requires setting DPNI_FLCTYPE_HASH in
 538          * dpni_set_offload API. Setting this FLCTYPE for DPNI sets the FD[SC]
 539          * to 0 for LS2 in the hardware thus disabling data/annotation
 540          * stashing. For LX2 this is fixed in hardware and thus hash result and
 541          * parse results can be received in FD using this option.
 542          */
 543         if (dpaa2_svr_family == SVR_LX2160A) {
 544                 ret = dpni_set_offload(dpni, CMD_PRI_LOW, priv->token,
 545                                        DPNI_FLCTYPE_HASH, true);
 546                 if (ret) {
 547                         DPAA2_PMD_ERR("Error setting FLCTYPE: Err = %d", ret);
 548                         return ret;
 549                 }
 550         }
 551
 552         if (rx_offloads & DEV_RX_OFFLOAD_VLAN_FILTER)
 553                 dpaa2_vlan_offload_set(dev, ETH_VLAN_FILTER_MASK);
 554
 555         /* update the current status */
 556         dpaa2_dev_link_update(dev, 0);
 557
 558         return 0;
 559 }
 560
 561 /* Function to setup RX flow information. It contains traffic class ID,
 562  * flow ID, destination configuration etc.
 563  */
 564 static int
 565 dpaa2_dev_rx_queue_setup(struct rte_eth_dev *dev,
 566                          uint16_t rx_queue_id,
 567                          uint16_t nb_rx_desc,
 568                          unsigned int socket_id __rte_unused,
 569                          const struct rte_eth_rxconf *rx_conf __rte_unused,
 570                          struct rte_mempool *mb_pool)
 571 {
 572         struct dpaa2_dev_priv *priv = dev->data->dev_private;
 573         struct fsl_mc_io *dpni = (struct fsl_mc_io *)priv->hw;
 574         struct dpaa2_queue *dpaa2_q;
 575         struct dpni_queue cfg;
 576         uint8_t options = 0;
 577         uint8_t flow_id;
 578         uint32_t bpid;
 579         int i, ret;
 580
 581         PMD_INIT_FUNC_TRACE();
 582
 583         DPAA2_PMD_DEBUG("dev =%p, queue =%d, pool = %p, conf =%p",
 584                         dev, rx_queue_id, mb_pool, rx_conf);
 585
 586         if (!priv->bp_list || priv->bp_list->mp != mb_pool) {
 587                 bpid = mempool_to_bpid(mb_pool);
 588                 ret = dpaa2_attach_bp_list(priv,
 589                                            rte_dpaa2_bpid_info[bpid].bp_list);
 590                 if (ret)
 591                         return ret;
 592         }
 593         dpaa2_q = (struct dpaa2_queue *)priv->rx_vq[rx_queue_id];
 594         dpaa2_q->mb_pool = mb_pool; /**< mbuf pool to populate RX ring. */
 595         dpaa2_q->bp_array = rte_dpaa2_bpid_info;
 596
 597         /*Get the flow id from given VQ id*/
 598         flow_id = dpaa2_q->flow_id;
 599         memset(&cfg, 0, sizeof(struct dpni_queue));
 600
 601         options = options | DPNI_QUEUE_OPT_USER_CTX;
 602         cfg.user_context = (size_t)(dpaa2_q);
 603
 604         /* check if a private cgr available. */
 605         for (i = 0; i < priv->max_cgs; i++) {
 606                 if (!priv->cgid_in_use[i]) {
 607                         priv->cgid_in_use[i] = 1;
 608                         break;
 609                 }
 610         }
 611
 612         if (i < priv->max_cgs) {
 613                 options |= DPNI_QUEUE_OPT_SET_CGID;
 614                 cfg.cgid = i;
 615                 dpaa2_q->cgid = cfg.cgid;
 616         } else {
 617                 dpaa2_q->cgid = 0xff;
 618         }
 619
 620         /*if ls2088 or rev2 device, enable the stashing */
 621
 622         if ((dpaa2_svr_family & 0xffff0000) != SVR_LS2080A) {
 623                 options |= DPNI_QUEUE_OPT_FLC;
 624                 cfg.flc.stash_control = true;
 625                 cfg.flc.value &= 0xFFFFFFFFFFFFFFC0;
 626                 /* 00 00 00 - last 6 bit represent annotation, context stashing,
 627                  * data stashing setting 01 01 00 (0x14)
 628                  * (in following order ->DS AS CS)
 629                  * to enable 1 line data, 1 line annotation.
 630                  * For LX2, this setting should be 01 00 00 (0x10)
 631                  */
 632                 if ((dpaa2_svr_family & 0xffff0000) == SVR_LX2160A)
 633                         cfg.flc.value |= 0x10;
 634                 else
 635                         cfg.flc.value |= 0x14;
 636         }
 637         ret = dpni_set_queue(dpni, CMD_PRI_LOW, priv->token, DPNI_QUEUE_RX,
 638                              dpaa2_q->tc_index, flow_id, options, &cfg);
 639         if (ret) {
 640                 DPAA2_PMD_ERR("Error in setting the rx flow: = %d", ret);
 641                 return -1;
 642         }
 643
 644         if (!(priv->flags & DPAA2_RX_TAILDROP_OFF)) {
 645                 struct dpni_taildrop taildrop;
 646
 647                 taildrop.enable = 1;
 648
 649                 /* Private CGR will use tail drop length as nb_rx_desc.
 650                  * for rest cases we can use standard byte based tail drop.
 651                  * There is no HW restriction, but number of CGRs are limited,
 652                  * hence this restriction is placed.
 653                  */
 654                 if (dpaa2_q->cgid != 0xff) {
 655                         /*enabling per rx queue congestion control */
 656                         taildrop.threshold = nb_rx_desc;
 657                         taildrop.units = DPNI_CONGESTION_UNIT_FRAMES;
 658                         taildrop.oal = 0;
 659                         DPAA2_PMD_DEBUG("Enabling CG Tail Drop on queue = %d",
 660                                         rx_queue_id);
 661                         ret = dpni_set_taildrop(dpni, CMD_PRI_LOW, priv->token,
 662                                                 DPNI_CP_CONGESTION_GROUP,
 663                                                 DPNI_QUEUE_RX,
 664                                                 dpaa2_q->tc_index,
 665                                                 flow_id, &taildrop);
 666                 } else {
 667                         /*enabling per rx queue congestion control */
 668                         taildrop.threshold = CONG_THRESHOLD_RX_BYTES_Q;
 669                         taildrop.units = DPNI_CONGESTION_UNIT_BYTES;
 670                         taildrop.oal = CONG_RX_OAL;
 671                         DPAA2_PMD_DEBUG("Enabling Byte based Drop on queue= %d",
 672                                         rx_queue_id);
 673                         ret = dpni_set_taildrop(dpni, CMD_PRI_LOW, priv->token,
 674                                                 DPNI_CP_QUEUE, DPNI_QUEUE_RX,
 675                                                 dpaa2_q->tc_index, flow_id,
 676                                                 &taildrop);
 677                 }
 678                 if (ret) {
 679                         DPAA2_PMD_ERR("Error in setting taildrop. err=(%d)",
 680                                       ret);
 681                         return -1;
 682                 }
 683         } else { /* Disable tail Drop */
 684                 struct dpni_taildrop taildrop = {0};
 685                 DPAA2_PMD_INFO("Tail drop is disabled on queue");
 686
 687                 taildrop.enable = 0;
 688                 if (dpaa2_q->cgid != 0xff) {
 689                         ret = dpni_set_taildrop(dpni, CMD_PRI_LOW, priv->token,
 690                                         DPNI_CP_CONGESTION_GROUP, DPNI_QUEUE_RX,
 691                                         dpaa2_q->tc_index,
 692                                         flow_id, &taildrop);
 693                 } else {
 694                         ret = dpni_set_taildrop(dpni, CMD_PRI_LOW, priv->token,
 695                                         DPNI_CP_QUEUE, DPNI_QUEUE_RX,
 696                                         dpaa2_q->tc_index, flow_id, &taildrop);
 697                 }
 698                 if (ret) {
 699                         DPAA2_PMD_ERR("Error in setting taildrop. err=(%d)",
 700                                       ret);
 701                         return -1;
 702                 }
 703         }
 704
 705         dev->data->rx_queues[rx_queue_id] = dpaa2_q;
 706         return 0;
 707 }
 708
 709 static int
 710 dpaa2_dev_tx_queue_setup(struct rte_eth_dev *dev,
 711                          uint16_t tx_queue_id,
 712                          uint16_t nb_tx_desc __rte_unused,
 713                          unsigned int socket_id __rte_unused,
 714                          const struct rte_eth_txconf *tx_conf __rte_unused)
 715 {
 716         struct dpaa2_dev_priv *priv = dev->data->dev_private;
 717         struct dpaa2_queue *dpaa2_q = (struct dpaa2_queue *)
 718                 priv->tx_vq[tx_queue_id];
 719         struct dpaa2_queue *dpaa2_tx_conf_q = (struct dpaa2_queue *)
 720                 priv->tx_conf_vq[tx_queue_id];
 721         struct fsl_mc_io *dpni = priv->hw;
 722         struct dpni_queue tx_conf_cfg;
 723         struct dpni_queue tx_flow_cfg;
 724         uint8_t options = 0, flow_id;
 725         struct dpni_queue_id qid;
 726         uint32_t tc_id;
 727         int ret;
 728
 729         PMD_INIT_FUNC_TRACE();
 730
 731         /* Return if queue already configured */
 732         if (dpaa2_q->flow_id != 0xffff) {
 733                 dev->data->tx_queues[tx_queue_id] = dpaa2_q;
 734                 return 0;
 735         }
 736
 737         memset(&tx_conf_cfg, 0, sizeof(struct dpni_queue));
 738         memset(&tx_flow_cfg, 0, sizeof(struct dpni_queue));
 739
 740         tc_id = tx_queue_id;
 741         flow_id = 0;
 742
 743         ret = dpni_set_queue(dpni, CMD_PRI_LOW, priv->token, DPNI_QUEUE_TX,
 744                              tc_id, flow_id, options, &tx_flow_cfg);
 745         if (ret) {
 746                 DPAA2_PMD_ERR("Error in setting the tx flow: "
 747                               "tc_id=%d, flow=%d err=%d",
 748                               tc_id, flow_id, ret);
 749                         return -1;
 750         }
 751
 752         dpaa2_q->flow_id = flow_id;
 753
 754         if (tx_queue_id == 0) {
 755                 /*Set tx-conf and error configuration*/
 756                 if (priv->tx_conf_en)
 757                         ret = dpni_set_tx_confirmation_mode(dpni, CMD_PRI_LOW,
 758                                                             priv->token,
 759                                                             DPNI_CONF_AFFINE);
 760                 else
 761                         ret = dpni_set_tx_confirmation_mode(dpni, CMD_PRI_LOW,
 762                                                             priv->token,
 763                                                             DPNI_CONF_DISABLE);
 764                 if (ret) {
 765                         DPAA2_PMD_ERR("Error in set tx conf mode settings: "
 766                                       "err=%d", ret);
 767                         return -1;
 768                 }
 769         }
 770         dpaa2_q->tc_index = tc_id;
 771
 772         ret = dpni_get_queue(dpni, CMD_PRI_LOW, priv->token,
 773                              DPNI_QUEUE_TX, dpaa2_q->tc_index,
 774                              dpaa2_q->flow_id, &tx_flow_cfg, &qid);
 775         if (ret) {
 776                 DPAA2_PMD_ERR("Error in getting LFQID err=%d", ret);
 777                 return -1;
 778         }
 779         dpaa2_q->fqid = qid.fqid;
 780
 781         if (!(priv->flags & DPAA2_TX_CGR_OFF)) {
 782                 struct dpni_congestion_notification_cfg cong_notif_cfg = {0};
 783
 784                 cong_notif_cfg.units = DPNI_CONGESTION_UNIT_FRAMES;
 785                 cong_notif_cfg.threshold_entry = CONG_ENTER_TX_THRESHOLD;
 786                 /* Notify that the queue is not congested when the data in
 787                  * the queue is below this thershold.
 788                  */
 789                 cong_notif_cfg.threshold_exit = CONG_EXIT_TX_THRESHOLD;
 790                 cong_notif_cfg.message_ctx = 0;
 791                 cong_notif_cfg.message_iova =
 792                                 (size_t)DPAA2_VADDR_TO_IOVA(dpaa2_q->cscn);
 793                 cong_notif_cfg.dest_cfg.dest_type = DPNI_DEST_NONE;
 794                 cong_notif_cfg.notification_mode =
 795                                          DPNI_CONG_OPT_WRITE_MEM_ON_ENTER |
 796                                          DPNI_CONG_OPT_WRITE_MEM_ON_EXIT |
 797                                          DPNI_CONG_OPT_COHERENT_WRITE;
 798                 cong_notif_cfg.cg_point = DPNI_CP_QUEUE;
 799
 800                 ret = dpni_set_congestion_notification(dpni, CMD_PRI_LOW,
 801                                                        priv->token,
 802                                                        DPNI_QUEUE_TX,
 803                                                        tc_id,
 804                                                        &cong_notif_cfg);
 805                 if (ret) {
 806                         DPAA2_PMD_ERR(
 807                            "Error in setting tx congestion notification: "
 808                            "err=%d", ret);
 809                         return -ret;
 810                 }
 811         }
 812         dpaa2_q->cb_eqresp_free = dpaa2_dev_free_eqresp_buf;
 813         dev->data->tx_queues[tx_queue_id] = dpaa2_q;
 814
 815         if (priv->tx_conf_en) {
 816                 dpaa2_q->tx_conf_queue = dpaa2_tx_conf_q;
 817                 options = options | DPNI_QUEUE_OPT_USER_CTX;
 818                 tx_conf_cfg.user_context = (size_t)(dpaa2_q);
 819                 ret = dpni_set_queue(dpni, CMD_PRI_LOW, priv->token,
 820                              DPNI_QUEUE_TX_CONFIRM, dpaa2_tx_conf_q->tc_index,
 821                              dpaa2_tx_conf_q->flow_id, options, &tx_conf_cfg);
 822                 if (ret) {
 823                         DPAA2_PMD_ERR("Error in setting the tx conf flow: "
 824                               "tc_index=%d, flow=%d err=%d",
 825                               dpaa2_tx_conf_q->tc_index,
 826                               dpaa2_tx_conf_q->flow_id, ret);
 827                         return -1;
 828                 }
 829
 830                 ret = dpni_get_queue(dpni, CMD_PRI_LOW, priv->token,
 831                              DPNI_QUEUE_TX_CONFIRM, dpaa2_tx_conf_q->tc_index,
 832                              dpaa2_tx_conf_q->flow_id, &tx_conf_cfg, &qid);
 833                 if (ret) {
 834                         DPAA2_PMD_ERR("Error in getting LFQID err=%d", ret);
 835                         return -1;
 836                 }
 837                 dpaa2_tx_conf_q->fqid = qid.fqid;
 838         }
 839         return 0;
 840 }
 841
 842 static void
 843 dpaa2_dev_rx_queue_release(void *q __rte_unused)
 844 {
 845         struct dpaa2_queue *dpaa2_q = (struct dpaa2_queue *)q;
 846         struct dpaa2_dev_priv *priv = dpaa2_q->eth_data->dev_private;
 847         struct fsl_mc_io *dpni = (struct fsl_mc_io *)priv->hw;
 848         uint8_t options = 0;
 849         int ret;
 850         struct dpni_queue cfg;
 851
 852         memset(&cfg, 0, sizeof(struct dpni_queue));
 853         PMD_INIT_FUNC_TRACE();
 854         if (dpaa2_q->cgid != 0xff) {
 855                 options = DPNI_QUEUE_OPT_CLEAR_CGID;
 856                 cfg.cgid = dpaa2_q->cgid;
 857
 858                 ret = dpni_set_queue(dpni, CMD_PRI_LOW, priv->token,
 859                                      DPNI_QUEUE_RX,
 860                                      dpaa2_q->tc_index, dpaa2_q->flow_id,
 861                                      options, &cfg);
 862                 if (ret)
 863                         DPAA2_PMD_ERR("Unable to clear CGR from q=%u err=%d",
 864                                         dpaa2_q->fqid, ret);
 865                 priv->cgid_in_use[dpaa2_q->cgid] = 0;
 866                 dpaa2_q->cgid = 0xff;
 867         }
 868 }
 869
 870 static void
 871 dpaa2_dev_tx_queue_release(void *q __rte_unused)
 872 {
 873         PMD_INIT_FUNC_TRACE();
 874 }
 875
 876 static uint32_t
 877 dpaa2_dev_rx_queue_count(struct rte_eth_dev *dev, uint16_t rx_queue_id)
 878 {
 879         int32_t ret;
 880         struct dpaa2_dev_priv *priv = dev->data->dev_private;
 881         struct dpaa2_queue *dpaa2_q;
 882         struct qbman_swp *swp;
 883         struct qbman_fq_query_np_rslt state;
 884         uint32_t frame_cnt = 0;
 885
 886         PMD_INIT_FUNC_TRACE();
 887
 888         if (unlikely(!DPAA2_PER_LCORE_DPIO)) {
 889                 ret = dpaa2_affine_qbman_swp();
 890                 if (ret) {
 891                         DPAA2_PMD_ERR("Failure in affining portal");
 892                         return -EINVAL;
 893                 }
 894         }
 895         swp = DPAA2_PER_LCORE_PORTAL;
 896
 897         dpaa2_q = (struct dpaa2_queue *)priv->rx_vq[rx_queue_id];
 898
 899         if (qbman_fq_query_state(swp, dpaa2_q->fqid, &state) == 0) {
 900                 frame_cnt = qbman_fq_state_frame_count(&state);
 901                 DPAA2_PMD_DEBUG("RX frame count for q(%d) is %u",
 902                                 rx_queue_id, frame_cnt);
 903         }
 904         return frame_cnt;
 905 }
 906
 907 static const uint32_t *
 908 dpaa2_supported_ptypes_get(struct rte_eth_dev *dev)
 909 {
 910         static const uint32_t ptypes[] = {
 911                 /*todo -= add more types */
 912                 RTE_PTYPE_L2_ETHER,
 913                 RTE_PTYPE_L3_IPV4,
 914                 RTE_PTYPE_L3_IPV4_EXT,
 915                 RTE_PTYPE_L3_IPV6,
 916                 RTE_PTYPE_L3_IPV6_EXT,
 917                 RTE_PTYPE_L4_TCP,
 918                 RTE_PTYPE_L4_UDP,
 919                 RTE_PTYPE_L4_SCTP,
 920                 RTE_PTYPE_L4_ICMP,
 921                 RTE_PTYPE_UNKNOWN
 922         };
 923
 924         if (dev->rx_pkt_burst == dpaa2_dev_prefetch_rx ||
 925                 dev->rx_pkt_burst == dpaa2_dev_rx ||
 926                 dev->rx_pkt_burst == dpaa2_dev_loopback_rx)
 927                 return ptypes;
 928         return NULL;
 929 }
 930
 931 /**
 932  * Dpaa2 link Interrupt handler
 933  *
 934  * @param param
 935  *  The address of parameter (struct rte_eth_dev *) regsitered before.
 936  *
 937  * @return
 938  *  void
 939  */
 940 static void
 941 dpaa2_interrupt_handler(void *param)
 942 {
 943         struct rte_eth_dev *dev = param;
 944         struct dpaa2_dev_priv *priv = dev->data->dev_private;
 945         struct fsl_mc_io *dpni = (struct fsl_mc_io *)priv->hw;
 946         int ret;
 947         int irq_index = DPNI_IRQ_INDEX;
 948         unsigned int status = 0, clear = 0;
 949
 950         PMD_INIT_FUNC_TRACE();
 951
 952         if (dpni == NULL) {
 953                 DPAA2_PMD_ERR("dpni is NULL");
 954                 return;
 955         }
 956
 957         ret = dpni_get_irq_status(dpni, CMD_PRI_LOW, priv->token,
 958                                   irq_index, &status);
 959         if (unlikely(ret)) {
 960                 DPAA2_PMD_ERR("Can't get irq status (err %d)", ret);
 961                 clear = 0xffffffff;
 962                 goto out;
 963         }
 964
 965         if (status & DPNI_IRQ_EVENT_LINK_CHANGED) {
 966                 clear = DPNI_IRQ_EVENT_LINK_CHANGED;
 967                 dpaa2_dev_link_update(dev, 0);
 968                 /* calling all the apps registered for link status event */
 969                 _rte_eth_dev_callback_process(dev, RTE_ETH_EVENT_INTR_LSC,
 970                                               NULL);
 971         }
 972 out:
 973         ret = dpni_clear_irq_status(dpni, CMD_PRI_LOW, priv->token,
 974                                     irq_index, clear);
 975         if (unlikely(ret))
 976                 DPAA2_PMD_ERR("Can't clear irq status (err %d)", ret);
 977 }
 978
 979 static int
 980 dpaa2_eth_setup_irqs(struct rte_eth_dev *dev, int enable)
 981 {
 982         int err = 0;
 983         struct dpaa2_dev_priv *priv = dev->data->dev_private;
 984         struct fsl_mc_io *dpni = (struct fsl_mc_io *)priv->hw;
 985         int irq_index = DPNI_IRQ_INDEX;
 986         unsigned int mask = DPNI_IRQ_EVENT_LINK_CHANGED;
 987
 988         PMD_INIT_FUNC_TRACE();
 989
 990         err = dpni_set_irq_mask(dpni, CMD_PRI_LOW, priv->token,
 991                                 irq_index, mask);
 992         if (err < 0) {
 993                 DPAA2_PMD_ERR("Error: dpni_set_irq_mask():%d (%s)", err,
 994                               strerror(-err));
 995                 return err;
 996         }
 997
 998         err = dpni_set_irq_enable(dpni, CMD_PRI_LOW, priv->token,
 999                                   irq_index, enable);
1000         if (err < 0)
1001                 DPAA2_PMD_ERR("Error: dpni_set_irq_enable():%d (%s)", err,
1002                               strerror(-err));
1003
1004         return err;
1005 }
1006
1007 static int
1008 dpaa2_dev_start(struct rte_eth_dev *dev)
1009 {
1010         struct rte_device *rdev = dev->device;
1011         struct rte_dpaa2_device *dpaa2_dev;
1012         struct rte_eth_dev_data *data = dev->data;
1013         struct dpaa2_dev_priv *priv = data->dev_private;
1014         struct fsl_mc_io *dpni = (struct fsl_mc_io *)priv->hw;
1015         struct dpni_queue cfg;
1016         struct dpni_error_cfg   err_cfg;
1017         uint16_t qdid;
1018         struct dpni_queue_id qid;
1019         struct dpaa2_queue *dpaa2_q;
1020         int ret, i;
1021         struct rte_intr_handle *intr_handle;
1022
1023         dpaa2_dev = container_of(rdev, struct rte_dpaa2_device, device);
1024         intr_handle = &dpaa2_dev->intr_handle;
1025
1026         PMD_INIT_FUNC_TRACE();
1027
1028         ret = dpni_enable(dpni, CMD_PRI_LOW, priv->token);
1029         if (ret) {
1030                 DPAA2_PMD_ERR("Failure in enabling dpni %d device: err=%d",
1031                               priv->hw_id, ret);
1032                 return ret;
1033         }
1034
1035         /* Power up the phy. Needed to make the link go UP */
1036         dpaa2_dev_set_link_up(dev);
1037
1038         ret = dpni_get_qdid(dpni, CMD_PRI_LOW, priv->token,
1039                             DPNI_QUEUE_TX, &qdid);
1040         if (ret) {
1041                 DPAA2_PMD_ERR("Error in getting qdid: err=%d", ret);
1042                 return ret;
1043         }
1044         priv->qdid = qdid;
1045
1046         for (i = 0; i < data->nb_rx_queues; i++) {
1047                 dpaa2_q = (struct dpaa2_queue *)data->rx_queues[i];
1048                 ret = dpni_get_queue(dpni, CMD_PRI_LOW, priv->token,
1049                                      DPNI_QUEUE_RX, dpaa2_q->tc_index,
1050                                        dpaa2_q->flow_id, &cfg, &qid);
1051                 if (ret) {
1052                         DPAA2_PMD_ERR("Error in getting flow information: "
1053                                       "err=%d", ret);
1054                         return ret;
1055                 }
1056                 dpaa2_q->fqid = qid.fqid;
1057         }
1058
1059         /*checksum errors, send them to normal path and set it in annotation */
1060         err_cfg.errors = DPNI_ERROR_L3CE | DPNI_ERROR_L4CE;
1061         err_cfg.errors |= DPNI_ERROR_PHE;
1062
1063         err_cfg.error_action = DPNI_ERROR_ACTION_CONTINUE;
1064         err_cfg.set_frame_annotation = true;
1065
1066         ret = dpni_set_errors_behavior(dpni, CMD_PRI_LOW,
1067                                        priv->token, &err_cfg);
1068         if (ret) {
1069                 DPAA2_PMD_ERR("Error to dpni_set_errors_behavior: code = %d",
1070                               ret);
1071                 return ret;
1072         }
1073
1074         /* if the interrupts were configured on this devices*/
1075         if (intr_handle && (intr_handle->fd) &&
1076             (dev->data->dev_conf.intr_conf.lsc != 0)) {
1077                 /* Registering LSC interrupt handler */
1078                 rte_intr_callback_register(intr_handle,
1079                                            dpaa2_interrupt_handler,
1080                                            (void *)dev);
1081
1082                 /* enable vfio intr/eventfd mapping
1083                  * Interrupt index 0 is required, so we can not use
1084                  * rte_intr_enable.
1085                  */
1086                 rte_dpaa2_intr_enable(intr_handle, DPNI_IRQ_INDEX);
1087
1088                 /* enable dpni_irqs */
1089                 dpaa2_eth_setup_irqs(dev, 1);
1090         }
1091
1092         /* Change the tx burst function if ordered queues are used */
1093         if (priv->en_ordered)
1094                 dev->tx_pkt_burst = dpaa2_dev_tx_ordered;
1095
1096         return 0;
1097 }
1098
1099 /**
1100  *  This routine disables all traffic on the adapter by issuing a
1101  *  global reset on the MAC.
1102  */
1103 static void
1104 dpaa2_dev_stop(struct rte_eth_dev *dev)
1105 {
1106         struct dpaa2_dev_priv *priv = dev->data->dev_private;
1107         struct fsl_mc_io *dpni = (struct fsl_mc_io *)priv->hw;
1108         int ret;
1109         struct rte_eth_link link;
1110         struct rte_intr_handle *intr_handle = dev->intr_handle;
1111
1112         PMD_INIT_FUNC_TRACE();
1113
1114         /* reset interrupt callback  */
1115         if (intr_handle && (intr_handle->fd) &&
1116             (dev->data->dev_conf.intr_conf.lsc != 0)) {
1117                 /*disable dpni irqs */
1118                 dpaa2_eth_setup_irqs(dev, 0);
1119
1120                 /* disable vfio intr before callback unregister */
1121                 rte_dpaa2_intr_disable(intr_handle, DPNI_IRQ_INDEX);
1122
1123                 /* Unregistering LSC interrupt handler */
1124                 rte_intr_callback_unregister(intr_handle,
1125                                              dpaa2_interrupt_handler,
1126                                              (void *)dev);
1127         }
1128
1129         dpaa2_dev_set_link_down(dev);
1130
1131         ret = dpni_disable(dpni, CMD_PRI_LOW, priv->token);
1132         if (ret) {
1133                 DPAA2_PMD_ERR("Failure (ret %d) in disabling dpni %d dev",
1134                               ret, priv->hw_id);
1135                 return;
1136         }
1137
1138         /* clear the recorded link status */
1139         memset(&link, 0, sizeof(link));
1140         rte_eth_linkstatus_set(dev, &link);
1141 }
1142
1143 static void
1144 dpaa2_dev_close(struct rte_eth_dev *dev)
1145 {
1146         struct dpaa2_dev_priv *priv = dev->data->dev_private;
1147         struct fsl_mc_io *dpni = (struct fsl_mc_io *)priv->hw;
1148         int ret;
1149         struct rte_eth_link link;
1150
1151         PMD_INIT_FUNC_TRACE();
1152
1153         dpaa2_flow_clean(dev);
1154
1155         /* Clean the device first */
1156         ret = dpni_reset(dpni, CMD_PRI_LOW, priv->token);
1157         if (ret) {
1158                 DPAA2_PMD_ERR("Failure cleaning dpni device: err=%d", ret);
1159                 return;
1160         }
1161
1162         memset(&link, 0, sizeof(link));
1163         rte_eth_linkstatus_set(dev, &link);
1164 }
1165
1166 static int
1167 dpaa2_dev_promiscuous_enable(
1168                 struct rte_eth_dev *dev)
1169 {
1170         int ret;
1171         struct dpaa2_dev_priv *priv = dev->data->dev_private;
1172         struct fsl_mc_io *dpni = (struct fsl_mc_io *)priv->hw;
1173
1174         PMD_INIT_FUNC_TRACE();
1175
1176         if (dpni == NULL) {
1177                 DPAA2_PMD_ERR("dpni is NULL");
1178                 return -ENODEV;
1179         }
1180
1181         ret = dpni_set_unicast_promisc(dpni, CMD_PRI_LOW, priv->token, true);
1182         if (ret < 0)
1183                 DPAA2_PMD_ERR("Unable to enable U promisc mode %d", ret);
1184
1185         ret = dpni_set_multicast_promisc(dpni, CMD_PRI_LOW, priv->token, true);
1186         if (ret < 0)
1187                 DPAA2_PMD_ERR("Unable to enable M promisc mode %d", ret);
1188
1189         return ret;
1190 }
1191
1192 static int
1193 dpaa2_dev_promiscuous_disable(
1194                 struct rte_eth_dev *dev)
1195 {
1196         int ret;
1197         struct dpaa2_dev_priv *priv = dev->data->dev_private;
1198         struct fsl_mc_io *dpni = (struct fsl_mc_io *)priv->hw;
1199
1200         PMD_INIT_FUNC_TRACE();
1201
1202         if (dpni == NULL) {
1203                 DPAA2_PMD_ERR("dpni is NULL");
1204                 return -ENODEV;
1205         }
1206
1207         ret = dpni_set_unicast_promisc(dpni, CMD_PRI_LOW, priv->token, false);
1208         if (ret < 0)
1209                 DPAA2_PMD_ERR("Unable to disable U promisc mode %d", ret);
1210
1211         if (dev->data->all_multicast == 0) {
1212                 ret = dpni_set_multicast_promisc(dpni, CMD_PRI_LOW,
1213                                                  priv->token, false);
1214                 if (ret < 0)
1215                         DPAA2_PMD_ERR("Unable to disable M promisc mode %d",
1216                                       ret);
1217         }
1218
1219         return ret;
1220 }
1221
1222 static int
1223 dpaa2_dev_allmulticast_enable(
1224                 struct rte_eth_dev *dev)
1225 {
1226         int ret;
1227         struct dpaa2_dev_priv *priv = dev->data->dev_private;
1228         struct fsl_mc_io *dpni = (struct fsl_mc_io *)priv->hw;
1229
1230         PMD_INIT_FUNC_TRACE();
1231
1232         if (dpni == NULL) {
1233                 DPAA2_PMD_ERR("dpni is NULL");
1234                 return -ENODEV;
1235         }
1236
1237         ret = dpni_set_multicast_promisc(dpni, CMD_PRI_LOW, priv->token, true);
1238         if (ret < 0)
1239                 DPAA2_PMD_ERR("Unable to enable multicast mode %d", ret);
1240
1241         return ret;
1242 }
1243
1244 static int
1245 dpaa2_dev_allmulticast_disable(struct rte_eth_dev *dev)
1246 {
1247         int ret;
1248         struct dpaa2_dev_priv *priv = dev->data->dev_private;
1249         struct fsl_mc_io *dpni = (struct fsl_mc_io *)priv->hw;
1250
1251         PMD_INIT_FUNC_TRACE();
1252
1253         if (dpni == NULL) {
1254                 DPAA2_PMD_ERR("dpni is NULL");
1255                 return -ENODEV;
1256         }
1257
1258         /* must remain on for all promiscuous */
1259         if (dev->data->promiscuous == 1)
1260                 return 0;
1261
1262         ret = dpni_set_multicast_promisc(dpni, CMD_PRI_LOW, priv->token, false);
1263         if (ret < 0)
1264                 DPAA2_PMD_ERR("Unable to disable multicast mode %d", ret);
1265
1266         return ret;
1267 }
1268
1269 static int
1270 dpaa2_dev_mtu_set(struct rte_eth_dev *dev, uint16_t mtu)
1271 {
1272         int ret;
1273         struct dpaa2_dev_priv *priv = dev->data->dev_private;
1274         struct fsl_mc_io *dpni = (struct fsl_mc_io *)priv->hw;
1275         uint32_t frame_size = mtu + RTE_ETHER_HDR_LEN + RTE_ETHER_CRC_LEN
1276                                 + VLAN_TAG_SIZE;
1277
1278         PMD_INIT_FUNC_TRACE();
1279
1280         if (dpni == NULL) {
1281                 DPAA2_PMD_ERR("dpni is NULL");
1282                 return -EINVAL;
1283         }
1284
1285         /* check that mtu is within the allowed range */
1286         if (mtu < RTE_ETHER_MIN_MTU || frame_size > DPAA2_MAX_RX_PKT_LEN)
1287                 return -EINVAL;
1288
1289         if (frame_size > RTE_ETHER_MAX_LEN)
1290                 dev->data->dev_conf.rxmode.offloads &=
1291                                                 DEV_RX_OFFLOAD_JUMBO_FRAME;
1292         else
1293                 dev->data->dev_conf.rxmode.offloads &=
1294                                                 ~DEV_RX_OFFLOAD_JUMBO_FRAME;
1295
1296         dev->data->dev_conf.rxmode.max_rx_pkt_len = frame_size;
1297
1298         /* Set the Max Rx frame length as 'mtu' +
1299          * Maximum Ethernet header length
1300          */
1301         ret = dpni_set_max_frame_length(dpni, CMD_PRI_LOW, priv->token,
1302                                         frame_size - RTE_ETHER_CRC_LEN);
1303         if (ret) {
1304                 DPAA2_PMD_ERR("Setting the max frame length failed");
1305                 return -1;
1306         }
1307         DPAA2_PMD_INFO("MTU configured for the device: %d", mtu);
1308         return 0;
1309 }
1310
1311 static int
1312 dpaa2_dev_add_mac_addr(struct rte_eth_dev *dev,
1313                        struct rte_ether_addr *addr,
1314                        __rte_unused uint32_t index,
1315                        __rte_unused uint32_t pool)
1316 {
1317         int ret;
1318         struct dpaa2_dev_priv *priv = dev->data->dev_private;
1319         struct fsl_mc_io *dpni = (struct fsl_mc_io *)priv->hw;
1320
1321         PMD_INIT_FUNC_TRACE();
1322
1323         if (dpni == NULL) {
1324                 DPAA2_PMD_ERR("dpni is NULL");
1325                 return -1;
1326         }
1327
1328         ret = dpni_add_mac_addr(dpni, CMD_PRI_LOW,
1329                                 priv->token, addr->addr_bytes);
1330         if (ret)
1331                 DPAA2_PMD_ERR(
1332                         "error: Adding the MAC ADDR failed: err = %d", ret);
1333         return 0;
1334 }
1335
1336 static void
1337 dpaa2_dev_remove_mac_addr(struct rte_eth_dev *dev,
1338                           uint32_t index)
1339 {
1340         int ret;
1341         struct dpaa2_dev_priv *priv = dev->data->dev_private;
1342         struct fsl_mc_io *dpni = (struct fsl_mc_io *)priv->hw;
1343         struct rte_eth_dev_data *data = dev->data;
1344         struct rte_ether_addr *macaddr;
1345
1346         PMD_INIT_FUNC_TRACE();
1347
1348         macaddr = &data->mac_addrs[index];
1349
1350         if (dpni == NULL) {
1351                 DPAA2_PMD_ERR("dpni is NULL");
1352                 return;
1353         }
1354
1355         ret = dpni_remove_mac_addr(dpni, CMD_PRI_LOW,
1356                                    priv->token, macaddr->addr_bytes);
1357         if (ret)
1358                 DPAA2_PMD_ERR(
1359                         "error: Removing the MAC ADDR failed: err = %d", ret);
1360 }
1361
1362 static int
1363 dpaa2_dev_set_mac_addr(struct rte_eth_dev *dev,
1364                        struct rte_ether_addr *addr)
1365 {
1366         int ret;
1367         struct dpaa2_dev_priv *priv = dev->data->dev_private;
1368         struct fsl_mc_io *dpni = (struct fsl_mc_io *)priv->hw;
1369
1370         PMD_INIT_FUNC_TRACE();
1371
1372         if (dpni == NULL) {
1373                 DPAA2_PMD_ERR("dpni is NULL");
1374                 return -EINVAL;
1375         }
1376
1377         ret = dpni_set_primary_mac_addr(dpni, CMD_PRI_LOW,
1378                                         priv->token, addr->addr_bytes);
1379
1380         if (ret)
1381                 DPAA2_PMD_ERR(
1382                         "error: Setting the MAC ADDR failed %d", ret);
1383
1384         return ret;
1385 }
1386
1387 static
1388 int dpaa2_dev_stats_get(struct rte_eth_dev *dev,
1389                          struct rte_eth_stats *stats)
1390 {
1391         struct dpaa2_dev_priv *priv = dev->data->dev_private;
1392         struct fsl_mc_io *dpni = (struct fsl_mc_io *)priv->hw;
1393         int32_t  retcode;
1394         uint8_t page0 = 0, page1 = 1, page2 = 2;
1395         union dpni_statistics value;
1396         int i;
1397         struct dpaa2_queue *dpaa2_rxq, *dpaa2_txq;
1398
1399         memset(&value, 0, sizeof(union dpni_statistics));
1400
1401         PMD_INIT_FUNC_TRACE();
1402
1403         if (!dpni) {
1404                 DPAA2_PMD_ERR("dpni is NULL");
1405                 return -EINVAL;
1406         }
1407
1408         if (!stats) {
1409                 DPAA2_PMD_ERR("stats is NULL");
1410                 return -EINVAL;
1411         }
1412
1413         /*Get Counters from page_0*/
1414         retcode = dpni_get_statistics(dpni, CMD_PRI_LOW, priv->token,
1415                                       page0, 0, &value);
1416         if (retcode)
1417                 goto err;
1418
1419         stats->ipackets = value.page_0.ingress_all_frames;
1420         stats->ibytes = value.page_0.ingress_all_bytes;
1421
1422         /*Get Counters from page_1*/
1423         retcode = dpni_get_statistics(dpni, CMD_PRI_LOW, priv->token,
1424                                       page1, 0, &value);
1425         if (retcode)
1426                 goto err;
1427
1428         stats->opackets = value.page_1.egress_all_frames;
1429         stats->obytes = value.page_1.egress_all_bytes;
1430
1431         /*Get Counters from page_2*/
1432         retcode = dpni_get_statistics(dpni, CMD_PRI_LOW, priv->token,
1433                                       page2, 0, &value);
1434         if (retcode)
1435                 goto err;
1436
1437         /* Ingress drop frame count due to configured rules */
1438         stats->ierrors = value.page_2.ingress_filtered_frames;
1439         /* Ingress drop frame count due to error */
1440         stats->ierrors += value.page_2.ingress_discarded_frames;
1441
1442         stats->oerrors = value.page_2.egress_discarded_frames;
1443         stats->imissed = value.page_2.ingress_nobuffer_discards;
1444
1445         /* Fill in per queue stats */
1446         for (i = 0; (i < RTE_ETHDEV_QUEUE_STAT_CNTRS) &&
1447                 (i < priv->nb_rx_queues || i < priv->nb_tx_queues); ++i) {
1448                 dpaa2_rxq = (struct dpaa2_queue *)priv->rx_vq[i];
1449                 dpaa2_txq = (struct dpaa2_queue *)priv->tx_vq[i];
1450                 if (dpaa2_rxq)
1451                         stats->q_ipackets[i] = dpaa2_rxq->rx_pkts;
1452                 if (dpaa2_txq)
1453                         stats->q_opackets[i] = dpaa2_txq->tx_pkts;
1454
1455                 /* Byte counting is not implemented */
1456                 stats->q_ibytes[i]   = 0;
1457                 stats->q_obytes[i]   = 0;
1458         }
1459
1460         return 0;
1461
1462 err:
1463         DPAA2_PMD_ERR("Operation not completed:Error Code = %d", retcode);
1464         return retcode;
1465 };
1466
1467 static int
1468 dpaa2_dev_xstats_get(struct rte_eth_dev *dev, struct rte_eth_xstat *xstats,
1469                      unsigned int n)
1470 {
1471         struct dpaa2_dev_priv *priv = dev->data->dev_private;
1472         struct fsl_mc_io *dpni = (struct fsl_mc_io *)priv->hw;
1473         int32_t  retcode;
1474         union dpni_statistics value[5] = {};
1475         unsigned int i = 0, num = RTE_DIM(dpaa2_xstats_strings);
1476
1477         if (n < num)
1478                 return num;
1479
1480         if (xstats == NULL)
1481                 return 0;
1482
1483         /* Get Counters from page_0*/
1484         retcode = dpni_get_statistics(dpni, CMD_PRI_LOW, priv->token,
1485                                       0, 0, &value[0]);
1486         if (retcode)
1487                 goto err;
1488
1489         /* Get Counters from page_1*/
1490         retcode = dpni_get_statistics(dpni, CMD_PRI_LOW, priv->token,
1491                                       1, 0, &value[1]);
1492         if (retcode)
1493                 goto err;
1494
1495         /* Get Counters from page_2*/
1496         retcode = dpni_get_statistics(dpni, CMD_PRI_LOW, priv->token,
1497                                       2, 0, &value[2]);
1498         if (retcode)
1499                 goto err;
1500
1501         for (i = 0; i < priv->max_cgs; i++) {
1502                 if (!priv->cgid_in_use[i]) {
1503                         /* Get Counters from page_4*/
1504                         retcode = dpni_get_statistics(dpni, CMD_PRI_LOW,
1505                                                       priv->token,
1506                                                       4, 0, &value[4]);
1507                         if (retcode)
1508                                 goto err;
1509                         break;
1510                 }
1511         }
1512
1513         for (i = 0; i < num; i++) {
1514                 xstats[i].id = i;
1515                 xstats[i].value = value[dpaa2_xstats_strings[i].page_id].
1516                         raw.counter[dpaa2_xstats_strings[i].stats_id];
1517         }
1518         return i;
1519 err:
1520         DPAA2_PMD_ERR("Error in obtaining extended stats (%d)", retcode);
1521         return retcode;
1522 }
1523
1524 static int
1525 dpaa2_xstats_get_names(__rte_unused struct rte_eth_dev *dev,
1526                        struct rte_eth_xstat_name *xstats_names,
1527                        unsigned int limit)
1528 {
1529         unsigned int i, stat_cnt = RTE_DIM(dpaa2_xstats_strings);
1530
1531         if (limit < stat_cnt)
1532                 return stat_cnt;
1533
1534         if (xstats_names != NULL)
1535                 for (i = 0; i < stat_cnt; i++)
1536                         strlcpy(xstats_names[i].name,
1537                                 dpaa2_xstats_strings[i].name,
1538                                 sizeof(xstats_names[i].name));
1539
1540         return stat_cnt;
1541 }
1542
1543 static int
1544 dpaa2_xstats_get_by_id(struct rte_eth_dev *dev, const uint64_t *ids,
1545                        uint64_t *values, unsigned int n)
1546 {
1547         unsigned int i, stat_cnt = RTE_DIM(dpaa2_xstats_strings);
1548         uint64_t values_copy[stat_cnt];
1549
1550         if (!ids) {
1551                 struct dpaa2_dev_priv *priv = dev->data->dev_private;
1552                 struct fsl_mc_io *dpni = (struct fsl_mc_io *)priv->hw;
1553                 int32_t  retcode;
1554                 union dpni_statistics value[5] = {};
1555
1556                 if (n < stat_cnt)
1557                         return stat_cnt;
1558
1559                 if (!values)
1560                         return 0;
1561
1562                 /* Get Counters from page_0*/
1563                 retcode = dpni_get_statistics(dpni, CMD_PRI_LOW, priv->token,
1564                                               0, 0, &value[0]);
1565                 if (retcode)
1566                         return 0;
1567
1568                 /* Get Counters from page_1*/
1569                 retcode = dpni_get_statistics(dpni, CMD_PRI_LOW, priv->token,
1570                                               1, 0, &value[1]);
1571                 if (retcode)
1572                         return 0;
1573
1574                 /* Get Counters from page_2*/
1575                 retcode = dpni_get_statistics(dpni, CMD_PRI_LOW, priv->token,
1576                                               2, 0, &value[2]);
1577                 if (retcode)
1578                         return 0;
1579
1580                 /* Get Counters from page_4*/
1581                 retcode = dpni_get_statistics(dpni, CMD_PRI_LOW, priv->token,
1582                                               4, 0, &value[4]);
1583                 if (retcode)
1584                         return 0;
1585
1586                 for (i = 0; i < stat_cnt; i++) {
1587                         values[i] = value[dpaa2_xstats_strings[i].page_id].
1588                                 raw.counter[dpaa2_xstats_strings[i].stats_id];
1589                 }
1590                 return stat_cnt;
1591         }
1592
1593         dpaa2_xstats_get_by_id(dev, NULL, values_copy, stat_cnt);
1594
1595         for (i = 0; i < n; i++) {
1596                 if (ids[i] >= stat_cnt) {
1597                         DPAA2_PMD_ERR("xstats id value isn't valid");
1598                         return -1;
1599                 }
1600                 values[i] = values_copy[ids[i]];
1601         }
1602         return n;
1603 }
1604
1605 static int
1606 dpaa2_xstats_get_names_by_id(
1607         struct rte_eth_dev *dev,
1608         struct rte_eth_xstat_name *xstats_names,
1609         const uint64_t *ids,
1610         unsigned int limit)
1611 {
1612         unsigned int i, stat_cnt = RTE_DIM(dpaa2_xstats_strings);
1613         struct rte_eth_xstat_name xstats_names_copy[stat_cnt];
1614
1615         if (!ids)
1616                 return dpaa2_xstats_get_names(dev, xstats_names, limit);
1617
1618         dpaa2_xstats_get_names(dev, xstats_names_copy, limit);
1619
1620         for (i = 0; i < limit; i++) {
1621                 if (ids[i] >= stat_cnt) {
1622                         DPAA2_PMD_ERR("xstats id value isn't valid");
1623                         return -1;
1624                 }
1625                 strcpy(xstats_names[i].name, xstats_names_copy[ids[i]].name);
1626         }
1627         return limit;
1628 }
1629
1630 static int
1631 dpaa2_dev_stats_reset(struct rte_eth_dev *dev)
1632 {
1633         struct dpaa2_dev_priv *priv = dev->data->dev_private;
1634         struct fsl_mc_io *dpni = (struct fsl_mc_io *)priv->hw;
1635         int retcode;
1636         int i;
1637         struct dpaa2_queue *dpaa2_q;
1638
1639         PMD_INIT_FUNC_TRACE();
1640
1641         if (dpni == NULL) {
1642                 DPAA2_PMD_ERR("dpni is NULL");
1643                 return -EINVAL;
1644         }
1645
1646         retcode =  dpni_reset_statistics(dpni, CMD_PRI_LOW, priv->token);
1647         if (retcode)
1648                 goto error;
1649
1650         /* Reset the per queue stats in dpaa2_queue structure */
1651         for (i = 0; i < priv->nb_rx_queues; i++) {
1652                 dpaa2_q = (struct dpaa2_queue *)priv->rx_vq[i];
1653                 if (dpaa2_q)
1654                         dpaa2_q->rx_pkts = 0;
1655         }
1656
1657         for (i = 0; i < priv->nb_tx_queues; i++) {
1658                 dpaa2_q = (struct dpaa2_queue *)priv->tx_vq[i];
1659                 if (dpaa2_q)
1660                         dpaa2_q->tx_pkts = 0;
1661         }
1662
1663         return 0;
1664
1665 error:
1666         DPAA2_PMD_ERR("Operation not completed:Error Code = %d", retcode);
1667         return retcode;
1668 };
1669
1670 /* return 0 means link status changed, -1 means not changed */
1671 static int
1672 dpaa2_dev_link_update(struct rte_eth_dev *dev,
1673                         int wait_to_complete __rte_unused)
1674 {
1675         int ret;
1676         struct dpaa2_dev_priv *priv = dev->data->dev_private;
1677         struct fsl_mc_io *dpni = (struct fsl_mc_io *)priv->hw;
1678         struct rte_eth_link link;
1679         struct dpni_link_state state = {0};
1680
1681         if (dpni == NULL) {
1682                 DPAA2_PMD_ERR("dpni is NULL");
1683                 return 0;
1684         }
1685
1686         ret = dpni_get_link_state(dpni, CMD_PRI_LOW, priv->token, &state);
1687         if (ret < 0) {
1688                 DPAA2_PMD_DEBUG("error: dpni_get_link_state %d", ret);
1689                 return -1;
1690         }
1691
1692         memset(&link, 0, sizeof(struct rte_eth_link));
1693         link.link_status = state.up;
1694         link.link_speed = state.rate;
1695
1696         if (state.options & DPNI_LINK_OPT_HALF_DUPLEX)
1697                 link.link_duplex = ETH_LINK_HALF_DUPLEX;
1698         else
1699                 link.link_duplex = ETH_LINK_FULL_DUPLEX;
1700
1701         ret = rte_eth_linkstatus_set(dev, &link);
1702         if (ret == -1)
1703                 DPAA2_PMD_DEBUG("No change in status");
1704         else
1705                 DPAA2_PMD_INFO("Port %d Link is %s\n", dev->data->port_id,
1706                                link.link_status ? "Up" : "Down");
1707
1708         return ret;
1709 }
1710
1711 /**
1712  * Toggle the DPNI to enable, if not already enabled.
1713  * This is not strictly PHY up/down - it is more of logical toggling.
1714  */
1715 static int
1716 dpaa2_dev_set_link_up(struct rte_eth_dev *dev)
1717 {
1718         int ret = -EINVAL;
1719         struct dpaa2_dev_priv *priv;
1720         struct fsl_mc_io *dpni;
1721         int en = 0;
1722         struct dpni_link_state state = {0};
1723
1724         priv = dev->data->dev_private;
1725         dpni = (struct fsl_mc_io *)priv->hw;
1726
1727         if (dpni == NULL) {
1728                 DPAA2_PMD_ERR("dpni is NULL");
1729                 return ret;
1730         }
1731
1732         /* Check if DPNI is currently enabled */
1733         ret = dpni_is_enabled(dpni, CMD_PRI_LOW, priv->token, &en);
1734         if (ret) {
1735                 /* Unable to obtain dpni status; Not continuing */
1736                 DPAA2_PMD_ERR("Interface Link UP failed (%d)", ret);
1737                 return -EINVAL;
1738         }
1739
1740         /* Enable link if not already enabled */
1741         if (!en) {
1742                 ret = dpni_enable(dpni, CMD_PRI_LOW, priv->token);
1743                 if (ret) {
1744                         DPAA2_PMD_ERR("Interface Link UP failed (%d)", ret);
1745                         return -EINVAL;
1746                 }
1747         }
1748         ret = dpni_get_link_state(dpni, CMD_PRI_LOW, priv->token, &state);
1749         if (ret < 0) {
1750                 DPAA2_PMD_DEBUG("Unable to get link state (%d)", ret);
1751                 return -1;
1752         }
1753
1754         /* changing tx burst function to start enqueues */
1755         dev->tx_pkt_burst = dpaa2_dev_tx;
1756         dev->data->dev_link.link_status = state.up;
1757
1758         if (state.up)
1759                 DPAA2_PMD_INFO("Port %d Link is Up", dev->data->port_id);
1760         else
1761                 DPAA2_PMD_INFO("Port %d Link is Down", dev->data->port_id);
1762         return ret;
1763 }
1764
1765 /**
1766  * Toggle the DPNI to disable, if not already disabled.
1767  * This is not strictly PHY up/down - it is more of logical toggling.
1768  */
1769 static int
1770 dpaa2_dev_set_link_down(struct rte_eth_dev *dev)
1771 {
1772         int ret = -EINVAL;
1773         struct dpaa2_dev_priv *priv;
1774         struct fsl_mc_io *dpni;
1775         int dpni_enabled = 0;
1776         int retries = 10;
1777
1778         PMD_INIT_FUNC_TRACE();
1779
1780         priv = dev->data->dev_private;
1781         dpni = (struct fsl_mc_io *)priv->hw;
1782
1783         if (dpni == NULL) {
1784                 DPAA2_PMD_ERR("Device has not yet been configured");
1785                 return ret;
1786         }
1787
1788         /*changing  tx burst function to avoid any more enqueues */
1789         dev->tx_pkt_burst = dummy_dev_tx;
1790
1791         /* Loop while dpni_disable() attempts to drain the egress FQs
1792          * and confirm them back to us.
1793          */
1794         do {
1795                 ret = dpni_disable(dpni, 0, priv->token);
1796                 if (ret) {
1797                         DPAA2_PMD_ERR("dpni disable failed (%d)", ret);
1798                         return ret;
1799                 }
1800                 ret = dpni_is_enabled(dpni, 0, priv->token, &dpni_enabled);
1801                 if (ret) {
1802                         DPAA2_PMD_ERR("dpni enable check failed (%d)", ret);
1803                         return ret;
1804                 }
1805                 if (dpni_enabled)
1806                         /* Allow the MC some slack */
1807                         rte_delay_us(100 * 1000);
1808         } while (dpni_enabled && --retries);
1809
1810         if (!retries) {
1811                 DPAA2_PMD_WARN("Retry count exceeded disabling dpni");
1812                 /* todo- we may have to manually cleanup queues.
1813                  */
1814         } else {
1815                 DPAA2_PMD_INFO("Port %d Link DOWN successful",
1816                                dev->data->port_id);
1817         }
1818
1819         dev->data->dev_link.link_status = 0;
1820
1821         return ret;
1822 }
1823
1824 static int
1825 dpaa2_flow_ctrl_get(struct rte_eth_dev *dev, struct rte_eth_fc_conf *fc_conf)
1826 {
1827         int ret = -EINVAL;
1828         struct dpaa2_dev_priv *priv;
1829         struct fsl_mc_io *dpni;
1830         struct dpni_link_state state = {0};
1831
1832         PMD_INIT_FUNC_TRACE();
1833
1834         priv = dev->data->dev_private;
1835         dpni = (struct fsl_mc_io *)priv->hw;
1836
1837         if (dpni == NULL || fc_conf == NULL) {
1838                 DPAA2_PMD_ERR("device not configured");
1839                 return ret;
1840         }
1841
1842         ret = dpni_get_link_state(dpni, CMD_PRI_LOW, priv->token, &state);
1843         if (ret) {
1844                 DPAA2_PMD_ERR("error: dpni_get_link_state %d", ret);
1845                 return ret;
1846         }
1847
1848         memset(fc_conf, 0, sizeof(struct rte_eth_fc_conf));
1849         if (state.options & DPNI_LINK_OPT_PAUSE) {
1850                 /* DPNI_LINK_OPT_PAUSE set
1851                  *  if ASYM_PAUSE not set,
1852                  *      RX Side flow control (handle received Pause frame)
1853                  *      TX side flow control (send Pause frame)
1854                  *  if ASYM_PAUSE set,
1855                  *      RX Side flow control (handle received Pause frame)
1856                  *      No TX side flow control (send Pause frame disabled)
1857                  */
1858                 if (!(state.options & DPNI_LINK_OPT_ASYM_PAUSE))
1859                         fc_conf->mode = RTE_FC_FULL;
1860                 else
1861                         fc_conf->mode = RTE_FC_RX_PAUSE;
1862         } else {
1863                 /* DPNI_LINK_OPT_PAUSE not set
1864                  *  if ASYM_PAUSE set,
1865                  *      TX side flow control (send Pause frame)
1866                  *      No RX side flow control (No action on pause frame rx)
1867                  *  if ASYM_PAUSE not set,
1868                  *      Flow control disabled
1869                  */
1870                 if (state.options & DPNI_LINK_OPT_ASYM_PAUSE)
1871                         fc_conf->mode = RTE_FC_TX_PAUSE;
1872                 else
1873                         fc_conf->mode = RTE_FC_NONE;
1874         }
1875
1876         return ret;
1877 }
1878
1879 static int
1880 dpaa2_flow_ctrl_set(struct rte_eth_dev *dev, struct rte_eth_fc_conf *fc_conf)
1881 {
1882         int ret = -EINVAL;
1883         struct dpaa2_dev_priv *priv;
1884         struct fsl_mc_io *dpni;
1885         struct dpni_link_state state = {0};
1886         struct dpni_link_cfg cfg = {0};
1887
1888         PMD_INIT_FUNC_TRACE();
1889
1890         priv = dev->data->dev_private;
1891         dpni = (struct fsl_mc_io *)priv->hw;
1892
1893         if (dpni == NULL) {
1894                 DPAA2_PMD_ERR("dpni is NULL");
1895                 return ret;
1896         }
1897
1898         /* It is necessary to obtain the current state before setting fc_conf
1899          * as MC would return error in case rate, autoneg or duplex values are
1900          * different.
1901          */
1902         ret = dpni_get_link_state(dpni, CMD_PRI_LOW, priv->token, &state);
1903         if (ret) {
1904                 DPAA2_PMD_ERR("Unable to get link state (err=%d)", ret);
1905                 return -1;
1906         }
1907
1908         /* Disable link before setting configuration */
1909         dpaa2_dev_set_link_down(dev);
1910
1911         /* Based on fc_conf, update cfg */
1912         cfg.rate = state.rate;
1913         cfg.options = state.options;
1914
1915         /* update cfg with fc_conf */
1916         switch (fc_conf->mode) {
1917         case RTE_FC_FULL:
1918                 /* Full flow control;
1919                  * OPT_PAUSE set, ASYM_PAUSE not set
1920                  */
1921                 cfg.options |= DPNI_LINK_OPT_PAUSE;
1922                 cfg.options &= ~DPNI_LINK_OPT_ASYM_PAUSE;
1923                 break;
1924         case RTE_FC_TX_PAUSE:
1925                 /* Enable RX flow control
1926                  * OPT_PAUSE not set;
1927                  * ASYM_PAUSE set;
1928                  */
1929                 cfg.options |= DPNI_LINK_OPT_ASYM_PAUSE;
1930                 cfg.options &= ~DPNI_LINK_OPT_PAUSE;
1931                 break;
1932         case RTE_FC_RX_PAUSE:
1933                 /* Enable TX Flow control
1934                  * OPT_PAUSE set
1935                  * ASYM_PAUSE set
1936                  */
1937                 cfg.options |= DPNI_LINK_OPT_PAUSE;
1938                 cfg.options |= DPNI_LINK_OPT_ASYM_PAUSE;
1939                 break;
1940         case RTE_FC_NONE:
1941                 /* Disable Flow control
1942                  * OPT_PAUSE not set
1943                  * ASYM_PAUSE not set
1944                  */
1945                 cfg.options &= ~DPNI_LINK_OPT_PAUSE;
1946                 cfg.options &= ~DPNI_LINK_OPT_ASYM_PAUSE;
1947                 break;
1948         default:
1949                 DPAA2_PMD_ERR("Incorrect Flow control flag (%d)",
1950                               fc_conf->mode);
1951                 return -1;
1952         }
1953
1954         ret = dpni_set_link_cfg(dpni, CMD_PRI_LOW, priv->token, &cfg);
1955         if (ret)
1956                 DPAA2_PMD_ERR("Unable to set Link configuration (err=%d)",
1957                               ret);
1958
1959         /* Enable link */
1960         dpaa2_dev_set_link_up(dev);
1961
1962         return ret;
1963 }
1964
1965 static int
1966 dpaa2_dev_rss_hash_update(struct rte_eth_dev *dev,
1967                           struct rte_eth_rss_conf *rss_conf)
1968 {
1969         struct rte_eth_dev_data *data = dev->data;
1970         struct rte_eth_conf *eth_conf = &data->dev_conf;
1971         int ret;
1972
1973         PMD_INIT_FUNC_TRACE();
1974
1975         if (rss_conf->rss_hf) {
1976                 ret = dpaa2_setup_flow_dist(dev, rss_conf->rss_hf);
1977                 if (ret) {
1978                         DPAA2_PMD_ERR("Unable to set flow dist");
1979                         return ret;
1980                 }
1981         } else {
1982                 ret = dpaa2_remove_flow_dist(dev, 0);
1983                 if (ret) {
1984                         DPAA2_PMD_ERR("Unable to remove flow dist");
1985                         return ret;
1986                 }
1987         }
1988         eth_conf->rx_adv_conf.rss_conf.rss_hf = rss_conf->rss_hf;
1989         return 0;
1990 }
1991
1992 static int
1993 dpaa2_dev_rss_hash_conf_get(struct rte_eth_dev *dev,
1994                             struct rte_eth_rss_conf *rss_conf)
1995 {
1996         struct rte_eth_dev_data *data = dev->data;
1997         struct rte_eth_conf *eth_conf = &data->dev_conf;
1998
1999         /* dpaa2 does not support rss_key, so length should be 0*/
2000         rss_conf->rss_key_len = 0;
2001         rss_conf->rss_hf = eth_conf->rx_adv_conf.rss_conf.rss_hf;
2002         return 0;
2003 }
2004
2005 int dpaa2_eth_eventq_attach(const struct rte_eth_dev *dev,
2006                 int eth_rx_queue_id,
2007                 uint16_t dpcon_id,
2008                 const struct rte_event_eth_rx_adapter_queue_conf *queue_conf)
2009 {
2010         struct dpaa2_dev_priv *eth_priv = dev->data->dev_private;
2011         struct fsl_mc_io *dpni = (struct fsl_mc_io *)eth_priv->hw;
2012         struct dpaa2_queue *dpaa2_ethq = eth_priv->rx_vq[eth_rx_queue_id];
2013         uint8_t flow_id = dpaa2_ethq->flow_id;
2014         struct dpni_queue cfg;
2015         uint8_t options;
2016         int ret;
2017
2018         if (queue_conf->ev.sched_type == RTE_SCHED_TYPE_PARALLEL)
2019                 dpaa2_ethq->cb = dpaa2_dev_process_parallel_event;
2020         else if (queue_conf->ev.sched_type == RTE_SCHED_TYPE_ATOMIC)
2021                 dpaa2_ethq->cb = dpaa2_dev_process_atomic_event;
2022         else if (queue_conf->ev.sched_type == RTE_SCHED_TYPE_ORDERED)
2023                 dpaa2_ethq->cb = dpaa2_dev_process_ordered_event;
2024         else
2025                 return -EINVAL;
2026
2027         memset(&cfg, 0, sizeof(struct dpni_queue));
2028         options = DPNI_QUEUE_OPT_DEST;
2029         cfg.destination.type = DPNI_DEST_DPCON;
2030         cfg.destination.id = dpcon_id;
2031         cfg.destination.priority = queue_conf->ev.priority;
2032
2033         if (queue_conf->ev.sched_type == RTE_SCHED_TYPE_ATOMIC) {
2034                 options |= DPNI_QUEUE_OPT_HOLD_ACTIVE;
2035                 cfg.destination.hold_active = 1;
2036         }
2037
2038         if (queue_conf->ev.sched_type == RTE_SCHED_TYPE_ORDERED &&
2039                         !eth_priv->en_ordered) {
2040                 struct opr_cfg ocfg;
2041
2042                 /* Restoration window size = 256 frames */
2043                 ocfg.oprrws = 3;
2044                 /* Restoration window size = 512 frames for LX2 */
2045                 if (dpaa2_svr_family == SVR_LX2160A)
2046                         ocfg.oprrws = 4;
2047                 /* Auto advance NESN window enabled */
2048                 ocfg.oa = 1;
2049                 /* Late arrival window size disabled */
2050                 ocfg.olws = 0;
2051                 /* ORL resource exhaustaion advance NESN disabled */
2052                 ocfg.oeane = 0;
2053                 /* Loose ordering enabled */
2054                 ocfg.oloe = 1;
2055                 eth_priv->en_loose_ordered = 1;
2056                 /* Strict ordering enabled if explicitly set */
2057                 if (getenv("DPAA2_STRICT_ORDERING_ENABLE")) {
2058                         ocfg.oloe = 0;
2059                         eth_priv->en_loose_ordered = 0;
2060                 }
2061
2062                 ret = dpni_set_opr(dpni, CMD_PRI_LOW, eth_priv->token,
2063                                    dpaa2_ethq->tc_index, flow_id,
2064                                    OPR_OPT_CREATE, &ocfg);
2065                 if (ret) {
2066                         DPAA2_PMD_ERR("Error setting opr: ret: %d\n", ret);
2067                         return ret;
2068                 }
2069
2070                 eth_priv->en_ordered = 1;
2071         }
2072
2073         options |= DPNI_QUEUE_OPT_USER_CTX;
2074         cfg.user_context = (size_t)(dpaa2_ethq);
2075
2076         ret = dpni_set_queue(dpni, CMD_PRI_LOW, eth_priv->token, DPNI_QUEUE_RX,
2077                              dpaa2_ethq->tc_index, flow_id, options, &cfg);
2078         if (ret) {
2079                 DPAA2_PMD_ERR("Error in dpni_set_queue: ret: %d", ret);
2080                 return ret;
2081         }
2082
2083         memcpy(&dpaa2_ethq->ev, &queue_conf->ev, sizeof(struct rte_event));
2084
2085         return 0;
2086 }
2087
2088 int dpaa2_eth_eventq_detach(const struct rte_eth_dev *dev,
2089                 int eth_rx_queue_id)
2090 {
2091         struct dpaa2_dev_priv *eth_priv = dev->data->dev_private;
2092         struct fsl_mc_io *dpni = (struct fsl_mc_io *)eth_priv->hw;
2093         struct dpaa2_queue *dpaa2_ethq = eth_priv->rx_vq[eth_rx_queue_id];
2094         uint8_t flow_id = dpaa2_ethq->flow_id;
2095         struct dpni_queue cfg;
2096         uint8_t options;
2097         int ret;
2098
2099         memset(&cfg, 0, sizeof(struct dpni_queue));
2100         options = DPNI_QUEUE_OPT_DEST;
2101         cfg.destination.type = DPNI_DEST_NONE;
2102
2103         ret = dpni_set_queue(dpni, CMD_PRI_LOW, eth_priv->token, DPNI_QUEUE_RX,
2104                              dpaa2_ethq->tc_index, flow_id, options, &cfg);
2105         if (ret)
2106                 DPAA2_PMD_ERR("Error in dpni_set_queue: ret: %d", ret);
2107
2108         return ret;
2109 }
2110
2111 static inline int
2112 dpaa2_dev_verify_filter_ops(enum rte_filter_op filter_op)
2113 {
2114         unsigned int i;
2115
2116         for (i = 0; i < RTE_DIM(dpaa2_supported_filter_ops); i++) {
2117                 if (dpaa2_supported_filter_ops[i] == filter_op)
2118                         return 0;
2119         }
2120         return -ENOTSUP;
2121 }
2122
2123 static int
2124 dpaa2_dev_flow_ctrl(struct rte_eth_dev *dev,
2125                     enum rte_filter_type filter_type,
2126                                  enum rte_filter_op filter_op,
2127                                  void *arg)
2128 {
2129         int ret = 0;
2130
2131         if (!dev)
2132                 return -ENODEV;
2133
2134         switch (filter_type) {
2135         case RTE_ETH_FILTER_GENERIC:
2136                 if (dpaa2_dev_verify_filter_ops(filter_op) < 0) {
2137                         ret = -ENOTSUP;
2138                         break;
2139                 }
2140                 *(const void **)arg = &dpaa2_flow_ops;
2141                 dpaa2_filter_type |= filter_type;
2142                 break;
2143         default:
2144                 RTE_LOG(ERR, PMD, "Filter type (%d) not supported",
2145                         filter_type);
2146                 ret = -ENOTSUP;
2147                 break;
2148         }
2149         return ret;
2150 }
2151
2152 static struct eth_dev_ops dpaa2_ethdev_ops = {
2153         .dev_configure    = dpaa2_eth_dev_configure,
2154         .dev_start            = dpaa2_dev_start,
2155         .dev_stop             = dpaa2_dev_stop,
2156         .dev_close            = dpaa2_dev_close,
2157         .promiscuous_enable   = dpaa2_dev_promiscuous_enable,
2158         .promiscuous_disable  = dpaa2_dev_promiscuous_disable,
2159         .allmulticast_enable  = dpaa2_dev_allmulticast_enable,
2160         .allmulticast_disable = dpaa2_dev_allmulticast_disable,
2161         .dev_set_link_up      = dpaa2_dev_set_link_up,
2162         .dev_set_link_down    = dpaa2_dev_set_link_down,
2163         .link_update       = dpaa2_dev_link_update,
2164         .stats_get             = dpaa2_dev_stats_get,
2165         .xstats_get            = dpaa2_dev_xstats_get,
2166         .xstats_get_by_id     = dpaa2_xstats_get_by_id,
2167         .xstats_get_names_by_id = dpaa2_xstats_get_names_by_id,
2168         .xstats_get_names      = dpaa2_xstats_get_names,
2169         .stats_reset       = dpaa2_dev_stats_reset,
2170         .xstats_reset         = dpaa2_dev_stats_reset,
2171         .fw_version_get    = dpaa2_fw_version_get,
2172         .dev_infos_get     = dpaa2_dev_info_get,
2173         .dev_supported_ptypes_get = dpaa2_supported_ptypes_get,
2174         .mtu_set           = dpaa2_dev_mtu_set,
2175         .vlan_filter_set      = dpaa2_vlan_filter_set,
2176         .vlan_offload_set     = dpaa2_vlan_offload_set,
2177         .vlan_tpid_set        = dpaa2_vlan_tpid_set,
2178         .rx_queue_setup    = dpaa2_dev_rx_queue_setup,
2179         .rx_queue_release  = dpaa2_dev_rx_queue_release,
2180         .tx_queue_setup    = dpaa2_dev_tx_queue_setup,
2181         .tx_queue_release  = dpaa2_dev_tx_queue_release,
2182         .rx_queue_count       = dpaa2_dev_rx_queue_count,
2183         .flow_ctrl_get        = dpaa2_flow_ctrl_get,
2184         .flow_ctrl_set        = dpaa2_flow_ctrl_set,
2185         .mac_addr_add         = dpaa2_dev_add_mac_addr,
2186         .mac_addr_remove      = dpaa2_dev_remove_mac_addr,
2187         .mac_addr_set         = dpaa2_dev_set_mac_addr,
2188         .rss_hash_update      = dpaa2_dev_rss_hash_update,
2189         .rss_hash_conf_get    = dpaa2_dev_rss_hash_conf_get,
2190         .filter_ctrl          = dpaa2_dev_flow_ctrl,
2191 #if defined(RTE_LIBRTE_IEEE1588)
2192         .timesync_enable      = dpaa2_timesync_enable,
2193         .timesync_disable     = dpaa2_timesync_disable,
2194         .timesync_read_time   = dpaa2_timesync_read_time,
2195         .timesync_write_time  = dpaa2_timesync_write_time,
2196         .timesync_adjust_time = dpaa2_timesync_adjust_time,
2197         .timesync_read_rx_timestamp = dpaa2_timesync_read_rx_timestamp,
2198         .timesync_read_tx_timestamp = dpaa2_timesync_read_tx_timestamp,
2199 #endif
2200 };
2201
2202 /* Populate the mac address from physically available (u-boot/firmware) and/or
2203  * one set by higher layers like MC (restool) etc.
2204  * Returns the table of MAC entries (multiple entries)
2205  */
2206 static int
2207 populate_mac_addr(struct fsl_mc_io *dpni_dev, struct dpaa2_dev_priv *priv,
2208                   struct rte_ether_addr *mac_entry)
2209 {
2210         int ret;
2211         struct rte_ether_addr phy_mac, prime_mac;
2212
2213         memset(&phy_mac, 0, sizeof(struct rte_ether_addr));
2214         memset(&prime_mac, 0, sizeof(struct rte_ether_addr));
2215
2216         /* Get the physical device MAC address */
2217         ret = dpni_get_port_mac_addr(dpni_dev, CMD_PRI_LOW, priv->token,
2218                                      phy_mac.addr_bytes);
2219         if (ret) {
2220                 DPAA2_PMD_ERR("DPNI get physical port MAC failed: %d", ret);
2221                 goto cleanup;
2222         }
2223
2224         ret = dpni_get_primary_mac_addr(dpni_dev, CMD_PRI_LOW, priv->token,
2225                                         prime_mac.addr_bytes);
2226         if (ret) {
2227                 DPAA2_PMD_ERR("DPNI get Prime port MAC failed: %d", ret);
2228                 goto cleanup;
2229         }
2230
2231         /* Now that both MAC have been obtained, do:
2232          *  if not_empty_mac(phy) && phy != Prime, overwrite prime with Phy
2233          *     and return phy
2234          *  If empty_mac(phy), return prime.
2235          *  if both are empty, create random MAC, set as prime and return
2236          */
2237         if (!rte_is_zero_ether_addr(&phy_mac)) {
2238                 /* If the addresses are not same, overwrite prime */
2239                 if (!rte_is_same_ether_addr(&phy_mac, &prime_mac)) {
2240                         ret = dpni_set_primary_mac_addr(dpni_dev, CMD_PRI_LOW,
2241                                                         priv->token,
2242                                                         phy_mac.addr_bytes);
2243                         if (ret) {
2244                                 DPAA2_PMD_ERR("Unable to set MAC Address: %d",
2245                                               ret);
2246                                 goto cleanup;
2247                         }
2248                         memcpy(&prime_mac, &phy_mac,
2249                                 sizeof(struct rte_ether_addr));
2250                 }
2251         } else if (rte_is_zero_ether_addr(&prime_mac)) {
2252                 /* In case phys and prime, both are zero, create random MAC */
2253                 rte_eth_random_addr(prime_mac.addr_bytes);
2254                 ret = dpni_set_primary_mac_addr(dpni_dev, CMD_PRI_LOW,
2255                                                 priv->token,
2256                                                 prime_mac.addr_bytes);
2257                 if (ret) {
2258                         DPAA2_PMD_ERR("Unable to set MAC Address: %d", ret);
2259                         goto cleanup;
2260                 }
2261         }
2262
2263         /* prime_mac the final MAC address */
2264         memcpy(mac_entry, &prime_mac, sizeof(struct rte_ether_addr));
2265         return 0;
2266
2267 cleanup:
2268         return -1;
2269 }
2270
2271 static int
2272 check_devargs_handler(__rte_unused const char *key, const char *value,
2273                       __rte_unused void *opaque)
2274 {
2275         if (strcmp(value, "1"))
2276                 return -1;
2277
2278         return 0;
2279 }
2280
2281 static int
2282 dpaa2_get_devargs(struct rte_devargs *devargs, const char *key)
2283 {
2284         struct rte_kvargs *kvlist;
2285
2286         if (!devargs)
2287                 return 0;
2288
2289         kvlist = rte_kvargs_parse(devargs->args, NULL);
2290         if (!kvlist)
2291                 return 0;
2292
2293         if (!rte_kvargs_count(kvlist, key)) {
2294                 rte_kvargs_free(kvlist);
2295                 return 0;
2296         }
2297
2298         if (rte_kvargs_process(kvlist, key,
2299                                check_devargs_handler, NULL) < 0) {
2300                 rte_kvargs_free(kvlist);
2301                 return 0;
2302         }
2303         rte_kvargs_free(kvlist);
2304
2305         return 1;
2306 }
2307
2308 static int
2309 dpaa2_dev_init(struct rte_eth_dev *eth_dev)
2310 {
2311         struct rte_device *dev = eth_dev->device;
2312         struct rte_dpaa2_device *dpaa2_dev;
2313         struct fsl_mc_io *dpni_dev;
2314         struct dpni_attr attr;
2315         struct dpaa2_dev_priv *priv = eth_dev->data->dev_private;
2316         struct dpni_buffer_layout layout;
2317         int ret, hw_id, i;
2318
2319         PMD_INIT_FUNC_TRACE();
2320
2321         /* For secondary processes, the primary has done all the work */
2322         if (rte_eal_process_type() != RTE_PROC_PRIMARY) {
2323                 /* In case of secondary, only burst and ops API need to be
2324                  * plugged.
2325                  */
2326                 eth_dev->dev_ops = &dpaa2_ethdev_ops;
2327                 if (dpaa2_get_devargs(dev->devargs, DRIVER_LOOPBACK_MODE))
2328                         eth_dev->rx_pkt_burst = dpaa2_dev_loopback_rx;
2329                 else if (dpaa2_get_devargs(dev->devargs,
2330                                         DRIVER_NO_PREFETCH_MODE))
2331                         eth_dev->rx_pkt_burst = dpaa2_dev_rx;
2332                 else
2333                         eth_dev->rx_pkt_burst = dpaa2_dev_prefetch_rx;
2334                 eth_dev->tx_pkt_burst = dpaa2_dev_tx;
2335                 return 0;
2336         }
2337
2338         dpaa2_dev = container_of(dev, struct rte_dpaa2_device, device);
2339
2340         hw_id = dpaa2_dev->object_id;
2341
2342         dpni_dev = rte_malloc(NULL, sizeof(struct fsl_mc_io), 0);
2343         if (!dpni_dev) {
2344                 DPAA2_PMD_ERR("Memory allocation failed for dpni device");
2345                 return -1;
2346         }
2347
2348         dpni_dev->regs = rte_mcp_ptr_list[0];
2349         ret = dpni_open(dpni_dev, CMD_PRI_LOW, hw_id, &priv->token);
2350         if (ret) {
2351                 DPAA2_PMD_ERR(
2352                              "Failure in opening dpni@%d with err code %d",
2353                              hw_id, ret);
2354                 rte_free(dpni_dev);
2355                 return -1;
2356         }
2357
2358         /* Clean the device first */
2359         ret = dpni_reset(dpni_dev, CMD_PRI_LOW, priv->token);
2360         if (ret) {
2361                 DPAA2_PMD_ERR("Failure cleaning dpni@%d with err code %d",
2362                               hw_id, ret);
2363                 goto init_err;
2364         }
2365
2366         ret = dpni_get_attributes(dpni_dev, CMD_PRI_LOW, priv->token, &attr);
2367         if (ret) {
2368                 DPAA2_PMD_ERR(
2369                              "Failure in get dpni@%d attribute, err code %d",
2370                              hw_id, ret);
2371                 goto init_err;
2372         }
2373
2374         priv->num_rx_tc = attr.num_rx_tcs;
2375         /* only if the custom CG is enabled */
2376         if (attr.options & DPNI_OPT_CUSTOM_CG)
2377                 priv->max_cgs = attr.num_cgs;
2378         else
2379                 priv->max_cgs = 0;
2380
2381         for (i = 0; i < priv->max_cgs; i++)
2382                 priv->cgid_in_use[i] = 0;
2383
2384         for (i = 0; i < attr.num_rx_tcs; i++)
2385                 priv->nb_rx_queues += attr.num_queues;
2386
2387         /* Using number of TX queues as number of TX TCs */
2388         priv->nb_tx_queues = attr.num_tx_tcs;
2389
2390         DPAA2_PMD_DEBUG("RX-TC= %d, rx_queues= %d, tx_queues=%d, max_cgs=%d",
2391                         priv->num_rx_tc, priv->nb_rx_queues,
2392                         priv->nb_tx_queues, priv->max_cgs);
2393
2394         priv->hw = dpni_dev;
2395         priv->hw_id = hw_id;
2396         priv->options = attr.options;
2397         priv->max_mac_filters = attr.mac_filter_entries;
2398         priv->max_vlan_filters = attr.vlan_filter_entries;
2399         priv->flags = 0;
2400 #if defined(RTE_LIBRTE_IEEE1588)
2401         priv->tx_conf_en = 1;
2402 #else
2403         priv->tx_conf_en = 0;
2404 #endif
2405
2406         /* Allocate memory for hardware structure for queues */
2407         ret = dpaa2_alloc_rx_tx_queues(eth_dev);
2408         if (ret) {
2409                 DPAA2_PMD_ERR("Queue allocation Failed");
2410                 goto init_err;
2411         }
2412
2413         /* Allocate memory for storing MAC addresses.
2414          * Table of mac_filter_entries size is allocated so that RTE ether lib
2415          * can add MAC entries when rte_eth_dev_mac_addr_add is called.
2416          */
2417         eth_dev->data->mac_addrs = rte_zmalloc("dpni",
2418                 RTE_ETHER_ADDR_LEN * attr.mac_filter_entries, 0);
2419         if (eth_dev->data->mac_addrs == NULL) {
2420                 DPAA2_PMD_ERR(
2421                    "Failed to allocate %d bytes needed to store MAC addresses",
2422                    RTE_ETHER_ADDR_LEN * attr.mac_filter_entries);
2423                 ret = -ENOMEM;
2424                 goto init_err;
2425         }
2426
2427         ret = populate_mac_addr(dpni_dev, priv, &eth_dev->data->mac_addrs[0]);
2428         if (ret) {
2429                 DPAA2_PMD_ERR("Unable to fetch MAC Address for device");
2430                 rte_free(eth_dev->data->mac_addrs);
2431                 eth_dev->data->mac_addrs = NULL;
2432                 goto init_err;
2433         }
2434
2435         /* ... tx buffer layout ... */
2436         memset(&layout, 0, sizeof(struct dpni_buffer_layout));
2437         if (priv->tx_conf_en) {
2438                 layout.options = DPNI_BUF_LAYOUT_OPT_FRAME_STATUS |
2439                                  DPNI_BUF_LAYOUT_OPT_TIMESTAMP;
2440                 layout.pass_timestamp = true;
2441         } else {
2442                 layout.options = DPNI_BUF_LAYOUT_OPT_FRAME_STATUS;
2443         }
2444         layout.pass_frame_status = 1;
2445         ret = dpni_set_buffer_layout(dpni_dev, CMD_PRI_LOW, priv->token,
2446                                      DPNI_QUEUE_TX, &layout);
2447         if (ret) {
2448                 DPAA2_PMD_ERR("Error (%d) in setting tx buffer layout", ret);
2449                 goto init_err;
2450         }
2451
2452         /* ... tx-conf and error buffer layout ... */
2453         memset(&layout, 0, sizeof(struct dpni_buffer_layout));
2454         if (priv->tx_conf_en) {
2455                 layout.options = DPNI_BUF_LAYOUT_OPT_FRAME_STATUS |
2456                                  DPNI_BUF_LAYOUT_OPT_TIMESTAMP;
2457                 layout.pass_timestamp = true;
2458         } else {
2459                 layout.options = DPNI_BUF_LAYOUT_OPT_FRAME_STATUS;
2460         }
2461         layout.pass_frame_status = 1;
2462         ret = dpni_set_buffer_layout(dpni_dev, CMD_PRI_LOW, priv->token,
2463                                      DPNI_QUEUE_TX_CONFIRM, &layout);
2464         if (ret) {
2465                 DPAA2_PMD_ERR("Error (%d) in setting tx-conf buffer layout",
2466                              ret);
2467                 goto init_err;
2468         }
2469
2470         eth_dev->dev_ops = &dpaa2_ethdev_ops;
2471
2472         if (dpaa2_get_devargs(dev->devargs, DRIVER_LOOPBACK_MODE)) {
2473                 eth_dev->rx_pkt_burst = dpaa2_dev_loopback_rx;
2474                 DPAA2_PMD_INFO("Loopback mode");
2475         } else if (dpaa2_get_devargs(dev->devargs, DRIVER_NO_PREFETCH_MODE)) {
2476                 eth_dev->rx_pkt_burst = dpaa2_dev_rx;
2477                 DPAA2_PMD_INFO("No Prefetch mode");
2478         } else {
2479                 eth_dev->rx_pkt_burst = dpaa2_dev_prefetch_rx;
2480         }
2481         eth_dev->tx_pkt_burst = dpaa2_dev_tx;
2482
2483         /*Init fields w.r.t. classficaition*/
2484         memset(&priv->extract.qos_key_cfg, 0, sizeof(struct dpkg_profile_cfg));
2485         priv->extract.qos_extract_param = (size_t)rte_malloc(NULL, 256, 64);
2486         if (!priv->extract.qos_extract_param) {
2487                 DPAA2_PMD_ERR(" Error(%d) in allocation resources for flow "
2488                             " classificaiton ", ret);
2489                 goto init_err;
2490         }
2491         for (i = 0; i < MAX_TCS; i++) {
2492                 memset(&priv->extract.fs_key_cfg[i], 0,
2493                         sizeof(struct dpkg_profile_cfg));
2494                 priv->extract.fs_extract_param[i] =
2495                         (size_t)rte_malloc(NULL, 256, 64);
2496                 if (!priv->extract.fs_extract_param[i]) {
2497                         DPAA2_PMD_ERR(" Error(%d) in allocation resources for flow classificaiton",
2498                                      ret);
2499                         goto init_err;
2500                 }
2501         }
2502
2503         ret = dpni_set_max_frame_length(dpni_dev, CMD_PRI_LOW, priv->token,
2504                                         RTE_ETHER_MAX_LEN - RTE_ETHER_CRC_LEN
2505                                         + VLAN_TAG_SIZE);
2506         if (ret) {
2507                 DPAA2_PMD_ERR("Unable to set mtu. check config");
2508                 goto init_err;
2509         }
2510
2511         RTE_LOG(INFO, PMD, "%s: netdev created\n", eth_dev->data->name);
2512         return 0;
2513 init_err:
2514         dpaa2_dev_uninit(eth_dev);
2515         return ret;
2516 }
2517
2518 static int
2519 dpaa2_dev_uninit(struct rte_eth_dev *eth_dev)
2520 {
2521         struct dpaa2_dev_priv *priv = eth_dev->data->dev_private;
2522         struct fsl_mc_io *dpni = (struct fsl_mc_io *)priv->hw;
2523         int i, ret;
2524
2525         PMD_INIT_FUNC_TRACE();
2526
2527         if (rte_eal_process_type() != RTE_PROC_PRIMARY)
2528                 return 0;
2529
2530         if (!dpni) {
2531                 DPAA2_PMD_WARN("Already closed or not started");
2532                 return -1;
2533         }
2534
2535         dpaa2_dev_close(eth_dev);
2536
2537         dpaa2_free_rx_tx_queues(eth_dev);
2538
2539         /* Close the device at underlying layer*/
2540         ret = dpni_close(dpni, CMD_PRI_LOW, priv->token);
2541         if (ret) {
2542                 DPAA2_PMD_ERR(
2543                              "Failure closing dpni device with err code %d",
2544                              ret);
2545         }
2546
2547         /* Free the allocated memory for ethernet private data and dpni*/
2548         priv->hw = NULL;
2549         rte_free(dpni);
2550
2551         for (i = 0; i < MAX_TCS; i++) {
2552                 if (priv->extract.fs_extract_param[i])
2553                         rte_free((void *)(size_t)priv->extract.fs_extract_param[i]);
2554         }
2555
2556         if (priv->extract.qos_extract_param)
2557                 rte_free((void *)(size_t)priv->extract.qos_extract_param);
2558
2559         eth_dev->dev_ops = NULL;
2560         eth_dev->rx_pkt_burst = NULL;
2561         eth_dev->tx_pkt_burst = NULL;
2562
2563         DPAA2_PMD_INFO("%s: netdev deleted", eth_dev->data->name);
2564         return 0;
2565 }
2566
2567 static int
2568 rte_dpaa2_probe(struct rte_dpaa2_driver *dpaa2_drv,
2569                 struct rte_dpaa2_device *dpaa2_dev)
2570 {
2571         struct rte_eth_dev *eth_dev;
2572         struct dpaa2_dev_priv *priv;
2573         int diag;
2574
2575         if ((DPAA2_MBUF_HW_ANNOTATION + DPAA2_FD_PTA_SIZE) >
2576                 RTE_PKTMBUF_HEADROOM) {
2577                 DPAA2_PMD_ERR(
2578                 "RTE_PKTMBUF_HEADROOM(%d) shall be > DPAA2 Annotation req(%d)",
2579                 RTE_PKTMBUF_HEADROOM,
2580                 DPAA2_MBUF_HW_ANNOTATION + DPAA2_FD_PTA_SIZE);
2581
2582                 return -1;
2583         }
2584
2585         if (rte_eal_process_type() == RTE_PROC_PRIMARY) {
2586                 eth_dev = rte_eth_dev_allocate(dpaa2_dev->device.name);
2587                 if (!eth_dev)
2588                         return -ENODEV;
2589                 eth_dev->data->dev_private = rte_zmalloc(
2590                                                 "ethdev private structure",
2591                                                 sizeof(struct dpaa2_dev_priv),
2592                                                 RTE_CACHE_LINE_SIZE);
2593                 if (eth_dev->data->dev_private == NULL) {
2594                         DPAA2_PMD_CRIT(
2595                                 "Unable to allocate memory for private data");
2596                         rte_eth_dev_release_port(eth_dev);
2597                         return -ENOMEM;
2598                 }
2599         } else {
2600                 eth_dev = rte_eth_dev_attach_secondary(dpaa2_dev->device.name);
2601                 if (!eth_dev)
2602                         return -ENODEV;
2603         }
2604
2605         eth_dev->device = &dpaa2_dev->device;
2606
2607         dpaa2_dev->eth_dev = eth_dev;
2608         eth_dev->data->rx_mbuf_alloc_failed = 0;
2609
2610         if (dpaa2_drv->drv_flags & RTE_DPAA2_DRV_INTR_LSC)
2611                 eth_dev->data->dev_flags |= RTE_ETH_DEV_INTR_LSC;
2612
2613         /* Invoke PMD device initialization function */
2614         diag = dpaa2_dev_init(eth_dev);
2615         if (diag == 0) {
2616                 rte_eth_dev_probing_finish(eth_dev);
2617                 return 0;
2618         }
2619
2620         priv = eth_dev->data->dev_private;
2621         priv->tx_conf_en = 0;
2622
2623         rte_eth_dev_release_port(eth_dev);
2624         return diag;
2625 }
2626
2627 static int
2628 rte_dpaa2_remove(struct rte_dpaa2_device *dpaa2_dev)
2629 {
2630         struct rte_eth_dev *eth_dev;
2631
2632         eth_dev = dpaa2_dev->eth_dev;
2633         dpaa2_dev_uninit(eth_dev);
2634
2635         rte_eth_dev_release_port(eth_dev);
2636
2637         return 0;
2638 }
2639
2640 static struct rte_dpaa2_driver rte_dpaa2_pmd = {
2641         .drv_flags = RTE_DPAA2_DRV_INTR_LSC | RTE_DPAA2_DRV_IOVA_AS_VA,
2642         .drv_type = DPAA2_ETH,
2643         .probe = rte_dpaa2_probe,
2644         .remove = rte_dpaa2_remove,
2645 };
2646
2647 RTE_PMD_REGISTER_DPAA2(net_dpaa2, rte_dpaa2_pmd);
2648 RTE_PMD_REGISTER_PARAM_STRING(net_dpaa2,
2649                 DRIVER_LOOPBACK_MODE "=<int> "
2650                 DRIVER_NO_PREFETCH_MODE "=<int>");
2651 RTE_INIT(dpaa2_pmd_init_log)
2652 {
2653         dpaa2_logtype_pmd = rte_log_register("pmd.net.dpaa2");
2654         if (dpaa2_logtype_pmd >= 0)
2655                 rte_log_set_level(dpaa2_logtype_pmd, RTE_LOG_NOTICE);
2656 }