drivers/net/ena/base/ena_plat_dpdk.h

   1 /*-
   2 * BSD LICENSE
   3 *
   4 * Copyright (c) 2015-2016 Amazon.com, Inc. or its affiliates.
   5 * All rights reserved.
   6 *
   7 * Redistribution and use in source and binary forms, with or without
   8 * modification, are permitted provided that the following conditions
   9 * are met:
  10 *
  11 * * Redistributions of source code must retain the above copyright
  12 * notice, this list of conditions and the following disclaimer.
  13 * * Redistributions in binary form must reproduce the above copyright
  14 * notice, this list of conditions and the following disclaimer in
  15 * the documentation and/or other materials provided with the
  16 * distribution.
  17 * * Neither the name of copyright holder nor the names of its
  18 * contributors may be used to endorse or promote products derived
  19 * from this software without specific prior written permission.
  20 *
  21 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
  22 * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
  23 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
  24 * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
  25 * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
  26 * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
  27 * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
  28 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
  29 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
  30 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
  31 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
  32 */
  33
  34 #ifndef DPDK_ENA_COM_ENA_PLAT_DPDK_H_
  35 #define DPDK_ENA_COM_ENA_PLAT_DPDK_H_
  36
  37 #include <stdbool.h>
  38 #include <stdlib.h>
  39 #include <pthread.h>
  40 #include <stdint.h>
  41 #include <string.h>
  42 #include <errno.h>
  43
  44 #include <rte_atomic.h>
  45 #include <rte_branch_prediction.h>
  46 #include <rte_cycles.h>
  47 #include <rte_io.h>
  48 #include <rte_log.h>
  49 #include <rte_malloc.h>
  50 #include <rte_memzone.h>
  51 #include <rte_prefetch.h>
  52 #include <rte_spinlock.h>
  53
  54 #include <sys/time.h>
  55
  56 typedef uint64_t u64;
  57 typedef uint32_t u32;
  58 typedef uint16_t u16;
  59 typedef uint8_t u8;
  60
  61 typedef uint64_t dma_addr_t;
  62 #ifndef ETIME
  63 #define ETIME ETIMEDOUT
  64 #endif
  65
  66 #define ena_atomic32_t rte_atomic32_t
  67 #define ena_mem_handle_t const struct rte_memzone *
  68
  69 #define SZ_256 (256U)
  70 #define SZ_4K (4096U)
  71
  72 #define ENA_COM_OK      0
  73 #define ENA_COM_NO_MEM  -ENOMEM
  74 #define ENA_COM_INVAL   -EINVAL
  75 #define ENA_COM_NO_SPACE        -ENOSPC
  76 #define ENA_COM_NO_DEVICE       -ENODEV
  77 #define ENA_COM_TIMER_EXPIRED   -ETIME
  78 #define ENA_COM_FAULT   -EFAULT
  79 #define ENA_COM_TRY_AGAIN       -EAGAIN
  80 #define ENA_COM_UNSUPPORTED    -EOPNOTSUPP
  81
  82 #define ____cacheline_aligned __rte_cache_aligned
  83
  84 #define ENA_ABORT() abort()
  85
  86 #define ENA_MSLEEP(x) rte_delay_ms(x)
  87 #define ENA_UDELAY(x) rte_delay_us(x)
  88
  89 #define ENA_TOUCH(x) ((void)(x))
  90 #define memcpy_toio memcpy
  91 #define wmb rte_wmb
  92 #define rmb rte_rmb
  93 #define mb rte_mb
  94 #define mmiowb rte_io_wmb
  95 #define __iomem
  96
  97 #define US_PER_S 1000000
  98 #define ENA_GET_SYSTEM_USECS()                                          \
  99         (rte_get_timer_cycles() * US_PER_S / rte_get_timer_hz())
 100
 101 extern int ena_logtype_com;
 102 #if RTE_LOG_DP_LEVEL >= RTE_LOG_DEBUG
 103 #define ENA_ASSERT(cond, format, arg...)                                \
 104         do {                                                            \
 105                 if (unlikely(!(cond))) {                                \
 106                         rte_log(RTE_LOGTYPE_ERR, ena_logtype_com,       \
 107                                 format, ##arg);                         \
 108                         rte_panic("line %d\tassert \"" #cond "\""       \
 109                                         "failed\n", __LINE__);          \
 110                 }                                                       \
 111         } while (0)
 112 #else
 113 #define ENA_ASSERT(cond, format, arg...) do {} while (0)
 114 #endif
 115
 116 #define ENA_MAX32(x, y) RTE_MAX((x), (y))
 117 #define ENA_MAX16(x, y) RTE_MAX((x), (y))
 118 #define ENA_MAX8(x, y) RTE_MAX((x), (y))
 119 #define ENA_MIN32(x, y) RTE_MIN((x), (y))
 120 #define ENA_MIN16(x, y) RTE_MIN((x), (y))
 121 #define ENA_MIN8(x, y) RTE_MIN((x), (y))
 122
 123 #define BITS_PER_LONG_LONG (__SIZEOF_LONG_LONG__ * 8)
 124 #define U64_C(x) x ## ULL
 125 #define BIT(nr)         (1UL << (nr))
 126 #define BITS_PER_LONG   (__SIZEOF_LONG__ * 8)
 127 #define GENMASK(h, l)   (((~0UL) << (l)) & (~0UL >> (BITS_PER_LONG - 1 - (h))))
 128 #define GENMASK_ULL(h, l) (((~0ULL) - (1ULL << (l)) + 1) & \
 129                           (~0ULL >> (BITS_PER_LONG_LONG - 1 - (h))))
 130
 131 #ifdef RTE_LIBRTE_ENA_COM_DEBUG
 132 #define ena_trc_log(level, fmt, arg...) \
 133         rte_log(RTE_LOG_ ## level, ena_logtype_com, \
 134                 "[ENA_COM: %s]" fmt, __func__, ##arg)
 135
 136 #define ena_trc_dbg(format, arg...)     ena_trc_log(DEBUG, format, ##arg)
 137 #define ena_trc_info(format, arg...)    ena_trc_log(INFO, format, ##arg)
 138 #define ena_trc_warn(format, arg...)    ena_trc_log(WARNING, format, ##arg)
 139 #define ena_trc_err(format, arg...)     ena_trc_log(ERR, format, ##arg)
 140 #else
 141 #define ena_trc_dbg(format, arg...) do { } while (0)
 142 #define ena_trc_info(format, arg...) do { } while (0)
 143 #define ena_trc_warn(format, arg...) do { } while (0)
 144 #define ena_trc_err(format, arg...) do { } while (0)
 145 #endif /* RTE_LIBRTE_ENA_COM_DEBUG */
 146
 147 #define ENA_WARN(cond, format, arg...)                                 \
 148 do {                                                                   \
 149        if (unlikely(cond)) {                                           \
 150                ena_trc_err(                                            \
 151                        "Warn failed on %s:%s:%d:" format,              \
 152                        __FILE__, __func__, __LINE__, ##arg);           \
 153        }                                                               \
 154 } while (0)
 155
 156 /* Spinlock related methods */
 157 #define ena_spinlock_t rte_spinlock_t
 158 #define ENA_SPINLOCK_INIT(spinlock) rte_spinlock_init(&spinlock)
 159 #define ENA_SPINLOCK_LOCK(spinlock, flags)                              \
 160         ({(void)flags; rte_spinlock_lock(&spinlock); })
 161 #define ENA_SPINLOCK_UNLOCK(spinlock, flags)                            \
 162         ({(void)flags; rte_spinlock_unlock(&(spinlock)); })
 163 #define ENA_SPINLOCK_DESTROY(spinlock) ((void)spinlock)
 164
 165 #define q_waitqueue_t                   \
 166         struct {                        \
 167                 pthread_cond_t cond;    \
 168                 pthread_mutex_t mutex;  \
 169         }
 170
 171 #define ena_wait_queue_t q_waitqueue_t
 172
 173 #define ENA_WAIT_EVENT_INIT(waitqueue)                                  \
 174         do {                                                            \
 175                 pthread_mutex_init(&(waitqueue).mutex, NULL);           \
 176                 pthread_cond_init(&(waitqueue).cond, NULL);             \
 177         } while (0)
 178
 179 #define ENA_WAIT_EVENT_WAIT(waitevent, timeout)                         \
 180         do {                                                            \
 181                 struct timespec wait;                                   \
 182                 struct timeval now;                                     \
 183                 unsigned long timeout_us;                               \
 184                 gettimeofday(&now, NULL);                               \
 185                 wait.tv_sec = now.tv_sec + timeout / 1000000UL;         \
 186                 timeout_us = timeout % 1000000UL;                       \
 187                 wait.tv_nsec = (now.tv_usec + timeout_us) * 1000UL;     \
 188                 pthread_mutex_lock(&waitevent.mutex);                   \
 189                 pthread_cond_timedwait(&waitevent.cond,                 \
 190                                 &waitevent.mutex, &wait);               \
 191                 pthread_mutex_unlock(&waitevent.mutex);                 \
 192         } while (0)
 193 #define ENA_WAIT_EVENT_SIGNAL(waitevent) pthread_cond_signal(&waitevent.cond)
 194 /* pthread condition doesn't need to be rearmed after usage */
 195 #define ENA_WAIT_EVENT_CLEAR(...)
 196 #define ENA_WAIT_EVENT_DESTROY(waitqueue) ((void)(waitqueue))
 197
 198 #define ena_wait_event_t ena_wait_queue_t
 199 #define ENA_MIGHT_SLEEP()
 200
 201 #define ENA_TIME_EXPIRE(timeout)  (timeout < rte_get_timer_cycles())
 202 #define ENA_GET_SYSTEM_TIMEOUT(timeout_us)                             \
 203        (timeout_us * rte_get_timer_hz() / 1000000 + rte_get_timer_cycles())
 204
 205 /*
 206  * Each rte_memzone should have unique name.
 207  * To satisfy it, count number of allocations and add it to name.
 208  */
 209 extern uint32_t ena_alloc_cnt;
 210
 211 #define ENA_MEM_ALLOC_COHERENT(dmadev, size, virt, phys, handle)        \
 212         do {                                                            \
 213                 const struct rte_memzone *mz;                           \
 214                 char z_name[RTE_MEMZONE_NAMESIZE];                      \
 215                 ENA_TOUCH(dmadev); ENA_TOUCH(handle);                   \
 216                 snprintf(z_name, sizeof(z_name),                        \
 217                                 "ena_alloc_%d", ena_alloc_cnt++);       \
 218                 mz = rte_memzone_reserve(z_name, size, SOCKET_ID_ANY,   \
 219                                 RTE_MEMZONE_IOVA_CONTIG);               \
 220                 handle = mz;                                            \
 221                 if (mz == NULL) {                                       \
 222                         virt = NULL;                                    \
 223                         phys = 0;                                       \
 224                 } else {                                                \
 225                         memset(mz->addr, 0, size);                      \
 226                         virt = mz->addr;                                \
 227                         phys = mz->iova;                                \
 228                 }                                                       \
 229         } while (0)
 230 #define ENA_MEM_FREE_COHERENT(dmadev, size, virt, phys, handle)         \
 231                 ({ ENA_TOUCH(size); ENA_TOUCH(phys);                    \
 232                    ENA_TOUCH(dmadev);                                   \
 233                    rte_memzone_free(handle); })
 234
 235 #define ENA_MEM_ALLOC_COHERENT_NODE(                                    \
 236         dmadev, size, virt, phys, mem_handle, node, dev_node)           \
 237         do {                                                            \
 238                 const struct rte_memzone *mz;                           \
 239                 char z_name[RTE_MEMZONE_NAMESIZE];                      \
 240                 ENA_TOUCH(dmadev); ENA_TOUCH(dev_node);                 \
 241                 snprintf(z_name, sizeof(z_name),                        \
 242                                 "ena_alloc_%d", ena_alloc_cnt++);       \
 243                 mz = rte_memzone_reserve(z_name, size, node,            \
 244                                 RTE_MEMZONE_IOVA_CONTIG);               \
 245                 mem_handle = mz;                                        \
 246                 if (mz == NULL) {                                       \
 247                         virt = NULL;                                    \
 248                         phys = 0;                                       \
 249                 } else {                                                \
 250                         memset(mz->addr, 0, size);                      \
 251                         virt = mz->addr;                                \
 252                         phys = mz->iova;                                \
 253                 }                                                       \
 254         } while (0)
 255
 256 #define ENA_MEM_ALLOC_NODE(dmadev, size, virt, node, dev_node) \
 257         do {                                                            \
 258                 ENA_TOUCH(dmadev); ENA_TOUCH(dev_node);                 \
 259                 virt = rte_zmalloc_socket(NULL, size, 0, node);         \
 260         } while (0)
 261
 262 #define ENA_MEM_ALLOC(dmadev, size) rte_zmalloc(NULL, size, 1)
 263 #define ENA_MEM_FREE(dmadev, ptr) ({ENA_TOUCH(dmadev); rte_free(ptr); })
 264
 265 #define ENA_DB_SYNC(mem_handle) ((void)mem_handle)
 266
 267 #define ENA_REG_WRITE32(bus, value, reg)                                \
 268         ({ (void)(bus); rte_write32((value), (reg)); })
 269 #define ENA_REG_WRITE32_RELAXED(bus, value, reg)                        \
 270         ({ (void)(bus); rte_write32_relaxed((value), (reg)); })
 271 #define ENA_REG_READ32(bus, reg)                                        \
 272         ({ (void)(bus); rte_read32_relaxed((reg)); })
 273
 274 #define ATOMIC32_INC(i32_ptr) rte_atomic32_inc(i32_ptr)
 275 #define ATOMIC32_DEC(i32_ptr) rte_atomic32_dec(i32_ptr)
 276 #define ATOMIC32_SET(i32_ptr, val) rte_atomic32_set(i32_ptr, val)
 277 #define ATOMIC32_READ(i32_ptr) rte_atomic32_read(i32_ptr)
 278
 279 #define msleep(x) rte_delay_us(x * 1000)
 280 #define udelay(x) rte_delay_us(x)
 281
 282 #define dma_rmb() rmb()
 283
 284 #define MAX_ERRNO       4095
 285 #define IS_ERR(x) (((unsigned long)x) >= (unsigned long)-MAX_ERRNO)
 286 #define ERR_PTR(error) ((void *)(long)error)
 287 #define PTR_ERR(error) ((long)(void *)error)
 288 #define might_sleep()
 289
 290 #define prefetch(x) rte_prefetch0(x)
 291
 292 #define lower_32_bits(x) ((uint32_t)(x))
 293 #define upper_32_bits(x) ((uint32_t)(((x) >> 16) >> 16))
 294
 295 #define ENA_TIME_EXPIRE(timeout)  (timeout < rte_get_timer_cycles())
 296 #define ENA_GET_SYSTEM_TIMEOUT(timeout_us)                              \
 297     (timeout_us * rte_get_timer_hz() / 1000000 + rte_get_timer_cycles())
 298 #define ENA_WAIT_EVENT_DESTROY(waitqueue) ((void)(waitqueue))
 299
 300 #ifndef READ_ONCE
 301 #define READ_ONCE(var) (*((volatile typeof(var) *)(&(var))))
 302 #endif
 303
 304 #define READ_ONCE8(var) READ_ONCE(var)
 305 #define READ_ONCE16(var) READ_ONCE(var)
 306 #define READ_ONCE32(var) READ_ONCE(var)
 307
 308 /* The size must be 8 byte align */
 309 #define ENA_MEMCPY_TO_DEVICE_64(dst, src, size)                         \
 310         do {                                                            \
 311                 int count, i;                                           \
 312                 uint64_t *to = (uint64_t *)(dst);                       \
 313                 const uint64_t *from = (const uint64_t *)(src);         \
 314                 count = (size) / 8;                                     \
 315                 for (i = 0; i < count; i++, from++, to++)               \
 316                         rte_write64_relaxed(*from, to);                 \
 317         } while(0)
 318
 319 #define DIV_ROUND_UP(n, d) (((n) + (d) - 1) / (d))
 320
 321 #endif /* DPDK_ENA_COM_ENA_PLAT_DPDK_H_ */