drivers/net/enetc/enetc_ethdev.c

   1 /* SPDX-License-Identifier: BSD-3-Clause
   2  * Copyright 2018-2019 NXP
   3  */
   4
   5 #include <stdbool.h>
   6 #include <rte_ethdev_pci.h>
   7 #include <rte_random.h>
   8
   9 #include "enetc_logs.h"
  10 #include "enetc.h"
  11
  12 int enetc_logtype_pmd;
  13
  14 static int
  15 enetc_dev_start(struct rte_eth_dev *dev)
  16 {
  17         struct enetc_eth_hw *hw =
  18                 ENETC_DEV_PRIVATE_TO_HW(dev->data->dev_private);
  19         struct enetc_hw *enetc_hw = &hw->hw;
  20         uint32_t val;
  21
  22         PMD_INIT_FUNC_TRACE();
  23         val = enetc_port_rd(enetc_hw, ENETC_PM0_CMD_CFG);
  24         enetc_port_wr(enetc_hw, ENETC_PM0_CMD_CFG,
  25                       val | ENETC_PM0_TX_EN | ENETC_PM0_RX_EN);
  26
  27         /* Enable port */
  28         val = enetc_port_rd(enetc_hw, ENETC_PMR);
  29         enetc_port_wr(enetc_hw, ENETC_PMR, val | ENETC_PMR_EN);
  30
  31         /* set auto-speed for RGMII */
  32         if (enetc_port_rd(enetc_hw, ENETC_PM0_IF_MODE) & ENETC_PMO_IFM_RG) {
  33                 enetc_port_wr(enetc_hw, ENETC_PM0_IF_MODE,
  34                               ENETC_PM0_IFM_RGAUTO);
  35                 enetc_port_wr(enetc_hw, ENETC_PM1_IF_MODE,
  36                               ENETC_PM0_IFM_RGAUTO);
  37         }
  38         if (enetc_global_rd(enetc_hw,
  39                             ENETC_G_EPFBLPR(1)) == ENETC_G_EPFBLPR1_XGMII) {
  40                 enetc_port_wr(enetc_hw, ENETC_PM0_IF_MODE,
  41                               ENETC_PM0_IFM_XGMII);
  42                 enetc_port_wr(enetc_hw, ENETC_PM1_IF_MODE,
  43                               ENETC_PM0_IFM_XGMII);
  44         }
  45
  46         return 0;
  47 }
  48
  49 static void
  50 enetc_dev_stop(struct rte_eth_dev *dev)
  51 {
  52         struct enetc_eth_hw *hw =
  53                 ENETC_DEV_PRIVATE_TO_HW(dev->data->dev_private);
  54         struct enetc_hw *enetc_hw = &hw->hw;
  55         uint32_t val;
  56
  57         PMD_INIT_FUNC_TRACE();
  58         /* Disable port */
  59         val = enetc_port_rd(enetc_hw, ENETC_PMR);
  60         enetc_port_wr(enetc_hw, ENETC_PMR, val & (~ENETC_PMR_EN));
  61
  62         val = enetc_port_rd(enetc_hw, ENETC_PM0_CMD_CFG);
  63         enetc_port_wr(enetc_hw, ENETC_PM0_CMD_CFG,
  64                       val & (~(ENETC_PM0_TX_EN | ENETC_PM0_RX_EN)));
  65 }
  66
  67 static const uint32_t *
  68 enetc_supported_ptypes_get(struct rte_eth_dev *dev __rte_unused)
  69 {
  70         static const uint32_t ptypes[] = {
  71                 RTE_PTYPE_L2_ETHER,
  72                 RTE_PTYPE_L3_IPV4,
  73                 RTE_PTYPE_L3_IPV6,
  74                 RTE_PTYPE_L4_TCP,
  75                 RTE_PTYPE_L4_UDP,
  76                 RTE_PTYPE_L4_SCTP,
  77                 RTE_PTYPE_L4_ICMP,
  78                 RTE_PTYPE_UNKNOWN
  79         };
  80
  81         return ptypes;
  82 }
  83
  84 /* return 0 means link status changed, -1 means not changed */
  85 static int
  86 enetc_link_update(struct rte_eth_dev *dev, int wait_to_complete __rte_unused)
  87 {
  88         struct enetc_eth_hw *hw =
  89                 ENETC_DEV_PRIVATE_TO_HW(dev->data->dev_private);
  90         struct enetc_hw *enetc_hw = &hw->hw;
  91         struct rte_eth_link link;
  92         uint32_t status;
  93
  94         PMD_INIT_FUNC_TRACE();
  95
  96         memset(&link, 0, sizeof(link));
  97
  98         status = enetc_port_rd(enetc_hw, ENETC_PM0_STATUS);
  99
 100         if (status & ENETC_LINK_MODE)
 101                 link.link_duplex = ETH_LINK_FULL_DUPLEX;
 102         else
 103                 link.link_duplex = ETH_LINK_HALF_DUPLEX;
 104
 105         if (status & ENETC_LINK_STATUS)
 106                 link.link_status = ETH_LINK_UP;
 107         else
 108                 link.link_status = ETH_LINK_DOWN;
 109
 110         switch (status & ENETC_LINK_SPEED_MASK) {
 111         case ENETC_LINK_SPEED_1G:
 112                 link.link_speed = ETH_SPEED_NUM_1G;
 113                 break;
 114
 115         case ENETC_LINK_SPEED_100M:
 116                 link.link_speed = ETH_SPEED_NUM_100M;
 117                 break;
 118
 119         default:
 120         case ENETC_LINK_SPEED_10M:
 121                 link.link_speed = ETH_SPEED_NUM_10M;
 122         }
 123
 124         return rte_eth_linkstatus_set(dev, &link);
 125 }
 126
 127 static void
 128 print_ethaddr(const char *name, const struct rte_ether_addr *eth_addr)
 129 {
 130         char buf[RTE_ETHER_ADDR_FMT_SIZE];
 131
 132         rte_ether_format_addr(buf, RTE_ETHER_ADDR_FMT_SIZE, eth_addr);
 133         ENETC_PMD_NOTICE("%s%s\n", name, buf);
 134 }
 135
 136 static int
 137 enetc_hardware_init(struct enetc_eth_hw *hw)
 138 {
 139         struct enetc_hw *enetc_hw = &hw->hw;
 140         uint32_t *mac = (uint32_t *)hw->mac.addr;
 141         uint32_t high_mac = 0;
 142         uint16_t low_mac = 0;
 143
 144         PMD_INIT_FUNC_TRACE();
 145         /* Calculating and storing the base HW addresses */
 146         hw->hw.port = (void *)((size_t)hw->hw.reg + ENETC_PORT_BASE);
 147         hw->hw.global = (void *)((size_t)hw->hw.reg + ENETC_GLOBAL_BASE);
 148
 149         /* Enabling Station Interface */
 150         enetc_wr(enetc_hw, ENETC_SIMR, ENETC_SIMR_EN);
 151
 152         *mac = (uint32_t)enetc_port_rd(enetc_hw, ENETC_PSIPMAR0(0));
 153         high_mac = (uint32_t)*mac;
 154         mac++;
 155         *mac = (uint16_t)enetc_port_rd(enetc_hw, ENETC_PSIPMAR1(0));
 156         low_mac = (uint16_t)*mac;
 157
 158         if ((high_mac | low_mac) == 0) {
 159                 char *first_byte;
 160
 161                 ENETC_PMD_NOTICE("MAC is not available for this SI, "
 162                                 "set random MAC\n");
 163                 mac = (uint32_t *)hw->mac.addr;
 164                 *mac = (uint32_t)rte_rand();
 165                 first_byte = (char *)mac;
 166                 *first_byte &= 0xfe;    /* clear multicast bit */
 167                 *first_byte |= 0x02;    /* set local assignment bit (IEEE802) */
 168
 169                 enetc_port_wr(enetc_hw, ENETC_PSIPMAR0(0), *mac);
 170                 mac++;
 171                 *mac = (uint16_t)rte_rand();
 172                 enetc_port_wr(enetc_hw, ENETC_PSIPMAR1(0), *mac);
 173                 print_ethaddr("New address: ",
 174                               (const struct rte_ether_addr *)hw->mac.addr);
 175         }
 176
 177         return 0;
 178 }
 179
 180 static int
 181 enetc_dev_infos_get(struct rte_eth_dev *dev __rte_unused,
 182                     struct rte_eth_dev_info *dev_info)
 183 {
 184         PMD_INIT_FUNC_TRACE();
 185         dev_info->rx_desc_lim = (struct rte_eth_desc_lim) {
 186                 .nb_max = MAX_BD_COUNT,
 187                 .nb_min = MIN_BD_COUNT,
 188                 .nb_align = BD_ALIGN,
 189         };
 190         dev_info->tx_desc_lim = (struct rte_eth_desc_lim) {
 191                 .nb_max = MAX_BD_COUNT,
 192                 .nb_min = MIN_BD_COUNT,
 193                 .nb_align = BD_ALIGN,
 194         };
 195         dev_info->max_rx_queues = MAX_RX_RINGS;
 196         dev_info->max_tx_queues = MAX_TX_RINGS;
 197         dev_info->max_rx_pktlen = ENETC_MAC_MAXFRM_SIZE;
 198         dev_info->rx_offload_capa =
 199                 (DEV_RX_OFFLOAD_IPV4_CKSUM |
 200                  DEV_RX_OFFLOAD_UDP_CKSUM |
 201                  DEV_RX_OFFLOAD_TCP_CKSUM |
 202                  DEV_RX_OFFLOAD_KEEP_CRC |
 203                  DEV_RX_OFFLOAD_JUMBO_FRAME);
 204
 205         return 0;
 206 }
 207
 208 static int
 209 enetc_alloc_txbdr(struct enetc_bdr *txr, uint16_t nb_desc)
 210 {
 211         int size;
 212
 213         size = nb_desc * sizeof(struct enetc_swbd);
 214         txr->q_swbd = rte_malloc(NULL, size, ENETC_BD_RING_ALIGN);
 215         if (txr->q_swbd == NULL)
 216                 return -ENOMEM;
 217
 218         size = nb_desc * sizeof(struct enetc_tx_bd);
 219         txr->bd_base = rte_malloc(NULL, size, ENETC_BD_RING_ALIGN);
 220         if (txr->bd_base == NULL) {
 221                 rte_free(txr->q_swbd);
 222                 txr->q_swbd = NULL;
 223                 return -ENOMEM;
 224         }
 225
 226         txr->bd_count = nb_desc;
 227         txr->next_to_clean = 0;
 228         txr->next_to_use = 0;
 229
 230         return 0;
 231 }
 232
 233 static void
 234 enetc_free_bdr(struct enetc_bdr *rxr)
 235 {
 236         rte_free(rxr->q_swbd);
 237         rte_free(rxr->bd_base);
 238         rxr->q_swbd = NULL;
 239         rxr->bd_base = NULL;
 240 }
 241
 242 static void
 243 enetc_setup_txbdr(struct enetc_hw *hw, struct enetc_bdr *tx_ring)
 244 {
 245         int idx = tx_ring->index;
 246         phys_addr_t bd_address;
 247
 248         bd_address = (phys_addr_t)
 249                      rte_mem_virt2iova((const void *)tx_ring->bd_base);
 250         enetc_txbdr_wr(hw, idx, ENETC_TBBAR0,
 251                        lower_32_bits((uint64_t)bd_address));
 252         enetc_txbdr_wr(hw, idx, ENETC_TBBAR1,
 253                        upper_32_bits((uint64_t)bd_address));
 254         enetc_txbdr_wr(hw, idx, ENETC_TBLENR,
 255                        ENETC_RTBLENR_LEN(tx_ring->bd_count));
 256
 257         enetc_txbdr_wr(hw, idx, ENETC_TBCIR, 0);
 258         enetc_txbdr_wr(hw, idx, ENETC_TBCISR, 0);
 259         tx_ring->tcir = (void *)((size_t)hw->reg +
 260                         ENETC_BDR(TX, idx, ENETC_TBCIR));
 261         tx_ring->tcisr = (void *)((size_t)hw->reg +
 262                          ENETC_BDR(TX, idx, ENETC_TBCISR));
 263 }
 264
 265 static int
 266 enetc_tx_queue_setup(struct rte_eth_dev *dev,
 267                      uint16_t queue_idx,
 268                      uint16_t nb_desc,
 269                      unsigned int socket_id __rte_unused,
 270                      const struct rte_eth_txconf *tx_conf)
 271 {
 272         int err = 0;
 273         struct enetc_bdr *tx_ring;
 274         struct rte_eth_dev_data *data = dev->data;
 275         struct enetc_eth_adapter *priv =
 276                         ENETC_DEV_PRIVATE(data->dev_private);
 277
 278         PMD_INIT_FUNC_TRACE();
 279         if (nb_desc > MAX_BD_COUNT)
 280                 return -1;
 281
 282         tx_ring = rte_zmalloc(NULL, sizeof(struct enetc_bdr), 0);
 283         if (tx_ring == NULL) {
 284                 ENETC_PMD_ERR("Failed to allocate TX ring memory");
 285                 err = -ENOMEM;
 286                 return -1;
 287         }
 288
 289         err = enetc_alloc_txbdr(tx_ring, nb_desc);
 290         if (err)
 291                 goto fail;
 292
 293         tx_ring->index = queue_idx;
 294         tx_ring->ndev = dev;
 295         enetc_setup_txbdr(&priv->hw.hw, tx_ring);
 296         data->tx_queues[queue_idx] = tx_ring;
 297
 298         if (!tx_conf->tx_deferred_start) {
 299                 /* enable ring */
 300                 enetc_txbdr_wr(&priv->hw.hw, tx_ring->index,
 301                                ENETC_TBMR, ENETC_TBMR_EN);
 302                 dev->data->tx_queue_state[tx_ring->index] =
 303                                RTE_ETH_QUEUE_STATE_STARTED;
 304         } else {
 305                 dev->data->tx_queue_state[tx_ring->index] =
 306                                RTE_ETH_QUEUE_STATE_STOPPED;
 307         }
 308
 309         return 0;
 310 fail:
 311         rte_free(tx_ring);
 312
 313         return err;
 314 }
 315
 316 static void
 317 enetc_tx_queue_release(void *txq)
 318 {
 319         if (txq == NULL)
 320                 return;
 321
 322         struct enetc_bdr *tx_ring = (struct enetc_bdr *)txq;
 323         struct enetc_eth_hw *eth_hw =
 324                 ENETC_DEV_PRIVATE_TO_HW(tx_ring->ndev->data->dev_private);
 325         struct enetc_hw *hw;
 326         struct enetc_swbd *tx_swbd;
 327         int i;
 328         uint32_t val;
 329
 330         /* Disable the ring */
 331         hw = &eth_hw->hw;
 332         val = enetc_txbdr_rd(hw, tx_ring->index, ENETC_TBMR);
 333         val &= (~ENETC_TBMR_EN);
 334         enetc_txbdr_wr(hw, tx_ring->index, ENETC_TBMR, val);
 335
 336         /* clean the ring*/
 337         i = tx_ring->next_to_clean;
 338         tx_swbd = &tx_ring->q_swbd[i];
 339         while (tx_swbd->buffer_addr != NULL) {
 340                 rte_pktmbuf_free(tx_swbd->buffer_addr);
 341                 tx_swbd->buffer_addr = NULL;
 342                 tx_swbd++;
 343                 i++;
 344                 if (unlikely(i == tx_ring->bd_count)) {
 345                         i = 0;
 346                         tx_swbd = &tx_ring->q_swbd[i];
 347                 }
 348         }
 349
 350         enetc_free_bdr(tx_ring);
 351         rte_free(tx_ring);
 352 }
 353
 354 static int
 355 enetc_alloc_rxbdr(struct enetc_bdr *rxr,
 356                   uint16_t nb_rx_desc)
 357 {
 358         int size;
 359
 360         size = nb_rx_desc * sizeof(struct enetc_swbd);
 361         rxr->q_swbd = rte_malloc(NULL, size, ENETC_BD_RING_ALIGN);
 362         if (rxr->q_swbd == NULL)
 363                 return -ENOMEM;
 364
 365         size = nb_rx_desc * sizeof(union enetc_rx_bd);
 366         rxr->bd_base = rte_malloc(NULL, size, ENETC_BD_RING_ALIGN);
 367         if (rxr->bd_base == NULL) {
 368                 rte_free(rxr->q_swbd);
 369                 rxr->q_swbd = NULL;
 370                 return -ENOMEM;
 371         }
 372
 373         rxr->bd_count = nb_rx_desc;
 374         rxr->next_to_clean = 0;
 375         rxr->next_to_use = 0;
 376         rxr->next_to_alloc = 0;
 377
 378         return 0;
 379 }
 380
 381 static void
 382 enetc_setup_rxbdr(struct enetc_hw *hw, struct enetc_bdr *rx_ring,
 383                   struct rte_mempool *mb_pool)
 384 {
 385         int idx = rx_ring->index;
 386         uint16_t buf_size;
 387         phys_addr_t bd_address;
 388
 389         bd_address = (phys_addr_t)
 390                      rte_mem_virt2iova((const void *)rx_ring->bd_base);
 391         enetc_rxbdr_wr(hw, idx, ENETC_RBBAR0,
 392                        lower_32_bits((uint64_t)bd_address));
 393         enetc_rxbdr_wr(hw, idx, ENETC_RBBAR1,
 394                        upper_32_bits((uint64_t)bd_address));
 395         enetc_rxbdr_wr(hw, idx, ENETC_RBLENR,
 396                        ENETC_RTBLENR_LEN(rx_ring->bd_count));
 397
 398         rx_ring->mb_pool = mb_pool;
 399         rx_ring->rcir = (void *)((size_t)hw->reg +
 400                         ENETC_BDR(RX, idx, ENETC_RBCIR));
 401         enetc_refill_rx_ring(rx_ring, (enetc_bd_unused(rx_ring)));
 402         buf_size = (uint16_t)(rte_pktmbuf_data_room_size(rx_ring->mb_pool) -
 403                    RTE_PKTMBUF_HEADROOM);
 404         enetc_rxbdr_wr(hw, idx, ENETC_RBBSR, buf_size);
 405         enetc_rxbdr_wr(hw, idx, ENETC_RBPIR, 0);
 406 }
 407
 408 static int
 409 enetc_rx_queue_setup(struct rte_eth_dev *dev,
 410                      uint16_t rx_queue_id,
 411                      uint16_t nb_rx_desc,
 412                      unsigned int socket_id __rte_unused,
 413                      const struct rte_eth_rxconf *rx_conf,
 414                      struct rte_mempool *mb_pool)
 415 {
 416         int err = 0;
 417         struct enetc_bdr *rx_ring;
 418         struct rte_eth_dev_data *data =  dev->data;
 419         struct enetc_eth_adapter *adapter =
 420                         ENETC_DEV_PRIVATE(data->dev_private);
 421         uint64_t rx_offloads = data->dev_conf.rxmode.offloads;
 422
 423         PMD_INIT_FUNC_TRACE();
 424         if (nb_rx_desc > MAX_BD_COUNT)
 425                 return -1;
 426
 427         rx_ring = rte_zmalloc(NULL, sizeof(struct enetc_bdr), 0);
 428         if (rx_ring == NULL) {
 429                 ENETC_PMD_ERR("Failed to allocate RX ring memory");
 430                 err = -ENOMEM;
 431                 return err;
 432         }
 433
 434         err = enetc_alloc_rxbdr(rx_ring, nb_rx_desc);
 435         if (err)
 436                 goto fail;
 437
 438         rx_ring->index = rx_queue_id;
 439         rx_ring->ndev = dev;
 440         enetc_setup_rxbdr(&adapter->hw.hw, rx_ring, mb_pool);
 441         data->rx_queues[rx_queue_id] = rx_ring;
 442
 443         if (!rx_conf->rx_deferred_start) {
 444                 /* enable ring */
 445                 enetc_rxbdr_wr(&adapter->hw.hw, rx_ring->index, ENETC_RBMR,
 446                                ENETC_RBMR_EN);
 447                 dev->data->rx_queue_state[rx_ring->index] =
 448                                RTE_ETH_QUEUE_STATE_STARTED;
 449         } else {
 450                 dev->data->rx_queue_state[rx_ring->index] =
 451                                RTE_ETH_QUEUE_STATE_STOPPED;
 452         }
 453
 454         rx_ring->crc_len = (uint8_t)((rx_offloads & DEV_RX_OFFLOAD_KEEP_CRC) ?
 455                                      RTE_ETHER_CRC_LEN : 0);
 456
 457         return 0;
 458 fail:
 459         rte_free(rx_ring);
 460
 461         return err;
 462 }
 463
 464 static void
 465 enetc_rx_queue_release(void *rxq)
 466 {
 467         if (rxq == NULL)
 468                 return;
 469
 470         struct enetc_bdr *rx_ring = (struct enetc_bdr *)rxq;
 471         struct enetc_eth_hw *eth_hw =
 472                 ENETC_DEV_PRIVATE_TO_HW(rx_ring->ndev->data->dev_private);
 473         struct enetc_swbd *q_swbd;
 474         struct enetc_hw *hw;
 475         uint32_t val;
 476         int i;
 477
 478         /* Disable the ring */
 479         hw = &eth_hw->hw;
 480         val = enetc_rxbdr_rd(hw, rx_ring->index, ENETC_RBMR);
 481         val &= (~ENETC_RBMR_EN);
 482         enetc_rxbdr_wr(hw, rx_ring->index, ENETC_RBMR, val);
 483
 484         /* Clean the ring */
 485         i = rx_ring->next_to_clean;
 486         q_swbd = &rx_ring->q_swbd[i];
 487         while (i != rx_ring->next_to_use) {
 488                 rte_pktmbuf_free(q_swbd->buffer_addr);
 489                 q_swbd->buffer_addr = NULL;
 490                 q_swbd++;
 491                 i++;
 492                 if (unlikely(i == rx_ring->bd_count)) {
 493                         i = 0;
 494                         q_swbd = &rx_ring->q_swbd[i];
 495                 }
 496         }
 497
 498         enetc_free_bdr(rx_ring);
 499         rte_free(rx_ring);
 500 }
 501
 502 static
 503 int enetc_stats_get(struct rte_eth_dev *dev,
 504                     struct rte_eth_stats *stats)
 505 {
 506         struct enetc_eth_hw *hw =
 507                 ENETC_DEV_PRIVATE_TO_HW(dev->data->dev_private);
 508         struct enetc_hw *enetc_hw = &hw->hw;
 509
 510         /* Total received packets, bad + good, if we want to get counters of
 511          * only good received packets then use ENETC_PM0_RFRM,
 512          * ENETC_PM0_TFRM registers.
 513          */
 514         stats->ipackets = enetc_port_rd(enetc_hw, ENETC_PM0_RPKT);
 515         stats->opackets = enetc_port_rd(enetc_hw, ENETC_PM0_TPKT);
 516         stats->ibytes =  enetc_port_rd(enetc_hw, ENETC_PM0_REOCT);
 517         stats->obytes = enetc_port_rd(enetc_hw, ENETC_PM0_TEOCT);
 518         /* Dropped + Truncated packets, use ENETC_PM0_RDRNTP for without
 519          * truncated packets
 520          */
 521         stats->imissed = enetc_port_rd(enetc_hw, ENETC_PM0_RDRP);
 522         stats->ierrors = enetc_port_rd(enetc_hw, ENETC_PM0_RERR);
 523         stats->oerrors = enetc_port_rd(enetc_hw, ENETC_PM0_TERR);
 524
 525         return 0;
 526 }
 527
 528 static int
 529 enetc_stats_reset(struct rte_eth_dev *dev)
 530 {
 531         struct enetc_eth_hw *hw =
 532                 ENETC_DEV_PRIVATE_TO_HW(dev->data->dev_private);
 533         struct enetc_hw *enetc_hw = &hw->hw;
 534
 535         enetc_port_wr(enetc_hw, ENETC_PM0_STAT_CONFIG, ENETC_CLEAR_STATS);
 536
 537         return 0;
 538 }
 539
 540 static void
 541 enetc_dev_close(struct rte_eth_dev *dev)
 542 {
 543         uint16_t i;
 544
 545         PMD_INIT_FUNC_TRACE();
 546         enetc_dev_stop(dev);
 547
 548         for (i = 0; i < dev->data->nb_rx_queues; i++) {
 549                 enetc_rx_queue_release(dev->data->rx_queues[i]);
 550                 dev->data->rx_queues[i] = NULL;
 551         }
 552         dev->data->nb_rx_queues = 0;
 553
 554         for (i = 0; i < dev->data->nb_tx_queues; i++) {
 555                 enetc_tx_queue_release(dev->data->tx_queues[i]);
 556                 dev->data->tx_queues[i] = NULL;
 557         }
 558         dev->data->nb_tx_queues = 0;
 559 }
 560
 561 static int
 562 enetc_promiscuous_enable(struct rte_eth_dev *dev)
 563 {
 564         struct enetc_eth_hw *hw =
 565                 ENETC_DEV_PRIVATE_TO_HW(dev->data->dev_private);
 566         struct enetc_hw *enetc_hw = &hw->hw;
 567         uint32_t psipmr = 0;
 568
 569         psipmr = enetc_port_rd(enetc_hw, ENETC_PSIPMR);
 570
 571         /* Setting to enable promiscuous mode*/
 572         psipmr |= ENETC_PSIPMR_SET_UP(0) | ENETC_PSIPMR_SET_MP(0);
 573
 574         enetc_port_wr(enetc_hw, ENETC_PSIPMR, psipmr);
 575
 576         return 0;
 577 }
 578
 579 static int
 580 enetc_promiscuous_disable(struct rte_eth_dev *dev)
 581 {
 582         struct enetc_eth_hw *hw =
 583                 ENETC_DEV_PRIVATE_TO_HW(dev->data->dev_private);
 584         struct enetc_hw *enetc_hw = &hw->hw;
 585         uint32_t psipmr = 0;
 586
 587         /* Setting to disable promiscuous mode for SI0*/
 588         psipmr = enetc_port_rd(enetc_hw, ENETC_PSIPMR);
 589         psipmr &= (~ENETC_PSIPMR_SET_UP(0));
 590
 591         if (dev->data->all_multicast == 0)
 592                 psipmr &= (~ENETC_PSIPMR_SET_MP(0));
 593
 594         enetc_port_wr(enetc_hw, ENETC_PSIPMR, psipmr);
 595
 596         return 0;
 597 }
 598
 599 static int
 600 enetc_allmulticast_enable(struct rte_eth_dev *dev)
 601 {
 602         struct enetc_eth_hw *hw =
 603                 ENETC_DEV_PRIVATE_TO_HW(dev->data->dev_private);
 604         struct enetc_hw *enetc_hw = &hw->hw;
 605         uint32_t psipmr = 0;
 606
 607         psipmr = enetc_port_rd(enetc_hw, ENETC_PSIPMR);
 608
 609         /* Setting to enable allmulticast mode for SI0*/
 610         psipmr |= ENETC_PSIPMR_SET_MP(0);
 611
 612         enetc_port_wr(enetc_hw, ENETC_PSIPMR, psipmr);
 613
 614         return 0;
 615 }
 616
 617 static int
 618 enetc_allmulticast_disable(struct rte_eth_dev *dev)
 619 {
 620         struct enetc_eth_hw *hw =
 621                 ENETC_DEV_PRIVATE_TO_HW(dev->data->dev_private);
 622         struct enetc_hw *enetc_hw = &hw->hw;
 623         uint32_t psipmr = 0;
 624
 625         if (dev->data->promiscuous == 1)
 626                 return 0; /* must remain in all_multicast mode */
 627
 628         /* Setting to disable all multicast mode for SI0*/
 629         psipmr = enetc_port_rd(enetc_hw, ENETC_PSIPMR) &
 630                                ~(ENETC_PSIPMR_SET_MP(0));
 631
 632         enetc_port_wr(enetc_hw, ENETC_PSIPMR, psipmr);
 633
 634         return 0;
 635 }
 636
 637 static int
 638 enetc_mtu_set(struct rte_eth_dev *dev, uint16_t mtu)
 639 {
 640         struct enetc_eth_hw *hw =
 641                 ENETC_DEV_PRIVATE_TO_HW(dev->data->dev_private);
 642         struct enetc_hw *enetc_hw = &hw->hw;
 643         uint32_t frame_size = mtu + RTE_ETHER_HDR_LEN + RTE_ETHER_CRC_LEN;
 644
 645         /* check that mtu is within the allowed range */
 646         if (mtu < ENETC_MAC_MINFRM_SIZE || frame_size > ENETC_MAC_MAXFRM_SIZE)
 647                 return -EINVAL;
 648
 649         /*
 650          * Refuse mtu that requires the support of scattered packets
 651          * when this feature has not been enabled before.
 652          */
 653         if (dev->data->min_rx_buf_size &&
 654                 !dev->data->scattered_rx && frame_size >
 655                 dev->data->min_rx_buf_size - RTE_PKTMBUF_HEADROOM) {
 656                 ENETC_PMD_ERR("SG not enabled, will not fit in one buffer");
 657                 return -EINVAL;
 658         }
 659
 660         if (frame_size > RTE_ETHER_MAX_LEN)
 661                 dev->data->dev_conf.rxmode.offloads &=
 662                                                 DEV_RX_OFFLOAD_JUMBO_FRAME;
 663         else
 664                 dev->data->dev_conf.rxmode.offloads &=
 665                                                 ~DEV_RX_OFFLOAD_JUMBO_FRAME;
 666
 667         enetc_port_wr(enetc_hw, ENETC_PTCMSDUR(0), ENETC_MAC_MAXFRM_SIZE);
 668         enetc_port_wr(enetc_hw, ENETC_PTXMBAR, 2 * ENETC_MAC_MAXFRM_SIZE);
 669
 670         dev->data->dev_conf.rxmode.max_rx_pkt_len = frame_size;
 671
 672         /*setting the MTU*/
 673         enetc_port_wr(enetc_hw, ENETC_PM0_MAXFRM, ENETC_SET_MAXFRM(frame_size) |
 674                       ENETC_SET_TX_MTU(ENETC_MAC_MAXFRM_SIZE));
 675
 676         return 0;
 677 }
 678
 679 static int
 680 enetc_dev_configure(struct rte_eth_dev *dev)
 681 {
 682         struct enetc_eth_hw *hw =
 683                 ENETC_DEV_PRIVATE_TO_HW(dev->data->dev_private);
 684         struct enetc_hw *enetc_hw = &hw->hw;
 685         struct rte_eth_conf *eth_conf = &dev->data->dev_conf;
 686         uint64_t rx_offloads = eth_conf->rxmode.offloads;
 687         uint32_t checksum = L3_CKSUM | L4_CKSUM;
 688
 689         PMD_INIT_FUNC_TRACE();
 690
 691         if (rx_offloads & DEV_RX_OFFLOAD_JUMBO_FRAME) {
 692                 uint32_t max_len;
 693
 694                 max_len = dev->data->dev_conf.rxmode.max_rx_pkt_len;
 695
 696                 enetc_port_wr(enetc_hw, ENETC_PM0_MAXFRM,
 697                               ENETC_SET_MAXFRM(max_len));
 698                 enetc_port_wr(enetc_hw, ENETC_PTCMSDUR(0),
 699                               ENETC_MAC_MAXFRM_SIZE);
 700                 enetc_port_wr(enetc_hw, ENETC_PTXMBAR,
 701                               2 * ENETC_MAC_MAXFRM_SIZE);
 702                 dev->data->mtu = RTE_ETHER_MAX_LEN - RTE_ETHER_HDR_LEN -
 703                         RTE_ETHER_CRC_LEN;
 704         }
 705
 706         if (rx_offloads & DEV_RX_OFFLOAD_KEEP_CRC) {
 707                 int config;
 708
 709                 config = enetc_port_rd(enetc_hw, ENETC_PM0_CMD_CFG);
 710                 config |= ENETC_PM0_CRC;
 711                 enetc_port_wr(enetc_hw, ENETC_PM0_CMD_CFG, config);
 712         }
 713
 714         if (rx_offloads & DEV_RX_OFFLOAD_IPV4_CKSUM)
 715                 checksum &= ~L3_CKSUM;
 716
 717         if (rx_offloads & (DEV_RX_OFFLOAD_UDP_CKSUM | DEV_RX_OFFLOAD_TCP_CKSUM))
 718                 checksum &= ~L4_CKSUM;
 719
 720         enetc_port_wr(enetc_hw, ENETC_PAR_PORT_CFG, checksum);
 721
 722
 723         return 0;
 724 }
 725
 726 static int
 727 enetc_rx_queue_start(struct rte_eth_dev *dev, uint16_t qidx)
 728 {
 729         struct enetc_eth_adapter *priv =
 730                         ENETC_DEV_PRIVATE(dev->data->dev_private);
 731         struct enetc_bdr *rx_ring;
 732         uint32_t rx_data;
 733
 734         rx_ring = dev->data->rx_queues[qidx];
 735         if (dev->data->rx_queue_state[qidx] == RTE_ETH_QUEUE_STATE_STOPPED) {
 736                 rx_data = enetc_rxbdr_rd(&priv->hw.hw, rx_ring->index,
 737                                          ENETC_RBMR);
 738                 rx_data = rx_data | ENETC_RBMR_EN;
 739                 enetc_rxbdr_wr(&priv->hw.hw, rx_ring->index, ENETC_RBMR,
 740                                rx_data);
 741                 dev->data->rx_queue_state[qidx] = RTE_ETH_QUEUE_STATE_STARTED;
 742         }
 743
 744         return 0;
 745 }
 746
 747 static int
 748 enetc_rx_queue_stop(struct rte_eth_dev *dev, uint16_t qidx)
 749 {
 750         struct enetc_eth_adapter *priv =
 751                         ENETC_DEV_PRIVATE(dev->data->dev_private);
 752         struct enetc_bdr *rx_ring;
 753         uint32_t rx_data;
 754
 755         rx_ring = dev->data->rx_queues[qidx];
 756         if (dev->data->rx_queue_state[qidx] == RTE_ETH_QUEUE_STATE_STARTED) {
 757                 rx_data = enetc_rxbdr_rd(&priv->hw.hw, rx_ring->index,
 758                                          ENETC_RBMR);
 759                 rx_data = rx_data & (~ENETC_RBMR_EN);
 760                 enetc_rxbdr_wr(&priv->hw.hw, rx_ring->index, ENETC_RBMR,
 761                                rx_data);
 762                 dev->data->rx_queue_state[qidx] = RTE_ETH_QUEUE_STATE_STOPPED;
 763         }
 764
 765         return 0;
 766 }
 767
 768 static int
 769 enetc_tx_queue_start(struct rte_eth_dev *dev, uint16_t qidx)
 770 {
 771         struct enetc_eth_adapter *priv =
 772                         ENETC_DEV_PRIVATE(dev->data->dev_private);
 773         struct enetc_bdr *tx_ring;
 774         uint32_t tx_data;
 775
 776         tx_ring = dev->data->tx_queues[qidx];
 777         if (dev->data->tx_queue_state[qidx] == RTE_ETH_QUEUE_STATE_STOPPED) {
 778                 tx_data = enetc_txbdr_rd(&priv->hw.hw, tx_ring->index,
 779                                          ENETC_TBMR);
 780                 tx_data = tx_data | ENETC_TBMR_EN;
 781                 enetc_txbdr_wr(&priv->hw.hw, tx_ring->index, ENETC_TBMR,
 782                                tx_data);
 783                 dev->data->tx_queue_state[qidx] = RTE_ETH_QUEUE_STATE_STARTED;
 784         }
 785
 786         return 0;
 787 }
 788
 789 static int
 790 enetc_tx_queue_stop(struct rte_eth_dev *dev, uint16_t qidx)
 791 {
 792         struct enetc_eth_adapter *priv =
 793                         ENETC_DEV_PRIVATE(dev->data->dev_private);
 794         struct enetc_bdr *tx_ring;
 795         uint32_t tx_data;
 796
 797         tx_ring = dev->data->tx_queues[qidx];
 798         if (dev->data->tx_queue_state[qidx] == RTE_ETH_QUEUE_STATE_STARTED) {
 799                 tx_data = enetc_txbdr_rd(&priv->hw.hw, tx_ring->index,
 800                                          ENETC_TBMR);
 801                 tx_data = tx_data & (~ENETC_TBMR_EN);
 802                 enetc_txbdr_wr(&priv->hw.hw, tx_ring->index, ENETC_TBMR,
 803                                tx_data);
 804                 dev->data->tx_queue_state[qidx] = RTE_ETH_QUEUE_STATE_STOPPED;
 805         }
 806
 807         return 0;
 808 }
 809
 810 /*
 811  * The set of PCI devices this driver supports
 812  */
 813 static const struct rte_pci_id pci_id_enetc_map[] = {
 814         { RTE_PCI_DEVICE(PCI_VENDOR_ID_FREESCALE, ENETC_DEV_ID) },
 815         { RTE_PCI_DEVICE(PCI_VENDOR_ID_FREESCALE, ENETC_DEV_ID_VF) },
 816         { .vendor_id = 0, /* sentinel */ },
 817 };
 818
 819 /* Features supported by this driver */
 820 static const struct eth_dev_ops enetc_ops = {
 821         .dev_configure        = enetc_dev_configure,
 822         .dev_start            = enetc_dev_start,
 823         .dev_stop             = enetc_dev_stop,
 824         .dev_close            = enetc_dev_close,
 825         .link_update          = enetc_link_update,
 826         .stats_get            = enetc_stats_get,
 827         .stats_reset          = enetc_stats_reset,
 828         .promiscuous_enable   = enetc_promiscuous_enable,
 829         .promiscuous_disable  = enetc_promiscuous_disable,
 830         .allmulticast_enable  = enetc_allmulticast_enable,
 831         .allmulticast_disable = enetc_allmulticast_disable,
 832         .dev_infos_get        = enetc_dev_infos_get,
 833         .mtu_set              = enetc_mtu_set,
 834         .rx_queue_setup       = enetc_rx_queue_setup,
 835         .rx_queue_start       = enetc_rx_queue_start,
 836         .rx_queue_stop        = enetc_rx_queue_stop,
 837         .rx_queue_release     = enetc_rx_queue_release,
 838         .tx_queue_setup       = enetc_tx_queue_setup,
 839         .tx_queue_start       = enetc_tx_queue_start,
 840         .tx_queue_stop        = enetc_tx_queue_stop,
 841         .tx_queue_release     = enetc_tx_queue_release,
 842         .dev_supported_ptypes_get = enetc_supported_ptypes_get,
 843 };
 844
 845 /**
 846  * Initialisation of the enetc device
 847  *
 848  * @param eth_dev
 849  *   - Pointer to the structure rte_eth_dev
 850  *
 851  * @return
 852  *   - On success, zero.
 853  *   - On failure, negative value.
 854  */
 855 static int
 856 enetc_dev_init(struct rte_eth_dev *eth_dev)
 857 {
 858         int error = 0;
 859         struct rte_pci_device *pci_dev = RTE_ETH_DEV_TO_PCI(eth_dev);
 860         struct enetc_eth_hw *hw =
 861                 ENETC_DEV_PRIVATE_TO_HW(eth_dev->data->dev_private);
 862
 863         PMD_INIT_FUNC_TRACE();
 864         eth_dev->dev_ops = &enetc_ops;
 865         eth_dev->rx_pkt_burst = &enetc_recv_pkts;
 866         eth_dev->tx_pkt_burst = &enetc_xmit_pkts;
 867
 868         /* Retrieving and storing the HW base address of device */
 869         hw->hw.reg = (void *)pci_dev->mem_resource[0].addr;
 870         hw->device_id = pci_dev->id.device_id;
 871
 872         error = enetc_hardware_init(hw);
 873         if (error != 0) {
 874                 ENETC_PMD_ERR("Hardware initialization failed");
 875                 return -1;
 876         }
 877
 878         /* Allocate memory for storing MAC addresses */
 879         eth_dev->data->mac_addrs = rte_zmalloc("enetc_eth",
 880                                         RTE_ETHER_ADDR_LEN, 0);
 881         if (!eth_dev->data->mac_addrs) {
 882                 ENETC_PMD_ERR("Failed to allocate %d bytes needed to "
 883                               "store MAC addresses",
 884                               RTE_ETHER_ADDR_LEN * 1);
 885                 error = -ENOMEM;
 886                 return -1;
 887         }
 888
 889         /* Copy the permanent MAC address */
 890         rte_ether_addr_copy((struct rte_ether_addr *)hw->mac.addr,
 891                         &eth_dev->data->mac_addrs[0]);
 892
 893         /* Set MTU */
 894         enetc_port_wr(&hw->hw, ENETC_PM0_MAXFRM,
 895                       ENETC_SET_MAXFRM(RTE_ETHER_MAX_LEN));
 896         eth_dev->data->mtu = RTE_ETHER_MAX_LEN - RTE_ETHER_HDR_LEN -
 897                 RTE_ETHER_CRC_LEN;
 898
 899         ENETC_PMD_DEBUG("port_id %d vendorID=0x%x deviceID=0x%x",
 900                         eth_dev->data->port_id, pci_dev->id.vendor_id,
 901                         pci_dev->id.device_id);
 902         return 0;
 903 }
 904
 905 static int
 906 enetc_dev_uninit(struct rte_eth_dev *eth_dev __rte_unused)
 907 {
 908         PMD_INIT_FUNC_TRACE();
 909         return 0;
 910 }
 911
 912 static int
 913 enetc_pci_probe(struct rte_pci_driver *pci_drv __rte_unused,
 914                            struct rte_pci_device *pci_dev)
 915 {
 916         return rte_eth_dev_pci_generic_probe(pci_dev,
 917                                              sizeof(struct enetc_eth_adapter),
 918                                              enetc_dev_init);
 919 }
 920
 921 static int
 922 enetc_pci_remove(struct rte_pci_device *pci_dev)
 923 {
 924         return rte_eth_dev_pci_generic_remove(pci_dev, enetc_dev_uninit);
 925 }
 926
 927 static struct rte_pci_driver rte_enetc_pmd = {
 928         .id_table = pci_id_enetc_map,
 929         .drv_flags = RTE_PCI_DRV_NEED_MAPPING,
 930         .probe = enetc_pci_probe,
 931         .remove = enetc_pci_remove,
 932 };
 933
 934 RTE_PMD_REGISTER_PCI(net_enetc, rte_enetc_pmd);
 935 RTE_PMD_REGISTER_PCI_TABLE(net_enetc, pci_id_enetc_map);
 936 RTE_PMD_REGISTER_KMOD_DEP(net_enetc, "* vfio-pci");
 937
 938 RTE_INIT(enetc_pmd_init_log)
 939 {
 940         enetc_logtype_pmd = rte_log_register("pmd.net.enetc");
 941         if (enetc_logtype_pmd >= 0)
 942                 rte_log_set_level(enetc_logtype_pmd, RTE_LOG_NOTICE);
 943 }