drivers/net/enetc/enetc_ethdev.c

   1 /* SPDX-License-Identifier: BSD-3-Clause
   2  * Copyright 2018-2019 NXP
   3  */
   4
   5 #include <stdbool.h>
   6 #include <rte_ethdev_pci.h>
   7
   8 #include "enetc_logs.h"
   9 #include "enetc.h"
  10
  11 int enetc_logtype_pmd;
  12
  13 /* Functions Prototypes */
  14 static int enetc_dev_configure(struct rte_eth_dev *dev);
  15 static int enetc_dev_start(struct rte_eth_dev *dev);
  16 static void enetc_dev_stop(struct rte_eth_dev *dev);
  17 static void enetc_dev_close(struct rte_eth_dev *dev);
  18 static void enetc_dev_infos_get(struct rte_eth_dev *dev,
  19                                 struct rte_eth_dev_info *dev_info);
  20 static int enetc_link_update(struct rte_eth_dev *dev, int wait_to_complete);
  21 static int enetc_hardware_init(struct enetc_eth_hw *hw);
  22 static int enetc_rx_queue_setup(struct rte_eth_dev *dev, uint16_t rx_queue_id,
  23                 uint16_t nb_rx_desc, unsigned int socket_id,
  24                 const struct rte_eth_rxconf *rx_conf,
  25                 struct rte_mempool *mb_pool);
  26 static void enetc_rx_queue_release(void *rxq);
  27 static int enetc_tx_queue_setup(struct rte_eth_dev *dev, uint16_t tx_queue_id,
  28                 uint16_t nb_tx_desc, unsigned int socket_id,
  29                 const struct rte_eth_txconf *tx_conf);
  30 static void enetc_tx_queue_release(void *txq);
  31 static const uint32_t *enetc_supported_ptypes_get(struct rte_eth_dev *dev);
  32
  33 /*
  34  * The set of PCI devices this driver supports
  35  */
  36 static const struct rte_pci_id pci_id_enetc_map[] = {
  37         { RTE_PCI_DEVICE(PCI_VENDOR_ID_FREESCALE, ENETC_DEV_ID) },
  38         { RTE_PCI_DEVICE(PCI_VENDOR_ID_FREESCALE, ENETC_DEV_ID_VF) },
  39         { .vendor_id = 0, /* sentinel */ },
  40 };
  41
  42 /* Features supported by this driver */
  43 static const struct eth_dev_ops enetc_ops = {
  44         .dev_configure        = enetc_dev_configure,
  45         .dev_start            = enetc_dev_start,
  46         .dev_stop             = enetc_dev_stop,
  47         .dev_close            = enetc_dev_close,
  48         .link_update          = enetc_link_update,
  49         .dev_infos_get        = enetc_dev_infos_get,
  50         .rx_queue_setup       = enetc_rx_queue_setup,
  51         .rx_queue_release     = enetc_rx_queue_release,
  52         .tx_queue_setup       = enetc_tx_queue_setup,
  53         .tx_queue_release     = enetc_tx_queue_release,
  54         .dev_supported_ptypes_get = enetc_supported_ptypes_get,
  55 };
  56
  57 /**
  58  * Initialisation of the enetc device
  59  *
  60  * @param eth_dev
  61  *   - Pointer to the structure rte_eth_dev
  62  *
  63  * @return
  64  *   - On success, zero.
  65  *   - On failure, negative value.
  66  */
  67 static int
  68 enetc_dev_init(struct rte_eth_dev *eth_dev)
  69 {
  70         int error = 0;
  71         struct rte_pci_device *pci_dev = RTE_ETH_DEV_TO_PCI(eth_dev);
  72         struct enetc_eth_hw *hw =
  73                 ENETC_DEV_PRIVATE_TO_HW(eth_dev->data->dev_private);
  74
  75         PMD_INIT_FUNC_TRACE();
  76         eth_dev->dev_ops = &enetc_ops;
  77         eth_dev->rx_pkt_burst = &enetc_recv_pkts;
  78         eth_dev->tx_pkt_burst = &enetc_xmit_pkts;
  79
  80         /* Retrieving and storing the HW base address of device */
  81         hw->hw.reg = (void *)pci_dev->mem_resource[0].addr;
  82         hw->device_id = pci_dev->id.device_id;
  83
  84         error = enetc_hardware_init(hw);
  85         if (error != 0) {
  86                 ENETC_PMD_ERR("Hardware initialization failed");
  87                 return -1;
  88         }
  89
  90         /* Allocate memory for storing MAC addresses */
  91         eth_dev->data->mac_addrs = rte_zmalloc("enetc_eth", ETHER_ADDR_LEN, 0);
  92         if (!eth_dev->data->mac_addrs) {
  93                 ENETC_PMD_ERR("Failed to allocate %d bytes needed to "
  94                               "store MAC addresses",
  95                               ETHER_ADDR_LEN * 1);
  96                 error = -ENOMEM;
  97                 return -1;
  98         }
  99
 100         /* Copy the permanent MAC address */
 101         ether_addr_copy((struct ether_addr *)hw->mac.addr,
 102                         &eth_dev->data->mac_addrs[0]);
 103
 104         ENETC_PMD_DEBUG("port_id %d vendorID=0x%x deviceID=0x%x",
 105                         eth_dev->data->port_id, pci_dev->id.vendor_id,
 106                         pci_dev->id.device_id);
 107         return 0;
 108 }
 109
 110 static int
 111 enetc_dev_uninit(struct rte_eth_dev *eth_dev __rte_unused)
 112 {
 113         PMD_INIT_FUNC_TRACE();
 114         return 0;
 115 }
 116
 117 static int
 118 enetc_dev_configure(struct rte_eth_dev *dev __rte_unused)
 119 {
 120         PMD_INIT_FUNC_TRACE();
 121         return 0;
 122 }
 123
 124 static int
 125 enetc_dev_start(struct rte_eth_dev *dev)
 126 {
 127         struct enetc_eth_hw *hw =
 128                 ENETC_DEV_PRIVATE_TO_HW(dev->data->dev_private);
 129         uint32_t val;
 130
 131         PMD_INIT_FUNC_TRACE();
 132         val = ENETC_REG_READ(ENETC_GET_HW_ADDR(hw->hw.port,
 133                              ENETC_PM0_CMD_CFG));
 134         ENETC_REG_WRITE(ENETC_GET_HW_ADDR(hw->hw.port, ENETC_PM0_CMD_CFG),
 135                         val | ENETC_PM0_TX_EN | ENETC_PM0_RX_EN);
 136
 137         /* Enable port */
 138         val = ENETC_REG_READ(ENETC_GET_HW_ADDR(hw->hw.port, ENETC_PMR));
 139         ENETC_REG_WRITE(ENETC_GET_HW_ADDR(hw->hw.port, ENETC_PMR),
 140                         val | ENETC_PMR_EN);
 141
 142         /* set auto-speed for RGMII */
 143         if (enetc_port_rd(&hw->hw, ENETC_PM0_IF_MODE) & ENETC_PMO_IFM_RG) {
 144                 enetc_port_wr(&hw->hw, ENETC_PM0_IF_MODE, ENETC_PM0_IFM_RGAUTO);
 145                 enetc_port_wr(&hw->hw, ENETC_PM1_IF_MODE, ENETC_PM0_IFM_RGAUTO);
 146         }
 147         if (enetc_global_rd(&hw->hw,
 148                             ENETC_G_EPFBLPR(1)) == ENETC_G_EPFBLPR1_XGMII) {
 149                 enetc_port_wr(&hw->hw, ENETC_PM0_IF_MODE, ENETC_PM0_IFM_XGMII);
 150                 enetc_port_wr(&hw->hw, ENETC_PM1_IF_MODE, ENETC_PM0_IFM_XGMII);
 151         }
 152
 153         return 0;
 154 }
 155
 156 static void
 157 enetc_dev_stop(struct rte_eth_dev *dev)
 158 {
 159         struct enetc_eth_hw *hw =
 160                 ENETC_DEV_PRIVATE_TO_HW(dev->data->dev_private);
 161         uint32_t val;
 162
 163         PMD_INIT_FUNC_TRACE();
 164         /* Disable port */
 165         val = ENETC_REG_READ(ENETC_GET_HW_ADDR(hw->hw.port, ENETC_PMR));
 166         ENETC_REG_WRITE(ENETC_GET_HW_ADDR(hw->hw.port, ENETC_PMR),
 167                         val & (~ENETC_PMR_EN));
 168
 169         val = ENETC_REG_READ(ENETC_GET_HW_ADDR(hw->hw.port,
 170                              ENETC_PM0_CMD_CFG));
 171         ENETC_REG_WRITE(ENETC_GET_HW_ADDR(hw->hw.port, ENETC_PM0_CMD_CFG),
 172                         val & (~(ENETC_PM0_TX_EN | ENETC_PM0_RX_EN)));
 173 }
 174
 175 static void
 176 enetc_dev_close(struct rte_eth_dev *dev)
 177 {
 178         uint16_t i;
 179
 180         PMD_INIT_FUNC_TRACE();
 181         enetc_dev_stop(dev);
 182
 183         for (i = 0; i < dev->data->nb_rx_queues; i++) {
 184                 enetc_rx_queue_release(dev->data->rx_queues[i]);
 185                 dev->data->rx_queues[i] = NULL;
 186         }
 187         dev->data->nb_rx_queues = 0;
 188
 189         for (i = 0; i < dev->data->nb_tx_queues; i++) {
 190                 enetc_tx_queue_release(dev->data->tx_queues[i]);
 191                 dev->data->tx_queues[i] = NULL;
 192         }
 193         dev->data->nb_tx_queues = 0;
 194 }
 195
 196 static const uint32_t *
 197 enetc_supported_ptypes_get(struct rte_eth_dev *dev __rte_unused)
 198 {
 199         static const uint32_t ptypes[] = {
 200                 RTE_PTYPE_L2_ETHER,
 201                 RTE_PTYPE_L3_IPV4,
 202                 RTE_PTYPE_L3_IPV6,
 203                 RTE_PTYPE_L4_TCP,
 204                 RTE_PTYPE_L4_UDP,
 205                 RTE_PTYPE_L4_SCTP,
 206                 RTE_PTYPE_L4_ICMP,
 207                 RTE_PTYPE_UNKNOWN
 208         };
 209
 210         return ptypes;
 211 }
 212
 213 /* return 0 means link status changed, -1 means not changed */
 214 static int
 215 enetc_link_update(struct rte_eth_dev *dev, int wait_to_complete __rte_unused)
 216 {
 217         struct enetc_eth_hw *hw =
 218                 ENETC_DEV_PRIVATE_TO_HW(dev->data->dev_private);
 219         struct rte_eth_link link;
 220         uint32_t status;
 221
 222         PMD_INIT_FUNC_TRACE();
 223
 224         memset(&link, 0, sizeof(link));
 225
 226         status = ENETC_REG_READ(ENETC_GET_HW_ADDR(hw->hw.port,
 227                                 ENETC_PM0_STATUS));
 228
 229         if (status & ENETC_LINK_MODE)
 230                 link.link_duplex = ETH_LINK_FULL_DUPLEX;
 231         else
 232                 link.link_duplex = ETH_LINK_HALF_DUPLEX;
 233
 234         if (status & ENETC_LINK_STATUS)
 235                 link.link_status = ETH_LINK_UP;
 236         else
 237                 link.link_status = ETH_LINK_DOWN;
 238
 239         switch (status & ENETC_LINK_SPEED_MASK) {
 240         case ENETC_LINK_SPEED_1G:
 241                 link.link_speed = ETH_SPEED_NUM_1G;
 242                 break;
 243
 244         case ENETC_LINK_SPEED_100M:
 245                 link.link_speed = ETH_SPEED_NUM_100M;
 246                 break;
 247
 248         default:
 249         case ENETC_LINK_SPEED_10M:
 250                 link.link_speed = ETH_SPEED_NUM_10M;
 251         }
 252
 253         return rte_eth_linkstatus_set(dev, &link);
 254 }
 255
 256 static int
 257 enetc_hardware_init(struct enetc_eth_hw *hw)
 258 {
 259         uint32_t psipmr = 0;
 260
 261         PMD_INIT_FUNC_TRACE();
 262         /* Calculating and storing the base HW addresses */
 263         hw->hw.port = (void *)((size_t)hw->hw.reg + ENETC_PORT_BASE);
 264         hw->hw.global = (void *)((size_t)hw->hw.reg + ENETC_GLOBAL_BASE);
 265
 266         /* Enabling Station Interface */
 267         ENETC_REG_WRITE(ENETC_GET_HW_ADDR(hw->hw.reg, ENETC_SIMR),
 268                                           ENETC_SIMR_EN);
 269
 270         /* Setting to accept broadcast packets for each inetrface */
 271         psipmr |= ENETC_PSIPMR_SET_UP(0) | ENETC_PSIPMR_SET_MP(0) |
 272                   ENETC_PSIPMR_SET_VLAN_MP(0);
 273         psipmr |= ENETC_PSIPMR_SET_UP(1) | ENETC_PSIPMR_SET_MP(1) |
 274                   ENETC_PSIPMR_SET_VLAN_MP(1);
 275         psipmr |= ENETC_PSIPMR_SET_UP(2) | ENETC_PSIPMR_SET_MP(2) |
 276                   ENETC_PSIPMR_SET_VLAN_MP(2);
 277
 278         ENETC_REG_WRITE(ENETC_GET_HW_ADDR(hw->hw.port, ENETC_PSIPMR),
 279                         psipmr);
 280
 281         /* Enabling broadcast address */
 282         ENETC_REG_WRITE(ENETC_GET_HW_ADDR(hw->hw.port, ENETC_PSIPMAR0(0)),
 283                         0xFFFFFFFF);
 284         ENETC_REG_WRITE(ENETC_GET_HW_ADDR(hw->hw.port, ENETC_PSIPMAR1(0)),
 285                         0xFFFF << 16);
 286
 287         return 0;
 288 }
 289
 290 static void
 291 enetc_dev_infos_get(struct rte_eth_dev *dev __rte_unused,
 292                     struct rte_eth_dev_info *dev_info)
 293 {
 294         PMD_INIT_FUNC_TRACE();
 295         dev_info->rx_desc_lim = (struct rte_eth_desc_lim) {
 296                 .nb_max = MAX_BD_COUNT,
 297                 .nb_min = MIN_BD_COUNT,
 298                 .nb_align = BD_ALIGN,
 299         };
 300         dev_info->tx_desc_lim = (struct rte_eth_desc_lim) {
 301                 .nb_max = MAX_BD_COUNT,
 302                 .nb_min = MIN_BD_COUNT,
 303                 .nb_align = BD_ALIGN,
 304         };
 305         dev_info->max_rx_queues = MAX_RX_RINGS;
 306         dev_info->max_tx_queues = MAX_TX_RINGS;
 307         dev_info->max_rx_pktlen = 1500;
 308 }
 309
 310 static int
 311 enetc_alloc_txbdr(struct enetc_bdr *txr, uint16_t nb_desc)
 312 {
 313         int size;
 314
 315         size = nb_desc * sizeof(struct enetc_swbd);
 316         txr->q_swbd = rte_malloc(NULL, size, RTE_CACHE_LINE_SIZE);
 317         if (txr->q_swbd == NULL)
 318                 return -ENOMEM;
 319
 320         size = nb_desc * sizeof(struct enetc_tx_bd);
 321         txr->bd_base = rte_malloc(NULL, size, RTE_CACHE_LINE_SIZE);
 322         if (txr->bd_base == NULL) {
 323                 rte_free(txr->q_swbd);
 324                 txr->q_swbd = NULL;
 325                 return -ENOMEM;
 326         }
 327
 328         txr->bd_count = nb_desc;
 329         txr->next_to_clean = 0;
 330         txr->next_to_use = 0;
 331
 332         return 0;
 333 }
 334
 335 static void
 336 enetc_free_bdr(struct enetc_bdr *rxr)
 337 {
 338         rte_free(rxr->q_swbd);
 339         rte_free(rxr->bd_base);
 340         rxr->q_swbd = NULL;
 341         rxr->bd_base = NULL;
 342 }
 343
 344 static void
 345 enetc_setup_txbdr(struct enetc_hw *hw, struct enetc_bdr *tx_ring)
 346 {
 347         int idx = tx_ring->index;
 348         uint32_t tbmr;
 349         phys_addr_t bd_address;
 350
 351         bd_address = (phys_addr_t)
 352                      rte_mem_virt2iova((const void *)tx_ring->bd_base);
 353         enetc_txbdr_wr(hw, idx, ENETC_TBBAR0,
 354                        lower_32_bits((uint64_t)bd_address));
 355         enetc_txbdr_wr(hw, idx, ENETC_TBBAR1,
 356                        upper_32_bits((uint64_t)bd_address));
 357         enetc_txbdr_wr(hw, idx, ENETC_TBLENR,
 358                        ENETC_RTBLENR_LEN(tx_ring->bd_count));
 359
 360         tbmr = ENETC_TBMR_EN;
 361         /* enable ring */
 362         enetc_txbdr_wr(hw, idx, ENETC_TBMR, tbmr);
 363         enetc_txbdr_wr(hw, idx, ENETC_TBCIR, 0);
 364         enetc_txbdr_wr(hw, idx, ENETC_TBCISR, 0);
 365         tx_ring->tcir = (void *)((size_t)hw->reg +
 366                         ENETC_BDR(TX, idx, ENETC_TBCIR));
 367         tx_ring->tcisr = (void *)((size_t)hw->reg +
 368                          ENETC_BDR(TX, idx, ENETC_TBCISR));
 369 }
 370
 371 static int
 372 enetc_alloc_tx_resources(struct rte_eth_dev *dev,
 373                          uint16_t queue_idx,
 374                          uint16_t nb_desc)
 375 {
 376         int err;
 377         struct enetc_bdr *tx_ring;
 378         struct rte_eth_dev_data *data = dev->data;
 379         struct enetc_eth_adapter *priv =
 380                         ENETC_DEV_PRIVATE(data->dev_private);
 381
 382         tx_ring = rte_zmalloc(NULL, sizeof(struct enetc_bdr), 0);
 383         if (tx_ring == NULL) {
 384                 ENETC_PMD_ERR("Failed to allocate TX ring memory");
 385                 err = -ENOMEM;
 386                 return -1;
 387         }
 388
 389         err = enetc_alloc_txbdr(tx_ring, nb_desc);
 390         if (err)
 391                 goto fail;
 392
 393         tx_ring->index = queue_idx;
 394         tx_ring->ndev = dev;
 395         enetc_setup_txbdr(&priv->hw.hw, tx_ring);
 396         data->tx_queues[queue_idx] = tx_ring;
 397
 398         return 0;
 399 fail:
 400         rte_free(tx_ring);
 401
 402         return err;
 403 }
 404
 405 static int
 406 enetc_tx_queue_setup(struct rte_eth_dev *dev,
 407                      uint16_t queue_idx,
 408                      uint16_t nb_desc,
 409                      unsigned int socket_id __rte_unused,
 410                      const struct rte_eth_txconf *tx_conf __rte_unused)
 411 {
 412         int err = 0;
 413
 414         PMD_INIT_FUNC_TRACE();
 415         if (nb_desc > MAX_BD_COUNT)
 416                 return -1;
 417
 418         err = enetc_alloc_tx_resources(dev, queue_idx, nb_desc);
 419
 420         return err;
 421 }
 422
 423 static void
 424 enetc_tx_queue_release(void *txq)
 425 {
 426         if (txq == NULL)
 427                 return;
 428
 429         struct enetc_bdr *tx_ring = (struct enetc_bdr *)txq;
 430         struct enetc_eth_hw *eth_hw =
 431                 ENETC_DEV_PRIVATE_TO_HW(tx_ring->ndev->data->dev_private);
 432         struct enetc_hw *hw;
 433         struct enetc_swbd *tx_swbd;
 434         int i;
 435         uint32_t val;
 436
 437         /* Disable the ring */
 438         hw = &eth_hw->hw;
 439         val = enetc_txbdr_rd(hw, tx_ring->index, ENETC_TBMR);
 440         val &= (~ENETC_TBMR_EN);
 441         enetc_txbdr_wr(hw, tx_ring->index, ENETC_TBMR, val);
 442
 443         /* clean the ring*/
 444         i = tx_ring->next_to_clean;
 445         tx_swbd = &tx_ring->q_swbd[i];
 446         while (tx_swbd->buffer_addr != NULL) {
 447                 rte_pktmbuf_free(tx_swbd->buffer_addr);
 448                 tx_swbd->buffer_addr = NULL;
 449                 tx_swbd++;
 450                 i++;
 451                 if (unlikely(i == tx_ring->bd_count)) {
 452                         i = 0;
 453                         tx_swbd = &tx_ring->q_swbd[i];
 454                 }
 455         }
 456
 457         enetc_free_bdr(tx_ring);
 458         rte_free(tx_ring);
 459 }
 460
 461 static int
 462 enetc_alloc_rxbdr(struct enetc_bdr *rxr,
 463                   uint16_t nb_rx_desc)
 464 {
 465         int size;
 466
 467         size = nb_rx_desc * sizeof(struct enetc_swbd);
 468         rxr->q_swbd = rte_malloc(NULL, size, RTE_CACHE_LINE_SIZE);
 469         if (rxr->q_swbd == NULL)
 470                 return -ENOMEM;
 471
 472         size = nb_rx_desc * sizeof(union enetc_rx_bd);
 473         rxr->bd_base = rte_malloc(NULL, size, RTE_CACHE_LINE_SIZE);
 474         if (rxr->bd_base == NULL) {
 475                 rte_free(rxr->q_swbd);
 476                 rxr->q_swbd = NULL;
 477                 return -ENOMEM;
 478         }
 479
 480         rxr->bd_count = nb_rx_desc;
 481         rxr->next_to_clean = 0;
 482         rxr->next_to_use = 0;
 483         rxr->next_to_alloc = 0;
 484
 485         return 0;
 486 }
 487
 488 static void
 489 enetc_setup_rxbdr(struct enetc_hw *hw, struct enetc_bdr *rx_ring,
 490                   struct rte_mempool *mb_pool)
 491 {
 492         int idx = rx_ring->index;
 493         uint16_t buf_size;
 494         phys_addr_t bd_address;
 495
 496         bd_address = (phys_addr_t)
 497                      rte_mem_virt2iova((const void *)rx_ring->bd_base);
 498         enetc_rxbdr_wr(hw, idx, ENETC_RBBAR0,
 499                        lower_32_bits((uint64_t)bd_address));
 500         enetc_rxbdr_wr(hw, idx, ENETC_RBBAR1,
 501                        upper_32_bits((uint64_t)bd_address));
 502         enetc_rxbdr_wr(hw, idx, ENETC_RBLENR,
 503                        ENETC_RTBLENR_LEN(rx_ring->bd_count));
 504
 505         rx_ring->mb_pool = mb_pool;
 506         rx_ring->rcir = (void *)((size_t)hw->reg +
 507                         ENETC_BDR(RX, idx, ENETC_RBCIR));
 508         enetc_refill_rx_ring(rx_ring, (enetc_bd_unused(rx_ring)));
 509         buf_size = (uint16_t)(rte_pktmbuf_data_room_size(rx_ring->mb_pool) -
 510                    RTE_PKTMBUF_HEADROOM);
 511         enetc_rxbdr_wr(hw, idx, ENETC_RBBSR, buf_size);
 512         /* enable ring */
 513         enetc_rxbdr_wr(hw, idx, ENETC_RBMR, ENETC_RBMR_EN);
 514         enetc_rxbdr_wr(hw, idx, ENETC_RBPIR, 0);
 515 }
 516
 517 static int
 518 enetc_alloc_rx_resources(struct rte_eth_dev *dev,
 519                          uint16_t rx_queue_id,
 520                          uint16_t nb_rx_desc,
 521                          struct rte_mempool *mb_pool)
 522 {
 523         int err;
 524         struct enetc_bdr *rx_ring;
 525         struct rte_eth_dev_data *data =  dev->data;
 526         struct enetc_eth_adapter *adapter =
 527                         ENETC_DEV_PRIVATE(data->dev_private);
 528
 529         rx_ring = rte_zmalloc(NULL, sizeof(struct enetc_bdr), 0);
 530         if (rx_ring == NULL) {
 531                 ENETC_PMD_ERR("Failed to allocate RX ring memory");
 532                 err = -ENOMEM;
 533                 return err;
 534         }
 535
 536         err = enetc_alloc_rxbdr(rx_ring, nb_rx_desc);
 537         if (err)
 538                 goto fail;
 539
 540         rx_ring->index = rx_queue_id;
 541         rx_ring->ndev = dev;
 542         enetc_setup_rxbdr(&adapter->hw.hw, rx_ring, mb_pool);
 543         data->rx_queues[rx_queue_id] = rx_ring;
 544
 545         return 0;
 546 fail:
 547         rte_free(rx_ring);
 548
 549         return err;
 550 }
 551
 552 static int
 553 enetc_rx_queue_setup(struct rte_eth_dev *dev,
 554                      uint16_t rx_queue_id,
 555                      uint16_t nb_rx_desc,
 556                      unsigned int socket_id __rte_unused,
 557                      const struct rte_eth_rxconf *rx_conf __rte_unused,
 558                      struct rte_mempool *mb_pool)
 559 {
 560         int err = 0;
 561
 562         PMD_INIT_FUNC_TRACE();
 563         if (nb_rx_desc > MAX_BD_COUNT)
 564                 return -1;
 565
 566         err = enetc_alloc_rx_resources(dev, rx_queue_id,
 567                                        nb_rx_desc,
 568                                        mb_pool);
 569
 570         return err;
 571 }
 572
 573 static void
 574 enetc_rx_queue_release(void *rxq)
 575 {
 576         if (rxq == NULL)
 577                 return;
 578
 579         struct enetc_bdr *rx_ring = (struct enetc_bdr *)rxq;
 580         struct enetc_eth_hw *eth_hw =
 581                 ENETC_DEV_PRIVATE_TO_HW(rx_ring->ndev->data->dev_private);
 582         struct enetc_swbd *q_swbd;
 583         struct enetc_hw *hw;
 584         uint32_t val;
 585         int i;
 586
 587         /* Disable the ring */
 588         hw = &eth_hw->hw;
 589         val = enetc_rxbdr_rd(hw, rx_ring->index, ENETC_RBMR);
 590         val &= (~ENETC_RBMR_EN);
 591         enetc_rxbdr_wr(hw, rx_ring->index, ENETC_RBMR, val);
 592
 593         /* Clean the ring */
 594         i = rx_ring->next_to_clean;
 595         q_swbd = &rx_ring->q_swbd[i];
 596         while (i != rx_ring->next_to_use) {
 597                 rte_pktmbuf_free(q_swbd->buffer_addr);
 598                 q_swbd->buffer_addr = NULL;
 599                 q_swbd++;
 600                 i++;
 601                 if (unlikely(i == rx_ring->bd_count)) {
 602                         i = 0;
 603                         q_swbd = &rx_ring->q_swbd[i];
 604                 }
 605         }
 606
 607         enetc_free_bdr(rx_ring);
 608         rte_free(rx_ring);
 609 }
 610
 611 static int
 612 enetc_pci_probe(struct rte_pci_driver *pci_drv __rte_unused,
 613                            struct rte_pci_device *pci_dev)
 614 {
 615         return rte_eth_dev_pci_generic_probe(pci_dev,
 616                                              sizeof(struct enetc_eth_adapter),
 617                                              enetc_dev_init);
 618 }
 619
 620 static int
 621 enetc_pci_remove(struct rte_pci_device *pci_dev)
 622 {
 623         return rte_eth_dev_pci_generic_remove(pci_dev, enetc_dev_uninit);
 624 }
 625
 626 static struct rte_pci_driver rte_enetc_pmd = {
 627         .id_table = pci_id_enetc_map,
 628         .drv_flags = RTE_PCI_DRV_NEED_MAPPING,
 629         .probe = enetc_pci_probe,
 630         .remove = enetc_pci_remove,
 631 };
 632
 633 RTE_PMD_REGISTER_PCI(net_enetc, rte_enetc_pmd);
 634 RTE_PMD_REGISTER_PCI_TABLE(net_enetc, pci_id_enetc_map);
 635 RTE_PMD_REGISTER_KMOD_DEP(net_enetc, "* vfio-pci");
 636
 637 RTE_INIT(enetc_pmd_init_log)
 638 {
 639         enetc_logtype_pmd = rte_log_register("pmd.net.enetc");
 640         if (enetc_logtype_pmd >= 0)
 641                 rte_log_set_level(enetc_logtype_pmd, RTE_LOG_NOTICE);
 642 }