drivers/net/enetc/enetc_ethdev.c

   1 /* SPDX-License-Identifier: BSD-3-Clause
   2  * Copyright 2018-2019 NXP
   3  */
   4
   5 #include <stdbool.h>
   6 #include <rte_ethdev_pci.h>
   7
   8 #include "enetc_logs.h"
   9 #include "enetc.h"
  10
  11 int enetc_logtype_pmd;
  12
  13 /* Functions Prototypes */
  14 static int enetc_dev_configure(struct rte_eth_dev *dev);
  15 static int enetc_dev_start(struct rte_eth_dev *dev);
  16 static void enetc_dev_stop(struct rte_eth_dev *dev);
  17 static void enetc_dev_close(struct rte_eth_dev *dev);
  18 static void enetc_dev_infos_get(struct rte_eth_dev *dev,
  19                                 struct rte_eth_dev_info *dev_info);
  20 static int enetc_link_update(struct rte_eth_dev *dev, int wait_to_complete);
  21 static int enetc_hardware_init(struct enetc_eth_hw *hw);
  22 static int enetc_rx_queue_setup(struct rte_eth_dev *dev, uint16_t rx_queue_id,
  23                 uint16_t nb_rx_desc, unsigned int socket_id,
  24                 const struct rte_eth_rxconf *rx_conf,
  25                 struct rte_mempool *mb_pool);
  26 static void enetc_rx_queue_release(void *rxq);
  27 static int enetc_tx_queue_setup(struct rte_eth_dev *dev, uint16_t tx_queue_id,
  28                 uint16_t nb_tx_desc, unsigned int socket_id,
  29                 const struct rte_eth_txconf *tx_conf);
  30 static void enetc_tx_queue_release(void *txq);
  31 static const uint32_t *enetc_supported_ptypes_get(struct rte_eth_dev *dev);
  32 static int enetc_stats_get(struct rte_eth_dev *dev,
  33                 struct rte_eth_stats *stats);
  34 static void enetc_stats_reset(struct rte_eth_dev *dev);
  35
  36 /*
  37  * The set of PCI devices this driver supports
  38  */
  39 static const struct rte_pci_id pci_id_enetc_map[] = {
  40         { RTE_PCI_DEVICE(PCI_VENDOR_ID_FREESCALE, ENETC_DEV_ID) },
  41         { RTE_PCI_DEVICE(PCI_VENDOR_ID_FREESCALE, ENETC_DEV_ID_VF) },
  42         { .vendor_id = 0, /* sentinel */ },
  43 };
  44
  45 /* Features supported by this driver */
  46 static const struct eth_dev_ops enetc_ops = {
  47         .dev_configure        = enetc_dev_configure,
  48         .dev_start            = enetc_dev_start,
  49         .dev_stop             = enetc_dev_stop,
  50         .dev_close            = enetc_dev_close,
  51         .link_update          = enetc_link_update,
  52         .stats_get            = enetc_stats_get,
  53         .stats_reset          = enetc_stats_reset,
  54         .dev_infos_get        = enetc_dev_infos_get,
  55         .rx_queue_setup       = enetc_rx_queue_setup,
  56         .rx_queue_release     = enetc_rx_queue_release,
  57         .tx_queue_setup       = enetc_tx_queue_setup,
  58         .tx_queue_release     = enetc_tx_queue_release,
  59         .dev_supported_ptypes_get = enetc_supported_ptypes_get,
  60 };
  61
  62 /**
  63  * Initialisation of the enetc device
  64  *
  65  * @param eth_dev
  66  *   - Pointer to the structure rte_eth_dev
  67  *
  68  * @return
  69  *   - On success, zero.
  70  *   - On failure, negative value.
  71  */
  72 static int
  73 enetc_dev_init(struct rte_eth_dev *eth_dev)
  74 {
  75         int error = 0;
  76         struct rte_pci_device *pci_dev = RTE_ETH_DEV_TO_PCI(eth_dev);
  77         struct enetc_eth_hw *hw =
  78                 ENETC_DEV_PRIVATE_TO_HW(eth_dev->data->dev_private);
  79
  80         PMD_INIT_FUNC_TRACE();
  81         eth_dev->dev_ops = &enetc_ops;
  82         eth_dev->rx_pkt_burst = &enetc_recv_pkts;
  83         eth_dev->tx_pkt_burst = &enetc_xmit_pkts;
  84
  85         /* Retrieving and storing the HW base address of device */
  86         hw->hw.reg = (void *)pci_dev->mem_resource[0].addr;
  87         hw->device_id = pci_dev->id.device_id;
  88
  89         error = enetc_hardware_init(hw);
  90         if (error != 0) {
  91                 ENETC_PMD_ERR("Hardware initialization failed");
  92                 return -1;
  93         }
  94
  95         /* Allocate memory for storing MAC addresses */
  96         eth_dev->data->mac_addrs = rte_zmalloc("enetc_eth", ETHER_ADDR_LEN, 0);
  97         if (!eth_dev->data->mac_addrs) {
  98                 ENETC_PMD_ERR("Failed to allocate %d bytes needed to "
  99                               "store MAC addresses",
 100                               ETHER_ADDR_LEN * 1);
 101                 error = -ENOMEM;
 102                 return -1;
 103         }
 104
 105         /* Copy the permanent MAC address */
 106         ether_addr_copy((struct ether_addr *)hw->mac.addr,
 107                         &eth_dev->data->mac_addrs[0]);
 108
 109         ENETC_PMD_DEBUG("port_id %d vendorID=0x%x deviceID=0x%x",
 110                         eth_dev->data->port_id, pci_dev->id.vendor_id,
 111                         pci_dev->id.device_id);
 112         return 0;
 113 }
 114
 115 static int
 116 enetc_dev_uninit(struct rte_eth_dev *eth_dev __rte_unused)
 117 {
 118         PMD_INIT_FUNC_TRACE();
 119         return 0;
 120 }
 121
 122 static int
 123 enetc_dev_configure(struct rte_eth_dev *dev __rte_unused)
 124 {
 125         PMD_INIT_FUNC_TRACE();
 126         return 0;
 127 }
 128
 129 static int
 130 enetc_dev_start(struct rte_eth_dev *dev)
 131 {
 132         struct enetc_eth_hw *hw =
 133                 ENETC_DEV_PRIVATE_TO_HW(dev->data->dev_private);
 134         struct enetc_hw *enetc_hw = &hw->hw;
 135         uint32_t val;
 136
 137         PMD_INIT_FUNC_TRACE();
 138         val = enetc_port_rd(enetc_hw, ENETC_PM0_CMD_CFG);
 139         enetc_port_wr(enetc_hw, ENETC_PM0_CMD_CFG,
 140                       val | ENETC_PM0_TX_EN | ENETC_PM0_RX_EN);
 141
 142         /* Enable port */
 143         val = enetc_port_rd(enetc_hw, ENETC_PMR);
 144         enetc_port_wr(enetc_hw, ENETC_PMR, val | ENETC_PMR_EN);
 145
 146         /* set auto-speed for RGMII */
 147         if (enetc_port_rd(enetc_hw, ENETC_PM0_IF_MODE) & ENETC_PMO_IFM_RG) {
 148                 enetc_port_wr(enetc_hw, ENETC_PM0_IF_MODE,
 149                               ENETC_PM0_IFM_RGAUTO);
 150                 enetc_port_wr(enetc_hw, ENETC_PM1_IF_MODE,
 151                               ENETC_PM0_IFM_RGAUTO);
 152         }
 153         if (enetc_global_rd(enetc_hw,
 154                             ENETC_G_EPFBLPR(1)) == ENETC_G_EPFBLPR1_XGMII) {
 155                 enetc_port_wr(enetc_hw, ENETC_PM0_IF_MODE,
 156                               ENETC_PM0_IFM_XGMII);
 157                 enetc_port_wr(enetc_hw, ENETC_PM1_IF_MODE,
 158                               ENETC_PM0_IFM_XGMII);
 159         }
 160
 161         return 0;
 162 }
 163
 164 static void
 165 enetc_dev_stop(struct rte_eth_dev *dev)
 166 {
 167         struct enetc_eth_hw *hw =
 168                 ENETC_DEV_PRIVATE_TO_HW(dev->data->dev_private);
 169         struct enetc_hw *enetc_hw = &hw->hw;
 170         uint32_t val;
 171
 172         PMD_INIT_FUNC_TRACE();
 173         /* Disable port */
 174         val = enetc_port_rd(enetc_hw, ENETC_PMR);
 175         enetc_port_wr(enetc_hw, ENETC_PMR, val & (~ENETC_PMR_EN));
 176
 177         val = enetc_port_rd(enetc_hw, ENETC_PM0_CMD_CFG);
 178         enetc_port_wr(enetc_hw, ENETC_PM0_CMD_CFG,
 179                       val & (~(ENETC_PM0_TX_EN | ENETC_PM0_RX_EN)));
 180 }
 181
 182 static void
 183 enetc_dev_close(struct rte_eth_dev *dev)
 184 {
 185         uint16_t i;
 186
 187         PMD_INIT_FUNC_TRACE();
 188         enetc_dev_stop(dev);
 189
 190         for (i = 0; i < dev->data->nb_rx_queues; i++) {
 191                 enetc_rx_queue_release(dev->data->rx_queues[i]);
 192                 dev->data->rx_queues[i] = NULL;
 193         }
 194         dev->data->nb_rx_queues = 0;
 195
 196         for (i = 0; i < dev->data->nb_tx_queues; i++) {
 197                 enetc_tx_queue_release(dev->data->tx_queues[i]);
 198                 dev->data->tx_queues[i] = NULL;
 199         }
 200         dev->data->nb_tx_queues = 0;
 201 }
 202
 203 static const uint32_t *
 204 enetc_supported_ptypes_get(struct rte_eth_dev *dev __rte_unused)
 205 {
 206         static const uint32_t ptypes[] = {
 207                 RTE_PTYPE_L2_ETHER,
 208                 RTE_PTYPE_L3_IPV4,
 209                 RTE_PTYPE_L3_IPV6,
 210                 RTE_PTYPE_L4_TCP,
 211                 RTE_PTYPE_L4_UDP,
 212                 RTE_PTYPE_L4_SCTP,
 213                 RTE_PTYPE_L4_ICMP,
 214                 RTE_PTYPE_UNKNOWN
 215         };
 216
 217         return ptypes;
 218 }
 219
 220 /* return 0 means link status changed, -1 means not changed */
 221 static int
 222 enetc_link_update(struct rte_eth_dev *dev, int wait_to_complete __rte_unused)
 223 {
 224         struct enetc_eth_hw *hw =
 225                 ENETC_DEV_PRIVATE_TO_HW(dev->data->dev_private);
 226         struct enetc_hw *enetc_hw = &hw->hw;
 227         struct rte_eth_link link;
 228         uint32_t status;
 229
 230         PMD_INIT_FUNC_TRACE();
 231
 232         memset(&link, 0, sizeof(link));
 233
 234         status = enetc_port_rd(enetc_hw, ENETC_PM0_STATUS);
 235
 236         if (status & ENETC_LINK_MODE)
 237                 link.link_duplex = ETH_LINK_FULL_DUPLEX;
 238         else
 239                 link.link_duplex = ETH_LINK_HALF_DUPLEX;
 240
 241         if (status & ENETC_LINK_STATUS)
 242                 link.link_status = ETH_LINK_UP;
 243         else
 244                 link.link_status = ETH_LINK_DOWN;
 245
 246         switch (status & ENETC_LINK_SPEED_MASK) {
 247         case ENETC_LINK_SPEED_1G:
 248                 link.link_speed = ETH_SPEED_NUM_1G;
 249                 break;
 250
 251         case ENETC_LINK_SPEED_100M:
 252                 link.link_speed = ETH_SPEED_NUM_100M;
 253                 break;
 254
 255         default:
 256         case ENETC_LINK_SPEED_10M:
 257                 link.link_speed = ETH_SPEED_NUM_10M;
 258         }
 259
 260         return rte_eth_linkstatus_set(dev, &link);
 261 }
 262
 263 static int
 264 enetc_hardware_init(struct enetc_eth_hw *hw)
 265 {
 266         uint32_t psipmr = 0;
 267         struct enetc_hw *enetc_hw = &hw->hw;
 268
 269         PMD_INIT_FUNC_TRACE();
 270         /* Calculating and storing the base HW addresses */
 271         hw->hw.port = (void *)((size_t)hw->hw.reg + ENETC_PORT_BASE);
 272         hw->hw.global = (void *)((size_t)hw->hw.reg + ENETC_GLOBAL_BASE);
 273
 274         /* Enabling Station Interface */
 275         enetc_wr(enetc_hw, ENETC_SIMR, ENETC_SIMR_EN);
 276
 277         /* Setting to accept broadcast packets for each inetrface */
 278         psipmr |= ENETC_PSIPMR_SET_UP(0) | ENETC_PSIPMR_SET_MP(0) |
 279                   ENETC_PSIPMR_SET_VLAN_MP(0);
 280         psipmr |= ENETC_PSIPMR_SET_UP(1) | ENETC_PSIPMR_SET_MP(1) |
 281                   ENETC_PSIPMR_SET_VLAN_MP(1);
 282         psipmr |= ENETC_PSIPMR_SET_UP(2) | ENETC_PSIPMR_SET_MP(2) |
 283                   ENETC_PSIPMR_SET_VLAN_MP(2);
 284
 285         enetc_port_wr(enetc_hw, ENETC_PSIPMR, psipmr);
 286
 287         /* Enabling broadcast address */
 288         enetc_port_wr(enetc_hw, ENETC_PSIPMAR0(0), 0xFFFFFFFF);
 289         enetc_port_wr(enetc_hw, ENETC_PSIPMAR1(0), 0xFFFF << 16);
 290
 291         return 0;
 292 }
 293
 294 static void
 295 enetc_dev_infos_get(struct rte_eth_dev *dev __rte_unused,
 296                     struct rte_eth_dev_info *dev_info)
 297 {
 298         PMD_INIT_FUNC_TRACE();
 299         dev_info->rx_desc_lim = (struct rte_eth_desc_lim) {
 300                 .nb_max = MAX_BD_COUNT,
 301                 .nb_min = MIN_BD_COUNT,
 302                 .nb_align = BD_ALIGN,
 303         };
 304         dev_info->tx_desc_lim = (struct rte_eth_desc_lim) {
 305                 .nb_max = MAX_BD_COUNT,
 306                 .nb_min = MIN_BD_COUNT,
 307                 .nb_align = BD_ALIGN,
 308         };
 309         dev_info->max_rx_queues = MAX_RX_RINGS;
 310         dev_info->max_tx_queues = MAX_TX_RINGS;
 311         dev_info->max_rx_pktlen = 1500;
 312 }
 313
 314 static int
 315 enetc_alloc_txbdr(struct enetc_bdr *txr, uint16_t nb_desc)
 316 {
 317         int size;
 318
 319         size = nb_desc * sizeof(struct enetc_swbd);
 320         txr->q_swbd = rte_malloc(NULL, size, RTE_CACHE_LINE_SIZE);
 321         if (txr->q_swbd == NULL)
 322                 return -ENOMEM;
 323
 324         size = nb_desc * sizeof(struct enetc_tx_bd);
 325         txr->bd_base = rte_malloc(NULL, size, RTE_CACHE_LINE_SIZE);
 326         if (txr->bd_base == NULL) {
 327                 rte_free(txr->q_swbd);
 328                 txr->q_swbd = NULL;
 329                 return -ENOMEM;
 330         }
 331
 332         txr->bd_count = nb_desc;
 333         txr->next_to_clean = 0;
 334         txr->next_to_use = 0;
 335
 336         return 0;
 337 }
 338
 339 static void
 340 enetc_free_bdr(struct enetc_bdr *rxr)
 341 {
 342         rte_free(rxr->q_swbd);
 343         rte_free(rxr->bd_base);
 344         rxr->q_swbd = NULL;
 345         rxr->bd_base = NULL;
 346 }
 347
 348 static void
 349 enetc_setup_txbdr(struct enetc_hw *hw, struct enetc_bdr *tx_ring)
 350 {
 351         int idx = tx_ring->index;
 352         uint32_t tbmr;
 353         phys_addr_t bd_address;
 354
 355         bd_address = (phys_addr_t)
 356                      rte_mem_virt2iova((const void *)tx_ring->bd_base);
 357         enetc_txbdr_wr(hw, idx, ENETC_TBBAR0,
 358                        lower_32_bits((uint64_t)bd_address));
 359         enetc_txbdr_wr(hw, idx, ENETC_TBBAR1,
 360                        upper_32_bits((uint64_t)bd_address));
 361         enetc_txbdr_wr(hw, idx, ENETC_TBLENR,
 362                        ENETC_RTBLENR_LEN(tx_ring->bd_count));
 363
 364         tbmr = ENETC_TBMR_EN;
 365         /* enable ring */
 366         enetc_txbdr_wr(hw, idx, ENETC_TBMR, tbmr);
 367         enetc_txbdr_wr(hw, idx, ENETC_TBCIR, 0);
 368         enetc_txbdr_wr(hw, idx, ENETC_TBCISR, 0);
 369         tx_ring->tcir = (void *)((size_t)hw->reg +
 370                         ENETC_BDR(TX, idx, ENETC_TBCIR));
 371         tx_ring->tcisr = (void *)((size_t)hw->reg +
 372                          ENETC_BDR(TX, idx, ENETC_TBCISR));
 373 }
 374
 375 static int
 376 enetc_alloc_tx_resources(struct rte_eth_dev *dev,
 377                          uint16_t queue_idx,
 378                          uint16_t nb_desc)
 379 {
 380         int err;
 381         struct enetc_bdr *tx_ring;
 382         struct rte_eth_dev_data *data = dev->data;
 383         struct enetc_eth_adapter *priv =
 384                         ENETC_DEV_PRIVATE(data->dev_private);
 385
 386         tx_ring = rte_zmalloc(NULL, sizeof(struct enetc_bdr), 0);
 387         if (tx_ring == NULL) {
 388                 ENETC_PMD_ERR("Failed to allocate TX ring memory");
 389                 err = -ENOMEM;
 390                 return -1;
 391         }
 392
 393         err = enetc_alloc_txbdr(tx_ring, nb_desc);
 394         if (err)
 395                 goto fail;
 396
 397         tx_ring->index = queue_idx;
 398         tx_ring->ndev = dev;
 399         enetc_setup_txbdr(&priv->hw.hw, tx_ring);
 400         data->tx_queues[queue_idx] = tx_ring;
 401
 402         return 0;
 403 fail:
 404         rte_free(tx_ring);
 405
 406         return err;
 407 }
 408
 409 static int
 410 enetc_tx_queue_setup(struct rte_eth_dev *dev,
 411                      uint16_t queue_idx,
 412                      uint16_t nb_desc,
 413                      unsigned int socket_id __rte_unused,
 414                      const struct rte_eth_txconf *tx_conf __rte_unused)
 415 {
 416         int err = 0;
 417
 418         PMD_INIT_FUNC_TRACE();
 419         if (nb_desc > MAX_BD_COUNT)
 420                 return -1;
 421
 422         err = enetc_alloc_tx_resources(dev, queue_idx, nb_desc);
 423
 424         return err;
 425 }
 426
 427 static void
 428 enetc_tx_queue_release(void *txq)
 429 {
 430         if (txq == NULL)
 431                 return;
 432
 433         struct enetc_bdr *tx_ring = (struct enetc_bdr *)txq;
 434         struct enetc_eth_hw *eth_hw =
 435                 ENETC_DEV_PRIVATE_TO_HW(tx_ring->ndev->data->dev_private);
 436         struct enetc_hw *hw;
 437         struct enetc_swbd *tx_swbd;
 438         int i;
 439         uint32_t val;
 440
 441         /* Disable the ring */
 442         hw = &eth_hw->hw;
 443         val = enetc_txbdr_rd(hw, tx_ring->index, ENETC_TBMR);
 444         val &= (~ENETC_TBMR_EN);
 445         enetc_txbdr_wr(hw, tx_ring->index, ENETC_TBMR, val);
 446
 447         /* clean the ring*/
 448         i = tx_ring->next_to_clean;
 449         tx_swbd = &tx_ring->q_swbd[i];
 450         while (tx_swbd->buffer_addr != NULL) {
 451                 rte_pktmbuf_free(tx_swbd->buffer_addr);
 452                 tx_swbd->buffer_addr = NULL;
 453                 tx_swbd++;
 454                 i++;
 455                 if (unlikely(i == tx_ring->bd_count)) {
 456                         i = 0;
 457                         tx_swbd = &tx_ring->q_swbd[i];
 458                 }
 459         }
 460
 461         enetc_free_bdr(tx_ring);
 462         rte_free(tx_ring);
 463 }
 464
 465 static int
 466 enetc_alloc_rxbdr(struct enetc_bdr *rxr,
 467                   uint16_t nb_rx_desc)
 468 {
 469         int size;
 470
 471         size = nb_rx_desc * sizeof(struct enetc_swbd);
 472         rxr->q_swbd = rte_malloc(NULL, size, RTE_CACHE_LINE_SIZE);
 473         if (rxr->q_swbd == NULL)
 474                 return -ENOMEM;
 475
 476         size = nb_rx_desc * sizeof(union enetc_rx_bd);
 477         rxr->bd_base = rte_malloc(NULL, size, RTE_CACHE_LINE_SIZE);
 478         if (rxr->bd_base == NULL) {
 479                 rte_free(rxr->q_swbd);
 480                 rxr->q_swbd = NULL;
 481                 return -ENOMEM;
 482         }
 483
 484         rxr->bd_count = nb_rx_desc;
 485         rxr->next_to_clean = 0;
 486         rxr->next_to_use = 0;
 487         rxr->next_to_alloc = 0;
 488
 489         return 0;
 490 }
 491
 492 static void
 493 enetc_setup_rxbdr(struct enetc_hw *hw, struct enetc_bdr *rx_ring,
 494                   struct rte_mempool *mb_pool)
 495 {
 496         int idx = rx_ring->index;
 497         uint16_t buf_size;
 498         phys_addr_t bd_address;
 499
 500         bd_address = (phys_addr_t)
 501                      rte_mem_virt2iova((const void *)rx_ring->bd_base);
 502         enetc_rxbdr_wr(hw, idx, ENETC_RBBAR0,
 503                        lower_32_bits((uint64_t)bd_address));
 504         enetc_rxbdr_wr(hw, idx, ENETC_RBBAR1,
 505                        upper_32_bits((uint64_t)bd_address));
 506         enetc_rxbdr_wr(hw, idx, ENETC_RBLENR,
 507                        ENETC_RTBLENR_LEN(rx_ring->bd_count));
 508
 509         rx_ring->mb_pool = mb_pool;
 510         rx_ring->rcir = (void *)((size_t)hw->reg +
 511                         ENETC_BDR(RX, idx, ENETC_RBCIR));
 512         enetc_refill_rx_ring(rx_ring, (enetc_bd_unused(rx_ring)));
 513         buf_size = (uint16_t)(rte_pktmbuf_data_room_size(rx_ring->mb_pool) -
 514                    RTE_PKTMBUF_HEADROOM);
 515         enetc_rxbdr_wr(hw, idx, ENETC_RBBSR, buf_size);
 516         /* enable ring */
 517         enetc_rxbdr_wr(hw, idx, ENETC_RBMR, ENETC_RBMR_EN);
 518         enetc_rxbdr_wr(hw, idx, ENETC_RBPIR, 0);
 519 }
 520
 521 static int
 522 enetc_alloc_rx_resources(struct rte_eth_dev *dev,
 523                          uint16_t rx_queue_id,
 524                          uint16_t nb_rx_desc,
 525                          struct rte_mempool *mb_pool)
 526 {
 527         int err;
 528         struct enetc_bdr *rx_ring;
 529         struct rte_eth_dev_data *data =  dev->data;
 530         struct enetc_eth_adapter *adapter =
 531                         ENETC_DEV_PRIVATE(data->dev_private);
 532
 533         rx_ring = rte_zmalloc(NULL, sizeof(struct enetc_bdr), 0);
 534         if (rx_ring == NULL) {
 535                 ENETC_PMD_ERR("Failed to allocate RX ring memory");
 536                 err = -ENOMEM;
 537                 return err;
 538         }
 539
 540         err = enetc_alloc_rxbdr(rx_ring, nb_rx_desc);
 541         if (err)
 542                 goto fail;
 543
 544         rx_ring->index = rx_queue_id;
 545         rx_ring->ndev = dev;
 546         enetc_setup_rxbdr(&adapter->hw.hw, rx_ring, mb_pool);
 547         data->rx_queues[rx_queue_id] = rx_ring;
 548
 549         return 0;
 550 fail:
 551         rte_free(rx_ring);
 552
 553         return err;
 554 }
 555
 556 static int
 557 enetc_rx_queue_setup(struct rte_eth_dev *dev,
 558                      uint16_t rx_queue_id,
 559                      uint16_t nb_rx_desc,
 560                      unsigned int socket_id __rte_unused,
 561                      const struct rte_eth_rxconf *rx_conf __rte_unused,
 562                      struct rte_mempool *mb_pool)
 563 {
 564         int err = 0;
 565
 566         PMD_INIT_FUNC_TRACE();
 567         if (nb_rx_desc > MAX_BD_COUNT)
 568                 return -1;
 569
 570         err = enetc_alloc_rx_resources(dev, rx_queue_id,
 571                                        nb_rx_desc,
 572                                        mb_pool);
 573
 574         return err;
 575 }
 576
 577 static void
 578 enetc_rx_queue_release(void *rxq)
 579 {
 580         if (rxq == NULL)
 581                 return;
 582
 583         struct enetc_bdr *rx_ring = (struct enetc_bdr *)rxq;
 584         struct enetc_eth_hw *eth_hw =
 585                 ENETC_DEV_PRIVATE_TO_HW(rx_ring->ndev->data->dev_private);
 586         struct enetc_swbd *q_swbd;
 587         struct enetc_hw *hw;
 588         uint32_t val;
 589         int i;
 590
 591         /* Disable the ring */
 592         hw = &eth_hw->hw;
 593         val = enetc_rxbdr_rd(hw, rx_ring->index, ENETC_RBMR);
 594         val &= (~ENETC_RBMR_EN);
 595         enetc_rxbdr_wr(hw, rx_ring->index, ENETC_RBMR, val);
 596
 597         /* Clean the ring */
 598         i = rx_ring->next_to_clean;
 599         q_swbd = &rx_ring->q_swbd[i];
 600         while (i != rx_ring->next_to_use) {
 601                 rte_pktmbuf_free(q_swbd->buffer_addr);
 602                 q_swbd->buffer_addr = NULL;
 603                 q_swbd++;
 604                 i++;
 605                 if (unlikely(i == rx_ring->bd_count)) {
 606                         i = 0;
 607                         q_swbd = &rx_ring->q_swbd[i];
 608                 }
 609         }
 610
 611         enetc_free_bdr(rx_ring);
 612         rte_free(rx_ring);
 613 }
 614
 615 static
 616 int enetc_stats_get(struct rte_eth_dev *dev,
 617                     struct rte_eth_stats *stats)
 618 {
 619         struct enetc_eth_hw *hw =
 620                 ENETC_DEV_PRIVATE_TO_HW(dev->data->dev_private);
 621         struct enetc_hw *enetc_hw = &hw->hw;
 622
 623         /* Total received packets, bad + good, if we want to get counters of
 624          * only good received packets then use ENETC_PM0_RFRM,
 625          * ENETC_PM0_TFRM registers.
 626          */
 627         stats->ipackets = enetc_port_rd(enetc_hw, ENETC_PM0_RPKT);
 628         stats->opackets = enetc_port_rd(enetc_hw, ENETC_PM0_TPKT);
 629         stats->ibytes =  enetc_port_rd(enetc_hw, ENETC_PM0_REOCT);
 630         stats->obytes = enetc_port_rd(enetc_hw, ENETC_PM0_TEOCT);
 631         /* Dropped + Truncated packets, use ENETC_PM0_RDRNTP for without
 632          * truncated packets
 633          */
 634         stats->imissed = enetc_port_rd(enetc_hw, ENETC_PM0_RDRP);
 635         stats->ierrors = enetc_port_rd(enetc_hw, ENETC_PM0_RERR);
 636         stats->oerrors = enetc_port_rd(enetc_hw, ENETC_PM0_TERR);
 637
 638         return 0;
 639 }
 640
 641 static void
 642 enetc_stats_reset(struct rte_eth_dev *dev)
 643 {
 644         struct enetc_eth_hw *hw =
 645                 ENETC_DEV_PRIVATE_TO_HW(dev->data->dev_private);
 646         struct enetc_hw *enetc_hw = &hw->hw;
 647
 648         enetc_port_wr(enetc_hw, ENETC_PM0_STAT_CONFIG, ENETC_CLEAR_STATS);
 649 }
 650
 651 static int
 652 enetc_pci_probe(struct rte_pci_driver *pci_drv __rte_unused,
 653                            struct rte_pci_device *pci_dev)
 654 {
 655         return rte_eth_dev_pci_generic_probe(pci_dev,
 656                                              sizeof(struct enetc_eth_adapter),
 657                                              enetc_dev_init);
 658 }
 659
 660 static int
 661 enetc_pci_remove(struct rte_pci_device *pci_dev)
 662 {
 663         return rte_eth_dev_pci_generic_remove(pci_dev, enetc_dev_uninit);
 664 }
 665
 666 static struct rte_pci_driver rte_enetc_pmd = {
 667         .id_table = pci_id_enetc_map,
 668         .drv_flags = RTE_PCI_DRV_NEED_MAPPING,
 669         .probe = enetc_pci_probe,
 670         .remove = enetc_pci_remove,
 671 };
 672
 673 RTE_PMD_REGISTER_PCI(net_enetc, rte_enetc_pmd);
 674 RTE_PMD_REGISTER_PCI_TABLE(net_enetc, pci_id_enetc_map);
 675 RTE_PMD_REGISTER_KMOD_DEP(net_enetc, "* vfio-pci");
 676
 677 RTE_INIT(enetc_pmd_init_log)
 678 {
 679         enetc_logtype_pmd = rte_log_register("pmd.net.enetc");
 680         if (enetc_logtype_pmd >= 0)
 681                 rte_log_set_level(enetc_logtype_pmd, RTE_LOG_NOTICE);
 682 }