net/enic: replace some PMD macros with standard API
[dpdk.git] / drivers / net / enic / base / cq_enet_desc.h
1 /* SPDX-License-Identifier: BSD-3-Clause
2  * Copyright 2008-2017 Cisco Systems, Inc.  All rights reserved.
3  * Copyright 2007 Nuova Systems, Inc.  All rights reserved.
4  */
5
6 #ifndef _CQ_ENET_DESC_H_
7 #define _CQ_ENET_DESC_H_
8
9 #include <rte_byteorder.h>
10 #include "cq_desc.h"
11
12 /* Ethernet completion queue descriptor: 16B */
13 struct cq_enet_wq_desc {
14         __le16 completed_index;
15         __le16 q_number;
16         u8 reserved[11];
17         u8 type_color;
18 };
19
20 static inline void cq_enet_wq_desc_enc(struct cq_enet_wq_desc *desc,
21         u8 type, u8 color, u16 q_number, u16 completed_index)
22 {
23         cq_desc_enc((struct cq_desc *)desc, type,
24                 color, q_number, completed_index);
25 }
26
27 static inline void cq_enet_wq_desc_dec(struct cq_enet_wq_desc *desc,
28         u8 *type, u8 *color, u16 *q_number, u16 *completed_index)
29 {
30         cq_desc_dec((struct cq_desc *)desc, type,
31                 color, q_number, completed_index);
32 }
33
34 /* Completion queue descriptor: Ethernet receive queue, 16B */
35 struct cq_enet_rq_desc {
36         __le16 completed_index_flags;
37         __le16 q_number_rss_type_flags;
38         __le32 rss_hash;
39         __le16 bytes_written_flags;
40         __le16 vlan;
41         __le16 checksum_fcoe;
42         u8 flags;
43         u8 type_color;
44 };
45
46 /* Completion queue descriptor: Ethernet receive queue, 16B */
47 struct cq_enet_rq_clsf_desc {
48         __le16 completed_index_flags;
49         __le16 q_number_rss_type_flags;
50         __le16 filter_id;
51         __le16 lif;
52         __le16 bytes_written_flags;
53         __le16 vlan;
54         __le16 checksum_fcoe;
55         u8 flags;
56         u8 type_color;
57 };
58
59 #define CQ_ENET_RQ_DESC_FLAGS_INGRESS_PORT          (0x1 << 12)
60 #define CQ_ENET_RQ_DESC_FLAGS_FCOE                  (0x1 << 13)
61 #define CQ_ENET_RQ_DESC_FLAGS_EOP                   (0x1 << 14)
62 #define CQ_ENET_RQ_DESC_FLAGS_SOP                   (0x1 << 15)
63
64 #define CQ_ENET_RQ_DESC_RSS_TYPE_BITS               4
65 #define CQ_ENET_RQ_DESC_RSS_TYPE_MASK \
66         ((1 << CQ_ENET_RQ_DESC_RSS_TYPE_BITS) - 1)
67 #define CQ_ENET_RQ_DESC_RSS_TYPE_NONE               0
68 #define CQ_ENET_RQ_DESC_RSS_TYPE_IPv4               1
69 #define CQ_ENET_RQ_DESC_RSS_TYPE_TCP_IPv4           2
70 #define CQ_ENET_RQ_DESC_RSS_TYPE_IPv6               3
71 #define CQ_ENET_RQ_DESC_RSS_TYPE_TCP_IPv6           4
72 #define CQ_ENET_RQ_DESC_RSS_TYPE_IPv6_EX            5
73 #define CQ_ENET_RQ_DESC_RSS_TYPE_TCP_IPv6_EX        6
74
75 #define CQ_ENET_RQ_DESC_FLAGS_CSUM_NOT_CALC         (0x1 << 14)
76
77 #define CQ_ENET_RQ_DESC_BYTES_WRITTEN_BITS          14
78 #define CQ_ENET_RQ_DESC_BYTES_WRITTEN_MASK \
79         ((1 << CQ_ENET_RQ_DESC_BYTES_WRITTEN_BITS) - 1)
80 #define CQ_ENET_RQ_DESC_FLAGS_TRUNCATED             (0x1 << 14)
81 #define CQ_ENET_RQ_DESC_FLAGS_VLAN_STRIPPED         (0x1 << 15)
82
83 #define CQ_ENET_RQ_DESC_VLAN_TCI_VLAN_BITS          12
84 #define CQ_ENET_RQ_DESC_VLAN_TCI_VLAN_MASK \
85         ((1 << CQ_ENET_RQ_DESC_VLAN_TCI_VLAN_BITS) - 1)
86 #define CQ_ENET_RQ_DESC_VLAN_TCI_CFI_MASK           (0x1 << 12)
87 #define CQ_ENET_RQ_DESC_VLAN_TCI_USER_PRIO_BITS     3
88 #define CQ_ENET_RQ_DESC_VLAN_TCI_USER_PRIO_MASK \
89         ((1 << CQ_ENET_RQ_DESC_VLAN_TCI_USER_PRIO_BITS) - 1)
90 #define CQ_ENET_RQ_DESC_VLAN_TCI_USER_PRIO_SHIFT    13
91
92 #define CQ_ENET_RQ_DESC_FCOE_SOF_BITS               8
93 #define CQ_ENET_RQ_DESC_FCOE_SOF_MASK \
94         ((1 << CQ_ENET_RQ_DESC_FCOE_SOF_BITS) - 1)
95 #define CQ_ENET_RQ_DESC_FCOE_EOF_BITS               8
96 #define CQ_ENET_RQ_DESC_FCOE_EOF_MASK \
97         ((1 << CQ_ENET_RQ_DESC_FCOE_EOF_BITS) - 1)
98 #define CQ_ENET_RQ_DESC_FCOE_EOF_SHIFT              8
99
100 #define CQ_ENET_RQ_DESC_FLAGS_TCP_UDP_CSUM_OK       (0x1 << 0)
101 #define CQ_ENET_RQ_DESC_FCOE_FC_CRC_OK              (0x1 << 0)
102 #define CQ_ENET_RQ_DESC_FLAGS_UDP                   (0x1 << 1)
103 #define CQ_ENET_RQ_DESC_FCOE_ENC_ERROR              (0x1 << 1)
104 #define CQ_ENET_RQ_DESC_FLAGS_TCP                   (0x1 << 2)
105 #define CQ_ENET_RQ_DESC_FLAGS_IPV4_CSUM_OK          (0x1 << 3)
106 #define CQ_ENET_RQ_DESC_FLAGS_IPV6                  (0x1 << 4)
107 #define CQ_ENET_RQ_DESC_FLAGS_IPV4                  (0x1 << 5)
108 #define CQ_ENET_RQ_DESC_FLAGS_IPV4_FRAGMENT         (0x1 << 6)
109 #define CQ_ENET_RQ_DESC_FLAGS_FCS_OK                (0x1 << 7)
110
111 static inline void cq_enet_rq_desc_enc(struct cq_enet_rq_desc *desc,
112         u8 type, u8 color, u16 q_number, u16 completed_index,
113         u8 ingress_port, u8 fcoe, u8 eop, u8 sop, u8 rss_type, u8 csum_not_calc,
114         u32 rss_hash, u16 bytes_written, u8 packet_error, u8 vlan_stripped,
115         u16 vlan, u16 checksum, u8 fcoe_sof, u8 fcoe_fc_crc_ok,
116         u8 fcoe_enc_error, u8 fcoe_eof, u8 tcp_udp_csum_ok, u8 udp, u8 tcp,
117         u8 ipv4_csum_ok, u8 ipv6, u8 ipv4, u8 ipv4_fragment, u8 fcs_ok)
118 {
119         cq_desc_enc((struct cq_desc *)desc, type,
120                 color, q_number, completed_index);
121
122         desc->completed_index_flags |= rte_cpu_to_le_16
123                 ((ingress_port ? CQ_ENET_RQ_DESC_FLAGS_INGRESS_PORT : 0) |
124                 (fcoe ? CQ_ENET_RQ_DESC_FLAGS_FCOE : 0) |
125                 (eop ? CQ_ENET_RQ_DESC_FLAGS_EOP : 0) |
126                 (sop ? CQ_ENET_RQ_DESC_FLAGS_SOP : 0));
127
128         desc->q_number_rss_type_flags |= rte_cpu_to_le_16
129                 (((rss_type & CQ_ENET_RQ_DESC_RSS_TYPE_MASK) <<
130                 CQ_DESC_Q_NUM_BITS) |
131                 (csum_not_calc ? CQ_ENET_RQ_DESC_FLAGS_CSUM_NOT_CALC : 0));
132
133         desc->rss_hash = rte_cpu_to_le_32(rss_hash);
134
135         desc->bytes_written_flags = rte_cpu_to_le_16
136                 ((bytes_written & CQ_ENET_RQ_DESC_BYTES_WRITTEN_MASK) |
137                 (packet_error ? CQ_ENET_RQ_DESC_FLAGS_TRUNCATED : 0) |
138                 (vlan_stripped ? CQ_ENET_RQ_DESC_FLAGS_VLAN_STRIPPED : 0));
139
140         desc->vlan = rte_cpu_to_le_16(vlan);
141
142         if (fcoe) {
143                 desc->checksum_fcoe = rte_cpu_to_le_16
144                         ((fcoe_sof & CQ_ENET_RQ_DESC_FCOE_SOF_MASK) |
145                         ((fcoe_eof & CQ_ENET_RQ_DESC_FCOE_EOF_MASK) <<
146                                 CQ_ENET_RQ_DESC_FCOE_EOF_SHIFT));
147         } else {
148                 desc->checksum_fcoe = rte_cpu_to_le_16(checksum);
149         }
150
151         desc->flags =
152                 (tcp_udp_csum_ok ? CQ_ENET_RQ_DESC_FLAGS_TCP_UDP_CSUM_OK : 0) |
153                 (udp ? CQ_ENET_RQ_DESC_FLAGS_UDP : 0) |
154                 (tcp ? CQ_ENET_RQ_DESC_FLAGS_TCP : 0) |
155                 (ipv4_csum_ok ? CQ_ENET_RQ_DESC_FLAGS_IPV4_CSUM_OK : 0) |
156                 (ipv6 ? CQ_ENET_RQ_DESC_FLAGS_IPV6 : 0) |
157                 (ipv4 ? CQ_ENET_RQ_DESC_FLAGS_IPV4 : 0) |
158                 (ipv4_fragment ? CQ_ENET_RQ_DESC_FLAGS_IPV4_FRAGMENT : 0) |
159                 (fcs_ok ? CQ_ENET_RQ_DESC_FLAGS_FCS_OK : 0) |
160                 (fcoe_fc_crc_ok ? CQ_ENET_RQ_DESC_FCOE_FC_CRC_OK : 0) |
161                 (fcoe_enc_error ? CQ_ENET_RQ_DESC_FCOE_ENC_ERROR : 0);
162 }
163
164 static inline void cq_enet_rq_desc_dec(struct cq_enet_rq_desc *desc,
165         u8 *type, u8 *color, u16 *q_number, u16 *completed_index,
166         u8 *ingress_port, u8 *fcoe, u8 *eop, u8 *sop, u8 *rss_type,
167         u8 *csum_not_calc, u32 *rss_hash, u16 *bytes_written, u8 *packet_error,
168         u8 *vlan_stripped, u16 *vlan_tci, u16 *checksum, u8 *fcoe_sof,
169         u8 *fcoe_fc_crc_ok, u8 *fcoe_enc_error, u8 *fcoe_eof,
170         u8 *tcp_udp_csum_ok, u8 *udp, u8 *tcp, u8 *ipv4_csum_ok,
171         u8 *ipv6, u8 *ipv4, u8 *ipv4_fragment, u8 *fcs_ok)
172 {
173         u16 completed_index_flags;
174         u16 q_number_rss_type_flags;
175         u16 bytes_written_flags;
176
177         cq_desc_dec((struct cq_desc *)desc, type,
178                 color, q_number, completed_index);
179
180         completed_index_flags = rte_le_to_cpu_16(desc->completed_index_flags);
181         q_number_rss_type_flags =
182                 rte_le_to_cpu_16(desc->q_number_rss_type_flags);
183         bytes_written_flags = rte_le_to_cpu_16(desc->bytes_written_flags);
184
185         *ingress_port = (completed_index_flags &
186                 CQ_ENET_RQ_DESC_FLAGS_INGRESS_PORT) ? 1 : 0;
187         *fcoe = (completed_index_flags & CQ_ENET_RQ_DESC_FLAGS_FCOE) ?
188                 1 : 0;
189         *eop = (completed_index_flags & CQ_ENET_RQ_DESC_FLAGS_EOP) ?
190                 1 : 0;
191         *sop = (completed_index_flags & CQ_ENET_RQ_DESC_FLAGS_SOP) ?
192                 1 : 0;
193
194         *rss_type = (u8)((q_number_rss_type_flags >> CQ_DESC_Q_NUM_BITS) &
195                 CQ_ENET_RQ_DESC_RSS_TYPE_MASK);
196         *csum_not_calc = (q_number_rss_type_flags &
197                 CQ_ENET_RQ_DESC_FLAGS_CSUM_NOT_CALC) ? 1 : 0;
198
199         *rss_hash = rte_le_to_cpu_32(desc->rss_hash);
200
201         *bytes_written = bytes_written_flags &
202                 CQ_ENET_RQ_DESC_BYTES_WRITTEN_MASK;
203         *packet_error = (bytes_written_flags &
204                 CQ_ENET_RQ_DESC_FLAGS_TRUNCATED) ? 1 : 0;
205         *vlan_stripped = (bytes_written_flags &
206                 CQ_ENET_RQ_DESC_FLAGS_VLAN_STRIPPED) ? 1 : 0;
207
208         /*
209          * Tag Control Information(16) = user_priority(3) + cfi(1) + vlan(12)
210          */
211         *vlan_tci = rte_le_to_cpu_16(desc->vlan);
212
213         if (*fcoe) {
214                 *fcoe_sof = (u8)(rte_le_to_cpu_16(desc->checksum_fcoe) &
215                         CQ_ENET_RQ_DESC_FCOE_SOF_MASK);
216                 *fcoe_fc_crc_ok = (desc->flags &
217                         CQ_ENET_RQ_DESC_FCOE_FC_CRC_OK) ? 1 : 0;
218                 *fcoe_enc_error = (desc->flags &
219                         CQ_ENET_RQ_DESC_FCOE_ENC_ERROR) ? 1 : 0;
220                 *fcoe_eof = (u8)((rte_le_to_cpu_16(desc->checksum_fcoe) >>
221                         CQ_ENET_RQ_DESC_FCOE_EOF_SHIFT) &
222                         CQ_ENET_RQ_DESC_FCOE_EOF_MASK);
223                 *checksum = 0;
224         } else {
225                 *fcoe_sof = 0;
226                 *fcoe_fc_crc_ok = 0;
227                 *fcoe_enc_error = 0;
228                 *fcoe_eof = 0;
229                 *checksum = rte_le_to_cpu_16(desc->checksum_fcoe);
230         }
231
232         *tcp_udp_csum_ok =
233                 (desc->flags & CQ_ENET_RQ_DESC_FLAGS_TCP_UDP_CSUM_OK) ? 1 : 0;
234         *udp = (desc->flags & CQ_ENET_RQ_DESC_FLAGS_UDP) ? 1 : 0;
235         *tcp = (desc->flags & CQ_ENET_RQ_DESC_FLAGS_TCP) ? 1 : 0;
236         *ipv4_csum_ok =
237                 (desc->flags & CQ_ENET_RQ_DESC_FLAGS_IPV4_CSUM_OK) ? 1 : 0;
238         *ipv6 = (desc->flags & CQ_ENET_RQ_DESC_FLAGS_IPV6) ? 1 : 0;
239         *ipv4 = (desc->flags & CQ_ENET_RQ_DESC_FLAGS_IPV4) ? 1 : 0;
240         *ipv4_fragment =
241                 (desc->flags & CQ_ENET_RQ_DESC_FLAGS_IPV4_FRAGMENT) ? 1 : 0;
242         *fcs_ok = (desc->flags & CQ_ENET_RQ_DESC_FLAGS_FCS_OK) ? 1 : 0;
243 }
244
245 #endif /* _CQ_ENET_DESC_H_ */