drivers/net/enic/base/vnic_cq.c

   1 /* SPDX-License-Identifier: BSD-3-Clause
   2  * Copyright 2008-2017 Cisco Systems, Inc.  All rights reserved.
   3  * Copyright 2007 Nuova Systems, Inc.  All rights reserved.
   4  */
   5
   6 #include "vnic_dev.h"
   7 #include "vnic_cq.h"
   8 #include <rte_memzone.h>
   9
  10 void vnic_cq_free(struct vnic_cq *cq)
  11 {
  12         vnic_dev_free_desc_ring(cq->vdev, &cq->ring);
  13
  14         cq->ctrl = NULL;
  15 }
  16
  17 int vnic_cq_alloc(struct vnic_dev *vdev, struct vnic_cq *cq, unsigned int index,
  18         unsigned int socket_id,
  19         unsigned int desc_count, unsigned int desc_size)
  20 {
  21         int err;
  22         char res_name[RTE_MEMZONE_NAMESIZE];
  23         static int instance;
  24
  25         cq->index = index;
  26         cq->vdev = vdev;
  27
  28         cq->ctrl = vnic_dev_get_res(vdev, RES_TYPE_CQ, index);
  29         if (!cq->ctrl) {
  30                 pr_err("Failed to hook CQ[%u] resource\n", index);
  31                 return -EINVAL;
  32         }
  33
  34         snprintf(res_name, sizeof(res_name), "%d-cq-%u", instance++, index);
  35         err = vnic_dev_alloc_desc_ring(vdev, &cq->ring, desc_count, desc_size,
  36                 socket_id, res_name);
  37         if (err)
  38                 return err;
  39
  40         return 0;
  41 }
  42
  43 void vnic_cq_init(struct vnic_cq *cq, unsigned int flow_control_enable,
  44         unsigned int color_enable, unsigned int cq_head, unsigned int cq_tail,
  45         unsigned int cq_tail_color, unsigned int interrupt_enable,
  46         unsigned int cq_entry_enable, unsigned int cq_message_enable,
  47         unsigned int interrupt_offset, uint64_t cq_message_addr)
  48 {
  49         uint64_t paddr;
  50
  51         paddr = (uint64_t)cq->ring.base_addr | VNIC_PADDR_TARGET;
  52         writeq(paddr, &cq->ctrl->ring_base);
  53         iowrite32(cq->ring.desc_count, &cq->ctrl->ring_size);
  54         iowrite32(flow_control_enable, &cq->ctrl->flow_control_enable);
  55         iowrite32(color_enable, &cq->ctrl->color_enable);
  56         iowrite32(cq_head, &cq->ctrl->cq_head);
  57         iowrite32(cq_tail, &cq->ctrl->cq_tail);
  58         iowrite32(cq_tail_color, &cq->ctrl->cq_tail_color);
  59         iowrite32(interrupt_enable, &cq->ctrl->interrupt_enable);
  60         iowrite32(cq_entry_enable, &cq->ctrl->cq_entry_enable);
  61         iowrite32(cq_message_enable, &cq->ctrl->cq_message_enable);
  62         iowrite32(interrupt_offset, &cq->ctrl->interrupt_offset);
  63         writeq(cq_message_addr, &cq->ctrl->cq_message_addr);
  64
  65         cq->interrupt_offset = interrupt_offset;
  66 }
  67
  68 void vnic_cq_clean(struct vnic_cq *cq)
  69 {
  70         cq->to_clean = 0;
  71         cq->last_color = 0;
  72
  73         iowrite32(0, &cq->ctrl->cq_head);
  74         iowrite32(0, &cq->ctrl->cq_tail);
  75         iowrite32(1, &cq->ctrl->cq_tail_color);
  76
  77         vnic_dev_clear_desc_ring(&cq->ring);
  78 }