drivers/net/enic/enic_ethdev.c

   1 /* SPDX-License-Identifier: BSD-3-Clause
   2  * Copyright 2008-2017 Cisco Systems, Inc.  All rights reserved.
   3  * Copyright 2007 Nuova Systems, Inc.  All rights reserved.
   4  */
   5
   6 #include <stdio.h>
   7 #include <stdint.h>
   8
   9 #include <rte_dev.h>
  10 #include <rte_pci.h>
  11 #include <rte_bus_pci.h>
  12 #include <rte_ethdev_driver.h>
  13 #include <rte_ethdev_pci.h>
  14 #include <rte_kvargs.h>
  15 #include <rte_string_fns.h>
  16
  17 #include "vnic_intr.h"
  18 #include "vnic_cq.h"
  19 #include "vnic_wq.h"
  20 #include "vnic_rq.h"
  21 #include "vnic_enet.h"
  22 #include "enic.h"
  23
  24 int enic_pmd_logtype;
  25
  26 /*
  27  * The set of PCI devices this driver supports
  28  */
  29 #define CISCO_PCI_VENDOR_ID 0x1137
  30 static const struct rte_pci_id pci_id_enic_map[] = {
  31         {RTE_PCI_DEVICE(CISCO_PCI_VENDOR_ID, PCI_DEVICE_ID_CISCO_VIC_ENET)},
  32         {RTE_PCI_DEVICE(CISCO_PCI_VENDOR_ID, PCI_DEVICE_ID_CISCO_VIC_ENET_VF)},
  33         {RTE_PCI_DEVICE(CISCO_PCI_VENDOR_ID, PCI_DEVICE_ID_CISCO_VIC_ENET_SN)},
  34         {.vendor_id = 0, /* sentinel */},
  35 };
  36
  37 /* Supported link speeds of production VIC models */
  38 static const struct vic_speed_capa {
  39         uint16_t sub_devid;
  40         uint32_t capa;
  41 } vic_speed_capa_map[] = {
  42         { 0x0043, ETH_LINK_SPEED_10G }, /* VIC */
  43         { 0x0047, ETH_LINK_SPEED_10G }, /* P81E PCIe */
  44         { 0x0048, ETH_LINK_SPEED_10G }, /* M81KR Mezz */
  45         { 0x004f, ETH_LINK_SPEED_10G }, /* 1280 Mezz */
  46         { 0x0084, ETH_LINK_SPEED_10G }, /* 1240 MLOM */
  47         { 0x0085, ETH_LINK_SPEED_10G }, /* 1225 PCIe */
  48         { 0x00cd, ETH_LINK_SPEED_10G | ETH_LINK_SPEED_40G }, /* 1285 PCIe */
  49         { 0x00ce, ETH_LINK_SPEED_10G }, /* 1225T PCIe */
  50         { 0x012a, ETH_LINK_SPEED_40G }, /* M4308 */
  51         { 0x012c, ETH_LINK_SPEED_10G | ETH_LINK_SPEED_40G }, /* 1340 MLOM */
  52         { 0x012e, ETH_LINK_SPEED_10G }, /* 1227 PCIe */
  53         { 0x0137, ETH_LINK_SPEED_10G | ETH_LINK_SPEED_40G }, /* 1380 Mezz */
  54         { 0x014d, ETH_LINK_SPEED_10G | ETH_LINK_SPEED_40G }, /* 1385 PCIe */
  55         { 0x015d, ETH_LINK_SPEED_10G | ETH_LINK_SPEED_40G }, /* 1387 MLOM */
  56         { 0x0215, ETH_LINK_SPEED_10G | ETH_LINK_SPEED_25G |
  57                   ETH_LINK_SPEED_40G }, /* 1440 Mezz */
  58         { 0x0216, ETH_LINK_SPEED_10G | ETH_LINK_SPEED_25G |
  59                   ETH_LINK_SPEED_40G }, /* 1480 MLOM */
  60         { 0x0217, ETH_LINK_SPEED_10G | ETH_LINK_SPEED_25G }, /* 1455 PCIe */
  61         { 0x0218, ETH_LINK_SPEED_10G | ETH_LINK_SPEED_25G }, /* 1457 MLOM */
  62         { 0x0219, ETH_LINK_SPEED_40G }, /* 1485 PCIe */
  63         { 0x021a, ETH_LINK_SPEED_40G }, /* 1487 MLOM */
  64         { 0x024a, ETH_LINK_SPEED_40G | ETH_LINK_SPEED_100G }, /* 1495 PCIe */
  65         { 0x024b, ETH_LINK_SPEED_40G | ETH_LINK_SPEED_100G }, /* 1497 MLOM */
  66         { 0, 0 }, /* End marker */
  67 };
  68
  69 #define ENIC_DEVARG_DISABLE_OVERLAY "disable-overlay"
  70 #define ENIC_DEVARG_ENABLE_AVX2_RX "enable-avx2-rx"
  71 #define ENIC_DEVARG_GENEVE_OPT "geneve-opt"
  72 #define ENIC_DEVARG_IG_VLAN_REWRITE "ig-vlan-rewrite"
  73
  74 RTE_INIT(enicpmd_init_log)
  75 {
  76         enic_pmd_logtype = rte_log_register("pmd.net.enic");
  77         if (enic_pmd_logtype >= 0)
  78                 rte_log_set_level(enic_pmd_logtype, RTE_LOG_INFO);
  79 }
  80
  81 static int
  82 enicpmd_fdir_ctrl_func(struct rte_eth_dev *eth_dev,
  83                         enum rte_filter_op filter_op, void *arg)
  84 {
  85         struct enic *enic = pmd_priv(eth_dev);
  86         int ret = 0;
  87
  88         ENICPMD_FUNC_TRACE();
  89         if (filter_op == RTE_ETH_FILTER_NOP)
  90                 return 0;
  91
  92         if (arg == NULL && filter_op != RTE_ETH_FILTER_FLUSH)
  93                 return -EINVAL;
  94
  95         switch (filter_op) {
  96         case RTE_ETH_FILTER_ADD:
  97         case RTE_ETH_FILTER_UPDATE:
  98                 ret = enic_fdir_add_fltr(enic,
  99                         (struct rte_eth_fdir_filter *)arg);
 100                 break;
 101
 102         case RTE_ETH_FILTER_DELETE:
 103                 ret = enic_fdir_del_fltr(enic,
 104                         (struct rte_eth_fdir_filter *)arg);
 105                 break;
 106
 107         case RTE_ETH_FILTER_STATS:
 108                 enic_fdir_stats_get(enic, (struct rte_eth_fdir_stats *)arg);
 109                 break;
 110
 111         case RTE_ETH_FILTER_FLUSH:
 112                 dev_warning(enic, "unsupported operation %u", filter_op);
 113                 ret = -ENOTSUP;
 114                 break;
 115         case RTE_ETH_FILTER_INFO:
 116                 enic_fdir_info_get(enic, (struct rte_eth_fdir_info *)arg);
 117                 break;
 118         default:
 119                 dev_err(enic, "unknown operation %u", filter_op);
 120                 ret = -EINVAL;
 121                 break;
 122         }
 123         return ret;
 124 }
 125
 126 static int
 127 enicpmd_dev_filter_ctrl(struct rte_eth_dev *dev,
 128                      enum rte_filter_type filter_type,
 129                      enum rte_filter_op filter_op,
 130                      void *arg)
 131 {
 132         struct enic *enic = pmd_priv(dev);
 133         int ret = 0;
 134
 135         ENICPMD_FUNC_TRACE();
 136
 137         /*
 138          * Currently, when Geneve with options offload is enabled, host
 139          * cannot insert match-action rules.
 140          */
 141         if (enic->geneve_opt_enabled)
 142                 return -ENOTSUP;
 143         switch (filter_type) {
 144         case RTE_ETH_FILTER_GENERIC:
 145                 if (filter_op != RTE_ETH_FILTER_GET)
 146                         return -EINVAL;
 147                 if (enic->flow_filter_mode == FILTER_FLOWMAN)
 148                         *(const void **)arg = &enic_fm_flow_ops;
 149                 else
 150                         *(const void **)arg = &enic_flow_ops;
 151                 break;
 152         case RTE_ETH_FILTER_FDIR:
 153                 ret = enicpmd_fdir_ctrl_func(dev, filter_op, arg);
 154                 break;
 155         default:
 156                 dev_warning(enic, "Filter type (%d) not supported",
 157                         filter_type);
 158                 ret = -EINVAL;
 159                 break;
 160         }
 161
 162         return ret;
 163 }
 164
 165 static void enicpmd_dev_tx_queue_release(void *txq)
 166 {
 167         ENICPMD_FUNC_TRACE();
 168
 169         if (rte_eal_process_type() != RTE_PROC_PRIMARY)
 170                 return;
 171
 172         enic_free_wq(txq);
 173 }
 174
 175 static int enicpmd_dev_setup_intr(struct enic *enic)
 176 {
 177         int ret;
 178         unsigned int index;
 179
 180         ENICPMD_FUNC_TRACE();
 181
 182         /* Are we done with the init of all the queues? */
 183         for (index = 0; index < enic->cq_count; index++) {
 184                 if (!enic->cq[index].ctrl)
 185                         break;
 186         }
 187         if (enic->cq_count != index)
 188                 return 0;
 189         for (index = 0; index < enic->wq_count; index++) {
 190                 if (!enic->wq[index].ctrl)
 191                         break;
 192         }
 193         if (enic->wq_count != index)
 194                 return 0;
 195         /* check start of packet (SOP) RQs only in case scatter is disabled. */
 196         for (index = 0; index < enic->rq_count; index++) {
 197                 if (!enic->rq[enic_rte_rq_idx_to_sop_idx(index)].ctrl)
 198                         break;
 199         }
 200         if (enic->rq_count != index)
 201                 return 0;
 202
 203         ret = enic_alloc_intr_resources(enic);
 204         if (ret) {
 205                 dev_err(enic, "alloc intr failed\n");
 206                 return ret;
 207         }
 208         enic_init_vnic_resources(enic);
 209
 210         ret = enic_setup_finish(enic);
 211         if (ret)
 212                 dev_err(enic, "setup could not be finished\n");
 213
 214         return ret;
 215 }
 216
 217 static int enicpmd_dev_tx_queue_setup(struct rte_eth_dev *eth_dev,
 218         uint16_t queue_idx,
 219         uint16_t nb_desc,
 220         unsigned int socket_id,
 221         const struct rte_eth_txconf *tx_conf)
 222 {
 223         int ret;
 224         struct enic *enic = pmd_priv(eth_dev);
 225         struct vnic_wq *wq;
 226
 227         if (rte_eal_process_type() != RTE_PROC_PRIMARY)
 228                 return -E_RTE_SECONDARY;
 229
 230         ENICPMD_FUNC_TRACE();
 231         RTE_ASSERT(queue_idx < enic->conf_wq_count);
 232         wq = &enic->wq[queue_idx];
 233         wq->offloads = tx_conf->offloads |
 234                 eth_dev->data->dev_conf.txmode.offloads;
 235         eth_dev->data->tx_queues[queue_idx] = (void *)wq;
 236
 237         ret = enic_alloc_wq(enic, queue_idx, socket_id, nb_desc);
 238         if (ret) {
 239                 dev_err(enic, "error in allocating wq\n");
 240                 return ret;
 241         }
 242
 243         return enicpmd_dev_setup_intr(enic);
 244 }
 245
 246 static int enicpmd_dev_tx_queue_start(struct rte_eth_dev *eth_dev,
 247         uint16_t queue_idx)
 248 {
 249         struct enic *enic = pmd_priv(eth_dev);
 250
 251         ENICPMD_FUNC_TRACE();
 252
 253         enic_start_wq(enic, queue_idx);
 254
 255         return 0;
 256 }
 257
 258 static int enicpmd_dev_tx_queue_stop(struct rte_eth_dev *eth_dev,
 259         uint16_t queue_idx)
 260 {
 261         int ret;
 262         struct enic *enic = pmd_priv(eth_dev);
 263
 264         ENICPMD_FUNC_TRACE();
 265
 266         ret = enic_stop_wq(enic, queue_idx);
 267         if (ret)
 268                 dev_err(enic, "error in stopping wq %d\n", queue_idx);
 269
 270         return ret;
 271 }
 272
 273 static int enicpmd_dev_rx_queue_start(struct rte_eth_dev *eth_dev,
 274         uint16_t queue_idx)
 275 {
 276         struct enic *enic = pmd_priv(eth_dev);
 277
 278         ENICPMD_FUNC_TRACE();
 279
 280         enic_start_rq(enic, queue_idx);
 281
 282         return 0;
 283 }
 284
 285 static int enicpmd_dev_rx_queue_stop(struct rte_eth_dev *eth_dev,
 286         uint16_t queue_idx)
 287 {
 288         int ret;
 289         struct enic *enic = pmd_priv(eth_dev);
 290
 291         ENICPMD_FUNC_TRACE();
 292
 293         ret = enic_stop_rq(enic, queue_idx);
 294         if (ret)
 295                 dev_err(enic, "error in stopping rq %d\n", queue_idx);
 296
 297         return ret;
 298 }
 299
 300 static void enicpmd_dev_rx_queue_release(void *rxq)
 301 {
 302         ENICPMD_FUNC_TRACE();
 303
 304         if (rte_eal_process_type() != RTE_PROC_PRIMARY)
 305                 return;
 306
 307         enic_free_rq(rxq);
 308 }
 309
 310 static uint32_t enicpmd_dev_rx_queue_count(struct rte_eth_dev *dev,
 311                                            uint16_t rx_queue_id)
 312 {
 313         struct enic *enic = pmd_priv(dev);
 314         uint32_t queue_count = 0;
 315         struct vnic_cq *cq;
 316         uint32_t cq_tail;
 317         uint16_t cq_idx;
 318         int rq_num;
 319
 320         rq_num = enic_rte_rq_idx_to_sop_idx(rx_queue_id);
 321         cq = &enic->cq[enic_cq_rq(enic, rq_num)];
 322         cq_idx = cq->to_clean;
 323
 324         cq_tail = ioread32(&cq->ctrl->cq_tail);
 325
 326         if (cq_tail < cq_idx)
 327                 cq_tail += cq->ring.desc_count;
 328
 329         queue_count = cq_tail - cq_idx;
 330
 331         return queue_count;
 332 }
 333
 334 static int enicpmd_dev_rx_queue_setup(struct rte_eth_dev *eth_dev,
 335         uint16_t queue_idx,
 336         uint16_t nb_desc,
 337         unsigned int socket_id,
 338         const struct rte_eth_rxconf *rx_conf,
 339         struct rte_mempool *mp)
 340 {
 341         int ret;
 342         struct enic *enic = pmd_priv(eth_dev);
 343
 344         ENICPMD_FUNC_TRACE();
 345
 346         if (rte_eal_process_type() != RTE_PROC_PRIMARY)
 347                 return -E_RTE_SECONDARY;
 348         RTE_ASSERT(enic_rte_rq_idx_to_sop_idx(queue_idx) < enic->conf_rq_count);
 349         eth_dev->data->rx_queues[queue_idx] =
 350                 (void *)&enic->rq[enic_rte_rq_idx_to_sop_idx(queue_idx)];
 351
 352         ret = enic_alloc_rq(enic, queue_idx, socket_id, mp, nb_desc,
 353                             rx_conf->rx_free_thresh);
 354         if (ret) {
 355                 dev_err(enic, "error in allocating rq\n");
 356                 return ret;
 357         }
 358
 359         return enicpmd_dev_setup_intr(enic);
 360 }
 361
 362 static int enicpmd_vlan_offload_set(struct rte_eth_dev *eth_dev, int mask)
 363 {
 364         struct enic *enic = pmd_priv(eth_dev);
 365         uint64_t offloads;
 366
 367         ENICPMD_FUNC_TRACE();
 368
 369         offloads = eth_dev->data->dev_conf.rxmode.offloads;
 370         if (mask & ETH_VLAN_STRIP_MASK) {
 371                 if (offloads & DEV_RX_OFFLOAD_VLAN_STRIP)
 372                         enic->ig_vlan_strip_en = 1;
 373                 else
 374                         enic->ig_vlan_strip_en = 0;
 375         }
 376
 377         if ((mask & ETH_VLAN_FILTER_MASK) &&
 378             (offloads & DEV_RX_OFFLOAD_VLAN_FILTER)) {
 379                 dev_warning(enic,
 380                         "Configuration of VLAN filter is not supported\n");
 381         }
 382
 383         if ((mask & ETH_VLAN_EXTEND_MASK) &&
 384             (offloads & DEV_RX_OFFLOAD_VLAN_EXTEND)) {
 385                 dev_warning(enic,
 386                         "Configuration of extended VLAN is not supported\n");
 387         }
 388
 389         return enic_set_vlan_strip(enic);
 390 }
 391
 392 static int enicpmd_dev_configure(struct rte_eth_dev *eth_dev)
 393 {
 394         int ret;
 395         int mask;
 396         struct enic *enic = pmd_priv(eth_dev);
 397
 398         if (rte_eal_process_type() != RTE_PROC_PRIMARY)
 399                 return -E_RTE_SECONDARY;
 400
 401         ENICPMD_FUNC_TRACE();
 402         ret = enic_set_vnic_res(enic);
 403         if (ret) {
 404                 dev_err(enic, "Set vNIC resource num  failed, aborting\n");
 405                 return ret;
 406         }
 407
 408         eth_dev->data->dev_conf.rxmode.offloads |= DEV_RX_OFFLOAD_RSS_HASH;
 409
 410         enic->mc_count = 0;
 411         enic->hw_ip_checksum = !!(eth_dev->data->dev_conf.rxmode.offloads &
 412                                   DEV_RX_OFFLOAD_CHECKSUM);
 413         /* All vlan offload masks to apply the current settings */
 414         mask = ETH_VLAN_STRIP_MASK |
 415                 ETH_VLAN_FILTER_MASK |
 416                 ETH_VLAN_EXTEND_MASK;
 417         ret = enicpmd_vlan_offload_set(eth_dev, mask);
 418         if (ret) {
 419                 dev_err(enic, "Failed to configure VLAN offloads\n");
 420                 return ret;
 421         }
 422         /*
 423          * Initialize RSS with the default reta and key. If the user key is
 424          * given (rx_adv_conf.rss_conf.rss_key), will use that instead of the
 425          * default key.
 426          */
 427         return enic_init_rss_nic_cfg(enic);
 428 }
 429
 430 /* Start the device.
 431  * It returns 0 on success.
 432  */
 433 static int enicpmd_dev_start(struct rte_eth_dev *eth_dev)
 434 {
 435         struct enic *enic = pmd_priv(eth_dev);
 436
 437         if (rte_eal_process_type() != RTE_PROC_PRIMARY)
 438                 return -E_RTE_SECONDARY;
 439
 440         ENICPMD_FUNC_TRACE();
 441         return enic_enable(enic);
 442 }
 443
 444 /*
 445  * Stop device: disable rx and tx functions to allow for reconfiguring.
 446  */
 447 static void enicpmd_dev_stop(struct rte_eth_dev *eth_dev)
 448 {
 449         struct rte_eth_link link;
 450         struct enic *enic = pmd_priv(eth_dev);
 451
 452         if (rte_eal_process_type() != RTE_PROC_PRIMARY)
 453                 return;
 454
 455         ENICPMD_FUNC_TRACE();
 456         enic_disable(enic);
 457
 458         memset(&link, 0, sizeof(link));
 459         rte_eth_linkstatus_set(eth_dev, &link);
 460 }
 461
 462 /*
 463  * Stop device.
 464  */
 465 static void enicpmd_dev_close(struct rte_eth_dev *eth_dev)
 466 {
 467         struct enic *enic = pmd_priv(eth_dev);
 468
 469         ENICPMD_FUNC_TRACE();
 470         enic_remove(enic);
 471 }
 472
 473 static int enicpmd_dev_link_update(struct rte_eth_dev *eth_dev,
 474         __rte_unused int wait_to_complete)
 475 {
 476         ENICPMD_FUNC_TRACE();
 477         return enic_link_update(eth_dev);
 478 }
 479
 480 static int enicpmd_dev_stats_get(struct rte_eth_dev *eth_dev,
 481         struct rte_eth_stats *stats)
 482 {
 483         struct enic *enic = pmd_priv(eth_dev);
 484
 485         ENICPMD_FUNC_TRACE();
 486         return enic_dev_stats_get(enic, stats);
 487 }
 488
 489 static int enicpmd_dev_stats_reset(struct rte_eth_dev *eth_dev)
 490 {
 491         struct enic *enic = pmd_priv(eth_dev);
 492
 493         ENICPMD_FUNC_TRACE();
 494         return enic_dev_stats_clear(enic);
 495 }
 496
 497 static uint32_t speed_capa_from_pci_id(struct rte_eth_dev *eth_dev)
 498 {
 499         const struct vic_speed_capa *m;
 500         struct rte_pci_device *pdev;
 501         uint16_t id;
 502
 503         pdev = RTE_ETH_DEV_TO_PCI(eth_dev);
 504         id = pdev->id.subsystem_device_id;
 505         for (m = vic_speed_capa_map; m->sub_devid != 0; m++) {
 506                 if (m->sub_devid == id)
 507                         return m->capa;
 508         }
 509         /* 1300 and later models are at least 40G */
 510         if (id >= 0x0100)
 511                 return ETH_LINK_SPEED_40G;
 512         /* VFs have subsystem id 0, check device id */
 513         if (id == 0) {
 514                 /* Newer VF implies at least 40G model */
 515                 if (pdev->id.device_id == PCI_DEVICE_ID_CISCO_VIC_ENET_SN)
 516                         return ETH_LINK_SPEED_40G;
 517         }
 518         return ETH_LINK_SPEED_10G;
 519 }
 520
 521 static int enicpmd_dev_info_get(struct rte_eth_dev *eth_dev,
 522         struct rte_eth_dev_info *device_info)
 523 {
 524         struct enic *enic = pmd_priv(eth_dev);
 525
 526         ENICPMD_FUNC_TRACE();
 527         /* Scattered Rx uses two receive queues per rx queue exposed to dpdk */
 528         device_info->max_rx_queues = enic->conf_rq_count / 2;
 529         device_info->max_tx_queues = enic->conf_wq_count;
 530         device_info->min_rx_bufsize = ENIC_MIN_MTU;
 531         /* "Max" mtu is not a typo. HW receives packet sizes up to the
 532          * max mtu regardless of the current mtu (vNIC's mtu). vNIC mtu is
 533          * a hint to the driver to size receive buffers accordingly so that
 534          * larger-than-vnic-mtu packets get truncated.. For DPDK, we let
 535          * the user decide the buffer size via rxmode.max_rx_pkt_len, basically
 536          * ignoring vNIC mtu.
 537          */
 538         device_info->max_rx_pktlen = enic_mtu_to_max_rx_pktlen(enic->max_mtu);
 539         device_info->max_mac_addrs = ENIC_UNICAST_PERFECT_FILTERS;
 540         device_info->min_mtu = ENIC_MIN_MTU;
 541         device_info->max_mtu = enic->max_mtu;
 542         device_info->rx_offload_capa = enic->rx_offload_capa;
 543         device_info->tx_offload_capa = enic->tx_offload_capa;
 544         device_info->tx_queue_offload_capa = enic->tx_queue_offload_capa;
 545         device_info->default_rxconf = (struct rte_eth_rxconf) {
 546                 .rx_free_thresh = ENIC_DEFAULT_RX_FREE_THRESH
 547         };
 548         device_info->reta_size = enic->reta_size;
 549         device_info->hash_key_size = enic->hash_key_size;
 550         device_info->flow_type_rss_offloads = enic->flow_type_rss_offloads;
 551         device_info->rx_desc_lim = (struct rte_eth_desc_lim) {
 552                 .nb_max = enic->config.rq_desc_count,
 553                 .nb_min = ENIC_MIN_RQ_DESCS,
 554                 .nb_align = ENIC_ALIGN_DESCS,
 555         };
 556         device_info->tx_desc_lim = (struct rte_eth_desc_lim) {
 557                 .nb_max = enic->config.wq_desc_count,
 558                 .nb_min = ENIC_MIN_WQ_DESCS,
 559                 .nb_align = ENIC_ALIGN_DESCS,
 560                 .nb_seg_max = ENIC_TX_XMIT_MAX,
 561                 .nb_mtu_seg_max = ENIC_NON_TSO_MAX_DESC,
 562         };
 563         device_info->default_rxportconf = (struct rte_eth_dev_portconf) {
 564                 .burst_size = ENIC_DEFAULT_RX_BURST,
 565                 .ring_size = RTE_MIN(device_info->rx_desc_lim.nb_max,
 566                         ENIC_DEFAULT_RX_RING_SIZE),
 567                 .nb_queues = ENIC_DEFAULT_RX_RINGS,
 568         };
 569         device_info->default_txportconf = (struct rte_eth_dev_portconf) {
 570                 .burst_size = ENIC_DEFAULT_TX_BURST,
 571                 .ring_size = RTE_MIN(device_info->tx_desc_lim.nb_max,
 572                         ENIC_DEFAULT_TX_RING_SIZE),
 573                 .nb_queues = ENIC_DEFAULT_TX_RINGS,
 574         };
 575         device_info->speed_capa = speed_capa_from_pci_id(eth_dev);
 576
 577         return 0;
 578 }
 579
 580 static const uint32_t *enicpmd_dev_supported_ptypes_get(struct rte_eth_dev *dev)
 581 {
 582         static const uint32_t ptypes[] = {
 583                 RTE_PTYPE_L2_ETHER,
 584                 RTE_PTYPE_L2_ETHER_VLAN,
 585                 RTE_PTYPE_L3_IPV4_EXT_UNKNOWN,
 586                 RTE_PTYPE_L3_IPV6_EXT_UNKNOWN,
 587                 RTE_PTYPE_L4_TCP,
 588                 RTE_PTYPE_L4_UDP,
 589                 RTE_PTYPE_L4_FRAG,
 590                 RTE_PTYPE_L4_NONFRAG,
 591                 RTE_PTYPE_UNKNOWN
 592         };
 593         static const uint32_t ptypes_overlay[] = {
 594                 RTE_PTYPE_L2_ETHER,
 595                 RTE_PTYPE_L2_ETHER_VLAN,
 596                 RTE_PTYPE_L3_IPV4_EXT_UNKNOWN,
 597                 RTE_PTYPE_L3_IPV6_EXT_UNKNOWN,
 598                 RTE_PTYPE_L4_TCP,
 599                 RTE_PTYPE_L4_UDP,
 600                 RTE_PTYPE_L4_FRAG,
 601                 RTE_PTYPE_L4_NONFRAG,
 602                 RTE_PTYPE_TUNNEL_GRENAT,
 603                 RTE_PTYPE_INNER_L2_ETHER,
 604                 RTE_PTYPE_INNER_L3_IPV4_EXT_UNKNOWN,
 605                 RTE_PTYPE_INNER_L3_IPV6_EXT_UNKNOWN,
 606                 RTE_PTYPE_INNER_L4_TCP,
 607                 RTE_PTYPE_INNER_L4_UDP,
 608                 RTE_PTYPE_INNER_L4_FRAG,
 609                 RTE_PTYPE_INNER_L4_NONFRAG,
 610                 RTE_PTYPE_UNKNOWN
 611         };
 612
 613         if (dev->rx_pkt_burst != enic_dummy_recv_pkts &&
 614             dev->rx_pkt_burst != NULL) {
 615                 struct enic *enic = pmd_priv(dev);
 616                 if (enic->overlay_offload)
 617                         return ptypes_overlay;
 618                 else
 619                         return ptypes;
 620         }
 621         return NULL;
 622 }
 623
 624 static int enicpmd_dev_promiscuous_enable(struct rte_eth_dev *eth_dev)
 625 {
 626         struct enic *enic = pmd_priv(eth_dev);
 627         int ret;
 628
 629         if (rte_eal_process_type() != RTE_PROC_PRIMARY)
 630                 return -E_RTE_SECONDARY;
 631
 632         ENICPMD_FUNC_TRACE();
 633
 634         enic->promisc = 1;
 635         ret = enic_add_packet_filter(enic);
 636         if (ret != 0)
 637                 enic->promisc = 0;
 638
 639         return ret;
 640 }
 641
 642 static int enicpmd_dev_promiscuous_disable(struct rte_eth_dev *eth_dev)
 643 {
 644         struct enic *enic = pmd_priv(eth_dev);
 645         int ret;
 646
 647         if (rte_eal_process_type() != RTE_PROC_PRIMARY)
 648                 return -E_RTE_SECONDARY;
 649
 650         ENICPMD_FUNC_TRACE();
 651         enic->promisc = 0;
 652         ret = enic_add_packet_filter(enic);
 653         if (ret != 0)
 654                 enic->promisc = 1;
 655
 656         return ret;
 657 }
 658
 659 static int enicpmd_dev_allmulticast_enable(struct rte_eth_dev *eth_dev)
 660 {
 661         struct enic *enic = pmd_priv(eth_dev);
 662         int ret;
 663
 664         if (rte_eal_process_type() != RTE_PROC_PRIMARY)
 665                 return -E_RTE_SECONDARY;
 666
 667         ENICPMD_FUNC_TRACE();
 668         enic->allmulti = 1;
 669         ret = enic_add_packet_filter(enic);
 670         if (ret != 0)
 671                 enic->allmulti = 0;
 672
 673         return ret;
 674 }
 675
 676 static int enicpmd_dev_allmulticast_disable(struct rte_eth_dev *eth_dev)
 677 {
 678         struct enic *enic = pmd_priv(eth_dev);
 679         int ret;
 680
 681         if (rte_eal_process_type() != RTE_PROC_PRIMARY)
 682                 return -E_RTE_SECONDARY;
 683
 684         ENICPMD_FUNC_TRACE();
 685         enic->allmulti = 0;
 686         ret = enic_add_packet_filter(enic);
 687         if (ret != 0)
 688                 enic->allmulti = 1;
 689
 690         return ret;
 691 }
 692
 693 static int enicpmd_add_mac_addr(struct rte_eth_dev *eth_dev,
 694         struct rte_ether_addr *mac_addr,
 695         __rte_unused uint32_t index, __rte_unused uint32_t pool)
 696 {
 697         struct enic *enic = pmd_priv(eth_dev);
 698
 699         if (rte_eal_process_type() != RTE_PROC_PRIMARY)
 700                 return -E_RTE_SECONDARY;
 701
 702         ENICPMD_FUNC_TRACE();
 703         return enic_set_mac_address(enic, mac_addr->addr_bytes);
 704 }
 705
 706 static void enicpmd_remove_mac_addr(struct rte_eth_dev *eth_dev, uint32_t index)
 707 {
 708         struct enic *enic = pmd_priv(eth_dev);
 709
 710         if (rte_eal_process_type() != RTE_PROC_PRIMARY)
 711                 return;
 712
 713         ENICPMD_FUNC_TRACE();
 714         if (enic_del_mac_address(enic, index))
 715                 dev_err(enic, "del mac addr failed\n");
 716 }
 717
 718 static int enicpmd_set_mac_addr(struct rte_eth_dev *eth_dev,
 719                                 struct rte_ether_addr *addr)
 720 {
 721         struct enic *enic = pmd_priv(eth_dev);
 722         int ret;
 723
 724         if (rte_eal_process_type() != RTE_PROC_PRIMARY)
 725                 return -E_RTE_SECONDARY;
 726
 727         ENICPMD_FUNC_TRACE();
 728         ret = enic_del_mac_address(enic, 0);
 729         if (ret)
 730                 return ret;
 731         return enic_set_mac_address(enic, addr->addr_bytes);
 732 }
 733
 734 static void debug_log_add_del_addr(struct rte_ether_addr *addr, bool add)
 735 {
 736         char mac_str[RTE_ETHER_ADDR_FMT_SIZE];
 737
 738         rte_ether_format_addr(mac_str, RTE_ETHER_ADDR_FMT_SIZE, addr);
 739         ENICPMD_LOG(DEBUG, " %s address %s\n",
 740                      add ? "add" : "remove", mac_str);
 741 }
 742
 743 static int enicpmd_set_mc_addr_list(struct rte_eth_dev *eth_dev,
 744                                     struct rte_ether_addr *mc_addr_set,
 745                                     uint32_t nb_mc_addr)
 746 {
 747         struct enic *enic = pmd_priv(eth_dev);
 748         char mac_str[RTE_ETHER_ADDR_FMT_SIZE];
 749         struct rte_ether_addr *addr;
 750         uint32_t i, j;
 751         int ret;
 752
 753         ENICPMD_FUNC_TRACE();
 754
 755         /* Validate the given addresses first */
 756         for (i = 0; i < nb_mc_addr && mc_addr_set != NULL; i++) {
 757                 addr = &mc_addr_set[i];
 758                 if (!rte_is_multicast_ether_addr(addr) ||
 759                     rte_is_broadcast_ether_addr(addr)) {
 760                         rte_ether_format_addr(mac_str,
 761                                         RTE_ETHER_ADDR_FMT_SIZE, addr);
 762                         ENICPMD_LOG(ERR, " invalid multicast address %s\n",
 763                                      mac_str);
 764                         return -EINVAL;
 765                 }
 766         }
 767
 768         /* Flush all if requested */
 769         if (nb_mc_addr == 0 || mc_addr_set == NULL) {
 770                 ENICPMD_LOG(DEBUG, " flush multicast addresses\n");
 771                 for (i = 0; i < enic->mc_count; i++) {
 772                         addr = &enic->mc_addrs[i];
 773                         debug_log_add_del_addr(addr, false);
 774                         ret = vnic_dev_del_addr(enic->vdev, addr->addr_bytes);
 775                         if (ret)
 776                                 return ret;
 777                 }
 778                 enic->mc_count = 0;
 779                 return 0;
 780         }
 781
 782         if (nb_mc_addr > ENIC_MULTICAST_PERFECT_FILTERS) {
 783                 ENICPMD_LOG(ERR, " too many multicast addresses: max=%d\n",
 784                              ENIC_MULTICAST_PERFECT_FILTERS);
 785                 return -ENOSPC;
 786         }
 787         /*
 788          * devcmd is slow, so apply the difference instead of flushing and
 789          * adding everything.
 790          * 1. Delete addresses on the NIC but not on the host
 791          */
 792         for (i = 0; i < enic->mc_count; i++) {
 793                 addr = &enic->mc_addrs[i];
 794                 for (j = 0; j < nb_mc_addr; j++) {
 795                         if (rte_is_same_ether_addr(addr, &mc_addr_set[j]))
 796                                 break;
 797                 }
 798                 if (j < nb_mc_addr)
 799                         continue;
 800                 debug_log_add_del_addr(addr, false);
 801                 ret = vnic_dev_del_addr(enic->vdev, addr->addr_bytes);
 802                 if (ret)
 803                         return ret;
 804         }
 805         /* 2. Add addresses on the host but not on the NIC */
 806         for (i = 0; i < nb_mc_addr; i++) {
 807                 addr = &mc_addr_set[i];
 808                 for (j = 0; j < enic->mc_count; j++) {
 809                         if (rte_is_same_ether_addr(addr, &enic->mc_addrs[j]))
 810                                 break;
 811                 }
 812                 if (j < enic->mc_count)
 813                         continue;
 814                 debug_log_add_del_addr(addr, true);
 815                 ret = vnic_dev_add_addr(enic->vdev, addr->addr_bytes);
 816                 if (ret)
 817                         return ret;
 818         }
 819         /* Keep a copy so we can flush/apply later on.. */
 820         memcpy(enic->mc_addrs, mc_addr_set,
 821                nb_mc_addr * sizeof(struct rte_ether_addr));
 822         enic->mc_count = nb_mc_addr;
 823         return 0;
 824 }
 825
 826 static int enicpmd_mtu_set(struct rte_eth_dev *eth_dev, uint16_t mtu)
 827 {
 828         struct enic *enic = pmd_priv(eth_dev);
 829
 830         ENICPMD_FUNC_TRACE();
 831         return enic_set_mtu(enic, mtu);
 832 }
 833
 834 static int enicpmd_dev_rss_reta_query(struct rte_eth_dev *dev,
 835                                       struct rte_eth_rss_reta_entry64
 836                                       *reta_conf,
 837                                       uint16_t reta_size)
 838 {
 839         struct enic *enic = pmd_priv(dev);
 840         uint16_t i, idx, shift;
 841
 842         ENICPMD_FUNC_TRACE();
 843         if (reta_size != ENIC_RSS_RETA_SIZE) {
 844                 dev_err(enic, "reta_query: wrong reta_size. given=%u expected=%u\n",
 845                         reta_size, ENIC_RSS_RETA_SIZE);
 846                 return -EINVAL;
 847         }
 848
 849         for (i = 0; i < reta_size; i++) {
 850                 idx = i / RTE_RETA_GROUP_SIZE;
 851                 shift = i % RTE_RETA_GROUP_SIZE;
 852                 if (reta_conf[idx].mask & (1ULL << shift))
 853                         reta_conf[idx].reta[shift] = enic_sop_rq_idx_to_rte_idx(
 854                                 enic->rss_cpu.cpu[i / 4].b[i % 4]);
 855         }
 856
 857         return 0;
 858 }
 859
 860 static int enicpmd_dev_rss_reta_update(struct rte_eth_dev *dev,
 861                                        struct rte_eth_rss_reta_entry64
 862                                        *reta_conf,
 863                                        uint16_t reta_size)
 864 {
 865         struct enic *enic = pmd_priv(dev);
 866         union vnic_rss_cpu rss_cpu;
 867         uint16_t i, idx, shift;
 868
 869         ENICPMD_FUNC_TRACE();
 870         if (reta_size != ENIC_RSS_RETA_SIZE) {
 871                 dev_err(enic, "reta_update: wrong reta_size. given=%u"
 872                         " expected=%u\n",
 873                         reta_size, ENIC_RSS_RETA_SIZE);
 874                 return -EINVAL;
 875         }
 876         /*
 877          * Start with the current reta and modify it per reta_conf, as we
 878          * need to push the entire reta even if we only modify one entry.
 879          */
 880         rss_cpu = enic->rss_cpu;
 881         for (i = 0; i < reta_size; i++) {
 882                 idx = i / RTE_RETA_GROUP_SIZE;
 883                 shift = i % RTE_RETA_GROUP_SIZE;
 884                 if (reta_conf[idx].mask & (1ULL << shift))
 885                         rss_cpu.cpu[i / 4].b[i % 4] =
 886                                 enic_rte_rq_idx_to_sop_idx(
 887                                         reta_conf[idx].reta[shift]);
 888         }
 889         return enic_set_rss_reta(enic, &rss_cpu);
 890 }
 891
 892 static int enicpmd_dev_rss_hash_update(struct rte_eth_dev *dev,
 893                                        struct rte_eth_rss_conf *rss_conf)
 894 {
 895         struct enic *enic = pmd_priv(dev);
 896
 897         ENICPMD_FUNC_TRACE();
 898         return enic_set_rss_conf(enic, rss_conf);
 899 }
 900
 901 static int enicpmd_dev_rss_hash_conf_get(struct rte_eth_dev *dev,
 902                                          struct rte_eth_rss_conf *rss_conf)
 903 {
 904         struct enic *enic = pmd_priv(dev);
 905
 906         ENICPMD_FUNC_TRACE();
 907         if (rss_conf == NULL)
 908                 return -EINVAL;
 909         if (rss_conf->rss_key != NULL &&
 910             rss_conf->rss_key_len < ENIC_RSS_HASH_KEY_SIZE) {
 911                 dev_err(enic, "rss_hash_conf_get: wrong rss_key_len. given=%u"
 912                         " expected=%u+\n",
 913                         rss_conf->rss_key_len, ENIC_RSS_HASH_KEY_SIZE);
 914                 return -EINVAL;
 915         }
 916         rss_conf->rss_hf = enic->rss_hf;
 917         if (rss_conf->rss_key != NULL) {
 918                 int i;
 919                 for (i = 0; i < ENIC_RSS_HASH_KEY_SIZE; i++) {
 920                         rss_conf->rss_key[i] =
 921                                 enic->rss_key.key[i / 10].b[i % 10];
 922                 }
 923                 rss_conf->rss_key_len = ENIC_RSS_HASH_KEY_SIZE;
 924         }
 925         return 0;
 926 }
 927
 928 static void enicpmd_dev_rxq_info_get(struct rte_eth_dev *dev,
 929                                      uint16_t rx_queue_id,
 930                                      struct rte_eth_rxq_info *qinfo)
 931 {
 932         struct enic *enic = pmd_priv(dev);
 933         struct vnic_rq *rq_sop;
 934         struct vnic_rq *rq_data;
 935         struct rte_eth_rxconf *conf;
 936         uint16_t sop_queue_idx;
 937         uint16_t data_queue_idx;
 938
 939         ENICPMD_FUNC_TRACE();
 940         sop_queue_idx = enic_rte_rq_idx_to_sop_idx(rx_queue_id);
 941         data_queue_idx = enic_rte_rq_idx_to_data_idx(rx_queue_id);
 942         rq_sop = &enic->rq[sop_queue_idx];
 943         rq_data = &enic->rq[data_queue_idx]; /* valid if data_queue_enable */
 944         qinfo->mp = rq_sop->mp;
 945         qinfo->scattered_rx = rq_sop->data_queue_enable;
 946         qinfo->nb_desc = rq_sop->ring.desc_count;
 947         if (qinfo->scattered_rx)
 948                 qinfo->nb_desc += rq_data->ring.desc_count;
 949         conf = &qinfo->conf;
 950         memset(conf, 0, sizeof(*conf));
 951         conf->rx_free_thresh = rq_sop->rx_free_thresh;
 952         conf->rx_drop_en = 1;
 953         /*
 954          * Except VLAN stripping (port setting), all the checksum offloads
 955          * are always enabled.
 956          */
 957         conf->offloads = enic->rx_offload_capa;
 958         if (!enic->ig_vlan_strip_en)
 959                 conf->offloads &= ~DEV_RX_OFFLOAD_VLAN_STRIP;
 960         /* rx_thresh and other fields are not applicable for enic */
 961 }
 962
 963 static void enicpmd_dev_txq_info_get(struct rte_eth_dev *dev,
 964                                      uint16_t tx_queue_id,
 965                                      struct rte_eth_txq_info *qinfo)
 966 {
 967         struct enic *enic = pmd_priv(dev);
 968         struct vnic_wq *wq = &enic->wq[tx_queue_id];
 969
 970         ENICPMD_FUNC_TRACE();
 971         qinfo->nb_desc = wq->ring.desc_count;
 972         memset(&qinfo->conf, 0, sizeof(qinfo->conf));
 973         qinfo->conf.offloads = wq->offloads;
 974         /* tx_thresh, and all the other fields are not applicable for enic */
 975 }
 976
 977 static int enicpmd_dev_rx_queue_intr_enable(struct rte_eth_dev *eth_dev,
 978                                             uint16_t rx_queue_id)
 979 {
 980         struct enic *enic = pmd_priv(eth_dev);
 981
 982         ENICPMD_FUNC_TRACE();
 983         vnic_intr_unmask(&enic->intr[rx_queue_id + ENICPMD_RXQ_INTR_OFFSET]);
 984         return 0;
 985 }
 986
 987 static int enicpmd_dev_rx_queue_intr_disable(struct rte_eth_dev *eth_dev,
 988                                              uint16_t rx_queue_id)
 989 {
 990         struct enic *enic = pmd_priv(eth_dev);
 991
 992         ENICPMD_FUNC_TRACE();
 993         vnic_intr_mask(&enic->intr[rx_queue_id + ENICPMD_RXQ_INTR_OFFSET]);
 994         return 0;
 995 }
 996
 997 static int udp_tunnel_common_check(struct enic *enic,
 998                                    struct rte_eth_udp_tunnel *tnl)
 999 {
1000         if (tnl->prot_type != RTE_TUNNEL_TYPE_VXLAN)
1001                 return -ENOTSUP;
1002         if (!enic->overlay_offload) {
1003                 ENICPMD_LOG(DEBUG, " vxlan (overlay offload) is not "
1004                              "supported\n");
1005                 return -ENOTSUP;
1006         }
1007         return 0;
1008 }
1009
1010 static int update_vxlan_port(struct enic *enic, uint16_t port)
1011 {
1012         if (vnic_dev_overlay_offload_cfg(enic->vdev,
1013                                          OVERLAY_CFG_VXLAN_PORT_UPDATE,
1014                                          port)) {
1015                 ENICPMD_LOG(DEBUG, " failed to update vxlan port\n");
1016                 return -EINVAL;
1017         }
1018         ENICPMD_LOG(DEBUG, " updated vxlan port to %u\n", port);
1019         enic->vxlan_port = port;
1020         return 0;
1021 }
1022
1023 static int enicpmd_dev_udp_tunnel_port_add(struct rte_eth_dev *eth_dev,
1024                                            struct rte_eth_udp_tunnel *tnl)
1025 {
1026         struct enic *enic = pmd_priv(eth_dev);
1027         int ret;
1028
1029         ENICPMD_FUNC_TRACE();
1030         ret = udp_tunnel_common_check(enic, tnl);
1031         if (ret)
1032                 return ret;
1033         /*
1034          * The NIC has 1 configurable VXLAN port number. "Adding" a new port
1035          * number replaces it.
1036          */
1037         if (tnl->udp_port == enic->vxlan_port || tnl->udp_port == 0) {
1038                 ENICPMD_LOG(DEBUG, " %u is already configured or invalid\n",
1039                              tnl->udp_port);
1040                 return -EINVAL;
1041         }
1042         return update_vxlan_port(enic, tnl->udp_port);
1043 }
1044
1045 static int enicpmd_dev_udp_tunnel_port_del(struct rte_eth_dev *eth_dev,
1046                                            struct rte_eth_udp_tunnel *tnl)
1047 {
1048         struct enic *enic = pmd_priv(eth_dev);
1049         int ret;
1050
1051         ENICPMD_FUNC_TRACE();
1052         ret = udp_tunnel_common_check(enic, tnl);
1053         if (ret)
1054                 return ret;
1055         /*
1056          * Clear the previously set port number and restore the
1057          * hardware default port number. Some drivers disable VXLAN
1058          * offloads when there are no configured port numbers. But
1059          * enic does not do that as VXLAN is part of overlay offload,
1060          * which is tied to inner RSS and TSO.
1061          */
1062         if (tnl->udp_port != enic->vxlan_port) {
1063                 ENICPMD_LOG(DEBUG, " %u is not a configured vxlan port\n",
1064                              tnl->udp_port);
1065                 return -EINVAL;
1066         }
1067         return update_vxlan_port(enic, RTE_VXLAN_DEFAULT_PORT);
1068 }
1069
1070 static int enicpmd_dev_fw_version_get(struct rte_eth_dev *eth_dev,
1071                                       char *fw_version, size_t fw_size)
1072 {
1073         struct vnic_devcmd_fw_info *info;
1074         struct enic *enic;
1075         int ret;
1076
1077         ENICPMD_FUNC_TRACE();
1078         if (fw_version == NULL || fw_size <= 0)
1079                 return -EINVAL;
1080         enic = pmd_priv(eth_dev);
1081         ret = vnic_dev_fw_info(enic->vdev, &info);
1082         if (ret)
1083                 return ret;
1084         snprintf(fw_version, fw_size, "%s %s",
1085                  info->fw_version, info->fw_build);
1086         fw_version[fw_size - 1] = '\0';
1087         return 0;
1088 }
1089
1090 static const struct eth_dev_ops enicpmd_eth_dev_ops = {
1091         .dev_configure        = enicpmd_dev_configure,
1092         .dev_start            = enicpmd_dev_start,
1093         .dev_stop             = enicpmd_dev_stop,
1094         .dev_set_link_up      = NULL,
1095         .dev_set_link_down    = NULL,
1096         .dev_close            = enicpmd_dev_close,
1097         .promiscuous_enable   = enicpmd_dev_promiscuous_enable,
1098         .promiscuous_disable  = enicpmd_dev_promiscuous_disable,
1099         .allmulticast_enable  = enicpmd_dev_allmulticast_enable,
1100         .allmulticast_disable = enicpmd_dev_allmulticast_disable,
1101         .link_update          = enicpmd_dev_link_update,
1102         .stats_get            = enicpmd_dev_stats_get,
1103         .stats_reset          = enicpmd_dev_stats_reset,
1104         .queue_stats_mapping_set = NULL,
1105         .dev_infos_get        = enicpmd_dev_info_get,
1106         .dev_supported_ptypes_get = enicpmd_dev_supported_ptypes_get,
1107         .mtu_set              = enicpmd_mtu_set,
1108         .vlan_filter_set      = NULL,
1109         .vlan_tpid_set        = NULL,
1110         .vlan_offload_set     = enicpmd_vlan_offload_set,
1111         .vlan_strip_queue_set = NULL,
1112         .rx_queue_start       = enicpmd_dev_rx_queue_start,
1113         .rx_queue_stop        = enicpmd_dev_rx_queue_stop,
1114         .tx_queue_start       = enicpmd_dev_tx_queue_start,
1115         .tx_queue_stop        = enicpmd_dev_tx_queue_stop,
1116         .rx_queue_setup       = enicpmd_dev_rx_queue_setup,
1117         .rx_queue_release     = enicpmd_dev_rx_queue_release,
1118         .rx_queue_count       = enicpmd_dev_rx_queue_count,
1119         .rx_descriptor_done   = NULL,
1120         .tx_queue_setup       = enicpmd_dev_tx_queue_setup,
1121         .tx_queue_release     = enicpmd_dev_tx_queue_release,
1122         .rx_queue_intr_enable = enicpmd_dev_rx_queue_intr_enable,
1123         .rx_queue_intr_disable = enicpmd_dev_rx_queue_intr_disable,
1124         .rxq_info_get         = enicpmd_dev_rxq_info_get,
1125         .txq_info_get         = enicpmd_dev_txq_info_get,
1126         .dev_led_on           = NULL,
1127         .dev_led_off          = NULL,
1128         .flow_ctrl_get        = NULL,
1129         .flow_ctrl_set        = NULL,
1130         .priority_flow_ctrl_set = NULL,
1131         .mac_addr_add         = enicpmd_add_mac_addr,
1132         .mac_addr_remove      = enicpmd_remove_mac_addr,
1133         .mac_addr_set         = enicpmd_set_mac_addr,
1134         .set_mc_addr_list     = enicpmd_set_mc_addr_list,
1135         .filter_ctrl          = enicpmd_dev_filter_ctrl,
1136         .reta_query           = enicpmd_dev_rss_reta_query,
1137         .reta_update          = enicpmd_dev_rss_reta_update,
1138         .rss_hash_conf_get    = enicpmd_dev_rss_hash_conf_get,
1139         .rss_hash_update      = enicpmd_dev_rss_hash_update,
1140         .udp_tunnel_port_add  = enicpmd_dev_udp_tunnel_port_add,
1141         .udp_tunnel_port_del  = enicpmd_dev_udp_tunnel_port_del,
1142         .fw_version_get       = enicpmd_dev_fw_version_get,
1143 };
1144
1145 static int enic_parse_zero_one(const char *key,
1146                                const char *value,
1147                                void *opaque)
1148 {
1149         struct enic *enic;
1150         bool b;
1151
1152         enic = (struct enic *)opaque;
1153         if (strcmp(value, "0") == 0) {
1154                 b = false;
1155         } else if (strcmp(value, "1") == 0) {
1156                 b = true;
1157         } else {
1158                 dev_err(enic, "Invalid value for %s"
1159                         ": expected=0|1 given=%s\n", key, value);
1160                 return -EINVAL;
1161         }
1162         if (strcmp(key, ENIC_DEVARG_DISABLE_OVERLAY) == 0)
1163                 enic->disable_overlay = b;
1164         if (strcmp(key, ENIC_DEVARG_ENABLE_AVX2_RX) == 0)
1165                 enic->enable_avx2_rx = b;
1166         if (strcmp(key, ENIC_DEVARG_GENEVE_OPT) == 0)
1167                 enic->geneve_opt_request = b;
1168         return 0;
1169 }
1170
1171 static int enic_parse_ig_vlan_rewrite(__rte_unused const char *key,
1172                                       const char *value,
1173                                       void *opaque)
1174 {
1175         struct enic *enic;
1176
1177         enic = (struct enic *)opaque;
1178         if (strcmp(value, "trunk") == 0) {
1179                 /* Trunk mode: always tag */
1180                 enic->ig_vlan_rewrite_mode = IG_VLAN_REWRITE_MODE_DEFAULT_TRUNK;
1181         } else if (strcmp(value, "untag") == 0) {
1182                 /* Untag default VLAN mode: untag if VLAN = default VLAN */
1183                 enic->ig_vlan_rewrite_mode =
1184                         IG_VLAN_REWRITE_MODE_UNTAG_DEFAULT_VLAN;
1185         } else if (strcmp(value, "priority") == 0) {
1186                 /*
1187                  * Priority-tag default VLAN mode: priority tag (VLAN header
1188                  * with ID=0) if VLAN = default
1189                  */
1190                 enic->ig_vlan_rewrite_mode =
1191                         IG_VLAN_REWRITE_MODE_PRIORITY_TAG_DEFAULT_VLAN;
1192         } else if (strcmp(value, "pass") == 0) {
1193                 /* Pass through mode: do not touch tags */
1194                 enic->ig_vlan_rewrite_mode = IG_VLAN_REWRITE_MODE_PASS_THRU;
1195         } else {
1196                 dev_err(enic, "Invalid value for " ENIC_DEVARG_IG_VLAN_REWRITE
1197                         ": expected=trunk|untag|priority|pass given=%s\n",
1198                         value);
1199                 return -EINVAL;
1200         }
1201         return 0;
1202 }
1203
1204 static int enic_check_devargs(struct rte_eth_dev *dev)
1205 {
1206         static const char *const valid_keys[] = {
1207                 ENIC_DEVARG_DISABLE_OVERLAY,
1208                 ENIC_DEVARG_ENABLE_AVX2_RX,
1209                 ENIC_DEVARG_GENEVE_OPT,
1210                 ENIC_DEVARG_IG_VLAN_REWRITE,
1211                 NULL};
1212         struct enic *enic = pmd_priv(dev);
1213         struct rte_kvargs *kvlist;
1214
1215         ENICPMD_FUNC_TRACE();
1216
1217         enic->disable_overlay = false;
1218         enic->enable_avx2_rx = false;
1219         enic->geneve_opt_request = false;
1220         enic->ig_vlan_rewrite_mode = IG_VLAN_REWRITE_MODE_PASS_THRU;
1221         if (!dev->device->devargs)
1222                 return 0;
1223         kvlist = rte_kvargs_parse(dev->device->devargs->args, valid_keys);
1224         if (!kvlist)
1225                 return -EINVAL;
1226         if (rte_kvargs_process(kvlist, ENIC_DEVARG_DISABLE_OVERLAY,
1227                                enic_parse_zero_one, enic) < 0 ||
1228             rte_kvargs_process(kvlist, ENIC_DEVARG_ENABLE_AVX2_RX,
1229                                enic_parse_zero_one, enic) < 0 ||
1230             rte_kvargs_process(kvlist, ENIC_DEVARG_GENEVE_OPT,
1231                                enic_parse_zero_one, enic) < 0 ||
1232             rte_kvargs_process(kvlist, ENIC_DEVARG_IG_VLAN_REWRITE,
1233                                enic_parse_ig_vlan_rewrite, enic) < 0) {
1234                 rte_kvargs_free(kvlist);
1235                 return -EINVAL;
1236         }
1237         rte_kvargs_free(kvlist);
1238         return 0;
1239 }
1240
1241 /* Initialize the driver
1242  * It returns 0 on success.
1243  */
1244 static int eth_enicpmd_dev_init(struct rte_eth_dev *eth_dev)
1245 {
1246         struct rte_pci_device *pdev;
1247         struct rte_pci_addr *addr;
1248         struct enic *enic = pmd_priv(eth_dev);
1249         int err;
1250
1251         ENICPMD_FUNC_TRACE();
1252
1253         eth_dev->dev_ops = &enicpmd_eth_dev_ops;
1254         eth_dev->rx_pkt_burst = &enic_recv_pkts;
1255         eth_dev->tx_pkt_burst = &enic_xmit_pkts;
1256         eth_dev->tx_pkt_prepare = &enic_prep_pkts;
1257         if (rte_eal_process_type() != RTE_PROC_PRIMARY) {
1258                 enic_pick_tx_handler(eth_dev);
1259                 enic_pick_rx_handler(eth_dev);
1260                 return 0;
1261         }
1262         /* Only the primary sets up adapter and other data in shared memory */
1263         enic->port_id = eth_dev->data->port_id;
1264         enic->rte_dev = eth_dev;
1265         enic->dev_data = eth_dev->data;
1266         /* Let rte_eth_dev_close() release the port resources */
1267         eth_dev->data->dev_flags |= RTE_ETH_DEV_CLOSE_REMOVE;
1268
1269         pdev = RTE_ETH_DEV_TO_PCI(eth_dev);
1270         rte_eth_copy_pci_info(eth_dev, pdev);
1271         enic->pdev = pdev;
1272         addr = &pdev->addr;
1273
1274         snprintf(enic->bdf_name, ENICPMD_BDF_LENGTH, "%04x:%02x:%02x.%x",
1275                 addr->domain, addr->bus, addr->devid, addr->function);
1276
1277         err = enic_check_devargs(eth_dev);
1278         if (err)
1279                 return err;
1280         return enic_probe(enic);
1281 }
1282
1283 static int eth_enic_pci_probe(struct rte_pci_driver *pci_drv __rte_unused,
1284         struct rte_pci_device *pci_dev)
1285 {
1286         return rte_eth_dev_pci_generic_probe(pci_dev, sizeof(struct enic),
1287                 eth_enicpmd_dev_init);
1288 }
1289
1290 static int eth_enic_pci_remove(struct rte_pci_device *pci_dev)
1291 {
1292         return rte_eth_dev_pci_generic_remove(pci_dev, NULL);
1293 }
1294
1295 static struct rte_pci_driver rte_enic_pmd = {
1296         .id_table = pci_id_enic_map,
1297         .drv_flags = RTE_PCI_DRV_NEED_MAPPING | RTE_PCI_DRV_INTR_LSC,
1298         .probe = eth_enic_pci_probe,
1299         .remove = eth_enic_pci_remove,
1300 };
1301
1302 int dev_is_enic(struct rte_eth_dev *dev)
1303 {
1304         return dev->device->driver == &rte_enic_pmd.driver;
1305 }
1306
1307 RTE_PMD_REGISTER_PCI(net_enic, rte_enic_pmd);
1308 RTE_PMD_REGISTER_PCI_TABLE(net_enic, pci_id_enic_map);
1309 RTE_PMD_REGISTER_KMOD_DEP(net_enic, "* igb_uio | uio_pci_generic | vfio-pci");
1310 RTE_PMD_REGISTER_PARAM_STRING(net_enic,
1311         ENIC_DEVARG_DISABLE_OVERLAY "=0|1 "
1312         ENIC_DEVARG_ENABLE_AVX2_RX "=0|1 "
1313         ENIC_DEVARG_GENEVE_OPT "=0|1 "
1314         ENIC_DEVARG_IG_VLAN_REWRITE "=trunk|untag|priority|pass");