1 /* SPDX-License-Identifier: BSD-3-Clause
2 * Copyright 2008-2017 Cisco Systems, Inc. All rights reserved.
3 * Copyright 2007 Nuova Systems, Inc. All rights reserved.
11 #include <rte_bus_pci.h>
12 #include <rte_ethdev_driver.h>
13 #include <rte_ethdev_pci.h>
14 #include <rte_kvargs.h>
15 #include <rte_string_fns.h>
17 #include "vnic_intr.h"
21 #include "vnic_enet.h"
24 int enicpmd_logtype_init;
25 int enicpmd_logtype_flow;
27 #define ENICPMD_FUNC_TRACE() PMD_INIT_LOG(DEBUG, " >>")
30 * The set of PCI devices this driver supports
32 #define CISCO_PCI_VENDOR_ID 0x1137
33 static const struct rte_pci_id pci_id_enic_map[] = {
34 { RTE_PCI_DEVICE(CISCO_PCI_VENDOR_ID, PCI_DEVICE_ID_CISCO_VIC_ENET) },
35 { RTE_PCI_DEVICE(CISCO_PCI_VENDOR_ID, PCI_DEVICE_ID_CISCO_VIC_ENET_VF) },
36 {.vendor_id = 0, /* sentinel */},
39 #define ENIC_DEVARG_DISABLE_OVERLAY "disable-overlay"
40 #define ENIC_DEVARG_IG_VLAN_REWRITE "ig-vlan-rewrite"
42 RTE_INIT(enicpmd_init_log);
44 enicpmd_init_log(void)
46 enicpmd_logtype_init = rte_log_register("pmd.net.enic.init");
47 if (enicpmd_logtype_init >= 0)
48 rte_log_set_level(enicpmd_logtype_init, RTE_LOG_NOTICE);
49 enicpmd_logtype_flow = rte_log_register("pmd.net.enic.flow");
50 if (enicpmd_logtype_flow >= 0)
51 rte_log_set_level(enicpmd_logtype_flow, RTE_LOG_NOTICE);
55 enicpmd_fdir_ctrl_func(struct rte_eth_dev *eth_dev,
56 enum rte_filter_op filter_op, void *arg)
58 struct enic *enic = pmd_priv(eth_dev);
62 if (filter_op == RTE_ETH_FILTER_NOP)
65 if (arg == NULL && filter_op != RTE_ETH_FILTER_FLUSH)
69 case RTE_ETH_FILTER_ADD:
70 case RTE_ETH_FILTER_UPDATE:
71 ret = enic_fdir_add_fltr(enic,
72 (struct rte_eth_fdir_filter *)arg);
75 case RTE_ETH_FILTER_DELETE:
76 ret = enic_fdir_del_fltr(enic,
77 (struct rte_eth_fdir_filter *)arg);
80 case RTE_ETH_FILTER_STATS:
81 enic_fdir_stats_get(enic, (struct rte_eth_fdir_stats *)arg);
84 case RTE_ETH_FILTER_FLUSH:
85 dev_warning(enic, "unsupported operation %u", filter_op);
88 case RTE_ETH_FILTER_INFO:
89 enic_fdir_info_get(enic, (struct rte_eth_fdir_info *)arg);
92 dev_err(enic, "unknown operation %u", filter_op);
100 enicpmd_dev_filter_ctrl(struct rte_eth_dev *dev,
101 enum rte_filter_type filter_type,
102 enum rte_filter_op filter_op,
107 ENICPMD_FUNC_TRACE();
109 switch (filter_type) {
110 case RTE_ETH_FILTER_GENERIC:
111 if (filter_op != RTE_ETH_FILTER_GET)
113 *(const void **)arg = &enic_flow_ops;
115 case RTE_ETH_FILTER_FDIR:
116 ret = enicpmd_fdir_ctrl_func(dev, filter_op, arg);
119 dev_warning(enic, "Filter type (%d) not supported",
128 static void enicpmd_dev_tx_queue_release(void *txq)
130 ENICPMD_FUNC_TRACE();
132 if (rte_eal_process_type() != RTE_PROC_PRIMARY)
138 static int enicpmd_dev_setup_intr(struct enic *enic)
143 ENICPMD_FUNC_TRACE();
145 /* Are we done with the init of all the queues? */
146 for (index = 0; index < enic->cq_count; index++) {
147 if (!enic->cq[index].ctrl)
150 if (enic->cq_count != index)
152 for (index = 0; index < enic->wq_count; index++) {
153 if (!enic->wq[index].ctrl)
156 if (enic->wq_count != index)
158 /* check start of packet (SOP) RQs only in case scatter is disabled. */
159 for (index = 0; index < enic->rq_count; index++) {
160 if (!enic->rq[enic_rte_rq_idx_to_sop_idx(index)].ctrl)
163 if (enic->rq_count != index)
166 ret = enic_alloc_intr_resources(enic);
168 dev_err(enic, "alloc intr failed\n");
171 enic_init_vnic_resources(enic);
173 ret = enic_setup_finish(enic);
175 dev_err(enic, "setup could not be finished\n");
180 static int enicpmd_dev_tx_queue_setup(struct rte_eth_dev *eth_dev,
183 unsigned int socket_id,
184 const struct rte_eth_txconf *tx_conf)
187 struct enic *enic = pmd_priv(eth_dev);
190 if (rte_eal_process_type() != RTE_PROC_PRIMARY)
191 return -E_RTE_SECONDARY;
193 ENICPMD_FUNC_TRACE();
194 RTE_ASSERT(queue_idx < enic->conf_wq_count);
195 wq = &enic->wq[queue_idx];
196 wq->offloads = tx_conf->offloads |
197 eth_dev->data->dev_conf.txmode.offloads;
198 eth_dev->data->tx_queues[queue_idx] = (void *)wq;
200 ret = enic_alloc_wq(enic, queue_idx, socket_id, nb_desc);
202 dev_err(enic, "error in allocating wq\n");
206 return enicpmd_dev_setup_intr(enic);
209 static int enicpmd_dev_tx_queue_start(struct rte_eth_dev *eth_dev,
212 struct enic *enic = pmd_priv(eth_dev);
214 ENICPMD_FUNC_TRACE();
216 enic_start_wq(enic, queue_idx);
221 static int enicpmd_dev_tx_queue_stop(struct rte_eth_dev *eth_dev,
225 struct enic *enic = pmd_priv(eth_dev);
227 ENICPMD_FUNC_TRACE();
229 ret = enic_stop_wq(enic, queue_idx);
231 dev_err(enic, "error in stopping wq %d\n", queue_idx);
236 static int enicpmd_dev_rx_queue_start(struct rte_eth_dev *eth_dev,
239 struct enic *enic = pmd_priv(eth_dev);
241 ENICPMD_FUNC_TRACE();
243 enic_start_rq(enic, queue_idx);
248 static int enicpmd_dev_rx_queue_stop(struct rte_eth_dev *eth_dev,
252 struct enic *enic = pmd_priv(eth_dev);
254 ENICPMD_FUNC_TRACE();
256 ret = enic_stop_rq(enic, queue_idx);
258 dev_err(enic, "error in stopping rq %d\n", queue_idx);
263 static void enicpmd_dev_rx_queue_release(void *rxq)
265 ENICPMD_FUNC_TRACE();
267 if (rte_eal_process_type() != RTE_PROC_PRIMARY)
273 static uint32_t enicpmd_dev_rx_queue_count(struct rte_eth_dev *dev,
274 uint16_t rx_queue_id)
276 struct enic *enic = pmd_priv(dev);
277 uint32_t queue_count = 0;
283 rq_num = enic_rte_rq_idx_to_sop_idx(rx_queue_id);
284 cq = &enic->cq[enic_cq_rq(enic, rq_num)];
285 cq_idx = cq->to_clean;
287 cq_tail = ioread32(&cq->ctrl->cq_tail);
289 if (cq_tail < cq_idx)
290 cq_tail += cq->ring.desc_count;
292 queue_count = cq_tail - cq_idx;
297 static int enicpmd_dev_rx_queue_setup(struct rte_eth_dev *eth_dev,
300 unsigned int socket_id,
301 const struct rte_eth_rxconf *rx_conf,
302 struct rte_mempool *mp)
305 struct enic *enic = pmd_priv(eth_dev);
307 ENICPMD_FUNC_TRACE();
309 if (rte_eal_process_type() != RTE_PROC_PRIMARY)
310 return -E_RTE_SECONDARY;
311 RTE_ASSERT(enic_rte_rq_idx_to_sop_idx(queue_idx) < enic->conf_rq_count);
312 eth_dev->data->rx_queues[queue_idx] =
313 (void *)&enic->rq[enic_rte_rq_idx_to_sop_idx(queue_idx)];
315 ret = enic_alloc_rq(enic, queue_idx, socket_id, mp, nb_desc,
316 rx_conf->rx_free_thresh);
318 dev_err(enic, "error in allocating rq\n");
322 return enicpmd_dev_setup_intr(enic);
325 static int enicpmd_vlan_offload_set(struct rte_eth_dev *eth_dev, int mask)
327 struct enic *enic = pmd_priv(eth_dev);
330 ENICPMD_FUNC_TRACE();
332 offloads = eth_dev->data->dev_conf.rxmode.offloads;
333 if (mask & ETH_VLAN_STRIP_MASK) {
334 if (offloads & DEV_RX_OFFLOAD_VLAN_STRIP)
335 enic->ig_vlan_strip_en = 1;
337 enic->ig_vlan_strip_en = 0;
340 if ((mask & ETH_VLAN_FILTER_MASK) &&
341 (offloads & DEV_RX_OFFLOAD_VLAN_FILTER)) {
343 "Configuration of VLAN filter is not supported\n");
346 if ((mask & ETH_VLAN_EXTEND_MASK) &&
347 (offloads & DEV_RX_OFFLOAD_VLAN_EXTEND)) {
349 "Configuration of extended VLAN is not supported\n");
352 return enic_set_vlan_strip(enic);
355 static int enicpmd_dev_configure(struct rte_eth_dev *eth_dev)
359 struct enic *enic = pmd_priv(eth_dev);
361 if (rte_eal_process_type() != RTE_PROC_PRIMARY)
362 return -E_RTE_SECONDARY;
364 ENICPMD_FUNC_TRACE();
365 ret = enic_set_vnic_res(enic);
367 dev_err(enic, "Set vNIC resource num failed, aborting\n");
371 enic->hw_ip_checksum = !!(eth_dev->data->dev_conf.rxmode.offloads &
372 DEV_RX_OFFLOAD_CHECKSUM);
373 /* All vlan offload masks to apply the current settings */
374 mask = ETH_VLAN_STRIP_MASK |
375 ETH_VLAN_FILTER_MASK |
376 ETH_VLAN_EXTEND_MASK;
377 ret = enicpmd_vlan_offload_set(eth_dev, mask);
379 dev_err(enic, "Failed to configure VLAN offloads\n");
383 * Initialize RSS with the default reta and key. If the user key is
384 * given (rx_adv_conf.rss_conf.rss_key), will use that instead of the
387 return enic_init_rss_nic_cfg(enic);
391 * It returns 0 on success.
393 static int enicpmd_dev_start(struct rte_eth_dev *eth_dev)
395 struct enic *enic = pmd_priv(eth_dev);
397 if (rte_eal_process_type() != RTE_PROC_PRIMARY)
398 return -E_RTE_SECONDARY;
400 ENICPMD_FUNC_TRACE();
401 return enic_enable(enic);
405 * Stop device: disable rx and tx functions to allow for reconfiguring.
407 static void enicpmd_dev_stop(struct rte_eth_dev *eth_dev)
409 struct rte_eth_link link;
410 struct enic *enic = pmd_priv(eth_dev);
412 if (rte_eal_process_type() != RTE_PROC_PRIMARY)
415 ENICPMD_FUNC_TRACE();
418 memset(&link, 0, sizeof(link));
419 rte_eth_linkstatus_set(eth_dev, &link);
425 static void enicpmd_dev_close(struct rte_eth_dev *eth_dev)
427 struct enic *enic = pmd_priv(eth_dev);
429 ENICPMD_FUNC_TRACE();
433 static int enicpmd_dev_link_update(struct rte_eth_dev *eth_dev,
434 __rte_unused int wait_to_complete)
436 struct enic *enic = pmd_priv(eth_dev);
438 ENICPMD_FUNC_TRACE();
439 return enic_link_update(enic);
442 static int enicpmd_dev_stats_get(struct rte_eth_dev *eth_dev,
443 struct rte_eth_stats *stats)
445 struct enic *enic = pmd_priv(eth_dev);
447 ENICPMD_FUNC_TRACE();
448 return enic_dev_stats_get(enic, stats);
451 static void enicpmd_dev_stats_reset(struct rte_eth_dev *eth_dev)
453 struct enic *enic = pmd_priv(eth_dev);
455 ENICPMD_FUNC_TRACE();
456 enic_dev_stats_clear(enic);
459 static void enicpmd_dev_info_get(struct rte_eth_dev *eth_dev,
460 struct rte_eth_dev_info *device_info)
462 struct enic *enic = pmd_priv(eth_dev);
464 ENICPMD_FUNC_TRACE();
465 /* Scattered Rx uses two receive queues per rx queue exposed to dpdk */
466 device_info->max_rx_queues = enic->conf_rq_count / 2;
467 device_info->max_tx_queues = enic->conf_wq_count;
468 device_info->min_rx_bufsize = ENIC_MIN_MTU;
469 /* "Max" mtu is not a typo. HW receives packet sizes up to the
470 * max mtu regardless of the current mtu (vNIC's mtu). vNIC mtu is
471 * a hint to the driver to size receive buffers accordingly so that
472 * larger-than-vnic-mtu packets get truncated.. For DPDK, we let
473 * the user decide the buffer size via rxmode.max_rx_pkt_len, basically
476 device_info->max_rx_pktlen = enic_mtu_to_max_rx_pktlen(enic->max_mtu);
477 device_info->max_mac_addrs = ENIC_MAX_MAC_ADDR;
478 device_info->rx_offload_capa = enic->rx_offload_capa;
479 device_info->tx_offload_capa = enic->tx_offload_capa;
480 device_info->tx_queue_offload_capa = enic->tx_queue_offload_capa;
481 device_info->default_rxconf = (struct rte_eth_rxconf) {
482 .rx_free_thresh = ENIC_DEFAULT_RX_FREE_THRESH
484 device_info->reta_size = enic->reta_size;
485 device_info->hash_key_size = enic->hash_key_size;
486 device_info->flow_type_rss_offloads = enic->flow_type_rss_offloads;
487 device_info->rx_desc_lim = (struct rte_eth_desc_lim) {
488 .nb_max = enic->config.rq_desc_count,
489 .nb_min = ENIC_MIN_RQ_DESCS,
490 .nb_align = ENIC_ALIGN_DESCS,
492 device_info->tx_desc_lim = (struct rte_eth_desc_lim) {
493 .nb_max = enic->config.wq_desc_count,
494 .nb_min = ENIC_MIN_WQ_DESCS,
495 .nb_align = ENIC_ALIGN_DESCS,
496 .nb_seg_max = ENIC_TX_XMIT_MAX,
497 .nb_mtu_seg_max = ENIC_NON_TSO_MAX_DESC,
499 device_info->default_rxportconf = (struct rte_eth_dev_portconf) {
500 .burst_size = ENIC_DEFAULT_RX_BURST,
501 .ring_size = RTE_MIN(device_info->rx_desc_lim.nb_max,
502 ENIC_DEFAULT_RX_RING_SIZE),
503 .nb_queues = ENIC_DEFAULT_RX_RINGS,
505 device_info->default_txportconf = (struct rte_eth_dev_portconf) {
506 .burst_size = ENIC_DEFAULT_TX_BURST,
507 .ring_size = RTE_MIN(device_info->tx_desc_lim.nb_max,
508 ENIC_DEFAULT_TX_RING_SIZE),
509 .nb_queues = ENIC_DEFAULT_TX_RINGS,
513 static const uint32_t *enicpmd_dev_supported_ptypes_get(struct rte_eth_dev *dev)
515 static const uint32_t ptypes[] = {
517 RTE_PTYPE_L2_ETHER_VLAN,
518 RTE_PTYPE_L3_IPV4_EXT_UNKNOWN,
519 RTE_PTYPE_L3_IPV6_EXT_UNKNOWN,
523 RTE_PTYPE_L4_NONFRAG,
527 if (dev->rx_pkt_burst == enic_recv_pkts)
532 static void enicpmd_dev_promiscuous_enable(struct rte_eth_dev *eth_dev)
534 struct enic *enic = pmd_priv(eth_dev);
536 if (rte_eal_process_type() != RTE_PROC_PRIMARY)
539 ENICPMD_FUNC_TRACE();
542 enic_add_packet_filter(enic);
545 static void enicpmd_dev_promiscuous_disable(struct rte_eth_dev *eth_dev)
547 struct enic *enic = pmd_priv(eth_dev);
549 if (rte_eal_process_type() != RTE_PROC_PRIMARY)
552 ENICPMD_FUNC_TRACE();
554 enic_add_packet_filter(enic);
557 static void enicpmd_dev_allmulticast_enable(struct rte_eth_dev *eth_dev)
559 struct enic *enic = pmd_priv(eth_dev);
561 if (rte_eal_process_type() != RTE_PROC_PRIMARY)
564 ENICPMD_FUNC_TRACE();
566 enic_add_packet_filter(enic);
569 static void enicpmd_dev_allmulticast_disable(struct rte_eth_dev *eth_dev)
571 struct enic *enic = pmd_priv(eth_dev);
573 if (rte_eal_process_type() != RTE_PROC_PRIMARY)
576 ENICPMD_FUNC_TRACE();
578 enic_add_packet_filter(enic);
581 static int enicpmd_add_mac_addr(struct rte_eth_dev *eth_dev,
582 struct ether_addr *mac_addr,
583 __rte_unused uint32_t index, __rte_unused uint32_t pool)
585 struct enic *enic = pmd_priv(eth_dev);
587 if (rte_eal_process_type() != RTE_PROC_PRIMARY)
588 return -E_RTE_SECONDARY;
590 ENICPMD_FUNC_TRACE();
591 return enic_set_mac_address(enic, mac_addr->addr_bytes);
594 static void enicpmd_remove_mac_addr(struct rte_eth_dev *eth_dev, uint32_t index)
596 struct enic *enic = pmd_priv(eth_dev);
598 if (rte_eal_process_type() != RTE_PROC_PRIMARY)
601 ENICPMD_FUNC_TRACE();
602 if (enic_del_mac_address(enic, index))
603 dev_err(enic, "del mac addr failed\n");
606 static int enicpmd_set_mac_addr(struct rte_eth_dev *eth_dev,
607 struct ether_addr *addr)
609 struct enic *enic = pmd_priv(eth_dev);
612 if (rte_eal_process_type() != RTE_PROC_PRIMARY)
613 return -E_RTE_SECONDARY;
615 ENICPMD_FUNC_TRACE();
616 ret = enic_del_mac_address(enic, 0);
619 return enic_set_mac_address(enic, addr->addr_bytes);
622 static int enicpmd_mtu_set(struct rte_eth_dev *eth_dev, uint16_t mtu)
624 struct enic *enic = pmd_priv(eth_dev);
626 ENICPMD_FUNC_TRACE();
627 return enic_set_mtu(enic, mtu);
630 static int enicpmd_dev_rss_reta_query(struct rte_eth_dev *dev,
631 struct rte_eth_rss_reta_entry64
635 struct enic *enic = pmd_priv(dev);
636 uint16_t i, idx, shift;
638 ENICPMD_FUNC_TRACE();
639 if (reta_size != ENIC_RSS_RETA_SIZE) {
640 dev_err(enic, "reta_query: wrong reta_size. given=%u expected=%u\n",
641 reta_size, ENIC_RSS_RETA_SIZE);
645 for (i = 0; i < reta_size; i++) {
646 idx = i / RTE_RETA_GROUP_SIZE;
647 shift = i % RTE_RETA_GROUP_SIZE;
648 if (reta_conf[idx].mask & (1ULL << shift))
649 reta_conf[idx].reta[shift] = enic_sop_rq_idx_to_rte_idx(
650 enic->rss_cpu.cpu[i / 4].b[i % 4]);
656 static int enicpmd_dev_rss_reta_update(struct rte_eth_dev *dev,
657 struct rte_eth_rss_reta_entry64
661 struct enic *enic = pmd_priv(dev);
662 union vnic_rss_cpu rss_cpu;
663 uint16_t i, idx, shift;
665 ENICPMD_FUNC_TRACE();
666 if (reta_size != ENIC_RSS_RETA_SIZE) {
667 dev_err(enic, "reta_update: wrong reta_size. given=%u"
669 reta_size, ENIC_RSS_RETA_SIZE);
673 * Start with the current reta and modify it per reta_conf, as we
674 * need to push the entire reta even if we only modify one entry.
676 rss_cpu = enic->rss_cpu;
677 for (i = 0; i < reta_size; i++) {
678 idx = i / RTE_RETA_GROUP_SIZE;
679 shift = i % RTE_RETA_GROUP_SIZE;
680 if (reta_conf[idx].mask & (1ULL << shift))
681 rss_cpu.cpu[i / 4].b[i % 4] =
682 enic_rte_rq_idx_to_sop_idx(
683 reta_conf[idx].reta[shift]);
685 return enic_set_rss_reta(enic, &rss_cpu);
688 static int enicpmd_dev_rss_hash_update(struct rte_eth_dev *dev,
689 struct rte_eth_rss_conf *rss_conf)
691 struct enic *enic = pmd_priv(dev);
693 ENICPMD_FUNC_TRACE();
694 return enic_set_rss_conf(enic, rss_conf);
697 static int enicpmd_dev_rss_hash_conf_get(struct rte_eth_dev *dev,
698 struct rte_eth_rss_conf *rss_conf)
700 struct enic *enic = pmd_priv(dev);
702 ENICPMD_FUNC_TRACE();
703 if (rss_conf == NULL)
705 if (rss_conf->rss_key != NULL &&
706 rss_conf->rss_key_len < ENIC_RSS_HASH_KEY_SIZE) {
707 dev_err(enic, "rss_hash_conf_get: wrong rss_key_len. given=%u"
709 rss_conf->rss_key_len, ENIC_RSS_HASH_KEY_SIZE);
712 rss_conf->rss_hf = enic->rss_hf;
713 if (rss_conf->rss_key != NULL) {
715 for (i = 0; i < ENIC_RSS_HASH_KEY_SIZE; i++) {
716 rss_conf->rss_key[i] =
717 enic->rss_key.key[i / 10].b[i % 10];
719 rss_conf->rss_key_len = ENIC_RSS_HASH_KEY_SIZE;
724 static void enicpmd_dev_rxq_info_get(struct rte_eth_dev *dev,
725 uint16_t rx_queue_id,
726 struct rte_eth_rxq_info *qinfo)
728 struct enic *enic = pmd_priv(dev);
729 struct vnic_rq *rq_sop;
730 struct vnic_rq *rq_data;
731 struct rte_eth_rxconf *conf;
732 uint16_t sop_queue_idx;
733 uint16_t data_queue_idx;
735 ENICPMD_FUNC_TRACE();
736 sop_queue_idx = enic_rte_rq_idx_to_sop_idx(rx_queue_id);
737 data_queue_idx = enic_rte_rq_idx_to_data_idx(rx_queue_id);
738 rq_sop = &enic->rq[sop_queue_idx];
739 rq_data = &enic->rq[data_queue_idx]; /* valid if data_queue_enable */
740 qinfo->mp = rq_sop->mp;
741 qinfo->scattered_rx = rq_sop->data_queue_enable;
742 qinfo->nb_desc = rq_sop->ring.desc_count;
743 if (qinfo->scattered_rx)
744 qinfo->nb_desc += rq_data->ring.desc_count;
746 memset(conf, 0, sizeof(*conf));
747 conf->rx_free_thresh = rq_sop->rx_free_thresh;
748 conf->rx_drop_en = 1;
750 * Except VLAN stripping (port setting), all the checksum offloads
751 * are always enabled.
753 conf->offloads = enic->rx_offload_capa;
754 if (!enic->ig_vlan_strip_en)
755 conf->offloads &= ~DEV_RX_OFFLOAD_VLAN_STRIP;
756 /* rx_thresh and other fields are not applicable for enic */
759 static void enicpmd_dev_txq_info_get(struct rte_eth_dev *dev,
760 uint16_t tx_queue_id,
761 struct rte_eth_txq_info *qinfo)
763 struct enic *enic = pmd_priv(dev);
764 struct vnic_wq *wq = &enic->wq[tx_queue_id];
766 ENICPMD_FUNC_TRACE();
767 qinfo->nb_desc = wq->ring.desc_count;
768 memset(&qinfo->conf, 0, sizeof(qinfo->conf));
769 qinfo->conf.offloads = wq->offloads;
770 /* tx_thresh, and all the other fields are not applicable for enic */
773 static int enicpmd_dev_rx_queue_intr_enable(struct rte_eth_dev *eth_dev,
774 uint16_t rx_queue_id)
776 struct enic *enic = pmd_priv(eth_dev);
778 ENICPMD_FUNC_TRACE();
779 vnic_intr_unmask(&enic->intr[rx_queue_id + ENICPMD_RXQ_INTR_OFFSET]);
783 static int enicpmd_dev_rx_queue_intr_disable(struct rte_eth_dev *eth_dev,
784 uint16_t rx_queue_id)
786 struct enic *enic = pmd_priv(eth_dev);
788 ENICPMD_FUNC_TRACE();
789 vnic_intr_mask(&enic->intr[rx_queue_id + ENICPMD_RXQ_INTR_OFFSET]);
793 static int udp_tunnel_common_check(struct enic *enic,
794 struct rte_eth_udp_tunnel *tnl)
796 if (tnl->prot_type != RTE_TUNNEL_TYPE_VXLAN)
798 if (!enic->overlay_offload) {
799 PMD_INIT_LOG(DEBUG, " vxlan (overlay offload) is not "
806 static int update_vxlan_port(struct enic *enic, uint16_t port)
808 if (vnic_dev_overlay_offload_cfg(enic->vdev,
809 OVERLAY_CFG_VXLAN_PORT_UPDATE,
811 PMD_INIT_LOG(DEBUG, " failed to update vxlan port\n");
814 PMD_INIT_LOG(DEBUG, " updated vxlan port to %u\n", port);
815 enic->vxlan_port = port;
819 static int enicpmd_dev_udp_tunnel_port_add(struct rte_eth_dev *eth_dev,
820 struct rte_eth_udp_tunnel *tnl)
822 struct enic *enic = pmd_priv(eth_dev);
825 ENICPMD_FUNC_TRACE();
826 ret = udp_tunnel_common_check(enic, tnl);
830 * The NIC has 1 configurable VXLAN port number. "Adding" a new port
831 * number replaces it.
833 if (tnl->udp_port == enic->vxlan_port || tnl->udp_port == 0) {
834 PMD_INIT_LOG(DEBUG, " %u is already configured or invalid\n",
838 return update_vxlan_port(enic, tnl->udp_port);
841 static int enicpmd_dev_udp_tunnel_port_del(struct rte_eth_dev *eth_dev,
842 struct rte_eth_udp_tunnel *tnl)
844 struct enic *enic = pmd_priv(eth_dev);
847 ENICPMD_FUNC_TRACE();
848 ret = udp_tunnel_common_check(enic, tnl);
852 * Clear the previously set port number and restore the
853 * hardware default port number. Some drivers disable VXLAN
854 * offloads when there are no configured port numbers. But
855 * enic does not do that as VXLAN is part of overlay offload,
856 * which is tied to inner RSS and TSO.
858 if (tnl->udp_port != enic->vxlan_port) {
859 PMD_INIT_LOG(DEBUG, " %u is not a configured vxlan port\n",
863 return update_vxlan_port(enic, ENIC_DEFAULT_VXLAN_PORT);
866 static const struct eth_dev_ops enicpmd_eth_dev_ops = {
867 .dev_configure = enicpmd_dev_configure,
868 .dev_start = enicpmd_dev_start,
869 .dev_stop = enicpmd_dev_stop,
870 .dev_set_link_up = NULL,
871 .dev_set_link_down = NULL,
872 .dev_close = enicpmd_dev_close,
873 .promiscuous_enable = enicpmd_dev_promiscuous_enable,
874 .promiscuous_disable = enicpmd_dev_promiscuous_disable,
875 .allmulticast_enable = enicpmd_dev_allmulticast_enable,
876 .allmulticast_disable = enicpmd_dev_allmulticast_disable,
877 .link_update = enicpmd_dev_link_update,
878 .stats_get = enicpmd_dev_stats_get,
879 .stats_reset = enicpmd_dev_stats_reset,
880 .queue_stats_mapping_set = NULL,
881 .dev_infos_get = enicpmd_dev_info_get,
882 .dev_supported_ptypes_get = enicpmd_dev_supported_ptypes_get,
883 .mtu_set = enicpmd_mtu_set,
884 .vlan_filter_set = NULL,
885 .vlan_tpid_set = NULL,
886 .vlan_offload_set = enicpmd_vlan_offload_set,
887 .vlan_strip_queue_set = NULL,
888 .rx_queue_start = enicpmd_dev_rx_queue_start,
889 .rx_queue_stop = enicpmd_dev_rx_queue_stop,
890 .tx_queue_start = enicpmd_dev_tx_queue_start,
891 .tx_queue_stop = enicpmd_dev_tx_queue_stop,
892 .rx_queue_setup = enicpmd_dev_rx_queue_setup,
893 .rx_queue_release = enicpmd_dev_rx_queue_release,
894 .rx_queue_count = enicpmd_dev_rx_queue_count,
895 .rx_descriptor_done = NULL,
896 .tx_queue_setup = enicpmd_dev_tx_queue_setup,
897 .tx_queue_release = enicpmd_dev_tx_queue_release,
898 .rx_queue_intr_enable = enicpmd_dev_rx_queue_intr_enable,
899 .rx_queue_intr_disable = enicpmd_dev_rx_queue_intr_disable,
900 .rxq_info_get = enicpmd_dev_rxq_info_get,
901 .txq_info_get = enicpmd_dev_txq_info_get,
904 .flow_ctrl_get = NULL,
905 .flow_ctrl_set = NULL,
906 .priority_flow_ctrl_set = NULL,
907 .mac_addr_add = enicpmd_add_mac_addr,
908 .mac_addr_remove = enicpmd_remove_mac_addr,
909 .mac_addr_set = enicpmd_set_mac_addr,
910 .filter_ctrl = enicpmd_dev_filter_ctrl,
911 .reta_query = enicpmd_dev_rss_reta_query,
912 .reta_update = enicpmd_dev_rss_reta_update,
913 .rss_hash_conf_get = enicpmd_dev_rss_hash_conf_get,
914 .rss_hash_update = enicpmd_dev_rss_hash_update,
915 .udp_tunnel_port_add = enicpmd_dev_udp_tunnel_port_add,
916 .udp_tunnel_port_del = enicpmd_dev_udp_tunnel_port_del,
919 static int enic_parse_disable_overlay(__rte_unused const char *key,
925 enic = (struct enic *)opaque;
926 if (strcmp(value, "0") == 0) {
927 enic->disable_overlay = false;
928 } else if (strcmp(value, "1") == 0) {
929 enic->disable_overlay = true;
931 dev_err(enic, "Invalid value for " ENIC_DEVARG_DISABLE_OVERLAY
932 ": expected=0|1 given=%s\n", value);
938 static int enic_parse_ig_vlan_rewrite(__rte_unused const char *key,
944 enic = (struct enic *)opaque;
945 if (strcmp(value, "trunk") == 0) {
946 /* Trunk mode: always tag */
947 enic->ig_vlan_rewrite_mode = IG_VLAN_REWRITE_MODE_DEFAULT_TRUNK;
948 } else if (strcmp(value, "untag") == 0) {
949 /* Untag default VLAN mode: untag if VLAN = default VLAN */
950 enic->ig_vlan_rewrite_mode =
951 IG_VLAN_REWRITE_MODE_UNTAG_DEFAULT_VLAN;
952 } else if (strcmp(value, "priority") == 0) {
954 * Priority-tag default VLAN mode: priority tag (VLAN header
955 * with ID=0) if VLAN = default
957 enic->ig_vlan_rewrite_mode =
958 IG_VLAN_REWRITE_MODE_PRIORITY_TAG_DEFAULT_VLAN;
959 } else if (strcmp(value, "pass") == 0) {
960 /* Pass through mode: do not touch tags */
961 enic->ig_vlan_rewrite_mode = IG_VLAN_REWRITE_MODE_PASS_THRU;
963 dev_err(enic, "Invalid value for " ENIC_DEVARG_IG_VLAN_REWRITE
964 ": expected=trunk|untag|priority|pass given=%s\n",
971 static int enic_check_devargs(struct rte_eth_dev *dev)
973 static const char *const valid_keys[] = {
974 ENIC_DEVARG_DISABLE_OVERLAY,
975 ENIC_DEVARG_IG_VLAN_REWRITE,
977 struct enic *enic = pmd_priv(dev);
978 struct rte_kvargs *kvlist;
980 ENICPMD_FUNC_TRACE();
982 enic->disable_overlay = false;
983 enic->ig_vlan_rewrite_mode = IG_VLAN_REWRITE_MODE_PASS_THRU;
984 if (!dev->device->devargs)
986 kvlist = rte_kvargs_parse(dev->device->devargs->args, valid_keys);
989 if (rte_kvargs_process(kvlist, ENIC_DEVARG_DISABLE_OVERLAY,
990 enic_parse_disable_overlay, enic) < 0 ||
991 rte_kvargs_process(kvlist, ENIC_DEVARG_IG_VLAN_REWRITE,
992 enic_parse_ig_vlan_rewrite, enic) < 0) {
993 rte_kvargs_free(kvlist);
996 rte_kvargs_free(kvlist);
1000 struct enic *enicpmd_list_head = NULL;
1001 /* Initialize the driver
1002 * It returns 0 on success.
1004 static int eth_enicpmd_dev_init(struct rte_eth_dev *eth_dev)
1006 struct rte_pci_device *pdev;
1007 struct rte_pci_addr *addr;
1008 struct enic *enic = pmd_priv(eth_dev);
1011 ENICPMD_FUNC_TRACE();
1013 enic->port_id = eth_dev->data->port_id;
1014 enic->rte_dev = eth_dev;
1015 eth_dev->dev_ops = &enicpmd_eth_dev_ops;
1016 eth_dev->rx_pkt_burst = &enic_recv_pkts;
1017 eth_dev->tx_pkt_burst = &enic_xmit_pkts;
1018 eth_dev->tx_pkt_prepare = &enic_prep_pkts;
1020 pdev = RTE_ETH_DEV_TO_PCI(eth_dev);
1021 rte_eth_copy_pci_info(eth_dev, pdev);
1025 snprintf(enic->bdf_name, ENICPMD_BDF_LENGTH, "%04x:%02x:%02x.%x",
1026 addr->domain, addr->bus, addr->devid, addr->function);
1028 err = enic_check_devargs(eth_dev);
1031 return enic_probe(enic);
1034 static int eth_enic_pci_probe(struct rte_pci_driver *pci_drv __rte_unused,
1035 struct rte_pci_device *pci_dev)
1037 return rte_eth_dev_pci_generic_probe(pci_dev, sizeof(struct enic),
1038 eth_enicpmd_dev_init);
1041 static int eth_enic_pci_remove(struct rte_pci_device *pci_dev)
1043 return rte_eth_dev_pci_generic_remove(pci_dev, NULL);
1046 static struct rte_pci_driver rte_enic_pmd = {
1047 .id_table = pci_id_enic_map,
1048 .drv_flags = RTE_PCI_DRV_NEED_MAPPING | RTE_PCI_DRV_INTR_LSC,
1049 .probe = eth_enic_pci_probe,
1050 .remove = eth_enic_pci_remove,
1053 RTE_PMD_REGISTER_PCI(net_enic, rte_enic_pmd);
1054 RTE_PMD_REGISTER_PCI_TABLE(net_enic, pci_id_enic_map);
1055 RTE_PMD_REGISTER_KMOD_DEP(net_enic, "* igb_uio | uio_pci_generic | vfio-pci");
1056 RTE_PMD_REGISTER_PARAM_STRING(net_enic,
1057 ENIC_DEVARG_DISABLE_OVERLAY "=0|1 "
1058 ENIC_DEVARG_IG_VLAN_REWRITE "=trunk|untag|priority|pass");