2 * Copyright 2008-2014 Cisco Systems, Inc. All rights reserved.
3 * Copyright 2007 Nuova Systems, Inc. All rights reserved.
5 * Copyright (c) 2014, Cisco Systems, Inc.
8 * Redistribution and use in source and binary forms, with or without
9 * modification, are permitted provided that the following conditions
12 * 1. Redistributions of source code must retain the above copyright
13 * notice, this list of conditions and the following disclaimer.
15 * 2. Redistributions in binary form must reproduce the above copyright
16 * notice, this list of conditions and the following disclaimer in
17 * the documentation and/or other materials provided with the
20 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
21 * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
22 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
23 * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
24 * COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
25 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
26 * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
27 * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
28 * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
29 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
30 * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
31 * POSSIBILITY OF SUCH DAMAGE.
43 #include <rte_memzone.h>
44 #include <rte_malloc.h>
46 #include <rte_string_fns.h>
47 #include <rte_ethdev.h>
49 #include "enic_compat.h"
51 #include "wq_enet_desc.h"
52 #include "rq_enet_desc.h"
53 #include "cq_enet_desc.h"
54 #include "vnic_enet.h"
59 #include "vnic_intr.h"
62 static inline int enic_is_sriov_vf(struct enic *enic)
64 return enic->pdev->id.device_id == PCI_DEVICE_ID_CISCO_VIC_ENET_VF;
67 static int is_zero_addr(uint8_t *addr)
69 return !(addr[0] | addr[1] | addr[2] | addr[3] | addr[4] | addr[5]);
72 static int is_mcast_addr(uint8_t *addr)
77 static int is_eth_addr_valid(uint8_t *addr)
79 return !is_mcast_addr(addr) && !is_zero_addr(addr);
83 enic_rxmbuf_queue_release(__rte_unused struct enic *enic, struct vnic_rq *rq)
87 if (!rq || !rq->mbuf_ring) {
88 dev_debug(enic, "Pointer to rq or mbuf_ring is NULL");
92 for (i = 0; i < rq->ring.desc_count; i++) {
93 if (rq->mbuf_ring[i]) {
94 rte_pktmbuf_free_seg(rq->mbuf_ring[i]);
95 rq->mbuf_ring[i] = NULL;
100 void enic_set_hdr_split_size(struct enic *enic, u16 split_hdr_size)
102 vnic_set_hdr_split_size(enic->vdev, split_hdr_size);
105 static void enic_free_wq_buf(struct vnic_wq_buf *buf)
107 struct rte_mbuf *mbuf = (struct rte_mbuf *)buf->mb;
109 rte_pktmbuf_free_seg(mbuf);
113 static void enic_log_q_error(struct enic *enic)
118 for (i = 0; i < enic->wq_count; i++) {
119 error_status = vnic_wq_error_status(&enic->wq[i]);
121 dev_err(enic, "WQ[%d] error_status %d\n", i,
125 for (i = 0; i < enic_vnic_rq_count(enic); i++) {
126 if (!enic->rq[i].in_use)
128 error_status = vnic_rq_error_status(&enic->rq[i]);
130 dev_err(enic, "RQ[%d] error_status %d\n", i,
135 static void enic_clear_soft_stats(struct enic *enic)
137 struct enic_soft_stats *soft_stats = &enic->soft_stats;
138 rte_atomic64_clear(&soft_stats->rx_nombuf);
139 rte_atomic64_clear(&soft_stats->rx_packet_errors);
140 rte_atomic64_clear(&soft_stats->tx_oversized);
143 static void enic_init_soft_stats(struct enic *enic)
145 struct enic_soft_stats *soft_stats = &enic->soft_stats;
146 rte_atomic64_init(&soft_stats->rx_nombuf);
147 rte_atomic64_init(&soft_stats->rx_packet_errors);
148 rte_atomic64_init(&soft_stats->tx_oversized);
149 enic_clear_soft_stats(enic);
152 void enic_dev_stats_clear(struct enic *enic)
154 if (vnic_dev_stats_clear(enic->vdev))
155 dev_err(enic, "Error in clearing stats\n");
156 enic_clear_soft_stats(enic);
159 void enic_dev_stats_get(struct enic *enic, struct rte_eth_stats *r_stats)
161 struct vnic_stats *stats;
162 struct enic_soft_stats *soft_stats = &enic->soft_stats;
163 int64_t rx_truncated;
164 uint64_t rx_packet_errors;
166 if (vnic_dev_stats_dump(enic->vdev, &stats)) {
167 dev_err(enic, "Error in getting stats\n");
171 /* The number of truncated packets can only be calculated by
172 * subtracting a hardware counter from error packets received by
173 * the driver. Note: this causes transient inaccuracies in the
174 * ipackets count. Also, the length of truncated packets are
175 * counted in ibytes even though truncated packets are dropped
176 * which can make ibytes be slightly higher than it should be.
178 rx_packet_errors = rte_atomic64_read(&soft_stats->rx_packet_errors);
179 rx_truncated = rx_packet_errors - stats->rx.rx_errors;
181 r_stats->ipackets = stats->rx.rx_frames_ok - rx_truncated;
182 r_stats->opackets = stats->tx.tx_frames_ok;
184 r_stats->ibytes = stats->rx.rx_bytes_ok;
185 r_stats->obytes = stats->tx.tx_bytes_ok;
187 r_stats->ierrors = stats->rx.rx_errors + stats->rx.rx_drop;
188 r_stats->oerrors = stats->tx.tx_errors
189 + rte_atomic64_read(&soft_stats->tx_oversized);
191 r_stats->imissed = stats->rx.rx_no_bufs + rx_truncated;
193 r_stats->rx_nombuf = rte_atomic64_read(&soft_stats->rx_nombuf);
196 void enic_del_mac_address(struct enic *enic, int mac_index)
198 struct rte_eth_dev *eth_dev = enic->rte_dev;
199 uint8_t *mac_addr = eth_dev->data->mac_addrs[mac_index].addr_bytes;
201 if (vnic_dev_del_addr(enic->vdev, mac_addr))
202 dev_err(enic, "del mac addr failed\n");
205 int enic_set_mac_address(struct enic *enic, uint8_t *mac_addr)
209 if (!is_eth_addr_valid(mac_addr)) {
210 dev_err(enic, "invalid mac address\n");
214 err = vnic_dev_add_addr(enic->vdev, mac_addr);
216 dev_err(enic, "add mac addr failed\n");
221 enic_free_rq_buf(struct rte_mbuf **mbuf)
226 rte_pktmbuf_free(*mbuf);
230 void enic_init_vnic_resources(struct enic *enic)
232 unsigned int error_interrupt_enable = 1;
233 unsigned int error_interrupt_offset = 0;
234 unsigned int index = 0;
236 struct vnic_rq *data_rq;
238 for (index = 0; index < enic->rq_count; index++) {
239 cq_idx = enic_cq_rq(enic, enic_rte_rq_idx_to_sop_idx(index));
241 vnic_rq_init(&enic->rq[enic_rte_rq_idx_to_sop_idx(index)],
243 error_interrupt_enable,
244 error_interrupt_offset);
246 data_rq = &enic->rq[enic_rte_rq_idx_to_data_idx(index)];
248 vnic_rq_init(data_rq,
250 error_interrupt_enable,
251 error_interrupt_offset);
253 vnic_cq_init(&enic->cq[cq_idx],
254 0 /* flow_control_enable */,
255 1 /* color_enable */,
258 1 /* cq_tail_color */,
259 0 /* interrupt_enable */,
260 1 /* cq_entry_enable */,
261 0 /* cq_message_enable */,
262 0 /* interrupt offset */,
263 0 /* cq_message_addr */);
266 for (index = 0; index < enic->wq_count; index++) {
267 vnic_wq_init(&enic->wq[index],
268 enic_cq_wq(enic, index),
269 error_interrupt_enable,
270 error_interrupt_offset);
272 cq_idx = enic_cq_wq(enic, index);
273 vnic_cq_init(&enic->cq[cq_idx],
274 0 /* flow_control_enable */,
275 1 /* color_enable */,
278 1 /* cq_tail_color */,
279 0 /* interrupt_enable */,
280 0 /* cq_entry_enable */,
281 1 /* cq_message_enable */,
282 0 /* interrupt offset */,
283 (u64)enic->wq[index].cqmsg_rz->phys_addr);
286 vnic_intr_init(&enic->intr,
287 enic->config.intr_timer_usec,
288 enic->config.intr_timer_type,
289 /*mask_on_assertion*/1);
294 enic_alloc_rx_queue_mbufs(struct enic *enic, struct vnic_rq *rq)
297 struct rq_enet_desc *rqd = rq->ring.descs;
304 dev_debug(enic, "queue %u, allocating %u rx queue mbufs\n", rq->index,
305 rq->ring.desc_count);
307 for (i = 0; i < rq->ring.desc_count; i++, rqd++) {
308 mb = rte_mbuf_raw_alloc(rq->mp);
310 dev_err(enic, "RX mbuf alloc failed queue_id=%u\n",
311 (unsigned)rq->index);
315 mb->data_off = RTE_PKTMBUF_HEADROOM;
316 dma_addr = (dma_addr_t)(mb->buf_physaddr
317 + RTE_PKTMBUF_HEADROOM);
318 rq_enet_desc_enc(rqd, dma_addr,
319 (rq->is_sop ? RQ_ENET_TYPE_ONLY_SOP
320 : RQ_ENET_TYPE_NOT_SOP),
321 mb->buf_len - RTE_PKTMBUF_HEADROOM);
322 rq->mbuf_ring[i] = mb;
325 /* make sure all prior writes are complete before doing the PIO write */
328 /* Post all but the last buffer to VIC. */
329 rq->posted_index = rq->ring.desc_count - 1;
333 dev_debug(enic, "port=%u, qidx=%u, Write %u posted idx, %u sw held\n",
334 enic->port_id, rq->index, rq->posted_index, rq->rx_nb_hold);
335 iowrite32(rq->posted_index, &rq->ctrl->posted_index);
336 iowrite32(0, &rq->ctrl->fetch_index);
344 enic_alloc_consistent(void *priv, size_t size,
345 dma_addr_t *dma_handle, u8 *name)
348 const struct rte_memzone *rz;
350 struct enic *enic = (struct enic *)priv;
351 struct enic_memzone_entry *mze;
353 rz = rte_memzone_reserve_aligned((const char *)name,
354 size, SOCKET_ID_ANY, 0, ENIC_ALIGN);
356 pr_err("%s : Failed to allocate memory requested for %s\n",
362 *dma_handle = (dma_addr_t)rz->phys_addr;
364 mze = rte_malloc("enic memzone entry",
365 sizeof(struct enic_memzone_entry), 0);
368 pr_err("%s : Failed to allocate memory for memzone list\n",
370 rte_memzone_free(rz);
375 rte_spinlock_lock(&enic->memzone_list_lock);
376 LIST_INSERT_HEAD(&enic->memzone_list, mze, entries);
377 rte_spinlock_unlock(&enic->memzone_list_lock);
383 enic_free_consistent(void *priv,
384 __rte_unused size_t size,
386 dma_addr_t dma_handle)
388 struct enic_memzone_entry *mze;
389 struct enic *enic = (struct enic *)priv;
391 rte_spinlock_lock(&enic->memzone_list_lock);
392 LIST_FOREACH(mze, &enic->memzone_list, entries) {
393 if (mze->rz->addr == vaddr &&
394 mze->rz->phys_addr == dma_handle)
398 rte_spinlock_unlock(&enic->memzone_list_lock);
400 "Tried to free memory, but couldn't find it in the memzone list\n");
403 LIST_REMOVE(mze, entries);
404 rte_spinlock_unlock(&enic->memzone_list_lock);
405 rte_memzone_free(mze->rz);
409 int enic_link_update(struct enic *enic)
411 struct rte_eth_dev *eth_dev = enic->rte_dev;
415 link_status = enic_get_link_status(enic);
416 ret = (link_status == enic->link_status);
417 enic->link_status = link_status;
418 eth_dev->data->dev_link.link_status = link_status;
419 eth_dev->data->dev_link.link_duplex = ETH_LINK_FULL_DUPLEX;
420 eth_dev->data->dev_link.link_speed = vnic_dev_port_speed(enic->vdev);
425 enic_intr_handler(void *arg)
427 struct rte_eth_dev *dev = (struct rte_eth_dev *)arg;
428 struct enic *enic = pmd_priv(dev);
430 vnic_intr_return_all_credits(&enic->intr);
432 enic_link_update(enic);
433 _rte_eth_dev_callback_process(dev, RTE_ETH_EVENT_INTR_LSC, NULL);
434 enic_log_q_error(enic);
437 int enic_enable(struct enic *enic)
441 struct rte_eth_dev *eth_dev = enic->rte_dev;
443 eth_dev->data->dev_link.link_speed = vnic_dev_port_speed(enic->vdev);
444 eth_dev->data->dev_link.link_duplex = ETH_LINK_FULL_DUPLEX;
446 /* vnic notification of link status has already been turned on in
447 * enic_dev_init() which is called during probe time. Here we are
448 * just turning on interrupt vector 0 if needed.
450 if (eth_dev->data->dev_conf.intr_conf.lsc)
451 vnic_dev_notify_set(enic->vdev, 0);
453 if (enic_clsf_init(enic))
454 dev_warning(enic, "Init of hash table for clsf failed."\
455 "Flow director feature will not work\n");
457 for (index = 0; index < enic->rq_count; index++) {
458 err = enic_alloc_rx_queue_mbufs(enic,
459 &enic->rq[enic_rte_rq_idx_to_sop_idx(index)]);
461 dev_err(enic, "Failed to alloc sop RX queue mbufs\n");
464 err = enic_alloc_rx_queue_mbufs(enic,
465 &enic->rq[enic_rte_rq_idx_to_data_idx(index)]);
467 /* release the allocated mbufs for the sop rq*/
468 enic_rxmbuf_queue_release(enic,
469 &enic->rq[enic_rte_rq_idx_to_sop_idx(index)]);
471 dev_err(enic, "Failed to alloc data RX queue mbufs\n");
476 for (index = 0; index < enic->wq_count; index++)
477 enic_start_wq(enic, index);
478 for (index = 0; index < enic->rq_count; index++)
479 enic_start_rq(enic, index);
481 vnic_dev_add_addr(enic->vdev, enic->mac_addr);
483 vnic_dev_enable_wait(enic->vdev);
485 /* Register and enable error interrupt */
486 rte_intr_callback_register(&(enic->pdev->intr_handle),
487 enic_intr_handler, (void *)enic->rte_dev);
489 rte_intr_enable(&(enic->pdev->intr_handle));
490 vnic_intr_unmask(&enic->intr);
495 int enic_alloc_intr_resources(struct enic *enic)
499 dev_info(enic, "vNIC resources used: "\
500 "wq %d rq %d cq %d intr %d\n",
501 enic->wq_count, enic_vnic_rq_count(enic),
502 enic->cq_count, enic->intr_count);
504 err = vnic_intr_alloc(enic->vdev, &enic->intr, 0);
506 enic_free_vnic_resources(enic);
511 void enic_free_rq(void *rxq)
513 struct vnic_rq *rq_sop, *rq_data;
519 rq_sop = (struct vnic_rq *)rxq;
520 enic = vnic_dev_priv(rq_sop->vdev);
521 rq_data = &enic->rq[rq_sop->data_queue_idx];
523 enic_rxmbuf_queue_release(enic, rq_sop);
525 enic_rxmbuf_queue_release(enic, rq_data);
527 rte_free(rq_sop->mbuf_ring);
529 rte_free(rq_data->mbuf_ring);
531 rq_sop->mbuf_ring = NULL;
532 rq_data->mbuf_ring = NULL;
534 vnic_rq_free(rq_sop);
536 vnic_rq_free(rq_data);
538 vnic_cq_free(&enic->cq[enic_sop_rq_idx_to_cq_idx(rq_sop->index)]);
544 void enic_start_wq(struct enic *enic, uint16_t queue_idx)
546 struct rte_eth_dev *eth_dev = enic->rte_dev;
547 vnic_wq_enable(&enic->wq[queue_idx]);
548 eth_dev->data->tx_queue_state[queue_idx] = RTE_ETH_QUEUE_STATE_STARTED;
551 int enic_stop_wq(struct enic *enic, uint16_t queue_idx)
553 struct rte_eth_dev *eth_dev = enic->rte_dev;
556 ret = vnic_wq_disable(&enic->wq[queue_idx]);
560 eth_dev->data->tx_queue_state[queue_idx] = RTE_ETH_QUEUE_STATE_STOPPED;
564 void enic_start_rq(struct enic *enic, uint16_t queue_idx)
566 struct vnic_rq *rq_sop;
567 struct vnic_rq *rq_data;
568 rq_sop = &enic->rq[enic_rte_rq_idx_to_sop_idx(queue_idx)];
569 rq_data = &enic->rq[rq_sop->data_queue_idx];
570 struct rte_eth_dev *eth_dev = enic->rte_dev;
573 vnic_rq_enable(rq_data);
575 vnic_rq_enable(rq_sop);
576 eth_dev->data->rx_queue_state[queue_idx] = RTE_ETH_QUEUE_STATE_STARTED;
579 int enic_stop_rq(struct enic *enic, uint16_t queue_idx)
581 int ret1 = 0, ret2 = 0;
582 struct rte_eth_dev *eth_dev = enic->rte_dev;
583 struct vnic_rq *rq_sop;
584 struct vnic_rq *rq_data;
585 rq_sop = &enic->rq[enic_rte_rq_idx_to_sop_idx(queue_idx)];
586 rq_data = &enic->rq[rq_sop->data_queue_idx];
588 ret2 = vnic_rq_disable(rq_sop);
591 ret1 = vnic_rq_disable(rq_data);
598 eth_dev->data->rx_queue_state[queue_idx] = RTE_ETH_QUEUE_STATE_STOPPED;
602 int enic_alloc_rq(struct enic *enic, uint16_t queue_idx,
603 unsigned int socket_id, struct rte_mempool *mp,
604 uint16_t nb_desc, uint16_t free_thresh)
607 uint16_t sop_queue_idx = enic_rte_rq_idx_to_sop_idx(queue_idx);
608 uint16_t data_queue_idx = enic_rte_rq_idx_to_data_idx(queue_idx);
609 struct vnic_rq *rq_sop = &enic->rq[sop_queue_idx];
610 struct vnic_rq *rq_data = &enic->rq[data_queue_idx];
611 unsigned int mbuf_size, mbufs_per_pkt;
612 unsigned int nb_sop_desc, nb_data_desc;
613 uint16_t min_sop, max_sop, min_data, max_data;
614 uint16_t mtu = enic->rte_dev->data->mtu;
617 rq_sop->data_queue_idx = data_queue_idx;
619 rq_data->data_queue_idx = 0;
620 rq_sop->socket_id = socket_id;
622 rq_data->socket_id = socket_id;
625 rq_sop->rx_free_thresh = free_thresh;
626 rq_data->rx_free_thresh = free_thresh;
627 dev_debug(enic, "Set queue_id:%u free thresh:%u\n", queue_idx,
630 mbuf_size = (uint16_t)(rte_pktmbuf_data_room_size(mp) -
631 RTE_PKTMBUF_HEADROOM);
633 if (enic->rte_dev->data->dev_conf.rxmode.enable_scatter) {
634 dev_info(enic, "Rq %u Scatter rx mode enabled\n", queue_idx);
635 /* ceil((mtu + ETHER_HDR_LEN + 4)/mbuf_size) */
636 mbufs_per_pkt = ((mtu + ETHER_HDR_LEN + 4) +
637 (mbuf_size - 1)) / mbuf_size;
639 dev_info(enic, "Scatter rx mode disabled\n");
643 if (mbufs_per_pkt > 1) {
644 dev_info(enic, "Rq %u Scatter rx mode in use\n", queue_idx);
645 rq_sop->data_queue_enable = 1;
648 dev_info(enic, "Rq %u Scatter rx mode not being used\n",
650 rq_sop->data_queue_enable = 0;
654 /* number of descriptors have to be a multiple of 32 */
655 nb_sop_desc = (nb_desc / mbufs_per_pkt) & ~0x1F;
656 nb_data_desc = (nb_desc - nb_sop_desc) & ~0x1F;
658 rq_sop->max_mbufs_per_pkt = mbufs_per_pkt;
659 rq_data->max_mbufs_per_pkt = mbufs_per_pkt;
661 if (mbufs_per_pkt > 1) {
663 max_sop = ((enic->config.rq_desc_count /
664 (mbufs_per_pkt - 1)) & ~0x1F);
665 min_data = min_sop * (mbufs_per_pkt - 1);
666 max_data = enic->config.rq_desc_count;
669 max_sop = enic->config.rq_desc_count;
674 if (nb_desc < (min_sop + min_data)) {
676 "Number of rx descs too low, adjusting to minimum\n");
677 nb_sop_desc = min_sop;
678 nb_data_desc = min_data;
679 } else if (nb_desc > (max_sop + max_data)) {
681 "Number of rx_descs too high, adjusting to maximum\n");
682 nb_sop_desc = max_sop;
683 nb_data_desc = max_data;
685 if (mbufs_per_pkt > 1) {
686 dev_info(enic, "For mtu %d and mbuf size %d valid rx descriptor range is %d to %d\n",
687 mtu, mbuf_size, min_sop + min_data,
690 dev_info(enic, "Using %d rx descriptors (sop %d, data %d)\n",
691 nb_sop_desc + nb_data_desc, nb_sop_desc, nb_data_desc);
693 /* Allocate sop queue resources */
694 rc = vnic_rq_alloc(enic->vdev, rq_sop, sop_queue_idx,
695 nb_sop_desc, sizeof(struct rq_enet_desc));
697 dev_err(enic, "error in allocation of sop rq\n");
700 nb_sop_desc = rq_sop->ring.desc_count;
702 if (rq_data->in_use) {
703 /* Allocate data queue resources */
704 rc = vnic_rq_alloc(enic->vdev, rq_data, data_queue_idx,
706 sizeof(struct rq_enet_desc));
708 dev_err(enic, "error in allocation of data rq\n");
709 goto err_free_rq_sop;
711 nb_data_desc = rq_data->ring.desc_count;
713 rc = vnic_cq_alloc(enic->vdev, &enic->cq[queue_idx], queue_idx,
714 socket_id, nb_sop_desc + nb_data_desc,
715 sizeof(struct cq_enet_rq_desc));
717 dev_err(enic, "error in allocation of cq for rq\n");
718 goto err_free_rq_data;
721 /* Allocate the mbuf rings */
722 rq_sop->mbuf_ring = (struct rte_mbuf **)
723 rte_zmalloc_socket("rq->mbuf_ring",
724 sizeof(struct rte_mbuf *) * nb_sop_desc,
725 RTE_CACHE_LINE_SIZE, rq_sop->socket_id);
726 if (rq_sop->mbuf_ring == NULL)
729 if (rq_data->in_use) {
730 rq_data->mbuf_ring = (struct rte_mbuf **)
731 rte_zmalloc_socket("rq->mbuf_ring",
732 sizeof(struct rte_mbuf *) * nb_data_desc,
733 RTE_CACHE_LINE_SIZE, rq_sop->socket_id);
734 if (rq_data->mbuf_ring == NULL)
735 goto err_free_sop_mbuf;
738 rq_sop->tot_nb_desc = nb_desc; /* squirl away for MTU update function */
743 rte_free(rq_sop->mbuf_ring);
745 /* cleanup on error */
746 vnic_cq_free(&enic->cq[queue_idx]);
749 vnic_rq_free(rq_data);
751 vnic_rq_free(rq_sop);
756 void enic_free_wq(void *txq)
764 wq = (struct vnic_wq *)txq;
765 enic = vnic_dev_priv(wq->vdev);
766 rte_memzone_free(wq->cqmsg_rz);
768 vnic_cq_free(&enic->cq[enic->rq_count + wq->index]);
771 int enic_alloc_wq(struct enic *enic, uint16_t queue_idx,
772 unsigned int socket_id, uint16_t nb_desc)
775 struct vnic_wq *wq = &enic->wq[queue_idx];
776 unsigned int cq_index = enic_cq_wq(enic, queue_idx);
780 wq->socket_id = socket_id;
782 if (nb_desc > enic->config.wq_desc_count) {
784 "WQ %d - number of tx desc in cmd line (%d)"\
785 "is greater than that in the UCSM/CIMC adapter"\
786 "policy. Applying the value in the adapter "\
788 queue_idx, nb_desc, enic->config.wq_desc_count);
789 } else if (nb_desc != enic->config.wq_desc_count) {
790 enic->config.wq_desc_count = nb_desc;
792 "TX Queues - effective number of descs:%d\n",
797 /* Allocate queue resources */
798 err = vnic_wq_alloc(enic->vdev, &enic->wq[queue_idx], queue_idx,
799 enic->config.wq_desc_count,
800 sizeof(struct wq_enet_desc));
802 dev_err(enic, "error in allocation of wq\n");
806 err = vnic_cq_alloc(enic->vdev, &enic->cq[cq_index], cq_index,
807 socket_id, enic->config.wq_desc_count,
808 sizeof(struct cq_enet_wq_desc));
811 dev_err(enic, "error in allocation of cq for wq\n");
814 /* setup up CQ message */
815 snprintf((char *)name, sizeof(name),
816 "vnic_cqmsg-%s-%d-%d", enic->bdf_name, queue_idx,
819 wq->cqmsg_rz = rte_memzone_reserve_aligned((const char *)name,
829 int enic_disable(struct enic *enic)
834 vnic_intr_mask(&enic->intr);
835 (void)vnic_intr_masked(&enic->intr); /* flush write */
836 rte_intr_disable(&enic->pdev->intr_handle);
837 rte_intr_callback_unregister(&enic->pdev->intr_handle,
839 (void *)enic->rte_dev);
841 vnic_dev_disable(enic->vdev);
843 enic_clsf_destroy(enic);
845 if (!enic_is_sriov_vf(enic))
846 vnic_dev_del_addr(enic->vdev, enic->mac_addr);
848 for (i = 0; i < enic->wq_count; i++) {
849 err = vnic_wq_disable(&enic->wq[i]);
853 for (i = 0; i < enic_vnic_rq_count(enic); i++) {
854 if (enic->rq[i].in_use) {
855 err = vnic_rq_disable(&enic->rq[i]);
861 /* If we were using interrupts, set the interrupt vector to -1
862 * to disable interrupts. We are not disabling link notifcations,
863 * though, as we want the polling of link status to continue working.
865 if (enic->rte_dev->data->dev_conf.intr_conf.lsc)
866 vnic_dev_notify_set(enic->vdev, -1);
868 vnic_dev_set_reset_flag(enic->vdev, 1);
870 for (i = 0; i < enic->wq_count; i++)
871 vnic_wq_clean(&enic->wq[i], enic_free_wq_buf);
873 for (i = 0; i < enic_vnic_rq_count(enic); i++)
874 if (enic->rq[i].in_use)
875 vnic_rq_clean(&enic->rq[i], enic_free_rq_buf);
876 for (i = 0; i < enic->cq_count; i++)
877 vnic_cq_clean(&enic->cq[i]);
878 vnic_intr_clean(&enic->intr);
883 static int enic_dev_wait(struct vnic_dev *vdev,
884 int (*start)(struct vnic_dev *, int),
885 int (*finished)(struct vnic_dev *, int *),
892 err = start(vdev, arg);
896 /* Wait for func to complete...2 seconds max */
897 for (i = 0; i < 2000; i++) {
898 err = finished(vdev, &done);
908 static int enic_dev_open(struct enic *enic)
912 err = enic_dev_wait(enic->vdev, vnic_dev_open,
913 vnic_dev_open_done, 0);
915 dev_err(enic_get_dev(enic),
916 "vNIC device open failed, err %d\n", err);
921 static int enic_set_rsskey(struct enic *enic)
923 dma_addr_t rss_key_buf_pa;
924 union vnic_rss_key *rss_key_buf_va = NULL;
925 static union vnic_rss_key rss_key = {
927 [0] = {.b = {85, 67, 83, 97, 119, 101, 115, 111, 109, 101}},
928 [1] = {.b = {80, 65, 76, 79, 117, 110, 105, 113, 117, 101}},
929 [2] = {.b = {76, 73, 78, 85, 88, 114, 111, 99, 107, 115}},
930 [3] = {.b = {69, 78, 73, 67, 105, 115, 99, 111, 111, 108}},
936 snprintf((char *)name, NAME_MAX, "rss_key-%s", enic->bdf_name);
937 rss_key_buf_va = enic_alloc_consistent(enic, sizeof(union vnic_rss_key),
938 &rss_key_buf_pa, name);
942 rte_memcpy(rss_key_buf_va, &rss_key, sizeof(union vnic_rss_key));
944 err = enic_set_rss_key(enic,
946 sizeof(union vnic_rss_key));
948 enic_free_consistent(enic, sizeof(union vnic_rss_key),
949 rss_key_buf_va, rss_key_buf_pa);
954 static int enic_set_rsscpu(struct enic *enic, u8 rss_hash_bits)
956 dma_addr_t rss_cpu_buf_pa;
957 union vnic_rss_cpu *rss_cpu_buf_va = NULL;
962 snprintf((char *)name, NAME_MAX, "rss_cpu-%s", enic->bdf_name);
963 rss_cpu_buf_va = enic_alloc_consistent(enic, sizeof(union vnic_rss_cpu),
964 &rss_cpu_buf_pa, name);
968 for (i = 0; i < (1 << rss_hash_bits); i++)
969 (*rss_cpu_buf_va).cpu[i / 4].b[i % 4] =
970 enic_rte_rq_idx_to_sop_idx(i % enic->rq_count);
972 err = enic_set_rss_cpu(enic,
974 sizeof(union vnic_rss_cpu));
976 enic_free_consistent(enic, sizeof(union vnic_rss_cpu),
977 rss_cpu_buf_va, rss_cpu_buf_pa);
982 static int enic_set_niccfg(struct enic *enic, u8 rss_default_cpu,
983 u8 rss_hash_type, u8 rss_hash_bits, u8 rss_base_cpu, u8 rss_enable)
985 const u8 tso_ipid_split_en = 0;
988 /* Enable VLAN tag stripping */
990 err = enic_set_nic_cfg(enic,
991 rss_default_cpu, rss_hash_type,
992 rss_hash_bits, rss_base_cpu,
993 rss_enable, tso_ipid_split_en,
994 enic->ig_vlan_strip_en);
999 int enic_set_rss_nic_cfg(struct enic *enic)
1001 const u8 rss_default_cpu = 0;
1002 const u8 rss_hash_type = NIC_CFG_RSS_HASH_TYPE_IPV4 |
1003 NIC_CFG_RSS_HASH_TYPE_TCP_IPV4 |
1004 NIC_CFG_RSS_HASH_TYPE_IPV6 |
1005 NIC_CFG_RSS_HASH_TYPE_TCP_IPV6;
1006 const u8 rss_hash_bits = 7;
1007 const u8 rss_base_cpu = 0;
1008 u8 rss_enable = ENIC_SETTING(enic, RSS) && (enic->rq_count > 1);
1011 if (!enic_set_rsskey(enic)) {
1012 if (enic_set_rsscpu(enic, rss_hash_bits)) {
1014 dev_warning(enic, "RSS disabled, "\
1015 "Failed to set RSS cpu indirection table.");
1020 "RSS disabled, Failed to set RSS key.\n");
1024 return enic_set_niccfg(enic, rss_default_cpu, rss_hash_type,
1025 rss_hash_bits, rss_base_cpu, rss_enable);
1028 int enic_setup_finish(struct enic *enic)
1032 enic_init_soft_stats(enic);
1034 ret = enic_set_rss_nic_cfg(enic);
1036 dev_err(enic, "Failed to config nic, aborting.\n");
1041 vnic_dev_packet_filter(enic->vdev,
1054 void enic_add_packet_filter(struct enic *enic)
1056 /* Args -> directed, multicast, broadcast, promisc, allmulti */
1057 vnic_dev_packet_filter(enic->vdev, 1, 1, 1,
1058 enic->promisc, enic->allmulti);
1061 int enic_get_link_status(struct enic *enic)
1063 return vnic_dev_link_status(enic->vdev);
1066 static void enic_dev_deinit(struct enic *enic)
1068 struct rte_eth_dev *eth_dev = enic->rte_dev;
1070 /* stop link status checking */
1071 vnic_dev_notify_unset(enic->vdev);
1073 rte_free(eth_dev->data->mac_addrs);
1077 int enic_set_vnic_res(struct enic *enic)
1079 struct rte_eth_dev *eth_dev = enic->rte_dev;
1082 /* With Rx scatter support, two RQs are now used per RQ used by
1085 if (enic->conf_rq_count < eth_dev->data->nb_rx_queues) {
1086 dev_err(dev, "Not enough Receive queues. Requested:%u which uses %d RQs on VIC, Configured:%u\n",
1087 eth_dev->data->nb_rx_queues,
1088 eth_dev->data->nb_rx_queues * 2, enic->conf_rq_count);
1091 if (enic->conf_wq_count < eth_dev->data->nb_tx_queues) {
1092 dev_err(dev, "Not enough Transmit queues. Requested:%u, Configured:%u\n",
1093 eth_dev->data->nb_tx_queues, enic->conf_wq_count);
1097 if (enic->conf_cq_count < (eth_dev->data->nb_rx_queues +
1098 eth_dev->data->nb_tx_queues)) {
1099 dev_err(dev, "Not enough Completion queues. Required:%u, Configured:%u\n",
1100 (eth_dev->data->nb_rx_queues +
1101 eth_dev->data->nb_tx_queues), enic->conf_cq_count);
1106 enic->rq_count = eth_dev->data->nb_rx_queues;
1107 enic->wq_count = eth_dev->data->nb_tx_queues;
1108 enic->cq_count = enic->rq_count + enic->wq_count;
1114 /* Initialize the completion queue for an RQ */
1116 enic_reinit_rq(struct enic *enic, unsigned int rq_idx)
1118 struct vnic_rq *sop_rq, *data_rq;
1119 unsigned int cq_idx = enic_cq_rq(enic, rq_idx);
1122 sop_rq = &enic->rq[enic_rte_rq_idx_to_sop_idx(rq_idx)];
1123 data_rq = &enic->rq[enic_rte_rq_idx_to_data_idx(rq_idx)];
1125 vnic_cq_clean(&enic->cq[cq_idx]);
1126 vnic_cq_init(&enic->cq[cq_idx],
1127 0 /* flow_control_enable */,
1128 1 /* color_enable */,
1131 1 /* cq_tail_color */,
1132 0 /* interrupt_enable */,
1133 1 /* cq_entry_enable */,
1134 0 /* cq_message_enable */,
1135 0 /* interrupt offset */,
1136 0 /* cq_message_addr */);
1139 vnic_rq_init_start(sop_rq, enic_cq_rq(enic,
1140 enic_rte_rq_idx_to_sop_idx(rq_idx)), 0,
1141 sop_rq->ring.desc_count - 1, 1, 0);
1142 if (data_rq->in_use) {
1143 vnic_rq_init_start(data_rq,
1145 enic_rte_rq_idx_to_data_idx(rq_idx)), 0,
1146 data_rq->ring.desc_count - 1, 1, 0);
1149 rc = enic_alloc_rx_queue_mbufs(enic, sop_rq);
1153 if (data_rq->in_use) {
1154 rc = enic_alloc_rx_queue_mbufs(enic, data_rq);
1156 enic_rxmbuf_queue_release(enic, sop_rq);
1164 /* The Cisco NIC can send and receive packets up to a max packet size
1165 * determined by the NIC type and firmware. There is also an MTU
1166 * configured into the NIC via the CIMC/UCSM management interface
1167 * which can be overridden by this function (up to the max packet size).
1168 * Depending on the network setup, doing so may cause packet drops
1169 * and unexpected behavior.
1171 int enic_set_mtu(struct enic *enic, uint16_t new_mtu)
1173 unsigned int rq_idx;
1176 uint16_t old_mtu; /* previous setting */
1177 uint16_t config_mtu; /* Value configured into NIC via CIMC/UCSM */
1178 struct rte_eth_dev *eth_dev = enic->rte_dev;
1180 old_mtu = eth_dev->data->mtu;
1181 config_mtu = enic->config.mtu;
1183 if (new_mtu > enic->max_mtu) {
1185 "MTU not updated: requested (%u) greater than max (%u)\n",
1186 new_mtu, enic->max_mtu);
1189 if (new_mtu < ENIC_MIN_MTU) {
1191 "MTU not updated: requested (%u) less than min (%u)\n",
1192 new_mtu, ENIC_MIN_MTU);
1195 if (new_mtu > config_mtu)
1197 "MTU (%u) is greater than value configured in NIC (%u)\n",
1198 new_mtu, config_mtu);
1200 /* The easy case is when scatter is disabled. However if the MTU
1201 * becomes greater than the mbuf data size, packet drops will ensue.
1203 if (!enic->rte_dev->data->dev_conf.rxmode.enable_scatter) {
1204 eth_dev->data->mtu = new_mtu;
1208 /* Rx scatter is enabled so reconfigure RQ's on the fly. The point is to
1209 * change Rx scatter mode if necessary for better performance. I.e. if
1210 * MTU was greater than the mbuf size and now it's less, scatter Rx
1211 * doesn't have to be used and vice versa.
1213 rte_spinlock_lock(&enic->mtu_lock);
1215 /* Stop traffic on all RQs */
1216 for (rq_idx = 0; rq_idx < enic->rq_count * 2; rq_idx++) {
1217 rq = &enic->rq[rq_idx];
1218 if (rq->is_sop && rq->in_use) {
1219 rc = enic_stop_rq(enic,
1220 enic_sop_rq_idx_to_rte_idx(rq_idx));
1222 dev_err(enic, "Failed to stop Rq %u\n", rq_idx);
1228 /* replace Rx funciton with a no-op to avoid getting stale pkts */
1229 eth_dev->rx_pkt_burst = enic_dummy_recv_pkts;
1232 /* Allow time for threads to exit the real Rx function. */
1235 /* now it is safe to reconfigure the RQs */
1237 /* update the mtu */
1238 eth_dev->data->mtu = new_mtu;
1240 /* free and reallocate RQs with the new MTU */
1241 for (rq_idx = 0; rq_idx < enic->rq_count; rq_idx++) {
1242 rq = &enic->rq[enic_rte_rq_idx_to_sop_idx(rq_idx)];
1245 rc = enic_alloc_rq(enic, rq_idx, rq->socket_id, rq->mp,
1246 rq->tot_nb_desc, rq->rx_free_thresh);
1249 "Fatal MTU alloc error- No traffic will pass\n");
1253 rc = enic_reinit_rq(enic, rq_idx);
1256 "Fatal MTU RQ reinit- No traffic will pass\n");
1261 /* put back the real receive function */
1263 eth_dev->rx_pkt_burst = enic_recv_pkts;
1266 /* restart Rx traffic */
1267 for (rq_idx = 0; rq_idx < enic->rq_count; rq_idx++) {
1268 rq = &enic->rq[enic_rte_rq_idx_to_sop_idx(rq_idx)];
1269 if (rq->is_sop && rq->in_use)
1270 enic_start_rq(enic, rq_idx);
1274 dev_info(enic, "MTU changed from %u to %u\n", old_mtu, new_mtu);
1275 rte_spinlock_unlock(&enic->mtu_lock);
1279 static int enic_dev_init(struct enic *enic)
1282 struct rte_eth_dev *eth_dev = enic->rte_dev;
1284 vnic_dev_intr_coal_timer_info_default(enic->vdev);
1286 /* Get vNIC configuration
1288 err = enic_get_vnic_config(enic);
1290 dev_err(dev, "Get vNIC configuration failed, aborting\n");
1294 /* Get available resource counts */
1295 enic_get_res_counts(enic);
1296 if (enic->conf_rq_count == 1) {
1297 dev_err(enic, "Running with only 1 RQ configured in the vNIC is not supported.\n");
1298 dev_err(enic, "Please configure 2 RQs in the vNIC for each Rx queue used by DPDK.\n");
1299 dev_err(enic, "See the ENIC PMD guide for more information.\n");
1303 /* Get the supported filters */
1304 enic_fdir_info(enic);
1306 eth_dev->data->mac_addrs = rte_zmalloc("enic_mac_addr", ETH_ALEN
1307 * ENIC_MAX_MAC_ADDR, 0);
1308 if (!eth_dev->data->mac_addrs) {
1309 dev_err(enic, "mac addr storage alloc failed, aborting.\n");
1312 ether_addr_copy((struct ether_addr *) enic->mac_addr,
1313 eth_dev->data->mac_addrs);
1315 vnic_dev_set_reset_flag(enic->vdev, 0);
1317 LIST_INIT(&enic->flows);
1318 rte_spinlock_init(&enic->flows_lock);
1320 /* set up link status checking */
1321 vnic_dev_notify_set(enic->vdev, -1); /* No Intr for notify */
1327 int enic_probe(struct enic *enic)
1329 struct rte_pci_device *pdev = enic->pdev;
1332 dev_debug(enic, " Initializing ENIC PMD\n");
1334 enic->bar0.vaddr = (void *)pdev->mem_resource[0].addr;
1335 enic->bar0.len = pdev->mem_resource[0].len;
1337 /* Register vNIC device */
1338 enic->vdev = vnic_dev_register(NULL, enic, enic->pdev, &enic->bar0, 1);
1340 dev_err(enic, "vNIC registration failed, aborting\n");
1344 LIST_INIT(&enic->memzone_list);
1345 rte_spinlock_init(&enic->memzone_list_lock);
1347 vnic_register_cbacks(enic->vdev,
1348 enic_alloc_consistent,
1349 enic_free_consistent);
1351 /* Issue device open to get device in known state */
1352 err = enic_dev_open(enic);
1354 dev_err(enic, "vNIC dev open failed, aborting\n");
1355 goto err_out_unregister;
1358 /* Set ingress vlan rewrite mode before vnic initialization */
1359 err = vnic_dev_set_ig_vlan_rewrite_mode(enic->vdev,
1360 IG_VLAN_REWRITE_MODE_PASS_THRU);
1363 "Failed to set ingress vlan rewrite mode, aborting.\n");
1364 goto err_out_dev_close;
1367 /* Issue device init to initialize the vnic-to-switch link.
1368 * We'll start with carrier off and wait for link UP
1369 * notification later to turn on carrier. We don't need
1370 * to wait here for the vnic-to-switch link initialization
1371 * to complete; link UP notification is the indication that
1372 * the process is complete.
1375 err = vnic_dev_init(enic->vdev, 0);
1377 dev_err(enic, "vNIC dev init failed, aborting\n");
1378 goto err_out_dev_close;
1381 err = enic_dev_init(enic);
1383 dev_err(enic, "Device initialization failed, aborting\n");
1384 goto err_out_dev_close;
1390 vnic_dev_close(enic->vdev);
1392 vnic_dev_unregister(enic->vdev);
1397 void enic_remove(struct enic *enic)
1399 enic_dev_deinit(enic);
1400 vnic_dev_close(enic->vdev);
1401 vnic_dev_unregister(enic->vdev);