drivers/net/hinic/hinic_pmd_ethdev.c

   1 /* SPDX-License-Identifier: BSD-3-Clause
   2  * Copyright(c) 2017 Huawei Technologies Co., Ltd
   3  */
   4
   5 #include <rte_pci.h>
   6 #include <rte_bus_pci.h>
   7 #include <rte_ethdev_pci.h>
   8 #include <rte_mbuf.h>
   9 #include <rte_malloc.h>
  10 #include <rte_memcpy.h>
  11 #include <rte_mempool.h>
  12 #include <rte_errno.h>
  13 #include <rte_ether.h>
  14
  15 #include "base/hinic_compat.h"
  16 #include "base/hinic_pmd_hwdev.h"
  17 #include "base/hinic_pmd_hwif.h"
  18 #include "base/hinic_pmd_wq.h"
  19 #include "base/hinic_pmd_cfg.h"
  20 #include "base/hinic_pmd_mgmt.h"
  21 #include "base/hinic_pmd_cmdq.h"
  22 #include "base/hinic_pmd_niccfg.h"
  23 #include "base/hinic_pmd_nicio.h"
  24 #include "base/hinic_pmd_mbox.h"
  25 #include "hinic_pmd_ethdev.h"
  26 #include "hinic_pmd_tx.h"
  27 #include "hinic_pmd_rx.h"
  28
  29 /* Vendor ID used by Huawei devices */
  30 #define HINIC_HUAWEI_VENDOR_ID          0x19E5
  31
  32 /* Hinic devices */
  33 #define HINIC_DEV_ID_PRD                0x1822
  34 #define HINIC_DEV_ID_VF                 0x375E
  35 #define HINIC_DEV_ID_VF_HV              0x379E
  36
  37 /* Mezz card for Blade Server */
  38 #define HINIC_DEV_ID_MEZZ_25GE          0x0210
  39 #define HINIC_DEV_ID_MEZZ_40GE          0x020D
  40 #define HINIC_DEV_ID_MEZZ_100GE         0x0205
  41
  42 /* 2*25G and 2*100G card */
  43 #define HINIC_DEV_ID_1822_DUAL_25GE     0x0206
  44 #define HINIC_DEV_ID_1822_100GE         0x0200
  45
  46 #define HINIC_SERVICE_MODE_NIC          2
  47
  48 #define HINIC_INTR_CB_UNREG_MAX_RETRIES 10
  49
  50 #define DEFAULT_BASE_COS                4
  51 #define NR_MAX_COS                      8
  52
  53 #define HINIC_MIN_RX_BUF_SIZE           1024
  54 #define HINIC_MAX_MAC_ADDRS             1
  55
  56 /*
  57  * vlan_id is a 12 bit number.
  58  * The VFTA array is actually a 4096 bit array, 128 of 32bit elements.
  59  * 2^5 = 32. The val of lower 5 bits specifies the bit in the 32bit element.
  60  * The higher 7 bit val specifies VFTA array index.
  61  */
  62 #define HINIC_VFTA_BIT(vlan_id)    (1 << ((vlan_id) & 0x1F))
  63 #define HINIC_VFTA_IDX(vlan_id)    ((vlan_id) >> 5)
  64
  65 #define HINIC_VLAN_FILTER_EN            (1U << 0)
  66
  67 /* Driver-specific log messages type */
  68 int hinic_logtype;
  69
  70 struct hinic_xstats_name_off {
  71         char name[RTE_ETH_XSTATS_NAME_SIZE];
  72         u32  offset;
  73 };
  74
  75 #define HINIC_FUNC_STAT(_stat_item) {   \
  76         .name = #_stat_item, \
  77         .offset = offsetof(struct hinic_vport_stats, _stat_item) \
  78 }
  79
  80 #define HINIC_PORT_STAT(_stat_item) { \
  81         .name = #_stat_item, \
  82         .offset = offsetof(struct hinic_phy_port_stats, _stat_item) \
  83 }
  84
  85 static const struct hinic_xstats_name_off hinic_vport_stats_strings[] = {
  86         HINIC_FUNC_STAT(tx_unicast_pkts_vport),
  87         HINIC_FUNC_STAT(tx_unicast_bytes_vport),
  88         HINIC_FUNC_STAT(tx_multicast_pkts_vport),
  89         HINIC_FUNC_STAT(tx_multicast_bytes_vport),
  90         HINIC_FUNC_STAT(tx_broadcast_pkts_vport),
  91         HINIC_FUNC_STAT(tx_broadcast_bytes_vport),
  92
  93         HINIC_FUNC_STAT(rx_unicast_pkts_vport),
  94         HINIC_FUNC_STAT(rx_unicast_bytes_vport),
  95         HINIC_FUNC_STAT(rx_multicast_pkts_vport),
  96         HINIC_FUNC_STAT(rx_multicast_bytes_vport),
  97         HINIC_FUNC_STAT(rx_broadcast_pkts_vport),
  98         HINIC_FUNC_STAT(rx_broadcast_bytes_vport),
  99
 100         HINIC_FUNC_STAT(tx_discard_vport),
 101         HINIC_FUNC_STAT(rx_discard_vport),
 102         HINIC_FUNC_STAT(tx_err_vport),
 103         HINIC_FUNC_STAT(rx_err_vport),
 104 };
 105
 106 #define HINIC_VPORT_XSTATS_NUM (sizeof(hinic_vport_stats_strings) / \
 107                 sizeof(hinic_vport_stats_strings[0]))
 108
 109 static const struct hinic_xstats_name_off hinic_phyport_stats_strings[] = {
 110         HINIC_PORT_STAT(mac_rx_total_pkt_num),
 111         HINIC_PORT_STAT(mac_rx_total_oct_num),
 112         HINIC_PORT_STAT(mac_rx_bad_pkt_num),
 113         HINIC_PORT_STAT(mac_rx_bad_oct_num),
 114         HINIC_PORT_STAT(mac_rx_good_pkt_num),
 115         HINIC_PORT_STAT(mac_rx_good_oct_num),
 116         HINIC_PORT_STAT(mac_rx_uni_pkt_num),
 117         HINIC_PORT_STAT(mac_rx_multi_pkt_num),
 118         HINIC_PORT_STAT(mac_rx_broad_pkt_num),
 119         HINIC_PORT_STAT(mac_tx_total_pkt_num),
 120         HINIC_PORT_STAT(mac_tx_total_oct_num),
 121         HINIC_PORT_STAT(mac_tx_bad_pkt_num),
 122         HINIC_PORT_STAT(mac_tx_bad_oct_num),
 123         HINIC_PORT_STAT(mac_tx_good_pkt_num),
 124         HINIC_PORT_STAT(mac_tx_good_oct_num),
 125         HINIC_PORT_STAT(mac_tx_uni_pkt_num),
 126         HINIC_PORT_STAT(mac_tx_multi_pkt_num),
 127         HINIC_PORT_STAT(mac_tx_broad_pkt_num),
 128         HINIC_PORT_STAT(mac_rx_fragment_pkt_num),
 129         HINIC_PORT_STAT(mac_rx_undersize_pkt_num),
 130         HINIC_PORT_STAT(mac_rx_undermin_pkt_num),
 131         HINIC_PORT_STAT(mac_rx_64_oct_pkt_num),
 132         HINIC_PORT_STAT(mac_rx_65_127_oct_pkt_num),
 133         HINIC_PORT_STAT(mac_rx_128_255_oct_pkt_num),
 134         HINIC_PORT_STAT(mac_rx_256_511_oct_pkt_num),
 135         HINIC_PORT_STAT(mac_rx_512_1023_oct_pkt_num),
 136         HINIC_PORT_STAT(mac_rx_1024_1518_oct_pkt_num),
 137         HINIC_PORT_STAT(mac_rx_1519_2047_oct_pkt_num),
 138         HINIC_PORT_STAT(mac_rx_2048_4095_oct_pkt_num),
 139         HINIC_PORT_STAT(mac_rx_4096_8191_oct_pkt_num),
 140         HINIC_PORT_STAT(mac_rx_8192_9216_oct_pkt_num),
 141         HINIC_PORT_STAT(mac_rx_9217_12287_oct_pkt_num),
 142         HINIC_PORT_STAT(mac_rx_12288_16383_oct_pkt_num),
 143         HINIC_PORT_STAT(mac_rx_1519_max_bad_pkt_num),
 144         HINIC_PORT_STAT(mac_rx_1519_max_good_pkt_num),
 145         HINIC_PORT_STAT(mac_rx_oversize_pkt_num),
 146         HINIC_PORT_STAT(mac_rx_jabber_pkt_num),
 147         HINIC_PORT_STAT(mac_rx_mac_pause_num),
 148         HINIC_PORT_STAT(mac_rx_pfc_pkt_num),
 149         HINIC_PORT_STAT(mac_rx_pfc_pri0_pkt_num),
 150         HINIC_PORT_STAT(mac_rx_pfc_pri1_pkt_num),
 151         HINIC_PORT_STAT(mac_rx_pfc_pri2_pkt_num),
 152         HINIC_PORT_STAT(mac_rx_pfc_pri3_pkt_num),
 153         HINIC_PORT_STAT(mac_rx_pfc_pri4_pkt_num),
 154         HINIC_PORT_STAT(mac_rx_pfc_pri5_pkt_num),
 155         HINIC_PORT_STAT(mac_rx_pfc_pri6_pkt_num),
 156         HINIC_PORT_STAT(mac_rx_pfc_pri7_pkt_num),
 157         HINIC_PORT_STAT(mac_rx_mac_control_pkt_num),
 158         HINIC_PORT_STAT(mac_rx_sym_err_pkt_num),
 159         HINIC_PORT_STAT(mac_rx_fcs_err_pkt_num),
 160         HINIC_PORT_STAT(mac_rx_send_app_good_pkt_num),
 161         HINIC_PORT_STAT(mac_rx_send_app_bad_pkt_num),
 162         HINIC_PORT_STAT(mac_tx_fragment_pkt_num),
 163         HINIC_PORT_STAT(mac_tx_undersize_pkt_num),
 164         HINIC_PORT_STAT(mac_tx_undermin_pkt_num),
 165         HINIC_PORT_STAT(mac_tx_64_oct_pkt_num),
 166         HINIC_PORT_STAT(mac_tx_65_127_oct_pkt_num),
 167         HINIC_PORT_STAT(mac_tx_128_255_oct_pkt_num),
 168         HINIC_PORT_STAT(mac_tx_256_511_oct_pkt_num),
 169         HINIC_PORT_STAT(mac_tx_512_1023_oct_pkt_num),
 170         HINIC_PORT_STAT(mac_tx_1024_1518_oct_pkt_num),
 171         HINIC_PORT_STAT(mac_tx_1519_2047_oct_pkt_num),
 172         HINIC_PORT_STAT(mac_tx_2048_4095_oct_pkt_num),
 173         HINIC_PORT_STAT(mac_tx_4096_8191_oct_pkt_num),
 174         HINIC_PORT_STAT(mac_tx_8192_9216_oct_pkt_num),
 175         HINIC_PORT_STAT(mac_tx_9217_12287_oct_pkt_num),
 176         HINIC_PORT_STAT(mac_tx_12288_16383_oct_pkt_num),
 177         HINIC_PORT_STAT(mac_tx_1519_max_bad_pkt_num),
 178         HINIC_PORT_STAT(mac_tx_1519_max_good_pkt_num),
 179         HINIC_PORT_STAT(mac_tx_oversize_pkt_num),
 180         HINIC_PORT_STAT(mac_trans_jabber_pkt_num),
 181         HINIC_PORT_STAT(mac_tx_mac_pause_num),
 182         HINIC_PORT_STAT(mac_tx_pfc_pkt_num),
 183         HINIC_PORT_STAT(mac_tx_pfc_pri0_pkt_num),
 184         HINIC_PORT_STAT(mac_tx_pfc_pri1_pkt_num),
 185         HINIC_PORT_STAT(mac_tx_pfc_pri2_pkt_num),
 186         HINIC_PORT_STAT(mac_tx_pfc_pri3_pkt_num),
 187         HINIC_PORT_STAT(mac_tx_pfc_pri4_pkt_num),
 188         HINIC_PORT_STAT(mac_tx_pfc_pri5_pkt_num),
 189         HINIC_PORT_STAT(mac_tx_pfc_pri6_pkt_num),
 190         HINIC_PORT_STAT(mac_tx_pfc_pri7_pkt_num),
 191         HINIC_PORT_STAT(mac_tx_mac_control_pkt_num),
 192         HINIC_PORT_STAT(mac_tx_err_all_pkt_num),
 193         HINIC_PORT_STAT(mac_tx_from_app_good_pkt_num),
 194         HINIC_PORT_STAT(mac_tx_from_app_bad_pkt_num),
 195 };
 196
 197 #define HINIC_PHYPORT_XSTATS_NUM (sizeof(hinic_phyport_stats_strings) / \
 198                 sizeof(hinic_phyport_stats_strings[0]))
 199
 200 static const struct hinic_xstats_name_off hinic_rxq_stats_strings[] = {
 201         {"rx_nombuf", offsetof(struct hinic_rxq_stats, rx_nombuf)},
 202         {"burst_pkt", offsetof(struct hinic_rxq_stats, burst_pkts)},
 203 };
 204
 205 #define HINIC_RXQ_XSTATS_NUM (sizeof(hinic_rxq_stats_strings) / \
 206                 sizeof(hinic_rxq_stats_strings[0]))
 207
 208 static const struct hinic_xstats_name_off hinic_txq_stats_strings[] = {
 209         {"tx_busy", offsetof(struct hinic_txq_stats, tx_busy)},
 210         {"offload_errors", offsetof(struct hinic_txq_stats, off_errs)},
 211         {"copy_pkts", offsetof(struct hinic_txq_stats, cpy_pkts)},
 212         {"rl_drop", offsetof(struct hinic_txq_stats, rl_drop)},
 213         {"burst_pkts", offsetof(struct hinic_txq_stats, burst_pkts)},
 214 };
 215
 216 #define HINIC_TXQ_XSTATS_NUM (sizeof(hinic_txq_stats_strings) / \
 217                 sizeof(hinic_txq_stats_strings[0]))
 218
 219 static int hinic_xstats_calc_num(struct hinic_nic_dev *nic_dev)
 220 {
 221         if (HINIC_IS_VF(nic_dev->hwdev)) {
 222                 return (HINIC_VPORT_XSTATS_NUM +
 223                         HINIC_RXQ_XSTATS_NUM * nic_dev->num_rq +
 224                         HINIC_TXQ_XSTATS_NUM * nic_dev->num_sq);
 225         } else {
 226                 return (HINIC_VPORT_XSTATS_NUM +
 227                         HINIC_PHYPORT_XSTATS_NUM +
 228                         HINIC_RXQ_XSTATS_NUM * nic_dev->num_rq +
 229                         HINIC_TXQ_XSTATS_NUM * nic_dev->num_sq);
 230         }
 231 }
 232
 233 static const struct rte_eth_desc_lim hinic_rx_desc_lim = {
 234         .nb_max = HINIC_MAX_QUEUE_DEPTH,
 235         .nb_min = HINIC_MIN_QUEUE_DEPTH,
 236         .nb_align = HINIC_RXD_ALIGN,
 237 };
 238
 239 static const struct rte_eth_desc_lim hinic_tx_desc_lim = {
 240         .nb_max = HINIC_MAX_QUEUE_DEPTH,
 241         .nb_min = HINIC_MIN_QUEUE_DEPTH,
 242         .nb_align = HINIC_TXD_ALIGN,
 243 };
 244
 245 static int hinic_vlan_offload_set(struct rte_eth_dev *dev, int mask);
 246
 247 /**
 248  * Interrupt handler triggered by NIC  for handling
 249  * specific event.
 250  *
 251  * @param: The address of parameter (struct rte_eth_dev *) regsitered before.
 252  **/
 253 static void hinic_dev_interrupt_handler(void *param)
 254 {
 255         struct rte_eth_dev *dev = param;
 256         struct hinic_nic_dev *nic_dev = HINIC_ETH_DEV_TO_PRIVATE_NIC_DEV(dev);
 257
 258         if (!hinic_test_bit(HINIC_DEV_INTR_EN, &nic_dev->dev_status)) {
 259                 PMD_DRV_LOG(WARNING, "Device's interrupt is disabled, ignore interrupt event, dev_name: %s, port_id: %d",
 260                             nic_dev->proc_dev_name, dev->data->port_id);
 261                 return;
 262         }
 263
 264         /* aeq0 msg handler */
 265         hinic_dev_handle_aeq_event(nic_dev->hwdev, param);
 266 }
 267
 268 /**
 269  * Ethernet device configuration.
 270  *
 271  * Prepare the driver for a given number of TX and RX queues, mtu size
 272  * and configure RSS.
 273  *
 274  * @param dev
 275  *   Pointer to Ethernet device structure.
 276  *
 277  * @return
 278  *   0 on success, negative error value otherwise.
 279  */
 280 static int hinic_dev_configure(struct rte_eth_dev *dev)
 281 {
 282         struct hinic_nic_dev *nic_dev;
 283         struct hinic_nic_io *nic_io;
 284         int err;
 285
 286         nic_dev = HINIC_ETH_DEV_TO_PRIVATE_NIC_DEV(dev);
 287         nic_io = nic_dev->hwdev->nic_io;
 288
 289         nic_dev->num_sq =  dev->data->nb_tx_queues;
 290         nic_dev->num_rq = dev->data->nb_rx_queues;
 291
 292         nic_io->num_sqs =  dev->data->nb_tx_queues;
 293         nic_io->num_rqs = dev->data->nb_rx_queues;
 294
 295         /* queue pair is max_num(sq, rq) */
 296         nic_dev->num_qps = (nic_dev->num_sq > nic_dev->num_rq) ?
 297                         nic_dev->num_sq : nic_dev->num_rq;
 298         nic_io->num_qps = nic_dev->num_qps;
 299
 300         if (nic_dev->num_qps > nic_io->max_qps) {
 301                 PMD_DRV_LOG(ERR,
 302                         "Queue number out of range, get queue_num:%d, max_queue_num:%d",
 303                         nic_dev->num_qps, nic_io->max_qps);
 304                 return -EINVAL;
 305         }
 306
 307         /* mtu size is 256~9600 */
 308         if (dev->data->dev_conf.rxmode.max_rx_pkt_len < HINIC_MIN_FRAME_SIZE ||
 309             dev->data->dev_conf.rxmode.max_rx_pkt_len >
 310             HINIC_MAX_JUMBO_FRAME_SIZE) {
 311                 PMD_DRV_LOG(ERR,
 312                         "Max rx pkt len out of range, get max_rx_pkt_len:%d, "
 313                         "expect between %d and %d",
 314                         dev->data->dev_conf.rxmode.max_rx_pkt_len,
 315                         HINIC_MIN_FRAME_SIZE, HINIC_MAX_JUMBO_FRAME_SIZE);
 316                 return -EINVAL;
 317         }
 318
 319         nic_dev->mtu_size =
 320                 HINIC_PKTLEN_TO_MTU(dev->data->dev_conf.rxmode.max_rx_pkt_len);
 321
 322         /* rss template */
 323         err = hinic_config_mq_mode(dev, TRUE);
 324         if (err) {
 325                 PMD_DRV_LOG(ERR, "Config multi-queue failed");
 326                 return err;
 327         }
 328
 329         /* init vlan offoad */
 330         err = hinic_vlan_offload_set(dev,
 331                                 ETH_VLAN_STRIP_MASK | ETH_VLAN_FILTER_MASK);
 332         if (err) {
 333                 PMD_DRV_LOG(ERR, "Initialize vlan filter and strip failed\n");
 334                 (void)hinic_config_mq_mode(dev, FALSE);
 335                 return err;
 336         }
 337
 338         return HINIC_OK;
 339 }
 340
 341 /**
 342  * DPDK callback to create the receive queue.
 343  *
 344  * @param dev
 345  *   Pointer to Ethernet device structure.
 346  * @param queue_idx
 347  *   RX queue index.
 348  * @param nb_desc
 349  *   Number of descriptors for receive queue.
 350  * @param socket_id
 351  *   NUMA socket on which memory must be allocated.
 352  * @param rx_conf
 353  *   Thresholds parameters (unused_).
 354  * @param mp
 355  *   Memory pool for buffer allocations.
 356  *
 357  * @return
 358  *   0 on success, negative error value otherwise.
 359  */
 360 static int hinic_rx_queue_setup(struct rte_eth_dev *dev, uint16_t queue_idx,
 361                          uint16_t nb_desc, unsigned int socket_id,
 362                          __rte_unused const struct rte_eth_rxconf *rx_conf,
 363                          struct rte_mempool *mp)
 364 {
 365         int rc;
 366         struct hinic_nic_dev *nic_dev;
 367         struct hinic_hwdev *hwdev;
 368         struct hinic_rxq *rxq;
 369         u16 rq_depth, rx_free_thresh;
 370         u32 buf_size;
 371
 372         nic_dev = HINIC_ETH_DEV_TO_PRIVATE_NIC_DEV(dev);
 373         hwdev = nic_dev->hwdev;
 374
 375         /* queue depth must be power of 2, otherwise will be aligned up */
 376         rq_depth = (nb_desc & (nb_desc - 1)) ?
 377                 ((u16)(1U << (ilog2(nb_desc) + 1))) : nb_desc;
 378
 379         /*
 380          * Validate number of receive descriptors.
 381          * It must not exceed hardware maximum and minimum.
 382          */
 383         if (rq_depth > HINIC_MAX_QUEUE_DEPTH ||
 384                 rq_depth < HINIC_MIN_QUEUE_DEPTH) {
 385                 PMD_DRV_LOG(ERR, "RX queue depth is out of range from %d to %d, (nb_desc=%d, q_depth=%d, port=%d queue=%d)",
 386                             HINIC_MIN_QUEUE_DEPTH, HINIC_MAX_QUEUE_DEPTH,
 387                             (int)nb_desc, (int)rq_depth,
 388                             (int)dev->data->port_id, (int)queue_idx);
 389                 return -EINVAL;
 390         }
 391
 392         /*
 393          * The RX descriptor ring will be cleaned after rxq->rx_free_thresh
 394          * descriptors are used or if the number of descriptors required
 395          * to transmit a packet is greater than the number of free RX
 396          * descriptors.
 397          * The following constraints must be satisfied:
 398          *  rx_free_thresh must be greater than 0.
 399          *  rx_free_thresh must be less than the size of the ring minus 1.
 400          * When set to zero use default values.
 401          */
 402         rx_free_thresh = (u16)((rx_conf->rx_free_thresh) ?
 403                         rx_conf->rx_free_thresh : HINIC_DEFAULT_RX_FREE_THRESH);
 404         if (rx_free_thresh >= (rq_depth - 1)) {
 405                 PMD_DRV_LOG(ERR, "rx_free_thresh must be less than the number of RX descriptors minus 1. (rx_free_thresh=%u port=%d queue=%d)",
 406                             (unsigned int)rx_free_thresh,
 407                             (int)dev->data->port_id,
 408                             (int)queue_idx);
 409                 return -EINVAL;
 410         }
 411
 412         rxq = rte_zmalloc_socket("hinic_rx_queue", sizeof(struct hinic_rxq),
 413                                  RTE_CACHE_LINE_SIZE, socket_id);
 414         if (!rxq) {
 415                 PMD_DRV_LOG(ERR, "Allocate rxq[%d] failed, dev_name: %s",
 416                             queue_idx, dev->data->name);
 417                 return -ENOMEM;
 418         }
 419         nic_dev->rxqs[queue_idx] = rxq;
 420
 421         /* alloc rx sq hw wqepage*/
 422         rc = hinic_create_rq(hwdev, queue_idx, rq_depth);
 423         if (rc) {
 424                 PMD_DRV_LOG(ERR, "Create rxq[%d] failed, dev_name: %s, rq_depth: %d",
 425                             queue_idx, dev->data->name, rq_depth);
 426                 goto ceate_rq_fail;
 427         }
 428
 429         /* mbuf pool must be assigned before setup rx resources */
 430         rxq->mb_pool = mp;
 431
 432         rc =
 433         hinic_convert_rx_buf_size(rte_pktmbuf_data_room_size(rxq->mb_pool) -
 434                                   RTE_PKTMBUF_HEADROOM, &buf_size);
 435         if (rc) {
 436                 PMD_DRV_LOG(ERR, "Adjust buf size failed, dev_name: %s",
 437                             dev->data->name);
 438                 goto adjust_bufsize_fail;
 439         }
 440
 441         /* rx queue info, rearm control */
 442         rxq->wq = &hwdev->nic_io->rq_wq[queue_idx];
 443         rxq->pi_virt_addr = hwdev->nic_io->qps[queue_idx].rq.pi_virt_addr;
 444         rxq->nic_dev = nic_dev;
 445         rxq->q_id = queue_idx;
 446         rxq->q_depth = rq_depth;
 447         rxq->buf_len = (u16)buf_size;
 448         rxq->rx_free_thresh = rx_free_thresh;
 449
 450         /* the last point cant do mbuf rearm in bulk */
 451         rxq->rxinfo_align_end = rxq->q_depth - rxq->rx_free_thresh;
 452
 453         /* device port identifier */
 454         rxq->port_id = dev->data->port_id;
 455
 456         /* alloc rx_cqe and prepare rq_wqe */
 457         rc = hinic_setup_rx_resources(rxq);
 458         if (rc) {
 459                 PMD_DRV_LOG(ERR, "Setup rxq[%d] rx_resources failed, dev_name:%s",
 460                             queue_idx, dev->data->name);
 461                 goto setup_rx_res_err;
 462         }
 463
 464         /* record nic_dev rxq in rte_eth rx_queues */
 465         dev->data->rx_queues[queue_idx] = rxq;
 466
 467         return 0;
 468
 469 setup_rx_res_err:
 470 adjust_bufsize_fail:
 471         hinic_destroy_rq(hwdev, queue_idx);
 472
 473 ceate_rq_fail:
 474         rte_free(rxq);
 475
 476         return rc;
 477 }
 478
 479 static void hinic_reset_rx_queue(struct rte_eth_dev *dev)
 480 {
 481         struct hinic_rxq *rxq;
 482         struct hinic_nic_dev *nic_dev;
 483         int q_id = 0;
 484
 485         nic_dev = HINIC_ETH_DEV_TO_PRIVATE_NIC_DEV(dev);
 486
 487         for (q_id = 0; q_id < nic_dev->num_rq; q_id++) {
 488                 rxq = dev->data->rx_queues[q_id];
 489
 490                 rxq->wq->cons_idx = 0;
 491                 rxq->wq->prod_idx = 0;
 492                 rxq->wq->delta = rxq->q_depth;
 493                 rxq->wq->mask = rxq->q_depth - 1;
 494
 495                 /* alloc mbuf to rq */
 496                 hinic_rx_alloc_pkts(rxq);
 497         }
 498 }
 499
 500 /**
 501  * DPDK callback to configure the transmit queue.
 502  *
 503  * @param dev
 504  *   Pointer to Ethernet device structure.
 505  * @param queue_idx
 506  *   Transmit queue index.
 507  * @param nb_desc
 508  *   Number of descriptors for transmit queue.
 509  * @param socket_id
 510  *   NUMA socket on which memory must be allocated.
 511  * @param tx_conf
 512  *   Tx queue configuration parameters.
 513  *
 514  * @return
 515  *   0 on success, negative error value otherwise.
 516  */
 517 static int hinic_tx_queue_setup(struct rte_eth_dev *dev, uint16_t queue_idx,
 518                          uint16_t nb_desc, unsigned int socket_id,
 519                          __rte_unused const struct rte_eth_txconf *tx_conf)
 520 {
 521         int rc;
 522         struct hinic_nic_dev *nic_dev;
 523         struct hinic_hwdev *hwdev;
 524         struct hinic_txq *txq;
 525         u16 sq_depth, tx_free_thresh;
 526
 527         nic_dev = HINIC_ETH_DEV_TO_PRIVATE_NIC_DEV(dev);
 528         hwdev = nic_dev->hwdev;
 529
 530         /* queue depth must be power of 2, otherwise will be aligned up */
 531         sq_depth = (nb_desc & (nb_desc - 1)) ?
 532                         ((u16)(1U << (ilog2(nb_desc) + 1))) : nb_desc;
 533
 534         /*
 535          * Validate number of transmit descriptors.
 536          * It must not exceed hardware maximum and minimum.
 537          */
 538         if (sq_depth > HINIC_MAX_QUEUE_DEPTH ||
 539                 sq_depth < HINIC_MIN_QUEUE_DEPTH) {
 540                 PMD_DRV_LOG(ERR, "TX queue depth is out of range from %d to %d, (nb_desc=%d, q_depth=%d, port=%d queue=%d)",
 541                           HINIC_MIN_QUEUE_DEPTH, HINIC_MAX_QUEUE_DEPTH,
 542                           (int)nb_desc, (int)sq_depth,
 543                           (int)dev->data->port_id, (int)queue_idx);
 544                 return -EINVAL;
 545         }
 546
 547         /*
 548          * The TX descriptor ring will be cleaned after txq->tx_free_thresh
 549          * descriptors are used or if the number of descriptors required
 550          * to transmit a packet is greater than the number of free TX
 551          * descriptors.
 552          * The following constraints must be satisfied:
 553          *  tx_free_thresh must be greater than 0.
 554          *  tx_free_thresh must be less than the size of the ring minus 1.
 555          * When set to zero use default values.
 556          */
 557         tx_free_thresh = (u16)((tx_conf->tx_free_thresh) ?
 558                         tx_conf->tx_free_thresh : HINIC_DEFAULT_TX_FREE_THRESH);
 559         if (tx_free_thresh >= (sq_depth - 1)) {
 560                 PMD_DRV_LOG(ERR, "tx_free_thresh must be less than the number of TX descriptors minus 1. (tx_free_thresh=%u port=%d queue=%d)",
 561                         (unsigned int)tx_free_thresh, (int)dev->data->port_id,
 562                         (int)queue_idx);
 563                 return -EINVAL;
 564         }
 565
 566         txq = rte_zmalloc_socket("hinic_tx_queue", sizeof(struct hinic_txq),
 567                                  RTE_CACHE_LINE_SIZE, socket_id);
 568         if (!txq) {
 569                 PMD_DRV_LOG(ERR, "Allocate txq[%d] failed, dev_name: %s",
 570                             queue_idx, dev->data->name);
 571                 return -ENOMEM;
 572         }
 573         nic_dev->txqs[queue_idx] = txq;
 574
 575         /* alloc tx sq hw wqepage */
 576         rc = hinic_create_sq(hwdev, queue_idx, sq_depth);
 577         if (rc) {
 578                 PMD_DRV_LOG(ERR, "Create txq[%d] failed, dev_name: %s, sq_depth: %d",
 579                             queue_idx, dev->data->name, sq_depth);
 580                 goto create_sq_fail;
 581         }
 582
 583         txq->q_id = queue_idx;
 584         txq->q_depth = sq_depth;
 585         txq->port_id = dev->data->port_id;
 586         txq->tx_free_thresh = tx_free_thresh;
 587         txq->nic_dev = nic_dev;
 588         txq->wq = &hwdev->nic_io->sq_wq[queue_idx];
 589         txq->sq = &hwdev->nic_io->qps[queue_idx].sq;
 590         txq->cons_idx_addr = hwdev->nic_io->qps[queue_idx].sq.cons_idx_addr;
 591         txq->sq_head_addr = HINIC_GET_WQ_HEAD(txq);
 592         txq->sq_bot_sge_addr = HINIC_GET_WQ_TAIL(txq) -
 593                                         sizeof(struct hinic_sq_bufdesc);
 594         txq->cos = nic_dev->default_cos;
 595
 596         /* alloc software txinfo */
 597         rc = hinic_setup_tx_resources(txq);
 598         if (rc) {
 599                 PMD_DRV_LOG(ERR, "Setup txq[%d] tx_resources failed, dev_name: %s",
 600                             queue_idx, dev->data->name);
 601                 goto setup_tx_res_fail;
 602         }
 603
 604         /* record nic_dev txq in rte_eth tx_queues */
 605         dev->data->tx_queues[queue_idx] = txq;
 606
 607         return HINIC_OK;
 608
 609 setup_tx_res_fail:
 610         hinic_destroy_sq(hwdev, queue_idx);
 611
 612 create_sq_fail:
 613         rte_free(txq);
 614
 615         return rc;
 616 }
 617
 618 static void hinic_reset_tx_queue(struct rte_eth_dev *dev)
 619 {
 620         struct hinic_nic_dev *nic_dev;
 621         struct hinic_txq *txq;
 622         struct hinic_nic_io *nic_io;
 623         struct hinic_hwdev *hwdev;
 624         volatile u32 *ci_addr;
 625         int q_id = 0;
 626
 627         nic_dev = HINIC_ETH_DEV_TO_PRIVATE_NIC_DEV(dev);
 628         hwdev = nic_dev->hwdev;
 629         nic_io = hwdev->nic_io;
 630
 631         for (q_id = 0; q_id < nic_dev->num_sq; q_id++) {
 632                 txq = dev->data->tx_queues[q_id];
 633
 634                 txq->wq->cons_idx = 0;
 635                 txq->wq->prod_idx = 0;
 636                 txq->wq->delta = txq->q_depth;
 637                 txq->wq->mask  = txq->q_depth - 1;
 638
 639                 /* clear hardware ci */
 640                 ci_addr = (volatile u32 *)HINIC_CI_VADDR(nic_io->ci_vaddr_base,
 641                                                         q_id);
 642                 *ci_addr = 0;
 643         }
 644 }
 645
 646 /**
 647  * Get link speed from NIC.
 648  *
 649  * @param dev
 650  *   Pointer to Ethernet device structure.
 651  * @param speed_capa
 652  *   Pointer to link speed structure.
 653  */
 654 static void hinic_get_speed_capa(struct rte_eth_dev *dev, uint32_t *speed_capa)
 655 {
 656         struct hinic_nic_dev *nic_dev = HINIC_ETH_DEV_TO_PRIVATE_NIC_DEV(dev);
 657         u32 supported_link, advertised_link;
 658         int err;
 659
 660 #define HINIC_LINK_MODE_SUPPORT_1G      (1U << HINIC_GE_BASE_KX)
 661
 662 #define HINIC_LINK_MODE_SUPPORT_10G     (1U << HINIC_10GE_BASE_KR)
 663
 664 #define HINIC_LINK_MODE_SUPPORT_25G     ((1U << HINIC_25GE_BASE_KR_S) | \
 665                                         (1U << HINIC_25GE_BASE_CR_S) | \
 666                                         (1U << HINIC_25GE_BASE_KR) | \
 667                                         (1U << HINIC_25GE_BASE_CR))
 668
 669 #define HINIC_LINK_MODE_SUPPORT_40G     ((1U << HINIC_40GE_BASE_KR4) | \
 670                                         (1U << HINIC_40GE_BASE_CR4))
 671
 672 #define HINIC_LINK_MODE_SUPPORT_100G    ((1U << HINIC_100GE_BASE_KR4) | \
 673                                         (1U << HINIC_100GE_BASE_CR4))
 674
 675         err = hinic_get_link_mode(nic_dev->hwdev,
 676                                   &supported_link, &advertised_link);
 677         if (err || supported_link == HINIC_SUPPORTED_UNKNOWN ||
 678             advertised_link == HINIC_SUPPORTED_UNKNOWN) {
 679                 PMD_DRV_LOG(WARNING, "Get speed capability info failed, device: %s, port_id: %u",
 680                           nic_dev->proc_dev_name, dev->data->port_id);
 681         } else {
 682                 *speed_capa = 0;
 683                 if (!!(supported_link & HINIC_LINK_MODE_SUPPORT_1G))
 684                         *speed_capa |= ETH_LINK_SPEED_1G;
 685                 if (!!(supported_link & HINIC_LINK_MODE_SUPPORT_10G))
 686                         *speed_capa |= ETH_LINK_SPEED_10G;
 687                 if (!!(supported_link & HINIC_LINK_MODE_SUPPORT_25G))
 688                         *speed_capa |= ETH_LINK_SPEED_25G;
 689                 if (!!(supported_link & HINIC_LINK_MODE_SUPPORT_40G))
 690                         *speed_capa |= ETH_LINK_SPEED_40G;
 691                 if (!!(supported_link & HINIC_LINK_MODE_SUPPORT_100G))
 692                         *speed_capa |= ETH_LINK_SPEED_100G;
 693         }
 694 }
 695
 696 /**
 697  * DPDK callback to get information about the device.
 698  *
 699  * @param dev
 700  *   Pointer to Ethernet device structure.
 701  * @param info
 702  *   Pointer to Info structure output buffer.
 703  */
 704 static int
 705 hinic_dev_infos_get(struct rte_eth_dev *dev, struct rte_eth_dev_info *info)
 706 {
 707         struct hinic_nic_dev *nic_dev = HINIC_ETH_DEV_TO_PRIVATE_NIC_DEV(dev);
 708
 709         info->max_rx_queues  = nic_dev->nic_cap.max_rqs;
 710         info->max_tx_queues  = nic_dev->nic_cap.max_sqs;
 711         info->min_rx_bufsize = HINIC_MIN_RX_BUF_SIZE;
 712         info->max_rx_pktlen  = HINIC_MAX_JUMBO_FRAME_SIZE;
 713         info->max_mac_addrs  = HINIC_MAX_MAC_ADDRS;
 714
 715         hinic_get_speed_capa(dev, &info->speed_capa);
 716         info->rx_queue_offload_capa = 0;
 717         info->rx_offload_capa = DEV_RX_OFFLOAD_VLAN_STRIP |
 718                                 DEV_RX_OFFLOAD_IPV4_CKSUM |
 719                                 DEV_RX_OFFLOAD_UDP_CKSUM |
 720                                 DEV_RX_OFFLOAD_TCP_CKSUM |
 721                                 DEV_RX_OFFLOAD_VLAN_FILTER;
 722
 723         info->tx_queue_offload_capa = 0;
 724         info->tx_offload_capa = DEV_TX_OFFLOAD_VLAN_INSERT |
 725                                 DEV_TX_OFFLOAD_IPV4_CKSUM |
 726                                 DEV_TX_OFFLOAD_UDP_CKSUM |
 727                                 DEV_TX_OFFLOAD_TCP_CKSUM |
 728                                 DEV_TX_OFFLOAD_SCTP_CKSUM |
 729                                 DEV_TX_OFFLOAD_OUTER_IPV4_CKSUM |
 730                                 DEV_TX_OFFLOAD_TCP_TSO |
 731                                 DEV_TX_OFFLOAD_MULTI_SEGS;
 732
 733         info->hash_key_size = HINIC_RSS_KEY_SIZE;
 734         info->reta_size = HINIC_RSS_INDIR_SIZE;
 735         info->flow_type_rss_offloads = HINIC_RSS_OFFLOAD_ALL;
 736         info->rx_desc_lim = hinic_rx_desc_lim;
 737         info->tx_desc_lim = hinic_tx_desc_lim;
 738
 739         return 0;
 740 }
 741
 742 static int hinic_config_rx_mode(struct hinic_nic_dev *nic_dev, u32 rx_mode_ctrl)
 743 {
 744         int err;
 745
 746         err = hinic_set_rx_mode(nic_dev->hwdev, rx_mode_ctrl);
 747         if (err) {
 748                 PMD_DRV_LOG(ERR, "Failed to set rx mode");
 749                 return -EINVAL;
 750         }
 751         nic_dev->rx_mode_status = rx_mode_ctrl;
 752
 753         return 0;
 754 }
 755
 756
 757 static int hinic_rxtx_configure(struct rte_eth_dev *dev)
 758 {
 759         int err;
 760         struct hinic_nic_dev *nic_dev = HINIC_ETH_DEV_TO_PRIVATE_NIC_DEV(dev);
 761
 762         /* rx configure, if rss enable, need to init default configuration */
 763         err = hinic_rx_configure(dev);
 764         if (err) {
 765                 PMD_DRV_LOG(ERR, "Configure rss failed");
 766                 return err;
 767         }
 768
 769         /* rx mode init */
 770         err = hinic_config_rx_mode(nic_dev, HINIC_DEFAULT_RX_MODE);
 771         if (err) {
 772                 PMD_DRV_LOG(ERR, "Configure rx_mode:0x%x failed",
 773                         HINIC_DEFAULT_RX_MODE);
 774                 goto set_rx_mode_fail;
 775         }
 776
 777         return HINIC_OK;
 778
 779 set_rx_mode_fail:
 780         hinic_rx_remove_configure(dev);
 781
 782         return err;
 783 }
 784
 785 static void hinic_remove_rxtx_configure(struct rte_eth_dev *dev)
 786 {
 787         struct hinic_nic_dev *nic_dev = HINIC_ETH_DEV_TO_PRIVATE_NIC_DEV(dev);
 788
 789         (void)hinic_config_rx_mode(nic_dev, 0);
 790         hinic_rx_remove_configure(dev);
 791 }
 792
 793 static int hinic_priv_get_dev_link_status(struct hinic_nic_dev *nic_dev,
 794                                           struct rte_eth_link *link)
 795 {
 796         int rc;
 797         u8 port_link_status = 0;
 798         struct nic_port_info port_link_info;
 799         struct hinic_hwdev *nic_hwdev = nic_dev->hwdev;
 800         uint32_t port_speed[LINK_SPEED_MAX] = {ETH_SPEED_NUM_10M,
 801                                         ETH_SPEED_NUM_100M, ETH_SPEED_NUM_1G,
 802                                         ETH_SPEED_NUM_10G, ETH_SPEED_NUM_25G,
 803                                         ETH_SPEED_NUM_40G, ETH_SPEED_NUM_100G};
 804
 805         rc = hinic_get_link_status(nic_hwdev, &port_link_status);
 806         if (rc)
 807                 return rc;
 808
 809         if (!port_link_status) {
 810                 link->link_status = ETH_LINK_DOWN;
 811                 link->link_speed = 0;
 812                 link->link_duplex = ETH_LINK_HALF_DUPLEX;
 813                 link->link_autoneg = ETH_LINK_FIXED;
 814                 return HINIC_OK;
 815         }
 816
 817         memset(&port_link_info, 0, sizeof(port_link_info));
 818         rc = hinic_get_port_info(nic_hwdev, &port_link_info);
 819         if (rc)
 820                 return rc;
 821
 822         link->link_speed = port_speed[port_link_info.speed % LINK_SPEED_MAX];
 823         link->link_duplex = port_link_info.duplex;
 824         link->link_autoneg = port_link_info.autoneg_state;
 825         link->link_status = port_link_status;
 826
 827         return HINIC_OK;
 828 }
 829
 830 /**
 831  * DPDK callback to retrieve physical link information.
 832  *
 833  * @param dev
 834  *   Pointer to Ethernet device structure.
 835  * @param wait_to_complete
 836  *   Wait for request completion.
 837  *
 838  * @return
 839  *   0 link status changed, -1 link status not changed
 840  */
 841 static int hinic_link_update(struct rte_eth_dev *dev, int wait_to_complete)
 842 {
 843 #define CHECK_INTERVAL 10  /* 10ms */
 844 #define MAX_REPEAT_TIME 100  /* 1s (100 * 10ms) in total */
 845         int rc = HINIC_OK;
 846         struct rte_eth_link link;
 847         struct hinic_nic_dev *nic_dev = HINIC_ETH_DEV_TO_PRIVATE_NIC_DEV(dev);
 848         unsigned int rep_cnt = MAX_REPEAT_TIME;
 849
 850         memset(&link, 0, sizeof(link));
 851         do {
 852                 /* Get link status information from hardware */
 853                 rc = hinic_priv_get_dev_link_status(nic_dev, &link);
 854                 if (rc != HINIC_OK) {
 855                         link.link_speed = ETH_SPEED_NUM_NONE;
 856                         link.link_duplex = ETH_LINK_FULL_DUPLEX;
 857                         PMD_DRV_LOG(ERR, "Get link status failed");
 858                         goto out;
 859                 }
 860
 861                 if (!wait_to_complete || link.link_status)
 862                         break;
 863
 864                 rte_delay_ms(CHECK_INTERVAL);
 865         } while (rep_cnt--);
 866
 867 out:
 868         rc = rte_eth_linkstatus_set(dev, &link);
 869         return rc;
 870 }
 871
 872 /**
 873  * DPDK callback to start the device.
 874  *
 875  * @param dev
 876  *   Pointer to Ethernet device structure.
 877  *
 878  * @return
 879  *   0 on success, negative errno value on failure.
 880  */
 881 static int hinic_dev_start(struct rte_eth_dev *dev)
 882 {
 883         int rc;
 884         char *name;
 885         struct hinic_nic_dev *nic_dev;
 886
 887         nic_dev = HINIC_ETH_DEV_TO_PRIVATE_NIC_DEV(dev);
 888         name = dev->data->name;
 889
 890         /* reset rx and tx queue */
 891         hinic_reset_rx_queue(dev);
 892         hinic_reset_tx_queue(dev);
 893
 894         /* get func rx buf size */
 895         hinic_get_func_rx_buf_size(nic_dev);
 896
 897         /* init txq and rxq context */
 898         rc = hinic_init_qp_ctxts(nic_dev->hwdev);
 899         if (rc) {
 900                 PMD_DRV_LOG(ERR, "Initialize qp context failed, dev_name:%s",
 901                             name);
 902                 goto init_qp_fail;
 903         }
 904
 905         /* rss template */
 906         rc = hinic_config_mq_mode(dev, TRUE);
 907         if (rc) {
 908                 PMD_DRV_LOG(ERR, "Configure mq mode failed, dev_name: %s",
 909                             name);
 910                 goto cfg_mq_mode_fail;
 911         }
 912
 913         /* set default mtu */
 914         rc = hinic_set_port_mtu(nic_dev->hwdev, nic_dev->mtu_size);
 915         if (rc) {
 916                 PMD_DRV_LOG(ERR, "Set mtu_size[%d] failed, dev_name: %s",
 917                             nic_dev->mtu_size, name);
 918                 goto set_mtu_fail;
 919         }
 920
 921         /* configure rss rx_mode and other rx or tx default feature */
 922         rc = hinic_rxtx_configure(dev);
 923         if (rc) {
 924                 PMD_DRV_LOG(ERR, "Configure tx and rx failed, dev_name: %s",
 925                             name);
 926                 goto cfg_rxtx_fail;
 927         }
 928
 929         /* reactive pf status, so that uP report asyn event */
 930         hinic_set_pf_status(nic_dev->hwdev->hwif, HINIC_PF_STATUS_ACTIVE_FLAG);
 931
 932         /* open virtual port and ready to start packet receiving */
 933         rc = hinic_set_vport_enable(nic_dev->hwdev, true);
 934         if (rc) {
 935                 PMD_DRV_LOG(ERR, "Enable vport failed, dev_name:%s", name);
 936                 goto en_vport_fail;
 937         }
 938
 939         /* open physical port and start packet receiving */
 940         rc = hinic_set_port_enable(nic_dev->hwdev, true);
 941         if (rc) {
 942                 PMD_DRV_LOG(ERR, "Enable physical port failed, dev_name:%s",
 943                             name);
 944                 goto en_port_fail;
 945         }
 946
 947         /* update eth_dev link status */
 948         if (dev->data->dev_conf.intr_conf.lsc != 0)
 949                 (void)hinic_link_update(dev, 0);
 950
 951         hinic_set_bit(HINIC_DEV_START, &nic_dev->dev_status);
 952
 953         return 0;
 954
 955 en_port_fail:
 956         (void)hinic_set_vport_enable(nic_dev->hwdev, false);
 957
 958 en_vport_fail:
 959         hinic_set_pf_status(nic_dev->hwdev->hwif, HINIC_PF_STATUS_INIT);
 960
 961         /* Flush tx && rx chip resources in case of set vport fake fail */
 962         (void)hinic_flush_qp_res(nic_dev->hwdev);
 963         rte_delay_ms(100);
 964
 965         hinic_remove_rxtx_configure(dev);
 966
 967 cfg_rxtx_fail:
 968 set_mtu_fail:
 969 cfg_mq_mode_fail:
 970         hinic_free_qp_ctxts(nic_dev->hwdev);
 971
 972 init_qp_fail:
 973         hinic_free_all_rx_mbuf(dev);
 974         hinic_free_all_tx_mbuf(dev);
 975
 976         return rc;
 977 }
 978
 979 /**
 980  * DPDK callback to release the receive queue.
 981  *
 982  * @param queue
 983  *   Generic receive queue pointer.
 984  */
 985 static void hinic_rx_queue_release(void *queue)
 986 {
 987         struct hinic_rxq *rxq = queue;
 988         struct hinic_nic_dev *nic_dev;
 989
 990         if (!rxq) {
 991                 PMD_DRV_LOG(WARNING, "Rxq is null when release");
 992                 return;
 993         }
 994         nic_dev = rxq->nic_dev;
 995
 996         /* free rxq_pkt mbuf */
 997         hinic_free_all_rx_skbs(rxq);
 998
 999         /* free rxq_cqe, rxq_info */
1000         hinic_free_rx_resources(rxq);
1001
1002         /* free root rq wq */
1003         hinic_destroy_rq(nic_dev->hwdev, rxq->q_id);
1004
1005         nic_dev->rxqs[rxq->q_id] = NULL;
1006
1007         /* free rxq */
1008         rte_free(rxq);
1009 }
1010
1011 /**
1012  * DPDK callback to release the transmit queue.
1013  *
1014  * @param queue
1015  *   Generic transmit queue pointer.
1016  */
1017 static void hinic_tx_queue_release(void *queue)
1018 {
1019         struct hinic_txq *txq = queue;
1020         struct hinic_nic_dev *nic_dev;
1021
1022         if (!txq) {
1023                 PMD_DRV_LOG(WARNING, "Txq is null when release");
1024                 return;
1025         }
1026         nic_dev = txq->nic_dev;
1027
1028         /* free txq_pkt mbuf */
1029         hinic_free_all_tx_skbs(txq);
1030
1031         /* free txq_info */
1032         hinic_free_tx_resources(txq);
1033
1034         /* free root sq wq */
1035         hinic_destroy_sq(nic_dev->hwdev, txq->q_id);
1036         nic_dev->txqs[txq->q_id] = NULL;
1037
1038         /* free txq */
1039         rte_free(txq);
1040 }
1041
1042 static void hinic_free_all_rq(struct hinic_nic_dev *nic_dev)
1043 {
1044         u16 q_id;
1045
1046         for (q_id = 0; q_id < nic_dev->num_rq; q_id++)
1047                 hinic_destroy_rq(nic_dev->hwdev, q_id);
1048 }
1049
1050 static void hinic_free_all_sq(struct hinic_nic_dev *nic_dev)
1051 {
1052         u16 q_id;
1053
1054         for (q_id = 0; q_id < nic_dev->num_sq; q_id++)
1055                 hinic_destroy_sq(nic_dev->hwdev, q_id);
1056 }
1057
1058 /**
1059  * DPDK callback to stop the device.
1060  *
1061  * @param dev
1062  *   Pointer to Ethernet device structure.
1063  */
1064 static void hinic_dev_stop(struct rte_eth_dev *dev)
1065 {
1066         int rc;
1067         char *name;
1068         uint16_t port_id;
1069         struct hinic_nic_dev *nic_dev;
1070         struct rte_eth_link link;
1071
1072         nic_dev = HINIC_ETH_DEV_TO_PRIVATE_NIC_DEV(dev);
1073         name = dev->data->name;
1074         port_id = dev->data->port_id;
1075
1076         if (!hinic_test_and_clear_bit(HINIC_DEV_START, &nic_dev->dev_status)) {
1077                 PMD_DRV_LOG(INFO, "Device %s already stopped", name);
1078                 return;
1079         }
1080
1081         /* just stop phy port and vport */
1082         rc = hinic_set_port_enable(nic_dev->hwdev, false);
1083         if (rc)
1084                 PMD_DRV_LOG(WARNING, "Disable phy port failed, error: %d, dev_name:%s, port_id:%d",
1085                           rc, name, port_id);
1086
1087         rc = hinic_set_vport_enable(nic_dev->hwdev, false);
1088         if (rc)
1089                 PMD_DRV_LOG(WARNING, "Disable vport failed, error: %d, dev_name:%s, port_id:%d",
1090                           rc, name, port_id);
1091
1092         /* Clear recorded link status */
1093         memset(&link, 0, sizeof(link));
1094         (void)rte_eth_linkstatus_set(dev, &link);
1095
1096         /* flush pending io request */
1097         rc = hinic_rx_tx_flush(nic_dev->hwdev);
1098         if (rc)
1099                 PMD_DRV_LOG(WARNING, "Flush pending io failed, error: %d, dev_name: %s, port_id: %d",
1100                             rc, name, port_id);
1101
1102         /* clean rss table and rx_mode */
1103         hinic_remove_rxtx_configure(dev);
1104
1105         /* clean root context */
1106         hinic_free_qp_ctxts(nic_dev->hwdev);
1107
1108         /* free mbuf */
1109         hinic_free_all_rx_mbuf(dev);
1110         hinic_free_all_tx_mbuf(dev);
1111 }
1112
1113 static void hinic_disable_interrupt(struct rte_eth_dev *dev)
1114 {
1115         struct hinic_nic_dev *nic_dev = HINIC_ETH_DEV_TO_PRIVATE_NIC_DEV(dev);
1116         struct rte_pci_device *pci_dev = RTE_ETH_DEV_TO_PCI(dev);
1117         int ret, retries = 0;
1118
1119         hinic_clear_bit(HINIC_DEV_INTR_EN, &nic_dev->dev_status);
1120
1121         /* disable msix interrupt in hardware */
1122         hinic_set_msix_state(nic_dev->hwdev, 0, HINIC_MSIX_DISABLE);
1123
1124         /* disable rte interrupt */
1125         ret = rte_intr_disable(&pci_dev->intr_handle);
1126         if (ret)
1127                 PMD_DRV_LOG(ERR, "Disable intr failed: %d", ret);
1128
1129         do {
1130                 ret =
1131                 rte_intr_callback_unregister(&pci_dev->intr_handle,
1132                                              hinic_dev_interrupt_handler, dev);
1133                 if (ret >= 0) {
1134                         break;
1135                 } else if (ret == -EAGAIN) {
1136                         rte_delay_ms(100);
1137                         retries++;
1138                 } else {
1139                         PMD_DRV_LOG(ERR, "intr callback unregister failed: %d",
1140                                     ret);
1141                         break;
1142                 }
1143         } while (retries < HINIC_INTR_CB_UNREG_MAX_RETRIES);
1144
1145         if (retries == HINIC_INTR_CB_UNREG_MAX_RETRIES)
1146                 PMD_DRV_LOG(ERR, "Unregister intr callback failed after %d retries",
1147                             retries);
1148 }
1149
1150 static int hinic_set_dev_promiscuous(struct hinic_nic_dev *nic_dev, bool enable)
1151 {
1152         u32 rx_mode_ctrl = nic_dev->rx_mode_status;
1153
1154         if (enable)
1155                 rx_mode_ctrl |= HINIC_RX_MODE_PROMISC;
1156         else
1157                 rx_mode_ctrl &= (~HINIC_RX_MODE_PROMISC);
1158
1159         return hinic_config_rx_mode(nic_dev, rx_mode_ctrl);
1160 }
1161
1162 /**
1163  * DPDK callback to get device statistics.
1164  *
1165  * @param dev
1166  *   Pointer to Ethernet device structure.
1167  * @param stats
1168  *   Stats structure output buffer.
1169  *
1170  * @return
1171  *   0 on success and stats is filled,
1172  *   negative error value otherwise.
1173  */
1174 static int
1175 hinic_dev_stats_get(struct rte_eth_dev *dev, struct rte_eth_stats *stats)
1176 {
1177         int i, err, q_num;
1178         u64 rx_discards_pmd = 0;
1179         struct hinic_nic_dev *nic_dev = HINIC_ETH_DEV_TO_PRIVATE_NIC_DEV(dev);
1180         struct hinic_vport_stats vport_stats;
1181         struct hinic_rxq        *rxq = NULL;
1182         struct hinic_rxq_stats rxq_stats;
1183         struct hinic_txq        *txq = NULL;
1184         struct hinic_txq_stats txq_stats;
1185
1186         err = hinic_get_vport_stats(nic_dev->hwdev, &vport_stats);
1187         if (err) {
1188                 PMD_DRV_LOG(ERR, "Get vport stats from fw failed, nic_dev: %s",
1189                         nic_dev->proc_dev_name);
1190                 return err;
1191         }
1192
1193         /* rx queue stats */
1194         q_num = (nic_dev->num_rq < RTE_ETHDEV_QUEUE_STAT_CNTRS) ?
1195                         nic_dev->num_rq : RTE_ETHDEV_QUEUE_STAT_CNTRS;
1196         for (i = 0; i < q_num; i++) {
1197                 rxq = nic_dev->rxqs[i];
1198                 hinic_rxq_get_stats(rxq, &rxq_stats);
1199                 stats->q_ipackets[i] = rxq_stats.packets;
1200                 stats->q_ibytes[i] = rxq_stats.bytes;
1201                 stats->q_errors[i] = rxq_stats.rx_discards;
1202
1203                 stats->ierrors += rxq_stats.errors;
1204                 rx_discards_pmd += rxq_stats.rx_discards;
1205                 dev->data->rx_mbuf_alloc_failed += rxq_stats.rx_nombuf;
1206         }
1207
1208         /* tx queue stats */
1209         q_num = (nic_dev->num_sq < RTE_ETHDEV_QUEUE_STAT_CNTRS) ?
1210                 nic_dev->num_sq : RTE_ETHDEV_QUEUE_STAT_CNTRS;
1211         for (i = 0; i < q_num; i++) {
1212                 txq = nic_dev->txqs[i];
1213                 hinic_txq_get_stats(txq, &txq_stats);
1214                 stats->q_opackets[i] = txq_stats.packets;
1215                 stats->q_obytes[i] = txq_stats.bytes;
1216                 stats->oerrors += (txq_stats.tx_busy + txq_stats.off_errs);
1217         }
1218
1219         /* vport stats */
1220         stats->oerrors += vport_stats.tx_discard_vport;
1221
1222         stats->imissed = vport_stats.rx_discard_vport + rx_discards_pmd;
1223
1224         stats->ipackets = (vport_stats.rx_unicast_pkts_vport +
1225                         vport_stats.rx_multicast_pkts_vport +
1226                         vport_stats.rx_broadcast_pkts_vport -
1227                         rx_discards_pmd);
1228
1229         stats->opackets = (vport_stats.tx_unicast_pkts_vport +
1230                         vport_stats.tx_multicast_pkts_vport +
1231                         vport_stats.tx_broadcast_pkts_vport);
1232
1233         stats->ibytes = (vport_stats.rx_unicast_bytes_vport +
1234                         vport_stats.rx_multicast_bytes_vport +
1235                         vport_stats.rx_broadcast_bytes_vport);
1236
1237         stats->obytes = (vport_stats.tx_unicast_bytes_vport +
1238                         vport_stats.tx_multicast_bytes_vport +
1239                         vport_stats.tx_broadcast_bytes_vport);
1240         return 0;
1241 }
1242
1243 /**
1244  * DPDK callback to clear device statistics.
1245  *
1246  * @param dev
1247  *   Pointer to Ethernet device structure.
1248  */
1249 static int hinic_dev_stats_reset(struct rte_eth_dev *dev)
1250 {
1251         int qid;
1252         struct hinic_rxq        *rxq = NULL;
1253         struct hinic_txq        *txq = NULL;
1254         struct hinic_nic_dev *nic_dev = HINIC_ETH_DEV_TO_PRIVATE_NIC_DEV(dev);
1255         int ret;
1256
1257         ret = hinic_clear_vport_stats(nic_dev->hwdev);
1258         if (ret != 0)
1259                 return ret;
1260
1261         for (qid = 0; qid < nic_dev->num_rq; qid++) {
1262                 rxq = nic_dev->rxqs[qid];
1263                 hinic_rxq_stats_reset(rxq);
1264         }
1265
1266         for (qid = 0; qid < nic_dev->num_sq; qid++) {
1267                 txq = nic_dev->txqs[qid];
1268                 hinic_txq_stats_reset(txq);
1269         }
1270
1271         return 0;
1272 }
1273
1274 /**
1275  * DPDK callback to clear device extended statistics.
1276  *
1277  * @param dev
1278  *   Pointer to Ethernet device structure.
1279  */
1280 static int hinic_dev_xstats_reset(struct rte_eth_dev *dev)
1281 {
1282         struct hinic_nic_dev *nic_dev = HINIC_ETH_DEV_TO_PRIVATE_NIC_DEV(dev);
1283         int ret;
1284
1285         ret = hinic_dev_stats_reset(dev);
1286         if (ret != 0)
1287                 return ret;
1288
1289         if (hinic_func_type(nic_dev->hwdev) != TYPE_VF) {
1290                 ret = hinic_clear_phy_port_stats(nic_dev->hwdev);
1291                 if (ret != 0)
1292                         return ret;
1293         }
1294
1295         return 0;
1296 }
1297
1298 static void hinic_gen_random_mac_addr(struct rte_ether_addr *mac_addr)
1299 {
1300         uint64_t random_value;
1301
1302         /* Set Organizationally Unique Identifier (OUI) prefix */
1303         mac_addr->addr_bytes[0] = 0x00;
1304         mac_addr->addr_bytes[1] = 0x09;
1305         mac_addr->addr_bytes[2] = 0xC0;
1306         /* Force indication of locally assigned MAC address. */
1307         mac_addr->addr_bytes[0] |= RTE_ETHER_LOCAL_ADMIN_ADDR;
1308         /* Generate the last 3 bytes of the MAC address with a random number. */
1309         random_value = rte_rand();
1310         memcpy(&mac_addr->addr_bytes[3], &random_value, 3);
1311 }
1312
1313 /**
1314  * Init mac_vlan table in NIC.
1315  *
1316  * @param dev
1317  *   Pointer to Ethernet device structure.
1318  *
1319  * @return
1320  *   0 on success and stats is filled,
1321  *   negative error value otherwise.
1322  */
1323 static int hinic_init_mac_addr(struct rte_eth_dev *eth_dev)
1324 {
1325         struct hinic_nic_dev *nic_dev =
1326                                 HINIC_ETH_DEV_TO_PRIVATE_NIC_DEV(eth_dev);
1327         uint8_t addr_bytes[RTE_ETHER_ADDR_LEN];
1328         u16 func_id = 0;
1329         int rc = 0;
1330
1331         rc = hinic_get_default_mac(nic_dev->hwdev, addr_bytes);
1332         if (rc)
1333                 return rc;
1334
1335         memmove(eth_dev->data->mac_addrs->addr_bytes,
1336                 addr_bytes, RTE_ETHER_ADDR_LEN);
1337
1338         if (rte_is_zero_ether_addr(eth_dev->data->mac_addrs))
1339                 hinic_gen_random_mac_addr(eth_dev->data->mac_addrs);
1340
1341         func_id = hinic_global_func_id(nic_dev->hwdev);
1342         rc = hinic_set_mac(nic_dev->hwdev, eth_dev->data->mac_addrs->addr_bytes,
1343                            0, func_id);
1344         if (rc && rc != HINIC_PF_SET_VF_ALREADY)
1345                 return rc;
1346
1347         return 0;
1348 }
1349
1350 /**
1351  * Deinit mac_vlan table in NIC.
1352  *
1353  * @param dev
1354  *   Pointer to Ethernet device structure.
1355  *
1356  * @return
1357  *   0 on success and stats is filled,
1358  *   negative error value otherwise.
1359  */
1360 static void hinic_deinit_mac_addr(struct rte_eth_dev *eth_dev)
1361 {
1362         struct hinic_nic_dev *nic_dev =
1363                                 HINIC_ETH_DEV_TO_PRIVATE_NIC_DEV(eth_dev);
1364         int rc;
1365         u16 func_id = 0;
1366
1367         if (rte_is_zero_ether_addr(eth_dev->data->mac_addrs))
1368                 return;
1369
1370         func_id = hinic_global_func_id(nic_dev->hwdev);
1371         rc = hinic_del_mac(nic_dev->hwdev,
1372                            eth_dev->data->mac_addrs->addr_bytes,
1373                            0, func_id);
1374         if (rc && rc != HINIC_PF_SET_VF_ALREADY)
1375                 PMD_DRV_LOG(ERR, "Delete mac table failed, dev_name: %s",
1376                             eth_dev->data->name);
1377 }
1378
1379 static void hinic_store_vlan_filter(struct hinic_nic_dev *nic_dev,
1380                                         u16 vlan_id, bool on)
1381 {
1382         u32 vid_idx, vid_bit;
1383
1384         vid_idx = HINIC_VFTA_IDX(vlan_id);
1385         vid_bit = HINIC_VFTA_BIT(vlan_id);
1386
1387         if (on)
1388                 nic_dev->vfta[vid_idx] |= vid_bit;
1389         else
1390                 nic_dev->vfta[vid_idx] &= ~vid_bit;
1391 }
1392
1393 static bool hinic_find_vlan_filter(struct hinic_nic_dev *nic_dev,
1394                                 uint16_t vlan_id)
1395 {
1396         u32 vid_idx, vid_bit;
1397
1398         vid_idx = HINIC_VFTA_IDX(vlan_id);
1399         vid_bit = HINIC_VFTA_BIT(vlan_id);
1400
1401         return (nic_dev->vfta[vid_idx] & vid_bit) ? TRUE : FALSE;
1402 }
1403
1404 /**
1405  * DPDK callback to set vlan filter.
1406  *
1407  * @param dev
1408  *   Pointer to Ethernet device structure.
1409  * @param vlan_id
1410  *   vlan id is used to filter vlan packets
1411  * @param enable
1412  *   enable disable or enable vlan filter function
1413  */
1414 static int hinic_vlan_filter_set(struct rte_eth_dev *dev,
1415                                 uint16_t vlan_id, int enable)
1416 {
1417         struct hinic_nic_dev *nic_dev = HINIC_ETH_DEV_TO_PRIVATE_NIC_DEV(dev);
1418         int err = 0;
1419         u16 func_id;
1420
1421         if (vlan_id > RTE_ETHER_MAX_VLAN_ID)
1422                 return -EINVAL;
1423
1424         func_id = hinic_global_func_id(nic_dev->hwdev);
1425
1426         if (enable) {
1427                 /* If vlanid is already set, just return */
1428                 if (hinic_find_vlan_filter(nic_dev, vlan_id)) {
1429                         PMD_DRV_LOG(INFO, "Vlan %u has been added, device: %s",
1430                                   vlan_id, nic_dev->proc_dev_name);
1431                         return 0;
1432                 }
1433
1434                 err = hinic_add_remove_vlan(nic_dev->hwdev, vlan_id,
1435                                             func_id, TRUE);
1436         } else {
1437                 /* If vlanid can't be found, just return */
1438                 if (!hinic_find_vlan_filter(nic_dev, vlan_id)) {
1439                         PMD_DRV_LOG(INFO, "Vlan %u is not in the vlan filter list, device: %s",
1440                                   vlan_id, nic_dev->proc_dev_name);
1441                         return 0;
1442                 }
1443
1444                 err = hinic_add_remove_vlan(nic_dev->hwdev, vlan_id,
1445                                             func_id, FALSE);
1446         }
1447
1448         if (err) {
1449                 PMD_DRV_LOG(ERR, "%s vlan failed, func_id: %d, vlan_id: %d, err: %d",
1450                       enable ? "Add" : "Remove", func_id, vlan_id, err);
1451                 return err;
1452         }
1453
1454         hinic_store_vlan_filter(nic_dev, vlan_id, enable);
1455
1456         PMD_DRV_LOG(INFO, "%s vlan %u succeed, device: %s",
1457                   enable ? "Add" : "Remove", vlan_id, nic_dev->proc_dev_name);
1458         return 0;
1459 }
1460
1461 /**
1462  * DPDK callback to enable or disable vlan offload.
1463  *
1464  * @param dev
1465  *   Pointer to Ethernet device structure.
1466  * @param mask
1467  *   Definitions used for VLAN setting
1468  */
1469 static int hinic_vlan_offload_set(struct rte_eth_dev *dev, int mask)
1470 {
1471         struct hinic_nic_dev *nic_dev = HINIC_ETH_DEV_TO_PRIVATE_NIC_DEV(dev);
1472         struct rte_eth_rxmode *rxmode = &dev->data->dev_conf.rxmode;
1473         bool on;
1474         int err;
1475
1476         /* Enable or disable VLAN filter */
1477         if (mask & ETH_VLAN_FILTER_MASK) {
1478                 on = (rxmode->offloads & DEV_RX_OFFLOAD_VLAN_FILTER) ?
1479                         TRUE : FALSE;
1480                 err = hinic_config_vlan_filter(nic_dev->hwdev, on);
1481                 if (err == HINIC_MGMT_CMD_UNSUPPORTED) {
1482                         PMD_DRV_LOG(WARNING,
1483                                 "Current matching version does not support vlan filter configuration, device: %s, port_id: %d",
1484                                   nic_dev->proc_dev_name, dev->data->port_id);
1485                 } else if (err) {
1486                         PMD_DRV_LOG(ERR, "Failed to %s vlan filter, device: %s, port_id: %d, err: %d",
1487                                   on ? "enable" : "disable",
1488                                   nic_dev->proc_dev_name,
1489                                   dev->data->port_id, err);
1490                         return err;
1491                 }
1492
1493                 PMD_DRV_LOG(INFO, "%s vlan filter succeed, device: %s, port_id: %d",
1494                           on ? "Enable" : "Disable",
1495                           nic_dev->proc_dev_name, dev->data->port_id);
1496         }
1497
1498         /* Enable or disable VLAN stripping */
1499         if (mask & ETH_VLAN_STRIP_MASK) {
1500                 on = (rxmode->offloads & DEV_RX_OFFLOAD_VLAN_STRIP) ?
1501                         TRUE : FALSE;
1502                 err = hinic_set_rx_vlan_offload(nic_dev->hwdev, on);
1503                 if (err) {
1504                         PMD_DRV_LOG(ERR, "Failed to %s vlan strip, device: %s, port_id: %d, err: %d",
1505                                   on ? "enable" : "disable",
1506                                   nic_dev->proc_dev_name,
1507                                   dev->data->port_id, err);
1508                         return err;
1509                 }
1510
1511                 PMD_DRV_LOG(INFO, "%s vlan strip succeed, device: %s, port_id: %d",
1512                           on ? "Enable" : "Disable",
1513                           nic_dev->proc_dev_name, dev->data->port_id);
1514         }
1515
1516         if (mask & ETH_VLAN_EXTEND_MASK) {
1517                 PMD_DRV_LOG(ERR, "Don't support vlan qinq, device: %s, port_id: %d",
1518                           nic_dev->proc_dev_name, dev->data->port_id);
1519                 return -ENOTSUP;
1520         }
1521
1522         return 0;
1523 }
1524
1525 static void hinic_remove_all_vlanid(struct rte_eth_dev *eth_dev)
1526 {
1527         struct hinic_nic_dev *nic_dev =
1528                 HINIC_ETH_DEV_TO_PRIVATE_NIC_DEV(eth_dev);
1529         u16 func_id;
1530         int i;
1531
1532         func_id = hinic_global_func_id(nic_dev->hwdev);
1533         for (i = 0; i <= RTE_ETHER_MAX_VLAN_ID; i++) {
1534                 /* If can't find it, continue */
1535                 if (!hinic_find_vlan_filter(nic_dev, i))
1536                         continue;
1537
1538                 (void)hinic_add_remove_vlan(nic_dev->hwdev, i, func_id, FALSE);
1539                 hinic_store_vlan_filter(nic_dev, i, false);
1540         }
1541 }
1542
1543 /**
1544  * DPDK callback to enable promiscuous mode.
1545  *
1546  * @param dev
1547  *   Pointer to Ethernet device structure.
1548  *
1549  * @return
1550  *   0 on success,
1551  *   negative error value otherwise.
1552  */
1553 static int hinic_dev_promiscuous_enable(struct rte_eth_dev *dev)
1554 {
1555         int rc = HINIC_OK;
1556         struct hinic_nic_dev *nic_dev = HINIC_ETH_DEV_TO_PRIVATE_NIC_DEV(dev);
1557
1558         PMD_DRV_LOG(INFO, "Enable promiscuous, nic_dev: %s, port_id: %d, promisc: %d",
1559                     nic_dev->proc_dev_name, dev->data->port_id,
1560                     dev->data->promiscuous);
1561
1562         rc = hinic_set_dev_promiscuous(nic_dev, true);
1563         if (rc)
1564                 PMD_DRV_LOG(ERR, "Enable promiscuous failed");
1565
1566         return rc;
1567 }
1568
1569 /**
1570  * DPDK callback to disable promiscuous mode.
1571  *
1572  * @param dev
1573  *   Pointer to Ethernet device structure.
1574  *
1575  * @return
1576  *   0 on success,
1577  *   negative error value otherwise.
1578  */
1579 static int hinic_dev_promiscuous_disable(struct rte_eth_dev *dev)
1580 {
1581         int rc = HINIC_OK;
1582         struct hinic_nic_dev *nic_dev = HINIC_ETH_DEV_TO_PRIVATE_NIC_DEV(dev);
1583
1584         PMD_DRV_LOG(INFO, "Disable promiscuous, nic_dev: %s, port_id: %d, promisc: %d",
1585                     nic_dev->proc_dev_name, dev->data->port_id,
1586                     dev->data->promiscuous);
1587
1588         rc = hinic_set_dev_promiscuous(nic_dev, false);
1589         if (rc)
1590                 PMD_DRV_LOG(ERR, "Disable promiscuous failed");
1591
1592         return rc;
1593 }
1594
1595 /**
1596  * DPDK callback to update the RSS hash key and RSS hash type.
1597  *
1598  * @param dev
1599  *   Pointer to Ethernet device structure.
1600  * @param rss_conf
1601  *   RSS configuration data.
1602  *
1603  * @return
1604  *   0 on success, negative error value otherwise.
1605  */
1606 static int hinic_rss_hash_update(struct rte_eth_dev *dev,
1607                           struct rte_eth_rss_conf *rss_conf)
1608 {
1609         struct hinic_nic_dev *nic_dev = HINIC_ETH_DEV_TO_PRIVATE_NIC_DEV(dev);
1610         u8 tmpl_idx = nic_dev->rss_tmpl_idx;
1611         u8 hashkey[HINIC_RSS_KEY_SIZE] = {0};
1612         u8 prio_tc[HINIC_DCB_UP_MAX] = {0};
1613         u64 rss_hf = rss_conf->rss_hf;
1614         struct nic_rss_type rss_type = {0};
1615         int err = 0;
1616
1617         if (!(nic_dev->flags & ETH_MQ_RX_RSS_FLAG)) {
1618                 PMD_DRV_LOG(WARNING, "RSS is not enabled");
1619                 return HINIC_OK;
1620         }
1621
1622         if (rss_conf->rss_key_len > HINIC_RSS_KEY_SIZE) {
1623                 PMD_DRV_LOG(ERR, "Invalid rss key, rss_key_len:%d",
1624                             rss_conf->rss_key_len);
1625                 return HINIC_ERROR;
1626         }
1627
1628         if (rss_conf->rss_key) {
1629                 memcpy(hashkey, rss_conf->rss_key, rss_conf->rss_key_len);
1630                 err = hinic_rss_set_template_tbl(nic_dev->hwdev, tmpl_idx,
1631                                                  hashkey);
1632                 if (err) {
1633                         PMD_DRV_LOG(ERR, "Set rss template table failed");
1634                         goto disable_rss;
1635                 }
1636         }
1637
1638         rss_type.ipv4 = (rss_hf & (ETH_RSS_IPV4 | ETH_RSS_FRAG_IPV4)) ? 1 : 0;
1639         rss_type.tcp_ipv4 = (rss_hf & ETH_RSS_NONFRAG_IPV4_TCP) ? 1 : 0;
1640         rss_type.ipv6 = (rss_hf & (ETH_RSS_IPV6 | ETH_RSS_FRAG_IPV6)) ? 1 : 0;
1641         rss_type.ipv6_ext = (rss_hf & ETH_RSS_IPV6_EX) ? 1 : 0;
1642         rss_type.tcp_ipv6 = (rss_hf & ETH_RSS_NONFRAG_IPV6_TCP) ? 1 : 0;
1643         rss_type.tcp_ipv6_ext = (rss_hf & ETH_RSS_IPV6_TCP_EX) ? 1 : 0;
1644         rss_type.udp_ipv4 = (rss_hf & ETH_RSS_NONFRAG_IPV4_UDP) ? 1 : 0;
1645         rss_type.udp_ipv6 = (rss_hf & ETH_RSS_NONFRAG_IPV6_UDP) ? 1 : 0;
1646
1647         err = hinic_set_rss_type(nic_dev->hwdev, tmpl_idx, rss_type);
1648         if (err) {
1649                 PMD_DRV_LOG(ERR, "Set rss type table failed");
1650                 goto disable_rss;
1651         }
1652
1653         return 0;
1654
1655 disable_rss:
1656         memset(prio_tc, 0, sizeof(prio_tc));
1657         (void)hinic_rss_cfg(nic_dev->hwdev, 0, tmpl_idx, 0, prio_tc);
1658         return err;
1659 }
1660
1661 /**
1662  * DPDK callback to get the RSS hash configuration.
1663  *
1664  * @param dev
1665  *   Pointer to Ethernet device structure.
1666  * @param rss_conf
1667  *   RSS configuration data.
1668  *
1669  * @return
1670  *   0 on success, negative error value otherwise.
1671  */
1672 static int hinic_rss_conf_get(struct rte_eth_dev *dev,
1673                        struct rte_eth_rss_conf *rss_conf)
1674 {
1675         struct hinic_nic_dev *nic_dev = HINIC_ETH_DEV_TO_PRIVATE_NIC_DEV(dev);
1676         u8 tmpl_idx = nic_dev->rss_tmpl_idx;
1677         u8 hashkey[HINIC_RSS_KEY_SIZE] = {0};
1678         struct nic_rss_type rss_type = {0};
1679         int err;
1680
1681         if (!(nic_dev->flags & ETH_MQ_RX_RSS_FLAG)) {
1682                 PMD_DRV_LOG(WARNING, "RSS is not enabled");
1683                 return HINIC_ERROR;
1684         }
1685
1686         err = hinic_rss_get_template_tbl(nic_dev->hwdev, tmpl_idx, hashkey);
1687         if (err)
1688                 return err;
1689
1690         if (rss_conf->rss_key &&
1691             rss_conf->rss_key_len >= HINIC_RSS_KEY_SIZE) {
1692                 memcpy(rss_conf->rss_key, hashkey, sizeof(hashkey));
1693                 rss_conf->rss_key_len = sizeof(hashkey);
1694         }
1695
1696         err = hinic_get_rss_type(nic_dev->hwdev, tmpl_idx, &rss_type);
1697         if (err)
1698                 return err;
1699
1700         rss_conf->rss_hf = 0;
1701         rss_conf->rss_hf |=  rss_type.ipv4 ?
1702                 (ETH_RSS_IPV4 | ETH_RSS_FRAG_IPV4) : 0;
1703         rss_conf->rss_hf |=  rss_type.tcp_ipv4 ? ETH_RSS_NONFRAG_IPV4_TCP : 0;
1704         rss_conf->rss_hf |=  rss_type.ipv6 ?
1705                 (ETH_RSS_IPV6 | ETH_RSS_FRAG_IPV6) : 0;
1706         rss_conf->rss_hf |=  rss_type.ipv6_ext ? ETH_RSS_IPV6_EX : 0;
1707         rss_conf->rss_hf |=  rss_type.tcp_ipv6 ? ETH_RSS_NONFRAG_IPV6_TCP : 0;
1708         rss_conf->rss_hf |=  rss_type.tcp_ipv6_ext ? ETH_RSS_IPV6_TCP_EX : 0;
1709         rss_conf->rss_hf |=  rss_type.udp_ipv4 ? ETH_RSS_NONFRAG_IPV4_UDP : 0;
1710         rss_conf->rss_hf |=  rss_type.udp_ipv6 ? ETH_RSS_NONFRAG_IPV6_UDP : 0;
1711
1712         return HINIC_OK;
1713 }
1714
1715 /**
1716  * DPDK callback to update the RETA indirection table.
1717  *
1718  * @param dev
1719  *   Pointer to Ethernet device structure.
1720  * @param reta_conf
1721  *   Pointer to RETA configuration structure array.
1722  * @param reta_size
1723  *   Size of the RETA table.
1724  *
1725  * @return
1726  *   0 on success, negative error value otherwise.
1727  */
1728 static int hinic_rss_indirtbl_update(struct rte_eth_dev *dev,
1729                               struct rte_eth_rss_reta_entry64 *reta_conf,
1730                               uint16_t reta_size)
1731 {
1732         struct hinic_nic_dev *nic_dev = HINIC_ETH_DEV_TO_PRIVATE_NIC_DEV(dev);
1733         u8 tmpl_idx = nic_dev->rss_tmpl_idx;
1734         u8 prio_tc[HINIC_DCB_UP_MAX] = {0};
1735         u32 indirtbl[NIC_RSS_INDIR_SIZE] = {0};
1736         int err = 0;
1737         u16 i = 0;
1738         u16 idx, shift;
1739
1740         if (!(nic_dev->flags & ETH_MQ_RX_RSS_FLAG))
1741                 return HINIC_OK;
1742
1743         if (reta_size != NIC_RSS_INDIR_SIZE) {
1744                 PMD_DRV_LOG(ERR, "Invalid reta size, reta_size:%d", reta_size);
1745                 return HINIC_ERROR;
1746         }
1747
1748         err = hinic_rss_get_indir_tbl(nic_dev->hwdev, tmpl_idx, indirtbl);
1749         if (err)
1750                 return err;
1751
1752         /* update rss indir_tbl */
1753         for (i = 0; i < reta_size; i++) {
1754                 idx = i / RTE_RETA_GROUP_SIZE;
1755                 shift = i % RTE_RETA_GROUP_SIZE;
1756                 if (reta_conf[idx].mask & (1ULL << shift))
1757                         indirtbl[i] = reta_conf[idx].reta[shift];
1758         }
1759
1760         for (i = 0 ; i < reta_size; i++) {
1761                 if (indirtbl[i] >= nic_dev->num_rq) {
1762                         PMD_DRV_LOG(ERR, "Invalid reta entry, index:%d, num_rq:%d",
1763                                     i, nic_dev->num_rq);
1764                         goto disable_rss;
1765                 }
1766         }
1767
1768         err = hinic_rss_set_indir_tbl(nic_dev->hwdev, tmpl_idx, indirtbl);
1769         if (err)
1770                 goto disable_rss;
1771
1772         nic_dev->rss_indir_flag = true;
1773
1774         return 0;
1775
1776 disable_rss:
1777         memset(prio_tc, 0, sizeof(prio_tc));
1778         (void)hinic_rss_cfg(nic_dev->hwdev, 0, tmpl_idx, 0, prio_tc);
1779
1780         return HINIC_ERROR;
1781 }
1782
1783
1784 /**
1785  * DPDK callback to get the RETA indirection table.
1786  *
1787  * @param dev
1788  *   Pointer to Ethernet device structure.
1789  * @param reta_conf
1790  *   Pointer to RETA configuration structure array.
1791  * @param reta_size
1792  *   Size of the RETA table.
1793  *
1794  * @return
1795  *   0 on success, negative error value otherwise.
1796  */
1797 static int hinic_rss_indirtbl_query(struct rte_eth_dev *dev,
1798                              struct rte_eth_rss_reta_entry64 *reta_conf,
1799                              uint16_t reta_size)
1800 {
1801         struct hinic_nic_dev *nic_dev = HINIC_ETH_DEV_TO_PRIVATE_NIC_DEV(dev);
1802         u8 tmpl_idx = nic_dev->rss_tmpl_idx;
1803         int err = 0;
1804         u32 indirtbl[NIC_RSS_INDIR_SIZE] = {0};
1805         u16 idx, shift;
1806         u16 i = 0;
1807
1808         if (reta_size != NIC_RSS_INDIR_SIZE) {
1809                 PMD_DRV_LOG(ERR, "Invalid reta size, reta_size:%d", reta_size);
1810                 return HINIC_ERROR;
1811         }
1812
1813         err = hinic_rss_get_indir_tbl(nic_dev->hwdev, tmpl_idx, indirtbl);
1814         if (err) {
1815                 PMD_DRV_LOG(ERR, "Get rss indirect table failed, error:%d",
1816                             err);
1817                 return err;
1818         }
1819
1820         for (i = 0; i < reta_size; i++) {
1821                 idx = i / RTE_RETA_GROUP_SIZE;
1822                 shift = i % RTE_RETA_GROUP_SIZE;
1823                 if (reta_conf[idx].mask & (1ULL << shift))
1824                         reta_conf[idx].reta[shift] = (uint16_t)indirtbl[i];
1825         }
1826
1827         return HINIC_OK;
1828 }
1829
1830 /**
1831  * DPDK callback to get extended device statistics.
1832  *
1833  * @param dev
1834  *   Pointer to Ethernet device.
1835  * @param xstats
1836  *   Pointer to rte extended stats table.
1837  * @param n
1838  *   The size of the stats table.
1839  *
1840  * @return
1841  *   Number of extended stats on success and stats is filled,
1842  *   negative error value otherwise.
1843  */
1844 static int hinic_dev_xstats_get(struct rte_eth_dev *dev,
1845                          struct rte_eth_xstat *xstats,
1846                          unsigned int n)
1847 {
1848         u16 qid = 0;
1849         u32 i;
1850         int err, count;
1851         struct hinic_nic_dev *nic_dev;
1852         struct hinic_phy_port_stats port_stats;
1853         struct hinic_vport_stats vport_stats;
1854         struct hinic_rxq        *rxq = NULL;
1855         struct hinic_rxq_stats rxq_stats;
1856         struct hinic_txq        *txq = NULL;
1857         struct hinic_txq_stats txq_stats;
1858
1859         nic_dev = HINIC_ETH_DEV_TO_PRIVATE_NIC_DEV(dev);
1860         count = hinic_xstats_calc_num(nic_dev);
1861         if ((int)n < count)
1862                 return count;
1863
1864         count = 0;
1865
1866         /* Get stats from hinic_rxq_stats */
1867         for (qid = 0; qid < nic_dev->num_rq; qid++) {
1868                 rxq = nic_dev->rxqs[qid];
1869                 hinic_rxq_get_stats(rxq, &rxq_stats);
1870
1871                 for (i = 0; i < HINIC_RXQ_XSTATS_NUM; i++) {
1872                         xstats[count].value =
1873                                 *(uint64_t *)(((char *)&rxq_stats) +
1874                                 hinic_rxq_stats_strings[i].offset);
1875                         xstats[count].id = count;
1876                         count++;
1877                 }
1878         }
1879
1880         /* Get stats from hinic_txq_stats */
1881         for (qid = 0; qid < nic_dev->num_sq; qid++) {
1882                 txq = nic_dev->txqs[qid];
1883                 hinic_txq_get_stats(txq, &txq_stats);
1884
1885                 for (i = 0; i < HINIC_TXQ_XSTATS_NUM; i++) {
1886                         xstats[count].value =
1887                                 *(uint64_t *)(((char *)&txq_stats) +
1888                                 hinic_txq_stats_strings[i].offset);
1889                         xstats[count].id = count;
1890                         count++;
1891                 }
1892         }
1893
1894         /* Get stats from hinic_vport_stats */
1895         err = hinic_get_vport_stats(nic_dev->hwdev, &vport_stats);
1896         if (err)
1897                 return err;
1898
1899         for (i = 0; i < HINIC_VPORT_XSTATS_NUM; i++) {
1900                 xstats[count].value =
1901                         *(uint64_t *)(((char *)&vport_stats) +
1902                         hinic_vport_stats_strings[i].offset);
1903                 xstats[count].id = count;
1904                 count++;
1905         }
1906
1907         if (HINIC_IS_VF(nic_dev->hwdev))
1908                 return count;
1909
1910         /* Get stats from hinic_phy_port_stats */
1911         err = hinic_get_phy_port_stats(nic_dev->hwdev, &port_stats);
1912         if (err)
1913                 return err;
1914
1915         for (i = 0; i < HINIC_PHYPORT_XSTATS_NUM; i++) {
1916                 xstats[count].value = *(uint64_t *)(((char *)&port_stats) +
1917                                 hinic_phyport_stats_strings[i].offset);
1918                 xstats[count].id = count;
1919                 count++;
1920         }
1921
1922         return count;
1923 }
1924
1925 /**
1926  * DPDK callback to retrieve names of extended device statistics
1927  *
1928  * @param dev
1929  *   Pointer to Ethernet device structure.
1930  * @param xstats_names
1931  *   Buffer to insert names into.
1932  *
1933  * @return
1934  *   Number of xstats names.
1935  */
1936 static int hinic_dev_xstats_get_names(struct rte_eth_dev *dev,
1937                                struct rte_eth_xstat_name *xstats_names,
1938                                __rte_unused unsigned int limit)
1939 {
1940         struct hinic_nic_dev *nic_dev = HINIC_ETH_DEV_TO_PRIVATE_NIC_DEV(dev);
1941         int count = 0;
1942         u16 i = 0, q_num;
1943
1944         if (xstats_names == NULL)
1945                 return hinic_xstats_calc_num(nic_dev);
1946
1947         /* get pmd rxq stats */
1948         for (q_num = 0; q_num < nic_dev->num_rq; q_num++) {
1949                 for (i = 0; i < HINIC_RXQ_XSTATS_NUM; i++) {
1950                         snprintf(xstats_names[count].name,
1951                                  sizeof(xstats_names[count].name),
1952                                  "rxq%d_%s_pmd",
1953                                  q_num, hinic_rxq_stats_strings[i].name);
1954                         count++;
1955                 }
1956         }
1957
1958         /* get pmd txq stats */
1959         for (q_num = 0; q_num < nic_dev->num_sq; q_num++) {
1960                 for (i = 0; i < HINIC_TXQ_XSTATS_NUM; i++) {
1961                         snprintf(xstats_names[count].name,
1962                                  sizeof(xstats_names[count].name),
1963                                  "txq%d_%s_pmd",
1964                                  q_num, hinic_txq_stats_strings[i].name);
1965                         count++;
1966                 }
1967         }
1968
1969         /* get vport stats */
1970         for (i = 0; i < HINIC_VPORT_XSTATS_NUM; i++) {
1971                 snprintf(xstats_names[count].name,
1972                          sizeof(xstats_names[count].name),
1973                          "%s",
1974                          hinic_vport_stats_strings[i].name);
1975                 count++;
1976         }
1977
1978         if (HINIC_IS_VF(nic_dev->hwdev))
1979                 return count;
1980
1981         /* get phy port stats */
1982         for (i = 0; i < HINIC_PHYPORT_XSTATS_NUM; i++) {
1983                 snprintf(xstats_names[count].name,
1984                          sizeof(xstats_names[count].name),
1985                          "%s",
1986                          hinic_phyport_stats_strings[i].name);
1987                 count++;
1988         }
1989
1990         return count;
1991 }
1992
1993 static int hinic_set_default_pause_feature(struct hinic_nic_dev *nic_dev)
1994 {
1995         struct nic_pause_config pause_config = {0};
1996
1997         pause_config.auto_neg = 0;
1998         pause_config.rx_pause = HINIC_DEFAUT_PAUSE_CONFIG;
1999         pause_config.tx_pause = HINIC_DEFAUT_PAUSE_CONFIG;
2000
2001         return hinic_set_pause_config(nic_dev->hwdev, pause_config);
2002 }
2003
2004 static int hinic_set_default_dcb_feature(struct hinic_nic_dev *nic_dev)
2005 {
2006         u8 up_tc[HINIC_DCB_UP_MAX] = {0};
2007         u8 up_pgid[HINIC_DCB_UP_MAX] = {0};
2008         u8 up_bw[HINIC_DCB_UP_MAX] = {0};
2009         u8 pg_bw[HINIC_DCB_UP_MAX] = {0};
2010         u8 up_strict[HINIC_DCB_UP_MAX] = {0};
2011         int i = 0;
2012
2013         pg_bw[0] = 100;
2014         for (i = 0; i < HINIC_DCB_UP_MAX; i++)
2015                 up_bw[i] = 100;
2016
2017         return hinic_dcb_set_ets(nic_dev->hwdev, up_tc, pg_bw,
2018                                         up_pgid, up_bw, up_strict);
2019 }
2020
2021 static int hinic_init_default_cos(struct hinic_nic_dev *nic_dev)
2022 {
2023         u8 cos_id = 0;
2024         int err;
2025
2026         if (!HINIC_IS_VF(nic_dev->hwdev)) {
2027                 nic_dev->default_cos =
2028                                 (hinic_global_func_id(nic_dev->hwdev) +
2029                                                 DEFAULT_BASE_COS) % NR_MAX_COS;
2030         } else {
2031                 err = hinic_vf_get_default_cos(nic_dev->hwdev, &cos_id);
2032                 if (err) {
2033                         PMD_DRV_LOG(ERR, "Get VF default cos failed, err: %d",
2034                                         err);
2035                         return HINIC_ERROR;
2036                 }
2037
2038                 nic_dev->default_cos = cos_id;
2039         }
2040
2041         return 0;
2042 }
2043
2044 static int hinic_set_default_hw_feature(struct hinic_nic_dev *nic_dev)
2045 {
2046         int err;
2047
2048         err = hinic_init_default_cos(nic_dev);
2049         if (err)
2050                 return err;
2051
2052         if (hinic_func_type(nic_dev->hwdev) == TYPE_VF)
2053                 return 0;
2054
2055         /* Restore DCB configure to default status */
2056         err = hinic_set_default_dcb_feature(nic_dev);
2057         if (err)
2058                 return err;
2059
2060         /* disable LRO */
2061         err = hinic_set_rx_lro(nic_dev->hwdev, 0, 0, (u8)0);
2062         if (err)
2063                 return err;
2064
2065         /* Set pause enable, and up will disable pfc. */
2066         err = hinic_set_default_pause_feature(nic_dev);
2067         if (err)
2068                 return err;
2069
2070         err = hinic_reset_port_link_cfg(nic_dev->hwdev);
2071         if (err)
2072                 return err;
2073
2074         err = hinic_set_link_status_follow(nic_dev->hwdev,
2075                                            HINIC_LINK_FOLLOW_PORT);
2076         if (err == HINIC_MGMT_CMD_UNSUPPORTED)
2077                 PMD_DRV_LOG(WARNING, "Don't support to set link status follow phy port status");
2078         else if (err)
2079                 return err;
2080
2081         return hinic_set_anti_attack(nic_dev->hwdev, true);
2082 }
2083
2084 static int32_t hinic_card_workmode_check(struct hinic_nic_dev *nic_dev)
2085 {
2086         struct hinic_board_info info = { 0 };
2087         int rc;
2088
2089         if (hinic_func_type(nic_dev->hwdev) == TYPE_VF)
2090                 return 0;
2091
2092         rc = hinic_get_board_info(nic_dev->hwdev, &info);
2093         if (rc)
2094                 return rc;
2095
2096         return (info.service_mode == HINIC_SERVICE_MODE_NIC ? HINIC_OK :
2097                                                 HINIC_ERROR);
2098 }
2099
2100 static int hinic_copy_mempool_init(struct hinic_nic_dev *nic_dev)
2101 {
2102         nic_dev->cpy_mpool = rte_mempool_lookup(nic_dev->proc_dev_name);
2103         if (nic_dev->cpy_mpool == NULL) {
2104                 nic_dev->cpy_mpool =
2105                 rte_pktmbuf_pool_create(nic_dev->proc_dev_name,
2106                                         HINIC_COPY_MEMPOOL_DEPTH,
2107                                         0, 0,
2108                                         HINIC_COPY_MBUF_SIZE,
2109                                         rte_socket_id());
2110                 if (!nic_dev->cpy_mpool) {
2111                         PMD_DRV_LOG(ERR, "Create copy mempool failed, errno: %d, dev_name: %s",
2112                                     rte_errno, nic_dev->proc_dev_name);
2113                         return -ENOMEM;
2114                 }
2115         }
2116
2117         return 0;
2118 }
2119
2120 static void hinic_copy_mempool_uninit(struct hinic_nic_dev *nic_dev)
2121 {
2122         if (nic_dev->cpy_mpool != NULL)
2123                 rte_mempool_free(nic_dev->cpy_mpool);
2124 }
2125
2126 static int hinic_init_sw_rxtxqs(struct hinic_nic_dev *nic_dev)
2127 {
2128         u32 txq_size;
2129         u32 rxq_size;
2130
2131         /* allocate software txq array */
2132         txq_size = nic_dev->nic_cap.max_sqs * sizeof(*nic_dev->txqs);
2133         nic_dev->txqs = kzalloc_aligned(txq_size, GFP_KERNEL);
2134         if (!nic_dev->txqs) {
2135                 PMD_DRV_LOG(ERR, "Allocate txqs failed");
2136                 return -ENOMEM;
2137         }
2138
2139         /* allocate software rxq array */
2140         rxq_size = nic_dev->nic_cap.max_rqs * sizeof(*nic_dev->rxqs);
2141         nic_dev->rxqs = kzalloc_aligned(rxq_size, GFP_KERNEL);
2142         if (!nic_dev->rxqs) {
2143                 /* free txqs */
2144                 kfree(nic_dev->txqs);
2145                 nic_dev->txqs = NULL;
2146
2147                 PMD_DRV_LOG(ERR, "Allocate rxqs failed");
2148                 return -ENOMEM;
2149         }
2150
2151         return HINIC_OK;
2152 }
2153
2154 static void hinic_deinit_sw_rxtxqs(struct hinic_nic_dev *nic_dev)
2155 {
2156         kfree(nic_dev->txqs);
2157         nic_dev->txqs = NULL;
2158
2159         kfree(nic_dev->rxqs);
2160         nic_dev->rxqs = NULL;
2161 }
2162
2163 static int hinic_nic_dev_create(struct rte_eth_dev *eth_dev)
2164 {
2165         struct hinic_nic_dev *nic_dev =
2166                                 HINIC_ETH_DEV_TO_PRIVATE_NIC_DEV(eth_dev);
2167         int rc;
2168
2169         nic_dev->hwdev = rte_zmalloc("hinic_hwdev", sizeof(*nic_dev->hwdev),
2170                                      RTE_CACHE_LINE_SIZE);
2171         if (!nic_dev->hwdev) {
2172                 PMD_DRV_LOG(ERR, "Allocate hinic hwdev memory failed, dev_name: %s",
2173                             eth_dev->data->name);
2174                 return -ENOMEM;
2175         }
2176         nic_dev->hwdev->pcidev_hdl = RTE_ETH_DEV_TO_PCI(eth_dev);
2177
2178         /* init osdep*/
2179         rc = hinic_osdep_init(nic_dev->hwdev);
2180         if (rc) {
2181                 PMD_DRV_LOG(ERR, "Initialize os_dep failed, dev_name: %s",
2182                             eth_dev->data->name);
2183                 goto init_osdep_fail;
2184         }
2185
2186         /* init_hwif */
2187         rc = hinic_hwif_res_init(nic_dev->hwdev);
2188         if (rc) {
2189                 PMD_DRV_LOG(ERR, "Initialize hwif failed, dev_name: %s",
2190                             eth_dev->data->name);
2191                 goto init_hwif_fail;
2192         }
2193
2194         /* init_cfg_mgmt */
2195         rc = init_cfg_mgmt(nic_dev->hwdev);
2196         if (rc) {
2197                 PMD_DRV_LOG(ERR, "Initialize cfg_mgmt failed, dev_name: %s",
2198                             eth_dev->data->name);
2199                 goto init_cfgmgnt_fail;
2200         }
2201
2202         /* init_aeqs */
2203         rc = hinic_comm_aeqs_init(nic_dev->hwdev);
2204         if (rc) {
2205                 PMD_DRV_LOG(ERR, "Initialize aeqs failed, dev_name: %s",
2206                             eth_dev->data->name);
2207                 goto init_aeqs_fail;
2208         }
2209
2210         /* init_pf_to_mgnt */
2211         rc = hinic_comm_pf_to_mgmt_init(nic_dev->hwdev);
2212         if (rc) {
2213                 PMD_DRV_LOG(ERR, "Initialize pf_to_mgmt failed, dev_name: %s",
2214                             eth_dev->data->name);
2215                 goto init_pf_to_mgmt_fail;
2216         }
2217
2218         /* init mailbox */
2219         rc = hinic_comm_func_to_func_init(nic_dev->hwdev);
2220         if (rc) {
2221                 PMD_DRV_LOG(ERR, "Initialize func_to_func failed, dev_name: %s",
2222                             eth_dev->data->name);
2223                 goto init_func_to_func_fail;
2224         }
2225
2226         rc = hinic_card_workmode_check(nic_dev);
2227         if (rc) {
2228                 PMD_DRV_LOG(ERR, "Check card workmode failed, dev_name: %s",
2229                             eth_dev->data->name);
2230                 goto workmode_check_fail;
2231         }
2232
2233         /* do l2nic reset to make chip clear */
2234         rc = hinic_l2nic_reset(nic_dev->hwdev);
2235         if (rc) {
2236                 PMD_DRV_LOG(ERR, "Do l2nic reset failed, dev_name: %s",
2237                             eth_dev->data->name);
2238                 goto l2nic_reset_fail;
2239         }
2240
2241         /* init dma and aeq msix attribute table */
2242         (void)hinic_init_attr_table(nic_dev->hwdev);
2243
2244         /* init_cmdqs */
2245         rc = hinic_comm_cmdqs_init(nic_dev->hwdev);
2246         if (rc) {
2247                 PMD_DRV_LOG(ERR, "Initialize cmdq failed, dev_name: %s",
2248                             eth_dev->data->name);
2249                 goto init_cmdq_fail;
2250         }
2251
2252         /* set hardware state active */
2253         rc = hinic_activate_hwdev_state(nic_dev->hwdev);
2254         if (rc) {
2255                 PMD_DRV_LOG(ERR, "Initialize resources state failed, dev_name: %s",
2256                             eth_dev->data->name);
2257                 goto init_resources_state_fail;
2258         }
2259
2260         /* init_capability */
2261         rc = hinic_init_capability(nic_dev->hwdev);
2262         if (rc) {
2263                 PMD_DRV_LOG(ERR, "Initialize capability failed, dev_name: %s",
2264                             eth_dev->data->name);
2265                 goto init_cap_fail;
2266         }
2267
2268         /* get nic capability */
2269         if (!hinic_support_nic(nic_dev->hwdev, &nic_dev->nic_cap))
2270                 goto nic_check_fail;
2271
2272         /* init root cla and function table */
2273         rc = hinic_init_nicio(nic_dev->hwdev);
2274         if (rc) {
2275                 PMD_DRV_LOG(ERR, "Initialize nic_io failed, dev_name: %s",
2276                             eth_dev->data->name);
2277                 goto init_nicio_fail;
2278         }
2279
2280         /* init_software_txrxq */
2281         rc = hinic_init_sw_rxtxqs(nic_dev);
2282         if (rc) {
2283                 PMD_DRV_LOG(ERR, "Initialize sw_rxtxqs failed, dev_name: %s",
2284                             eth_dev->data->name);
2285                 goto init_sw_rxtxqs_fail;
2286         }
2287
2288         rc = hinic_copy_mempool_init(nic_dev);
2289         if (rc) {
2290                 PMD_DRV_LOG(ERR, "Create copy mempool failed, dev_name: %s",
2291                          eth_dev->data->name);
2292                 goto init_mpool_fail;
2293         }
2294
2295         /* set hardware feature to default status */
2296         rc = hinic_set_default_hw_feature(nic_dev);
2297         if (rc) {
2298                 PMD_DRV_LOG(ERR, "Initialize hardware default features failed, dev_name: %s",
2299                             eth_dev->data->name);
2300                 goto set_default_hw_feature_fail;
2301         }
2302
2303         return 0;
2304
2305 set_default_hw_feature_fail:
2306         hinic_copy_mempool_uninit(nic_dev);
2307
2308 init_mpool_fail:
2309         hinic_deinit_sw_rxtxqs(nic_dev);
2310
2311 init_sw_rxtxqs_fail:
2312         hinic_deinit_nicio(nic_dev->hwdev);
2313
2314 nic_check_fail:
2315 init_nicio_fail:
2316 init_cap_fail:
2317         hinic_deactivate_hwdev_state(nic_dev->hwdev);
2318
2319 init_resources_state_fail:
2320         hinic_comm_cmdqs_free(nic_dev->hwdev);
2321
2322 init_cmdq_fail:
2323 l2nic_reset_fail:
2324 workmode_check_fail:
2325         hinic_comm_func_to_func_free(nic_dev->hwdev);
2326
2327 init_func_to_func_fail:
2328         hinic_comm_pf_to_mgmt_free(nic_dev->hwdev);
2329
2330 init_pf_to_mgmt_fail:
2331         hinic_comm_aeqs_free(nic_dev->hwdev);
2332
2333 init_aeqs_fail:
2334         free_cfg_mgmt(nic_dev->hwdev);
2335
2336 init_cfgmgnt_fail:
2337         hinic_hwif_res_free(nic_dev->hwdev);
2338
2339 init_hwif_fail:
2340         hinic_osdep_deinit(nic_dev->hwdev);
2341
2342 init_osdep_fail:
2343         rte_free(nic_dev->hwdev);
2344         nic_dev->hwdev = NULL;
2345
2346         return rc;
2347 }
2348
2349 static void hinic_nic_dev_destroy(struct rte_eth_dev *eth_dev)
2350 {
2351         struct hinic_nic_dev *nic_dev =
2352                         HINIC_ETH_DEV_TO_PRIVATE_NIC_DEV(eth_dev);
2353
2354         (void)hinic_set_link_status_follow(nic_dev->hwdev,
2355                                            HINIC_LINK_FOLLOW_DEFAULT);
2356         hinic_copy_mempool_uninit(nic_dev);
2357         hinic_deinit_sw_rxtxqs(nic_dev);
2358         hinic_deinit_nicio(nic_dev->hwdev);
2359         hinic_deactivate_hwdev_state(nic_dev->hwdev);
2360         hinic_comm_cmdqs_free(nic_dev->hwdev);
2361         hinic_comm_func_to_func_free(nic_dev->hwdev);
2362         hinic_comm_pf_to_mgmt_free(nic_dev->hwdev);
2363         hinic_comm_aeqs_free(nic_dev->hwdev);
2364         free_cfg_mgmt(nic_dev->hwdev);
2365         hinic_hwif_res_free(nic_dev->hwdev);
2366         hinic_osdep_deinit(nic_dev->hwdev);
2367         rte_free(nic_dev->hwdev);
2368         nic_dev->hwdev = NULL;
2369 }
2370
2371 /**
2372  * DPDK callback to close the device.
2373  *
2374  * @param dev
2375  *   Pointer to Ethernet device structure.
2376  */
2377 static void hinic_dev_close(struct rte_eth_dev *dev)
2378 {
2379         struct hinic_nic_dev *nic_dev = HINIC_ETH_DEV_TO_PRIVATE_NIC_DEV(dev);
2380
2381         if (hinic_test_and_set_bit(HINIC_DEV_CLOSE, &nic_dev->dev_status)) {
2382                 PMD_DRV_LOG(WARNING, "Device %s already closed",
2383                             dev->data->name);
2384                 return;
2385         }
2386
2387         /* stop device first */
2388         hinic_dev_stop(dev);
2389
2390         /* rx_cqe, rx_info */
2391         hinic_free_all_rx_resources(dev);
2392
2393         /* tx_info */
2394         hinic_free_all_tx_resources(dev);
2395
2396         /* free wq, pi_dma_addr */
2397         hinic_free_all_rq(nic_dev);
2398
2399         /* free wq, db_addr */
2400         hinic_free_all_sq(nic_dev);
2401
2402         /* deinit mac vlan tbl */
2403         hinic_deinit_mac_addr(dev);
2404         hinic_remove_all_vlanid(dev);
2405
2406         /* disable hardware and uio interrupt */
2407         hinic_disable_interrupt(dev);
2408
2409         /* deinit nic hardware device */
2410         hinic_nic_dev_destroy(dev);
2411 }
2412
2413 static const struct eth_dev_ops hinic_pmd_ops = {
2414         .dev_configure                 = hinic_dev_configure,
2415         .dev_infos_get                 = hinic_dev_infos_get,
2416         .rx_queue_setup                = hinic_rx_queue_setup,
2417         .tx_queue_setup                = hinic_tx_queue_setup,
2418         .dev_start                     = hinic_dev_start,
2419         .link_update                   = hinic_link_update,
2420         .rx_queue_release              = hinic_rx_queue_release,
2421         .tx_queue_release              = hinic_tx_queue_release,
2422         .dev_stop                      = hinic_dev_stop,
2423         .dev_close                     = hinic_dev_close,
2424         .vlan_filter_set               = hinic_vlan_filter_set,
2425         .vlan_offload_set              = hinic_vlan_offload_set,
2426         .promiscuous_enable            = hinic_dev_promiscuous_enable,
2427         .promiscuous_disable           = hinic_dev_promiscuous_disable,
2428         .rss_hash_update               = hinic_rss_hash_update,
2429         .rss_hash_conf_get             = hinic_rss_conf_get,
2430         .reta_update                   = hinic_rss_indirtbl_update,
2431         .reta_query                    = hinic_rss_indirtbl_query,
2432         .stats_get                     = hinic_dev_stats_get,
2433         .stats_reset                   = hinic_dev_stats_reset,
2434         .xstats_get                    = hinic_dev_xstats_get,
2435         .xstats_reset                  = hinic_dev_xstats_reset,
2436         .xstats_get_names              = hinic_dev_xstats_get_names,
2437 };
2438
2439 static const struct eth_dev_ops hinic_pmd_vf_ops = {
2440         .dev_configure                 = hinic_dev_configure,
2441         .dev_infos_get                 = hinic_dev_infos_get,
2442         .rx_queue_setup                = hinic_rx_queue_setup,
2443         .tx_queue_setup                = hinic_tx_queue_setup,
2444         .dev_start                     = hinic_dev_start,
2445         .link_update                   = hinic_link_update,
2446         .rx_queue_release              = hinic_rx_queue_release,
2447         .tx_queue_release              = hinic_tx_queue_release,
2448         .dev_stop                      = hinic_dev_stop,
2449         .dev_close                     = hinic_dev_close,
2450         .vlan_filter_set               = hinic_vlan_filter_set,
2451         .vlan_offload_set              = hinic_vlan_offload_set,
2452         .rss_hash_update               = hinic_rss_hash_update,
2453         .rss_hash_conf_get             = hinic_rss_conf_get,
2454         .reta_update                   = hinic_rss_indirtbl_update,
2455         .reta_query                    = hinic_rss_indirtbl_query,
2456         .stats_get                     = hinic_dev_stats_get,
2457         .stats_reset                   = hinic_dev_stats_reset,
2458         .xstats_get                    = hinic_dev_xstats_get,
2459         .xstats_reset                  = hinic_dev_xstats_reset,
2460         .xstats_get_names              = hinic_dev_xstats_get_names,
2461 };
2462
2463 static int hinic_func_init(struct rte_eth_dev *eth_dev)
2464 {
2465         struct rte_pci_device *pci_dev;
2466         struct rte_ether_addr *eth_addr;
2467         struct hinic_nic_dev *nic_dev;
2468         int rc;
2469
2470         pci_dev = RTE_ETH_DEV_TO_PCI(eth_dev);
2471
2472         /* EAL is SECONDARY and eth_dev is already created */
2473         if (rte_eal_process_type() != RTE_PROC_PRIMARY) {
2474                 rc = rte_intr_callback_register(&pci_dev->intr_handle,
2475                                                 hinic_dev_interrupt_handler,
2476                                                 (void *)eth_dev);
2477                 if (rc)
2478                         PMD_DRV_LOG(ERR, "Initialize %s failed in secondary process",
2479                                     eth_dev->data->name);
2480
2481                 return rc;
2482         }
2483
2484         nic_dev = HINIC_ETH_DEV_TO_PRIVATE_NIC_DEV(eth_dev);
2485         memset(nic_dev, 0, sizeof(*nic_dev));
2486
2487         snprintf(nic_dev->proc_dev_name,
2488                  sizeof(nic_dev->proc_dev_name),
2489                  "hinic-%.4x:%.2x:%.2x.%x",
2490                  pci_dev->addr.domain, pci_dev->addr.bus,
2491                  pci_dev->addr.devid, pci_dev->addr.function);
2492
2493         /* alloc mac_addrs */
2494         eth_addr = rte_zmalloc("hinic_mac", sizeof(*eth_addr), 0);
2495         if (!eth_addr) {
2496                 PMD_DRV_LOG(ERR, "Allocate ethernet addresses' memory failed, dev_name: %s",
2497                             eth_dev->data->name);
2498                 rc = -ENOMEM;
2499                 goto eth_addr_fail;
2500         }
2501         eth_dev->data->mac_addrs = eth_addr;
2502
2503         /*
2504          * Pass the information to the rte_eth_dev_close() that it should also
2505          * release the private port resources.
2506          */
2507         eth_dev->data->dev_flags |= RTE_ETH_DEV_CLOSE_REMOVE;
2508
2509         /* create hardware nic_device */
2510         rc = hinic_nic_dev_create(eth_dev);
2511         if (rc) {
2512                 PMD_DRV_LOG(ERR, "Create nic device failed, dev_name: %s",
2513                             eth_dev->data->name);
2514                 goto create_nic_dev_fail;
2515         }
2516
2517         if (HINIC_IS_VF(nic_dev->hwdev))
2518                 eth_dev->dev_ops = &hinic_pmd_vf_ops;
2519         else
2520                 eth_dev->dev_ops = &hinic_pmd_ops;
2521
2522         rc = hinic_init_mac_addr(eth_dev);
2523         if (rc) {
2524                 PMD_DRV_LOG(ERR, "Initialize mac table failed, dev_name: %s",
2525                             eth_dev->data->name);
2526                 goto init_mac_fail;
2527         }
2528
2529         /* register callback func to eal lib */
2530         rc = rte_intr_callback_register(&pci_dev->intr_handle,
2531                                         hinic_dev_interrupt_handler,
2532                                         (void *)eth_dev);
2533         if (rc) {
2534                 PMD_DRV_LOG(ERR, "Register rte interrupt callback failed, dev_name: %s",
2535                             eth_dev->data->name);
2536                 goto reg_intr_cb_fail;
2537         }
2538
2539         /* enable uio/vfio intr/eventfd mapping */
2540         rc = rte_intr_enable(&pci_dev->intr_handle);
2541         if (rc) {
2542                 PMD_DRV_LOG(ERR, "Enable rte interrupt failed, dev_name: %s",
2543                             eth_dev->data->name);
2544                 goto enable_intr_fail;
2545         }
2546         hinic_set_bit(HINIC_DEV_INTR_EN, &nic_dev->dev_status);
2547
2548         hinic_set_bit(HINIC_DEV_INIT, &nic_dev->dev_status);
2549         PMD_DRV_LOG(INFO, "Initialize %s in primary successfully",
2550                     eth_dev->data->name);
2551
2552         return 0;
2553
2554 enable_intr_fail:
2555         (void)rte_intr_callback_unregister(&pci_dev->intr_handle,
2556                                            hinic_dev_interrupt_handler,
2557                                            (void *)eth_dev);
2558
2559 reg_intr_cb_fail:
2560         hinic_deinit_mac_addr(eth_dev);
2561
2562 init_mac_fail:
2563         eth_dev->dev_ops = NULL;
2564         hinic_nic_dev_destroy(eth_dev);
2565
2566 create_nic_dev_fail:
2567         rte_free(eth_addr);
2568         eth_dev->data->mac_addrs = NULL;
2569
2570 eth_addr_fail:
2571         PMD_DRV_LOG(ERR, "Initialize %s in primary failed",
2572                     eth_dev->data->name);
2573         return rc;
2574 }
2575
2576 static int hinic_dev_init(struct rte_eth_dev *eth_dev)
2577 {
2578         struct rte_pci_device *pci_dev;
2579
2580         pci_dev = RTE_ETH_DEV_TO_PCI(eth_dev);
2581
2582         PMD_DRV_LOG(INFO, "Initializing pf hinic-%.4x:%.2x:%.2x.%x in %s process",
2583                     pci_dev->addr.domain, pci_dev->addr.bus,
2584                     pci_dev->addr.devid, pci_dev->addr.function,
2585                     (rte_eal_process_type() == RTE_PROC_PRIMARY) ?
2586                     "primary" : "secondary");
2587
2588         /* rte_eth_dev rx_burst and tx_burst */
2589         eth_dev->rx_pkt_burst = hinic_recv_pkts;
2590         eth_dev->tx_pkt_burst = hinic_xmit_pkts;
2591
2592         return hinic_func_init(eth_dev);
2593 }
2594
2595 static int hinic_dev_uninit(struct rte_eth_dev *dev)
2596 {
2597         struct hinic_nic_dev *nic_dev;
2598
2599         nic_dev = HINIC_ETH_DEV_TO_PRIVATE_NIC_DEV(dev);
2600         hinic_clear_bit(HINIC_DEV_INIT, &nic_dev->dev_status);
2601
2602         if (rte_eal_process_type() != RTE_PROC_PRIMARY)
2603                 return 0;
2604
2605         hinic_dev_close(dev);
2606
2607         dev->dev_ops = NULL;
2608         dev->rx_pkt_burst = NULL;
2609         dev->tx_pkt_burst = NULL;
2610
2611         rte_free(dev->data->mac_addrs);
2612         dev->data->mac_addrs = NULL;
2613
2614         return HINIC_OK;
2615 }
2616
2617 static struct rte_pci_id pci_id_hinic_map[] = {
2618         { RTE_PCI_DEVICE(HINIC_HUAWEI_VENDOR_ID, HINIC_DEV_ID_PRD) },
2619         { RTE_PCI_DEVICE(HINIC_HUAWEI_VENDOR_ID, HINIC_DEV_ID_MEZZ_25GE) },
2620         { RTE_PCI_DEVICE(HINIC_HUAWEI_VENDOR_ID, HINIC_DEV_ID_MEZZ_40GE) },
2621         { RTE_PCI_DEVICE(HINIC_HUAWEI_VENDOR_ID, HINIC_DEV_ID_MEZZ_100GE) },
2622         { RTE_PCI_DEVICE(HINIC_HUAWEI_VENDOR_ID, HINIC_DEV_ID_VF) },
2623         { RTE_PCI_DEVICE(HINIC_HUAWEI_VENDOR_ID, HINIC_DEV_ID_VF_HV) },
2624         { RTE_PCI_DEVICE(HINIC_HUAWEI_VENDOR_ID, HINIC_DEV_ID_1822_DUAL_25GE) },
2625         { RTE_PCI_DEVICE(HINIC_HUAWEI_VENDOR_ID, HINIC_DEV_ID_1822_100GE) },
2626         {.vendor_id = 0},
2627 };
2628
2629 static int hinic_pci_probe(struct rte_pci_driver *pci_drv __rte_unused,
2630                            struct rte_pci_device *pci_dev)
2631 {
2632         return rte_eth_dev_pci_generic_probe(pci_dev,
2633                 sizeof(struct hinic_nic_dev), hinic_dev_init);
2634 }
2635
2636 static int hinic_pci_remove(struct rte_pci_device *pci_dev)
2637 {
2638         return rte_eth_dev_pci_generic_remove(pci_dev, hinic_dev_uninit);
2639 }
2640
2641 static struct rte_pci_driver rte_hinic_pmd = {
2642         .id_table = pci_id_hinic_map,
2643         .drv_flags = RTE_PCI_DRV_NEED_MAPPING | RTE_PCI_DRV_INTR_LSC,
2644         .probe = hinic_pci_probe,
2645         .remove = hinic_pci_remove,
2646 };
2647
2648 RTE_PMD_REGISTER_PCI(net_hinic, rte_hinic_pmd);
2649 RTE_PMD_REGISTER_PCI_TABLE(net_hinic, pci_id_hinic_map);
2650
2651 RTE_INIT(hinic_init_log)
2652 {
2653         hinic_logtype = rte_log_register("pmd.net.hinic");
2654         if (hinic_logtype >= 0)
2655                 rte_log_set_level(hinic_logtype, RTE_LOG_INFO);
2656 }