drivers/net/hinic/hinic_pmd_ethdev.c

   1 /* SPDX-License-Identifier: BSD-3-Clause
   2  * Copyright(c) 2017 Huawei Technologies Co., Ltd
   3  */
   4
   5 #include <rte_pci.h>
   6 #include <rte_bus_pci.h>
   7 #include <rte_ethdev_pci.h>
   8 #include <rte_mbuf.h>
   9 #include <rte_malloc.h>
  10 #include <rte_memcpy.h>
  11 #include <rte_mempool.h>
  12 #include <rte_errno.h>
  13 #include <rte_ether.h>
  14
  15 #include "base/hinic_compat.h"
  16 #include "base/hinic_pmd_hwdev.h"
  17 #include "base/hinic_pmd_hwif.h"
  18 #include "base/hinic_pmd_wq.h"
  19 #include "base/hinic_pmd_cfg.h"
  20 #include "base/hinic_pmd_mgmt.h"
  21 #include "base/hinic_pmd_cmdq.h"
  22 #include "base/hinic_pmd_niccfg.h"
  23 #include "base/hinic_pmd_nicio.h"
  24 #include "base/hinic_pmd_mbox.h"
  25 #include "hinic_pmd_ethdev.h"
  26 #include "hinic_pmd_tx.h"
  27 #include "hinic_pmd_rx.h"
  28
  29 /* Vendor ID used by Huawei devices */
  30 #define HINIC_HUAWEI_VENDOR_ID          0x19E5
  31
  32 /* Hinic devices */
  33 #define HINIC_DEV_ID_PRD                0x1822
  34 #define HINIC_DEV_ID_VF                 0x375E
  35 #define HINIC_DEV_ID_VF_HV              0x379E
  36
  37 /* Mezz card for Blade Server */
  38 #define HINIC_DEV_ID_MEZZ_25GE          0x0210
  39 #define HINIC_DEV_ID_MEZZ_40GE          0x020D
  40 #define HINIC_DEV_ID_MEZZ_100GE         0x0205
  41
  42 /* 2*25G and 2*100G card */
  43 #define HINIC_DEV_ID_1822_DUAL_25GE     0x0206
  44 #define HINIC_DEV_ID_1822_100GE         0x0200
  45
  46 #define HINIC_SERVICE_MODE_NIC          2
  47
  48 #define HINIC_INTR_CB_UNREG_MAX_RETRIES 10
  49
  50 #define DEFAULT_BASE_COS                4
  51 #define NR_MAX_COS                      8
  52
  53 #define HINIC_MIN_RX_BUF_SIZE           1024
  54 #define HINIC_MAX_UC_MAC_ADDRS          128
  55 #define HINIC_MAX_MC_MAC_ADDRS          2048
  56 /*
  57  * vlan_id is a 12 bit number.
  58  * The VFTA array is actually a 4096 bit array, 128 of 32bit elements.
  59  * 2^5 = 32. The val of lower 5 bits specifies the bit in the 32bit element.
  60  * The higher 7 bit val specifies VFTA array index.
  61  */
  62 #define HINIC_VFTA_BIT(vlan_id)    (1 << ((vlan_id) & 0x1F))
  63 #define HINIC_VFTA_IDX(vlan_id)    ((vlan_id) >> 5)
  64
  65 #define HINIC_VLAN_FILTER_EN            (1U << 0)
  66
  67 #define HINIC_MTU_TO_PKTLEN(mtu)        \
  68         ((mtu) + ETH_HLEN + ETH_CRC_LEN)
  69
  70 #define HINIC_PKTLEN_TO_MTU(pktlen)     \
  71         ((pktlen) - (ETH_HLEN + ETH_CRC_LEN))
  72
  73 /* Driver-specific log messages type */
  74 int hinic_logtype;
  75
  76 struct hinic_xstats_name_off {
  77         char name[RTE_ETH_XSTATS_NAME_SIZE];
  78         u32  offset;
  79 };
  80
  81 #define HINIC_FUNC_STAT(_stat_item) {   \
  82         .name = #_stat_item, \
  83         .offset = offsetof(struct hinic_vport_stats, _stat_item) \
  84 }
  85
  86 #define HINIC_PORT_STAT(_stat_item) { \
  87         .name = #_stat_item, \
  88         .offset = offsetof(struct hinic_phy_port_stats, _stat_item) \
  89 }
  90
  91 static const struct hinic_xstats_name_off hinic_vport_stats_strings[] = {
  92         HINIC_FUNC_STAT(tx_unicast_pkts_vport),
  93         HINIC_FUNC_STAT(tx_unicast_bytes_vport),
  94         HINIC_FUNC_STAT(tx_multicast_pkts_vport),
  95         HINIC_FUNC_STAT(tx_multicast_bytes_vport),
  96         HINIC_FUNC_STAT(tx_broadcast_pkts_vport),
  97         HINIC_FUNC_STAT(tx_broadcast_bytes_vport),
  98
  99         HINIC_FUNC_STAT(rx_unicast_pkts_vport),
 100         HINIC_FUNC_STAT(rx_unicast_bytes_vport),
 101         HINIC_FUNC_STAT(rx_multicast_pkts_vport),
 102         HINIC_FUNC_STAT(rx_multicast_bytes_vport),
 103         HINIC_FUNC_STAT(rx_broadcast_pkts_vport),
 104         HINIC_FUNC_STAT(rx_broadcast_bytes_vport),
 105
 106         HINIC_FUNC_STAT(tx_discard_vport),
 107         HINIC_FUNC_STAT(rx_discard_vport),
 108         HINIC_FUNC_STAT(tx_err_vport),
 109         HINIC_FUNC_STAT(rx_err_vport),
 110 };
 111
 112 #define HINIC_VPORT_XSTATS_NUM (sizeof(hinic_vport_stats_strings) / \
 113                 sizeof(hinic_vport_stats_strings[0]))
 114
 115 static const struct hinic_xstats_name_off hinic_phyport_stats_strings[] = {
 116         HINIC_PORT_STAT(mac_rx_total_pkt_num),
 117         HINIC_PORT_STAT(mac_rx_total_oct_num),
 118         HINIC_PORT_STAT(mac_rx_bad_pkt_num),
 119         HINIC_PORT_STAT(mac_rx_bad_oct_num),
 120         HINIC_PORT_STAT(mac_rx_good_pkt_num),
 121         HINIC_PORT_STAT(mac_rx_good_oct_num),
 122         HINIC_PORT_STAT(mac_rx_uni_pkt_num),
 123         HINIC_PORT_STAT(mac_rx_multi_pkt_num),
 124         HINIC_PORT_STAT(mac_rx_broad_pkt_num),
 125         HINIC_PORT_STAT(mac_tx_total_pkt_num),
 126         HINIC_PORT_STAT(mac_tx_total_oct_num),
 127         HINIC_PORT_STAT(mac_tx_bad_pkt_num),
 128         HINIC_PORT_STAT(mac_tx_bad_oct_num),
 129         HINIC_PORT_STAT(mac_tx_good_pkt_num),
 130         HINIC_PORT_STAT(mac_tx_good_oct_num),
 131         HINIC_PORT_STAT(mac_tx_uni_pkt_num),
 132         HINIC_PORT_STAT(mac_tx_multi_pkt_num),
 133         HINIC_PORT_STAT(mac_tx_broad_pkt_num),
 134         HINIC_PORT_STAT(mac_rx_fragment_pkt_num),
 135         HINIC_PORT_STAT(mac_rx_undersize_pkt_num),
 136         HINIC_PORT_STAT(mac_rx_undermin_pkt_num),
 137         HINIC_PORT_STAT(mac_rx_64_oct_pkt_num),
 138         HINIC_PORT_STAT(mac_rx_65_127_oct_pkt_num),
 139         HINIC_PORT_STAT(mac_rx_128_255_oct_pkt_num),
 140         HINIC_PORT_STAT(mac_rx_256_511_oct_pkt_num),
 141         HINIC_PORT_STAT(mac_rx_512_1023_oct_pkt_num),
 142         HINIC_PORT_STAT(mac_rx_1024_1518_oct_pkt_num),
 143         HINIC_PORT_STAT(mac_rx_1519_2047_oct_pkt_num),
 144         HINIC_PORT_STAT(mac_rx_2048_4095_oct_pkt_num),
 145         HINIC_PORT_STAT(mac_rx_4096_8191_oct_pkt_num),
 146         HINIC_PORT_STAT(mac_rx_8192_9216_oct_pkt_num),
 147         HINIC_PORT_STAT(mac_rx_9217_12287_oct_pkt_num),
 148         HINIC_PORT_STAT(mac_rx_12288_16383_oct_pkt_num),
 149         HINIC_PORT_STAT(mac_rx_1519_max_bad_pkt_num),
 150         HINIC_PORT_STAT(mac_rx_1519_max_good_pkt_num),
 151         HINIC_PORT_STAT(mac_rx_oversize_pkt_num),
 152         HINIC_PORT_STAT(mac_rx_jabber_pkt_num),
 153         HINIC_PORT_STAT(mac_rx_mac_pause_num),
 154         HINIC_PORT_STAT(mac_rx_pfc_pkt_num),
 155         HINIC_PORT_STAT(mac_rx_pfc_pri0_pkt_num),
 156         HINIC_PORT_STAT(mac_rx_pfc_pri1_pkt_num),
 157         HINIC_PORT_STAT(mac_rx_pfc_pri2_pkt_num),
 158         HINIC_PORT_STAT(mac_rx_pfc_pri3_pkt_num),
 159         HINIC_PORT_STAT(mac_rx_pfc_pri4_pkt_num),
 160         HINIC_PORT_STAT(mac_rx_pfc_pri5_pkt_num),
 161         HINIC_PORT_STAT(mac_rx_pfc_pri6_pkt_num),
 162         HINIC_PORT_STAT(mac_rx_pfc_pri7_pkt_num),
 163         HINIC_PORT_STAT(mac_rx_mac_control_pkt_num),
 164         HINIC_PORT_STAT(mac_rx_sym_err_pkt_num),
 165         HINIC_PORT_STAT(mac_rx_fcs_err_pkt_num),
 166         HINIC_PORT_STAT(mac_rx_send_app_good_pkt_num),
 167         HINIC_PORT_STAT(mac_rx_send_app_bad_pkt_num),
 168         HINIC_PORT_STAT(mac_tx_fragment_pkt_num),
 169         HINIC_PORT_STAT(mac_tx_undersize_pkt_num),
 170         HINIC_PORT_STAT(mac_tx_undermin_pkt_num),
 171         HINIC_PORT_STAT(mac_tx_64_oct_pkt_num),
 172         HINIC_PORT_STAT(mac_tx_65_127_oct_pkt_num),
 173         HINIC_PORT_STAT(mac_tx_128_255_oct_pkt_num),
 174         HINIC_PORT_STAT(mac_tx_256_511_oct_pkt_num),
 175         HINIC_PORT_STAT(mac_tx_512_1023_oct_pkt_num),
 176         HINIC_PORT_STAT(mac_tx_1024_1518_oct_pkt_num),
 177         HINIC_PORT_STAT(mac_tx_1519_2047_oct_pkt_num),
 178         HINIC_PORT_STAT(mac_tx_2048_4095_oct_pkt_num),
 179         HINIC_PORT_STAT(mac_tx_4096_8191_oct_pkt_num),
 180         HINIC_PORT_STAT(mac_tx_8192_9216_oct_pkt_num),
 181         HINIC_PORT_STAT(mac_tx_9217_12287_oct_pkt_num),
 182         HINIC_PORT_STAT(mac_tx_12288_16383_oct_pkt_num),
 183         HINIC_PORT_STAT(mac_tx_1519_max_bad_pkt_num),
 184         HINIC_PORT_STAT(mac_tx_1519_max_good_pkt_num),
 185         HINIC_PORT_STAT(mac_tx_oversize_pkt_num),
 186         HINIC_PORT_STAT(mac_trans_jabber_pkt_num),
 187         HINIC_PORT_STAT(mac_tx_mac_pause_num),
 188         HINIC_PORT_STAT(mac_tx_pfc_pkt_num),
 189         HINIC_PORT_STAT(mac_tx_pfc_pri0_pkt_num),
 190         HINIC_PORT_STAT(mac_tx_pfc_pri1_pkt_num),
 191         HINIC_PORT_STAT(mac_tx_pfc_pri2_pkt_num),
 192         HINIC_PORT_STAT(mac_tx_pfc_pri3_pkt_num),
 193         HINIC_PORT_STAT(mac_tx_pfc_pri4_pkt_num),
 194         HINIC_PORT_STAT(mac_tx_pfc_pri5_pkt_num),
 195         HINIC_PORT_STAT(mac_tx_pfc_pri6_pkt_num),
 196         HINIC_PORT_STAT(mac_tx_pfc_pri7_pkt_num),
 197         HINIC_PORT_STAT(mac_tx_mac_control_pkt_num),
 198         HINIC_PORT_STAT(mac_tx_err_all_pkt_num),
 199         HINIC_PORT_STAT(mac_tx_from_app_good_pkt_num),
 200         HINIC_PORT_STAT(mac_tx_from_app_bad_pkt_num),
 201 };
 202
 203 #define HINIC_PHYPORT_XSTATS_NUM (sizeof(hinic_phyport_stats_strings) / \
 204                 sizeof(hinic_phyport_stats_strings[0]))
 205
 206 static const struct hinic_xstats_name_off hinic_rxq_stats_strings[] = {
 207         {"rx_nombuf", offsetof(struct hinic_rxq_stats, rx_nombuf)},
 208         {"burst_pkt", offsetof(struct hinic_rxq_stats, burst_pkts)},
 209 };
 210
 211 #define HINIC_RXQ_XSTATS_NUM (sizeof(hinic_rxq_stats_strings) / \
 212                 sizeof(hinic_rxq_stats_strings[0]))
 213
 214 static const struct hinic_xstats_name_off hinic_txq_stats_strings[] = {
 215         {"tx_busy", offsetof(struct hinic_txq_stats, tx_busy)},
 216         {"offload_errors", offsetof(struct hinic_txq_stats, off_errs)},
 217         {"copy_pkts", offsetof(struct hinic_txq_stats, cpy_pkts)},
 218         {"rl_drop", offsetof(struct hinic_txq_stats, rl_drop)},
 219         {"burst_pkts", offsetof(struct hinic_txq_stats, burst_pkts)},
 220 };
 221
 222 #define HINIC_TXQ_XSTATS_NUM (sizeof(hinic_txq_stats_strings) / \
 223                 sizeof(hinic_txq_stats_strings[0]))
 224
 225 static int hinic_xstats_calc_num(struct hinic_nic_dev *nic_dev)
 226 {
 227         if (HINIC_IS_VF(nic_dev->hwdev)) {
 228                 return (HINIC_VPORT_XSTATS_NUM +
 229                         HINIC_RXQ_XSTATS_NUM * nic_dev->num_rq +
 230                         HINIC_TXQ_XSTATS_NUM * nic_dev->num_sq);
 231         } else {
 232                 return (HINIC_VPORT_XSTATS_NUM +
 233                         HINIC_PHYPORT_XSTATS_NUM +
 234                         HINIC_RXQ_XSTATS_NUM * nic_dev->num_rq +
 235                         HINIC_TXQ_XSTATS_NUM * nic_dev->num_sq);
 236         }
 237 }
 238
 239 static const struct rte_eth_desc_lim hinic_rx_desc_lim = {
 240         .nb_max = HINIC_MAX_QUEUE_DEPTH,
 241         .nb_min = HINIC_MIN_QUEUE_DEPTH,
 242         .nb_align = HINIC_RXD_ALIGN,
 243 };
 244
 245 static const struct rte_eth_desc_lim hinic_tx_desc_lim = {
 246         .nb_max = HINIC_MAX_QUEUE_DEPTH,
 247         .nb_min = HINIC_MIN_QUEUE_DEPTH,
 248         .nb_align = HINIC_TXD_ALIGN,
 249 };
 250
 251 static int hinic_vlan_offload_set(struct rte_eth_dev *dev, int mask);
 252
 253 /**
 254  * Interrupt handler triggered by NIC  for handling
 255  * specific event.
 256  *
 257  * @param: The address of parameter (struct rte_eth_dev *) regsitered before.
 258  **/
 259 static void hinic_dev_interrupt_handler(void *param)
 260 {
 261         struct rte_eth_dev *dev = param;
 262         struct hinic_nic_dev *nic_dev = HINIC_ETH_DEV_TO_PRIVATE_NIC_DEV(dev);
 263
 264         if (!hinic_test_bit(HINIC_DEV_INTR_EN, &nic_dev->dev_status)) {
 265                 PMD_DRV_LOG(WARNING, "Device's interrupt is disabled, ignore interrupt event, dev_name: %s, port_id: %d",
 266                             nic_dev->proc_dev_name, dev->data->port_id);
 267                 return;
 268         }
 269
 270         /* aeq0 msg handler */
 271         hinic_dev_handle_aeq_event(nic_dev->hwdev, param);
 272 }
 273
 274 /**
 275  * Ethernet device configuration.
 276  *
 277  * Prepare the driver for a given number of TX and RX queues, mtu size
 278  * and configure RSS.
 279  *
 280  * @param dev
 281  *   Pointer to Ethernet device structure.
 282  *
 283  * @return
 284  *   0 on success, negative error value otherwise.
 285  */
 286 static int hinic_dev_configure(struct rte_eth_dev *dev)
 287 {
 288         struct hinic_nic_dev *nic_dev;
 289         struct hinic_nic_io *nic_io;
 290         int err;
 291
 292         nic_dev = HINIC_ETH_DEV_TO_PRIVATE_NIC_DEV(dev);
 293         nic_io = nic_dev->hwdev->nic_io;
 294
 295         nic_dev->num_sq =  dev->data->nb_tx_queues;
 296         nic_dev->num_rq = dev->data->nb_rx_queues;
 297
 298         nic_io->num_sqs =  dev->data->nb_tx_queues;
 299         nic_io->num_rqs = dev->data->nb_rx_queues;
 300
 301         /* queue pair is max_num(sq, rq) */
 302         nic_dev->num_qps = (nic_dev->num_sq > nic_dev->num_rq) ?
 303                         nic_dev->num_sq : nic_dev->num_rq;
 304         nic_io->num_qps = nic_dev->num_qps;
 305
 306         if (nic_dev->num_qps > nic_io->max_qps) {
 307                 PMD_DRV_LOG(ERR,
 308                         "Queue number out of range, get queue_num:%d, max_queue_num:%d",
 309                         nic_dev->num_qps, nic_io->max_qps);
 310                 return -EINVAL;
 311         }
 312
 313         /* mtu size is 256~9600 */
 314         if (dev->data->dev_conf.rxmode.max_rx_pkt_len < HINIC_MIN_FRAME_SIZE ||
 315             dev->data->dev_conf.rxmode.max_rx_pkt_len >
 316             HINIC_MAX_JUMBO_FRAME_SIZE) {
 317                 PMD_DRV_LOG(ERR,
 318                         "Max rx pkt len out of range, get max_rx_pkt_len:%d, "
 319                         "expect between %d and %d",
 320                         dev->data->dev_conf.rxmode.max_rx_pkt_len,
 321                         HINIC_MIN_FRAME_SIZE, HINIC_MAX_JUMBO_FRAME_SIZE);
 322                 return -EINVAL;
 323         }
 324
 325         nic_dev->mtu_size =
 326                 HINIC_PKTLEN_TO_MTU(dev->data->dev_conf.rxmode.max_rx_pkt_len);
 327
 328         /* rss template */
 329         err = hinic_config_mq_mode(dev, TRUE);
 330         if (err) {
 331                 PMD_DRV_LOG(ERR, "Config multi-queue failed");
 332                 return err;
 333         }
 334
 335         /* init vlan offoad */
 336         err = hinic_vlan_offload_set(dev,
 337                                 ETH_VLAN_STRIP_MASK | ETH_VLAN_FILTER_MASK);
 338         if (err) {
 339                 PMD_DRV_LOG(ERR, "Initialize vlan filter and strip failed\n");
 340                 (void)hinic_config_mq_mode(dev, FALSE);
 341                 return err;
 342         }
 343
 344         /*clear fdir filter flag in function table*/
 345         hinic_free_fdir_filter(nic_dev);
 346
 347         return HINIC_OK;
 348 }
 349
 350 /**
 351  * DPDK callback to create the receive queue.
 352  *
 353  * @param dev
 354  *   Pointer to Ethernet device structure.
 355  * @param queue_idx
 356  *   RX queue index.
 357  * @param nb_desc
 358  *   Number of descriptors for receive queue.
 359  * @param socket_id
 360  *   NUMA socket on which memory must be allocated.
 361  * @param rx_conf
 362  *   Thresholds parameters (unused_).
 363  * @param mp
 364  *   Memory pool for buffer allocations.
 365  *
 366  * @return
 367  *   0 on success, negative error value otherwise.
 368  */
 369 static int hinic_rx_queue_setup(struct rte_eth_dev *dev, uint16_t queue_idx,
 370                          uint16_t nb_desc, unsigned int socket_id,
 371                          __rte_unused const struct rte_eth_rxconf *rx_conf,
 372                          struct rte_mempool *mp)
 373 {
 374         int rc;
 375         struct hinic_nic_dev *nic_dev;
 376         struct hinic_hwdev *hwdev;
 377         struct hinic_rxq *rxq;
 378         u16 rq_depth, rx_free_thresh;
 379         u32 buf_size;
 380
 381         nic_dev = HINIC_ETH_DEV_TO_PRIVATE_NIC_DEV(dev);
 382         hwdev = nic_dev->hwdev;
 383
 384         /* queue depth must be power of 2, otherwise will be aligned up */
 385         rq_depth = (nb_desc & (nb_desc - 1)) ?
 386                 ((u16)(1U << (ilog2(nb_desc) + 1))) : nb_desc;
 387
 388         /*
 389          * Validate number of receive descriptors.
 390          * It must not exceed hardware maximum and minimum.
 391          */
 392         if (rq_depth > HINIC_MAX_QUEUE_DEPTH ||
 393                 rq_depth < HINIC_MIN_QUEUE_DEPTH) {
 394                 PMD_DRV_LOG(ERR, "RX queue depth is out of range from %d to %d, (nb_desc=%d, q_depth=%d, port=%d queue=%d)",
 395                             HINIC_MIN_QUEUE_DEPTH, HINIC_MAX_QUEUE_DEPTH,
 396                             (int)nb_desc, (int)rq_depth,
 397                             (int)dev->data->port_id, (int)queue_idx);
 398                 return -EINVAL;
 399         }
 400
 401         /*
 402          * The RX descriptor ring will be cleaned after rxq->rx_free_thresh
 403          * descriptors are used or if the number of descriptors required
 404          * to transmit a packet is greater than the number of free RX
 405          * descriptors.
 406          * The following constraints must be satisfied:
 407          *  rx_free_thresh must be greater than 0.
 408          *  rx_free_thresh must be less than the size of the ring minus 1.
 409          * When set to zero use default values.
 410          */
 411         rx_free_thresh = (u16)((rx_conf->rx_free_thresh) ?
 412                         rx_conf->rx_free_thresh : HINIC_DEFAULT_RX_FREE_THRESH);
 413         if (rx_free_thresh >= (rq_depth - 1)) {
 414                 PMD_DRV_LOG(ERR, "rx_free_thresh must be less than the number of RX descriptors minus 1. (rx_free_thresh=%u port=%d queue=%d)",
 415                             (unsigned int)rx_free_thresh,
 416                             (int)dev->data->port_id,
 417                             (int)queue_idx);
 418                 return -EINVAL;
 419         }
 420
 421         rxq = rte_zmalloc_socket("hinic_rx_queue", sizeof(struct hinic_rxq),
 422                                  RTE_CACHE_LINE_SIZE, socket_id);
 423         if (!rxq) {
 424                 PMD_DRV_LOG(ERR, "Allocate rxq[%d] failed, dev_name: %s",
 425                             queue_idx, dev->data->name);
 426                 return -ENOMEM;
 427         }
 428         nic_dev->rxqs[queue_idx] = rxq;
 429
 430         /* alloc rx sq hw wqepage*/
 431         rc = hinic_create_rq(hwdev, queue_idx, rq_depth);
 432         if (rc) {
 433                 PMD_DRV_LOG(ERR, "Create rxq[%d] failed, dev_name: %s, rq_depth: %d",
 434                             queue_idx, dev->data->name, rq_depth);
 435                 goto ceate_rq_fail;
 436         }
 437
 438         /* mbuf pool must be assigned before setup rx resources */
 439         rxq->mb_pool = mp;
 440
 441         rc =
 442         hinic_convert_rx_buf_size(rte_pktmbuf_data_room_size(rxq->mb_pool) -
 443                                   RTE_PKTMBUF_HEADROOM, &buf_size);
 444         if (rc) {
 445                 PMD_DRV_LOG(ERR, "Adjust buf size failed, dev_name: %s",
 446                             dev->data->name);
 447                 goto adjust_bufsize_fail;
 448         }
 449
 450         /* rx queue info, rearm control */
 451         rxq->wq = &hwdev->nic_io->rq_wq[queue_idx];
 452         rxq->pi_virt_addr = hwdev->nic_io->qps[queue_idx].rq.pi_virt_addr;
 453         rxq->nic_dev = nic_dev;
 454         rxq->q_id = queue_idx;
 455         rxq->q_depth = rq_depth;
 456         rxq->buf_len = (u16)buf_size;
 457         rxq->rx_free_thresh = rx_free_thresh;
 458
 459         /* the last point cant do mbuf rearm in bulk */
 460         rxq->rxinfo_align_end = rxq->q_depth - rxq->rx_free_thresh;
 461
 462         /* device port identifier */
 463         rxq->port_id = dev->data->port_id;
 464
 465         /* alloc rx_cqe and prepare rq_wqe */
 466         rc = hinic_setup_rx_resources(rxq);
 467         if (rc) {
 468                 PMD_DRV_LOG(ERR, "Setup rxq[%d] rx_resources failed, dev_name:%s",
 469                             queue_idx, dev->data->name);
 470                 goto setup_rx_res_err;
 471         }
 472
 473         /* record nic_dev rxq in rte_eth rx_queues */
 474         dev->data->rx_queues[queue_idx] = rxq;
 475
 476         return 0;
 477
 478 setup_rx_res_err:
 479 adjust_bufsize_fail:
 480         hinic_destroy_rq(hwdev, queue_idx);
 481
 482 ceate_rq_fail:
 483         rte_free(rxq);
 484
 485         return rc;
 486 }
 487
 488 static void hinic_reset_rx_queue(struct rte_eth_dev *dev)
 489 {
 490         struct hinic_rxq *rxq;
 491         struct hinic_nic_dev *nic_dev;
 492         int q_id = 0;
 493
 494         nic_dev = HINIC_ETH_DEV_TO_PRIVATE_NIC_DEV(dev);
 495
 496         for (q_id = 0; q_id < nic_dev->num_rq; q_id++) {
 497                 rxq = dev->data->rx_queues[q_id];
 498
 499                 rxq->wq->cons_idx = 0;
 500                 rxq->wq->prod_idx = 0;
 501                 rxq->wq->delta = rxq->q_depth;
 502                 rxq->wq->mask = rxq->q_depth - 1;
 503
 504                 /* alloc mbuf to rq */
 505                 hinic_rx_alloc_pkts(rxq);
 506         }
 507 }
 508
 509 /**
 510  * DPDK callback to configure the transmit queue.
 511  *
 512  * @param dev
 513  *   Pointer to Ethernet device structure.
 514  * @param queue_idx
 515  *   Transmit queue index.
 516  * @param nb_desc
 517  *   Number of descriptors for transmit queue.
 518  * @param socket_id
 519  *   NUMA socket on which memory must be allocated.
 520  * @param tx_conf
 521  *   Tx queue configuration parameters.
 522  *
 523  * @return
 524  *   0 on success, negative error value otherwise.
 525  */
 526 static int hinic_tx_queue_setup(struct rte_eth_dev *dev, uint16_t queue_idx,
 527                          uint16_t nb_desc, unsigned int socket_id,
 528                          __rte_unused const struct rte_eth_txconf *tx_conf)
 529 {
 530         int rc;
 531         struct hinic_nic_dev *nic_dev;
 532         struct hinic_hwdev *hwdev;
 533         struct hinic_txq *txq;
 534         u16 sq_depth, tx_free_thresh;
 535
 536         nic_dev = HINIC_ETH_DEV_TO_PRIVATE_NIC_DEV(dev);
 537         hwdev = nic_dev->hwdev;
 538
 539         /* queue depth must be power of 2, otherwise will be aligned up */
 540         sq_depth = (nb_desc & (nb_desc - 1)) ?
 541                         ((u16)(1U << (ilog2(nb_desc) + 1))) : nb_desc;
 542
 543         /*
 544          * Validate number of transmit descriptors.
 545          * It must not exceed hardware maximum and minimum.
 546          */
 547         if (sq_depth > HINIC_MAX_QUEUE_DEPTH ||
 548                 sq_depth < HINIC_MIN_QUEUE_DEPTH) {
 549                 PMD_DRV_LOG(ERR, "TX queue depth is out of range from %d to %d, (nb_desc=%d, q_depth=%d, port=%d queue=%d)",
 550                           HINIC_MIN_QUEUE_DEPTH, HINIC_MAX_QUEUE_DEPTH,
 551                           (int)nb_desc, (int)sq_depth,
 552                           (int)dev->data->port_id, (int)queue_idx);
 553                 return -EINVAL;
 554         }
 555
 556         /*
 557          * The TX descriptor ring will be cleaned after txq->tx_free_thresh
 558          * descriptors are used or if the number of descriptors required
 559          * to transmit a packet is greater than the number of free TX
 560          * descriptors.
 561          * The following constraints must be satisfied:
 562          *  tx_free_thresh must be greater than 0.
 563          *  tx_free_thresh must be less than the size of the ring minus 1.
 564          * When set to zero use default values.
 565          */
 566         tx_free_thresh = (u16)((tx_conf->tx_free_thresh) ?
 567                         tx_conf->tx_free_thresh : HINIC_DEFAULT_TX_FREE_THRESH);
 568         if (tx_free_thresh >= (sq_depth - 1)) {
 569                 PMD_DRV_LOG(ERR, "tx_free_thresh must be less than the number of TX descriptors minus 1. (tx_free_thresh=%u port=%d queue=%d)",
 570                         (unsigned int)tx_free_thresh, (int)dev->data->port_id,
 571                         (int)queue_idx);
 572                 return -EINVAL;
 573         }
 574
 575         txq = rte_zmalloc_socket("hinic_tx_queue", sizeof(struct hinic_txq),
 576                                  RTE_CACHE_LINE_SIZE, socket_id);
 577         if (!txq) {
 578                 PMD_DRV_LOG(ERR, "Allocate txq[%d] failed, dev_name: %s",
 579                             queue_idx, dev->data->name);
 580                 return -ENOMEM;
 581         }
 582         nic_dev->txqs[queue_idx] = txq;
 583
 584         /* alloc tx sq hw wqepage */
 585         rc = hinic_create_sq(hwdev, queue_idx, sq_depth);
 586         if (rc) {
 587                 PMD_DRV_LOG(ERR, "Create txq[%d] failed, dev_name: %s, sq_depth: %d",
 588                             queue_idx, dev->data->name, sq_depth);
 589                 goto create_sq_fail;
 590         }
 591
 592         txq->q_id = queue_idx;
 593         txq->q_depth = sq_depth;
 594         txq->port_id = dev->data->port_id;
 595         txq->tx_free_thresh = tx_free_thresh;
 596         txq->nic_dev = nic_dev;
 597         txq->wq = &hwdev->nic_io->sq_wq[queue_idx];
 598         txq->sq = &hwdev->nic_io->qps[queue_idx].sq;
 599         txq->cons_idx_addr = hwdev->nic_io->qps[queue_idx].sq.cons_idx_addr;
 600         txq->sq_head_addr = HINIC_GET_WQ_HEAD(txq);
 601         txq->sq_bot_sge_addr = HINIC_GET_WQ_TAIL(txq) -
 602                                         sizeof(struct hinic_sq_bufdesc);
 603         txq->cos = nic_dev->default_cos;
 604
 605         /* alloc software txinfo */
 606         rc = hinic_setup_tx_resources(txq);
 607         if (rc) {
 608                 PMD_DRV_LOG(ERR, "Setup txq[%d] tx_resources failed, dev_name: %s",
 609                             queue_idx, dev->data->name);
 610                 goto setup_tx_res_fail;
 611         }
 612
 613         /* record nic_dev txq in rte_eth tx_queues */
 614         dev->data->tx_queues[queue_idx] = txq;
 615
 616         return HINIC_OK;
 617
 618 setup_tx_res_fail:
 619         hinic_destroy_sq(hwdev, queue_idx);
 620
 621 create_sq_fail:
 622         rte_free(txq);
 623
 624         return rc;
 625 }
 626
 627 static void hinic_reset_tx_queue(struct rte_eth_dev *dev)
 628 {
 629         struct hinic_nic_dev *nic_dev;
 630         struct hinic_txq *txq;
 631         struct hinic_nic_io *nic_io;
 632         struct hinic_hwdev *hwdev;
 633         volatile u32 *ci_addr;
 634         int q_id = 0;
 635
 636         nic_dev = HINIC_ETH_DEV_TO_PRIVATE_NIC_DEV(dev);
 637         hwdev = nic_dev->hwdev;
 638         nic_io = hwdev->nic_io;
 639
 640         for (q_id = 0; q_id < nic_dev->num_sq; q_id++) {
 641                 txq = dev->data->tx_queues[q_id];
 642
 643                 txq->wq->cons_idx = 0;
 644                 txq->wq->prod_idx = 0;
 645                 txq->wq->delta = txq->q_depth;
 646                 txq->wq->mask  = txq->q_depth - 1;
 647
 648                 /* clear hardware ci */
 649                 ci_addr = (volatile u32 *)HINIC_CI_VADDR(nic_io->ci_vaddr_base,
 650                                                         q_id);
 651                 *ci_addr = 0;
 652         }
 653 }
 654
 655 /**
 656  * Get link speed from NIC.
 657  *
 658  * @param dev
 659  *   Pointer to Ethernet device structure.
 660  * @param speed_capa
 661  *   Pointer to link speed structure.
 662  */
 663 static void hinic_get_speed_capa(struct rte_eth_dev *dev, uint32_t *speed_capa)
 664 {
 665         struct hinic_nic_dev *nic_dev = HINIC_ETH_DEV_TO_PRIVATE_NIC_DEV(dev);
 666         u32 supported_link, advertised_link;
 667         int err;
 668
 669 #define HINIC_LINK_MODE_SUPPORT_1G      (1U << HINIC_GE_BASE_KX)
 670
 671 #define HINIC_LINK_MODE_SUPPORT_10G     (1U << HINIC_10GE_BASE_KR)
 672
 673 #define HINIC_LINK_MODE_SUPPORT_25G     ((1U << HINIC_25GE_BASE_KR_S) | \
 674                                         (1U << HINIC_25GE_BASE_CR_S) | \
 675                                         (1U << HINIC_25GE_BASE_KR) | \
 676                                         (1U << HINIC_25GE_BASE_CR))
 677
 678 #define HINIC_LINK_MODE_SUPPORT_40G     ((1U << HINIC_40GE_BASE_KR4) | \
 679                                         (1U << HINIC_40GE_BASE_CR4))
 680
 681 #define HINIC_LINK_MODE_SUPPORT_100G    ((1U << HINIC_100GE_BASE_KR4) | \
 682                                         (1U << HINIC_100GE_BASE_CR4))
 683
 684         err = hinic_get_link_mode(nic_dev->hwdev,
 685                                   &supported_link, &advertised_link);
 686         if (err || supported_link == HINIC_SUPPORTED_UNKNOWN ||
 687             advertised_link == HINIC_SUPPORTED_UNKNOWN) {
 688                 PMD_DRV_LOG(WARNING, "Get speed capability info failed, device: %s, port_id: %u",
 689                           nic_dev->proc_dev_name, dev->data->port_id);
 690         } else {
 691                 *speed_capa = 0;
 692                 if (!!(supported_link & HINIC_LINK_MODE_SUPPORT_1G))
 693                         *speed_capa |= ETH_LINK_SPEED_1G;
 694                 if (!!(supported_link & HINIC_LINK_MODE_SUPPORT_10G))
 695                         *speed_capa |= ETH_LINK_SPEED_10G;
 696                 if (!!(supported_link & HINIC_LINK_MODE_SUPPORT_25G))
 697                         *speed_capa |= ETH_LINK_SPEED_25G;
 698                 if (!!(supported_link & HINIC_LINK_MODE_SUPPORT_40G))
 699                         *speed_capa |= ETH_LINK_SPEED_40G;
 700                 if (!!(supported_link & HINIC_LINK_MODE_SUPPORT_100G))
 701                         *speed_capa |= ETH_LINK_SPEED_100G;
 702         }
 703 }
 704
 705 /**
 706  * DPDK callback to get information about the device.
 707  *
 708  * @param dev
 709  *   Pointer to Ethernet device structure.
 710  * @param info
 711  *   Pointer to Info structure output buffer.
 712  */
 713 static int
 714 hinic_dev_infos_get(struct rte_eth_dev *dev, struct rte_eth_dev_info *info)
 715 {
 716         struct hinic_nic_dev *nic_dev = HINIC_ETH_DEV_TO_PRIVATE_NIC_DEV(dev);
 717
 718         info->max_rx_queues  = nic_dev->nic_cap.max_rqs;
 719         info->max_tx_queues  = nic_dev->nic_cap.max_sqs;
 720         info->min_rx_bufsize = HINIC_MIN_RX_BUF_SIZE;
 721         info->max_rx_pktlen  = HINIC_MAX_JUMBO_FRAME_SIZE;
 722         info->max_mac_addrs  = HINIC_MAX_UC_MAC_ADDRS;
 723         info->min_mtu = HINIC_MIN_MTU_SIZE;
 724         info->max_mtu = HINIC_MAX_MTU_SIZE;
 725
 726         hinic_get_speed_capa(dev, &info->speed_capa);
 727         info->rx_queue_offload_capa = 0;
 728         info->rx_offload_capa = DEV_RX_OFFLOAD_VLAN_STRIP |
 729                                 DEV_RX_OFFLOAD_IPV4_CKSUM |
 730                                 DEV_RX_OFFLOAD_UDP_CKSUM |
 731                                 DEV_RX_OFFLOAD_TCP_CKSUM |
 732                                 DEV_RX_OFFLOAD_VLAN_FILTER |
 733                                 DEV_RX_OFFLOAD_SCATTER |
 734                                 DEV_RX_OFFLOAD_JUMBO_FRAME;
 735
 736         info->tx_queue_offload_capa = 0;
 737         info->tx_offload_capa = DEV_TX_OFFLOAD_VLAN_INSERT |
 738                                 DEV_TX_OFFLOAD_IPV4_CKSUM |
 739                                 DEV_TX_OFFLOAD_UDP_CKSUM |
 740                                 DEV_TX_OFFLOAD_TCP_CKSUM |
 741                                 DEV_TX_OFFLOAD_SCTP_CKSUM |
 742                                 DEV_TX_OFFLOAD_OUTER_IPV4_CKSUM |
 743                                 DEV_TX_OFFLOAD_TCP_TSO |
 744                                 DEV_TX_OFFLOAD_MULTI_SEGS;
 745
 746         info->hash_key_size = HINIC_RSS_KEY_SIZE;
 747         info->reta_size = HINIC_RSS_INDIR_SIZE;
 748         info->flow_type_rss_offloads = HINIC_RSS_OFFLOAD_ALL;
 749         info->rx_desc_lim = hinic_rx_desc_lim;
 750         info->tx_desc_lim = hinic_tx_desc_lim;
 751
 752         return 0;
 753 }
 754
 755 static int hinic_config_rx_mode(struct hinic_nic_dev *nic_dev, u32 rx_mode_ctrl)
 756 {
 757         int err;
 758
 759         err = hinic_set_rx_mode(nic_dev->hwdev, rx_mode_ctrl);
 760         if (err) {
 761                 PMD_DRV_LOG(ERR, "Failed to set rx mode");
 762                 return -EINVAL;
 763         }
 764         nic_dev->rx_mode_status = rx_mode_ctrl;
 765
 766         return 0;
 767 }
 768
 769
 770 static int hinic_rxtx_configure(struct rte_eth_dev *dev)
 771 {
 772         int err;
 773         struct hinic_nic_dev *nic_dev = HINIC_ETH_DEV_TO_PRIVATE_NIC_DEV(dev);
 774
 775         /* rx configure, if rss enable, need to init default configuration */
 776         err = hinic_rx_configure(dev);
 777         if (err) {
 778                 PMD_DRV_LOG(ERR, "Configure rss failed");
 779                 return err;
 780         }
 781
 782         /* rx mode init */
 783         err = hinic_config_rx_mode(nic_dev, HINIC_DEFAULT_RX_MODE);
 784         if (err) {
 785                 PMD_DRV_LOG(ERR, "Configure rx_mode:0x%x failed",
 786                         HINIC_DEFAULT_RX_MODE);
 787                 goto set_rx_mode_fail;
 788         }
 789
 790         return HINIC_OK;
 791
 792 set_rx_mode_fail:
 793         hinic_rx_remove_configure(dev);
 794
 795         return err;
 796 }
 797
 798 static void hinic_remove_rxtx_configure(struct rte_eth_dev *dev)
 799 {
 800         struct hinic_nic_dev *nic_dev = HINIC_ETH_DEV_TO_PRIVATE_NIC_DEV(dev);
 801
 802         (void)hinic_config_rx_mode(nic_dev, 0);
 803         hinic_rx_remove_configure(dev);
 804 }
 805
 806 static int hinic_priv_get_dev_link_status(struct hinic_nic_dev *nic_dev,
 807                                           struct rte_eth_link *link)
 808 {
 809         int rc;
 810         u8 port_link_status = 0;
 811         struct nic_port_info port_link_info;
 812         struct hinic_hwdev *nic_hwdev = nic_dev->hwdev;
 813         uint32_t port_speed[LINK_SPEED_MAX] = {ETH_SPEED_NUM_10M,
 814                                         ETH_SPEED_NUM_100M, ETH_SPEED_NUM_1G,
 815                                         ETH_SPEED_NUM_10G, ETH_SPEED_NUM_25G,
 816                                         ETH_SPEED_NUM_40G, ETH_SPEED_NUM_100G};
 817
 818         rc = hinic_get_link_status(nic_hwdev, &port_link_status);
 819         if (rc)
 820                 return rc;
 821
 822         if (!port_link_status) {
 823                 link->link_status = ETH_LINK_DOWN;
 824                 link->link_speed = 0;
 825                 link->link_duplex = ETH_LINK_HALF_DUPLEX;
 826                 link->link_autoneg = ETH_LINK_FIXED;
 827                 return HINIC_OK;
 828         }
 829
 830         memset(&port_link_info, 0, sizeof(port_link_info));
 831         rc = hinic_get_port_info(nic_hwdev, &port_link_info);
 832         if (rc)
 833                 return rc;
 834
 835         link->link_speed = port_speed[port_link_info.speed % LINK_SPEED_MAX];
 836         link->link_duplex = port_link_info.duplex;
 837         link->link_autoneg = port_link_info.autoneg_state;
 838         link->link_status = port_link_status;
 839
 840         return HINIC_OK;
 841 }
 842
 843 /**
 844  * DPDK callback to retrieve physical link information.
 845  *
 846  * @param dev
 847  *   Pointer to Ethernet device structure.
 848  * @param wait_to_complete
 849  *   Wait for request completion.
 850  *
 851  * @return
 852  *   0 link status changed, -1 link status not changed
 853  */
 854 static int hinic_link_update(struct rte_eth_dev *dev, int wait_to_complete)
 855 {
 856 #define CHECK_INTERVAL 10  /* 10ms */
 857 #define MAX_REPEAT_TIME 100  /* 1s (100 * 10ms) in total */
 858         int rc = HINIC_OK;
 859         struct rte_eth_link link;
 860         struct hinic_nic_dev *nic_dev = HINIC_ETH_DEV_TO_PRIVATE_NIC_DEV(dev);
 861         unsigned int rep_cnt = MAX_REPEAT_TIME;
 862
 863         memset(&link, 0, sizeof(link));
 864         do {
 865                 /* Get link status information from hardware */
 866                 rc = hinic_priv_get_dev_link_status(nic_dev, &link);
 867                 if (rc != HINIC_OK) {
 868                         link.link_speed = ETH_SPEED_NUM_NONE;
 869                         link.link_duplex = ETH_LINK_FULL_DUPLEX;
 870                         PMD_DRV_LOG(ERR, "Get link status failed");
 871                         goto out;
 872                 }
 873
 874                 if (!wait_to_complete || link.link_status)
 875                         break;
 876
 877                 rte_delay_ms(CHECK_INTERVAL);
 878         } while (rep_cnt--);
 879
 880 out:
 881         rc = rte_eth_linkstatus_set(dev, &link);
 882         return rc;
 883 }
 884
 885 /**
 886  * DPDK callback to start the device.
 887  *
 888  * @param dev
 889  *   Pointer to Ethernet device structure.
 890  *
 891  * @return
 892  *   0 on success, negative errno value on failure.
 893  */
 894 static int hinic_dev_start(struct rte_eth_dev *dev)
 895 {
 896         int rc;
 897         char *name;
 898         struct hinic_nic_dev *nic_dev;
 899
 900         nic_dev = HINIC_ETH_DEV_TO_PRIVATE_NIC_DEV(dev);
 901         name = dev->data->name;
 902
 903         /* reset rx and tx queue */
 904         hinic_reset_rx_queue(dev);
 905         hinic_reset_tx_queue(dev);
 906
 907         /* get func rx buf size */
 908         hinic_get_func_rx_buf_size(nic_dev);
 909
 910         /* init txq and rxq context */
 911         rc = hinic_init_qp_ctxts(nic_dev->hwdev);
 912         if (rc) {
 913                 PMD_DRV_LOG(ERR, "Initialize qp context failed, dev_name:%s",
 914                             name);
 915                 goto init_qp_fail;
 916         }
 917
 918         /* rss template */
 919         rc = hinic_config_mq_mode(dev, TRUE);
 920         if (rc) {
 921                 PMD_DRV_LOG(ERR, "Configure mq mode failed, dev_name: %s",
 922                             name);
 923                 goto cfg_mq_mode_fail;
 924         }
 925
 926         /* set default mtu */
 927         rc = hinic_set_port_mtu(nic_dev->hwdev, nic_dev->mtu_size);
 928         if (rc) {
 929                 PMD_DRV_LOG(ERR, "Set mtu_size[%d] failed, dev_name: %s",
 930                             nic_dev->mtu_size, name);
 931                 goto set_mtu_fail;
 932         }
 933
 934         /* configure rss rx_mode and other rx or tx default feature */
 935         rc = hinic_rxtx_configure(dev);
 936         if (rc) {
 937                 PMD_DRV_LOG(ERR, "Configure tx and rx failed, dev_name: %s",
 938                             name);
 939                 goto cfg_rxtx_fail;
 940         }
 941
 942         /* reactive pf status, so that uP report asyn event */
 943         hinic_set_pf_status(nic_dev->hwdev->hwif, HINIC_PF_STATUS_ACTIVE_FLAG);
 944
 945         /* open virtual port and ready to start packet receiving */
 946         rc = hinic_set_vport_enable(nic_dev->hwdev, true);
 947         if (rc) {
 948                 PMD_DRV_LOG(ERR, "Enable vport failed, dev_name:%s", name);
 949                 goto en_vport_fail;
 950         }
 951
 952         /* open physical port and start packet receiving */
 953         rc = hinic_set_port_enable(nic_dev->hwdev, true);
 954         if (rc) {
 955                 PMD_DRV_LOG(ERR, "Enable physical port failed, dev_name:%s",
 956                             name);
 957                 goto en_port_fail;
 958         }
 959
 960         /* update eth_dev link status */
 961         if (dev->data->dev_conf.intr_conf.lsc != 0)
 962                 (void)hinic_link_update(dev, 0);
 963
 964         hinic_set_bit(HINIC_DEV_START, &nic_dev->dev_status);
 965
 966         return 0;
 967
 968 en_port_fail:
 969         (void)hinic_set_vport_enable(nic_dev->hwdev, false);
 970
 971 en_vport_fail:
 972         hinic_set_pf_status(nic_dev->hwdev->hwif, HINIC_PF_STATUS_INIT);
 973
 974         /* Flush tx && rx chip resources in case of set vport fake fail */
 975         (void)hinic_flush_qp_res(nic_dev->hwdev);
 976         rte_delay_ms(100);
 977
 978         hinic_remove_rxtx_configure(dev);
 979
 980 cfg_rxtx_fail:
 981 set_mtu_fail:
 982 cfg_mq_mode_fail:
 983         hinic_free_qp_ctxts(nic_dev->hwdev);
 984
 985 init_qp_fail:
 986         hinic_free_all_rx_mbuf(dev);
 987         hinic_free_all_tx_mbuf(dev);
 988
 989         return rc;
 990 }
 991
 992 /**
 993  * DPDK callback to release the receive queue.
 994  *
 995  * @param queue
 996  *   Generic receive queue pointer.
 997  */
 998 static void hinic_rx_queue_release(void *queue)
 999 {
1000         struct hinic_rxq *rxq = queue;
1001         struct hinic_nic_dev *nic_dev;
1002
1003         if (!rxq) {
1004                 PMD_DRV_LOG(WARNING, "Rxq is null when release");
1005                 return;
1006         }
1007         nic_dev = rxq->nic_dev;
1008
1009         /* free rxq_pkt mbuf */
1010         hinic_free_all_rx_skbs(rxq);
1011
1012         /* free rxq_cqe, rxq_info */
1013         hinic_free_rx_resources(rxq);
1014
1015         /* free root rq wq */
1016         hinic_destroy_rq(nic_dev->hwdev, rxq->q_id);
1017
1018         nic_dev->rxqs[rxq->q_id] = NULL;
1019
1020         /* free rxq */
1021         rte_free(rxq);
1022 }
1023
1024 /**
1025  * DPDK callback to release the transmit queue.
1026  *
1027  * @param queue
1028  *   Generic transmit queue pointer.
1029  */
1030 static void hinic_tx_queue_release(void *queue)
1031 {
1032         struct hinic_txq *txq = queue;
1033         struct hinic_nic_dev *nic_dev;
1034
1035         if (!txq) {
1036                 PMD_DRV_LOG(WARNING, "Txq is null when release");
1037                 return;
1038         }
1039         nic_dev = txq->nic_dev;
1040
1041         /* free txq_pkt mbuf */
1042         hinic_free_all_tx_skbs(txq);
1043
1044         /* free txq_info */
1045         hinic_free_tx_resources(txq);
1046
1047         /* free root sq wq */
1048         hinic_destroy_sq(nic_dev->hwdev, txq->q_id);
1049         nic_dev->txqs[txq->q_id] = NULL;
1050
1051         /* free txq */
1052         rte_free(txq);
1053 }
1054
1055 static void hinic_free_all_rq(struct hinic_nic_dev *nic_dev)
1056 {
1057         u16 q_id;
1058
1059         for (q_id = 0; q_id < nic_dev->num_rq; q_id++)
1060                 hinic_destroy_rq(nic_dev->hwdev, q_id);
1061 }
1062
1063 static void hinic_free_all_sq(struct hinic_nic_dev *nic_dev)
1064 {
1065         u16 q_id;
1066
1067         for (q_id = 0; q_id < nic_dev->num_sq; q_id++)
1068                 hinic_destroy_sq(nic_dev->hwdev, q_id);
1069 }
1070
1071 /**
1072  * DPDK callback to stop the device.
1073  *
1074  * @param dev
1075  *   Pointer to Ethernet device structure.
1076  */
1077 static void hinic_dev_stop(struct rte_eth_dev *dev)
1078 {
1079         int rc;
1080         char *name;
1081         uint16_t port_id;
1082         struct hinic_nic_dev *nic_dev;
1083         struct rte_eth_link link;
1084
1085         nic_dev = HINIC_ETH_DEV_TO_PRIVATE_NIC_DEV(dev);
1086         name = dev->data->name;
1087         port_id = dev->data->port_id;
1088
1089         if (!hinic_test_and_clear_bit(HINIC_DEV_START, &nic_dev->dev_status)) {
1090                 PMD_DRV_LOG(INFO, "Device %s already stopped", name);
1091                 return;
1092         }
1093
1094         /* just stop phy port and vport */
1095         rc = hinic_set_port_enable(nic_dev->hwdev, false);
1096         if (rc)
1097                 PMD_DRV_LOG(WARNING, "Disable phy port failed, error: %d, dev_name:%s, port_id:%d",
1098                           rc, name, port_id);
1099
1100         rc = hinic_set_vport_enable(nic_dev->hwdev, false);
1101         if (rc)
1102                 PMD_DRV_LOG(WARNING, "Disable vport failed, error: %d, dev_name:%s, port_id:%d",
1103                           rc, name, port_id);
1104
1105         /* Clear recorded link status */
1106         memset(&link, 0, sizeof(link));
1107         (void)rte_eth_linkstatus_set(dev, &link);
1108
1109         /* flush pending io request */
1110         rc = hinic_rx_tx_flush(nic_dev->hwdev);
1111         if (rc)
1112                 PMD_DRV_LOG(WARNING, "Flush pending io failed, error: %d, dev_name: %s, port_id: %d",
1113                             rc, name, port_id);
1114
1115         /* clean rss table and rx_mode */
1116         hinic_remove_rxtx_configure(dev);
1117
1118         /* clean root context */
1119         hinic_free_qp_ctxts(nic_dev->hwdev);
1120
1121         hinic_free_fdir_filter(nic_dev);
1122
1123         /* free mbuf */
1124         hinic_free_all_rx_mbuf(dev);
1125         hinic_free_all_tx_mbuf(dev);
1126 }
1127
1128 static void hinic_disable_interrupt(struct rte_eth_dev *dev)
1129 {
1130         struct hinic_nic_dev *nic_dev = HINIC_ETH_DEV_TO_PRIVATE_NIC_DEV(dev);
1131         struct rte_pci_device *pci_dev = RTE_ETH_DEV_TO_PCI(dev);
1132         int ret, retries = 0;
1133
1134         hinic_clear_bit(HINIC_DEV_INTR_EN, &nic_dev->dev_status);
1135
1136         /* disable msix interrupt in hardware */
1137         hinic_set_msix_state(nic_dev->hwdev, 0, HINIC_MSIX_DISABLE);
1138
1139         /* disable rte interrupt */
1140         ret = rte_intr_disable(&pci_dev->intr_handle);
1141         if (ret)
1142                 PMD_DRV_LOG(ERR, "Disable intr failed: %d", ret);
1143
1144         do {
1145                 ret =
1146                 rte_intr_callback_unregister(&pci_dev->intr_handle,
1147                                              hinic_dev_interrupt_handler, dev);
1148                 if (ret >= 0) {
1149                         break;
1150                 } else if (ret == -EAGAIN) {
1151                         rte_delay_ms(100);
1152                         retries++;
1153                 } else {
1154                         PMD_DRV_LOG(ERR, "intr callback unregister failed: %d",
1155                                     ret);
1156                         break;
1157                 }
1158         } while (retries < HINIC_INTR_CB_UNREG_MAX_RETRIES);
1159
1160         if (retries == HINIC_INTR_CB_UNREG_MAX_RETRIES)
1161                 PMD_DRV_LOG(ERR, "Unregister intr callback failed after %d retries",
1162                             retries);
1163 }
1164
1165 static int hinic_set_dev_promiscuous(struct hinic_nic_dev *nic_dev, bool enable)
1166 {
1167         u32 rx_mode_ctrl = nic_dev->rx_mode_status;
1168
1169         if (enable)
1170                 rx_mode_ctrl |= HINIC_RX_MODE_PROMISC;
1171         else
1172                 rx_mode_ctrl &= (~HINIC_RX_MODE_PROMISC);
1173
1174         return hinic_config_rx_mode(nic_dev, rx_mode_ctrl);
1175 }
1176
1177 /**
1178  * DPDK callback to get device statistics.
1179  *
1180  * @param dev
1181  *   Pointer to Ethernet device structure.
1182  * @param stats
1183  *   Stats structure output buffer.
1184  *
1185  * @return
1186  *   0 on success and stats is filled,
1187  *   negative error value otherwise.
1188  */
1189 static int
1190 hinic_dev_stats_get(struct rte_eth_dev *dev, struct rte_eth_stats *stats)
1191 {
1192         int i, err, q_num;
1193         u64 rx_discards_pmd = 0;
1194         struct hinic_nic_dev *nic_dev = HINIC_ETH_DEV_TO_PRIVATE_NIC_DEV(dev);
1195         struct hinic_vport_stats vport_stats;
1196         struct hinic_rxq        *rxq = NULL;
1197         struct hinic_rxq_stats rxq_stats;
1198         struct hinic_txq        *txq = NULL;
1199         struct hinic_txq_stats txq_stats;
1200
1201         err = hinic_get_vport_stats(nic_dev->hwdev, &vport_stats);
1202         if (err) {
1203                 PMD_DRV_LOG(ERR, "Get vport stats from fw failed, nic_dev: %s",
1204                         nic_dev->proc_dev_name);
1205                 return err;
1206         }
1207
1208         /* rx queue stats */
1209         q_num = (nic_dev->num_rq < RTE_ETHDEV_QUEUE_STAT_CNTRS) ?
1210                         nic_dev->num_rq : RTE_ETHDEV_QUEUE_STAT_CNTRS;
1211         for (i = 0; i < q_num; i++) {
1212                 rxq = nic_dev->rxqs[i];
1213                 hinic_rxq_get_stats(rxq, &rxq_stats);
1214                 stats->q_ipackets[i] = rxq_stats.packets;
1215                 stats->q_ibytes[i] = rxq_stats.bytes;
1216                 stats->q_errors[i] = rxq_stats.rx_discards;
1217
1218                 stats->ierrors += rxq_stats.errors;
1219                 rx_discards_pmd += rxq_stats.rx_discards;
1220                 dev->data->rx_mbuf_alloc_failed += rxq_stats.rx_nombuf;
1221         }
1222
1223         /* tx queue stats */
1224         q_num = (nic_dev->num_sq < RTE_ETHDEV_QUEUE_STAT_CNTRS) ?
1225                 nic_dev->num_sq : RTE_ETHDEV_QUEUE_STAT_CNTRS;
1226         for (i = 0; i < q_num; i++) {
1227                 txq = nic_dev->txqs[i];
1228                 hinic_txq_get_stats(txq, &txq_stats);
1229                 stats->q_opackets[i] = txq_stats.packets;
1230                 stats->q_obytes[i] = txq_stats.bytes;
1231                 stats->oerrors += (txq_stats.tx_busy + txq_stats.off_errs);
1232         }
1233
1234         /* vport stats */
1235         stats->oerrors += vport_stats.tx_discard_vport;
1236
1237         stats->imissed = vport_stats.rx_discard_vport + rx_discards_pmd;
1238
1239         stats->ipackets = (vport_stats.rx_unicast_pkts_vport +
1240                         vport_stats.rx_multicast_pkts_vport +
1241                         vport_stats.rx_broadcast_pkts_vport -
1242                         rx_discards_pmd);
1243
1244         stats->opackets = (vport_stats.tx_unicast_pkts_vport +
1245                         vport_stats.tx_multicast_pkts_vport +
1246                         vport_stats.tx_broadcast_pkts_vport);
1247
1248         stats->ibytes = (vport_stats.rx_unicast_bytes_vport +
1249                         vport_stats.rx_multicast_bytes_vport +
1250                         vport_stats.rx_broadcast_bytes_vport);
1251
1252         stats->obytes = (vport_stats.tx_unicast_bytes_vport +
1253                         vport_stats.tx_multicast_bytes_vport +
1254                         vport_stats.tx_broadcast_bytes_vport);
1255         return 0;
1256 }
1257
1258 /**
1259  * DPDK callback to clear device statistics.
1260  *
1261  * @param dev
1262  *   Pointer to Ethernet device structure.
1263  */
1264 static int hinic_dev_stats_reset(struct rte_eth_dev *dev)
1265 {
1266         int qid;
1267         struct hinic_rxq        *rxq = NULL;
1268         struct hinic_txq        *txq = NULL;
1269         struct hinic_nic_dev *nic_dev = HINIC_ETH_DEV_TO_PRIVATE_NIC_DEV(dev);
1270         int ret;
1271
1272         ret = hinic_clear_vport_stats(nic_dev->hwdev);
1273         if (ret != 0)
1274                 return ret;
1275
1276         for (qid = 0; qid < nic_dev->num_rq; qid++) {
1277                 rxq = nic_dev->rxqs[qid];
1278                 hinic_rxq_stats_reset(rxq);
1279         }
1280
1281         for (qid = 0; qid < nic_dev->num_sq; qid++) {
1282                 txq = nic_dev->txqs[qid];
1283                 hinic_txq_stats_reset(txq);
1284         }
1285
1286         return 0;
1287 }
1288
1289 /**
1290  * DPDK callback to clear device extended statistics.
1291  *
1292  * @param dev
1293  *   Pointer to Ethernet device structure.
1294  */
1295 static int hinic_dev_xstats_reset(struct rte_eth_dev *dev)
1296 {
1297         struct hinic_nic_dev *nic_dev = HINIC_ETH_DEV_TO_PRIVATE_NIC_DEV(dev);
1298         int ret;
1299
1300         ret = hinic_dev_stats_reset(dev);
1301         if (ret != 0)
1302                 return ret;
1303
1304         if (hinic_func_type(nic_dev->hwdev) != TYPE_VF) {
1305                 ret = hinic_clear_phy_port_stats(nic_dev->hwdev);
1306                 if (ret != 0)
1307                         return ret;
1308         }
1309
1310         return 0;
1311 }
1312
1313 static void hinic_gen_random_mac_addr(struct rte_ether_addr *mac_addr)
1314 {
1315         uint64_t random_value;
1316
1317         /* Set Organizationally Unique Identifier (OUI) prefix */
1318         mac_addr->addr_bytes[0] = 0x00;
1319         mac_addr->addr_bytes[1] = 0x09;
1320         mac_addr->addr_bytes[2] = 0xC0;
1321         /* Force indication of locally assigned MAC address. */
1322         mac_addr->addr_bytes[0] |= RTE_ETHER_LOCAL_ADMIN_ADDR;
1323         /* Generate the last 3 bytes of the MAC address with a random number. */
1324         random_value = rte_rand();
1325         memcpy(&mac_addr->addr_bytes[3], &random_value, 3);
1326 }
1327
1328 /**
1329  * Init mac_vlan table in NIC.
1330  *
1331  * @param dev
1332  *   Pointer to Ethernet device structure.
1333  *
1334  * @return
1335  *   0 on success and stats is filled,
1336  *   negative error value otherwise.
1337  */
1338 static int hinic_init_mac_addr(struct rte_eth_dev *eth_dev)
1339 {
1340         struct hinic_nic_dev *nic_dev =
1341                                 HINIC_ETH_DEV_TO_PRIVATE_NIC_DEV(eth_dev);
1342         uint8_t addr_bytes[RTE_ETHER_ADDR_LEN];
1343         u16 func_id = 0;
1344         int rc = 0;
1345
1346         rc = hinic_get_default_mac(nic_dev->hwdev, addr_bytes);
1347         if (rc)
1348                 return rc;
1349
1350         rte_ether_addr_copy((struct rte_ether_addr *)addr_bytes,
1351                 &eth_dev->data->mac_addrs[0]);
1352         if (rte_is_zero_ether_addr(&eth_dev->data->mac_addrs[0]))
1353                 hinic_gen_random_mac_addr(&eth_dev->data->mac_addrs[0]);
1354
1355         func_id = hinic_global_func_id(nic_dev->hwdev);
1356         rc = hinic_set_mac(nic_dev->hwdev,
1357                         eth_dev->data->mac_addrs[0].addr_bytes,
1358                         0, func_id);
1359         if (rc && rc != HINIC_PF_SET_VF_ALREADY)
1360                 return rc;
1361
1362         rte_ether_addr_copy(&eth_dev->data->mac_addrs[0],
1363                         &nic_dev->default_addr);
1364
1365         return 0;
1366 }
1367
1368 static void hinic_delete_mc_addr_list(struct hinic_nic_dev *nic_dev)
1369 {
1370         u16 func_id;
1371         u32 i;
1372
1373         func_id = hinic_global_func_id(nic_dev->hwdev);
1374
1375         for (i = 0; i < HINIC_MAX_MC_MAC_ADDRS; i++) {
1376                 if (rte_is_zero_ether_addr(&nic_dev->mc_list[i]))
1377                         break;
1378
1379                 hinic_del_mac(nic_dev->hwdev, nic_dev->mc_list[i].addr_bytes,
1380                               0, func_id);
1381                 memset(&nic_dev->mc_list[i], 0, sizeof(struct rte_ether_addr));
1382         }
1383 }
1384
1385 /**
1386  * Deinit mac_vlan table in NIC.
1387  *
1388  * @param dev
1389  *   Pointer to Ethernet device structure.
1390  *
1391  * @return
1392  *   0 on success and stats is filled,
1393  *   negative error value otherwise.
1394  */
1395 static void hinic_deinit_mac_addr(struct rte_eth_dev *eth_dev)
1396 {
1397         struct hinic_nic_dev *nic_dev =
1398                                 HINIC_ETH_DEV_TO_PRIVATE_NIC_DEV(eth_dev);
1399         u16 func_id = 0;
1400         int rc;
1401         int i;
1402
1403         func_id = hinic_global_func_id(nic_dev->hwdev);
1404
1405         for (i = 0; i < HINIC_MAX_UC_MAC_ADDRS; i++) {
1406                 if (rte_is_zero_ether_addr(&eth_dev->data->mac_addrs[i]))
1407                         continue;
1408
1409                 rc = hinic_del_mac(nic_dev->hwdev,
1410                                    eth_dev->data->mac_addrs[i].addr_bytes,
1411                                    0, func_id);
1412                 if (rc && rc != HINIC_PF_SET_VF_ALREADY)
1413                         PMD_DRV_LOG(ERR, "Delete mac table failed, dev_name: %s",
1414                                     eth_dev->data->name);
1415
1416                 memset(&eth_dev->data->mac_addrs[i], 0,
1417                        sizeof(struct rte_ether_addr));
1418         }
1419
1420         /* delete multicast mac addrs */
1421         hinic_delete_mc_addr_list(nic_dev);
1422 }
1423
1424 static int hinic_dev_set_mtu(struct rte_eth_dev *dev, uint16_t mtu)
1425 {
1426         int ret = 0;
1427         struct hinic_nic_dev *nic_dev = HINIC_ETH_DEV_TO_PRIVATE_NIC_DEV(dev);
1428
1429         PMD_DRV_LOG(INFO, "Set port mtu, port_id: %d, mtu: %d, max_pkt_len: %d",
1430                         dev->data->port_id, mtu, HINIC_MTU_TO_PKTLEN(mtu));
1431
1432         if (mtu < HINIC_MIN_MTU_SIZE || mtu > HINIC_MAX_MTU_SIZE) {
1433                 PMD_DRV_LOG(ERR, "Invalid mtu: %d, must between %d and %d",
1434                                 mtu, HINIC_MIN_MTU_SIZE, HINIC_MAX_MTU_SIZE);
1435                 return -EINVAL;
1436         }
1437
1438         ret = hinic_set_port_mtu(nic_dev->hwdev, mtu);
1439         if (ret) {
1440                 PMD_DRV_LOG(ERR, "Set port mtu failed, ret: %d", ret);
1441                 return ret;
1442         }
1443
1444         /* update max frame size */
1445         dev->data->dev_conf.rxmode.max_rx_pkt_len = HINIC_MTU_TO_PKTLEN(mtu);
1446         nic_dev->mtu_size = mtu;
1447
1448         return ret;
1449 }
1450
1451 static void hinic_store_vlan_filter(struct hinic_nic_dev *nic_dev,
1452                                         u16 vlan_id, bool on)
1453 {
1454         u32 vid_idx, vid_bit;
1455
1456         vid_idx = HINIC_VFTA_IDX(vlan_id);
1457         vid_bit = HINIC_VFTA_BIT(vlan_id);
1458
1459         if (on)
1460                 nic_dev->vfta[vid_idx] |= vid_bit;
1461         else
1462                 nic_dev->vfta[vid_idx] &= ~vid_bit;
1463 }
1464
1465 static bool hinic_find_vlan_filter(struct hinic_nic_dev *nic_dev,
1466                                 uint16_t vlan_id)
1467 {
1468         u32 vid_idx, vid_bit;
1469
1470         vid_idx = HINIC_VFTA_IDX(vlan_id);
1471         vid_bit = HINIC_VFTA_BIT(vlan_id);
1472
1473         return (nic_dev->vfta[vid_idx] & vid_bit) ? TRUE : FALSE;
1474 }
1475
1476 /**
1477  * DPDK callback to set vlan filter.
1478  *
1479  * @param dev
1480  *   Pointer to Ethernet device structure.
1481  * @param vlan_id
1482  *   vlan id is used to filter vlan packets
1483  * @param enable
1484  *   enable disable or enable vlan filter function
1485  */
1486 static int hinic_vlan_filter_set(struct rte_eth_dev *dev,
1487                                 uint16_t vlan_id, int enable)
1488 {
1489         struct hinic_nic_dev *nic_dev = HINIC_ETH_DEV_TO_PRIVATE_NIC_DEV(dev);
1490         int err = 0;
1491         u16 func_id;
1492
1493         if (vlan_id > RTE_ETHER_MAX_VLAN_ID)
1494                 return -EINVAL;
1495
1496         func_id = hinic_global_func_id(nic_dev->hwdev);
1497
1498         if (enable) {
1499                 /* If vlanid is already set, just return */
1500                 if (hinic_find_vlan_filter(nic_dev, vlan_id)) {
1501                         PMD_DRV_LOG(INFO, "Vlan %u has been added, device: %s",
1502                                   vlan_id, nic_dev->proc_dev_name);
1503                         return 0;
1504                 }
1505
1506                 err = hinic_add_remove_vlan(nic_dev->hwdev, vlan_id,
1507                                             func_id, TRUE);
1508         } else {
1509                 /* If vlanid can't be found, just return */
1510                 if (!hinic_find_vlan_filter(nic_dev, vlan_id)) {
1511                         PMD_DRV_LOG(INFO, "Vlan %u is not in the vlan filter list, device: %s",
1512                                   vlan_id, nic_dev->proc_dev_name);
1513                         return 0;
1514                 }
1515
1516                 err = hinic_add_remove_vlan(nic_dev->hwdev, vlan_id,
1517                                             func_id, FALSE);
1518         }
1519
1520         if (err) {
1521                 PMD_DRV_LOG(ERR, "%s vlan failed, func_id: %d, vlan_id: %d, err: %d",
1522                       enable ? "Add" : "Remove", func_id, vlan_id, err);
1523                 return err;
1524         }
1525
1526         hinic_store_vlan_filter(nic_dev, vlan_id, enable);
1527
1528         PMD_DRV_LOG(INFO, "%s vlan %u succeed, device: %s",
1529                   enable ? "Add" : "Remove", vlan_id, nic_dev->proc_dev_name);
1530         return 0;
1531 }
1532
1533 /**
1534  * DPDK callback to enable or disable vlan offload.
1535  *
1536  * @param dev
1537  *   Pointer to Ethernet device structure.
1538  * @param mask
1539  *   Definitions used for VLAN setting
1540  */
1541 static int hinic_vlan_offload_set(struct rte_eth_dev *dev, int mask)
1542 {
1543         struct hinic_nic_dev *nic_dev = HINIC_ETH_DEV_TO_PRIVATE_NIC_DEV(dev);
1544         struct rte_eth_rxmode *rxmode = &dev->data->dev_conf.rxmode;
1545         bool on;
1546         int err;
1547
1548         /* Enable or disable VLAN filter */
1549         if (mask & ETH_VLAN_FILTER_MASK) {
1550                 on = (rxmode->offloads & DEV_RX_OFFLOAD_VLAN_FILTER) ?
1551                         TRUE : FALSE;
1552                 err = hinic_config_vlan_filter(nic_dev->hwdev, on);
1553                 if (err == HINIC_MGMT_CMD_UNSUPPORTED) {
1554                         PMD_DRV_LOG(WARNING,
1555                                 "Current matching version does not support vlan filter configuration, device: %s, port_id: %d",
1556                                   nic_dev->proc_dev_name, dev->data->port_id);
1557                 } else if (err) {
1558                         PMD_DRV_LOG(ERR, "Failed to %s vlan filter, device: %s, port_id: %d, err: %d",
1559                                   on ? "enable" : "disable",
1560                                   nic_dev->proc_dev_name,
1561                                   dev->data->port_id, err);
1562                         return err;
1563                 }
1564
1565                 PMD_DRV_LOG(INFO, "%s vlan filter succeed, device: %s, port_id: %d",
1566                           on ? "Enable" : "Disable",
1567                           nic_dev->proc_dev_name, dev->data->port_id);
1568         }
1569
1570         /* Enable or disable VLAN stripping */
1571         if (mask & ETH_VLAN_STRIP_MASK) {
1572                 on = (rxmode->offloads & DEV_RX_OFFLOAD_VLAN_STRIP) ?
1573                         TRUE : FALSE;
1574                 err = hinic_set_rx_vlan_offload(nic_dev->hwdev, on);
1575                 if (err) {
1576                         PMD_DRV_LOG(ERR, "Failed to %s vlan strip, device: %s, port_id: %d, err: %d",
1577                                   on ? "enable" : "disable",
1578                                   nic_dev->proc_dev_name,
1579                                   dev->data->port_id, err);
1580                         return err;
1581                 }
1582
1583                 PMD_DRV_LOG(INFO, "%s vlan strip succeed, device: %s, port_id: %d",
1584                           on ? "Enable" : "Disable",
1585                           nic_dev->proc_dev_name, dev->data->port_id);
1586         }
1587
1588         if (mask & ETH_VLAN_EXTEND_MASK) {
1589                 PMD_DRV_LOG(ERR, "Don't support vlan qinq, device: %s, port_id: %d",
1590                           nic_dev->proc_dev_name, dev->data->port_id);
1591                 return -ENOTSUP;
1592         }
1593
1594         return 0;
1595 }
1596
1597 static void hinic_remove_all_vlanid(struct rte_eth_dev *eth_dev)
1598 {
1599         struct hinic_nic_dev *nic_dev =
1600                 HINIC_ETH_DEV_TO_PRIVATE_NIC_DEV(eth_dev);
1601         u16 func_id;
1602         int i;
1603
1604         func_id = hinic_global_func_id(nic_dev->hwdev);
1605         for (i = 0; i <= RTE_ETHER_MAX_VLAN_ID; i++) {
1606                 /* If can't find it, continue */
1607                 if (!hinic_find_vlan_filter(nic_dev, i))
1608                         continue;
1609
1610                 (void)hinic_add_remove_vlan(nic_dev->hwdev, i, func_id, FALSE);
1611                 hinic_store_vlan_filter(nic_dev, i, false);
1612         }
1613 }
1614
1615 static int hinic_set_dev_allmulticast(struct hinic_nic_dev *nic_dev,
1616                                 bool enable)
1617 {
1618         u32 rx_mode_ctrl = nic_dev->rx_mode_status;
1619
1620         if (enable)
1621                 rx_mode_ctrl |= HINIC_RX_MODE_MC_ALL;
1622         else
1623                 rx_mode_ctrl &= (~HINIC_RX_MODE_MC_ALL);
1624
1625         return hinic_config_rx_mode(nic_dev, rx_mode_ctrl);
1626 }
1627
1628 /**
1629  * DPDK callback to enable allmulticast mode.
1630  *
1631  * @param dev
1632  *   Pointer to Ethernet device structure.
1633  *
1634  * @return
1635  *   0 on success,
1636  *   negative error value otherwise.
1637  */
1638 static int hinic_dev_allmulticast_enable(struct rte_eth_dev *dev)
1639 {
1640         int ret = HINIC_OK;
1641         struct hinic_nic_dev *nic_dev = HINIC_ETH_DEV_TO_PRIVATE_NIC_DEV(dev);
1642
1643         ret = hinic_set_dev_allmulticast(nic_dev, true);
1644         if (ret) {
1645                 PMD_DRV_LOG(ERR, "Enable allmulticast failed, error: %d", ret);
1646                 return ret;
1647         }
1648
1649         PMD_DRV_LOG(INFO, "Enable allmulticast succeed, nic_dev: %s, port_id: %d",
1650                 nic_dev->proc_dev_name, dev->data->port_id);
1651         return 0;
1652 }
1653
1654 /**
1655  * DPDK callback to disable allmulticast mode.
1656  *
1657  * @param dev
1658  *   Pointer to Ethernet device structure.
1659  *
1660  * @return
1661  *   0 on success,
1662  *   negative error value otherwise.
1663  */
1664 static int hinic_dev_allmulticast_disable(struct rte_eth_dev *dev)
1665 {
1666         int ret = HINIC_OK;
1667         struct hinic_nic_dev *nic_dev = HINIC_ETH_DEV_TO_PRIVATE_NIC_DEV(dev);
1668
1669         ret = hinic_set_dev_allmulticast(nic_dev, false);
1670         if (ret) {
1671                 PMD_DRV_LOG(ERR, "Disable allmulticast failed, error: %d", ret);
1672                 return ret;
1673         }
1674
1675         PMD_DRV_LOG(INFO, "Disable allmulticast succeed, nic_dev: %s, port_id: %d",
1676                 nic_dev->proc_dev_name, dev->data->port_id);
1677         return 0;
1678 }
1679
1680 /**
1681  * DPDK callback to enable promiscuous mode.
1682  *
1683  * @param dev
1684  *   Pointer to Ethernet device structure.
1685  *
1686  * @return
1687  *   0 on success,
1688  *   negative error value otherwise.
1689  */
1690 static int hinic_dev_promiscuous_enable(struct rte_eth_dev *dev)
1691 {
1692         int rc = HINIC_OK;
1693         struct hinic_nic_dev *nic_dev = HINIC_ETH_DEV_TO_PRIVATE_NIC_DEV(dev);
1694
1695         PMD_DRV_LOG(INFO, "Enable promiscuous, nic_dev: %s, port_id: %d, promisc: %d",
1696                     nic_dev->proc_dev_name, dev->data->port_id,
1697                     dev->data->promiscuous);
1698
1699         rc = hinic_set_dev_promiscuous(nic_dev, true);
1700         if (rc)
1701                 PMD_DRV_LOG(ERR, "Enable promiscuous failed");
1702
1703         return rc;
1704 }
1705
1706 /**
1707  * DPDK callback to disable promiscuous mode.
1708  *
1709  * @param dev
1710  *   Pointer to Ethernet device structure.
1711  *
1712  * @return
1713  *   0 on success,
1714  *   negative error value otherwise.
1715  */
1716 static int hinic_dev_promiscuous_disable(struct rte_eth_dev *dev)
1717 {
1718         int rc = HINIC_OK;
1719         struct hinic_nic_dev *nic_dev = HINIC_ETH_DEV_TO_PRIVATE_NIC_DEV(dev);
1720
1721         PMD_DRV_LOG(INFO, "Disable promiscuous, nic_dev: %s, port_id: %d, promisc: %d",
1722                     nic_dev->proc_dev_name, dev->data->port_id,
1723                     dev->data->promiscuous);
1724
1725         rc = hinic_set_dev_promiscuous(nic_dev, false);
1726         if (rc)
1727                 PMD_DRV_LOG(ERR, "Disable promiscuous failed");
1728
1729         return rc;
1730 }
1731
1732 /**
1733  * DPDK callback to update the RSS hash key and RSS hash type.
1734  *
1735  * @param dev
1736  *   Pointer to Ethernet device structure.
1737  * @param rss_conf
1738  *   RSS configuration data.
1739  *
1740  * @return
1741  *   0 on success, negative error value otherwise.
1742  */
1743 static int hinic_rss_hash_update(struct rte_eth_dev *dev,
1744                           struct rte_eth_rss_conf *rss_conf)
1745 {
1746         struct hinic_nic_dev *nic_dev = HINIC_ETH_DEV_TO_PRIVATE_NIC_DEV(dev);
1747         u8 tmpl_idx = nic_dev->rss_tmpl_idx;
1748         u8 hashkey[HINIC_RSS_KEY_SIZE] = {0};
1749         u8 prio_tc[HINIC_DCB_UP_MAX] = {0};
1750         u64 rss_hf = rss_conf->rss_hf;
1751         struct nic_rss_type rss_type = {0};
1752         int err = 0;
1753
1754         if (!(nic_dev->flags & ETH_MQ_RX_RSS_FLAG)) {
1755                 PMD_DRV_LOG(WARNING, "RSS is not enabled");
1756                 return HINIC_OK;
1757         }
1758
1759         if (rss_conf->rss_key_len > HINIC_RSS_KEY_SIZE) {
1760                 PMD_DRV_LOG(ERR, "Invalid rss key, rss_key_len:%d",
1761                             rss_conf->rss_key_len);
1762                 return HINIC_ERROR;
1763         }
1764
1765         if (rss_conf->rss_key) {
1766                 memcpy(hashkey, rss_conf->rss_key, rss_conf->rss_key_len);
1767                 err = hinic_rss_set_template_tbl(nic_dev->hwdev, tmpl_idx,
1768                                                  hashkey);
1769                 if (err) {
1770                         PMD_DRV_LOG(ERR, "Set rss template table failed");
1771                         goto disable_rss;
1772                 }
1773         }
1774
1775         rss_type.ipv4 = (rss_hf & (ETH_RSS_IPV4 | ETH_RSS_FRAG_IPV4)) ? 1 : 0;
1776         rss_type.tcp_ipv4 = (rss_hf & ETH_RSS_NONFRAG_IPV4_TCP) ? 1 : 0;
1777         rss_type.ipv6 = (rss_hf & (ETH_RSS_IPV6 | ETH_RSS_FRAG_IPV6)) ? 1 : 0;
1778         rss_type.ipv6_ext = (rss_hf & ETH_RSS_IPV6_EX) ? 1 : 0;
1779         rss_type.tcp_ipv6 = (rss_hf & ETH_RSS_NONFRAG_IPV6_TCP) ? 1 : 0;
1780         rss_type.tcp_ipv6_ext = (rss_hf & ETH_RSS_IPV6_TCP_EX) ? 1 : 0;
1781         rss_type.udp_ipv4 = (rss_hf & ETH_RSS_NONFRAG_IPV4_UDP) ? 1 : 0;
1782         rss_type.udp_ipv6 = (rss_hf & ETH_RSS_NONFRAG_IPV6_UDP) ? 1 : 0;
1783
1784         err = hinic_set_rss_type(nic_dev->hwdev, tmpl_idx, rss_type);
1785         if (err) {
1786                 PMD_DRV_LOG(ERR, "Set rss type table failed");
1787                 goto disable_rss;
1788         }
1789
1790         return 0;
1791
1792 disable_rss:
1793         memset(prio_tc, 0, sizeof(prio_tc));
1794         (void)hinic_rss_cfg(nic_dev->hwdev, 0, tmpl_idx, 0, prio_tc);
1795         return err;
1796 }
1797
1798 /**
1799  * DPDK callback to get the RSS hash configuration.
1800  *
1801  * @param dev
1802  *   Pointer to Ethernet device structure.
1803  * @param rss_conf
1804  *   RSS configuration data.
1805  *
1806  * @return
1807  *   0 on success, negative error value otherwise.
1808  */
1809 static int hinic_rss_conf_get(struct rte_eth_dev *dev,
1810                        struct rte_eth_rss_conf *rss_conf)
1811 {
1812         struct hinic_nic_dev *nic_dev = HINIC_ETH_DEV_TO_PRIVATE_NIC_DEV(dev);
1813         u8 tmpl_idx = nic_dev->rss_tmpl_idx;
1814         u8 hashkey[HINIC_RSS_KEY_SIZE] = {0};
1815         struct nic_rss_type rss_type = {0};
1816         int err;
1817
1818         if (!(nic_dev->flags & ETH_MQ_RX_RSS_FLAG)) {
1819                 PMD_DRV_LOG(WARNING, "RSS is not enabled");
1820                 return HINIC_ERROR;
1821         }
1822
1823         err = hinic_rss_get_template_tbl(nic_dev->hwdev, tmpl_idx, hashkey);
1824         if (err)
1825                 return err;
1826
1827         if (rss_conf->rss_key &&
1828             rss_conf->rss_key_len >= HINIC_RSS_KEY_SIZE) {
1829                 memcpy(rss_conf->rss_key, hashkey, sizeof(hashkey));
1830                 rss_conf->rss_key_len = sizeof(hashkey);
1831         }
1832
1833         err = hinic_get_rss_type(nic_dev->hwdev, tmpl_idx, &rss_type);
1834         if (err)
1835                 return err;
1836
1837         rss_conf->rss_hf = 0;
1838         rss_conf->rss_hf |=  rss_type.ipv4 ?
1839                 (ETH_RSS_IPV4 | ETH_RSS_FRAG_IPV4) : 0;
1840         rss_conf->rss_hf |=  rss_type.tcp_ipv4 ? ETH_RSS_NONFRAG_IPV4_TCP : 0;
1841         rss_conf->rss_hf |=  rss_type.ipv6 ?
1842                 (ETH_RSS_IPV6 | ETH_RSS_FRAG_IPV6) : 0;
1843         rss_conf->rss_hf |=  rss_type.ipv6_ext ? ETH_RSS_IPV6_EX : 0;
1844         rss_conf->rss_hf |=  rss_type.tcp_ipv6 ? ETH_RSS_NONFRAG_IPV6_TCP : 0;
1845         rss_conf->rss_hf |=  rss_type.tcp_ipv6_ext ? ETH_RSS_IPV6_TCP_EX : 0;
1846         rss_conf->rss_hf |=  rss_type.udp_ipv4 ? ETH_RSS_NONFRAG_IPV4_UDP : 0;
1847         rss_conf->rss_hf |=  rss_type.udp_ipv6 ? ETH_RSS_NONFRAG_IPV6_UDP : 0;
1848
1849         return HINIC_OK;
1850 }
1851
1852 /**
1853  * DPDK callback to update the RETA indirection table.
1854  *
1855  * @param dev
1856  *   Pointer to Ethernet device structure.
1857  * @param reta_conf
1858  *   Pointer to RETA configuration structure array.
1859  * @param reta_size
1860  *   Size of the RETA table.
1861  *
1862  * @return
1863  *   0 on success, negative error value otherwise.
1864  */
1865 static int hinic_rss_indirtbl_update(struct rte_eth_dev *dev,
1866                               struct rte_eth_rss_reta_entry64 *reta_conf,
1867                               uint16_t reta_size)
1868 {
1869         struct hinic_nic_dev *nic_dev = HINIC_ETH_DEV_TO_PRIVATE_NIC_DEV(dev);
1870         u8 tmpl_idx = nic_dev->rss_tmpl_idx;
1871         u8 prio_tc[HINIC_DCB_UP_MAX] = {0};
1872         u32 indirtbl[NIC_RSS_INDIR_SIZE] = {0};
1873         int err = 0;
1874         u16 i = 0;
1875         u16 idx, shift;
1876
1877         if (!(nic_dev->flags & ETH_MQ_RX_RSS_FLAG))
1878                 return HINIC_OK;
1879
1880         if (reta_size != NIC_RSS_INDIR_SIZE) {
1881                 PMD_DRV_LOG(ERR, "Invalid reta size, reta_size:%d", reta_size);
1882                 return HINIC_ERROR;
1883         }
1884
1885         err = hinic_rss_get_indir_tbl(nic_dev->hwdev, tmpl_idx, indirtbl);
1886         if (err)
1887                 return err;
1888
1889         /* update rss indir_tbl */
1890         for (i = 0; i < reta_size; i++) {
1891                 idx = i / RTE_RETA_GROUP_SIZE;
1892                 shift = i % RTE_RETA_GROUP_SIZE;
1893                 if (reta_conf[idx].mask & (1ULL << shift))
1894                         indirtbl[i] = reta_conf[idx].reta[shift];
1895         }
1896
1897         for (i = 0 ; i < reta_size; i++) {
1898                 if (indirtbl[i] >= nic_dev->num_rq) {
1899                         PMD_DRV_LOG(ERR, "Invalid reta entry, index:%d, num_rq:%d",
1900                                     i, nic_dev->num_rq);
1901                         goto disable_rss;
1902                 }
1903         }
1904
1905         err = hinic_rss_set_indir_tbl(nic_dev->hwdev, tmpl_idx, indirtbl);
1906         if (err)
1907                 goto disable_rss;
1908
1909         nic_dev->rss_indir_flag = true;
1910
1911         return 0;
1912
1913 disable_rss:
1914         memset(prio_tc, 0, sizeof(prio_tc));
1915         (void)hinic_rss_cfg(nic_dev->hwdev, 0, tmpl_idx, 0, prio_tc);
1916
1917         return HINIC_ERROR;
1918 }
1919
1920
1921 /**
1922  * DPDK callback to get the RETA indirection table.
1923  *
1924  * @param dev
1925  *   Pointer to Ethernet device structure.
1926  * @param reta_conf
1927  *   Pointer to RETA configuration structure array.
1928  * @param reta_size
1929  *   Size of the RETA table.
1930  *
1931  * @return
1932  *   0 on success, negative error value otherwise.
1933  */
1934 static int hinic_rss_indirtbl_query(struct rte_eth_dev *dev,
1935                              struct rte_eth_rss_reta_entry64 *reta_conf,
1936                              uint16_t reta_size)
1937 {
1938         struct hinic_nic_dev *nic_dev = HINIC_ETH_DEV_TO_PRIVATE_NIC_DEV(dev);
1939         u8 tmpl_idx = nic_dev->rss_tmpl_idx;
1940         int err = 0;
1941         u32 indirtbl[NIC_RSS_INDIR_SIZE] = {0};
1942         u16 idx, shift;
1943         u16 i = 0;
1944
1945         if (reta_size != NIC_RSS_INDIR_SIZE) {
1946                 PMD_DRV_LOG(ERR, "Invalid reta size, reta_size:%d", reta_size);
1947                 return HINIC_ERROR;
1948         }
1949
1950         err = hinic_rss_get_indir_tbl(nic_dev->hwdev, tmpl_idx, indirtbl);
1951         if (err) {
1952                 PMD_DRV_LOG(ERR, "Get rss indirect table failed, error:%d",
1953                             err);
1954                 return err;
1955         }
1956
1957         for (i = 0; i < reta_size; i++) {
1958                 idx = i / RTE_RETA_GROUP_SIZE;
1959                 shift = i % RTE_RETA_GROUP_SIZE;
1960                 if (reta_conf[idx].mask & (1ULL << shift))
1961                         reta_conf[idx].reta[shift] = (uint16_t)indirtbl[i];
1962         }
1963
1964         return HINIC_OK;
1965 }
1966
1967 /**
1968  * DPDK callback to get extended device statistics.
1969  *
1970  * @param dev
1971  *   Pointer to Ethernet device.
1972  * @param xstats
1973  *   Pointer to rte extended stats table.
1974  * @param n
1975  *   The size of the stats table.
1976  *
1977  * @return
1978  *   Number of extended stats on success and stats is filled,
1979  *   negative error value otherwise.
1980  */
1981 static int hinic_dev_xstats_get(struct rte_eth_dev *dev,
1982                          struct rte_eth_xstat *xstats,
1983                          unsigned int n)
1984 {
1985         u16 qid = 0;
1986         u32 i;
1987         int err, count;
1988         struct hinic_nic_dev *nic_dev;
1989         struct hinic_phy_port_stats port_stats;
1990         struct hinic_vport_stats vport_stats;
1991         struct hinic_rxq        *rxq = NULL;
1992         struct hinic_rxq_stats rxq_stats;
1993         struct hinic_txq        *txq = NULL;
1994         struct hinic_txq_stats txq_stats;
1995
1996         nic_dev = HINIC_ETH_DEV_TO_PRIVATE_NIC_DEV(dev);
1997         count = hinic_xstats_calc_num(nic_dev);
1998         if ((int)n < count)
1999                 return count;
2000
2001         count = 0;
2002
2003         /* Get stats from hinic_rxq_stats */
2004         for (qid = 0; qid < nic_dev->num_rq; qid++) {
2005                 rxq = nic_dev->rxqs[qid];
2006                 hinic_rxq_get_stats(rxq, &rxq_stats);
2007
2008                 for (i = 0; i < HINIC_RXQ_XSTATS_NUM; i++) {
2009                         xstats[count].value =
2010                                 *(uint64_t *)(((char *)&rxq_stats) +
2011                                 hinic_rxq_stats_strings[i].offset);
2012                         xstats[count].id = count;
2013                         count++;
2014                 }
2015         }
2016
2017         /* Get stats from hinic_txq_stats */
2018         for (qid = 0; qid < nic_dev->num_sq; qid++) {
2019                 txq = nic_dev->txqs[qid];
2020                 hinic_txq_get_stats(txq, &txq_stats);
2021
2022                 for (i = 0; i < HINIC_TXQ_XSTATS_NUM; i++) {
2023                         xstats[count].value =
2024                                 *(uint64_t *)(((char *)&txq_stats) +
2025                                 hinic_txq_stats_strings[i].offset);
2026                         xstats[count].id = count;
2027                         count++;
2028                 }
2029         }
2030
2031         /* Get stats from hinic_vport_stats */
2032         err = hinic_get_vport_stats(nic_dev->hwdev, &vport_stats);
2033         if (err)
2034                 return err;
2035
2036         for (i = 0; i < HINIC_VPORT_XSTATS_NUM; i++) {
2037                 xstats[count].value =
2038                         *(uint64_t *)(((char *)&vport_stats) +
2039                         hinic_vport_stats_strings[i].offset);
2040                 xstats[count].id = count;
2041                 count++;
2042         }
2043
2044         if (HINIC_IS_VF(nic_dev->hwdev))
2045                 return count;
2046
2047         /* Get stats from hinic_phy_port_stats */
2048         err = hinic_get_phy_port_stats(nic_dev->hwdev, &port_stats);
2049         if (err)
2050                 return err;
2051
2052         for (i = 0; i < HINIC_PHYPORT_XSTATS_NUM; i++) {
2053                 xstats[count].value = *(uint64_t *)(((char *)&port_stats) +
2054                                 hinic_phyport_stats_strings[i].offset);
2055                 xstats[count].id = count;
2056                 count++;
2057         }
2058
2059         return count;
2060 }
2061
2062 /**
2063  * DPDK callback to retrieve names of extended device statistics
2064  *
2065  * @param dev
2066  *   Pointer to Ethernet device structure.
2067  * @param xstats_names
2068  *   Buffer to insert names into.
2069  *
2070  * @return
2071  *   Number of xstats names.
2072  */
2073 static int hinic_dev_xstats_get_names(struct rte_eth_dev *dev,
2074                                struct rte_eth_xstat_name *xstats_names,
2075                                __rte_unused unsigned int limit)
2076 {
2077         struct hinic_nic_dev *nic_dev = HINIC_ETH_DEV_TO_PRIVATE_NIC_DEV(dev);
2078         int count = 0;
2079         u16 i = 0, q_num;
2080
2081         if (xstats_names == NULL)
2082                 return hinic_xstats_calc_num(nic_dev);
2083
2084         /* get pmd rxq stats */
2085         for (q_num = 0; q_num < nic_dev->num_rq; q_num++) {
2086                 for (i = 0; i < HINIC_RXQ_XSTATS_NUM; i++) {
2087                         snprintf(xstats_names[count].name,
2088                                  sizeof(xstats_names[count].name),
2089                                  "rxq%d_%s_pmd",
2090                                  q_num, hinic_rxq_stats_strings[i].name);
2091                         count++;
2092                 }
2093         }
2094
2095         /* get pmd txq stats */
2096         for (q_num = 0; q_num < nic_dev->num_sq; q_num++) {
2097                 for (i = 0; i < HINIC_TXQ_XSTATS_NUM; i++) {
2098                         snprintf(xstats_names[count].name,
2099                                  sizeof(xstats_names[count].name),
2100                                  "txq%d_%s_pmd",
2101                                  q_num, hinic_txq_stats_strings[i].name);
2102                         count++;
2103                 }
2104         }
2105
2106         /* get vport stats */
2107         for (i = 0; i < HINIC_VPORT_XSTATS_NUM; i++) {
2108                 snprintf(xstats_names[count].name,
2109                          sizeof(xstats_names[count].name),
2110                          "%s",
2111                          hinic_vport_stats_strings[i].name);
2112                 count++;
2113         }
2114
2115         if (HINIC_IS_VF(nic_dev->hwdev))
2116                 return count;
2117
2118         /* get phy port stats */
2119         for (i = 0; i < HINIC_PHYPORT_XSTATS_NUM; i++) {
2120                 snprintf(xstats_names[count].name,
2121                          sizeof(xstats_names[count].name),
2122                          "%s",
2123                          hinic_phyport_stats_strings[i].name);
2124                 count++;
2125         }
2126
2127         return count;
2128 }
2129 /**
2130  *  DPDK callback to set mac address
2131  *
2132  * @param dev
2133  *   Pointer to Ethernet device structure.
2134  * @param addr
2135  *   Pointer to mac address
2136  * @return
2137  *   0 on success, negative error value otherwise.
2138  */
2139 static int hinic_set_mac_addr(struct rte_eth_dev *dev,
2140                               struct rte_ether_addr *addr)
2141 {
2142         struct hinic_nic_dev *nic_dev = HINIC_ETH_DEV_TO_PRIVATE_NIC_DEV(dev);
2143         u16 func_id;
2144         int err;
2145
2146         func_id = hinic_global_func_id(nic_dev->hwdev);
2147         err = hinic_update_mac(nic_dev->hwdev, nic_dev->default_addr.addr_bytes,
2148                                addr->addr_bytes, 0, func_id);
2149         if (err)
2150                 return err;
2151
2152         rte_ether_addr_copy(addr, &nic_dev->default_addr);
2153
2154         PMD_DRV_LOG(INFO, "Set new mac address %02x:%02x:%02x:%02x:%02x:%02x\n",
2155                     addr->addr_bytes[0], addr->addr_bytes[1],
2156                     addr->addr_bytes[2], addr->addr_bytes[3],
2157                     addr->addr_bytes[4], addr->addr_bytes[5]);
2158
2159         return 0;
2160 }
2161
2162 /**
2163  * DPDK callback to remove a MAC address.
2164  *
2165  * @param dev
2166  *   Pointer to Ethernet device structure.
2167  * @param index
2168  *   MAC address index.
2169  */
2170 static void hinic_mac_addr_remove(struct rte_eth_dev *dev, uint32_t index)
2171 {
2172         struct hinic_nic_dev *nic_dev = HINIC_ETH_DEV_TO_PRIVATE_NIC_DEV(dev);
2173         u16 func_id;
2174         int ret;
2175
2176         if (index >= HINIC_MAX_UC_MAC_ADDRS) {
2177                 PMD_DRV_LOG(INFO, "Remove mac index(%u) is out of range",
2178                             index);
2179                 return;
2180         }
2181
2182         func_id = hinic_global_func_id(nic_dev->hwdev);
2183         ret = hinic_del_mac(nic_dev->hwdev,
2184                             dev->data->mac_addrs[index].addr_bytes, 0, func_id);
2185         if (ret)
2186                 return;
2187
2188         memset(&dev->data->mac_addrs[index], 0, sizeof(struct rte_ether_addr));
2189 }
2190
2191 /**
2192  * DPDK callback to add a MAC address.
2193  *
2194  * @param dev
2195  *   Pointer to Ethernet device structure.
2196  * @param mac_addr
2197  *   MAC address to register.
2198  * @param index
2199  *   MAC address index.
2200  * @param vmdq
2201  *   VMDq pool index to associate address with (ignored).
2202  *
2203  * @return
2204  *   0 on success, a negative errno value otherwise and rte_errno is set.
2205  */
2206
2207 static int hinic_mac_addr_add(struct rte_eth_dev *dev,
2208                               struct rte_ether_addr *mac_addr, uint32_t index,
2209                               __rte_unused uint32_t vmdq)
2210 {
2211         struct hinic_nic_dev  *nic_dev = HINIC_ETH_DEV_TO_PRIVATE_NIC_DEV(dev);
2212         unsigned int i;
2213         u16 func_id;
2214         int ret;
2215
2216         if (index >= HINIC_MAX_UC_MAC_ADDRS) {
2217                 PMD_DRV_LOG(INFO, "Add mac index(%u) is out of range,", index);
2218                 return -EINVAL;
2219         }
2220
2221         /* First, make sure this address isn't already configured. */
2222         for (i = 0; (i != HINIC_MAX_UC_MAC_ADDRS); ++i) {
2223                 /* Skip this index, it's going to be reconfigured. */
2224                 if (i == index)
2225                         continue;
2226
2227                 if (memcmp(&dev->data->mac_addrs[i],
2228                         mac_addr, sizeof(*mac_addr)))
2229                         continue;
2230
2231                 PMD_DRV_LOG(INFO, "MAC address already configured");
2232                 return -EADDRINUSE;
2233         }
2234
2235         func_id = hinic_global_func_id(nic_dev->hwdev);
2236         ret = hinic_set_mac(nic_dev->hwdev, mac_addr->addr_bytes, 0, func_id);
2237         if (ret)
2238                 return ret;
2239
2240         dev->data->mac_addrs[index] = *mac_addr;
2241         return 0;
2242 }
2243
2244 /**
2245  *  DPDK callback to set multicast mac address
2246  *
2247  * @param dev
2248  *   Pointer to Ethernet device structure.
2249  * @param mc_addr_set
2250  *   Pointer to multicast mac address
2251  * @param nb_mc_addr
2252  *   mc addr count
2253  * @return
2254  *   0 on success, negative error value otherwise.
2255  */
2256 static int hinic_set_mc_addr_list(struct rte_eth_dev *dev,
2257                                   struct rte_ether_addr *mc_addr_set,
2258                                   uint32_t nb_mc_addr)
2259 {
2260         struct hinic_nic_dev *nic_dev = HINIC_ETH_DEV_TO_PRIVATE_NIC_DEV(dev);
2261         u16 func_id;
2262         int ret;
2263         u32 i;
2264
2265         func_id = hinic_global_func_id(nic_dev->hwdev);
2266
2267         /* delete old multi_cast addrs firstly */
2268         hinic_delete_mc_addr_list(nic_dev);
2269
2270         if (nb_mc_addr > HINIC_MAX_MC_MAC_ADDRS)
2271                 goto allmulti;
2272
2273         for (i = 0; i < nb_mc_addr; i++) {
2274                 ret = hinic_set_mac(nic_dev->hwdev, mc_addr_set[i].addr_bytes,
2275                                     0, func_id);
2276                 /* if add mc addr failed, set all multi_cast */
2277                 if (ret) {
2278                         hinic_delete_mc_addr_list(nic_dev);
2279                         goto allmulti;
2280                 }
2281
2282                 rte_ether_addr_copy(&mc_addr_set[i], &nic_dev->mc_list[i]);
2283         }
2284
2285         return 0;
2286
2287 allmulti:
2288         hinic_dev_allmulticast_enable(dev);
2289
2290         return 0;
2291 }
2292
2293 /**
2294  * DPDK callback to manage filter operations
2295  *
2296  * @param dev
2297  *   Pointer to Ethernet device structure.
2298  * @param filter_type
2299  *   Filter type.
2300  * @param filter_op
2301  *   Operation to perform.
2302  * @param arg
2303  *   Pointer to operation-specific structure.
2304  *
2305  * @return
2306  *   0 on success, negative errno value on failure.
2307  */
2308 static int hinic_dev_filter_ctrl(struct rte_eth_dev *dev,
2309                      enum rte_filter_type filter_type,
2310                      enum rte_filter_op filter_op,
2311                      void *arg)
2312 {
2313         struct hinic_nic_dev *nic_dev = HINIC_ETH_DEV_TO_PRIVATE_NIC_DEV(dev);
2314         int func_id = hinic_global_func_id(nic_dev->hwdev);
2315
2316         switch (filter_type) {
2317         case RTE_ETH_FILTER_GENERIC:
2318                 if (filter_op != RTE_ETH_FILTER_GET)
2319                         return -EINVAL;
2320                 *(const void **)arg = &hinic_flow_ops;
2321                 break;
2322         default:
2323                 PMD_DRV_LOG(INFO, "Filter type (%d) not supported",
2324                         filter_type);
2325                 return -EINVAL;
2326         }
2327
2328         PMD_DRV_LOG(INFO, "Set filter_ctrl succeed, func_id: 0x%x, filter_type: 0x%x,"
2329                         "filter_op: 0x%x.", func_id, filter_type, filter_op);
2330         return 0;
2331 }
2332
2333 static int hinic_set_default_pause_feature(struct hinic_nic_dev *nic_dev)
2334 {
2335         struct nic_pause_config pause_config = {0};
2336
2337         pause_config.auto_neg = 0;
2338         pause_config.rx_pause = HINIC_DEFAUT_PAUSE_CONFIG;
2339         pause_config.tx_pause = HINIC_DEFAUT_PAUSE_CONFIG;
2340
2341         return hinic_set_pause_config(nic_dev->hwdev, pause_config);
2342 }
2343
2344 static int hinic_set_default_dcb_feature(struct hinic_nic_dev *nic_dev)
2345 {
2346         u8 up_tc[HINIC_DCB_UP_MAX] = {0};
2347         u8 up_pgid[HINIC_DCB_UP_MAX] = {0};
2348         u8 up_bw[HINIC_DCB_UP_MAX] = {0};
2349         u8 pg_bw[HINIC_DCB_UP_MAX] = {0};
2350         u8 up_strict[HINIC_DCB_UP_MAX] = {0};
2351         int i = 0;
2352
2353         pg_bw[0] = 100;
2354         for (i = 0; i < HINIC_DCB_UP_MAX; i++)
2355                 up_bw[i] = 100;
2356
2357         return hinic_dcb_set_ets(nic_dev->hwdev, up_tc, pg_bw,
2358                                         up_pgid, up_bw, up_strict);
2359 }
2360
2361 static int hinic_init_default_cos(struct hinic_nic_dev *nic_dev)
2362 {
2363         u8 cos_id = 0;
2364         int err;
2365
2366         if (!HINIC_IS_VF(nic_dev->hwdev)) {
2367                 nic_dev->default_cos =
2368                                 (hinic_global_func_id(nic_dev->hwdev) +
2369                                                 DEFAULT_BASE_COS) % NR_MAX_COS;
2370         } else {
2371                 err = hinic_vf_get_default_cos(nic_dev->hwdev, &cos_id);
2372                 if (err) {
2373                         PMD_DRV_LOG(ERR, "Get VF default cos failed, err: %d",
2374                                         err);
2375                         return HINIC_ERROR;
2376                 }
2377
2378                 nic_dev->default_cos = cos_id;
2379         }
2380
2381         return 0;
2382 }
2383
2384 static int hinic_set_default_hw_feature(struct hinic_nic_dev *nic_dev)
2385 {
2386         int err;
2387
2388         err = hinic_init_default_cos(nic_dev);
2389         if (err)
2390                 return err;
2391
2392         if (hinic_func_type(nic_dev->hwdev) == TYPE_VF)
2393                 return 0;
2394
2395         /* Restore DCB configure to default status */
2396         err = hinic_set_default_dcb_feature(nic_dev);
2397         if (err)
2398                 return err;
2399
2400         /* disable LRO */
2401         err = hinic_set_rx_lro(nic_dev->hwdev, 0, 0, (u8)0);
2402         if (err)
2403                 return err;
2404
2405         /* Set pause enable, and up will disable pfc. */
2406         err = hinic_set_default_pause_feature(nic_dev);
2407         if (err)
2408                 return err;
2409
2410         err = hinic_reset_port_link_cfg(nic_dev->hwdev);
2411         if (err)
2412                 return err;
2413
2414         err = hinic_set_link_status_follow(nic_dev->hwdev,
2415                                            HINIC_LINK_FOLLOW_PORT);
2416         if (err == HINIC_MGMT_CMD_UNSUPPORTED)
2417                 PMD_DRV_LOG(WARNING, "Don't support to set link status follow phy port status");
2418         else if (err)
2419                 return err;
2420
2421         return hinic_set_anti_attack(nic_dev->hwdev, true);
2422 }
2423
2424 static int32_t hinic_card_workmode_check(struct hinic_nic_dev *nic_dev)
2425 {
2426         struct hinic_board_info info = { 0 };
2427         int rc;
2428
2429         if (hinic_func_type(nic_dev->hwdev) == TYPE_VF)
2430                 return 0;
2431
2432         rc = hinic_get_board_info(nic_dev->hwdev, &info);
2433         if (rc)
2434                 return rc;
2435
2436         return (info.service_mode == HINIC_SERVICE_MODE_NIC ? HINIC_OK :
2437                                                 HINIC_ERROR);
2438 }
2439
2440 static int hinic_copy_mempool_init(struct hinic_nic_dev *nic_dev)
2441 {
2442         nic_dev->cpy_mpool = rte_mempool_lookup(nic_dev->proc_dev_name);
2443         if (nic_dev->cpy_mpool == NULL) {
2444                 nic_dev->cpy_mpool =
2445                 rte_pktmbuf_pool_create(nic_dev->proc_dev_name,
2446                                         HINIC_COPY_MEMPOOL_DEPTH,
2447                                         0, 0,
2448                                         HINIC_COPY_MBUF_SIZE,
2449                                         rte_socket_id());
2450                 if (!nic_dev->cpy_mpool) {
2451                         PMD_DRV_LOG(ERR, "Create copy mempool failed, errno: %d, dev_name: %s",
2452                                     rte_errno, nic_dev->proc_dev_name);
2453                         return -ENOMEM;
2454                 }
2455         }
2456
2457         return 0;
2458 }
2459
2460 static void hinic_copy_mempool_uninit(struct hinic_nic_dev *nic_dev)
2461 {
2462         if (nic_dev->cpy_mpool != NULL)
2463                 rte_mempool_free(nic_dev->cpy_mpool);
2464 }
2465
2466 static int hinic_init_sw_rxtxqs(struct hinic_nic_dev *nic_dev)
2467 {
2468         u32 txq_size;
2469         u32 rxq_size;
2470
2471         /* allocate software txq array */
2472         txq_size = nic_dev->nic_cap.max_sqs * sizeof(*nic_dev->txqs);
2473         nic_dev->txqs = kzalloc_aligned(txq_size, GFP_KERNEL);
2474         if (!nic_dev->txqs) {
2475                 PMD_DRV_LOG(ERR, "Allocate txqs failed");
2476                 return -ENOMEM;
2477         }
2478
2479         /* allocate software rxq array */
2480         rxq_size = nic_dev->nic_cap.max_rqs * sizeof(*nic_dev->rxqs);
2481         nic_dev->rxqs = kzalloc_aligned(rxq_size, GFP_KERNEL);
2482         if (!nic_dev->rxqs) {
2483                 /* free txqs */
2484                 kfree(nic_dev->txqs);
2485                 nic_dev->txqs = NULL;
2486
2487                 PMD_DRV_LOG(ERR, "Allocate rxqs failed");
2488                 return -ENOMEM;
2489         }
2490
2491         return HINIC_OK;
2492 }
2493
2494 static void hinic_deinit_sw_rxtxqs(struct hinic_nic_dev *nic_dev)
2495 {
2496         kfree(nic_dev->txqs);
2497         nic_dev->txqs = NULL;
2498
2499         kfree(nic_dev->rxqs);
2500         nic_dev->rxqs = NULL;
2501 }
2502
2503 static int hinic_nic_dev_create(struct rte_eth_dev *eth_dev)
2504 {
2505         struct hinic_nic_dev *nic_dev =
2506                                 HINIC_ETH_DEV_TO_PRIVATE_NIC_DEV(eth_dev);
2507         int rc;
2508
2509         nic_dev->hwdev = rte_zmalloc("hinic_hwdev", sizeof(*nic_dev->hwdev),
2510                                      RTE_CACHE_LINE_SIZE);
2511         if (!nic_dev->hwdev) {
2512                 PMD_DRV_LOG(ERR, "Allocate hinic hwdev memory failed, dev_name: %s",
2513                             eth_dev->data->name);
2514                 return -ENOMEM;
2515         }
2516         nic_dev->hwdev->pcidev_hdl = RTE_ETH_DEV_TO_PCI(eth_dev);
2517
2518         /* init osdep*/
2519         rc = hinic_osdep_init(nic_dev->hwdev);
2520         if (rc) {
2521                 PMD_DRV_LOG(ERR, "Initialize os_dep failed, dev_name: %s",
2522                             eth_dev->data->name);
2523                 goto init_osdep_fail;
2524         }
2525
2526         /* init_hwif */
2527         rc = hinic_hwif_res_init(nic_dev->hwdev);
2528         if (rc) {
2529                 PMD_DRV_LOG(ERR, "Initialize hwif failed, dev_name: %s",
2530                             eth_dev->data->name);
2531                 goto init_hwif_fail;
2532         }
2533
2534         /* init_cfg_mgmt */
2535         rc = init_cfg_mgmt(nic_dev->hwdev);
2536         if (rc) {
2537                 PMD_DRV_LOG(ERR, "Initialize cfg_mgmt failed, dev_name: %s",
2538                             eth_dev->data->name);
2539                 goto init_cfgmgnt_fail;
2540         }
2541
2542         /* init_aeqs */
2543         rc = hinic_comm_aeqs_init(nic_dev->hwdev);
2544         if (rc) {
2545                 PMD_DRV_LOG(ERR, "Initialize aeqs failed, dev_name: %s",
2546                             eth_dev->data->name);
2547                 goto init_aeqs_fail;
2548         }
2549
2550         /* init_pf_to_mgnt */
2551         rc = hinic_comm_pf_to_mgmt_init(nic_dev->hwdev);
2552         if (rc) {
2553                 PMD_DRV_LOG(ERR, "Initialize pf_to_mgmt failed, dev_name: %s",
2554                             eth_dev->data->name);
2555                 goto init_pf_to_mgmt_fail;
2556         }
2557
2558         /* init mailbox */
2559         rc = hinic_comm_func_to_func_init(nic_dev->hwdev);
2560         if (rc) {
2561                 PMD_DRV_LOG(ERR, "Initialize func_to_func failed, dev_name: %s",
2562                             eth_dev->data->name);
2563                 goto init_func_to_func_fail;
2564         }
2565
2566         rc = hinic_card_workmode_check(nic_dev);
2567         if (rc) {
2568                 PMD_DRV_LOG(ERR, "Check card workmode failed, dev_name: %s",
2569                             eth_dev->data->name);
2570                 goto workmode_check_fail;
2571         }
2572
2573         /* do l2nic reset to make chip clear */
2574         rc = hinic_l2nic_reset(nic_dev->hwdev);
2575         if (rc) {
2576                 PMD_DRV_LOG(ERR, "Do l2nic reset failed, dev_name: %s",
2577                             eth_dev->data->name);
2578                 goto l2nic_reset_fail;
2579         }
2580
2581         /* init dma and aeq msix attribute table */
2582         (void)hinic_init_attr_table(nic_dev->hwdev);
2583
2584         /* init_cmdqs */
2585         rc = hinic_comm_cmdqs_init(nic_dev->hwdev);
2586         if (rc) {
2587                 PMD_DRV_LOG(ERR, "Initialize cmdq failed, dev_name: %s",
2588                             eth_dev->data->name);
2589                 goto init_cmdq_fail;
2590         }
2591
2592         /* set hardware state active */
2593         rc = hinic_activate_hwdev_state(nic_dev->hwdev);
2594         if (rc) {
2595                 PMD_DRV_LOG(ERR, "Initialize resources state failed, dev_name: %s",
2596                             eth_dev->data->name);
2597                 goto init_resources_state_fail;
2598         }
2599
2600         /* init_capability */
2601         rc = hinic_init_capability(nic_dev->hwdev);
2602         if (rc) {
2603                 PMD_DRV_LOG(ERR, "Initialize capability failed, dev_name: %s",
2604                             eth_dev->data->name);
2605                 goto init_cap_fail;
2606         }
2607
2608         /* get nic capability */
2609         if (!hinic_support_nic(nic_dev->hwdev, &nic_dev->nic_cap))
2610                 goto nic_check_fail;
2611
2612         /* init root cla and function table */
2613         rc = hinic_init_nicio(nic_dev->hwdev);
2614         if (rc) {
2615                 PMD_DRV_LOG(ERR, "Initialize nic_io failed, dev_name: %s",
2616                             eth_dev->data->name);
2617                 goto init_nicio_fail;
2618         }
2619
2620         /* init_software_txrxq */
2621         rc = hinic_init_sw_rxtxqs(nic_dev);
2622         if (rc) {
2623                 PMD_DRV_LOG(ERR, "Initialize sw_rxtxqs failed, dev_name: %s",
2624                             eth_dev->data->name);
2625                 goto init_sw_rxtxqs_fail;
2626         }
2627
2628         rc = hinic_copy_mempool_init(nic_dev);
2629         if (rc) {
2630                 PMD_DRV_LOG(ERR, "Create copy mempool failed, dev_name: %s",
2631                          eth_dev->data->name);
2632                 goto init_mpool_fail;
2633         }
2634
2635         /* set hardware feature to default status */
2636         rc = hinic_set_default_hw_feature(nic_dev);
2637         if (rc) {
2638                 PMD_DRV_LOG(ERR, "Initialize hardware default features failed, dev_name: %s",
2639                             eth_dev->data->name);
2640                 goto set_default_hw_feature_fail;
2641         }
2642
2643         return 0;
2644
2645 set_default_hw_feature_fail:
2646         hinic_copy_mempool_uninit(nic_dev);
2647
2648 init_mpool_fail:
2649         hinic_deinit_sw_rxtxqs(nic_dev);
2650
2651 init_sw_rxtxqs_fail:
2652         hinic_deinit_nicio(nic_dev->hwdev);
2653
2654 nic_check_fail:
2655 init_nicio_fail:
2656 init_cap_fail:
2657         hinic_deactivate_hwdev_state(nic_dev->hwdev);
2658
2659 init_resources_state_fail:
2660         hinic_comm_cmdqs_free(nic_dev->hwdev);
2661
2662 init_cmdq_fail:
2663 l2nic_reset_fail:
2664 workmode_check_fail:
2665         hinic_comm_func_to_func_free(nic_dev->hwdev);
2666
2667 init_func_to_func_fail:
2668         hinic_comm_pf_to_mgmt_free(nic_dev->hwdev);
2669
2670 init_pf_to_mgmt_fail:
2671         hinic_comm_aeqs_free(nic_dev->hwdev);
2672
2673 init_aeqs_fail:
2674         free_cfg_mgmt(nic_dev->hwdev);
2675
2676 init_cfgmgnt_fail:
2677         hinic_hwif_res_free(nic_dev->hwdev);
2678
2679 init_hwif_fail:
2680         hinic_osdep_deinit(nic_dev->hwdev);
2681
2682 init_osdep_fail:
2683         rte_free(nic_dev->hwdev);
2684         nic_dev->hwdev = NULL;
2685
2686         return rc;
2687 }
2688
2689 static void hinic_nic_dev_destroy(struct rte_eth_dev *eth_dev)
2690 {
2691         struct hinic_nic_dev *nic_dev =
2692                         HINIC_ETH_DEV_TO_PRIVATE_NIC_DEV(eth_dev);
2693
2694         (void)hinic_set_link_status_follow(nic_dev->hwdev,
2695                                            HINIC_LINK_FOLLOW_DEFAULT);
2696         hinic_copy_mempool_uninit(nic_dev);
2697         hinic_deinit_sw_rxtxqs(nic_dev);
2698         hinic_deinit_nicio(nic_dev->hwdev);
2699         hinic_deactivate_hwdev_state(nic_dev->hwdev);
2700         hinic_comm_cmdqs_free(nic_dev->hwdev);
2701         hinic_comm_func_to_func_free(nic_dev->hwdev);
2702         hinic_comm_pf_to_mgmt_free(nic_dev->hwdev);
2703         hinic_comm_aeqs_free(nic_dev->hwdev);
2704         free_cfg_mgmt(nic_dev->hwdev);
2705         hinic_hwif_res_free(nic_dev->hwdev);
2706         hinic_osdep_deinit(nic_dev->hwdev);
2707         rte_free(nic_dev->hwdev);
2708         nic_dev->hwdev = NULL;
2709 }
2710
2711 /**
2712  * DPDK callback to close the device.
2713  *
2714  * @param dev
2715  *   Pointer to Ethernet device structure.
2716  */
2717 static void hinic_dev_close(struct rte_eth_dev *dev)
2718 {
2719         struct hinic_nic_dev *nic_dev = HINIC_ETH_DEV_TO_PRIVATE_NIC_DEV(dev);
2720
2721         if (hinic_test_and_set_bit(HINIC_DEV_CLOSE, &nic_dev->dev_status)) {
2722                 PMD_DRV_LOG(WARNING, "Device %s already closed",
2723                             dev->data->name);
2724                 return;
2725         }
2726
2727         /* stop device first */
2728         hinic_dev_stop(dev);
2729
2730         /* rx_cqe, rx_info */
2731         hinic_free_all_rx_resources(dev);
2732
2733         /* tx_info */
2734         hinic_free_all_tx_resources(dev);
2735
2736         /* free wq, pi_dma_addr */
2737         hinic_free_all_rq(nic_dev);
2738
2739         /* free wq, db_addr */
2740         hinic_free_all_sq(nic_dev);
2741
2742         /* deinit mac vlan tbl */
2743         hinic_deinit_mac_addr(dev);
2744         hinic_remove_all_vlanid(dev);
2745
2746         /* disable hardware and uio interrupt */
2747         hinic_disable_interrupt(dev);
2748
2749         /* deinit nic hardware device */
2750         hinic_nic_dev_destroy(dev);
2751 }
2752
2753 static const struct eth_dev_ops hinic_pmd_ops = {
2754         .dev_configure                 = hinic_dev_configure,
2755         .dev_infos_get                 = hinic_dev_infos_get,
2756         .rx_queue_setup                = hinic_rx_queue_setup,
2757         .tx_queue_setup                = hinic_tx_queue_setup,
2758         .dev_start                     = hinic_dev_start,
2759         .link_update                   = hinic_link_update,
2760         .rx_queue_release              = hinic_rx_queue_release,
2761         .tx_queue_release              = hinic_tx_queue_release,
2762         .dev_stop                      = hinic_dev_stop,
2763         .dev_close                     = hinic_dev_close,
2764         .mtu_set                       = hinic_dev_set_mtu,
2765         .vlan_filter_set               = hinic_vlan_filter_set,
2766         .vlan_offload_set              = hinic_vlan_offload_set,
2767         .allmulticast_enable           = hinic_dev_allmulticast_enable,
2768         .allmulticast_disable          = hinic_dev_allmulticast_disable,
2769         .promiscuous_enable            = hinic_dev_promiscuous_enable,
2770         .promiscuous_disable           = hinic_dev_promiscuous_disable,
2771         .rss_hash_update               = hinic_rss_hash_update,
2772         .rss_hash_conf_get             = hinic_rss_conf_get,
2773         .reta_update                   = hinic_rss_indirtbl_update,
2774         .reta_query                    = hinic_rss_indirtbl_query,
2775         .stats_get                     = hinic_dev_stats_get,
2776         .stats_reset                   = hinic_dev_stats_reset,
2777         .xstats_get                    = hinic_dev_xstats_get,
2778         .xstats_reset                  = hinic_dev_xstats_reset,
2779         .xstats_get_names              = hinic_dev_xstats_get_names,
2780         .mac_addr_set                  = hinic_set_mac_addr,
2781         .mac_addr_remove               = hinic_mac_addr_remove,
2782         .mac_addr_add                  = hinic_mac_addr_add,
2783         .set_mc_addr_list              = hinic_set_mc_addr_list,
2784         .filter_ctrl                   = hinic_dev_filter_ctrl,
2785 };
2786
2787 static const struct eth_dev_ops hinic_pmd_vf_ops = {
2788         .dev_configure                 = hinic_dev_configure,
2789         .dev_infos_get                 = hinic_dev_infos_get,
2790         .rx_queue_setup                = hinic_rx_queue_setup,
2791         .tx_queue_setup                = hinic_tx_queue_setup,
2792         .dev_start                     = hinic_dev_start,
2793         .link_update                   = hinic_link_update,
2794         .rx_queue_release              = hinic_rx_queue_release,
2795         .tx_queue_release              = hinic_tx_queue_release,
2796         .dev_stop                      = hinic_dev_stop,
2797         .dev_close                     = hinic_dev_close,
2798         .mtu_set                       = hinic_dev_set_mtu,
2799         .vlan_filter_set               = hinic_vlan_filter_set,
2800         .vlan_offload_set              = hinic_vlan_offload_set,
2801         .allmulticast_enable           = hinic_dev_allmulticast_enable,
2802         .allmulticast_disable          = hinic_dev_allmulticast_disable,
2803         .rss_hash_update               = hinic_rss_hash_update,
2804         .rss_hash_conf_get             = hinic_rss_conf_get,
2805         .reta_update                   = hinic_rss_indirtbl_update,
2806         .reta_query                    = hinic_rss_indirtbl_query,
2807         .stats_get                     = hinic_dev_stats_get,
2808         .stats_reset                   = hinic_dev_stats_reset,
2809         .xstats_get                    = hinic_dev_xstats_get,
2810         .xstats_reset                  = hinic_dev_xstats_reset,
2811         .xstats_get_names              = hinic_dev_xstats_get_names,
2812         .mac_addr_set                  = hinic_set_mac_addr,
2813         .mac_addr_remove               = hinic_mac_addr_remove,
2814         .mac_addr_add                  = hinic_mac_addr_add,
2815         .set_mc_addr_list              = hinic_set_mc_addr_list,
2816         .filter_ctrl                   = hinic_dev_filter_ctrl,
2817 };
2818
2819 static int hinic_func_init(struct rte_eth_dev *eth_dev)
2820 {
2821         struct rte_pci_device *pci_dev;
2822         struct rte_ether_addr *eth_addr;
2823         struct hinic_nic_dev *nic_dev;
2824         struct hinic_filter_info *filter_info;
2825         u32 mac_size;
2826         int rc;
2827
2828         pci_dev = RTE_ETH_DEV_TO_PCI(eth_dev);
2829
2830         /* EAL is SECONDARY and eth_dev is already created */
2831         if (rte_eal_process_type() != RTE_PROC_PRIMARY) {
2832                 rc = rte_intr_callback_register(&pci_dev->intr_handle,
2833                                                 hinic_dev_interrupt_handler,
2834                                                 (void *)eth_dev);
2835                 if (rc)
2836                         PMD_DRV_LOG(ERR, "Initialize %s failed in secondary process",
2837                                     eth_dev->data->name);
2838
2839                 return rc;
2840         }
2841
2842         nic_dev = HINIC_ETH_DEV_TO_PRIVATE_NIC_DEV(eth_dev);
2843         memset(nic_dev, 0, sizeof(*nic_dev));
2844
2845         snprintf(nic_dev->proc_dev_name,
2846                  sizeof(nic_dev->proc_dev_name),
2847                  "hinic-%.4x:%.2x:%.2x.%x",
2848                  pci_dev->addr.domain, pci_dev->addr.bus,
2849                  pci_dev->addr.devid, pci_dev->addr.function);
2850
2851         /* alloc mac_addrs */
2852         mac_size = HINIC_MAX_UC_MAC_ADDRS * sizeof(struct rte_ether_addr);
2853         eth_addr = rte_zmalloc("hinic_mac", mac_size, 0);
2854         if (!eth_addr) {
2855                 PMD_DRV_LOG(ERR, "Allocate ethernet addresses' memory failed, dev_name: %s",
2856                             eth_dev->data->name);
2857                 rc = -ENOMEM;
2858                 goto eth_addr_fail;
2859         }
2860         eth_dev->data->mac_addrs = eth_addr;
2861
2862         mac_size = HINIC_MAX_MC_MAC_ADDRS * sizeof(struct rte_ether_addr);
2863         nic_dev->mc_list = rte_zmalloc("hinic_mc", mac_size, 0);
2864         if (!nic_dev->mc_list) {
2865                 PMD_DRV_LOG(ERR, "Allocate mcast address' memory failed, dev_name: %s",
2866                             eth_dev->data->name);
2867                 rc = -ENOMEM;
2868                 goto mc_addr_fail;
2869         }
2870
2871         /*
2872          * Pass the information to the rte_eth_dev_close() that it should also
2873          * release the private port resources.
2874          */
2875         eth_dev->data->dev_flags |= RTE_ETH_DEV_CLOSE_REMOVE;
2876
2877         /* create hardware nic_device */
2878         rc = hinic_nic_dev_create(eth_dev);
2879         if (rc) {
2880                 PMD_DRV_LOG(ERR, "Create nic device failed, dev_name: %s",
2881                             eth_dev->data->name);
2882                 goto create_nic_dev_fail;
2883         }
2884
2885         if (HINIC_IS_VF(nic_dev->hwdev))
2886                 eth_dev->dev_ops = &hinic_pmd_vf_ops;
2887         else
2888                 eth_dev->dev_ops = &hinic_pmd_ops;
2889
2890         rc = hinic_init_mac_addr(eth_dev);
2891         if (rc) {
2892                 PMD_DRV_LOG(ERR, "Initialize mac table failed, dev_name: %s",
2893                             eth_dev->data->name);
2894                 goto init_mac_fail;
2895         }
2896
2897         /* register callback func to eal lib */
2898         rc = rte_intr_callback_register(&pci_dev->intr_handle,
2899                                         hinic_dev_interrupt_handler,
2900                                         (void *)eth_dev);
2901         if (rc) {
2902                 PMD_DRV_LOG(ERR, "Register rte interrupt callback failed, dev_name: %s",
2903                             eth_dev->data->name);
2904                 goto reg_intr_cb_fail;
2905         }
2906
2907         /* enable uio/vfio intr/eventfd mapping */
2908         rc = rte_intr_enable(&pci_dev->intr_handle);
2909         if (rc) {
2910                 PMD_DRV_LOG(ERR, "Enable rte interrupt failed, dev_name: %s",
2911                             eth_dev->data->name);
2912                 goto enable_intr_fail;
2913         }
2914         hinic_set_bit(HINIC_DEV_INTR_EN, &nic_dev->dev_status);
2915
2916         /* initialize filter info */
2917         filter_info = &nic_dev->filter;
2918         memset(filter_info, 0, sizeof(struct hinic_filter_info));
2919         /* initialize 5tuple filter list */
2920         TAILQ_INIT(&filter_info->fivetuple_list);
2921         TAILQ_INIT(&nic_dev->filter_ntuple_list);
2922         TAILQ_INIT(&nic_dev->filter_ethertype_list);
2923         TAILQ_INIT(&nic_dev->filter_fdir_rule_list);
2924         TAILQ_INIT(&nic_dev->hinic_flow_list);
2925
2926         hinic_set_bit(HINIC_DEV_INIT, &nic_dev->dev_status);
2927         PMD_DRV_LOG(INFO, "Initialize %s in primary successfully",
2928                     eth_dev->data->name);
2929
2930         return 0;
2931
2932 enable_intr_fail:
2933         (void)rte_intr_callback_unregister(&pci_dev->intr_handle,
2934                                            hinic_dev_interrupt_handler,
2935                                            (void *)eth_dev);
2936
2937 reg_intr_cb_fail:
2938         hinic_deinit_mac_addr(eth_dev);
2939
2940 init_mac_fail:
2941         eth_dev->dev_ops = NULL;
2942         hinic_nic_dev_destroy(eth_dev);
2943
2944 create_nic_dev_fail:
2945         rte_free(nic_dev->mc_list);
2946         nic_dev->mc_list = NULL;
2947
2948 mc_addr_fail:
2949         rte_free(eth_addr);
2950         eth_dev->data->mac_addrs = NULL;
2951
2952 eth_addr_fail:
2953         PMD_DRV_LOG(ERR, "Initialize %s in primary failed",
2954                     eth_dev->data->name);
2955         return rc;
2956 }
2957
2958 static int hinic_dev_init(struct rte_eth_dev *eth_dev)
2959 {
2960         struct rte_pci_device *pci_dev;
2961
2962         pci_dev = RTE_ETH_DEV_TO_PCI(eth_dev);
2963
2964         PMD_DRV_LOG(INFO, "Initializing pf hinic-%.4x:%.2x:%.2x.%x in %s process",
2965                     pci_dev->addr.domain, pci_dev->addr.bus,
2966                     pci_dev->addr.devid, pci_dev->addr.function,
2967                     (rte_eal_process_type() == RTE_PROC_PRIMARY) ?
2968                     "primary" : "secondary");
2969
2970         /* rte_eth_dev rx_burst and tx_burst */
2971         eth_dev->rx_pkt_burst = hinic_recv_pkts;
2972         eth_dev->tx_pkt_burst = hinic_xmit_pkts;
2973
2974         return hinic_func_init(eth_dev);
2975 }
2976
2977 static int hinic_dev_uninit(struct rte_eth_dev *dev)
2978 {
2979         struct hinic_nic_dev *nic_dev;
2980
2981         nic_dev = HINIC_ETH_DEV_TO_PRIVATE_NIC_DEV(dev);
2982         hinic_clear_bit(HINIC_DEV_INIT, &nic_dev->dev_status);
2983
2984         if (rte_eal_process_type() != RTE_PROC_PRIMARY)
2985                 return 0;
2986
2987         hinic_dev_close(dev);
2988
2989         dev->dev_ops = NULL;
2990         dev->rx_pkt_burst = NULL;
2991         dev->tx_pkt_burst = NULL;
2992
2993         rte_free(nic_dev->mc_list);
2994
2995         rte_free(dev->data->mac_addrs);
2996         dev->data->mac_addrs = NULL;
2997
2998         return HINIC_OK;
2999 }
3000
3001 static struct rte_pci_id pci_id_hinic_map[] = {
3002         { RTE_PCI_DEVICE(HINIC_HUAWEI_VENDOR_ID, HINIC_DEV_ID_PRD) },
3003         { RTE_PCI_DEVICE(HINIC_HUAWEI_VENDOR_ID, HINIC_DEV_ID_MEZZ_25GE) },
3004         { RTE_PCI_DEVICE(HINIC_HUAWEI_VENDOR_ID, HINIC_DEV_ID_MEZZ_40GE) },
3005         { RTE_PCI_DEVICE(HINIC_HUAWEI_VENDOR_ID, HINIC_DEV_ID_MEZZ_100GE) },
3006         { RTE_PCI_DEVICE(HINIC_HUAWEI_VENDOR_ID, HINIC_DEV_ID_VF) },
3007         { RTE_PCI_DEVICE(HINIC_HUAWEI_VENDOR_ID, HINIC_DEV_ID_VF_HV) },
3008         { RTE_PCI_DEVICE(HINIC_HUAWEI_VENDOR_ID, HINIC_DEV_ID_1822_DUAL_25GE) },
3009         { RTE_PCI_DEVICE(HINIC_HUAWEI_VENDOR_ID, HINIC_DEV_ID_1822_100GE) },
3010         {.vendor_id = 0},
3011 };
3012
3013 static int hinic_pci_probe(struct rte_pci_driver *pci_drv __rte_unused,
3014                            struct rte_pci_device *pci_dev)
3015 {
3016         return rte_eth_dev_pci_generic_probe(pci_dev,
3017                 sizeof(struct hinic_nic_dev), hinic_dev_init);
3018 }
3019
3020 static int hinic_pci_remove(struct rte_pci_device *pci_dev)
3021 {
3022         return rte_eth_dev_pci_generic_remove(pci_dev, hinic_dev_uninit);
3023 }
3024
3025 static struct rte_pci_driver rte_hinic_pmd = {
3026         .id_table = pci_id_hinic_map,
3027         .drv_flags = RTE_PCI_DRV_NEED_MAPPING | RTE_PCI_DRV_INTR_LSC,
3028         .probe = hinic_pci_probe,
3029         .remove = hinic_pci_remove,
3030 };
3031
3032 RTE_PMD_REGISTER_PCI(net_hinic, rte_hinic_pmd);
3033 RTE_PMD_REGISTER_PCI_TABLE(net_hinic, pci_id_hinic_map);
3034
3035 RTE_INIT(hinic_init_log)
3036 {
3037         hinic_logtype = rte_log_register("pmd.net.hinic");
3038         if (hinic_logtype >= 0)
3039                 rte_log_set_level(hinic_logtype, RTE_LOG_INFO);
3040 }