drivers/net/hinic/hinic_pmd_ethdev.c

   1 /* SPDX-License-Identifier: BSD-3-Clause
   2  * Copyright(c) 2017 Huawei Technologies Co., Ltd
   3  */
   4
   5 #include <rte_pci.h>
   6 #include <rte_bus_pci.h>
   7 #include <rte_ethdev_pci.h>
   8 #include <rte_mbuf.h>
   9 #include <rte_malloc.h>
  10 #include <rte_memcpy.h>
  11 #include <rte_mempool.h>
  12 #include <rte_errno.h>
  13 #include <rte_ether.h>
  14
  15 #include "base/hinic_compat.h"
  16 #include "base/hinic_pmd_hwdev.h"
  17 #include "base/hinic_pmd_hwif.h"
  18 #include "base/hinic_pmd_wq.h"
  19 #include "base/hinic_pmd_cfg.h"
  20 #include "base/hinic_pmd_mgmt.h"
  21 #include "base/hinic_pmd_cmdq.h"
  22 #include "base/hinic_pmd_niccfg.h"
  23 #include "base/hinic_pmd_nicio.h"
  24 #include "base/hinic_pmd_mbox.h"
  25 #include "hinic_pmd_ethdev.h"
  26 #include "hinic_pmd_tx.h"
  27 #include "hinic_pmd_rx.h"
  28
  29 /* Vendor ID used by Huawei devices */
  30 #define HINIC_HUAWEI_VENDOR_ID          0x19E5
  31
  32 /* Hinic devices */
  33 #define HINIC_DEV_ID_PRD                0x1822
  34 #define HINIC_DEV_ID_VF                 0x375E
  35 #define HINIC_DEV_ID_VF_HV              0x379E
  36
  37 /* Mezz card for Blade Server */
  38 #define HINIC_DEV_ID_MEZZ_25GE          0x0210
  39 #define HINIC_DEV_ID_MEZZ_100GE         0x0205
  40
  41 /* 2*25G and 2*100G card */
  42 #define HINIC_DEV_ID_1822_DUAL_25GE     0x0206
  43 #define HINIC_DEV_ID_1822_100GE         0x0200
  44
  45 #define HINIC_SERVICE_MODE_NIC          2
  46
  47 #define HINIC_INTR_CB_UNREG_MAX_RETRIES 10
  48
  49 #define DEFAULT_BASE_COS                4
  50 #define NR_MAX_COS                      8
  51
  52 #define HINIC_MIN_RX_BUF_SIZE           1024
  53 #define HINIC_MAX_UC_MAC_ADDRS          128
  54 #define HINIC_MAX_MC_MAC_ADDRS          2048
  55
  56 #define HINIC_DEFAULT_BURST_SIZE        32
  57 #define HINIC_DEFAULT_NB_QUEUES         1
  58 #define HINIC_DEFAULT_RING_SIZE         1024
  59 #define HINIC_MAX_LRO_SIZE              65536
  60
  61 /*
  62  * vlan_id is a 12 bit number.
  63  * The VFTA array is actually a 4096 bit array, 128 of 32bit elements.
  64  * 2^5 = 32. The val of lower 5 bits specifies the bit in the 32bit element.
  65  * The higher 7 bit val specifies VFTA array index.
  66  */
  67 #define HINIC_VFTA_BIT(vlan_id)    (1 << ((vlan_id) & 0x1F))
  68 #define HINIC_VFTA_IDX(vlan_id)    ((vlan_id) >> 5)
  69
  70 #define HINIC_VLAN_FILTER_EN            (1U << 0)
  71
  72 #define HINIC_MTU_TO_PKTLEN(mtu)        \
  73         ((mtu) + ETH_HLEN + ETH_CRC_LEN)
  74
  75 #define HINIC_PKTLEN_TO_MTU(pktlen)     \
  76         ((pktlen) - (ETH_HLEN + ETH_CRC_LEN))
  77
  78 /* lro numer limit for one packet */
  79 #define HINIC_LRO_WQE_NUM_DEFAULT       8
  80
  81 struct hinic_xstats_name_off {
  82         char name[RTE_ETH_XSTATS_NAME_SIZE];
  83         u32  offset;
  84 };
  85
  86 #define HINIC_FUNC_STAT(_stat_item) {   \
  87         .name = #_stat_item, \
  88         .offset = offsetof(struct hinic_vport_stats, _stat_item) \
  89 }
  90
  91 #define HINIC_PORT_STAT(_stat_item) { \
  92         .name = #_stat_item, \
  93         .offset = offsetof(struct hinic_phy_port_stats, _stat_item) \
  94 }
  95
  96 static const struct hinic_xstats_name_off hinic_vport_stats_strings[] = {
  97         HINIC_FUNC_STAT(tx_unicast_pkts_vport),
  98         HINIC_FUNC_STAT(tx_unicast_bytes_vport),
  99         HINIC_FUNC_STAT(tx_multicast_pkts_vport),
 100         HINIC_FUNC_STAT(tx_multicast_bytes_vport),
 101         HINIC_FUNC_STAT(tx_broadcast_pkts_vport),
 102         HINIC_FUNC_STAT(tx_broadcast_bytes_vport),
 103
 104         HINIC_FUNC_STAT(rx_unicast_pkts_vport),
 105         HINIC_FUNC_STAT(rx_unicast_bytes_vport),
 106         HINIC_FUNC_STAT(rx_multicast_pkts_vport),
 107         HINIC_FUNC_STAT(rx_multicast_bytes_vport),
 108         HINIC_FUNC_STAT(rx_broadcast_pkts_vport),
 109         HINIC_FUNC_STAT(rx_broadcast_bytes_vport),
 110
 111         HINIC_FUNC_STAT(tx_discard_vport),
 112         HINIC_FUNC_STAT(rx_discard_vport),
 113         HINIC_FUNC_STAT(tx_err_vport),
 114         HINIC_FUNC_STAT(rx_err_vport),
 115 };
 116
 117 #define HINIC_VPORT_XSTATS_NUM (sizeof(hinic_vport_stats_strings) / \
 118                 sizeof(hinic_vport_stats_strings[0]))
 119
 120 static const struct hinic_xstats_name_off hinic_phyport_stats_strings[] = {
 121         HINIC_PORT_STAT(mac_rx_total_pkt_num),
 122         HINIC_PORT_STAT(mac_rx_total_oct_num),
 123         HINIC_PORT_STAT(mac_rx_bad_pkt_num),
 124         HINIC_PORT_STAT(mac_rx_bad_oct_num),
 125         HINIC_PORT_STAT(mac_rx_good_pkt_num),
 126         HINIC_PORT_STAT(mac_rx_good_oct_num),
 127         HINIC_PORT_STAT(mac_rx_uni_pkt_num),
 128         HINIC_PORT_STAT(mac_rx_multi_pkt_num),
 129         HINIC_PORT_STAT(mac_rx_broad_pkt_num),
 130         HINIC_PORT_STAT(mac_tx_total_pkt_num),
 131         HINIC_PORT_STAT(mac_tx_total_oct_num),
 132         HINIC_PORT_STAT(mac_tx_bad_pkt_num),
 133         HINIC_PORT_STAT(mac_tx_bad_oct_num),
 134         HINIC_PORT_STAT(mac_tx_good_pkt_num),
 135         HINIC_PORT_STAT(mac_tx_good_oct_num),
 136         HINIC_PORT_STAT(mac_tx_uni_pkt_num),
 137         HINIC_PORT_STAT(mac_tx_multi_pkt_num),
 138         HINIC_PORT_STAT(mac_tx_broad_pkt_num),
 139         HINIC_PORT_STAT(mac_rx_fragment_pkt_num),
 140         HINIC_PORT_STAT(mac_rx_undersize_pkt_num),
 141         HINIC_PORT_STAT(mac_rx_undermin_pkt_num),
 142         HINIC_PORT_STAT(mac_rx_64_oct_pkt_num),
 143         HINIC_PORT_STAT(mac_rx_65_127_oct_pkt_num),
 144         HINIC_PORT_STAT(mac_rx_128_255_oct_pkt_num),
 145         HINIC_PORT_STAT(mac_rx_256_511_oct_pkt_num),
 146         HINIC_PORT_STAT(mac_rx_512_1023_oct_pkt_num),
 147         HINIC_PORT_STAT(mac_rx_1024_1518_oct_pkt_num),
 148         HINIC_PORT_STAT(mac_rx_1519_2047_oct_pkt_num),
 149         HINIC_PORT_STAT(mac_rx_2048_4095_oct_pkt_num),
 150         HINIC_PORT_STAT(mac_rx_4096_8191_oct_pkt_num),
 151         HINIC_PORT_STAT(mac_rx_8192_9216_oct_pkt_num),
 152         HINIC_PORT_STAT(mac_rx_9217_12287_oct_pkt_num),
 153         HINIC_PORT_STAT(mac_rx_12288_16383_oct_pkt_num),
 154         HINIC_PORT_STAT(mac_rx_1519_max_bad_pkt_num),
 155         HINIC_PORT_STAT(mac_rx_1519_max_good_pkt_num),
 156         HINIC_PORT_STAT(mac_rx_oversize_pkt_num),
 157         HINIC_PORT_STAT(mac_rx_jabber_pkt_num),
 158         HINIC_PORT_STAT(mac_rx_mac_pause_num),
 159         HINIC_PORT_STAT(mac_rx_pfc_pkt_num),
 160         HINIC_PORT_STAT(mac_rx_pfc_pri0_pkt_num),
 161         HINIC_PORT_STAT(mac_rx_pfc_pri1_pkt_num),
 162         HINIC_PORT_STAT(mac_rx_pfc_pri2_pkt_num),
 163         HINIC_PORT_STAT(mac_rx_pfc_pri3_pkt_num),
 164         HINIC_PORT_STAT(mac_rx_pfc_pri4_pkt_num),
 165         HINIC_PORT_STAT(mac_rx_pfc_pri5_pkt_num),
 166         HINIC_PORT_STAT(mac_rx_pfc_pri6_pkt_num),
 167         HINIC_PORT_STAT(mac_rx_pfc_pri7_pkt_num),
 168         HINIC_PORT_STAT(mac_rx_mac_control_pkt_num),
 169         HINIC_PORT_STAT(mac_rx_sym_err_pkt_num),
 170         HINIC_PORT_STAT(mac_rx_fcs_err_pkt_num),
 171         HINIC_PORT_STAT(mac_rx_send_app_good_pkt_num),
 172         HINIC_PORT_STAT(mac_rx_send_app_bad_pkt_num),
 173         HINIC_PORT_STAT(mac_tx_fragment_pkt_num),
 174         HINIC_PORT_STAT(mac_tx_undersize_pkt_num),
 175         HINIC_PORT_STAT(mac_tx_undermin_pkt_num),
 176         HINIC_PORT_STAT(mac_tx_64_oct_pkt_num),
 177         HINIC_PORT_STAT(mac_tx_65_127_oct_pkt_num),
 178         HINIC_PORT_STAT(mac_tx_128_255_oct_pkt_num),
 179         HINIC_PORT_STAT(mac_tx_256_511_oct_pkt_num),
 180         HINIC_PORT_STAT(mac_tx_512_1023_oct_pkt_num),
 181         HINIC_PORT_STAT(mac_tx_1024_1518_oct_pkt_num),
 182         HINIC_PORT_STAT(mac_tx_1519_2047_oct_pkt_num),
 183         HINIC_PORT_STAT(mac_tx_2048_4095_oct_pkt_num),
 184         HINIC_PORT_STAT(mac_tx_4096_8191_oct_pkt_num),
 185         HINIC_PORT_STAT(mac_tx_8192_9216_oct_pkt_num),
 186         HINIC_PORT_STAT(mac_tx_9217_12287_oct_pkt_num),
 187         HINIC_PORT_STAT(mac_tx_12288_16383_oct_pkt_num),
 188         HINIC_PORT_STAT(mac_tx_1519_max_bad_pkt_num),
 189         HINIC_PORT_STAT(mac_tx_1519_max_good_pkt_num),
 190         HINIC_PORT_STAT(mac_tx_oversize_pkt_num),
 191         HINIC_PORT_STAT(mac_trans_jabber_pkt_num),
 192         HINIC_PORT_STAT(mac_tx_mac_pause_num),
 193         HINIC_PORT_STAT(mac_tx_pfc_pkt_num),
 194         HINIC_PORT_STAT(mac_tx_pfc_pri0_pkt_num),
 195         HINIC_PORT_STAT(mac_tx_pfc_pri1_pkt_num),
 196         HINIC_PORT_STAT(mac_tx_pfc_pri2_pkt_num),
 197         HINIC_PORT_STAT(mac_tx_pfc_pri3_pkt_num),
 198         HINIC_PORT_STAT(mac_tx_pfc_pri4_pkt_num),
 199         HINIC_PORT_STAT(mac_tx_pfc_pri5_pkt_num),
 200         HINIC_PORT_STAT(mac_tx_pfc_pri6_pkt_num),
 201         HINIC_PORT_STAT(mac_tx_pfc_pri7_pkt_num),
 202         HINIC_PORT_STAT(mac_tx_mac_control_pkt_num),
 203         HINIC_PORT_STAT(mac_tx_err_all_pkt_num),
 204         HINIC_PORT_STAT(mac_tx_from_app_good_pkt_num),
 205         HINIC_PORT_STAT(mac_tx_from_app_bad_pkt_num),
 206 };
 207
 208 #define HINIC_PHYPORT_XSTATS_NUM (sizeof(hinic_phyport_stats_strings) / \
 209                 sizeof(hinic_phyport_stats_strings[0]))
 210
 211 static const struct hinic_xstats_name_off hinic_rxq_stats_strings[] = {
 212         {"rx_nombuf", offsetof(struct hinic_rxq_stats, rx_nombuf)},
 213         {"burst_pkt", offsetof(struct hinic_rxq_stats, burst_pkts)},
 214 };
 215
 216 #define HINIC_RXQ_XSTATS_NUM (sizeof(hinic_rxq_stats_strings) / \
 217                 sizeof(hinic_rxq_stats_strings[0]))
 218
 219 static const struct hinic_xstats_name_off hinic_txq_stats_strings[] = {
 220         {"tx_busy", offsetof(struct hinic_txq_stats, tx_busy)},
 221         {"offload_errors", offsetof(struct hinic_txq_stats, off_errs)},
 222         {"copy_pkts", offsetof(struct hinic_txq_stats, cpy_pkts)},
 223         {"rl_drop", offsetof(struct hinic_txq_stats, rl_drop)},
 224         {"burst_pkts", offsetof(struct hinic_txq_stats, burst_pkts)},
 225         {"sge_len0", offsetof(struct hinic_txq_stats, sge_len0)},
 226         {"mbuf_null", offsetof(struct hinic_txq_stats, mbuf_null)},
 227 };
 228
 229 #define HINIC_TXQ_XSTATS_NUM (sizeof(hinic_txq_stats_strings) / \
 230                 sizeof(hinic_txq_stats_strings[0]))
 231
 232 static int hinic_xstats_calc_num(struct hinic_nic_dev *nic_dev)
 233 {
 234         if (HINIC_IS_VF(nic_dev->hwdev)) {
 235                 return (HINIC_VPORT_XSTATS_NUM +
 236                         HINIC_RXQ_XSTATS_NUM * nic_dev->num_rq +
 237                         HINIC_TXQ_XSTATS_NUM * nic_dev->num_sq);
 238         } else {
 239                 return (HINIC_VPORT_XSTATS_NUM +
 240                         HINIC_PHYPORT_XSTATS_NUM +
 241                         HINIC_RXQ_XSTATS_NUM * nic_dev->num_rq +
 242                         HINIC_TXQ_XSTATS_NUM * nic_dev->num_sq);
 243         }
 244 }
 245
 246 static const struct rte_eth_desc_lim hinic_rx_desc_lim = {
 247         .nb_max = HINIC_MAX_QUEUE_DEPTH,
 248         .nb_min = HINIC_MIN_QUEUE_DEPTH,
 249         .nb_align = HINIC_RXD_ALIGN,
 250 };
 251
 252 static const struct rte_eth_desc_lim hinic_tx_desc_lim = {
 253         .nb_max = HINIC_MAX_QUEUE_DEPTH,
 254         .nb_min = HINIC_MIN_QUEUE_DEPTH,
 255         .nb_align = HINIC_TXD_ALIGN,
 256 };
 257
 258 static int hinic_vlan_offload_set(struct rte_eth_dev *dev, int mask);
 259
 260 /**
 261  * Interrupt handler triggered by NIC  for handling
 262  * specific event.
 263  *
 264  * @param: The address of parameter (struct rte_eth_dev *) regsitered before.
 265  */
 266 static void hinic_dev_interrupt_handler(void *param)
 267 {
 268         struct rte_eth_dev *dev = param;
 269         struct hinic_nic_dev *nic_dev = HINIC_ETH_DEV_TO_PRIVATE_NIC_DEV(dev);
 270
 271         if (!rte_bit_relaxed_get32(HINIC_DEV_INTR_EN, &nic_dev->dev_status)) {
 272                 PMD_DRV_LOG(WARNING, "Device's interrupt is disabled, ignore interrupt event, dev_name: %s, port_id: %d",
 273                             nic_dev->proc_dev_name, dev->data->port_id);
 274                 return;
 275         }
 276
 277         /* aeq0 msg handler */
 278         hinic_dev_handle_aeq_event(nic_dev->hwdev, param);
 279 }
 280
 281 /**
 282  * Ethernet device configuration.
 283  *
 284  * Prepare the driver for a given number of TX and RX queues, mtu size
 285  * and configure RSS.
 286  *
 287  * @param dev
 288  *   Pointer to Ethernet device structure.
 289  *
 290  * @return
 291  *   0 on success, negative error value otherwise.
 292  */
 293 static int hinic_dev_configure(struct rte_eth_dev *dev)
 294 {
 295         struct hinic_nic_dev *nic_dev;
 296         struct hinic_nic_io *nic_io;
 297         int err;
 298
 299         nic_dev = HINIC_ETH_DEV_TO_PRIVATE_NIC_DEV(dev);
 300         nic_io = nic_dev->hwdev->nic_io;
 301
 302         nic_dev->num_sq =  dev->data->nb_tx_queues;
 303         nic_dev->num_rq = dev->data->nb_rx_queues;
 304
 305         nic_io->num_sqs =  dev->data->nb_tx_queues;
 306         nic_io->num_rqs = dev->data->nb_rx_queues;
 307
 308         /* queue pair is max_num(sq, rq) */
 309         nic_dev->num_qps = (nic_dev->num_sq > nic_dev->num_rq) ?
 310                         nic_dev->num_sq : nic_dev->num_rq;
 311         nic_io->num_qps = nic_dev->num_qps;
 312
 313         if (nic_dev->num_qps > nic_io->max_qps) {
 314                 PMD_DRV_LOG(ERR,
 315                         "Queue number out of range, get queue_num:%d, max_queue_num:%d",
 316                         nic_dev->num_qps, nic_io->max_qps);
 317                 return -EINVAL;
 318         }
 319
 320         if (dev->data->dev_conf.rxmode.mq_mode & ETH_MQ_RX_RSS_FLAG)
 321                 dev->data->dev_conf.rxmode.offloads |= DEV_RX_OFFLOAD_RSS_HASH;
 322
 323         /* mtu size is 256~9600 */
 324         if (dev->data->dev_conf.rxmode.max_rx_pkt_len < HINIC_MIN_FRAME_SIZE ||
 325             dev->data->dev_conf.rxmode.max_rx_pkt_len >
 326             HINIC_MAX_JUMBO_FRAME_SIZE) {
 327                 PMD_DRV_LOG(ERR,
 328                         "Max rx pkt len out of range, get max_rx_pkt_len:%d, "
 329                         "expect between %d and %d",
 330                         dev->data->dev_conf.rxmode.max_rx_pkt_len,
 331                         HINIC_MIN_FRAME_SIZE, HINIC_MAX_JUMBO_FRAME_SIZE);
 332                 return -EINVAL;
 333         }
 334
 335         nic_dev->mtu_size =
 336                 HINIC_PKTLEN_TO_MTU(dev->data->dev_conf.rxmode.max_rx_pkt_len);
 337
 338         /* rss template */
 339         err = hinic_config_mq_mode(dev, TRUE);
 340         if (err) {
 341                 PMD_DRV_LOG(ERR, "Config multi-queue failed");
 342                 return err;
 343         }
 344
 345         /* init vlan offoad */
 346         err = hinic_vlan_offload_set(dev,
 347                                 ETH_VLAN_STRIP_MASK | ETH_VLAN_FILTER_MASK);
 348         if (err) {
 349                 PMD_DRV_LOG(ERR, "Initialize vlan filter and strip failed");
 350                 (void)hinic_config_mq_mode(dev, FALSE);
 351                 return err;
 352         }
 353
 354         /* clear fdir filter flag in function table */
 355         hinic_free_fdir_filter(nic_dev);
 356
 357         return HINIC_OK;
 358 }
 359
 360 /**
 361  * DPDK callback to create the receive queue.
 362  *
 363  * @param dev
 364  *   Pointer to Ethernet device structure.
 365  * @param queue_idx
 366  *   RX queue index.
 367  * @param nb_desc
 368  *   Number of descriptors for receive queue.
 369  * @param socket_id
 370  *   NUMA socket on which memory must be allocated.
 371  * @param rx_conf
 372  *   Thresholds parameters (unused_).
 373  * @param mp
 374  *   Memory pool for buffer allocations.
 375  *
 376  * @return
 377  *   0 on success, negative error value otherwise.
 378  */
 379 static int hinic_rx_queue_setup(struct rte_eth_dev *dev, uint16_t queue_idx,
 380                          uint16_t nb_desc, unsigned int socket_id,
 381                          __rte_unused const struct rte_eth_rxconf *rx_conf,
 382                          struct rte_mempool *mp)
 383 {
 384         int rc;
 385         struct hinic_nic_dev *nic_dev;
 386         struct hinic_hwdev *hwdev;
 387         struct hinic_rxq *rxq;
 388         u16 rq_depth, rx_free_thresh;
 389         u32 buf_size;
 390
 391         nic_dev = HINIC_ETH_DEV_TO_PRIVATE_NIC_DEV(dev);
 392         hwdev = nic_dev->hwdev;
 393
 394         /* queue depth must be power of 2, otherwise will be aligned up */
 395         rq_depth = (nb_desc & (nb_desc - 1)) ?
 396                 ((u16)(1U << (ilog2(nb_desc) + 1))) : nb_desc;
 397
 398         /*
 399          * Validate number of receive descriptors.
 400          * It must not exceed hardware maximum and minimum.
 401          */
 402         if (rq_depth > HINIC_MAX_QUEUE_DEPTH ||
 403                 rq_depth < HINIC_MIN_QUEUE_DEPTH) {
 404                 PMD_DRV_LOG(ERR, "RX queue depth is out of range from %d to %d, (nb_desc=%d, q_depth=%d, port=%d queue=%d)",
 405                             HINIC_MIN_QUEUE_DEPTH, HINIC_MAX_QUEUE_DEPTH,
 406                             (int)nb_desc, (int)rq_depth,
 407                             (int)dev->data->port_id, (int)queue_idx);
 408                 return -EINVAL;
 409         }
 410
 411         /*
 412          * The RX descriptor ring will be cleaned after rxq->rx_free_thresh
 413          * descriptors are used or if the number of descriptors required
 414          * to transmit a packet is greater than the number of free RX
 415          * descriptors.
 416          * The following constraints must be satisfied:
 417          *  rx_free_thresh must be greater than 0.
 418          *  rx_free_thresh must be less than the size of the ring minus 1.
 419          * When set to zero use default values.
 420          */
 421         rx_free_thresh = (u16)((rx_conf->rx_free_thresh) ?
 422                         rx_conf->rx_free_thresh : HINIC_DEFAULT_RX_FREE_THRESH);
 423         if (rx_free_thresh >= (rq_depth - 1)) {
 424                 PMD_DRV_LOG(ERR, "rx_free_thresh must be less than the number of RX descriptors minus 1. (rx_free_thresh=%u port=%d queue=%d)",
 425                             (unsigned int)rx_free_thresh,
 426                             (int)dev->data->port_id,
 427                             (int)queue_idx);
 428                 return -EINVAL;
 429         }
 430
 431         rxq = rte_zmalloc_socket("hinic_rx_queue", sizeof(struct hinic_rxq),
 432                                  RTE_CACHE_LINE_SIZE, socket_id);
 433         if (!rxq) {
 434                 PMD_DRV_LOG(ERR, "Allocate rxq[%d] failed, dev_name: %s",
 435                             queue_idx, dev->data->name);
 436                 return -ENOMEM;
 437         }
 438         nic_dev->rxqs[queue_idx] = rxq;
 439
 440         /* alloc rx sq hw wqe page */
 441         rc = hinic_create_rq(hwdev, queue_idx, rq_depth, socket_id);
 442         if (rc) {
 443                 PMD_DRV_LOG(ERR, "Create rxq[%d] failed, dev_name: %s, rq_depth: %d",
 444                             queue_idx, dev->data->name, rq_depth);
 445                 goto ceate_rq_fail;
 446         }
 447
 448         /* mbuf pool must be assigned before setup rx resources */
 449         rxq->mb_pool = mp;
 450
 451         rc =
 452         hinic_convert_rx_buf_size(rte_pktmbuf_data_room_size(rxq->mb_pool) -
 453                                   RTE_PKTMBUF_HEADROOM, &buf_size);
 454         if (rc) {
 455                 PMD_DRV_LOG(ERR, "Adjust buf size failed, dev_name: %s",
 456                             dev->data->name);
 457                 goto adjust_bufsize_fail;
 458         }
 459
 460         /* rx queue info, rearm control */
 461         rxq->wq = &hwdev->nic_io->rq_wq[queue_idx];
 462         rxq->pi_virt_addr = hwdev->nic_io->qps[queue_idx].rq.pi_virt_addr;
 463         rxq->nic_dev = nic_dev;
 464         rxq->q_id = queue_idx;
 465         rxq->q_depth = rq_depth;
 466         rxq->buf_len = (u16)buf_size;
 467         rxq->rx_free_thresh = rx_free_thresh;
 468         rxq->socket_id = socket_id;
 469
 470         /* the last point cant do mbuf rearm in bulk */
 471         rxq->rxinfo_align_end = rxq->q_depth - rxq->rx_free_thresh;
 472
 473         /* device port identifier */
 474         rxq->port_id = dev->data->port_id;
 475
 476         /* alloc rx_cqe and prepare rq_wqe */
 477         rc = hinic_setup_rx_resources(rxq);
 478         if (rc) {
 479                 PMD_DRV_LOG(ERR, "Setup rxq[%d] rx_resources failed, dev_name: %s",
 480                             queue_idx, dev->data->name);
 481                 goto setup_rx_res_err;
 482         }
 483
 484         /* record nic_dev rxq in rte_eth rx_queues */
 485         dev->data->rx_queues[queue_idx] = rxq;
 486
 487         return 0;
 488
 489 setup_rx_res_err:
 490 adjust_bufsize_fail:
 491         hinic_destroy_rq(hwdev, queue_idx);
 492
 493 ceate_rq_fail:
 494         rte_free(rxq);
 495
 496         return rc;
 497 }
 498
 499 static void hinic_reset_rx_queue(struct rte_eth_dev *dev)
 500 {
 501         struct hinic_rxq *rxq;
 502         struct hinic_nic_dev *nic_dev;
 503         int q_id = 0;
 504
 505         nic_dev = HINIC_ETH_DEV_TO_PRIVATE_NIC_DEV(dev);
 506
 507         for (q_id = 0; q_id < nic_dev->num_rq; q_id++) {
 508                 rxq = dev->data->rx_queues[q_id];
 509
 510                 rxq->wq->cons_idx = 0;
 511                 rxq->wq->prod_idx = 0;
 512                 rxq->wq->delta = rxq->q_depth;
 513                 rxq->wq->mask = rxq->q_depth - 1;
 514
 515                 /* alloc mbuf to rq */
 516                 hinic_rx_alloc_pkts(rxq);
 517         }
 518 }
 519
 520 /**
 521  * DPDK callback to configure the transmit queue.
 522  *
 523  * @param dev
 524  *   Pointer to Ethernet device structure.
 525  * @param queue_idx
 526  *   Transmit queue index.
 527  * @param nb_desc
 528  *   Number of descriptors for transmit queue.
 529  * @param socket_id
 530  *   NUMA socket on which memory must be allocated.
 531  * @param tx_conf
 532  *   Tx queue configuration parameters.
 533  *
 534  * @return
 535  *   0 on success, negative error value otherwise.
 536  */
 537 static int hinic_tx_queue_setup(struct rte_eth_dev *dev, uint16_t queue_idx,
 538                          uint16_t nb_desc, unsigned int socket_id,
 539                          __rte_unused const struct rte_eth_txconf *tx_conf)
 540 {
 541         int rc;
 542         struct hinic_nic_dev *nic_dev;
 543         struct hinic_hwdev *hwdev;
 544         struct hinic_txq *txq;
 545         u16 sq_depth, tx_free_thresh;
 546
 547         nic_dev = HINIC_ETH_DEV_TO_PRIVATE_NIC_DEV(dev);
 548         hwdev = nic_dev->hwdev;
 549
 550         /* queue depth must be power of 2, otherwise will be aligned up */
 551         sq_depth = (nb_desc & (nb_desc - 1)) ?
 552                         ((u16)(1U << (ilog2(nb_desc) + 1))) : nb_desc;
 553
 554         /*
 555          * Validate number of transmit descriptors.
 556          * It must not exceed hardware maximum and minimum.
 557          */
 558         if (sq_depth > HINIC_MAX_QUEUE_DEPTH ||
 559                 sq_depth < HINIC_MIN_QUEUE_DEPTH) {
 560                 PMD_DRV_LOG(ERR, "TX queue depth is out of range from %d to %d, (nb_desc=%d, q_depth=%d, port=%d queue=%d)",
 561                           HINIC_MIN_QUEUE_DEPTH, HINIC_MAX_QUEUE_DEPTH,
 562                           (int)nb_desc, (int)sq_depth,
 563                           (int)dev->data->port_id, (int)queue_idx);
 564                 return -EINVAL;
 565         }
 566
 567         /*
 568          * The TX descriptor ring will be cleaned after txq->tx_free_thresh
 569          * descriptors are used or if the number of descriptors required
 570          * to transmit a packet is greater than the number of free TX
 571          * descriptors.
 572          * The following constraints must be satisfied:
 573          *  tx_free_thresh must be greater than 0.
 574          *  tx_free_thresh must be less than the size of the ring minus 1.
 575          * When set to zero use default values.
 576          */
 577         tx_free_thresh = (u16)((tx_conf->tx_free_thresh) ?
 578                         tx_conf->tx_free_thresh : HINIC_DEFAULT_TX_FREE_THRESH);
 579         if (tx_free_thresh >= (sq_depth - 1)) {
 580                 PMD_DRV_LOG(ERR, "tx_free_thresh must be less than the number of TX descriptors minus 1. (tx_free_thresh=%u port=%d queue=%d)",
 581                         (unsigned int)tx_free_thresh, (int)dev->data->port_id,
 582                         (int)queue_idx);
 583                 return -EINVAL;
 584         }
 585
 586         txq = rte_zmalloc_socket("hinic_tx_queue", sizeof(struct hinic_txq),
 587                                  RTE_CACHE_LINE_SIZE, socket_id);
 588         if (!txq) {
 589                 PMD_DRV_LOG(ERR, "Allocate txq[%d] failed, dev_name: %s",
 590                             queue_idx, dev->data->name);
 591                 return -ENOMEM;
 592         }
 593         nic_dev->txqs[queue_idx] = txq;
 594
 595         /* alloc tx sq hw wqepage */
 596         rc = hinic_create_sq(hwdev, queue_idx, sq_depth, socket_id);
 597         if (rc) {
 598                 PMD_DRV_LOG(ERR, "Create txq[%d] failed, dev_name: %s, sq_depth: %d",
 599                             queue_idx, dev->data->name, sq_depth);
 600                 goto create_sq_fail;
 601         }
 602
 603         txq->q_id = queue_idx;
 604         txq->q_depth = sq_depth;
 605         txq->port_id = dev->data->port_id;
 606         txq->tx_free_thresh = tx_free_thresh;
 607         txq->nic_dev = nic_dev;
 608         txq->wq = &hwdev->nic_io->sq_wq[queue_idx];
 609         txq->sq = &hwdev->nic_io->qps[queue_idx].sq;
 610         txq->cons_idx_addr = hwdev->nic_io->qps[queue_idx].sq.cons_idx_addr;
 611         txq->sq_head_addr = HINIC_GET_WQ_HEAD(txq);
 612         txq->sq_bot_sge_addr = HINIC_GET_WQ_TAIL(txq) -
 613                                         sizeof(struct hinic_sq_bufdesc);
 614         txq->cos = nic_dev->default_cos;
 615         txq->socket_id = socket_id;
 616
 617         /* alloc software txinfo */
 618         rc = hinic_setup_tx_resources(txq);
 619         if (rc) {
 620                 PMD_DRV_LOG(ERR, "Setup txq[%d] tx_resources failed, dev_name: %s",
 621                             queue_idx, dev->data->name);
 622                 goto setup_tx_res_fail;
 623         }
 624
 625         /* record nic_dev txq in rte_eth tx_queues */
 626         dev->data->tx_queues[queue_idx] = txq;
 627
 628         return HINIC_OK;
 629
 630 setup_tx_res_fail:
 631         hinic_destroy_sq(hwdev, queue_idx);
 632
 633 create_sq_fail:
 634         rte_free(txq);
 635
 636         return rc;
 637 }
 638
 639 static void hinic_reset_tx_queue(struct rte_eth_dev *dev)
 640 {
 641         struct hinic_nic_dev *nic_dev;
 642         struct hinic_txq *txq;
 643         struct hinic_nic_io *nic_io;
 644         struct hinic_hwdev *hwdev;
 645         volatile u32 *ci_addr;
 646         int q_id = 0;
 647
 648         nic_dev = HINIC_ETH_DEV_TO_PRIVATE_NIC_DEV(dev);
 649         hwdev = nic_dev->hwdev;
 650         nic_io = hwdev->nic_io;
 651
 652         for (q_id = 0; q_id < nic_dev->num_sq; q_id++) {
 653                 txq = dev->data->tx_queues[q_id];
 654
 655                 txq->wq->cons_idx = 0;
 656                 txq->wq->prod_idx = 0;
 657                 txq->wq->delta = txq->q_depth;
 658                 txq->wq->mask  = txq->q_depth - 1;
 659
 660                 /* clear hardware ci */
 661                 ci_addr = (volatile u32 *)HINIC_CI_VADDR(nic_io->ci_vaddr_base,
 662                                                         q_id);
 663                 *ci_addr = 0;
 664         }
 665 }
 666
 667 /**
 668  * Get link speed from NIC.
 669  *
 670  * @param dev
 671  *   Pointer to Ethernet device structure.
 672  * @param speed_capa
 673  *   Pointer to link speed structure.
 674  */
 675 static void hinic_get_speed_capa(struct rte_eth_dev *dev, uint32_t *speed_capa)
 676 {
 677         struct hinic_nic_dev *nic_dev = HINIC_ETH_DEV_TO_PRIVATE_NIC_DEV(dev);
 678         u32 supported_link, advertised_link;
 679         int err;
 680
 681 #define HINIC_LINK_MODE_SUPPORT_1G      (1U << HINIC_GE_BASE_KX)
 682
 683 #define HINIC_LINK_MODE_SUPPORT_10G     (1U << HINIC_10GE_BASE_KR)
 684
 685 #define HINIC_LINK_MODE_SUPPORT_25G     ((1U << HINIC_25GE_BASE_KR_S) | \
 686                                         (1U << HINIC_25GE_BASE_CR_S) | \
 687                                         (1U << HINIC_25GE_BASE_KR) | \
 688                                         (1U << HINIC_25GE_BASE_CR))
 689
 690 #define HINIC_LINK_MODE_SUPPORT_40G     ((1U << HINIC_40GE_BASE_KR4) | \
 691                                         (1U << HINIC_40GE_BASE_CR4))
 692
 693 #define HINIC_LINK_MODE_SUPPORT_100G    ((1U << HINIC_100GE_BASE_KR4) | \
 694                                         (1U << HINIC_100GE_BASE_CR4))
 695
 696         err = hinic_get_link_mode(nic_dev->hwdev,
 697                                   &supported_link, &advertised_link);
 698         if (err || supported_link == HINIC_SUPPORTED_UNKNOWN ||
 699             advertised_link == HINIC_SUPPORTED_UNKNOWN) {
 700                 PMD_DRV_LOG(WARNING, "Get speed capability info failed, device: %s, port_id: %u",
 701                           nic_dev->proc_dev_name, dev->data->port_id);
 702         } else {
 703                 *speed_capa = 0;
 704                 if (!!(supported_link & HINIC_LINK_MODE_SUPPORT_1G))
 705                         *speed_capa |= ETH_LINK_SPEED_1G;
 706                 if (!!(supported_link & HINIC_LINK_MODE_SUPPORT_10G))
 707                         *speed_capa |= ETH_LINK_SPEED_10G;
 708                 if (!!(supported_link & HINIC_LINK_MODE_SUPPORT_25G))
 709                         *speed_capa |= ETH_LINK_SPEED_25G;
 710                 if (!!(supported_link & HINIC_LINK_MODE_SUPPORT_40G))
 711                         *speed_capa |= ETH_LINK_SPEED_40G;
 712                 if (!!(supported_link & HINIC_LINK_MODE_SUPPORT_100G))
 713                         *speed_capa |= ETH_LINK_SPEED_100G;
 714         }
 715 }
 716
 717 /**
 718  * DPDK callback to get information about the device.
 719  *
 720  * @param dev
 721  *   Pointer to Ethernet device structure.
 722  * @param info
 723  *   Pointer to Info structure output buffer.
 724  */
 725 static int
 726 hinic_dev_infos_get(struct rte_eth_dev *dev, struct rte_eth_dev_info *info)
 727 {
 728         struct hinic_nic_dev *nic_dev = HINIC_ETH_DEV_TO_PRIVATE_NIC_DEV(dev);
 729
 730         info->max_rx_queues  = nic_dev->nic_cap.max_rqs;
 731         info->max_tx_queues  = nic_dev->nic_cap.max_sqs;
 732         info->min_rx_bufsize = HINIC_MIN_RX_BUF_SIZE;
 733         info->max_rx_pktlen  = HINIC_MAX_JUMBO_FRAME_SIZE;
 734         info->max_mac_addrs  = HINIC_MAX_UC_MAC_ADDRS;
 735         info->min_mtu = HINIC_MIN_MTU_SIZE;
 736         info->max_mtu = HINIC_MAX_MTU_SIZE;
 737         info->max_lro_pkt_size = HINIC_MAX_LRO_SIZE;
 738
 739         hinic_get_speed_capa(dev, &info->speed_capa);
 740         info->rx_queue_offload_capa = 0;
 741         info->rx_offload_capa = DEV_RX_OFFLOAD_VLAN_STRIP |
 742                                 DEV_RX_OFFLOAD_IPV4_CKSUM |
 743                                 DEV_RX_OFFLOAD_UDP_CKSUM |
 744                                 DEV_RX_OFFLOAD_TCP_CKSUM |
 745                                 DEV_RX_OFFLOAD_VLAN_FILTER |
 746                                 DEV_RX_OFFLOAD_SCATTER |
 747                                 DEV_RX_OFFLOAD_JUMBO_FRAME |
 748                                 DEV_RX_OFFLOAD_TCP_LRO |
 749                                 DEV_RX_OFFLOAD_RSS_HASH;
 750
 751         info->tx_queue_offload_capa = 0;
 752         info->tx_offload_capa = DEV_TX_OFFLOAD_VLAN_INSERT |
 753                                 DEV_TX_OFFLOAD_IPV4_CKSUM |
 754                                 DEV_TX_OFFLOAD_UDP_CKSUM |
 755                                 DEV_TX_OFFLOAD_TCP_CKSUM |
 756                                 DEV_TX_OFFLOAD_SCTP_CKSUM |
 757                                 DEV_TX_OFFLOAD_OUTER_IPV4_CKSUM |
 758                                 DEV_TX_OFFLOAD_TCP_TSO |
 759                                 DEV_TX_OFFLOAD_MULTI_SEGS;
 760
 761         info->hash_key_size = HINIC_RSS_KEY_SIZE;
 762         info->reta_size = HINIC_RSS_INDIR_SIZE;
 763         info->flow_type_rss_offloads = HINIC_RSS_OFFLOAD_ALL;
 764         info->rx_desc_lim = hinic_rx_desc_lim;
 765         info->tx_desc_lim = hinic_tx_desc_lim;
 766
 767         /* Driver-preferred Rx/Tx parameters */
 768         info->default_rxportconf.burst_size = HINIC_DEFAULT_BURST_SIZE;
 769         info->default_txportconf.burst_size = HINIC_DEFAULT_BURST_SIZE;
 770         info->default_rxportconf.nb_queues = HINIC_DEFAULT_NB_QUEUES;
 771         info->default_txportconf.nb_queues = HINIC_DEFAULT_NB_QUEUES;
 772         info->default_rxportconf.ring_size = HINIC_DEFAULT_RING_SIZE;
 773         info->default_txportconf.ring_size = HINIC_DEFAULT_RING_SIZE;
 774
 775         return 0;
 776 }
 777
 778 static int hinic_fw_version_get(struct rte_eth_dev *dev, char *fw_version,
 779                                 size_t fw_size)
 780 {
 781         struct hinic_nic_dev *nic_dev = HINIC_ETH_DEV_TO_PRIVATE_NIC_DEV(dev);
 782         char fw_ver[HINIC_MGMT_VERSION_MAX_LEN] = {0};
 783         int err;
 784
 785         err = hinic_get_mgmt_version(nic_dev->hwdev, fw_ver);
 786         if (err) {
 787                 PMD_DRV_LOG(ERR, "Failed to get fw version");
 788                 return -EINVAL;
 789         }
 790
 791         if (fw_size < strlen(fw_ver) + 1)
 792                 return (strlen(fw_ver) + 1);
 793
 794         snprintf(fw_version, fw_size, "%s", fw_ver);
 795
 796         return 0;
 797 }
 798
 799 static int hinic_config_rx_mode(struct hinic_nic_dev *nic_dev, u32 rx_mode_ctrl)
 800 {
 801         int err;
 802
 803         err = hinic_set_rx_mode(nic_dev->hwdev, rx_mode_ctrl);
 804         if (err) {
 805                 PMD_DRV_LOG(ERR, "Failed to set rx mode");
 806                 return -EINVAL;
 807         }
 808         nic_dev->rx_mode_status = rx_mode_ctrl;
 809
 810         return 0;
 811 }
 812
 813 static int hinic_rxtx_configure(struct rte_eth_dev *dev)
 814 {
 815         struct hinic_nic_dev *nic_dev = HINIC_ETH_DEV_TO_PRIVATE_NIC_DEV(dev);
 816         int err;
 817
 818         /* rx configure, if rss enable, need to init default configuration */
 819         err = hinic_rx_configure(dev);
 820         if (err) {
 821                 PMD_DRV_LOG(ERR, "Configure rss failed");
 822                 return err;
 823         }
 824
 825         /* rx mode init */
 826         err = hinic_config_rx_mode(nic_dev, HINIC_DEFAULT_RX_MODE);
 827         if (err) {
 828                 PMD_DRV_LOG(ERR, "Configure rx_mode:0x%x failed",
 829                         HINIC_DEFAULT_RX_MODE);
 830                 goto set_rx_mode_fail;
 831         }
 832
 833         return HINIC_OK;
 834
 835 set_rx_mode_fail:
 836         hinic_rx_remove_configure(dev);
 837
 838         return err;
 839 }
 840
 841 static void hinic_remove_rxtx_configure(struct rte_eth_dev *dev)
 842 {
 843         struct hinic_nic_dev *nic_dev = HINIC_ETH_DEV_TO_PRIVATE_NIC_DEV(dev);
 844
 845         (void)hinic_config_rx_mode(nic_dev, 0);
 846         hinic_rx_remove_configure(dev);
 847 }
 848
 849 static int hinic_priv_get_dev_link_status(struct hinic_nic_dev *nic_dev,
 850                                           struct rte_eth_link *link)
 851 {
 852         int rc;
 853         u8 port_link_status = 0;
 854         struct nic_port_info port_link_info;
 855         struct hinic_hwdev *nic_hwdev = nic_dev->hwdev;
 856         uint32_t port_speed[LINK_SPEED_MAX] = {ETH_SPEED_NUM_10M,
 857                                         ETH_SPEED_NUM_100M, ETH_SPEED_NUM_1G,
 858                                         ETH_SPEED_NUM_10G, ETH_SPEED_NUM_25G,
 859                                         ETH_SPEED_NUM_40G, ETH_SPEED_NUM_100G};
 860
 861         rc = hinic_get_link_status(nic_hwdev, &port_link_status);
 862         if (rc)
 863                 return rc;
 864
 865         if (!port_link_status) {
 866                 link->link_status = ETH_LINK_DOWN;
 867                 link->link_speed = 0;
 868                 link->link_duplex = ETH_LINK_HALF_DUPLEX;
 869                 link->link_autoneg = ETH_LINK_FIXED;
 870                 return HINIC_OK;
 871         }
 872
 873         memset(&port_link_info, 0, sizeof(port_link_info));
 874         rc = hinic_get_port_info(nic_hwdev, &port_link_info);
 875         if (rc)
 876                 return rc;
 877
 878         link->link_speed = port_speed[port_link_info.speed % LINK_SPEED_MAX];
 879         link->link_duplex = port_link_info.duplex;
 880         link->link_autoneg = port_link_info.autoneg_state;
 881         link->link_status = port_link_status;
 882
 883         return HINIC_OK;
 884 }
 885
 886 /**
 887  * DPDK callback to retrieve physical link information.
 888  *
 889  * @param dev
 890  *   Pointer to Ethernet device structure.
 891  * @param wait_to_complete
 892  *   Wait for request completion.
 893  *
 894  * @return
 895  *   0 link status changed, -1 link status not changed
 896  */
 897 static int hinic_link_update(struct rte_eth_dev *dev, int wait_to_complete)
 898 {
 899 #define CHECK_INTERVAL 10  /* 10ms */
 900 #define MAX_REPEAT_TIME 100  /* 1s (100 * 10ms) in total */
 901         int rc = HINIC_OK;
 902         struct rte_eth_link link;
 903         struct hinic_nic_dev *nic_dev = HINIC_ETH_DEV_TO_PRIVATE_NIC_DEV(dev);
 904         unsigned int rep_cnt = MAX_REPEAT_TIME;
 905
 906         memset(&link, 0, sizeof(link));
 907         do {
 908                 /* Get link status information from hardware */
 909                 rc = hinic_priv_get_dev_link_status(nic_dev, &link);
 910                 if (rc != HINIC_OK) {
 911                         link.link_speed = ETH_SPEED_NUM_NONE;
 912                         link.link_duplex = ETH_LINK_FULL_DUPLEX;
 913                         PMD_DRV_LOG(ERR, "Get link status failed");
 914                         goto out;
 915                 }
 916
 917                 if (!wait_to_complete || link.link_status)
 918                         break;
 919
 920                 rte_delay_ms(CHECK_INTERVAL);
 921         } while (rep_cnt--);
 922
 923 out:
 924         rc = rte_eth_linkstatus_set(dev, &link);
 925         return rc;
 926 }
 927
 928 /**
 929  * DPDK callback to bring the link UP.
 930  *
 931  * @param dev
 932  *   Pointer to Ethernet device structure.
 933  *
 934  * @return
 935  *   0 on success, negative errno value on failure.
 936  */
 937 static int hinic_dev_set_link_up(struct rte_eth_dev *dev)
 938 {
 939         struct hinic_nic_dev *nic_dev = HINIC_ETH_DEV_TO_PRIVATE_NIC_DEV(dev);
 940         int ret;
 941
 942         ret = hinic_set_xsfp_tx_status(nic_dev->hwdev, true);
 943         if (ret) {
 944                 PMD_DRV_LOG(ERR, "Enable port tx xsfp failed, dev_name: %s, port_id: %d",
 945                             nic_dev->proc_dev_name, dev->data->port_id);
 946                 return ret;
 947         }
 948
 949         /* link status follow phy port status, up will open pma */
 950         ret = hinic_set_port_enable(nic_dev->hwdev, true);
 951         if (ret)
 952                 PMD_DRV_LOG(ERR, "Set mac link up failed, dev_name: %s, port_id: %d",
 953                             nic_dev->proc_dev_name, dev->data->port_id);
 954
 955         return ret;
 956 }
 957
 958 /**
 959  * DPDK callback to bring the link DOWN.
 960  *
 961  * @param dev
 962  *   Pointer to Ethernet device structure.
 963  *
 964  * @return
 965  *   0 on success, negative errno value on failure.
 966  */
 967 static int hinic_dev_set_link_down(struct rte_eth_dev *dev)
 968 {
 969         struct hinic_nic_dev *nic_dev = HINIC_ETH_DEV_TO_PRIVATE_NIC_DEV(dev);
 970         int ret;
 971
 972         ret = hinic_set_xsfp_tx_status(nic_dev->hwdev, false);
 973         if (ret) {
 974                 PMD_DRV_LOG(ERR, "Disable port tx xsfp failed, dev_name: %s, port_id: %d",
 975                             nic_dev->proc_dev_name, dev->data->port_id);
 976                 return ret;
 977         }
 978
 979         /* link status follow phy port status, up will close pma */
 980         ret = hinic_set_port_enable(nic_dev->hwdev, false);
 981         if (ret)
 982                 PMD_DRV_LOG(ERR, "Set mac link down failed, dev_name: %s, port_id: %d",
 983                             nic_dev->proc_dev_name, dev->data->port_id);
 984
 985         return ret;
 986 }
 987
 988 /**
 989  * DPDK callback to start the device.
 990  *
 991  * @param dev
 992  *   Pointer to Ethernet device structure.
 993  *
 994  * @return
 995  *   0 on success, negative errno value on failure.
 996  */
 997 static int hinic_dev_start(struct rte_eth_dev *dev)
 998 {
 999         int rc;
1000         char *name;
1001         struct hinic_nic_dev *nic_dev;
1002
1003         nic_dev = HINIC_ETH_DEV_TO_PRIVATE_NIC_DEV(dev);
1004         name = dev->data->name;
1005
1006         /* reset rx and tx queue */
1007         hinic_reset_rx_queue(dev);
1008         hinic_reset_tx_queue(dev);
1009
1010         /* get func rx buf size */
1011         hinic_get_func_rx_buf_size(nic_dev);
1012
1013         /* init txq and rxq context */
1014         rc = hinic_init_qp_ctxts(nic_dev->hwdev);
1015         if (rc) {
1016                 PMD_DRV_LOG(ERR, "Initialize qp context failed, dev_name: %s",
1017                             name);
1018                 goto init_qp_fail;
1019         }
1020
1021         /* rss template */
1022         rc = hinic_config_mq_mode(dev, TRUE);
1023         if (rc) {
1024                 PMD_DRV_LOG(ERR, "Configure mq mode failed, dev_name: %s",
1025                             name);
1026                 goto cfg_mq_mode_fail;
1027         }
1028
1029         /* set default mtu */
1030         rc = hinic_set_port_mtu(nic_dev->hwdev, nic_dev->mtu_size);
1031         if (rc) {
1032                 PMD_DRV_LOG(ERR, "Set mtu_size[%d] failed, dev_name: %s",
1033                             nic_dev->mtu_size, name);
1034                 goto set_mtu_fail;
1035         }
1036
1037         /* configure rss rx_mode and other rx or tx default feature */
1038         rc = hinic_rxtx_configure(dev);
1039         if (rc) {
1040                 PMD_DRV_LOG(ERR, "Configure tx and rx failed, dev_name: %s",
1041                             name);
1042                 goto cfg_rxtx_fail;
1043         }
1044
1045         /* reactive pf status, so that uP report asyn event */
1046         hinic_set_pf_status(nic_dev->hwdev->hwif, HINIC_PF_STATUS_ACTIVE_FLAG);
1047
1048         /* open virtual port and ready to start packet receiving */
1049         rc = hinic_set_vport_enable(nic_dev->hwdev, true);
1050         if (rc) {
1051                 PMD_DRV_LOG(ERR, "Enable vport failed, dev_name:%s", name);
1052                 goto en_vport_fail;
1053         }
1054
1055         /* open physical port and start packet receiving */
1056         rc = hinic_set_port_enable(nic_dev->hwdev, true);
1057         if (rc) {
1058                 PMD_DRV_LOG(ERR, "Enable physical port failed, dev_name: %s",
1059                             name);
1060                 goto en_port_fail;
1061         }
1062
1063         /* update eth_dev link status */
1064         if (dev->data->dev_conf.intr_conf.lsc != 0)
1065                 (void)hinic_link_update(dev, 0);
1066
1067         rte_bit_relaxed_set32(HINIC_DEV_START, &nic_dev->dev_status);
1068
1069         return 0;
1070
1071 en_port_fail:
1072         (void)hinic_set_vport_enable(nic_dev->hwdev, false);
1073
1074 en_vport_fail:
1075         hinic_set_pf_status(nic_dev->hwdev->hwif, HINIC_PF_STATUS_INIT);
1076
1077         /* Flush tx && rx chip resources in case of set vport fake fail */
1078         (void)hinic_flush_qp_res(nic_dev->hwdev);
1079         rte_delay_ms(100);
1080
1081         hinic_remove_rxtx_configure(dev);
1082
1083 cfg_rxtx_fail:
1084 set_mtu_fail:
1085 cfg_mq_mode_fail:
1086         hinic_free_qp_ctxts(nic_dev->hwdev);
1087
1088 init_qp_fail:
1089         hinic_free_all_rx_mbuf(dev);
1090         hinic_free_all_tx_mbuf(dev);
1091
1092         return rc;
1093 }
1094
1095 /**
1096  * DPDK callback to release the receive queue.
1097  *
1098  * @param queue
1099  *   Generic receive queue pointer.
1100  */
1101 static void hinic_rx_queue_release(void *queue)
1102 {
1103         struct hinic_rxq *rxq = queue;
1104         struct hinic_nic_dev *nic_dev;
1105
1106         if (!rxq) {
1107                 PMD_DRV_LOG(WARNING, "Rxq is null when release");
1108                 return;
1109         }
1110         nic_dev = rxq->nic_dev;
1111
1112         /* free rxq_pkt mbuf */
1113         hinic_free_all_rx_mbufs(rxq);
1114
1115         /* free rxq_cqe, rxq_info */
1116         hinic_free_rx_resources(rxq);
1117
1118         /* free root rq wq */
1119         hinic_destroy_rq(nic_dev->hwdev, rxq->q_id);
1120
1121         nic_dev->rxqs[rxq->q_id] = NULL;
1122
1123         /* free rxq */
1124         rte_free(rxq);
1125 }
1126
1127 /**
1128  * DPDK callback to release the transmit queue.
1129  *
1130  * @param queue
1131  *   Generic transmit queue pointer.
1132  */
1133 static void hinic_tx_queue_release(void *queue)
1134 {
1135         struct hinic_txq *txq = queue;
1136         struct hinic_nic_dev *nic_dev;
1137
1138         if (!txq) {
1139                 PMD_DRV_LOG(WARNING, "Txq is null when release");
1140                 return;
1141         }
1142         nic_dev = txq->nic_dev;
1143
1144         /* free txq_pkt mbuf */
1145         hinic_free_all_tx_mbufs(txq);
1146
1147         /* free txq_info */
1148         hinic_free_tx_resources(txq);
1149
1150         /* free root sq wq */
1151         hinic_destroy_sq(nic_dev->hwdev, txq->q_id);
1152         nic_dev->txqs[txq->q_id] = NULL;
1153
1154         /* free txq */
1155         rte_free(txq);
1156 }
1157
1158 static void hinic_free_all_rq(struct hinic_nic_dev *nic_dev)
1159 {
1160         u16 q_id;
1161
1162         for (q_id = 0; q_id < nic_dev->num_rq; q_id++)
1163                 hinic_destroy_rq(nic_dev->hwdev, q_id);
1164 }
1165
1166 static void hinic_free_all_sq(struct hinic_nic_dev *nic_dev)
1167 {
1168         u16 q_id;
1169
1170         for (q_id = 0; q_id < nic_dev->num_sq; q_id++)
1171                 hinic_destroy_sq(nic_dev->hwdev, q_id);
1172 }
1173
1174 /**
1175  * DPDK callback to stop the device.
1176  *
1177  * @param dev
1178  *   Pointer to Ethernet device structure.
1179  */
1180 static void hinic_dev_stop(struct rte_eth_dev *dev)
1181 {
1182         int rc;
1183         char *name;
1184         uint16_t port_id;
1185         struct hinic_nic_dev *nic_dev;
1186         struct rte_eth_link link;
1187
1188         nic_dev = HINIC_ETH_DEV_TO_PRIVATE_NIC_DEV(dev);
1189         name = dev->data->name;
1190         port_id = dev->data->port_id;
1191
1192         dev->data->dev_started = 0;
1193
1194         if (!rte_bit_relaxed_test_and_clear32(HINIC_DEV_START,
1195                                               &nic_dev->dev_status)) {
1196                 PMD_DRV_LOG(INFO, "Device %s already stopped", name);
1197                 return;
1198         }
1199
1200         /* just stop phy port and vport */
1201         rc = hinic_set_port_enable(nic_dev->hwdev, false);
1202         if (rc)
1203                 PMD_DRV_LOG(WARNING, "Disable phy port failed, error: %d, dev_name: %s, port_id: %d",
1204                           rc, name, port_id);
1205
1206         rc = hinic_set_vport_enable(nic_dev->hwdev, false);
1207         if (rc)
1208                 PMD_DRV_LOG(WARNING, "Disable vport failed, error: %d, dev_name: %s, port_id: %d",
1209                           rc, name, port_id);
1210
1211         /* Clear recorded link status */
1212         memset(&link, 0, sizeof(link));
1213         (void)rte_eth_linkstatus_set(dev, &link);
1214
1215         /* flush pending io request */
1216         rc = hinic_rx_tx_flush(nic_dev->hwdev);
1217         if (rc)
1218                 PMD_DRV_LOG(WARNING, "Flush pending io failed, error: %d, dev_name: %s, port_id: %d",
1219                             rc, name, port_id);
1220
1221         /* clean rss table and rx_mode */
1222         hinic_remove_rxtx_configure(dev);
1223
1224         /* clean root context */
1225         hinic_free_qp_ctxts(nic_dev->hwdev);
1226
1227         hinic_destroy_fdir_filter(dev);
1228
1229         /* free mbuf */
1230         hinic_free_all_rx_mbuf(dev);
1231         hinic_free_all_tx_mbuf(dev);
1232 }
1233
1234 static void hinic_disable_interrupt(struct rte_eth_dev *dev)
1235 {
1236         struct hinic_nic_dev *nic_dev = HINIC_ETH_DEV_TO_PRIVATE_NIC_DEV(dev);
1237         struct rte_pci_device *pci_dev = RTE_ETH_DEV_TO_PCI(dev);
1238         int ret, retries = 0;
1239
1240         rte_bit_relaxed_clear32(HINIC_DEV_INTR_EN, &nic_dev->dev_status);
1241
1242         /* disable msix interrupt in hardware */
1243         hinic_set_msix_state(nic_dev->hwdev, 0, HINIC_MSIX_DISABLE);
1244
1245         /* disable rte interrupt */
1246         ret = rte_intr_disable(&pci_dev->intr_handle);
1247         if (ret)
1248                 PMD_DRV_LOG(ERR, "Disable intr failed: %d", ret);
1249
1250         do {
1251                 ret =
1252                 rte_intr_callback_unregister(&pci_dev->intr_handle,
1253                                              hinic_dev_interrupt_handler, dev);
1254                 if (ret >= 0) {
1255                         break;
1256                 } else if (ret == -EAGAIN) {
1257                         rte_delay_ms(100);
1258                         retries++;
1259                 } else {
1260                         PMD_DRV_LOG(ERR, "intr callback unregister failed: %d",
1261                                     ret);
1262                         break;
1263                 }
1264         } while (retries < HINIC_INTR_CB_UNREG_MAX_RETRIES);
1265
1266         if (retries == HINIC_INTR_CB_UNREG_MAX_RETRIES)
1267                 PMD_DRV_LOG(ERR, "Unregister intr callback failed after %d retries",
1268                             retries);
1269 }
1270
1271 static int hinic_set_dev_promiscuous(struct hinic_nic_dev *nic_dev, bool enable)
1272 {
1273         u32 rx_mode_ctrl;
1274         int err;
1275
1276         err = hinic_mutex_lock(&nic_dev->rx_mode_mutex);
1277         if (err)
1278                 return err;
1279
1280         rx_mode_ctrl = nic_dev->rx_mode_status;
1281
1282         if (enable)
1283                 rx_mode_ctrl |= HINIC_RX_MODE_PROMISC;
1284         else
1285                 rx_mode_ctrl &= (~HINIC_RX_MODE_PROMISC);
1286
1287         err = hinic_config_rx_mode(nic_dev, rx_mode_ctrl);
1288
1289         (void)hinic_mutex_unlock(&nic_dev->rx_mode_mutex);
1290
1291         return err;
1292 }
1293
1294 /**
1295  * DPDK callback to get device statistics.
1296  *
1297  * @param dev
1298  *   Pointer to Ethernet device structure.
1299  * @param stats
1300  *   Stats structure output buffer.
1301  *
1302  * @return
1303  *   0 on success and stats is filled,
1304  *   negative error value otherwise.
1305  */
1306 static int
1307 hinic_dev_stats_get(struct rte_eth_dev *dev, struct rte_eth_stats *stats)
1308 {
1309         int i, err, q_num;
1310         u64 rx_discards_pmd = 0;
1311         struct hinic_nic_dev *nic_dev = HINIC_ETH_DEV_TO_PRIVATE_NIC_DEV(dev);
1312         struct hinic_vport_stats vport_stats;
1313         struct hinic_rxq        *rxq = NULL;
1314         struct hinic_rxq_stats rxq_stats;
1315         struct hinic_txq        *txq = NULL;
1316         struct hinic_txq_stats txq_stats;
1317
1318         err = hinic_get_vport_stats(nic_dev->hwdev, &vport_stats);
1319         if (err) {
1320                 PMD_DRV_LOG(ERR, "Get vport stats from fw failed, nic_dev: %s",
1321                         nic_dev->proc_dev_name);
1322                 return err;
1323         }
1324
1325         dev->data->rx_mbuf_alloc_failed = 0;
1326
1327         /* rx queue stats */
1328         q_num = (nic_dev->num_rq < RTE_ETHDEV_QUEUE_STAT_CNTRS) ?
1329                         nic_dev->num_rq : RTE_ETHDEV_QUEUE_STAT_CNTRS;
1330         for (i = 0; i < q_num; i++) {
1331                 rxq = nic_dev->rxqs[i];
1332                 hinic_rxq_get_stats(rxq, &rxq_stats);
1333                 stats->q_ipackets[i] = rxq_stats.packets;
1334                 stats->q_ibytes[i] = rxq_stats.bytes;
1335                 stats->q_errors[i] = rxq_stats.rx_discards;
1336
1337                 stats->ierrors += rxq_stats.errors;
1338                 rx_discards_pmd += rxq_stats.rx_discards;
1339                 dev->data->rx_mbuf_alloc_failed += rxq_stats.rx_nombuf;
1340         }
1341
1342         /* tx queue stats */
1343         q_num = (nic_dev->num_sq < RTE_ETHDEV_QUEUE_STAT_CNTRS) ?
1344                 nic_dev->num_sq : RTE_ETHDEV_QUEUE_STAT_CNTRS;
1345         for (i = 0; i < q_num; i++) {
1346                 txq = nic_dev->txqs[i];
1347                 hinic_txq_get_stats(txq, &txq_stats);
1348                 stats->q_opackets[i] = txq_stats.packets;
1349                 stats->q_obytes[i] = txq_stats.bytes;
1350                 stats->oerrors += (txq_stats.tx_busy + txq_stats.off_errs);
1351         }
1352
1353         /* vport stats */
1354         stats->oerrors += vport_stats.tx_discard_vport;
1355
1356         stats->imissed = vport_stats.rx_discard_vport + rx_discards_pmd;
1357
1358         stats->ipackets = (vport_stats.rx_unicast_pkts_vport +
1359                         vport_stats.rx_multicast_pkts_vport +
1360                         vport_stats.rx_broadcast_pkts_vport -
1361                         rx_discards_pmd);
1362
1363         stats->opackets = (vport_stats.tx_unicast_pkts_vport +
1364                         vport_stats.tx_multicast_pkts_vport +
1365                         vport_stats.tx_broadcast_pkts_vport);
1366
1367         stats->ibytes = (vport_stats.rx_unicast_bytes_vport +
1368                         vport_stats.rx_multicast_bytes_vport +
1369                         vport_stats.rx_broadcast_bytes_vport);
1370
1371         stats->obytes = (vport_stats.tx_unicast_bytes_vport +
1372                         vport_stats.tx_multicast_bytes_vport +
1373                         vport_stats.tx_broadcast_bytes_vport);
1374         return 0;
1375 }
1376
1377 /**
1378  * DPDK callback to clear device statistics.
1379  *
1380  * @param dev
1381  *   Pointer to Ethernet device structure.
1382  */
1383 static int hinic_dev_stats_reset(struct rte_eth_dev *dev)
1384 {
1385         int qid;
1386         struct hinic_rxq        *rxq = NULL;
1387         struct hinic_txq        *txq = NULL;
1388         struct hinic_nic_dev *nic_dev = HINIC_ETH_DEV_TO_PRIVATE_NIC_DEV(dev);
1389         int ret;
1390
1391         ret = hinic_clear_vport_stats(nic_dev->hwdev);
1392         if (ret != 0)
1393                 return ret;
1394
1395         for (qid = 0; qid < nic_dev->num_rq; qid++) {
1396                 rxq = nic_dev->rxqs[qid];
1397                 hinic_rxq_stats_reset(rxq);
1398         }
1399
1400         for (qid = 0; qid < nic_dev->num_sq; qid++) {
1401                 txq = nic_dev->txqs[qid];
1402                 hinic_txq_stats_reset(txq);
1403         }
1404
1405         return 0;
1406 }
1407
1408 /**
1409  * DPDK callback to clear device extended statistics.
1410  *
1411  * @param dev
1412  *   Pointer to Ethernet device structure.
1413  */
1414 static int hinic_dev_xstats_reset(struct rte_eth_dev *dev)
1415 {
1416         struct hinic_nic_dev *nic_dev = HINIC_ETH_DEV_TO_PRIVATE_NIC_DEV(dev);
1417         int ret;
1418
1419         ret = hinic_dev_stats_reset(dev);
1420         if (ret != 0)
1421                 return ret;
1422
1423         if (hinic_func_type(nic_dev->hwdev) != TYPE_VF) {
1424                 ret = hinic_clear_phy_port_stats(nic_dev->hwdev);
1425                 if (ret != 0)
1426                         return ret;
1427         }
1428
1429         return 0;
1430 }
1431
1432 static void hinic_gen_random_mac_addr(struct rte_ether_addr *mac_addr)
1433 {
1434         uint64_t random_value;
1435
1436         /* Set Organizationally Unique Identifier (OUI) prefix */
1437         mac_addr->addr_bytes[0] = 0x00;
1438         mac_addr->addr_bytes[1] = 0x09;
1439         mac_addr->addr_bytes[2] = 0xC0;
1440         /* Force indication of locally assigned MAC address. */
1441         mac_addr->addr_bytes[0] |= RTE_ETHER_LOCAL_ADMIN_ADDR;
1442         /* Generate the last 3 bytes of the MAC address with a random number. */
1443         random_value = rte_rand();
1444         memcpy(&mac_addr->addr_bytes[3], &random_value, 3);
1445 }
1446
1447 /**
1448  * Init mac_vlan table in NIC.
1449  *
1450  * @param dev
1451  *   Pointer to Ethernet device structure.
1452  *
1453  * @return
1454  *   0 on success and stats is filled,
1455  *   negative error value otherwise.
1456  */
1457 static int hinic_init_mac_addr(struct rte_eth_dev *eth_dev)
1458 {
1459         struct hinic_nic_dev *nic_dev =
1460                                 HINIC_ETH_DEV_TO_PRIVATE_NIC_DEV(eth_dev);
1461         uint8_t addr_bytes[RTE_ETHER_ADDR_LEN];
1462         u16 func_id = 0;
1463         int rc = 0;
1464
1465         rc = hinic_get_default_mac(nic_dev->hwdev, addr_bytes);
1466         if (rc)
1467                 return rc;
1468
1469         rte_ether_addr_copy((struct rte_ether_addr *)addr_bytes,
1470                 &eth_dev->data->mac_addrs[0]);
1471         if (rte_is_zero_ether_addr(&eth_dev->data->mac_addrs[0]))
1472                 hinic_gen_random_mac_addr(&eth_dev->data->mac_addrs[0]);
1473
1474         func_id = hinic_global_func_id(nic_dev->hwdev);
1475         rc = hinic_set_mac(nic_dev->hwdev,
1476                         eth_dev->data->mac_addrs[0].addr_bytes,
1477                         0, func_id);
1478         if (rc && rc != HINIC_PF_SET_VF_ALREADY)
1479                 return rc;
1480
1481         rte_ether_addr_copy(&eth_dev->data->mac_addrs[0],
1482                         &nic_dev->default_addr);
1483
1484         return 0;
1485 }
1486
1487 static void hinic_delete_mc_addr_list(struct hinic_nic_dev *nic_dev)
1488 {
1489         u16 func_id;
1490         u32 i;
1491
1492         func_id = hinic_global_func_id(nic_dev->hwdev);
1493
1494         for (i = 0; i < HINIC_MAX_MC_MAC_ADDRS; i++) {
1495                 if (rte_is_zero_ether_addr(&nic_dev->mc_list[i]))
1496                         break;
1497
1498                 hinic_del_mac(nic_dev->hwdev, nic_dev->mc_list[i].addr_bytes,
1499                               0, func_id);
1500                 memset(&nic_dev->mc_list[i], 0, sizeof(struct rte_ether_addr));
1501         }
1502 }
1503
1504 /**
1505  * Deinit mac_vlan table in NIC.
1506  *
1507  * @param dev
1508  *   Pointer to Ethernet device structure.
1509  *
1510  * @return
1511  *   0 on success and stats is filled,
1512  *   negative error value otherwise.
1513  */
1514 static void hinic_deinit_mac_addr(struct rte_eth_dev *eth_dev)
1515 {
1516         struct hinic_nic_dev *nic_dev =
1517                                 HINIC_ETH_DEV_TO_PRIVATE_NIC_DEV(eth_dev);
1518         u16 func_id = 0;
1519         int rc;
1520         int i;
1521
1522         func_id = hinic_global_func_id(nic_dev->hwdev);
1523
1524         for (i = 0; i < HINIC_MAX_UC_MAC_ADDRS; i++) {
1525                 if (rte_is_zero_ether_addr(&eth_dev->data->mac_addrs[i]))
1526                         continue;
1527
1528                 rc = hinic_del_mac(nic_dev->hwdev,
1529                                    eth_dev->data->mac_addrs[i].addr_bytes,
1530                                    0, func_id);
1531                 if (rc && rc != HINIC_PF_SET_VF_ALREADY)
1532                         PMD_DRV_LOG(ERR, "Delete mac table failed, dev_name: %s",
1533                                     eth_dev->data->name);
1534
1535                 memset(&eth_dev->data->mac_addrs[i], 0,
1536                        sizeof(struct rte_ether_addr));
1537         }
1538
1539         /* delete multicast mac addrs */
1540         hinic_delete_mc_addr_list(nic_dev);
1541 }
1542
1543 static int hinic_dev_set_mtu(struct rte_eth_dev *dev, uint16_t mtu)
1544 {
1545         struct hinic_nic_dev *nic_dev = HINIC_ETH_DEV_TO_PRIVATE_NIC_DEV(dev);
1546         uint32_t frame_size;
1547         int ret = 0;
1548
1549         PMD_DRV_LOG(INFO, "Set port mtu, port_id: %d, mtu: %d, max_pkt_len: %d",
1550                         dev->data->port_id, mtu, HINIC_MTU_TO_PKTLEN(mtu));
1551
1552         if (mtu < HINIC_MIN_MTU_SIZE || mtu > HINIC_MAX_MTU_SIZE) {
1553                 PMD_DRV_LOG(ERR, "Invalid mtu: %d, must between %d and %d",
1554                                 mtu, HINIC_MIN_MTU_SIZE, HINIC_MAX_MTU_SIZE);
1555                 return -EINVAL;
1556         }
1557
1558         ret = hinic_set_port_mtu(nic_dev->hwdev, mtu);
1559         if (ret) {
1560                 PMD_DRV_LOG(ERR, "Set port mtu failed, ret: %d", ret);
1561                 return ret;
1562         }
1563
1564         /* update max frame size */
1565         frame_size = HINIC_MTU_TO_PKTLEN(mtu);
1566         if (frame_size > RTE_ETHER_MAX_LEN)
1567                 dev->data->dev_conf.rxmode.offloads |=
1568                         DEV_RX_OFFLOAD_JUMBO_FRAME;
1569         else
1570                 dev->data->dev_conf.rxmode.offloads &=
1571                         ~DEV_RX_OFFLOAD_JUMBO_FRAME;
1572
1573         dev->data->dev_conf.rxmode.max_rx_pkt_len = frame_size;
1574         nic_dev->mtu_size = mtu;
1575
1576         return ret;
1577 }
1578
1579 static void hinic_store_vlan_filter(struct hinic_nic_dev *nic_dev,
1580                                         u16 vlan_id, bool on)
1581 {
1582         u32 vid_idx, vid_bit;
1583
1584         vid_idx = HINIC_VFTA_IDX(vlan_id);
1585         vid_bit = HINIC_VFTA_BIT(vlan_id);
1586
1587         if (on)
1588                 nic_dev->vfta[vid_idx] |= vid_bit;
1589         else
1590                 nic_dev->vfta[vid_idx] &= ~vid_bit;
1591 }
1592
1593 static bool hinic_find_vlan_filter(struct hinic_nic_dev *nic_dev,
1594                                 uint16_t vlan_id)
1595 {
1596         u32 vid_idx, vid_bit;
1597
1598         vid_idx = HINIC_VFTA_IDX(vlan_id);
1599         vid_bit = HINIC_VFTA_BIT(vlan_id);
1600
1601         return (nic_dev->vfta[vid_idx] & vid_bit) ? TRUE : FALSE;
1602 }
1603
1604 /**
1605  * DPDK callback to set vlan filter.
1606  *
1607  * @param dev
1608  *   Pointer to Ethernet device structure.
1609  * @param vlan_id
1610  *   vlan id is used to filter vlan packets
1611  * @param enable
1612  *   enable disable or enable vlan filter function
1613  */
1614 static int hinic_vlan_filter_set(struct rte_eth_dev *dev,
1615                                 uint16_t vlan_id, int enable)
1616 {
1617         struct hinic_nic_dev *nic_dev = HINIC_ETH_DEV_TO_PRIVATE_NIC_DEV(dev);
1618         int err = 0;
1619         u16 func_id;
1620
1621         if (vlan_id > RTE_ETHER_MAX_VLAN_ID)
1622                 return -EINVAL;
1623
1624         func_id = hinic_global_func_id(nic_dev->hwdev);
1625
1626         if (enable) {
1627                 /* If vlanid is already set, just return */
1628                 if (hinic_find_vlan_filter(nic_dev, vlan_id)) {
1629                         PMD_DRV_LOG(INFO, "Vlan %u has been added, device: %s",
1630                                   vlan_id, nic_dev->proc_dev_name);
1631                         return 0;
1632                 }
1633
1634                 err = hinic_add_remove_vlan(nic_dev->hwdev, vlan_id,
1635                                             func_id, TRUE);
1636         } else {
1637                 /* If vlanid can't be found, just return */
1638                 if (!hinic_find_vlan_filter(nic_dev, vlan_id)) {
1639                         PMD_DRV_LOG(INFO, "Vlan %u is not in the vlan filter list, device: %s",
1640                                   vlan_id, nic_dev->proc_dev_name);
1641                         return 0;
1642                 }
1643
1644                 err = hinic_add_remove_vlan(nic_dev->hwdev, vlan_id,
1645                                             func_id, FALSE);
1646         }
1647
1648         if (err) {
1649                 PMD_DRV_LOG(ERR, "%s vlan failed, func_id: %d, vlan_id: %d, err: %d",
1650                       enable ? "Add" : "Remove", func_id, vlan_id, err);
1651                 return err;
1652         }
1653
1654         hinic_store_vlan_filter(nic_dev, vlan_id, enable);
1655
1656         PMD_DRV_LOG(INFO, "%s vlan %u succeed, device: %s",
1657                   enable ? "Add" : "Remove", vlan_id, nic_dev->proc_dev_name);
1658         return 0;
1659 }
1660
1661 /**
1662  * DPDK callback to enable or disable vlan offload.
1663  *
1664  * @param dev
1665  *   Pointer to Ethernet device structure.
1666  * @param mask
1667  *   Definitions used for VLAN setting
1668  */
1669 static int hinic_vlan_offload_set(struct rte_eth_dev *dev, int mask)
1670 {
1671         struct hinic_nic_dev *nic_dev = HINIC_ETH_DEV_TO_PRIVATE_NIC_DEV(dev);
1672         struct rte_eth_rxmode *rxmode = &dev->data->dev_conf.rxmode;
1673         bool on;
1674         int err;
1675
1676         /* Enable or disable VLAN filter */
1677         if (mask & ETH_VLAN_FILTER_MASK) {
1678                 on = (rxmode->offloads & DEV_RX_OFFLOAD_VLAN_FILTER) ?
1679                         TRUE : FALSE;
1680                 err = hinic_config_vlan_filter(nic_dev->hwdev, on);
1681                 if (err == HINIC_MGMT_CMD_UNSUPPORTED) {
1682                         PMD_DRV_LOG(WARNING,
1683                                 "Current matching version does not support vlan filter configuration, device: %s, port_id: %d",
1684                                   nic_dev->proc_dev_name, dev->data->port_id);
1685                 } else if (err) {
1686                         PMD_DRV_LOG(ERR, "Failed to %s vlan filter, device: %s, port_id: %d, err: %d",
1687                                   on ? "enable" : "disable",
1688                                   nic_dev->proc_dev_name,
1689                                   dev->data->port_id, err);
1690                         return err;
1691                 }
1692
1693                 PMD_DRV_LOG(INFO, "%s vlan filter succeed, device: %s, port_id: %d",
1694                           on ? "Enable" : "Disable",
1695                           nic_dev->proc_dev_name, dev->data->port_id);
1696         }
1697
1698         /* Enable or disable VLAN stripping */
1699         if (mask & ETH_VLAN_STRIP_MASK) {
1700                 on = (rxmode->offloads & DEV_RX_OFFLOAD_VLAN_STRIP) ?
1701                         TRUE : FALSE;
1702                 err = hinic_set_rx_vlan_offload(nic_dev->hwdev, on);
1703                 if (err) {
1704                         PMD_DRV_LOG(ERR, "Failed to %s vlan strip, device: %s, port_id: %d, err: %d",
1705                                   on ? "enable" : "disable",
1706                                   nic_dev->proc_dev_name,
1707                                   dev->data->port_id, err);
1708                         return err;
1709                 }
1710
1711                 PMD_DRV_LOG(INFO, "%s vlan strip succeed, device: %s, port_id: %d",
1712                           on ? "Enable" : "Disable",
1713                           nic_dev->proc_dev_name, dev->data->port_id);
1714         }
1715
1716         return 0;
1717 }
1718
1719 static void hinic_remove_all_vlanid(struct rte_eth_dev *eth_dev)
1720 {
1721         struct hinic_nic_dev *nic_dev =
1722                 HINIC_ETH_DEV_TO_PRIVATE_NIC_DEV(eth_dev);
1723         u16 func_id;
1724         int i;
1725
1726         func_id = hinic_global_func_id(nic_dev->hwdev);
1727         for (i = 0; i <= RTE_ETHER_MAX_VLAN_ID; i++) {
1728                 /* If can't find it, continue */
1729                 if (!hinic_find_vlan_filter(nic_dev, i))
1730                         continue;
1731
1732                 (void)hinic_add_remove_vlan(nic_dev->hwdev, i, func_id, FALSE);
1733                 hinic_store_vlan_filter(nic_dev, i, false);
1734         }
1735 }
1736
1737 static int hinic_set_dev_allmulticast(struct hinic_nic_dev *nic_dev,
1738                                 bool enable)
1739 {
1740         u32 rx_mode_ctrl;
1741         int err;
1742
1743         err = hinic_mutex_lock(&nic_dev->rx_mode_mutex);
1744         if (err)
1745                 return err;
1746
1747         rx_mode_ctrl = nic_dev->rx_mode_status;
1748
1749         if (enable)
1750                 rx_mode_ctrl |= HINIC_RX_MODE_MC_ALL;
1751         else
1752                 rx_mode_ctrl &= (~HINIC_RX_MODE_MC_ALL);
1753
1754         err = hinic_config_rx_mode(nic_dev, rx_mode_ctrl);
1755
1756         (void)hinic_mutex_unlock(&nic_dev->rx_mode_mutex);
1757
1758         return err;
1759 }
1760
1761 /**
1762  * DPDK callback to enable allmulticast mode.
1763  *
1764  * @param dev
1765  *   Pointer to Ethernet device structure.
1766  *
1767  * @return
1768  *   0 on success,
1769  *   negative error value otherwise.
1770  */
1771 static int hinic_dev_allmulticast_enable(struct rte_eth_dev *dev)
1772 {
1773         int ret = HINIC_OK;
1774         struct hinic_nic_dev *nic_dev = HINIC_ETH_DEV_TO_PRIVATE_NIC_DEV(dev);
1775
1776         ret = hinic_set_dev_allmulticast(nic_dev, true);
1777         if (ret) {
1778                 PMD_DRV_LOG(ERR, "Enable allmulticast failed, error: %d", ret);
1779                 return ret;
1780         }
1781
1782         PMD_DRV_LOG(INFO, "Enable allmulticast succeed, nic_dev: %s, port_id: %d",
1783                 nic_dev->proc_dev_name, dev->data->port_id);
1784         return 0;
1785 }
1786
1787 /**
1788  * DPDK callback to disable allmulticast mode.
1789  *
1790  * @param dev
1791  *   Pointer to Ethernet device structure.
1792  *
1793  * @return
1794  *   0 on success,
1795  *   negative error value otherwise.
1796  */
1797 static int hinic_dev_allmulticast_disable(struct rte_eth_dev *dev)
1798 {
1799         int ret = HINIC_OK;
1800         struct hinic_nic_dev *nic_dev = HINIC_ETH_DEV_TO_PRIVATE_NIC_DEV(dev);
1801
1802         ret = hinic_set_dev_allmulticast(nic_dev, false);
1803         if (ret) {
1804                 PMD_DRV_LOG(ERR, "Disable allmulticast failed, error: %d", ret);
1805                 return ret;
1806         }
1807
1808         PMD_DRV_LOG(INFO, "Disable allmulticast succeed, nic_dev: %s, port_id: %d",
1809                 nic_dev->proc_dev_name, dev->data->port_id);
1810         return 0;
1811 }
1812
1813 /**
1814  * DPDK callback to enable promiscuous mode.
1815  *
1816  * @param dev
1817  *   Pointer to Ethernet device structure.
1818  *
1819  * @return
1820  *   0 on success,
1821  *   negative error value otherwise.
1822  */
1823 static int hinic_dev_promiscuous_enable(struct rte_eth_dev *dev)
1824 {
1825         int rc = HINIC_OK;
1826         struct hinic_nic_dev *nic_dev = HINIC_ETH_DEV_TO_PRIVATE_NIC_DEV(dev);
1827
1828         PMD_DRV_LOG(INFO, "Enable promiscuous, nic_dev: %s, port_id: %d, promisc: %d",
1829                     nic_dev->proc_dev_name, dev->data->port_id,
1830                     dev->data->promiscuous);
1831
1832         rc = hinic_set_dev_promiscuous(nic_dev, true);
1833         if (rc)
1834                 PMD_DRV_LOG(ERR, "Enable promiscuous failed");
1835
1836         return rc;
1837 }
1838
1839 /**
1840  * DPDK callback to disable promiscuous mode.
1841  *
1842  * @param dev
1843  *   Pointer to Ethernet device structure.
1844  *
1845  * @return
1846  *   0 on success,
1847  *   negative error value otherwise.
1848  */
1849 static int hinic_dev_promiscuous_disable(struct rte_eth_dev *dev)
1850 {
1851         int rc = HINIC_OK;
1852         struct hinic_nic_dev *nic_dev = HINIC_ETH_DEV_TO_PRIVATE_NIC_DEV(dev);
1853
1854         PMD_DRV_LOG(INFO, "Disable promiscuous, nic_dev: %s, port_id: %d, promisc: %d",
1855                     nic_dev->proc_dev_name, dev->data->port_id,
1856                     dev->data->promiscuous);
1857
1858         rc = hinic_set_dev_promiscuous(nic_dev, false);
1859         if (rc)
1860                 PMD_DRV_LOG(ERR, "Disable promiscuous failed");
1861
1862         return rc;
1863 }
1864
1865 static int hinic_flow_ctrl_get(struct rte_eth_dev *dev,
1866                         struct rte_eth_fc_conf *fc_conf)
1867 {
1868         struct hinic_nic_dev *nic_dev = HINIC_ETH_DEV_TO_PRIVATE_NIC_DEV(dev);
1869         struct nic_pause_config nic_pause;
1870         int err;
1871
1872         memset(&nic_pause, 0, sizeof(nic_pause));
1873
1874         err = hinic_get_pause_info(nic_dev->hwdev, &nic_pause);
1875         if (err)
1876                 return err;
1877
1878         if (nic_dev->pause_set || !nic_pause.auto_neg) {
1879                 nic_pause.rx_pause = nic_dev->nic_pause.rx_pause;
1880                 nic_pause.tx_pause = nic_dev->nic_pause.tx_pause;
1881         }
1882
1883         fc_conf->autoneg = nic_pause.auto_neg;
1884
1885         if (nic_pause.tx_pause && nic_pause.rx_pause)
1886                 fc_conf->mode = RTE_FC_FULL;
1887         else if (nic_pause.tx_pause)
1888                 fc_conf->mode = RTE_FC_TX_PAUSE;
1889         else if (nic_pause.rx_pause)
1890                 fc_conf->mode = RTE_FC_RX_PAUSE;
1891         else
1892                 fc_conf->mode = RTE_FC_NONE;
1893
1894         return 0;
1895 }
1896
1897 static int hinic_flow_ctrl_set(struct rte_eth_dev *dev,
1898                         struct rte_eth_fc_conf *fc_conf)
1899 {
1900         struct hinic_nic_dev *nic_dev = HINIC_ETH_DEV_TO_PRIVATE_NIC_DEV(dev);
1901         struct nic_pause_config nic_pause;
1902         int err;
1903
1904         nic_pause.auto_neg = fc_conf->autoneg;
1905
1906         if (((fc_conf->mode & RTE_FC_FULL) == RTE_FC_FULL) ||
1907                 (fc_conf->mode & RTE_FC_TX_PAUSE))
1908                 nic_pause.tx_pause = true;
1909         else
1910                 nic_pause.tx_pause = false;
1911
1912         if (((fc_conf->mode & RTE_FC_FULL) == RTE_FC_FULL) ||
1913                 (fc_conf->mode & RTE_FC_RX_PAUSE))
1914                 nic_pause.rx_pause = true;
1915         else
1916                 nic_pause.rx_pause = false;
1917
1918         err = hinic_set_pause_config(nic_dev->hwdev, nic_pause);
1919         if (err)
1920                 return err;
1921
1922         nic_dev->pause_set = true;
1923         nic_dev->nic_pause.auto_neg = nic_pause.auto_neg;
1924         nic_dev->nic_pause.rx_pause = nic_pause.rx_pause;
1925         nic_dev->nic_pause.tx_pause = nic_pause.tx_pause;
1926
1927         PMD_DRV_LOG(INFO, "Set pause options, tx: %s, rx: %s, auto: %s\n",
1928                 nic_pause.tx_pause ? "on" : "off",
1929                 nic_pause.rx_pause ? "on" : "off",
1930                 nic_pause.auto_neg ? "on" : "off");
1931
1932         return 0;
1933 }
1934
1935 /**
1936  * DPDK callback to update the RSS hash key and RSS hash type.
1937  *
1938  * @param dev
1939  *   Pointer to Ethernet device structure.
1940  * @param rss_conf
1941  *   RSS configuration data.
1942  *
1943  * @return
1944  *   0 on success, negative error value otherwise.
1945  */
1946 static int hinic_rss_hash_update(struct rte_eth_dev *dev,
1947                           struct rte_eth_rss_conf *rss_conf)
1948 {
1949         struct hinic_nic_dev *nic_dev = HINIC_ETH_DEV_TO_PRIVATE_NIC_DEV(dev);
1950         u8 tmpl_idx = nic_dev->rss_tmpl_idx;
1951         u8 hashkey[HINIC_RSS_KEY_SIZE] = {0};
1952         u8 prio_tc[HINIC_DCB_UP_MAX] = {0};
1953         u64 rss_hf = rss_conf->rss_hf;
1954         struct nic_rss_type rss_type = {0};
1955         int err = 0;
1956
1957         if (!(nic_dev->flags & ETH_MQ_RX_RSS_FLAG)) {
1958                 PMD_DRV_LOG(WARNING, "RSS is not enabled");
1959                 return HINIC_OK;
1960         }
1961
1962         if (rss_conf->rss_key_len > HINIC_RSS_KEY_SIZE) {
1963                 PMD_DRV_LOG(ERR, "Invalid rss key, rss_key_len: %d",
1964                             rss_conf->rss_key_len);
1965                 return HINIC_ERROR;
1966         }
1967
1968         if (rss_conf->rss_key) {
1969                 memcpy(hashkey, rss_conf->rss_key, rss_conf->rss_key_len);
1970                 err = hinic_rss_set_template_tbl(nic_dev->hwdev, tmpl_idx,
1971                                                  hashkey);
1972                 if (err) {
1973                         PMD_DRV_LOG(ERR, "Set rss template table failed");
1974                         goto disable_rss;
1975                 }
1976         }
1977
1978         rss_type.ipv4 = (rss_hf & (ETH_RSS_IPV4 | ETH_RSS_FRAG_IPV4)) ? 1 : 0;
1979         rss_type.tcp_ipv4 = (rss_hf & ETH_RSS_NONFRAG_IPV4_TCP) ? 1 : 0;
1980         rss_type.ipv6 = (rss_hf & (ETH_RSS_IPV6 | ETH_RSS_FRAG_IPV6)) ? 1 : 0;
1981         rss_type.ipv6_ext = (rss_hf & ETH_RSS_IPV6_EX) ? 1 : 0;
1982         rss_type.tcp_ipv6 = (rss_hf & ETH_RSS_NONFRAG_IPV6_TCP) ? 1 : 0;
1983         rss_type.tcp_ipv6_ext = (rss_hf & ETH_RSS_IPV6_TCP_EX) ? 1 : 0;
1984         rss_type.udp_ipv4 = (rss_hf & ETH_RSS_NONFRAG_IPV4_UDP) ? 1 : 0;
1985         rss_type.udp_ipv6 = (rss_hf & ETH_RSS_NONFRAG_IPV6_UDP) ? 1 : 0;
1986
1987         err = hinic_set_rss_type(nic_dev->hwdev, tmpl_idx, rss_type);
1988         if (err) {
1989                 PMD_DRV_LOG(ERR, "Set rss type table failed");
1990                 goto disable_rss;
1991         }
1992
1993         return 0;
1994
1995 disable_rss:
1996         memset(prio_tc, 0, sizeof(prio_tc));
1997         (void)hinic_rss_cfg(nic_dev->hwdev, 0, tmpl_idx, 0, prio_tc);
1998         return err;
1999 }
2000
2001 /**
2002  * DPDK callback to get the RSS hash configuration.
2003  *
2004  * @param dev
2005  *   Pointer to Ethernet device structure.
2006  * @param rss_conf
2007  *   RSS configuration data.
2008  *
2009  * @return
2010  *   0 on success, negative error value otherwise.
2011  */
2012 static int hinic_rss_conf_get(struct rte_eth_dev *dev,
2013                        struct rte_eth_rss_conf *rss_conf)
2014 {
2015         struct hinic_nic_dev *nic_dev = HINIC_ETH_DEV_TO_PRIVATE_NIC_DEV(dev);
2016         u8 tmpl_idx = nic_dev->rss_tmpl_idx;
2017         u8 hashkey[HINIC_RSS_KEY_SIZE] = {0};
2018         struct nic_rss_type rss_type = {0};
2019         int err;
2020
2021         if (!(nic_dev->flags & ETH_MQ_RX_RSS_FLAG)) {
2022                 PMD_DRV_LOG(WARNING, "RSS is not enabled");
2023                 return HINIC_ERROR;
2024         }
2025
2026         err = hinic_rss_get_template_tbl(nic_dev->hwdev, tmpl_idx, hashkey);
2027         if (err)
2028                 return err;
2029
2030         if (rss_conf->rss_key &&
2031             rss_conf->rss_key_len >= HINIC_RSS_KEY_SIZE) {
2032                 memcpy(rss_conf->rss_key, hashkey, sizeof(hashkey));
2033                 rss_conf->rss_key_len = sizeof(hashkey);
2034         }
2035
2036         err = hinic_get_rss_type(nic_dev->hwdev, tmpl_idx, &rss_type);
2037         if (err)
2038                 return err;
2039
2040         rss_conf->rss_hf = 0;
2041         rss_conf->rss_hf |=  rss_type.ipv4 ?
2042                 (ETH_RSS_IPV4 | ETH_RSS_FRAG_IPV4) : 0;
2043         rss_conf->rss_hf |=  rss_type.tcp_ipv4 ? ETH_RSS_NONFRAG_IPV4_TCP : 0;
2044         rss_conf->rss_hf |=  rss_type.ipv6 ?
2045                 (ETH_RSS_IPV6 | ETH_RSS_FRAG_IPV6) : 0;
2046         rss_conf->rss_hf |=  rss_type.ipv6_ext ? ETH_RSS_IPV6_EX : 0;
2047         rss_conf->rss_hf |=  rss_type.tcp_ipv6 ? ETH_RSS_NONFRAG_IPV6_TCP : 0;
2048         rss_conf->rss_hf |=  rss_type.tcp_ipv6_ext ? ETH_RSS_IPV6_TCP_EX : 0;
2049         rss_conf->rss_hf |=  rss_type.udp_ipv4 ? ETH_RSS_NONFRAG_IPV4_UDP : 0;
2050         rss_conf->rss_hf |=  rss_type.udp_ipv6 ? ETH_RSS_NONFRAG_IPV6_UDP : 0;
2051
2052         return HINIC_OK;
2053 }
2054
2055 /**
2056  * DPDK callback to update the RSS redirection table.
2057  *
2058  * @param dev
2059  *   Pointer to Ethernet device structure.
2060  * @param reta_conf
2061  *   Pointer to RSS reta configuration data.
2062  * @param reta_size
2063  *   Size of the RETA table.
2064  *
2065  * @return
2066  *   0 on success, negative error value otherwise.
2067  */
2068 static int hinic_rss_indirtbl_update(struct rte_eth_dev *dev,
2069                               struct rte_eth_rss_reta_entry64 *reta_conf,
2070                               uint16_t reta_size)
2071 {
2072         struct hinic_nic_dev *nic_dev = HINIC_ETH_DEV_TO_PRIVATE_NIC_DEV(dev);
2073         u8 tmpl_idx = nic_dev->rss_tmpl_idx;
2074         u8 prio_tc[HINIC_DCB_UP_MAX] = {0};
2075         u32 indirtbl[NIC_RSS_INDIR_SIZE] = {0};
2076         int err = 0;
2077         u16 i = 0;
2078         u16 idx, shift;
2079
2080         if (!(nic_dev->flags & ETH_MQ_RX_RSS_FLAG))
2081                 return HINIC_OK;
2082
2083         if (reta_size != NIC_RSS_INDIR_SIZE) {
2084                 PMD_DRV_LOG(ERR, "Invalid reta size, reta_size: %d", reta_size);
2085                 return HINIC_ERROR;
2086         }
2087
2088         err = hinic_rss_get_indir_tbl(nic_dev->hwdev, tmpl_idx, indirtbl);
2089         if (err)
2090                 return err;
2091
2092         /* update rss indir_tbl */
2093         for (i = 0; i < reta_size; i++) {
2094                 idx = i / RTE_RETA_GROUP_SIZE;
2095                 shift = i % RTE_RETA_GROUP_SIZE;
2096
2097                 if (reta_conf[idx].reta[shift] >= nic_dev->num_rq) {
2098                         PMD_DRV_LOG(ERR, "Invalid reta entry, indirtbl[%d]: %d "
2099                                 "exceeds the maximum rxq num: %d", i,
2100                                 reta_conf[idx].reta[shift], nic_dev->num_rq);
2101                         return -EINVAL;
2102                 }
2103
2104                 if (reta_conf[idx].mask & (1ULL << shift))
2105                         indirtbl[i] = reta_conf[idx].reta[shift];
2106         }
2107
2108         err = hinic_rss_set_indir_tbl(nic_dev->hwdev, tmpl_idx, indirtbl);
2109         if (err)
2110                 goto disable_rss;
2111
2112         nic_dev->rss_indir_flag = true;
2113
2114         return 0;
2115
2116 disable_rss:
2117         memset(prio_tc, 0, sizeof(prio_tc));
2118         (void)hinic_rss_cfg(nic_dev->hwdev, 0, tmpl_idx, 0, prio_tc);
2119
2120         return HINIC_ERROR;
2121 }
2122
2123 /**
2124  * DPDK callback to get the RSS indirection table.
2125  *
2126  * @param dev
2127  *   Pointer to Ethernet device structure.
2128  * @param reta_conf
2129  *   Pointer to RSS reta configuration data.
2130  * @param reta_size
2131  *   Size of the RETA table.
2132  *
2133  * @return
2134  *   0 on success, negative error value otherwise.
2135  */
2136 static int hinic_rss_indirtbl_query(struct rte_eth_dev *dev,
2137                              struct rte_eth_rss_reta_entry64 *reta_conf,
2138                              uint16_t reta_size)
2139 {
2140         struct hinic_nic_dev *nic_dev = HINIC_ETH_DEV_TO_PRIVATE_NIC_DEV(dev);
2141         u8 tmpl_idx = nic_dev->rss_tmpl_idx;
2142         int err = 0;
2143         u32 indirtbl[NIC_RSS_INDIR_SIZE] = {0};
2144         u16 idx, shift;
2145         u16 i = 0;
2146
2147         if (reta_size != NIC_RSS_INDIR_SIZE) {
2148                 PMD_DRV_LOG(ERR, "Invalid reta size, reta_size: %d", reta_size);
2149                 return HINIC_ERROR;
2150         }
2151
2152         err = hinic_rss_get_indir_tbl(nic_dev->hwdev, tmpl_idx, indirtbl);
2153         if (err) {
2154                 PMD_DRV_LOG(ERR, "Get rss indirect table failed, error: %d",
2155                             err);
2156                 return err;
2157         }
2158
2159         for (i = 0; i < reta_size; i++) {
2160                 idx = i / RTE_RETA_GROUP_SIZE;
2161                 shift = i % RTE_RETA_GROUP_SIZE;
2162                 if (reta_conf[idx].mask & (1ULL << shift))
2163                         reta_conf[idx].reta[shift] = (uint16_t)indirtbl[i];
2164         }
2165
2166         return HINIC_OK;
2167 }
2168
2169 /**
2170  * DPDK callback to get extended device statistics.
2171  *
2172  * @param dev
2173  *   Pointer to Ethernet device.
2174  * @param xstats
2175  *   Pointer to rte extended stats table.
2176  * @param n
2177  *   The size of the stats table.
2178  *
2179  * @return
2180  *   Number of extended stats on success and stats is filled,
2181  *   negative error value otherwise.
2182  */
2183 static int hinic_dev_xstats_get(struct rte_eth_dev *dev,
2184                          struct rte_eth_xstat *xstats,
2185                          unsigned int n)
2186 {
2187         u16 qid = 0;
2188         u32 i;
2189         int err, count;
2190         struct hinic_nic_dev *nic_dev;
2191         struct hinic_phy_port_stats port_stats;
2192         struct hinic_vport_stats vport_stats;
2193         struct hinic_rxq        *rxq = NULL;
2194         struct hinic_rxq_stats rxq_stats;
2195         struct hinic_txq        *txq = NULL;
2196         struct hinic_txq_stats txq_stats;
2197
2198         nic_dev = HINIC_ETH_DEV_TO_PRIVATE_NIC_DEV(dev);
2199         count = hinic_xstats_calc_num(nic_dev);
2200         if ((int)n < count)
2201                 return count;
2202
2203         count = 0;
2204
2205         /* Get stats from hinic_rxq_stats */
2206         for (qid = 0; qid < nic_dev->num_rq; qid++) {
2207                 rxq = nic_dev->rxqs[qid];
2208                 hinic_rxq_get_stats(rxq, &rxq_stats);
2209
2210                 for (i = 0; i < HINIC_RXQ_XSTATS_NUM; i++) {
2211                         xstats[count].value =
2212                                 *(uint64_t *)(((char *)&rxq_stats) +
2213                                 hinic_rxq_stats_strings[i].offset);
2214                         xstats[count].id = count;
2215                         count++;
2216                 }
2217         }
2218
2219         /* Get stats from hinic_txq_stats */
2220         for (qid = 0; qid < nic_dev->num_sq; qid++) {
2221                 txq = nic_dev->txqs[qid];
2222                 hinic_txq_get_stats(txq, &txq_stats);
2223
2224                 for (i = 0; i < HINIC_TXQ_XSTATS_NUM; i++) {
2225                         xstats[count].value =
2226                                 *(uint64_t *)(((char *)&txq_stats) +
2227                                 hinic_txq_stats_strings[i].offset);
2228                         xstats[count].id = count;
2229                         count++;
2230                 }
2231         }
2232
2233         /* Get stats from hinic_vport_stats */
2234         err = hinic_get_vport_stats(nic_dev->hwdev, &vport_stats);
2235         if (err)
2236                 return err;
2237
2238         for (i = 0; i < HINIC_VPORT_XSTATS_NUM; i++) {
2239                 xstats[count].value =
2240                         *(uint64_t *)(((char *)&vport_stats) +
2241                         hinic_vport_stats_strings[i].offset);
2242                 xstats[count].id = count;
2243                 count++;
2244         }
2245
2246         if (HINIC_IS_VF(nic_dev->hwdev))
2247                 return count;
2248
2249         /* Get stats from hinic_phy_port_stats */
2250         err = hinic_get_phy_port_stats(nic_dev->hwdev, &port_stats);
2251         if (err)
2252                 return err;
2253
2254         for (i = 0; i < HINIC_PHYPORT_XSTATS_NUM; i++) {
2255                 xstats[count].value = *(uint64_t *)(((char *)&port_stats) +
2256                                 hinic_phyport_stats_strings[i].offset);
2257                 xstats[count].id = count;
2258                 count++;
2259         }
2260
2261         return count;
2262 }
2263
2264 static void hinic_rxq_info_get(struct rte_eth_dev *dev, uint16_t queue_id,
2265                                 struct rte_eth_rxq_info *qinfo)
2266 {
2267         struct hinic_rxq  *rxq = dev->data->rx_queues[queue_id];
2268
2269         qinfo->mp = rxq->mb_pool;
2270         qinfo->nb_desc = rxq->q_depth;
2271 }
2272
2273 static void hinic_txq_info_get(struct rte_eth_dev *dev, uint16_t queue_id,
2274                                 struct rte_eth_txq_info *qinfo)
2275 {
2276         struct hinic_txq  *txq = dev->data->tx_queues[queue_id];
2277
2278         qinfo->nb_desc = txq->q_depth;
2279 }
2280
2281 /**
2282  * DPDK callback to retrieve names of extended device statistics
2283  *
2284  * @param dev
2285  *   Pointer to Ethernet device structure.
2286  * @param xstats_names
2287  *   Buffer to insert names into.
2288  *
2289  * @return
2290  *   Number of xstats names.
2291  */
2292 static int hinic_dev_xstats_get_names(struct rte_eth_dev *dev,
2293                                struct rte_eth_xstat_name *xstats_names,
2294                                __rte_unused unsigned int limit)
2295 {
2296         struct hinic_nic_dev *nic_dev = HINIC_ETH_DEV_TO_PRIVATE_NIC_DEV(dev);
2297         int count = 0;
2298         u16 i = 0, q_num;
2299
2300         if (xstats_names == NULL)
2301                 return hinic_xstats_calc_num(nic_dev);
2302
2303         /* get pmd rxq stats */
2304         for (q_num = 0; q_num < nic_dev->num_rq; q_num++) {
2305                 for (i = 0; i < HINIC_RXQ_XSTATS_NUM; i++) {
2306                         snprintf(xstats_names[count].name,
2307                                  sizeof(xstats_names[count].name),
2308                                  "rxq%d_%s_pmd",
2309                                  q_num, hinic_rxq_stats_strings[i].name);
2310                         count++;
2311                 }
2312         }
2313
2314         /* get pmd txq stats */
2315         for (q_num = 0; q_num < nic_dev->num_sq; q_num++) {
2316                 for (i = 0; i < HINIC_TXQ_XSTATS_NUM; i++) {
2317                         snprintf(xstats_names[count].name,
2318                                  sizeof(xstats_names[count].name),
2319                                  "txq%d_%s_pmd",
2320                                  q_num, hinic_txq_stats_strings[i].name);
2321                         count++;
2322                 }
2323         }
2324
2325         /* get vport stats */
2326         for (i = 0; i < HINIC_VPORT_XSTATS_NUM; i++) {
2327                 snprintf(xstats_names[count].name,
2328                          sizeof(xstats_names[count].name),
2329                          "%s", hinic_vport_stats_strings[i].name);
2330                 count++;
2331         }
2332
2333         if (HINIC_IS_VF(nic_dev->hwdev))
2334                 return count;
2335
2336         /* get phy port stats */
2337         for (i = 0; i < HINIC_PHYPORT_XSTATS_NUM; i++) {
2338                 snprintf(xstats_names[count].name,
2339                          sizeof(xstats_names[count].name),
2340                          "%s", hinic_phyport_stats_strings[i].name);
2341                 count++;
2342         }
2343
2344         return count;
2345 }
2346
2347 /**
2348  *  DPDK callback to set mac address
2349  *
2350  * @param dev
2351  *   Pointer to Ethernet device structure.
2352  * @param addr
2353  *   Pointer to mac address
2354  * @return
2355  *   0 on success, negative error value otherwise.
2356  */
2357 static int hinic_set_mac_addr(struct rte_eth_dev *dev,
2358                               struct rte_ether_addr *addr)
2359 {
2360         struct hinic_nic_dev *nic_dev = HINIC_ETH_DEV_TO_PRIVATE_NIC_DEV(dev);
2361         u16 func_id;
2362         int err;
2363
2364         func_id = hinic_global_func_id(nic_dev->hwdev);
2365         err = hinic_update_mac(nic_dev->hwdev, nic_dev->default_addr.addr_bytes,
2366                                addr->addr_bytes, 0, func_id);
2367         if (err)
2368                 return err;
2369
2370         rte_ether_addr_copy(addr, &nic_dev->default_addr);
2371
2372         PMD_DRV_LOG(INFO, "Set new mac address %02x:%02x:%02x:%02x:%02x:%02x",
2373                     addr->addr_bytes[0], addr->addr_bytes[1],
2374                     addr->addr_bytes[2], addr->addr_bytes[3],
2375                     addr->addr_bytes[4], addr->addr_bytes[5]);
2376
2377         return 0;
2378 }
2379
2380 /**
2381  * DPDK callback to remove a MAC address.
2382  *
2383  * @param dev
2384  *   Pointer to Ethernet device structure.
2385  * @param index
2386  *   MAC address index, should less than 128.
2387  */
2388 static void hinic_mac_addr_remove(struct rte_eth_dev *dev, uint32_t index)
2389 {
2390         struct hinic_nic_dev *nic_dev = HINIC_ETH_DEV_TO_PRIVATE_NIC_DEV(dev);
2391         u16 func_id;
2392         int ret;
2393
2394         if (index >= HINIC_MAX_UC_MAC_ADDRS) {
2395                 PMD_DRV_LOG(INFO, "Remove mac index(%u) is out of range",
2396                             index);
2397                 return;
2398         }
2399
2400         func_id = hinic_global_func_id(nic_dev->hwdev);
2401         ret = hinic_del_mac(nic_dev->hwdev,
2402                             dev->data->mac_addrs[index].addr_bytes, 0, func_id);
2403         if (ret)
2404                 return;
2405
2406         memset(&dev->data->mac_addrs[index], 0, sizeof(struct rte_ether_addr));
2407 }
2408
2409 /**
2410  * DPDK callback to add a MAC address.
2411  *
2412  * @param dev
2413  *   Pointer to Ethernet device structure.
2414  * @param mac_addr
2415  *   Pointer to MAC address
2416  * @param index
2417  *   MAC address index, should less than 128.
2418  * @param vmdq
2419  *   VMDq pool index(not used).
2420  *
2421  * @return
2422  *   0 on success, negative error value otherwise.
2423  */
2424 static int hinic_mac_addr_add(struct rte_eth_dev *dev,
2425                               struct rte_ether_addr *mac_addr, uint32_t index,
2426                               __rte_unused uint32_t vmdq)
2427 {
2428         struct hinic_nic_dev  *nic_dev = HINIC_ETH_DEV_TO_PRIVATE_NIC_DEV(dev);
2429         unsigned int i;
2430         u16 func_id;
2431         int ret;
2432
2433         if (index >= HINIC_MAX_UC_MAC_ADDRS) {
2434                 PMD_DRV_LOG(INFO, "Add mac index(%u) is out of range", index);
2435                 return -EINVAL;
2436         }
2437
2438         /* First, make sure this address isn't already configured. */
2439         for (i = 0; (i != HINIC_MAX_UC_MAC_ADDRS); ++i) {
2440                 /* Skip this index, it's going to be reconfigured. */
2441                 if (i == index)
2442                         continue;
2443
2444                 if (memcmp(&dev->data->mac_addrs[i],
2445                         mac_addr, sizeof(*mac_addr)))
2446                         continue;
2447
2448                 PMD_DRV_LOG(INFO, "MAC address already configured");
2449                 return -EADDRINUSE;
2450         }
2451
2452         func_id = hinic_global_func_id(nic_dev->hwdev);
2453         ret = hinic_set_mac(nic_dev->hwdev, mac_addr->addr_bytes, 0, func_id);
2454         if (ret)
2455                 return ret;
2456
2457         dev->data->mac_addrs[index] = *mac_addr;
2458         return 0;
2459 }
2460
2461 /**
2462  *  DPDK callback to set multicast mac address
2463  *
2464  * @param dev
2465  *   Pointer to Ethernet device structure.
2466  * @param mc_addr_set
2467  *   Pointer to multicast mac address
2468  * @param nb_mc_addr
2469  *   mc addr count
2470  * @return
2471  *   0 on success, negative error value otherwise.
2472  */
2473 static int hinic_set_mc_addr_list(struct rte_eth_dev *dev,
2474                                   struct rte_ether_addr *mc_addr_set,
2475                                   uint32_t nb_mc_addr)
2476 {
2477         struct hinic_nic_dev *nic_dev = HINIC_ETH_DEV_TO_PRIVATE_NIC_DEV(dev);
2478         u16 func_id;
2479         int ret;
2480         u32 i;
2481
2482         func_id = hinic_global_func_id(nic_dev->hwdev);
2483
2484         /* delete old multi_cast addrs firstly */
2485         hinic_delete_mc_addr_list(nic_dev);
2486
2487         if (nb_mc_addr > HINIC_MAX_MC_MAC_ADDRS)
2488                 goto allmulti;
2489
2490         for (i = 0; i < nb_mc_addr; i++) {
2491                 ret = hinic_set_mac(nic_dev->hwdev, mc_addr_set[i].addr_bytes,
2492                                     0, func_id);
2493                 /* if add mc addr failed, set all multi_cast */
2494                 if (ret) {
2495                         hinic_delete_mc_addr_list(nic_dev);
2496                         goto allmulti;
2497                 }
2498
2499                 rte_ether_addr_copy(&mc_addr_set[i], &nic_dev->mc_list[i]);
2500         }
2501
2502         return 0;
2503
2504 allmulti:
2505         hinic_dev_allmulticast_enable(dev);
2506
2507         return 0;
2508 }
2509
2510 /**
2511  * DPDK callback to manage filter control operations
2512  *
2513  * @param dev
2514  *   Pointer to Ethernet device structure.
2515  * @param filter_type
2516  *   Filter type, which just supports generic type.
2517  * @param filter_op
2518  *   Filter operation to perform.
2519  * @param arg
2520  *   Pointer to operation-specific structure.
2521  *
2522  * @return
2523  *   0 on success, negative error value otherwise.
2524  */
2525 static int hinic_dev_filter_ctrl(struct rte_eth_dev *dev,
2526                      enum rte_filter_type filter_type,
2527                      enum rte_filter_op filter_op,
2528                      void *arg)
2529 {
2530         struct hinic_nic_dev *nic_dev = HINIC_ETH_DEV_TO_PRIVATE_NIC_DEV(dev);
2531         int func_id = hinic_global_func_id(nic_dev->hwdev);
2532
2533         switch (filter_type) {
2534         case RTE_ETH_FILTER_GENERIC:
2535                 if (filter_op != RTE_ETH_FILTER_GET)
2536                         return -EINVAL;
2537                 *(const void **)arg = &hinic_flow_ops;
2538                 break;
2539         default:
2540                 PMD_DRV_LOG(INFO, "Filter type (%d) not supported",
2541                         filter_type);
2542                 return -EINVAL;
2543         }
2544
2545         PMD_DRV_LOG(INFO, "Set filter_ctrl succeed, func_id: 0x%x, filter_type: 0x%x,"
2546                         "filter_op: 0x%x.", func_id, filter_type, filter_op);
2547         return 0;
2548 }
2549
2550 static int hinic_set_default_pause_feature(struct hinic_nic_dev *nic_dev)
2551 {
2552         struct nic_pause_config pause_config = {0};
2553         int err;
2554
2555         pause_config.auto_neg = 0;
2556         pause_config.rx_pause = HINIC_DEFAUT_PAUSE_CONFIG;
2557         pause_config.tx_pause = HINIC_DEFAUT_PAUSE_CONFIG;
2558
2559         err = hinic_set_pause_config(nic_dev->hwdev, pause_config);
2560         if (err)
2561                 return err;
2562
2563         nic_dev->pause_set = true;
2564         nic_dev->nic_pause.auto_neg = pause_config.auto_neg;
2565         nic_dev->nic_pause.rx_pause = pause_config.rx_pause;
2566         nic_dev->nic_pause.tx_pause = pause_config.tx_pause;
2567
2568         return 0;
2569 }
2570
2571 static int hinic_set_default_dcb_feature(struct hinic_nic_dev *nic_dev)
2572 {
2573         u8 up_tc[HINIC_DCB_UP_MAX] = {0};
2574         u8 up_pgid[HINIC_DCB_UP_MAX] = {0};
2575         u8 up_bw[HINIC_DCB_UP_MAX] = {0};
2576         u8 pg_bw[HINIC_DCB_UP_MAX] = {0};
2577         u8 up_strict[HINIC_DCB_UP_MAX] = {0};
2578         int i = 0;
2579
2580         pg_bw[0] = 100;
2581         for (i = 0; i < HINIC_DCB_UP_MAX; i++)
2582                 up_bw[i] = 100;
2583
2584         return hinic_dcb_set_ets(nic_dev->hwdev, up_tc, pg_bw,
2585                                         up_pgid, up_bw, up_strict);
2586 }
2587
2588 static int hinic_pf_get_default_cos(struct hinic_hwdev *hwdev, u8 *cos_id)
2589 {
2590         u8 default_cos = 0;
2591         u8 valid_cos_bitmap;
2592         u8 i;
2593
2594         valid_cos_bitmap = hwdev->cfg_mgmt->svc_cap.valid_cos_bitmap;
2595         if (!valid_cos_bitmap) {
2596                 PMD_DRV_LOG(ERR, "PF has none cos to support\n");
2597                 return -EFAULT;
2598         }
2599
2600         for (i = 0; i < NR_MAX_COS; i++) {
2601                 if (valid_cos_bitmap & BIT(i))
2602                         default_cos = i; /* Find max cos id as default cos */
2603         }
2604
2605         *cos_id = default_cos;
2606
2607         return 0;
2608 }
2609
2610 static int hinic_init_default_cos(struct hinic_nic_dev *nic_dev)
2611 {
2612         u8 cos_id = 0;
2613         int err;
2614
2615         if (!HINIC_IS_VF(nic_dev->hwdev)) {
2616                 err = hinic_pf_get_default_cos(nic_dev->hwdev, &cos_id);
2617                 if (err) {
2618                         PMD_DRV_LOG(ERR, "Get PF default cos failed, err: %d",
2619                                     err);
2620                         return HINIC_ERROR;
2621                 }
2622         } else {
2623                 err = hinic_vf_get_default_cos(nic_dev->hwdev, &cos_id);
2624                 if (err) {
2625                         PMD_DRV_LOG(ERR, "Get VF default cos failed, err: %d",
2626                                     err);
2627                         return HINIC_ERROR;
2628                 }
2629         }
2630
2631         nic_dev->default_cos = cos_id;
2632
2633         PMD_DRV_LOG(INFO, "Default cos %d", nic_dev->default_cos);
2634
2635         return 0;
2636 }
2637
2638 static int hinic_set_default_hw_feature(struct hinic_nic_dev *nic_dev)
2639 {
2640         int err;
2641
2642         err = hinic_init_default_cos(nic_dev);
2643         if (err)
2644                 return err;
2645
2646         if (hinic_func_type(nic_dev->hwdev) == TYPE_VF)
2647                 return 0;
2648
2649         /* Restore DCB configure to default status */
2650         err = hinic_set_default_dcb_feature(nic_dev);
2651         if (err)
2652                 return err;
2653
2654         /* Set pause enable, and up will disable pfc. */
2655         err = hinic_set_default_pause_feature(nic_dev);
2656         if (err)
2657                 return err;
2658
2659         err = hinic_reset_port_link_cfg(nic_dev->hwdev);
2660         if (err)
2661                 return err;
2662
2663         err = hinic_set_link_status_follow(nic_dev->hwdev,
2664                                            HINIC_LINK_FOLLOW_PORT);
2665         if (err == HINIC_MGMT_CMD_UNSUPPORTED)
2666                 PMD_DRV_LOG(WARNING, "Don't support to set link status follow phy port status");
2667         else if (err)
2668                 return err;
2669
2670         return hinic_set_anti_attack(nic_dev->hwdev, true);
2671 }
2672
2673 static int32_t hinic_card_workmode_check(struct hinic_nic_dev *nic_dev)
2674 {
2675         struct hinic_board_info info = { 0 };
2676         int rc;
2677
2678         if (hinic_func_type(nic_dev->hwdev) == TYPE_VF)
2679                 return 0;
2680
2681         rc = hinic_get_board_info(nic_dev->hwdev, &info);
2682         if (rc)
2683                 return rc;
2684
2685         return (info.service_mode == HINIC_SERVICE_MODE_NIC ? HINIC_OK :
2686                                                 HINIC_ERROR);
2687 }
2688
2689 static int hinic_copy_mempool_init(struct hinic_nic_dev *nic_dev)
2690 {
2691         nic_dev->cpy_mpool = rte_mempool_lookup(nic_dev->proc_dev_name);
2692         if (nic_dev->cpy_mpool == NULL) {
2693                 nic_dev->cpy_mpool =
2694                 rte_pktmbuf_pool_create(nic_dev->proc_dev_name,
2695                                         HINIC_COPY_MEMPOOL_DEPTH,
2696                                         0, 0,
2697                                         HINIC_COPY_MBUF_SIZE,
2698                                         rte_socket_id());
2699                 if (!nic_dev->cpy_mpool) {
2700                         PMD_DRV_LOG(ERR, "Create copy mempool failed, errno: %d, dev_name: %s",
2701                                     rte_errno, nic_dev->proc_dev_name);
2702                         return -ENOMEM;
2703                 }
2704         }
2705
2706         return 0;
2707 }
2708
2709 static void hinic_copy_mempool_uninit(struct hinic_nic_dev *nic_dev)
2710 {
2711         if (nic_dev->cpy_mpool != NULL)
2712                 rte_mempool_free(nic_dev->cpy_mpool);
2713 }
2714
2715 static int hinic_init_sw_rxtxqs(struct hinic_nic_dev *nic_dev)
2716 {
2717         u32 txq_size;
2718         u32 rxq_size;
2719
2720         /* allocate software txq array */
2721         txq_size = nic_dev->nic_cap.max_sqs * sizeof(*nic_dev->txqs);
2722         nic_dev->txqs = kzalloc_aligned(txq_size, GFP_KERNEL);
2723         if (!nic_dev->txqs) {
2724                 PMD_DRV_LOG(ERR, "Allocate txqs failed");
2725                 return -ENOMEM;
2726         }
2727
2728         /* allocate software rxq array */
2729         rxq_size = nic_dev->nic_cap.max_rqs * sizeof(*nic_dev->rxqs);
2730         nic_dev->rxqs = kzalloc_aligned(rxq_size, GFP_KERNEL);
2731         if (!nic_dev->rxqs) {
2732                 /* free txqs */
2733                 kfree(nic_dev->txqs);
2734                 nic_dev->txqs = NULL;
2735
2736                 PMD_DRV_LOG(ERR, "Allocate rxqs failed");
2737                 return -ENOMEM;
2738         }
2739
2740         return HINIC_OK;
2741 }
2742
2743 static void hinic_deinit_sw_rxtxqs(struct hinic_nic_dev *nic_dev)
2744 {
2745         kfree(nic_dev->txqs);
2746         nic_dev->txqs = NULL;
2747
2748         kfree(nic_dev->rxqs);
2749         nic_dev->rxqs = NULL;
2750 }
2751
2752 static int hinic_nic_dev_create(struct rte_eth_dev *eth_dev)
2753 {
2754         struct hinic_nic_dev *nic_dev =
2755                                 HINIC_ETH_DEV_TO_PRIVATE_NIC_DEV(eth_dev);
2756         int rc;
2757
2758         nic_dev->hwdev = rte_zmalloc("hinic_hwdev", sizeof(*nic_dev->hwdev),
2759                                      RTE_CACHE_LINE_SIZE);
2760         if (!nic_dev->hwdev) {
2761                 PMD_DRV_LOG(ERR, "Allocate hinic hwdev memory failed, dev_name: %s",
2762                             eth_dev->data->name);
2763                 return -ENOMEM;
2764         }
2765         nic_dev->hwdev->pcidev_hdl = RTE_ETH_DEV_TO_PCI(eth_dev);
2766
2767         /* init osdep*/
2768         rc = hinic_osdep_init(nic_dev->hwdev);
2769         if (rc) {
2770                 PMD_DRV_LOG(ERR, "Initialize os_dep failed, dev_name: %s",
2771                             eth_dev->data->name);
2772                 goto init_osdep_fail;
2773         }
2774
2775         /* init_hwif */
2776         rc = hinic_hwif_res_init(nic_dev->hwdev);
2777         if (rc) {
2778                 PMD_DRV_LOG(ERR, "Initialize hwif failed, dev_name: %s",
2779                             eth_dev->data->name);
2780                 goto init_hwif_fail;
2781         }
2782
2783         /* init_cfg_mgmt */
2784         rc = init_cfg_mgmt(nic_dev->hwdev);
2785         if (rc) {
2786                 PMD_DRV_LOG(ERR, "Initialize cfg_mgmt failed, dev_name: %s",
2787                             eth_dev->data->name);
2788                 goto init_cfgmgnt_fail;
2789         }
2790
2791         /* init_aeqs */
2792         rc = hinic_comm_aeqs_init(nic_dev->hwdev);
2793         if (rc) {
2794                 PMD_DRV_LOG(ERR, "Initialize aeqs failed, dev_name: %s",
2795                             eth_dev->data->name);
2796                 goto init_aeqs_fail;
2797         }
2798
2799         /* init_pf_to_mgnt */
2800         rc = hinic_comm_pf_to_mgmt_init(nic_dev->hwdev);
2801         if (rc) {
2802                 PMD_DRV_LOG(ERR, "Initialize pf_to_mgmt failed, dev_name: %s",
2803                             eth_dev->data->name);
2804                 goto init_pf_to_mgmt_fail;
2805         }
2806
2807         /* init mailbox */
2808         rc = hinic_comm_func_to_func_init(nic_dev->hwdev);
2809         if (rc) {
2810                 PMD_DRV_LOG(ERR, "Initialize func_to_func failed, dev_name: %s",
2811                             eth_dev->data->name);
2812                 goto init_func_to_func_fail;
2813         }
2814
2815         rc = hinic_card_workmode_check(nic_dev);
2816         if (rc) {
2817                 PMD_DRV_LOG(ERR, "Check card workmode failed, dev_name: %s",
2818                             eth_dev->data->name);
2819                 goto workmode_check_fail;
2820         }
2821
2822         /* do l2nic reset to make chip clear */
2823         rc = hinic_l2nic_reset(nic_dev->hwdev);
2824         if (rc) {
2825                 PMD_DRV_LOG(ERR, "Do l2nic reset failed, dev_name: %s",
2826                             eth_dev->data->name);
2827                 goto l2nic_reset_fail;
2828         }
2829
2830         /* init dma and aeq msix attribute table */
2831         (void)hinic_init_attr_table(nic_dev->hwdev);
2832
2833         /* init_cmdqs */
2834         rc = hinic_comm_cmdqs_init(nic_dev->hwdev);
2835         if (rc) {
2836                 PMD_DRV_LOG(ERR, "Initialize cmdq failed, dev_name: %s",
2837                             eth_dev->data->name);
2838                 goto init_cmdq_fail;
2839         }
2840
2841         /* set hardware state active */
2842         rc = hinic_activate_hwdev_state(nic_dev->hwdev);
2843         if (rc) {
2844                 PMD_DRV_LOG(ERR, "Initialize resources state failed, dev_name: %s",
2845                             eth_dev->data->name);
2846                 goto init_resources_state_fail;
2847         }
2848
2849         /* init_capability */
2850         rc = hinic_init_capability(nic_dev->hwdev);
2851         if (rc) {
2852                 PMD_DRV_LOG(ERR, "Initialize capability failed, dev_name: %s",
2853                             eth_dev->data->name);
2854                 goto init_cap_fail;
2855         }
2856
2857         /* get nic capability */
2858         if (!hinic_support_nic(nic_dev->hwdev, &nic_dev->nic_cap)) {
2859                 PMD_DRV_LOG(ERR, "Hw doesn't support nic, dev_name: %s",
2860                             eth_dev->data->name);
2861                 rc = -EINVAL;
2862                 goto nic_check_fail;
2863         }
2864
2865         /* init root cla and function table */
2866         rc = hinic_init_nicio(nic_dev->hwdev);
2867         if (rc) {
2868                 PMD_DRV_LOG(ERR, "Initialize nic_io failed, dev_name: %s",
2869                             eth_dev->data->name);
2870                 goto init_nicio_fail;
2871         }
2872
2873         /* init_software_txrxq */
2874         rc = hinic_init_sw_rxtxqs(nic_dev);
2875         if (rc) {
2876                 PMD_DRV_LOG(ERR, "Initialize sw_rxtxqs failed, dev_name: %s",
2877                             eth_dev->data->name);
2878                 goto init_sw_rxtxqs_fail;
2879         }
2880
2881         rc = hinic_copy_mempool_init(nic_dev);
2882         if (rc) {
2883                 PMD_DRV_LOG(ERR, "Create copy mempool failed, dev_name: %s",
2884                          eth_dev->data->name);
2885                 goto init_mpool_fail;
2886         }
2887
2888         /* set hardware feature to default status */
2889         rc = hinic_set_default_hw_feature(nic_dev);
2890         if (rc) {
2891                 PMD_DRV_LOG(ERR, "Initialize hardware default features failed, dev_name: %s",
2892                             eth_dev->data->name);
2893                 goto set_default_hw_feature_fail;
2894         }
2895
2896         return 0;
2897
2898 set_default_hw_feature_fail:
2899         hinic_copy_mempool_uninit(nic_dev);
2900
2901 init_mpool_fail:
2902         hinic_deinit_sw_rxtxqs(nic_dev);
2903
2904 init_sw_rxtxqs_fail:
2905         hinic_deinit_nicio(nic_dev->hwdev);
2906
2907 nic_check_fail:
2908 init_nicio_fail:
2909 init_cap_fail:
2910         hinic_deactivate_hwdev_state(nic_dev->hwdev);
2911
2912 init_resources_state_fail:
2913         hinic_comm_cmdqs_free(nic_dev->hwdev);
2914
2915 init_cmdq_fail:
2916 l2nic_reset_fail:
2917 workmode_check_fail:
2918         hinic_comm_func_to_func_free(nic_dev->hwdev);
2919
2920 init_func_to_func_fail:
2921         hinic_comm_pf_to_mgmt_free(nic_dev->hwdev);
2922
2923 init_pf_to_mgmt_fail:
2924         hinic_comm_aeqs_free(nic_dev->hwdev);
2925
2926 init_aeqs_fail:
2927         free_cfg_mgmt(nic_dev->hwdev);
2928
2929 init_cfgmgnt_fail:
2930         hinic_hwif_res_free(nic_dev->hwdev);
2931
2932 init_hwif_fail:
2933         hinic_osdep_deinit(nic_dev->hwdev);
2934
2935 init_osdep_fail:
2936         rte_free(nic_dev->hwdev);
2937         nic_dev->hwdev = NULL;
2938
2939         return rc;
2940 }
2941
2942 static void hinic_nic_dev_destroy(struct rte_eth_dev *eth_dev)
2943 {
2944         struct hinic_nic_dev *nic_dev =
2945                         HINIC_ETH_DEV_TO_PRIVATE_NIC_DEV(eth_dev);
2946
2947         (void)hinic_set_link_status_follow(nic_dev->hwdev,
2948                                            HINIC_LINK_FOLLOW_DEFAULT);
2949         hinic_copy_mempool_uninit(nic_dev);
2950         hinic_deinit_sw_rxtxqs(nic_dev);
2951         hinic_deinit_nicio(nic_dev->hwdev);
2952         hinic_deactivate_hwdev_state(nic_dev->hwdev);
2953         hinic_comm_cmdqs_free(nic_dev->hwdev);
2954         hinic_comm_func_to_func_free(nic_dev->hwdev);
2955         hinic_comm_pf_to_mgmt_free(nic_dev->hwdev);
2956         hinic_comm_aeqs_free(nic_dev->hwdev);
2957         free_cfg_mgmt(nic_dev->hwdev);
2958         hinic_hwif_res_free(nic_dev->hwdev);
2959         hinic_osdep_deinit(nic_dev->hwdev);
2960         rte_free(nic_dev->hwdev);
2961         nic_dev->hwdev = NULL;
2962 }
2963
2964 /**
2965  * DPDK callback to close the device.
2966  *
2967  * @param dev
2968  *   Pointer to Ethernet device structure.
2969  */
2970 static int hinic_dev_close(struct rte_eth_dev *dev)
2971 {
2972         struct hinic_nic_dev *nic_dev = HINIC_ETH_DEV_TO_PRIVATE_NIC_DEV(dev);
2973
2974         if (rte_eal_process_type() != RTE_PROC_PRIMARY)
2975                 return 0;
2976
2977         if (rte_bit_relaxed_test_and_set32(HINIC_DEV_CLOSE,
2978                                            &nic_dev->dev_status)) {
2979                 PMD_DRV_LOG(WARNING, "Device %s already closed",
2980                             dev->data->name);
2981                 return 0;
2982         }
2983
2984         /* stop device first */
2985         hinic_dev_stop(dev);
2986
2987         /* rx_cqe, rx_info */
2988         hinic_free_all_rx_resources(dev);
2989
2990         /* tx_info */
2991         hinic_free_all_tx_resources(dev);
2992
2993         /* free wq, pi_dma_addr */
2994         hinic_free_all_rq(nic_dev);
2995
2996         /* free wq, db_addr */
2997         hinic_free_all_sq(nic_dev);
2998
2999         /* deinit mac vlan tbl */
3000         hinic_deinit_mac_addr(dev);
3001         hinic_remove_all_vlanid(dev);
3002
3003         /* disable hardware and uio interrupt */
3004         hinic_disable_interrupt(dev);
3005
3006         /* deinit nic hardware device */
3007         hinic_nic_dev_destroy(dev);
3008
3009         return 0;
3010 }
3011
3012 static const struct eth_dev_ops hinic_pmd_ops = {
3013         .dev_configure                 = hinic_dev_configure,
3014         .dev_infos_get                 = hinic_dev_infos_get,
3015         .fw_version_get                = hinic_fw_version_get,
3016         .rx_queue_setup                = hinic_rx_queue_setup,
3017         .tx_queue_setup                = hinic_tx_queue_setup,
3018         .dev_start                     = hinic_dev_start,
3019         .dev_set_link_up               = hinic_dev_set_link_up,
3020         .dev_set_link_down             = hinic_dev_set_link_down,
3021         .link_update                   = hinic_link_update,
3022         .rx_queue_release              = hinic_rx_queue_release,
3023         .tx_queue_release              = hinic_tx_queue_release,
3024         .dev_stop                      = hinic_dev_stop,
3025         .dev_close                     = hinic_dev_close,
3026         .mtu_set                       = hinic_dev_set_mtu,
3027         .vlan_filter_set               = hinic_vlan_filter_set,
3028         .vlan_offload_set              = hinic_vlan_offload_set,
3029         .allmulticast_enable           = hinic_dev_allmulticast_enable,
3030         .allmulticast_disable          = hinic_dev_allmulticast_disable,
3031         .promiscuous_enable            = hinic_dev_promiscuous_enable,
3032         .promiscuous_disable           = hinic_dev_promiscuous_disable,
3033         .flow_ctrl_get                 = hinic_flow_ctrl_get,
3034         .flow_ctrl_set                 = hinic_flow_ctrl_set,
3035         .rss_hash_update               = hinic_rss_hash_update,
3036         .rss_hash_conf_get             = hinic_rss_conf_get,
3037         .reta_update                   = hinic_rss_indirtbl_update,
3038         .reta_query                    = hinic_rss_indirtbl_query,
3039         .stats_get                     = hinic_dev_stats_get,
3040         .stats_reset                   = hinic_dev_stats_reset,
3041         .xstats_get                    = hinic_dev_xstats_get,
3042         .xstats_reset                  = hinic_dev_xstats_reset,
3043         .xstats_get_names              = hinic_dev_xstats_get_names,
3044         .rxq_info_get                  = hinic_rxq_info_get,
3045         .txq_info_get                  = hinic_txq_info_get,
3046         .mac_addr_set                  = hinic_set_mac_addr,
3047         .mac_addr_remove               = hinic_mac_addr_remove,
3048         .mac_addr_add                  = hinic_mac_addr_add,
3049         .set_mc_addr_list              = hinic_set_mc_addr_list,
3050         .filter_ctrl                   = hinic_dev_filter_ctrl,
3051 };
3052
3053 static const struct eth_dev_ops hinic_pmd_vf_ops = {
3054         .dev_configure                 = hinic_dev_configure,
3055         .dev_infos_get                 = hinic_dev_infos_get,
3056         .fw_version_get                = hinic_fw_version_get,
3057         .rx_queue_setup                = hinic_rx_queue_setup,
3058         .tx_queue_setup                = hinic_tx_queue_setup,
3059         .dev_start                     = hinic_dev_start,
3060         .link_update                   = hinic_link_update,
3061         .rx_queue_release              = hinic_rx_queue_release,
3062         .tx_queue_release              = hinic_tx_queue_release,
3063         .dev_stop                      = hinic_dev_stop,
3064         .dev_close                     = hinic_dev_close,
3065         .mtu_set                       = hinic_dev_set_mtu,
3066         .vlan_filter_set               = hinic_vlan_filter_set,
3067         .vlan_offload_set              = hinic_vlan_offload_set,
3068         .allmulticast_enable           = hinic_dev_allmulticast_enable,
3069         .allmulticast_disable          = hinic_dev_allmulticast_disable,
3070         .rss_hash_update               = hinic_rss_hash_update,
3071         .rss_hash_conf_get             = hinic_rss_conf_get,
3072         .reta_update                   = hinic_rss_indirtbl_update,
3073         .reta_query                    = hinic_rss_indirtbl_query,
3074         .stats_get                     = hinic_dev_stats_get,
3075         .stats_reset                   = hinic_dev_stats_reset,
3076         .xstats_get                    = hinic_dev_xstats_get,
3077         .xstats_reset                  = hinic_dev_xstats_reset,
3078         .xstats_get_names              = hinic_dev_xstats_get_names,
3079         .rxq_info_get                  = hinic_rxq_info_get,
3080         .txq_info_get                  = hinic_txq_info_get,
3081         .mac_addr_set                  = hinic_set_mac_addr,
3082         .mac_addr_remove               = hinic_mac_addr_remove,
3083         .mac_addr_add                  = hinic_mac_addr_add,
3084         .set_mc_addr_list              = hinic_set_mc_addr_list,
3085         .filter_ctrl                   = hinic_dev_filter_ctrl,
3086 };
3087
3088 static int hinic_func_init(struct rte_eth_dev *eth_dev)
3089 {
3090         struct rte_pci_device *pci_dev;
3091         struct rte_ether_addr *eth_addr;
3092         struct hinic_nic_dev *nic_dev;
3093         struct hinic_filter_info *filter_info;
3094         struct hinic_tcam_info *tcam_info;
3095         u32 mac_size;
3096         int rc;
3097
3098         pci_dev = RTE_ETH_DEV_TO_PCI(eth_dev);
3099
3100         /* EAL is SECONDARY and eth_dev is already created */
3101         if (rte_eal_process_type() != RTE_PROC_PRIMARY) {
3102                 PMD_DRV_LOG(INFO, "Initialize %s in secondary process",
3103                             eth_dev->data->name);
3104
3105                 return 0;
3106         }
3107
3108         nic_dev = HINIC_ETH_DEV_TO_PRIVATE_NIC_DEV(eth_dev);
3109         memset(nic_dev, 0, sizeof(*nic_dev));
3110
3111         snprintf(nic_dev->proc_dev_name,
3112                  sizeof(nic_dev->proc_dev_name),
3113                  "hinic-%.4x:%.2x:%.2x.%x",
3114                  pci_dev->addr.domain, pci_dev->addr.bus,
3115                  pci_dev->addr.devid, pci_dev->addr.function);
3116
3117         /* alloc mac_addrs */
3118         mac_size = HINIC_MAX_UC_MAC_ADDRS * sizeof(struct rte_ether_addr);
3119         eth_addr = rte_zmalloc("hinic_mac", mac_size, 0);
3120         if (!eth_addr) {
3121                 PMD_DRV_LOG(ERR, "Allocate ethernet addresses' memory failed, dev_name: %s",
3122                             eth_dev->data->name);
3123                 rc = -ENOMEM;
3124                 goto eth_addr_fail;
3125         }
3126         eth_dev->data->mac_addrs = eth_addr;
3127
3128         mac_size = HINIC_MAX_MC_MAC_ADDRS * sizeof(struct rte_ether_addr);
3129         nic_dev->mc_list = rte_zmalloc("hinic_mc", mac_size, 0);
3130         if (!nic_dev->mc_list) {
3131                 PMD_DRV_LOG(ERR, "Allocate mcast address' memory failed, dev_name: %s",
3132                             eth_dev->data->name);
3133                 rc = -ENOMEM;
3134                 goto mc_addr_fail;
3135         }
3136
3137         /* create hardware nic_device */
3138         rc = hinic_nic_dev_create(eth_dev);
3139         if (rc) {
3140                 PMD_DRV_LOG(ERR, "Create nic device failed, dev_name: %s",
3141                             eth_dev->data->name);
3142                 goto create_nic_dev_fail;
3143         }
3144
3145         if (HINIC_IS_VF(nic_dev->hwdev))
3146                 eth_dev->dev_ops = &hinic_pmd_vf_ops;
3147         else
3148                 eth_dev->dev_ops = &hinic_pmd_ops;
3149
3150         rc = hinic_init_mac_addr(eth_dev);
3151         if (rc) {
3152                 PMD_DRV_LOG(ERR, "Initialize mac table failed, dev_name: %s",
3153                             eth_dev->data->name);
3154                 goto init_mac_fail;
3155         }
3156
3157         /* register callback func to eal lib */
3158         rc = rte_intr_callback_register(&pci_dev->intr_handle,
3159                                         hinic_dev_interrupt_handler,
3160                                         (void *)eth_dev);
3161         if (rc) {
3162                 PMD_DRV_LOG(ERR, "Register rte interrupt callback failed, dev_name: %s",
3163                             eth_dev->data->name);
3164                 goto reg_intr_cb_fail;
3165         }
3166
3167         /* enable uio/vfio intr/eventfd mapping */
3168         rc = rte_intr_enable(&pci_dev->intr_handle);
3169         if (rc) {
3170                 PMD_DRV_LOG(ERR, "Enable rte interrupt failed, dev_name: %s",
3171                             eth_dev->data->name);
3172                 goto enable_intr_fail;
3173         }
3174         rte_bit_relaxed_set32(HINIC_DEV_INTR_EN, &nic_dev->dev_status);
3175
3176         hinic_mutex_init(&nic_dev->rx_mode_mutex, NULL);
3177
3178         /* initialize filter info */
3179         filter_info = &nic_dev->filter;
3180         tcam_info = &nic_dev->tcam;
3181         memset(filter_info, 0, sizeof(struct hinic_filter_info));
3182         memset(tcam_info, 0, sizeof(struct hinic_tcam_info));
3183         /* initialize 5tuple filter list */
3184         TAILQ_INIT(&filter_info->fivetuple_list);
3185         TAILQ_INIT(&tcam_info->tcam_list);
3186         TAILQ_INIT(&nic_dev->filter_ntuple_list);
3187         TAILQ_INIT(&nic_dev->filter_ethertype_list);
3188         TAILQ_INIT(&nic_dev->filter_fdir_rule_list);
3189         TAILQ_INIT(&nic_dev->hinic_flow_list);
3190
3191         rte_bit_relaxed_set32(HINIC_DEV_INIT, &nic_dev->dev_status);
3192         PMD_DRV_LOG(INFO, "Initialize %s in primary successfully",
3193                     eth_dev->data->name);
3194
3195         return 0;
3196
3197 enable_intr_fail:
3198         (void)rte_intr_callback_unregister(&pci_dev->intr_handle,
3199                                            hinic_dev_interrupt_handler,
3200                                            (void *)eth_dev);
3201
3202 reg_intr_cb_fail:
3203         hinic_deinit_mac_addr(eth_dev);
3204
3205 init_mac_fail:
3206         eth_dev->dev_ops = NULL;
3207         hinic_nic_dev_destroy(eth_dev);
3208
3209 create_nic_dev_fail:
3210         rte_free(nic_dev->mc_list);
3211         nic_dev->mc_list = NULL;
3212
3213 mc_addr_fail:
3214         rte_free(eth_addr);
3215         eth_dev->data->mac_addrs = NULL;
3216
3217 eth_addr_fail:
3218         PMD_DRV_LOG(ERR, "Initialize %s in primary failed",
3219                     eth_dev->data->name);
3220         return rc;
3221 }
3222
3223 static int hinic_dev_init(struct rte_eth_dev *eth_dev)
3224 {
3225         struct rte_pci_device *pci_dev;
3226
3227         pci_dev = RTE_ETH_DEV_TO_PCI(eth_dev);
3228
3229         PMD_DRV_LOG(INFO, "Initializing pf hinic-%.4x:%.2x:%.2x.%x in %s process",
3230                     pci_dev->addr.domain, pci_dev->addr.bus,
3231                     pci_dev->addr.devid, pci_dev->addr.function,
3232                     (rte_eal_process_type() == RTE_PROC_PRIMARY) ?
3233                     "primary" : "secondary");
3234
3235         /* rte_eth_dev rx_burst and tx_burst */
3236         eth_dev->rx_pkt_burst = hinic_recv_pkts;
3237         eth_dev->tx_pkt_burst = hinic_xmit_pkts;
3238
3239         return hinic_func_init(eth_dev);
3240 }
3241
3242 static int hinic_dev_uninit(struct rte_eth_dev *dev)
3243 {
3244         struct hinic_nic_dev *nic_dev;
3245
3246         nic_dev = HINIC_ETH_DEV_TO_PRIVATE_NIC_DEV(dev);
3247         rte_bit_relaxed_clear32(HINIC_DEV_INIT, &nic_dev->dev_status);
3248
3249         if (rte_eal_process_type() != RTE_PROC_PRIMARY)
3250                 return 0;
3251
3252         hinic_mutex_destroy(&nic_dev->rx_mode_mutex);
3253
3254         hinic_dev_close(dev);
3255
3256         dev->dev_ops = NULL;
3257         dev->rx_pkt_burst = NULL;
3258         dev->tx_pkt_burst = NULL;
3259
3260         rte_free(nic_dev->mc_list);
3261
3262         return HINIC_OK;
3263 }
3264
3265 static struct rte_pci_id pci_id_hinic_map[] = {
3266         { RTE_PCI_DEVICE(HINIC_HUAWEI_VENDOR_ID, HINIC_DEV_ID_PRD) },
3267         { RTE_PCI_DEVICE(HINIC_HUAWEI_VENDOR_ID, HINIC_DEV_ID_MEZZ_25GE) },
3268         { RTE_PCI_DEVICE(HINIC_HUAWEI_VENDOR_ID, HINIC_DEV_ID_MEZZ_100GE) },
3269         { RTE_PCI_DEVICE(HINIC_HUAWEI_VENDOR_ID, HINIC_DEV_ID_VF) },
3270         { RTE_PCI_DEVICE(HINIC_HUAWEI_VENDOR_ID, HINIC_DEV_ID_VF_HV) },
3271         { RTE_PCI_DEVICE(HINIC_HUAWEI_VENDOR_ID, HINIC_DEV_ID_1822_DUAL_25GE) },
3272         { RTE_PCI_DEVICE(HINIC_HUAWEI_VENDOR_ID, HINIC_DEV_ID_1822_100GE) },
3273         {.vendor_id = 0},
3274 };
3275
3276 static int hinic_pci_probe(struct rte_pci_driver *pci_drv __rte_unused,
3277                            struct rte_pci_device *pci_dev)
3278 {
3279         return rte_eth_dev_pci_generic_probe(pci_dev,
3280                 sizeof(struct hinic_nic_dev), hinic_dev_init);
3281 }
3282
3283 static int hinic_pci_remove(struct rte_pci_device *pci_dev)
3284 {
3285         return rte_eth_dev_pci_generic_remove(pci_dev, hinic_dev_uninit);
3286 }
3287
3288 static struct rte_pci_driver rte_hinic_pmd = {
3289         .id_table = pci_id_hinic_map,
3290         .drv_flags = RTE_PCI_DRV_NEED_MAPPING | RTE_PCI_DRV_INTR_LSC,
3291         .probe = hinic_pci_probe,
3292         .remove = hinic_pci_remove,
3293 };
3294
3295 RTE_PMD_REGISTER_PCI(net_hinic, rte_hinic_pmd);
3296 RTE_PMD_REGISTER_PCI_TABLE(net_hinic, pci_id_hinic_map);
3297 RTE_LOG_REGISTER(hinic_logtype, pmd.net.hinic, INFO);