drivers/net/hinic/hinic_pmd_ethdev.c

   1 /* SPDX-License-Identifier: BSD-3-Clause
   2  * Copyright(c) 2017 Huawei Technologies Co., Ltd
   3  */
   4
   5 #include <rte_pci.h>
   6 #include <rte_bus_pci.h>
   7 #include <rte_ethdev_pci.h>
   8 #include <rte_mbuf.h>
   9 #include <rte_malloc.h>
  10 #include <rte_memcpy.h>
  11 #include <rte_mempool.h>
  12 #include <rte_errno.h>
  13 #include <rte_ether.h>
  14
  15 #include "base/hinic_compat.h"
  16 #include "base/hinic_pmd_hwdev.h"
  17 #include "base/hinic_pmd_hwif.h"
  18 #include "base/hinic_pmd_wq.h"
  19 #include "base/hinic_pmd_cfg.h"
  20 #include "base/hinic_pmd_mgmt.h"
  21 #include "base/hinic_pmd_cmdq.h"
  22 #include "base/hinic_pmd_niccfg.h"
  23 #include "base/hinic_pmd_nicio.h"
  24 #include "base/hinic_pmd_mbox.h"
  25 #include "hinic_pmd_ethdev.h"
  26 #include "hinic_pmd_tx.h"
  27 #include "hinic_pmd_rx.h"
  28
  29 /* Vendor ID used by Huawei devices */
  30 #define HINIC_HUAWEI_VENDOR_ID          0x19E5
  31
  32 /* Hinic devices */
  33 #define HINIC_DEV_ID_PRD                0x1822
  34 #define HINIC_DEV_ID_VF                 0x375E
  35 #define HINIC_DEV_ID_VF_HV              0x379E
  36
  37 /* Mezz card for Blade Server */
  38 #define HINIC_DEV_ID_MEZZ_25GE          0x0210
  39 #define HINIC_DEV_ID_MEZZ_100GE         0x0205
  40
  41 /* 2*25G and 2*100G card */
  42 #define HINIC_DEV_ID_1822_DUAL_25GE     0x0206
  43 #define HINIC_DEV_ID_1822_100GE         0x0200
  44
  45 #define HINIC_SERVICE_MODE_NIC          2
  46
  47 #define HINIC_INTR_CB_UNREG_MAX_RETRIES 10
  48
  49 #define DEFAULT_BASE_COS                4
  50 #define NR_MAX_COS                      8
  51
  52 #define HINIC_MIN_RX_BUF_SIZE           1024
  53 #define HINIC_MAX_UC_MAC_ADDRS          128
  54 #define HINIC_MAX_MC_MAC_ADDRS          2048
  55
  56 #define HINIC_DEFAULT_BURST_SIZE        32
  57 #define HINIC_DEFAULT_NB_QUEUES         1
  58 #define HINIC_DEFAULT_RING_SIZE         1024
  59 #define HINIC_MAX_LRO_SIZE              65536
  60
  61 /*
  62  * vlan_id is a 12 bit number.
  63  * The VFTA array is actually a 4096 bit array, 128 of 32bit elements.
  64  * 2^5 = 32. The val of lower 5 bits specifies the bit in the 32bit element.
  65  * The higher 7 bit val specifies VFTA array index.
  66  */
  67 #define HINIC_VFTA_BIT(vlan_id)    (1 << ((vlan_id) & 0x1F))
  68 #define HINIC_VFTA_IDX(vlan_id)    ((vlan_id) >> 5)
  69
  70 #define HINIC_VLAN_FILTER_EN            (1U << 0)
  71
  72 #define HINIC_MTU_TO_PKTLEN(mtu)        \
  73         ((mtu) + ETH_HLEN + ETH_CRC_LEN)
  74
  75 #define HINIC_PKTLEN_TO_MTU(pktlen)     \
  76         ((pktlen) - (ETH_HLEN + ETH_CRC_LEN))
  77
  78 /* lro numer limit for one packet */
  79 #define HINIC_LRO_WQE_NUM_DEFAULT       8
  80
  81 struct hinic_xstats_name_off {
  82         char name[RTE_ETH_XSTATS_NAME_SIZE];
  83         u32  offset;
  84 };
  85
  86 #define HINIC_FUNC_STAT(_stat_item) {   \
  87         .name = #_stat_item, \
  88         .offset = offsetof(struct hinic_vport_stats, _stat_item) \
  89 }
  90
  91 #define HINIC_PORT_STAT(_stat_item) { \
  92         .name = #_stat_item, \
  93         .offset = offsetof(struct hinic_phy_port_stats, _stat_item) \
  94 }
  95
  96 static const struct hinic_xstats_name_off hinic_vport_stats_strings[] = {
  97         HINIC_FUNC_STAT(tx_unicast_pkts_vport),
  98         HINIC_FUNC_STAT(tx_unicast_bytes_vport),
  99         HINIC_FUNC_STAT(tx_multicast_pkts_vport),
 100         HINIC_FUNC_STAT(tx_multicast_bytes_vport),
 101         HINIC_FUNC_STAT(tx_broadcast_pkts_vport),
 102         HINIC_FUNC_STAT(tx_broadcast_bytes_vport),
 103
 104         HINIC_FUNC_STAT(rx_unicast_pkts_vport),
 105         HINIC_FUNC_STAT(rx_unicast_bytes_vport),
 106         HINIC_FUNC_STAT(rx_multicast_pkts_vport),
 107         HINIC_FUNC_STAT(rx_multicast_bytes_vport),
 108         HINIC_FUNC_STAT(rx_broadcast_pkts_vport),
 109         HINIC_FUNC_STAT(rx_broadcast_bytes_vport),
 110
 111         HINIC_FUNC_STAT(tx_discard_vport),
 112         HINIC_FUNC_STAT(rx_discard_vport),
 113         HINIC_FUNC_STAT(tx_err_vport),
 114         HINIC_FUNC_STAT(rx_err_vport),
 115 };
 116
 117 #define HINIC_VPORT_XSTATS_NUM (sizeof(hinic_vport_stats_strings) / \
 118                 sizeof(hinic_vport_stats_strings[0]))
 119
 120 static const struct hinic_xstats_name_off hinic_phyport_stats_strings[] = {
 121         HINIC_PORT_STAT(mac_rx_total_pkt_num),
 122         HINIC_PORT_STAT(mac_rx_total_oct_num),
 123         HINIC_PORT_STAT(mac_rx_bad_pkt_num),
 124         HINIC_PORT_STAT(mac_rx_bad_oct_num),
 125         HINIC_PORT_STAT(mac_rx_good_pkt_num),
 126         HINIC_PORT_STAT(mac_rx_good_oct_num),
 127         HINIC_PORT_STAT(mac_rx_uni_pkt_num),
 128         HINIC_PORT_STAT(mac_rx_multi_pkt_num),
 129         HINIC_PORT_STAT(mac_rx_broad_pkt_num),
 130         HINIC_PORT_STAT(mac_tx_total_pkt_num),
 131         HINIC_PORT_STAT(mac_tx_total_oct_num),
 132         HINIC_PORT_STAT(mac_tx_bad_pkt_num),
 133         HINIC_PORT_STAT(mac_tx_bad_oct_num),
 134         HINIC_PORT_STAT(mac_tx_good_pkt_num),
 135         HINIC_PORT_STAT(mac_tx_good_oct_num),
 136         HINIC_PORT_STAT(mac_tx_uni_pkt_num),
 137         HINIC_PORT_STAT(mac_tx_multi_pkt_num),
 138         HINIC_PORT_STAT(mac_tx_broad_pkt_num),
 139         HINIC_PORT_STAT(mac_rx_fragment_pkt_num),
 140         HINIC_PORT_STAT(mac_rx_undersize_pkt_num),
 141         HINIC_PORT_STAT(mac_rx_undermin_pkt_num),
 142         HINIC_PORT_STAT(mac_rx_64_oct_pkt_num),
 143         HINIC_PORT_STAT(mac_rx_65_127_oct_pkt_num),
 144         HINIC_PORT_STAT(mac_rx_128_255_oct_pkt_num),
 145         HINIC_PORT_STAT(mac_rx_256_511_oct_pkt_num),
 146         HINIC_PORT_STAT(mac_rx_512_1023_oct_pkt_num),
 147         HINIC_PORT_STAT(mac_rx_1024_1518_oct_pkt_num),
 148         HINIC_PORT_STAT(mac_rx_1519_2047_oct_pkt_num),
 149         HINIC_PORT_STAT(mac_rx_2048_4095_oct_pkt_num),
 150         HINIC_PORT_STAT(mac_rx_4096_8191_oct_pkt_num),
 151         HINIC_PORT_STAT(mac_rx_8192_9216_oct_pkt_num),
 152         HINIC_PORT_STAT(mac_rx_9217_12287_oct_pkt_num),
 153         HINIC_PORT_STAT(mac_rx_12288_16383_oct_pkt_num),
 154         HINIC_PORT_STAT(mac_rx_1519_max_bad_pkt_num),
 155         HINIC_PORT_STAT(mac_rx_1519_max_good_pkt_num),
 156         HINIC_PORT_STAT(mac_rx_oversize_pkt_num),
 157         HINIC_PORT_STAT(mac_rx_jabber_pkt_num),
 158         HINIC_PORT_STAT(mac_rx_mac_pause_num),
 159         HINIC_PORT_STAT(mac_rx_pfc_pkt_num),
 160         HINIC_PORT_STAT(mac_rx_pfc_pri0_pkt_num),
 161         HINIC_PORT_STAT(mac_rx_pfc_pri1_pkt_num),
 162         HINIC_PORT_STAT(mac_rx_pfc_pri2_pkt_num),
 163         HINIC_PORT_STAT(mac_rx_pfc_pri3_pkt_num),
 164         HINIC_PORT_STAT(mac_rx_pfc_pri4_pkt_num),
 165         HINIC_PORT_STAT(mac_rx_pfc_pri5_pkt_num),
 166         HINIC_PORT_STAT(mac_rx_pfc_pri6_pkt_num),
 167         HINIC_PORT_STAT(mac_rx_pfc_pri7_pkt_num),
 168         HINIC_PORT_STAT(mac_rx_mac_control_pkt_num),
 169         HINIC_PORT_STAT(mac_rx_sym_err_pkt_num),
 170         HINIC_PORT_STAT(mac_rx_fcs_err_pkt_num),
 171         HINIC_PORT_STAT(mac_rx_send_app_good_pkt_num),
 172         HINIC_PORT_STAT(mac_rx_send_app_bad_pkt_num),
 173         HINIC_PORT_STAT(mac_tx_fragment_pkt_num),
 174         HINIC_PORT_STAT(mac_tx_undersize_pkt_num),
 175         HINIC_PORT_STAT(mac_tx_undermin_pkt_num),
 176         HINIC_PORT_STAT(mac_tx_64_oct_pkt_num),
 177         HINIC_PORT_STAT(mac_tx_65_127_oct_pkt_num),
 178         HINIC_PORT_STAT(mac_tx_128_255_oct_pkt_num),
 179         HINIC_PORT_STAT(mac_tx_256_511_oct_pkt_num),
 180         HINIC_PORT_STAT(mac_tx_512_1023_oct_pkt_num),
 181         HINIC_PORT_STAT(mac_tx_1024_1518_oct_pkt_num),
 182         HINIC_PORT_STAT(mac_tx_1519_2047_oct_pkt_num),
 183         HINIC_PORT_STAT(mac_tx_2048_4095_oct_pkt_num),
 184         HINIC_PORT_STAT(mac_tx_4096_8191_oct_pkt_num),
 185         HINIC_PORT_STAT(mac_tx_8192_9216_oct_pkt_num),
 186         HINIC_PORT_STAT(mac_tx_9217_12287_oct_pkt_num),
 187         HINIC_PORT_STAT(mac_tx_12288_16383_oct_pkt_num),
 188         HINIC_PORT_STAT(mac_tx_1519_max_bad_pkt_num),
 189         HINIC_PORT_STAT(mac_tx_1519_max_good_pkt_num),
 190         HINIC_PORT_STAT(mac_tx_oversize_pkt_num),
 191         HINIC_PORT_STAT(mac_trans_jabber_pkt_num),
 192         HINIC_PORT_STAT(mac_tx_mac_pause_num),
 193         HINIC_PORT_STAT(mac_tx_pfc_pkt_num),
 194         HINIC_PORT_STAT(mac_tx_pfc_pri0_pkt_num),
 195         HINIC_PORT_STAT(mac_tx_pfc_pri1_pkt_num),
 196         HINIC_PORT_STAT(mac_tx_pfc_pri2_pkt_num),
 197         HINIC_PORT_STAT(mac_tx_pfc_pri3_pkt_num),
 198         HINIC_PORT_STAT(mac_tx_pfc_pri4_pkt_num),
 199         HINIC_PORT_STAT(mac_tx_pfc_pri5_pkt_num),
 200         HINIC_PORT_STAT(mac_tx_pfc_pri6_pkt_num),
 201         HINIC_PORT_STAT(mac_tx_pfc_pri7_pkt_num),
 202         HINIC_PORT_STAT(mac_tx_mac_control_pkt_num),
 203         HINIC_PORT_STAT(mac_tx_err_all_pkt_num),
 204         HINIC_PORT_STAT(mac_tx_from_app_good_pkt_num),
 205         HINIC_PORT_STAT(mac_tx_from_app_bad_pkt_num),
 206 };
 207
 208 #define HINIC_PHYPORT_XSTATS_NUM (sizeof(hinic_phyport_stats_strings) / \
 209                 sizeof(hinic_phyport_stats_strings[0]))
 210
 211 static const struct hinic_xstats_name_off hinic_rxq_stats_strings[] = {
 212         {"rx_nombuf", offsetof(struct hinic_rxq_stats, rx_nombuf)},
 213         {"burst_pkt", offsetof(struct hinic_rxq_stats, burst_pkts)},
 214 };
 215
 216 #define HINIC_RXQ_XSTATS_NUM (sizeof(hinic_rxq_stats_strings) / \
 217                 sizeof(hinic_rxq_stats_strings[0]))
 218
 219 static const struct hinic_xstats_name_off hinic_txq_stats_strings[] = {
 220         {"tx_busy", offsetof(struct hinic_txq_stats, tx_busy)},
 221         {"offload_errors", offsetof(struct hinic_txq_stats, off_errs)},
 222         {"copy_pkts", offsetof(struct hinic_txq_stats, cpy_pkts)},
 223         {"rl_drop", offsetof(struct hinic_txq_stats, rl_drop)},
 224         {"burst_pkts", offsetof(struct hinic_txq_stats, burst_pkts)},
 225         {"sge_len0", offsetof(struct hinic_txq_stats, sge_len0)},
 226         {"mbuf_null", offsetof(struct hinic_txq_stats, mbuf_null)},
 227 };
 228
 229 #define HINIC_TXQ_XSTATS_NUM (sizeof(hinic_txq_stats_strings) / \
 230                 sizeof(hinic_txq_stats_strings[0]))
 231
 232 static int hinic_xstats_calc_num(struct hinic_nic_dev *nic_dev)
 233 {
 234         if (HINIC_IS_VF(nic_dev->hwdev)) {
 235                 return (HINIC_VPORT_XSTATS_NUM +
 236                         HINIC_RXQ_XSTATS_NUM * nic_dev->num_rq +
 237                         HINIC_TXQ_XSTATS_NUM * nic_dev->num_sq);
 238         } else {
 239                 return (HINIC_VPORT_XSTATS_NUM +
 240                         HINIC_PHYPORT_XSTATS_NUM +
 241                         HINIC_RXQ_XSTATS_NUM * nic_dev->num_rq +
 242                         HINIC_TXQ_XSTATS_NUM * nic_dev->num_sq);
 243         }
 244 }
 245
 246 static const struct rte_eth_desc_lim hinic_rx_desc_lim = {
 247         .nb_max = HINIC_MAX_QUEUE_DEPTH,
 248         .nb_min = HINIC_MIN_QUEUE_DEPTH,
 249         .nb_align = HINIC_RXD_ALIGN,
 250 };
 251
 252 static const struct rte_eth_desc_lim hinic_tx_desc_lim = {
 253         .nb_max = HINIC_MAX_QUEUE_DEPTH,
 254         .nb_min = HINIC_MIN_QUEUE_DEPTH,
 255         .nb_align = HINIC_TXD_ALIGN,
 256 };
 257
 258 static int hinic_vlan_offload_set(struct rte_eth_dev *dev, int mask);
 259
 260 /**
 261  * Interrupt handler triggered by NIC  for handling
 262  * specific event.
 263  *
 264  * @param: The address of parameter (struct rte_eth_dev *) regsitered before.
 265  */
 266 static void hinic_dev_interrupt_handler(void *param)
 267 {
 268         struct rte_eth_dev *dev = param;
 269         struct hinic_nic_dev *nic_dev = HINIC_ETH_DEV_TO_PRIVATE_NIC_DEV(dev);
 270
 271         if (!rte_bit_relaxed_get32(HINIC_DEV_INTR_EN, &nic_dev->dev_status)) {
 272                 PMD_DRV_LOG(WARNING, "Device's interrupt is disabled, ignore interrupt event, dev_name: %s, port_id: %d",
 273                             nic_dev->proc_dev_name, dev->data->port_id);
 274                 return;
 275         }
 276
 277         /* aeq0 msg handler */
 278         hinic_dev_handle_aeq_event(nic_dev->hwdev, param);
 279 }
 280
 281 /**
 282  * Ethernet device configuration.
 283  *
 284  * Prepare the driver for a given number of TX and RX queues, mtu size
 285  * and configure RSS.
 286  *
 287  * @param dev
 288  *   Pointer to Ethernet device structure.
 289  *
 290  * @return
 291  *   0 on success, negative error value otherwise.
 292  */
 293 static int hinic_dev_configure(struct rte_eth_dev *dev)
 294 {
 295         struct hinic_nic_dev *nic_dev;
 296         struct hinic_nic_io *nic_io;
 297         int err;
 298
 299         nic_dev = HINIC_ETH_DEV_TO_PRIVATE_NIC_DEV(dev);
 300         nic_io = nic_dev->hwdev->nic_io;
 301
 302         nic_dev->num_sq =  dev->data->nb_tx_queues;
 303         nic_dev->num_rq = dev->data->nb_rx_queues;
 304
 305         nic_io->num_sqs =  dev->data->nb_tx_queues;
 306         nic_io->num_rqs = dev->data->nb_rx_queues;
 307
 308         /* queue pair is max_num(sq, rq) */
 309         nic_dev->num_qps = (nic_dev->num_sq > nic_dev->num_rq) ?
 310                         nic_dev->num_sq : nic_dev->num_rq;
 311         nic_io->num_qps = nic_dev->num_qps;
 312
 313         if (nic_dev->num_qps > nic_io->max_qps) {
 314                 PMD_DRV_LOG(ERR,
 315                         "Queue number out of range, get queue_num:%d, max_queue_num:%d",
 316                         nic_dev->num_qps, nic_io->max_qps);
 317                 return -EINVAL;
 318         }
 319
 320         if (dev->data->dev_conf.rxmode.mq_mode & ETH_MQ_RX_RSS_FLAG)
 321                 dev->data->dev_conf.rxmode.offloads |= DEV_RX_OFFLOAD_RSS_HASH;
 322
 323         /* mtu size is 256~9600 */
 324         if (dev->data->dev_conf.rxmode.max_rx_pkt_len < HINIC_MIN_FRAME_SIZE ||
 325             dev->data->dev_conf.rxmode.max_rx_pkt_len >
 326             HINIC_MAX_JUMBO_FRAME_SIZE) {
 327                 PMD_DRV_LOG(ERR,
 328                         "Max rx pkt len out of range, get max_rx_pkt_len:%d, "
 329                         "expect between %d and %d",
 330                         dev->data->dev_conf.rxmode.max_rx_pkt_len,
 331                         HINIC_MIN_FRAME_SIZE, HINIC_MAX_JUMBO_FRAME_SIZE);
 332                 return -EINVAL;
 333         }
 334
 335         nic_dev->mtu_size =
 336                 HINIC_PKTLEN_TO_MTU(dev->data->dev_conf.rxmode.max_rx_pkt_len);
 337
 338         /* rss template */
 339         err = hinic_config_mq_mode(dev, TRUE);
 340         if (err) {
 341                 PMD_DRV_LOG(ERR, "Config multi-queue failed");
 342                 return err;
 343         }
 344
 345         /* init vlan offoad */
 346         err = hinic_vlan_offload_set(dev,
 347                                 ETH_VLAN_STRIP_MASK | ETH_VLAN_FILTER_MASK);
 348         if (err) {
 349                 PMD_DRV_LOG(ERR, "Initialize vlan filter and strip failed");
 350                 (void)hinic_config_mq_mode(dev, FALSE);
 351                 return err;
 352         }
 353
 354         /* clear fdir filter flag in function table */
 355         hinic_free_fdir_filter(nic_dev);
 356
 357         return HINIC_OK;
 358 }
 359
 360 /**
 361  * DPDK callback to create the receive queue.
 362  *
 363  * @param dev
 364  *   Pointer to Ethernet device structure.
 365  * @param queue_idx
 366  *   RX queue index.
 367  * @param nb_desc
 368  *   Number of descriptors for receive queue.
 369  * @param socket_id
 370  *   NUMA socket on which memory must be allocated.
 371  * @param rx_conf
 372  *   Thresholds parameters (unused_).
 373  * @param mp
 374  *   Memory pool for buffer allocations.
 375  *
 376  * @return
 377  *   0 on success, negative error value otherwise.
 378  */
 379 static int hinic_rx_queue_setup(struct rte_eth_dev *dev, uint16_t queue_idx,
 380                          uint16_t nb_desc, unsigned int socket_id,
 381                          __rte_unused const struct rte_eth_rxconf *rx_conf,
 382                          struct rte_mempool *mp)
 383 {
 384         int rc;
 385         struct hinic_nic_dev *nic_dev;
 386         struct hinic_hwdev *hwdev;
 387         struct hinic_rxq *rxq;
 388         u16 rq_depth, rx_free_thresh;
 389         u32 buf_size;
 390
 391         nic_dev = HINIC_ETH_DEV_TO_PRIVATE_NIC_DEV(dev);
 392         hwdev = nic_dev->hwdev;
 393
 394         /* queue depth must be power of 2, otherwise will be aligned up */
 395         rq_depth = (nb_desc & (nb_desc - 1)) ?
 396                 ((u16)(1U << (ilog2(nb_desc) + 1))) : nb_desc;
 397
 398         /*
 399          * Validate number of receive descriptors.
 400          * It must not exceed hardware maximum and minimum.
 401          */
 402         if (rq_depth > HINIC_MAX_QUEUE_DEPTH ||
 403                 rq_depth < HINIC_MIN_QUEUE_DEPTH) {
 404                 PMD_DRV_LOG(ERR, "RX queue depth is out of range from %d to %d, (nb_desc=%d, q_depth=%d, port=%d queue=%d)",
 405                             HINIC_MIN_QUEUE_DEPTH, HINIC_MAX_QUEUE_DEPTH,
 406                             (int)nb_desc, (int)rq_depth,
 407                             (int)dev->data->port_id, (int)queue_idx);
 408                 return -EINVAL;
 409         }
 410
 411         /*
 412          * The RX descriptor ring will be cleaned after rxq->rx_free_thresh
 413          * descriptors are used or if the number of descriptors required
 414          * to transmit a packet is greater than the number of free RX
 415          * descriptors.
 416          * The following constraints must be satisfied:
 417          *  rx_free_thresh must be greater than 0.
 418          *  rx_free_thresh must be less than the size of the ring minus 1.
 419          * When set to zero use default values.
 420          */
 421         rx_free_thresh = (u16)((rx_conf->rx_free_thresh) ?
 422                         rx_conf->rx_free_thresh : HINIC_DEFAULT_RX_FREE_THRESH);
 423         if (rx_free_thresh >= (rq_depth - 1)) {
 424                 PMD_DRV_LOG(ERR, "rx_free_thresh must be less than the number of RX descriptors minus 1. (rx_free_thresh=%u port=%d queue=%d)",
 425                             (unsigned int)rx_free_thresh,
 426                             (int)dev->data->port_id,
 427                             (int)queue_idx);
 428                 return -EINVAL;
 429         }
 430
 431         rxq = rte_zmalloc_socket("hinic_rx_queue", sizeof(struct hinic_rxq),
 432                                  RTE_CACHE_LINE_SIZE, socket_id);
 433         if (!rxq) {
 434                 PMD_DRV_LOG(ERR, "Allocate rxq[%d] failed, dev_name: %s",
 435                             queue_idx, dev->data->name);
 436                 return -ENOMEM;
 437         }
 438         nic_dev->rxqs[queue_idx] = rxq;
 439
 440         /* alloc rx sq hw wqe page */
 441         rc = hinic_create_rq(hwdev, queue_idx, rq_depth, socket_id);
 442         if (rc) {
 443                 PMD_DRV_LOG(ERR, "Create rxq[%d] failed, dev_name: %s, rq_depth: %d",
 444                             queue_idx, dev->data->name, rq_depth);
 445                 goto ceate_rq_fail;
 446         }
 447
 448         /* mbuf pool must be assigned before setup rx resources */
 449         rxq->mb_pool = mp;
 450
 451         rc =
 452         hinic_convert_rx_buf_size(rte_pktmbuf_data_room_size(rxq->mb_pool) -
 453                                   RTE_PKTMBUF_HEADROOM, &buf_size);
 454         if (rc) {
 455                 PMD_DRV_LOG(ERR, "Adjust buf size failed, dev_name: %s",
 456                             dev->data->name);
 457                 goto adjust_bufsize_fail;
 458         }
 459
 460         /* rx queue info, rearm control */
 461         rxq->wq = &hwdev->nic_io->rq_wq[queue_idx];
 462         rxq->pi_virt_addr = hwdev->nic_io->qps[queue_idx].rq.pi_virt_addr;
 463         rxq->nic_dev = nic_dev;
 464         rxq->q_id = queue_idx;
 465         rxq->q_depth = rq_depth;
 466         rxq->buf_len = (u16)buf_size;
 467         rxq->rx_free_thresh = rx_free_thresh;
 468         rxq->socket_id = socket_id;
 469
 470         /* the last point cant do mbuf rearm in bulk */
 471         rxq->rxinfo_align_end = rxq->q_depth - rxq->rx_free_thresh;
 472
 473         /* device port identifier */
 474         rxq->port_id = dev->data->port_id;
 475
 476         /* alloc rx_cqe and prepare rq_wqe */
 477         rc = hinic_setup_rx_resources(rxq);
 478         if (rc) {
 479                 PMD_DRV_LOG(ERR, "Setup rxq[%d] rx_resources failed, dev_name: %s",
 480                             queue_idx, dev->data->name);
 481                 goto setup_rx_res_err;
 482         }
 483
 484         /* record nic_dev rxq in rte_eth rx_queues */
 485         dev->data->rx_queues[queue_idx] = rxq;
 486
 487         return 0;
 488
 489 setup_rx_res_err:
 490 adjust_bufsize_fail:
 491         hinic_destroy_rq(hwdev, queue_idx);
 492
 493 ceate_rq_fail:
 494         rte_free(rxq);
 495
 496         return rc;
 497 }
 498
 499 static void hinic_reset_rx_queue(struct rte_eth_dev *dev)
 500 {
 501         struct hinic_rxq *rxq;
 502         struct hinic_nic_dev *nic_dev;
 503         int q_id = 0;
 504
 505         nic_dev = HINIC_ETH_DEV_TO_PRIVATE_NIC_DEV(dev);
 506
 507         for (q_id = 0; q_id < nic_dev->num_rq; q_id++) {
 508                 rxq = dev->data->rx_queues[q_id];
 509
 510                 rxq->wq->cons_idx = 0;
 511                 rxq->wq->prod_idx = 0;
 512                 rxq->wq->delta = rxq->q_depth;
 513                 rxq->wq->mask = rxq->q_depth - 1;
 514
 515                 /* alloc mbuf to rq */
 516                 hinic_rx_alloc_pkts(rxq);
 517         }
 518 }
 519
 520 /**
 521  * DPDK callback to configure the transmit queue.
 522  *
 523  * @param dev
 524  *   Pointer to Ethernet device structure.
 525  * @param queue_idx
 526  *   Transmit queue index.
 527  * @param nb_desc
 528  *   Number of descriptors for transmit queue.
 529  * @param socket_id
 530  *   NUMA socket on which memory must be allocated.
 531  * @param tx_conf
 532  *   Tx queue configuration parameters.
 533  *
 534  * @return
 535  *   0 on success, negative error value otherwise.
 536  */
 537 static int hinic_tx_queue_setup(struct rte_eth_dev *dev, uint16_t queue_idx,
 538                          uint16_t nb_desc, unsigned int socket_id,
 539                          __rte_unused const struct rte_eth_txconf *tx_conf)
 540 {
 541         int rc;
 542         struct hinic_nic_dev *nic_dev;
 543         struct hinic_hwdev *hwdev;
 544         struct hinic_txq *txq;
 545         u16 sq_depth, tx_free_thresh;
 546
 547         nic_dev = HINIC_ETH_DEV_TO_PRIVATE_NIC_DEV(dev);
 548         hwdev = nic_dev->hwdev;
 549
 550         /* queue depth must be power of 2, otherwise will be aligned up */
 551         sq_depth = (nb_desc & (nb_desc - 1)) ?
 552                         ((u16)(1U << (ilog2(nb_desc) + 1))) : nb_desc;
 553
 554         /*
 555          * Validate number of transmit descriptors.
 556          * It must not exceed hardware maximum and minimum.
 557          */
 558         if (sq_depth > HINIC_MAX_QUEUE_DEPTH ||
 559                 sq_depth < HINIC_MIN_QUEUE_DEPTH) {
 560                 PMD_DRV_LOG(ERR, "TX queue depth is out of range from %d to %d, (nb_desc=%d, q_depth=%d, port=%d queue=%d)",
 561                           HINIC_MIN_QUEUE_DEPTH, HINIC_MAX_QUEUE_DEPTH,
 562                           (int)nb_desc, (int)sq_depth,
 563                           (int)dev->data->port_id, (int)queue_idx);
 564                 return -EINVAL;
 565         }
 566
 567         /*
 568          * The TX descriptor ring will be cleaned after txq->tx_free_thresh
 569          * descriptors are used or if the number of descriptors required
 570          * to transmit a packet is greater than the number of free TX
 571          * descriptors.
 572          * The following constraints must be satisfied:
 573          *  tx_free_thresh must be greater than 0.
 574          *  tx_free_thresh must be less than the size of the ring minus 1.
 575          * When set to zero use default values.
 576          */
 577         tx_free_thresh = (u16)((tx_conf->tx_free_thresh) ?
 578                         tx_conf->tx_free_thresh : HINIC_DEFAULT_TX_FREE_THRESH);
 579         if (tx_free_thresh >= (sq_depth - 1)) {
 580                 PMD_DRV_LOG(ERR, "tx_free_thresh must be less than the number of TX descriptors minus 1. (tx_free_thresh=%u port=%d queue=%d)",
 581                         (unsigned int)tx_free_thresh, (int)dev->data->port_id,
 582                         (int)queue_idx);
 583                 return -EINVAL;
 584         }
 585
 586         txq = rte_zmalloc_socket("hinic_tx_queue", sizeof(struct hinic_txq),
 587                                  RTE_CACHE_LINE_SIZE, socket_id);
 588         if (!txq) {
 589                 PMD_DRV_LOG(ERR, "Allocate txq[%d] failed, dev_name: %s",
 590                             queue_idx, dev->data->name);
 591                 return -ENOMEM;
 592         }
 593         nic_dev->txqs[queue_idx] = txq;
 594
 595         /* alloc tx sq hw wqepage */
 596         rc = hinic_create_sq(hwdev, queue_idx, sq_depth, socket_id);
 597         if (rc) {
 598                 PMD_DRV_LOG(ERR, "Create txq[%d] failed, dev_name: %s, sq_depth: %d",
 599                             queue_idx, dev->data->name, sq_depth);
 600                 goto create_sq_fail;
 601         }
 602
 603         txq->q_id = queue_idx;
 604         txq->q_depth = sq_depth;
 605         txq->port_id = dev->data->port_id;
 606         txq->tx_free_thresh = tx_free_thresh;
 607         txq->nic_dev = nic_dev;
 608         txq->wq = &hwdev->nic_io->sq_wq[queue_idx];
 609         txq->sq = &hwdev->nic_io->qps[queue_idx].sq;
 610         txq->cons_idx_addr = hwdev->nic_io->qps[queue_idx].sq.cons_idx_addr;
 611         txq->sq_head_addr = HINIC_GET_WQ_HEAD(txq);
 612         txq->sq_bot_sge_addr = HINIC_GET_WQ_TAIL(txq) -
 613                                         sizeof(struct hinic_sq_bufdesc);
 614         txq->cos = nic_dev->default_cos;
 615         txq->socket_id = socket_id;
 616
 617         /* alloc software txinfo */
 618         rc = hinic_setup_tx_resources(txq);
 619         if (rc) {
 620                 PMD_DRV_LOG(ERR, "Setup txq[%d] tx_resources failed, dev_name: %s",
 621                             queue_idx, dev->data->name);
 622                 goto setup_tx_res_fail;
 623         }
 624
 625         /* record nic_dev txq in rte_eth tx_queues */
 626         dev->data->tx_queues[queue_idx] = txq;
 627
 628         return HINIC_OK;
 629
 630 setup_tx_res_fail:
 631         hinic_destroy_sq(hwdev, queue_idx);
 632
 633 create_sq_fail:
 634         rte_free(txq);
 635
 636         return rc;
 637 }
 638
 639 static void hinic_reset_tx_queue(struct rte_eth_dev *dev)
 640 {
 641         struct hinic_nic_dev *nic_dev;
 642         struct hinic_txq *txq;
 643         struct hinic_nic_io *nic_io;
 644         struct hinic_hwdev *hwdev;
 645         volatile u32 *ci_addr;
 646         int q_id = 0;
 647
 648         nic_dev = HINIC_ETH_DEV_TO_PRIVATE_NIC_DEV(dev);
 649         hwdev = nic_dev->hwdev;
 650         nic_io = hwdev->nic_io;
 651
 652         for (q_id = 0; q_id < nic_dev->num_sq; q_id++) {
 653                 txq = dev->data->tx_queues[q_id];
 654
 655                 txq->wq->cons_idx = 0;
 656                 txq->wq->prod_idx = 0;
 657                 txq->wq->delta = txq->q_depth;
 658                 txq->wq->mask  = txq->q_depth - 1;
 659
 660                 /* clear hardware ci */
 661                 ci_addr = (volatile u32 *)HINIC_CI_VADDR(nic_io->ci_vaddr_base,
 662                                                         q_id);
 663                 *ci_addr = 0;
 664         }
 665 }
 666
 667 /**
 668  * Get link speed from NIC.
 669  *
 670  * @param dev
 671  *   Pointer to Ethernet device structure.
 672  * @param speed_capa
 673  *   Pointer to link speed structure.
 674  */
 675 static void hinic_get_speed_capa(struct rte_eth_dev *dev, uint32_t *speed_capa)
 676 {
 677         struct hinic_nic_dev *nic_dev = HINIC_ETH_DEV_TO_PRIVATE_NIC_DEV(dev);
 678         u32 supported_link, advertised_link;
 679         int err;
 680
 681 #define HINIC_LINK_MODE_SUPPORT_1G      (1U << HINIC_GE_BASE_KX)
 682
 683 #define HINIC_LINK_MODE_SUPPORT_10G     (1U << HINIC_10GE_BASE_KR)
 684
 685 #define HINIC_LINK_MODE_SUPPORT_25G     ((1U << HINIC_25GE_BASE_KR_S) | \
 686                                         (1U << HINIC_25GE_BASE_CR_S) | \
 687                                         (1U << HINIC_25GE_BASE_KR) | \
 688                                         (1U << HINIC_25GE_BASE_CR))
 689
 690 #define HINIC_LINK_MODE_SUPPORT_40G     ((1U << HINIC_40GE_BASE_KR4) | \
 691                                         (1U << HINIC_40GE_BASE_CR4))
 692
 693 #define HINIC_LINK_MODE_SUPPORT_100G    ((1U << HINIC_100GE_BASE_KR4) | \
 694                                         (1U << HINIC_100GE_BASE_CR4))
 695
 696         err = hinic_get_link_mode(nic_dev->hwdev,
 697                                   &supported_link, &advertised_link);
 698         if (err || supported_link == HINIC_SUPPORTED_UNKNOWN ||
 699             advertised_link == HINIC_SUPPORTED_UNKNOWN) {
 700                 PMD_DRV_LOG(WARNING, "Get speed capability info failed, device: %s, port_id: %u",
 701                           nic_dev->proc_dev_name, dev->data->port_id);
 702         } else {
 703                 *speed_capa = 0;
 704                 if (!!(supported_link & HINIC_LINK_MODE_SUPPORT_1G))
 705                         *speed_capa |= ETH_LINK_SPEED_1G;
 706                 if (!!(supported_link & HINIC_LINK_MODE_SUPPORT_10G))
 707                         *speed_capa |= ETH_LINK_SPEED_10G;
 708                 if (!!(supported_link & HINIC_LINK_MODE_SUPPORT_25G))
 709                         *speed_capa |= ETH_LINK_SPEED_25G;
 710                 if (!!(supported_link & HINIC_LINK_MODE_SUPPORT_40G))
 711                         *speed_capa |= ETH_LINK_SPEED_40G;
 712                 if (!!(supported_link & HINIC_LINK_MODE_SUPPORT_100G))
 713                         *speed_capa |= ETH_LINK_SPEED_100G;
 714         }
 715 }
 716
 717 /**
 718  * DPDK callback to get information about the device.
 719  *
 720  * @param dev
 721  *   Pointer to Ethernet device structure.
 722  * @param info
 723  *   Pointer to Info structure output buffer.
 724  */
 725 static int
 726 hinic_dev_infos_get(struct rte_eth_dev *dev, struct rte_eth_dev_info *info)
 727 {
 728         struct hinic_nic_dev *nic_dev = HINIC_ETH_DEV_TO_PRIVATE_NIC_DEV(dev);
 729
 730         info->max_rx_queues  = nic_dev->nic_cap.max_rqs;
 731         info->max_tx_queues  = nic_dev->nic_cap.max_sqs;
 732         info->min_rx_bufsize = HINIC_MIN_RX_BUF_SIZE;
 733         info->max_rx_pktlen  = HINIC_MAX_JUMBO_FRAME_SIZE;
 734         info->max_mac_addrs  = HINIC_MAX_UC_MAC_ADDRS;
 735         info->min_mtu = HINIC_MIN_MTU_SIZE;
 736         info->max_mtu = HINIC_MAX_MTU_SIZE;
 737         info->max_lro_pkt_size = HINIC_MAX_LRO_SIZE;
 738
 739         hinic_get_speed_capa(dev, &info->speed_capa);
 740         info->rx_queue_offload_capa = 0;
 741         info->rx_offload_capa = DEV_RX_OFFLOAD_VLAN_STRIP |
 742                                 DEV_RX_OFFLOAD_IPV4_CKSUM |
 743                                 DEV_RX_OFFLOAD_UDP_CKSUM |
 744                                 DEV_RX_OFFLOAD_TCP_CKSUM |
 745                                 DEV_RX_OFFLOAD_VLAN_FILTER |
 746                                 DEV_RX_OFFLOAD_SCATTER |
 747                                 DEV_RX_OFFLOAD_JUMBO_FRAME |
 748                                 DEV_RX_OFFLOAD_TCP_LRO |
 749                                 DEV_RX_OFFLOAD_RSS_HASH;
 750
 751         info->tx_queue_offload_capa = 0;
 752         info->tx_offload_capa = DEV_TX_OFFLOAD_VLAN_INSERT |
 753                                 DEV_TX_OFFLOAD_IPV4_CKSUM |
 754                                 DEV_TX_OFFLOAD_UDP_CKSUM |
 755                                 DEV_TX_OFFLOAD_TCP_CKSUM |
 756                                 DEV_TX_OFFLOAD_SCTP_CKSUM |
 757                                 DEV_TX_OFFLOAD_OUTER_IPV4_CKSUM |
 758                                 DEV_TX_OFFLOAD_TCP_TSO |
 759                                 DEV_TX_OFFLOAD_MULTI_SEGS;
 760
 761         info->hash_key_size = HINIC_RSS_KEY_SIZE;
 762         info->reta_size = HINIC_RSS_INDIR_SIZE;
 763         info->flow_type_rss_offloads = HINIC_RSS_OFFLOAD_ALL;
 764         info->rx_desc_lim = hinic_rx_desc_lim;
 765         info->tx_desc_lim = hinic_tx_desc_lim;
 766
 767         /* Driver-preferred Rx/Tx parameters */
 768         info->default_rxportconf.burst_size = HINIC_DEFAULT_BURST_SIZE;
 769         info->default_txportconf.burst_size = HINIC_DEFAULT_BURST_SIZE;
 770         info->default_rxportconf.nb_queues = HINIC_DEFAULT_NB_QUEUES;
 771         info->default_txportconf.nb_queues = HINIC_DEFAULT_NB_QUEUES;
 772         info->default_rxportconf.ring_size = HINIC_DEFAULT_RING_SIZE;
 773         info->default_txportconf.ring_size = HINIC_DEFAULT_RING_SIZE;
 774
 775         return 0;
 776 }
 777
 778 static int hinic_fw_version_get(struct rte_eth_dev *dev, char *fw_version,
 779                                 size_t fw_size)
 780 {
 781         struct hinic_nic_dev *nic_dev = HINIC_ETH_DEV_TO_PRIVATE_NIC_DEV(dev);
 782         char fw_ver[HINIC_MGMT_VERSION_MAX_LEN] = {0};
 783         int err;
 784
 785         err = hinic_get_mgmt_version(nic_dev->hwdev, fw_ver);
 786         if (err) {
 787                 PMD_DRV_LOG(ERR, "Failed to get fw version");
 788                 return -EINVAL;
 789         }
 790
 791         if (fw_size < strlen(fw_ver) + 1)
 792                 return (strlen(fw_ver) + 1);
 793
 794         snprintf(fw_version, fw_size, "%s", fw_ver);
 795
 796         return 0;
 797 }
 798
 799 static int hinic_config_rx_mode(struct hinic_nic_dev *nic_dev, u32 rx_mode_ctrl)
 800 {
 801         int err;
 802
 803         err = hinic_set_rx_mode(nic_dev->hwdev, rx_mode_ctrl);
 804         if (err) {
 805                 PMD_DRV_LOG(ERR, "Failed to set rx mode");
 806                 return -EINVAL;
 807         }
 808         nic_dev->rx_mode_status = rx_mode_ctrl;
 809
 810         return 0;
 811 }
 812
 813 static int hinic_rxtx_configure(struct rte_eth_dev *dev)
 814 {
 815         struct hinic_nic_dev *nic_dev = HINIC_ETH_DEV_TO_PRIVATE_NIC_DEV(dev);
 816         int err;
 817
 818         /* rx configure, if rss enable, need to init default configuration */
 819         err = hinic_rx_configure(dev);
 820         if (err) {
 821                 PMD_DRV_LOG(ERR, "Configure rss failed");
 822                 return err;
 823         }
 824
 825         /* rx mode init */
 826         err = hinic_config_rx_mode(nic_dev, HINIC_DEFAULT_RX_MODE);
 827         if (err) {
 828                 PMD_DRV_LOG(ERR, "Configure rx_mode:0x%x failed",
 829                         HINIC_DEFAULT_RX_MODE);
 830                 goto set_rx_mode_fail;
 831         }
 832
 833         return HINIC_OK;
 834
 835 set_rx_mode_fail:
 836         hinic_rx_remove_configure(dev);
 837
 838         return err;
 839 }
 840
 841 static void hinic_remove_rxtx_configure(struct rte_eth_dev *dev)
 842 {
 843         struct hinic_nic_dev *nic_dev = HINIC_ETH_DEV_TO_PRIVATE_NIC_DEV(dev);
 844
 845         (void)hinic_config_rx_mode(nic_dev, 0);
 846         hinic_rx_remove_configure(dev);
 847 }
 848
 849 static int hinic_priv_get_dev_link_status(struct hinic_nic_dev *nic_dev,
 850                                           struct rte_eth_link *link)
 851 {
 852         int rc;
 853         u8 port_link_status = 0;
 854         struct nic_port_info port_link_info;
 855         struct hinic_hwdev *nic_hwdev = nic_dev->hwdev;
 856         uint32_t port_speed[LINK_SPEED_MAX] = {ETH_SPEED_NUM_10M,
 857                                         ETH_SPEED_NUM_100M, ETH_SPEED_NUM_1G,
 858                                         ETH_SPEED_NUM_10G, ETH_SPEED_NUM_25G,
 859                                         ETH_SPEED_NUM_40G, ETH_SPEED_NUM_100G};
 860
 861         rc = hinic_get_link_status(nic_hwdev, &port_link_status);
 862         if (rc)
 863                 return rc;
 864
 865         if (!port_link_status) {
 866                 link->link_status = ETH_LINK_DOWN;
 867                 link->link_speed = 0;
 868                 link->link_duplex = ETH_LINK_HALF_DUPLEX;
 869                 link->link_autoneg = ETH_LINK_FIXED;
 870                 return HINIC_OK;
 871         }
 872
 873         memset(&port_link_info, 0, sizeof(port_link_info));
 874         rc = hinic_get_port_info(nic_hwdev, &port_link_info);
 875         if (rc)
 876                 return rc;
 877
 878         link->link_speed = port_speed[port_link_info.speed % LINK_SPEED_MAX];
 879         link->link_duplex = port_link_info.duplex;
 880         link->link_autoneg = port_link_info.autoneg_state;
 881         link->link_status = port_link_status;
 882
 883         return HINIC_OK;
 884 }
 885
 886 /**
 887  * DPDK callback to retrieve physical link information.
 888  *
 889  * @param dev
 890  *   Pointer to Ethernet device structure.
 891  * @param wait_to_complete
 892  *   Wait for request completion.
 893  *
 894  * @return
 895  *   0 link status changed, -1 link status not changed
 896  */
 897 static int hinic_link_update(struct rte_eth_dev *dev, int wait_to_complete)
 898 {
 899 #define CHECK_INTERVAL 10  /* 10ms */
 900 #define MAX_REPEAT_TIME 100  /* 1s (100 * 10ms) in total */
 901         int rc = HINIC_OK;
 902         struct rte_eth_link link;
 903         struct hinic_nic_dev *nic_dev = HINIC_ETH_DEV_TO_PRIVATE_NIC_DEV(dev);
 904         unsigned int rep_cnt = MAX_REPEAT_TIME;
 905
 906         memset(&link, 0, sizeof(link));
 907         do {
 908                 /* Get link status information from hardware */
 909                 rc = hinic_priv_get_dev_link_status(nic_dev, &link);
 910                 if (rc != HINIC_OK) {
 911                         link.link_speed = ETH_SPEED_NUM_NONE;
 912                         link.link_duplex = ETH_LINK_FULL_DUPLEX;
 913                         PMD_DRV_LOG(ERR, "Get link status failed");
 914                         goto out;
 915                 }
 916
 917                 if (!wait_to_complete || link.link_status)
 918                         break;
 919
 920                 rte_delay_ms(CHECK_INTERVAL);
 921         } while (rep_cnt--);
 922
 923 out:
 924         rc = rte_eth_linkstatus_set(dev, &link);
 925         return rc;
 926 }
 927
 928 /**
 929  * DPDK callback to bring the link UP.
 930  *
 931  * @param dev
 932  *   Pointer to Ethernet device structure.
 933  *
 934  * @return
 935  *   0 on success, negative errno value on failure.
 936  */
 937 static int hinic_dev_set_link_up(struct rte_eth_dev *dev)
 938 {
 939         struct hinic_nic_dev *nic_dev = HINIC_ETH_DEV_TO_PRIVATE_NIC_DEV(dev);
 940         int ret;
 941
 942         ret = hinic_set_xsfp_tx_status(nic_dev->hwdev, true);
 943         if (ret) {
 944                 PMD_DRV_LOG(ERR, "Enable port tx xsfp failed, dev_name: %s, port_id: %d",
 945                             nic_dev->proc_dev_name, dev->data->port_id);
 946                 return ret;
 947         }
 948
 949         /* link status follow phy port status, up will open pma */
 950         ret = hinic_set_port_enable(nic_dev->hwdev, true);
 951         if (ret)
 952                 PMD_DRV_LOG(ERR, "Set mac link up failed, dev_name: %s, port_id: %d",
 953                             nic_dev->proc_dev_name, dev->data->port_id);
 954
 955         return ret;
 956 }
 957
 958 /**
 959  * DPDK callback to bring the link DOWN.
 960  *
 961  * @param dev
 962  *   Pointer to Ethernet device structure.
 963  *
 964  * @return
 965  *   0 on success, negative errno value on failure.
 966  */
 967 static int hinic_dev_set_link_down(struct rte_eth_dev *dev)
 968 {
 969         struct hinic_nic_dev *nic_dev = HINIC_ETH_DEV_TO_PRIVATE_NIC_DEV(dev);
 970         int ret;
 971
 972         ret = hinic_set_xsfp_tx_status(nic_dev->hwdev, false);
 973         if (ret) {
 974                 PMD_DRV_LOG(ERR, "Disable port tx xsfp failed, dev_name: %s, port_id: %d",
 975                             nic_dev->proc_dev_name, dev->data->port_id);
 976                 return ret;
 977         }
 978
 979         /* link status follow phy port status, up will close pma */
 980         ret = hinic_set_port_enable(nic_dev->hwdev, false);
 981         if (ret)
 982                 PMD_DRV_LOG(ERR, "Set mac link down failed, dev_name: %s, port_id: %d",
 983                             nic_dev->proc_dev_name, dev->data->port_id);
 984
 985         return ret;
 986 }
 987
 988 /**
 989  * DPDK callback to start the device.
 990  *
 991  * @param dev
 992  *   Pointer to Ethernet device structure.
 993  *
 994  * @return
 995  *   0 on success, negative errno value on failure.
 996  */
 997 static int hinic_dev_start(struct rte_eth_dev *dev)
 998 {
 999         int rc;
1000         char *name;
1001         struct hinic_nic_dev *nic_dev;
1002
1003         nic_dev = HINIC_ETH_DEV_TO_PRIVATE_NIC_DEV(dev);
1004         name = dev->data->name;
1005
1006         /* reset rx and tx queue */
1007         hinic_reset_rx_queue(dev);
1008         hinic_reset_tx_queue(dev);
1009
1010         /* get func rx buf size */
1011         hinic_get_func_rx_buf_size(nic_dev);
1012
1013         /* init txq and rxq context */
1014         rc = hinic_init_qp_ctxts(nic_dev->hwdev);
1015         if (rc) {
1016                 PMD_DRV_LOG(ERR, "Initialize qp context failed, dev_name: %s",
1017                             name);
1018                 goto init_qp_fail;
1019         }
1020
1021         /* rss template */
1022         rc = hinic_config_mq_mode(dev, TRUE);
1023         if (rc) {
1024                 PMD_DRV_LOG(ERR, "Configure mq mode failed, dev_name: %s",
1025                             name);
1026                 goto cfg_mq_mode_fail;
1027         }
1028
1029         /* set default mtu */
1030         rc = hinic_set_port_mtu(nic_dev->hwdev, nic_dev->mtu_size);
1031         if (rc) {
1032                 PMD_DRV_LOG(ERR, "Set mtu_size[%d] failed, dev_name: %s",
1033                             nic_dev->mtu_size, name);
1034                 goto set_mtu_fail;
1035         }
1036
1037         /* configure rss rx_mode and other rx or tx default feature */
1038         rc = hinic_rxtx_configure(dev);
1039         if (rc) {
1040                 PMD_DRV_LOG(ERR, "Configure tx and rx failed, dev_name: %s",
1041                             name);
1042                 goto cfg_rxtx_fail;
1043         }
1044
1045         /* reactive pf status, so that uP report asyn event */
1046         hinic_set_pf_status(nic_dev->hwdev->hwif, HINIC_PF_STATUS_ACTIVE_FLAG);
1047
1048         /* open virtual port and ready to start packet receiving */
1049         rc = hinic_set_vport_enable(nic_dev->hwdev, true);
1050         if (rc) {
1051                 PMD_DRV_LOG(ERR, "Enable vport failed, dev_name:%s", name);
1052                 goto en_vport_fail;
1053         }
1054
1055         /* open physical port and start packet receiving */
1056         rc = hinic_set_port_enable(nic_dev->hwdev, true);
1057         if (rc) {
1058                 PMD_DRV_LOG(ERR, "Enable physical port failed, dev_name: %s",
1059                             name);
1060                 goto en_port_fail;
1061         }
1062
1063         /* update eth_dev link status */
1064         if (dev->data->dev_conf.intr_conf.lsc != 0)
1065                 (void)hinic_link_update(dev, 0);
1066
1067         rte_bit_relaxed_set32(HINIC_DEV_START, &nic_dev->dev_status);
1068
1069         return 0;
1070
1071 en_port_fail:
1072         (void)hinic_set_vport_enable(nic_dev->hwdev, false);
1073
1074 en_vport_fail:
1075         hinic_set_pf_status(nic_dev->hwdev->hwif, HINIC_PF_STATUS_INIT);
1076
1077         /* Flush tx && rx chip resources in case of set vport fake fail */
1078         (void)hinic_flush_qp_res(nic_dev->hwdev);
1079         rte_delay_ms(100);
1080
1081         hinic_remove_rxtx_configure(dev);
1082
1083 cfg_rxtx_fail:
1084 set_mtu_fail:
1085 cfg_mq_mode_fail:
1086         hinic_free_qp_ctxts(nic_dev->hwdev);
1087
1088 init_qp_fail:
1089         hinic_free_all_rx_mbuf(dev);
1090         hinic_free_all_tx_mbuf(dev);
1091
1092         return rc;
1093 }
1094
1095 /**
1096  * DPDK callback to release the receive queue.
1097  *
1098  * @param queue
1099  *   Generic receive queue pointer.
1100  */
1101 static void hinic_rx_queue_release(void *queue)
1102 {
1103         struct hinic_rxq *rxq = queue;
1104         struct hinic_nic_dev *nic_dev;
1105
1106         if (!rxq) {
1107                 PMD_DRV_LOG(WARNING, "Rxq is null when release");
1108                 return;
1109         }
1110         nic_dev = rxq->nic_dev;
1111
1112         /* free rxq_pkt mbuf */
1113         hinic_free_all_rx_mbufs(rxq);
1114
1115         /* free rxq_cqe, rxq_info */
1116         hinic_free_rx_resources(rxq);
1117
1118         /* free root rq wq */
1119         hinic_destroy_rq(nic_dev->hwdev, rxq->q_id);
1120
1121         nic_dev->rxqs[rxq->q_id] = NULL;
1122
1123         /* free rxq */
1124         rte_free(rxq);
1125 }
1126
1127 /**
1128  * DPDK callback to release the transmit queue.
1129  *
1130  * @param queue
1131  *   Generic transmit queue pointer.
1132  */
1133 static void hinic_tx_queue_release(void *queue)
1134 {
1135         struct hinic_txq *txq = queue;
1136         struct hinic_nic_dev *nic_dev;
1137
1138         if (!txq) {
1139                 PMD_DRV_LOG(WARNING, "Txq is null when release");
1140                 return;
1141         }
1142         nic_dev = txq->nic_dev;
1143
1144         /* free txq_pkt mbuf */
1145         hinic_free_all_tx_mbufs(txq);
1146
1147         /* free txq_info */
1148         hinic_free_tx_resources(txq);
1149
1150         /* free root sq wq */
1151         hinic_destroy_sq(nic_dev->hwdev, txq->q_id);
1152         nic_dev->txqs[txq->q_id] = NULL;
1153
1154         /* free txq */
1155         rte_free(txq);
1156 }
1157
1158 static void hinic_free_all_rq(struct hinic_nic_dev *nic_dev)
1159 {
1160         u16 q_id;
1161
1162         for (q_id = 0; q_id < nic_dev->num_rq; q_id++)
1163                 hinic_destroy_rq(nic_dev->hwdev, q_id);
1164 }
1165
1166 static void hinic_free_all_sq(struct hinic_nic_dev *nic_dev)
1167 {
1168         u16 q_id;
1169
1170         for (q_id = 0; q_id < nic_dev->num_sq; q_id++)
1171                 hinic_destroy_sq(nic_dev->hwdev, q_id);
1172 }
1173
1174 /**
1175  * DPDK callback to stop the device.
1176  *
1177  * @param dev
1178  *   Pointer to Ethernet device structure.
1179  */
1180 static void hinic_dev_stop(struct rte_eth_dev *dev)
1181 {
1182         int rc;
1183         char *name;
1184         uint16_t port_id;
1185         struct hinic_nic_dev *nic_dev;
1186         struct rte_eth_link link;
1187
1188         nic_dev = HINIC_ETH_DEV_TO_PRIVATE_NIC_DEV(dev);
1189         name = dev->data->name;
1190         port_id = dev->data->port_id;
1191
1192         if (!rte_bit_relaxed_test_and_clear32(HINIC_DEV_START,
1193                                               &nic_dev->dev_status)) {
1194                 PMD_DRV_LOG(INFO, "Device %s already stopped", name);
1195                 return;
1196         }
1197
1198         /* just stop phy port and vport */
1199         rc = hinic_set_port_enable(nic_dev->hwdev, false);
1200         if (rc)
1201                 PMD_DRV_LOG(WARNING, "Disable phy port failed, error: %d, dev_name: %s, port_id: %d",
1202                           rc, name, port_id);
1203
1204         rc = hinic_set_vport_enable(nic_dev->hwdev, false);
1205         if (rc)
1206                 PMD_DRV_LOG(WARNING, "Disable vport failed, error: %d, dev_name: %s, port_id: %d",
1207                           rc, name, port_id);
1208
1209         /* Clear recorded link status */
1210         memset(&link, 0, sizeof(link));
1211         (void)rte_eth_linkstatus_set(dev, &link);
1212
1213         /* flush pending io request */
1214         rc = hinic_rx_tx_flush(nic_dev->hwdev);
1215         if (rc)
1216                 PMD_DRV_LOG(WARNING, "Flush pending io failed, error: %d, dev_name: %s, port_id: %d",
1217                             rc, name, port_id);
1218
1219         /* clean rss table and rx_mode */
1220         hinic_remove_rxtx_configure(dev);
1221
1222         /* clean root context */
1223         hinic_free_qp_ctxts(nic_dev->hwdev);
1224
1225         hinic_destroy_fdir_filter(dev);
1226
1227         /* free mbuf */
1228         hinic_free_all_rx_mbuf(dev);
1229         hinic_free_all_tx_mbuf(dev);
1230 }
1231
1232 static void hinic_disable_interrupt(struct rte_eth_dev *dev)
1233 {
1234         struct hinic_nic_dev *nic_dev = HINIC_ETH_DEV_TO_PRIVATE_NIC_DEV(dev);
1235         struct rte_pci_device *pci_dev = RTE_ETH_DEV_TO_PCI(dev);
1236         int ret, retries = 0;
1237
1238         rte_bit_relaxed_clear32(HINIC_DEV_INTR_EN, &nic_dev->dev_status);
1239
1240         /* disable msix interrupt in hardware */
1241         hinic_set_msix_state(nic_dev->hwdev, 0, HINIC_MSIX_DISABLE);
1242
1243         /* disable rte interrupt */
1244         ret = rte_intr_disable(&pci_dev->intr_handle);
1245         if (ret)
1246                 PMD_DRV_LOG(ERR, "Disable intr failed: %d", ret);
1247
1248         do {
1249                 ret =
1250                 rte_intr_callback_unregister(&pci_dev->intr_handle,
1251                                              hinic_dev_interrupt_handler, dev);
1252                 if (ret >= 0) {
1253                         break;
1254                 } else if (ret == -EAGAIN) {
1255                         rte_delay_ms(100);
1256                         retries++;
1257                 } else {
1258                         PMD_DRV_LOG(ERR, "intr callback unregister failed: %d",
1259                                     ret);
1260                         break;
1261                 }
1262         } while (retries < HINIC_INTR_CB_UNREG_MAX_RETRIES);
1263
1264         if (retries == HINIC_INTR_CB_UNREG_MAX_RETRIES)
1265                 PMD_DRV_LOG(ERR, "Unregister intr callback failed after %d retries",
1266                             retries);
1267 }
1268
1269 static int hinic_set_dev_promiscuous(struct hinic_nic_dev *nic_dev, bool enable)
1270 {
1271         u32 rx_mode_ctrl;
1272         int err;
1273
1274         err = hinic_mutex_lock(&nic_dev->rx_mode_mutex);
1275         if (err)
1276                 return err;
1277
1278         rx_mode_ctrl = nic_dev->rx_mode_status;
1279
1280         if (enable)
1281                 rx_mode_ctrl |= HINIC_RX_MODE_PROMISC;
1282         else
1283                 rx_mode_ctrl &= (~HINIC_RX_MODE_PROMISC);
1284
1285         err = hinic_config_rx_mode(nic_dev, rx_mode_ctrl);
1286
1287         (void)hinic_mutex_unlock(&nic_dev->rx_mode_mutex);
1288
1289         return err;
1290 }
1291
1292 /**
1293  * DPDK callback to get device statistics.
1294  *
1295  * @param dev
1296  *   Pointer to Ethernet device structure.
1297  * @param stats
1298  *   Stats structure output buffer.
1299  *
1300  * @return
1301  *   0 on success and stats is filled,
1302  *   negative error value otherwise.
1303  */
1304 static int
1305 hinic_dev_stats_get(struct rte_eth_dev *dev, struct rte_eth_stats *stats)
1306 {
1307         int i, err, q_num;
1308         u64 rx_discards_pmd = 0;
1309         struct hinic_nic_dev *nic_dev = HINIC_ETH_DEV_TO_PRIVATE_NIC_DEV(dev);
1310         struct hinic_vport_stats vport_stats;
1311         struct hinic_rxq        *rxq = NULL;
1312         struct hinic_rxq_stats rxq_stats;
1313         struct hinic_txq        *txq = NULL;
1314         struct hinic_txq_stats txq_stats;
1315
1316         err = hinic_get_vport_stats(nic_dev->hwdev, &vport_stats);
1317         if (err) {
1318                 PMD_DRV_LOG(ERR, "Get vport stats from fw failed, nic_dev: %s",
1319                         nic_dev->proc_dev_name);
1320                 return err;
1321         }
1322
1323         dev->data->rx_mbuf_alloc_failed = 0;
1324
1325         /* rx queue stats */
1326         q_num = (nic_dev->num_rq < RTE_ETHDEV_QUEUE_STAT_CNTRS) ?
1327                         nic_dev->num_rq : RTE_ETHDEV_QUEUE_STAT_CNTRS;
1328         for (i = 0; i < q_num; i++) {
1329                 rxq = nic_dev->rxqs[i];
1330                 hinic_rxq_get_stats(rxq, &rxq_stats);
1331                 stats->q_ipackets[i] = rxq_stats.packets;
1332                 stats->q_ibytes[i] = rxq_stats.bytes;
1333                 stats->q_errors[i] = rxq_stats.rx_discards;
1334
1335                 stats->ierrors += rxq_stats.errors;
1336                 rx_discards_pmd += rxq_stats.rx_discards;
1337                 dev->data->rx_mbuf_alloc_failed += rxq_stats.rx_nombuf;
1338         }
1339
1340         /* tx queue stats */
1341         q_num = (nic_dev->num_sq < RTE_ETHDEV_QUEUE_STAT_CNTRS) ?
1342                 nic_dev->num_sq : RTE_ETHDEV_QUEUE_STAT_CNTRS;
1343         for (i = 0; i < q_num; i++) {
1344                 txq = nic_dev->txqs[i];
1345                 hinic_txq_get_stats(txq, &txq_stats);
1346                 stats->q_opackets[i] = txq_stats.packets;
1347                 stats->q_obytes[i] = txq_stats.bytes;
1348                 stats->oerrors += (txq_stats.tx_busy + txq_stats.off_errs);
1349         }
1350
1351         /* vport stats */
1352         stats->oerrors += vport_stats.tx_discard_vport;
1353
1354         stats->imissed = vport_stats.rx_discard_vport + rx_discards_pmd;
1355
1356         stats->ipackets = (vport_stats.rx_unicast_pkts_vport +
1357                         vport_stats.rx_multicast_pkts_vport +
1358                         vport_stats.rx_broadcast_pkts_vport -
1359                         rx_discards_pmd);
1360
1361         stats->opackets = (vport_stats.tx_unicast_pkts_vport +
1362                         vport_stats.tx_multicast_pkts_vport +
1363                         vport_stats.tx_broadcast_pkts_vport);
1364
1365         stats->ibytes = (vport_stats.rx_unicast_bytes_vport +
1366                         vport_stats.rx_multicast_bytes_vport +
1367                         vport_stats.rx_broadcast_bytes_vport);
1368
1369         stats->obytes = (vport_stats.tx_unicast_bytes_vport +
1370                         vport_stats.tx_multicast_bytes_vport +
1371                         vport_stats.tx_broadcast_bytes_vport);
1372         return 0;
1373 }
1374
1375 /**
1376  * DPDK callback to clear device statistics.
1377  *
1378  * @param dev
1379  *   Pointer to Ethernet device structure.
1380  */
1381 static int hinic_dev_stats_reset(struct rte_eth_dev *dev)
1382 {
1383         int qid;
1384         struct hinic_rxq        *rxq = NULL;
1385         struct hinic_txq        *txq = NULL;
1386         struct hinic_nic_dev *nic_dev = HINIC_ETH_DEV_TO_PRIVATE_NIC_DEV(dev);
1387         int ret;
1388
1389         ret = hinic_clear_vport_stats(nic_dev->hwdev);
1390         if (ret != 0)
1391                 return ret;
1392
1393         for (qid = 0; qid < nic_dev->num_rq; qid++) {
1394                 rxq = nic_dev->rxqs[qid];
1395                 hinic_rxq_stats_reset(rxq);
1396         }
1397
1398         for (qid = 0; qid < nic_dev->num_sq; qid++) {
1399                 txq = nic_dev->txqs[qid];
1400                 hinic_txq_stats_reset(txq);
1401         }
1402
1403         return 0;
1404 }
1405
1406 /**
1407  * DPDK callback to clear device extended statistics.
1408  *
1409  * @param dev
1410  *   Pointer to Ethernet device structure.
1411  */
1412 static int hinic_dev_xstats_reset(struct rte_eth_dev *dev)
1413 {
1414         struct hinic_nic_dev *nic_dev = HINIC_ETH_DEV_TO_PRIVATE_NIC_DEV(dev);
1415         int ret;
1416
1417         ret = hinic_dev_stats_reset(dev);
1418         if (ret != 0)
1419                 return ret;
1420
1421         if (hinic_func_type(nic_dev->hwdev) != TYPE_VF) {
1422                 ret = hinic_clear_phy_port_stats(nic_dev->hwdev);
1423                 if (ret != 0)
1424                         return ret;
1425         }
1426
1427         return 0;
1428 }
1429
1430 static void hinic_gen_random_mac_addr(struct rte_ether_addr *mac_addr)
1431 {
1432         uint64_t random_value;
1433
1434         /* Set Organizationally Unique Identifier (OUI) prefix */
1435         mac_addr->addr_bytes[0] = 0x00;
1436         mac_addr->addr_bytes[1] = 0x09;
1437         mac_addr->addr_bytes[2] = 0xC0;
1438         /* Force indication of locally assigned MAC address. */
1439         mac_addr->addr_bytes[0] |= RTE_ETHER_LOCAL_ADMIN_ADDR;
1440         /* Generate the last 3 bytes of the MAC address with a random number. */
1441         random_value = rte_rand();
1442         memcpy(&mac_addr->addr_bytes[3], &random_value, 3);
1443 }
1444
1445 /**
1446  * Init mac_vlan table in NIC.
1447  *
1448  * @param dev
1449  *   Pointer to Ethernet device structure.
1450  *
1451  * @return
1452  *   0 on success and stats is filled,
1453  *   negative error value otherwise.
1454  */
1455 static int hinic_init_mac_addr(struct rte_eth_dev *eth_dev)
1456 {
1457         struct hinic_nic_dev *nic_dev =
1458                                 HINIC_ETH_DEV_TO_PRIVATE_NIC_DEV(eth_dev);
1459         uint8_t addr_bytes[RTE_ETHER_ADDR_LEN];
1460         u16 func_id = 0;
1461         int rc = 0;
1462
1463         rc = hinic_get_default_mac(nic_dev->hwdev, addr_bytes);
1464         if (rc)
1465                 return rc;
1466
1467         rte_ether_addr_copy((struct rte_ether_addr *)addr_bytes,
1468                 &eth_dev->data->mac_addrs[0]);
1469         if (rte_is_zero_ether_addr(&eth_dev->data->mac_addrs[0]))
1470                 hinic_gen_random_mac_addr(&eth_dev->data->mac_addrs[0]);
1471
1472         func_id = hinic_global_func_id(nic_dev->hwdev);
1473         rc = hinic_set_mac(nic_dev->hwdev,
1474                         eth_dev->data->mac_addrs[0].addr_bytes,
1475                         0, func_id);
1476         if (rc && rc != HINIC_PF_SET_VF_ALREADY)
1477                 return rc;
1478
1479         rte_ether_addr_copy(&eth_dev->data->mac_addrs[0],
1480                         &nic_dev->default_addr);
1481
1482         return 0;
1483 }
1484
1485 static void hinic_delete_mc_addr_list(struct hinic_nic_dev *nic_dev)
1486 {
1487         u16 func_id;
1488         u32 i;
1489
1490         func_id = hinic_global_func_id(nic_dev->hwdev);
1491
1492         for (i = 0; i < HINIC_MAX_MC_MAC_ADDRS; i++) {
1493                 if (rte_is_zero_ether_addr(&nic_dev->mc_list[i]))
1494                         break;
1495
1496                 hinic_del_mac(nic_dev->hwdev, nic_dev->mc_list[i].addr_bytes,
1497                               0, func_id);
1498                 memset(&nic_dev->mc_list[i], 0, sizeof(struct rte_ether_addr));
1499         }
1500 }
1501
1502 /**
1503  * Deinit mac_vlan table in NIC.
1504  *
1505  * @param dev
1506  *   Pointer to Ethernet device structure.
1507  *
1508  * @return
1509  *   0 on success and stats is filled,
1510  *   negative error value otherwise.
1511  */
1512 static void hinic_deinit_mac_addr(struct rte_eth_dev *eth_dev)
1513 {
1514         struct hinic_nic_dev *nic_dev =
1515                                 HINIC_ETH_DEV_TO_PRIVATE_NIC_DEV(eth_dev);
1516         u16 func_id = 0;
1517         int rc;
1518         int i;
1519
1520         func_id = hinic_global_func_id(nic_dev->hwdev);
1521
1522         for (i = 0; i < HINIC_MAX_UC_MAC_ADDRS; i++) {
1523                 if (rte_is_zero_ether_addr(&eth_dev->data->mac_addrs[i]))
1524                         continue;
1525
1526                 rc = hinic_del_mac(nic_dev->hwdev,
1527                                    eth_dev->data->mac_addrs[i].addr_bytes,
1528                                    0, func_id);
1529                 if (rc && rc != HINIC_PF_SET_VF_ALREADY)
1530                         PMD_DRV_LOG(ERR, "Delete mac table failed, dev_name: %s",
1531                                     eth_dev->data->name);
1532
1533                 memset(&eth_dev->data->mac_addrs[i], 0,
1534                        sizeof(struct rte_ether_addr));
1535         }
1536
1537         /* delete multicast mac addrs */
1538         hinic_delete_mc_addr_list(nic_dev);
1539 }
1540
1541 static int hinic_dev_set_mtu(struct rte_eth_dev *dev, uint16_t mtu)
1542 {
1543         struct hinic_nic_dev *nic_dev = HINIC_ETH_DEV_TO_PRIVATE_NIC_DEV(dev);
1544         uint32_t frame_size;
1545         int ret = 0;
1546
1547         PMD_DRV_LOG(INFO, "Set port mtu, port_id: %d, mtu: %d, max_pkt_len: %d",
1548                         dev->data->port_id, mtu, HINIC_MTU_TO_PKTLEN(mtu));
1549
1550         if (mtu < HINIC_MIN_MTU_SIZE || mtu > HINIC_MAX_MTU_SIZE) {
1551                 PMD_DRV_LOG(ERR, "Invalid mtu: %d, must between %d and %d",
1552                                 mtu, HINIC_MIN_MTU_SIZE, HINIC_MAX_MTU_SIZE);
1553                 return -EINVAL;
1554         }
1555
1556         ret = hinic_set_port_mtu(nic_dev->hwdev, mtu);
1557         if (ret) {
1558                 PMD_DRV_LOG(ERR, "Set port mtu failed, ret: %d", ret);
1559                 return ret;
1560         }
1561
1562         /* update max frame size */
1563         frame_size = HINIC_MTU_TO_PKTLEN(mtu);
1564         if (frame_size > RTE_ETHER_MAX_LEN)
1565                 dev->data->dev_conf.rxmode.offloads |=
1566                         DEV_RX_OFFLOAD_JUMBO_FRAME;
1567         else
1568                 dev->data->dev_conf.rxmode.offloads &=
1569                         ~DEV_RX_OFFLOAD_JUMBO_FRAME;
1570
1571         dev->data->dev_conf.rxmode.max_rx_pkt_len = frame_size;
1572         nic_dev->mtu_size = mtu;
1573
1574         return ret;
1575 }
1576
1577 static void hinic_store_vlan_filter(struct hinic_nic_dev *nic_dev,
1578                                         u16 vlan_id, bool on)
1579 {
1580         u32 vid_idx, vid_bit;
1581
1582         vid_idx = HINIC_VFTA_IDX(vlan_id);
1583         vid_bit = HINIC_VFTA_BIT(vlan_id);
1584
1585         if (on)
1586                 nic_dev->vfta[vid_idx] |= vid_bit;
1587         else
1588                 nic_dev->vfta[vid_idx] &= ~vid_bit;
1589 }
1590
1591 static bool hinic_find_vlan_filter(struct hinic_nic_dev *nic_dev,
1592                                 uint16_t vlan_id)
1593 {
1594         u32 vid_idx, vid_bit;
1595
1596         vid_idx = HINIC_VFTA_IDX(vlan_id);
1597         vid_bit = HINIC_VFTA_BIT(vlan_id);
1598
1599         return (nic_dev->vfta[vid_idx] & vid_bit) ? TRUE : FALSE;
1600 }
1601
1602 /**
1603  * DPDK callback to set vlan filter.
1604  *
1605  * @param dev
1606  *   Pointer to Ethernet device structure.
1607  * @param vlan_id
1608  *   vlan id is used to filter vlan packets
1609  * @param enable
1610  *   enable disable or enable vlan filter function
1611  */
1612 static int hinic_vlan_filter_set(struct rte_eth_dev *dev,
1613                                 uint16_t vlan_id, int enable)
1614 {
1615         struct hinic_nic_dev *nic_dev = HINIC_ETH_DEV_TO_PRIVATE_NIC_DEV(dev);
1616         int err = 0;
1617         u16 func_id;
1618
1619         if (vlan_id > RTE_ETHER_MAX_VLAN_ID)
1620                 return -EINVAL;
1621
1622         func_id = hinic_global_func_id(nic_dev->hwdev);
1623
1624         if (enable) {
1625                 /* If vlanid is already set, just return */
1626                 if (hinic_find_vlan_filter(nic_dev, vlan_id)) {
1627                         PMD_DRV_LOG(INFO, "Vlan %u has been added, device: %s",
1628                                   vlan_id, nic_dev->proc_dev_name);
1629                         return 0;
1630                 }
1631
1632                 err = hinic_add_remove_vlan(nic_dev->hwdev, vlan_id,
1633                                             func_id, TRUE);
1634         } else {
1635                 /* If vlanid can't be found, just return */
1636                 if (!hinic_find_vlan_filter(nic_dev, vlan_id)) {
1637                         PMD_DRV_LOG(INFO, "Vlan %u is not in the vlan filter list, device: %s",
1638                                   vlan_id, nic_dev->proc_dev_name);
1639                         return 0;
1640                 }
1641
1642                 err = hinic_add_remove_vlan(nic_dev->hwdev, vlan_id,
1643                                             func_id, FALSE);
1644         }
1645
1646         if (err) {
1647                 PMD_DRV_LOG(ERR, "%s vlan failed, func_id: %d, vlan_id: %d, err: %d",
1648                       enable ? "Add" : "Remove", func_id, vlan_id, err);
1649                 return err;
1650         }
1651
1652         hinic_store_vlan_filter(nic_dev, vlan_id, enable);
1653
1654         PMD_DRV_LOG(INFO, "%s vlan %u succeed, device: %s",
1655                   enable ? "Add" : "Remove", vlan_id, nic_dev->proc_dev_name);
1656         return 0;
1657 }
1658
1659 /**
1660  * DPDK callback to enable or disable vlan offload.
1661  *
1662  * @param dev
1663  *   Pointer to Ethernet device structure.
1664  * @param mask
1665  *   Definitions used for VLAN setting
1666  */
1667 static int hinic_vlan_offload_set(struct rte_eth_dev *dev, int mask)
1668 {
1669         struct hinic_nic_dev *nic_dev = HINIC_ETH_DEV_TO_PRIVATE_NIC_DEV(dev);
1670         struct rte_eth_rxmode *rxmode = &dev->data->dev_conf.rxmode;
1671         bool on;
1672         int err;
1673
1674         /* Enable or disable VLAN filter */
1675         if (mask & ETH_VLAN_FILTER_MASK) {
1676                 on = (rxmode->offloads & DEV_RX_OFFLOAD_VLAN_FILTER) ?
1677                         TRUE : FALSE;
1678                 err = hinic_config_vlan_filter(nic_dev->hwdev, on);
1679                 if (err == HINIC_MGMT_CMD_UNSUPPORTED) {
1680                         PMD_DRV_LOG(WARNING,
1681                                 "Current matching version does not support vlan filter configuration, device: %s, port_id: %d",
1682                                   nic_dev->proc_dev_name, dev->data->port_id);
1683                 } else if (err) {
1684                         PMD_DRV_LOG(ERR, "Failed to %s vlan filter, device: %s, port_id: %d, err: %d",
1685                                   on ? "enable" : "disable",
1686                                   nic_dev->proc_dev_name,
1687                                   dev->data->port_id, err);
1688                         return err;
1689                 }
1690
1691                 PMD_DRV_LOG(INFO, "%s vlan filter succeed, device: %s, port_id: %d",
1692                           on ? "Enable" : "Disable",
1693                           nic_dev->proc_dev_name, dev->data->port_id);
1694         }
1695
1696         /* Enable or disable VLAN stripping */
1697         if (mask & ETH_VLAN_STRIP_MASK) {
1698                 on = (rxmode->offloads & DEV_RX_OFFLOAD_VLAN_STRIP) ?
1699                         TRUE : FALSE;
1700                 err = hinic_set_rx_vlan_offload(nic_dev->hwdev, on);
1701                 if (err) {
1702                         PMD_DRV_LOG(ERR, "Failed to %s vlan strip, device: %s, port_id: %d, err: %d",
1703                                   on ? "enable" : "disable",
1704                                   nic_dev->proc_dev_name,
1705                                   dev->data->port_id, err);
1706                         return err;
1707                 }
1708
1709                 PMD_DRV_LOG(INFO, "%s vlan strip succeed, device: %s, port_id: %d",
1710                           on ? "Enable" : "Disable",
1711                           nic_dev->proc_dev_name, dev->data->port_id);
1712         }
1713
1714         return 0;
1715 }
1716
1717 static void hinic_remove_all_vlanid(struct rte_eth_dev *eth_dev)
1718 {
1719         struct hinic_nic_dev *nic_dev =
1720                 HINIC_ETH_DEV_TO_PRIVATE_NIC_DEV(eth_dev);
1721         u16 func_id;
1722         int i;
1723
1724         func_id = hinic_global_func_id(nic_dev->hwdev);
1725         for (i = 0; i <= RTE_ETHER_MAX_VLAN_ID; i++) {
1726                 /* If can't find it, continue */
1727                 if (!hinic_find_vlan_filter(nic_dev, i))
1728                         continue;
1729
1730                 (void)hinic_add_remove_vlan(nic_dev->hwdev, i, func_id, FALSE);
1731                 hinic_store_vlan_filter(nic_dev, i, false);
1732         }
1733 }
1734
1735 static int hinic_set_dev_allmulticast(struct hinic_nic_dev *nic_dev,
1736                                 bool enable)
1737 {
1738         u32 rx_mode_ctrl;
1739         int err;
1740
1741         err = hinic_mutex_lock(&nic_dev->rx_mode_mutex);
1742         if (err)
1743                 return err;
1744
1745         rx_mode_ctrl = nic_dev->rx_mode_status;
1746
1747         if (enable)
1748                 rx_mode_ctrl |= HINIC_RX_MODE_MC_ALL;
1749         else
1750                 rx_mode_ctrl &= (~HINIC_RX_MODE_MC_ALL);
1751
1752         err = hinic_config_rx_mode(nic_dev, rx_mode_ctrl);
1753
1754         (void)hinic_mutex_unlock(&nic_dev->rx_mode_mutex);
1755
1756         return err;
1757 }
1758
1759 /**
1760  * DPDK callback to enable allmulticast mode.
1761  *
1762  * @param dev
1763  *   Pointer to Ethernet device structure.
1764  *
1765  * @return
1766  *   0 on success,
1767  *   negative error value otherwise.
1768  */
1769 static int hinic_dev_allmulticast_enable(struct rte_eth_dev *dev)
1770 {
1771         int ret = HINIC_OK;
1772         struct hinic_nic_dev *nic_dev = HINIC_ETH_DEV_TO_PRIVATE_NIC_DEV(dev);
1773
1774         ret = hinic_set_dev_allmulticast(nic_dev, true);
1775         if (ret) {
1776                 PMD_DRV_LOG(ERR, "Enable allmulticast failed, error: %d", ret);
1777                 return ret;
1778         }
1779
1780         PMD_DRV_LOG(INFO, "Enable allmulticast succeed, nic_dev: %s, port_id: %d",
1781                 nic_dev->proc_dev_name, dev->data->port_id);
1782         return 0;
1783 }
1784
1785 /**
1786  * DPDK callback to disable allmulticast mode.
1787  *
1788  * @param dev
1789  *   Pointer to Ethernet device structure.
1790  *
1791  * @return
1792  *   0 on success,
1793  *   negative error value otherwise.
1794  */
1795 static int hinic_dev_allmulticast_disable(struct rte_eth_dev *dev)
1796 {
1797         int ret = HINIC_OK;
1798         struct hinic_nic_dev *nic_dev = HINIC_ETH_DEV_TO_PRIVATE_NIC_DEV(dev);
1799
1800         ret = hinic_set_dev_allmulticast(nic_dev, false);
1801         if (ret) {
1802                 PMD_DRV_LOG(ERR, "Disable allmulticast failed, error: %d", ret);
1803                 return ret;
1804         }
1805
1806         PMD_DRV_LOG(INFO, "Disable allmulticast succeed, nic_dev: %s, port_id: %d",
1807                 nic_dev->proc_dev_name, dev->data->port_id);
1808         return 0;
1809 }
1810
1811 /**
1812  * DPDK callback to enable promiscuous mode.
1813  *
1814  * @param dev
1815  *   Pointer to Ethernet device structure.
1816  *
1817  * @return
1818  *   0 on success,
1819  *   negative error value otherwise.
1820  */
1821 static int hinic_dev_promiscuous_enable(struct rte_eth_dev *dev)
1822 {
1823         int rc = HINIC_OK;
1824         struct hinic_nic_dev *nic_dev = HINIC_ETH_DEV_TO_PRIVATE_NIC_DEV(dev);
1825
1826         PMD_DRV_LOG(INFO, "Enable promiscuous, nic_dev: %s, port_id: %d, promisc: %d",
1827                     nic_dev->proc_dev_name, dev->data->port_id,
1828                     dev->data->promiscuous);
1829
1830         rc = hinic_set_dev_promiscuous(nic_dev, true);
1831         if (rc)
1832                 PMD_DRV_LOG(ERR, "Enable promiscuous failed");
1833
1834         return rc;
1835 }
1836
1837 /**
1838  * DPDK callback to disable promiscuous mode.
1839  *
1840  * @param dev
1841  *   Pointer to Ethernet device structure.
1842  *
1843  * @return
1844  *   0 on success,
1845  *   negative error value otherwise.
1846  */
1847 static int hinic_dev_promiscuous_disable(struct rte_eth_dev *dev)
1848 {
1849         int rc = HINIC_OK;
1850         struct hinic_nic_dev *nic_dev = HINIC_ETH_DEV_TO_PRIVATE_NIC_DEV(dev);
1851
1852         PMD_DRV_LOG(INFO, "Disable promiscuous, nic_dev: %s, port_id: %d, promisc: %d",
1853                     nic_dev->proc_dev_name, dev->data->port_id,
1854                     dev->data->promiscuous);
1855
1856         rc = hinic_set_dev_promiscuous(nic_dev, false);
1857         if (rc)
1858                 PMD_DRV_LOG(ERR, "Disable promiscuous failed");
1859
1860         return rc;
1861 }
1862
1863 static int hinic_flow_ctrl_get(struct rte_eth_dev *dev,
1864                         struct rte_eth_fc_conf *fc_conf)
1865 {
1866         struct hinic_nic_dev *nic_dev = HINIC_ETH_DEV_TO_PRIVATE_NIC_DEV(dev);
1867         struct nic_pause_config nic_pause;
1868         int err;
1869
1870         memset(&nic_pause, 0, sizeof(nic_pause));
1871
1872         err = hinic_get_pause_info(nic_dev->hwdev, &nic_pause);
1873         if (err)
1874                 return err;
1875
1876         if (nic_dev->pause_set || !nic_pause.auto_neg) {
1877                 nic_pause.rx_pause = nic_dev->nic_pause.rx_pause;
1878                 nic_pause.tx_pause = nic_dev->nic_pause.tx_pause;
1879         }
1880
1881         fc_conf->autoneg = nic_pause.auto_neg;
1882
1883         if (nic_pause.tx_pause && nic_pause.rx_pause)
1884                 fc_conf->mode = RTE_FC_FULL;
1885         else if (nic_pause.tx_pause)
1886                 fc_conf->mode = RTE_FC_TX_PAUSE;
1887         else if (nic_pause.rx_pause)
1888                 fc_conf->mode = RTE_FC_RX_PAUSE;
1889         else
1890                 fc_conf->mode = RTE_FC_NONE;
1891
1892         return 0;
1893 }
1894
1895 static int hinic_flow_ctrl_set(struct rte_eth_dev *dev,
1896                         struct rte_eth_fc_conf *fc_conf)
1897 {
1898         struct hinic_nic_dev *nic_dev = HINIC_ETH_DEV_TO_PRIVATE_NIC_DEV(dev);
1899         struct nic_pause_config nic_pause;
1900         int err;
1901
1902         nic_pause.auto_neg = fc_conf->autoneg;
1903
1904         if (((fc_conf->mode & RTE_FC_FULL) == RTE_FC_FULL) ||
1905                 (fc_conf->mode & RTE_FC_TX_PAUSE))
1906                 nic_pause.tx_pause = true;
1907         else
1908                 nic_pause.tx_pause = false;
1909
1910         if (((fc_conf->mode & RTE_FC_FULL) == RTE_FC_FULL) ||
1911                 (fc_conf->mode & RTE_FC_RX_PAUSE))
1912                 nic_pause.rx_pause = true;
1913         else
1914                 nic_pause.rx_pause = false;
1915
1916         err = hinic_set_pause_config(nic_dev->hwdev, nic_pause);
1917         if (err)
1918                 return err;
1919
1920         nic_dev->pause_set = true;
1921         nic_dev->nic_pause.auto_neg = nic_pause.auto_neg;
1922         nic_dev->nic_pause.rx_pause = nic_pause.rx_pause;
1923         nic_dev->nic_pause.tx_pause = nic_pause.tx_pause;
1924
1925         PMD_DRV_LOG(INFO, "Set pause options, tx: %s, rx: %s, auto: %s\n",
1926                 nic_pause.tx_pause ? "on" : "off",
1927                 nic_pause.rx_pause ? "on" : "off",
1928                 nic_pause.auto_neg ? "on" : "off");
1929
1930         return 0;
1931 }
1932
1933 /**
1934  * DPDK callback to update the RSS hash key and RSS hash type.
1935  *
1936  * @param dev
1937  *   Pointer to Ethernet device structure.
1938  * @param rss_conf
1939  *   RSS configuration data.
1940  *
1941  * @return
1942  *   0 on success, negative error value otherwise.
1943  */
1944 static int hinic_rss_hash_update(struct rte_eth_dev *dev,
1945                           struct rte_eth_rss_conf *rss_conf)
1946 {
1947         struct hinic_nic_dev *nic_dev = HINIC_ETH_DEV_TO_PRIVATE_NIC_DEV(dev);
1948         u8 tmpl_idx = nic_dev->rss_tmpl_idx;
1949         u8 hashkey[HINIC_RSS_KEY_SIZE] = {0};
1950         u8 prio_tc[HINIC_DCB_UP_MAX] = {0};
1951         u64 rss_hf = rss_conf->rss_hf;
1952         struct nic_rss_type rss_type = {0};
1953         int err = 0;
1954
1955         if (!(nic_dev->flags & ETH_MQ_RX_RSS_FLAG)) {
1956                 PMD_DRV_LOG(WARNING, "RSS is not enabled");
1957                 return HINIC_OK;
1958         }
1959
1960         if (rss_conf->rss_key_len > HINIC_RSS_KEY_SIZE) {
1961                 PMD_DRV_LOG(ERR, "Invalid rss key, rss_key_len: %d",
1962                             rss_conf->rss_key_len);
1963                 return HINIC_ERROR;
1964         }
1965
1966         if (rss_conf->rss_key) {
1967                 memcpy(hashkey, rss_conf->rss_key, rss_conf->rss_key_len);
1968                 err = hinic_rss_set_template_tbl(nic_dev->hwdev, tmpl_idx,
1969                                                  hashkey);
1970                 if (err) {
1971                         PMD_DRV_LOG(ERR, "Set rss template table failed");
1972                         goto disable_rss;
1973                 }
1974         }
1975
1976         rss_type.ipv4 = (rss_hf & (ETH_RSS_IPV4 | ETH_RSS_FRAG_IPV4)) ? 1 : 0;
1977         rss_type.tcp_ipv4 = (rss_hf & ETH_RSS_NONFRAG_IPV4_TCP) ? 1 : 0;
1978         rss_type.ipv6 = (rss_hf & (ETH_RSS_IPV6 | ETH_RSS_FRAG_IPV6)) ? 1 : 0;
1979         rss_type.ipv6_ext = (rss_hf & ETH_RSS_IPV6_EX) ? 1 : 0;
1980         rss_type.tcp_ipv6 = (rss_hf & ETH_RSS_NONFRAG_IPV6_TCP) ? 1 : 0;
1981         rss_type.tcp_ipv6_ext = (rss_hf & ETH_RSS_IPV6_TCP_EX) ? 1 : 0;
1982         rss_type.udp_ipv4 = (rss_hf & ETH_RSS_NONFRAG_IPV4_UDP) ? 1 : 0;
1983         rss_type.udp_ipv6 = (rss_hf & ETH_RSS_NONFRAG_IPV6_UDP) ? 1 : 0;
1984
1985         err = hinic_set_rss_type(nic_dev->hwdev, tmpl_idx, rss_type);
1986         if (err) {
1987                 PMD_DRV_LOG(ERR, "Set rss type table failed");
1988                 goto disable_rss;
1989         }
1990
1991         return 0;
1992
1993 disable_rss:
1994         memset(prio_tc, 0, sizeof(prio_tc));
1995         (void)hinic_rss_cfg(nic_dev->hwdev, 0, tmpl_idx, 0, prio_tc);
1996         return err;
1997 }
1998
1999 /**
2000  * DPDK callback to get the RSS hash configuration.
2001  *
2002  * @param dev
2003  *   Pointer to Ethernet device structure.
2004  * @param rss_conf
2005  *   RSS configuration data.
2006  *
2007  * @return
2008  *   0 on success, negative error value otherwise.
2009  */
2010 static int hinic_rss_conf_get(struct rte_eth_dev *dev,
2011                        struct rte_eth_rss_conf *rss_conf)
2012 {
2013         struct hinic_nic_dev *nic_dev = HINIC_ETH_DEV_TO_PRIVATE_NIC_DEV(dev);
2014         u8 tmpl_idx = nic_dev->rss_tmpl_idx;
2015         u8 hashkey[HINIC_RSS_KEY_SIZE] = {0};
2016         struct nic_rss_type rss_type = {0};
2017         int err;
2018
2019         if (!(nic_dev->flags & ETH_MQ_RX_RSS_FLAG)) {
2020                 PMD_DRV_LOG(WARNING, "RSS is not enabled");
2021                 return HINIC_ERROR;
2022         }
2023
2024         err = hinic_rss_get_template_tbl(nic_dev->hwdev, tmpl_idx, hashkey);
2025         if (err)
2026                 return err;
2027
2028         if (rss_conf->rss_key &&
2029             rss_conf->rss_key_len >= HINIC_RSS_KEY_SIZE) {
2030                 memcpy(rss_conf->rss_key, hashkey, sizeof(hashkey));
2031                 rss_conf->rss_key_len = sizeof(hashkey);
2032         }
2033
2034         err = hinic_get_rss_type(nic_dev->hwdev, tmpl_idx, &rss_type);
2035         if (err)
2036                 return err;
2037
2038         rss_conf->rss_hf = 0;
2039         rss_conf->rss_hf |=  rss_type.ipv4 ?
2040                 (ETH_RSS_IPV4 | ETH_RSS_FRAG_IPV4) : 0;
2041         rss_conf->rss_hf |=  rss_type.tcp_ipv4 ? ETH_RSS_NONFRAG_IPV4_TCP : 0;
2042         rss_conf->rss_hf |=  rss_type.ipv6 ?
2043                 (ETH_RSS_IPV6 | ETH_RSS_FRAG_IPV6) : 0;
2044         rss_conf->rss_hf |=  rss_type.ipv6_ext ? ETH_RSS_IPV6_EX : 0;
2045         rss_conf->rss_hf |=  rss_type.tcp_ipv6 ? ETH_RSS_NONFRAG_IPV6_TCP : 0;
2046         rss_conf->rss_hf |=  rss_type.tcp_ipv6_ext ? ETH_RSS_IPV6_TCP_EX : 0;
2047         rss_conf->rss_hf |=  rss_type.udp_ipv4 ? ETH_RSS_NONFRAG_IPV4_UDP : 0;
2048         rss_conf->rss_hf |=  rss_type.udp_ipv6 ? ETH_RSS_NONFRAG_IPV6_UDP : 0;
2049
2050         return HINIC_OK;
2051 }
2052
2053 /**
2054  * DPDK callback to update the RSS redirection table.
2055  *
2056  * @param dev
2057  *   Pointer to Ethernet device structure.
2058  * @param reta_conf
2059  *   Pointer to RSS reta configuration data.
2060  * @param reta_size
2061  *   Size of the RETA table.
2062  *
2063  * @return
2064  *   0 on success, negative error value otherwise.
2065  */
2066 static int hinic_rss_indirtbl_update(struct rte_eth_dev *dev,
2067                               struct rte_eth_rss_reta_entry64 *reta_conf,
2068                               uint16_t reta_size)
2069 {
2070         struct hinic_nic_dev *nic_dev = HINIC_ETH_DEV_TO_PRIVATE_NIC_DEV(dev);
2071         u8 tmpl_idx = nic_dev->rss_tmpl_idx;
2072         u8 prio_tc[HINIC_DCB_UP_MAX] = {0};
2073         u32 indirtbl[NIC_RSS_INDIR_SIZE] = {0};
2074         int err = 0;
2075         u16 i = 0;
2076         u16 idx, shift;
2077
2078         if (!(nic_dev->flags & ETH_MQ_RX_RSS_FLAG))
2079                 return HINIC_OK;
2080
2081         if (reta_size != NIC_RSS_INDIR_SIZE) {
2082                 PMD_DRV_LOG(ERR, "Invalid reta size, reta_size: %d", reta_size);
2083                 return HINIC_ERROR;
2084         }
2085
2086         err = hinic_rss_get_indir_tbl(nic_dev->hwdev, tmpl_idx, indirtbl);
2087         if (err)
2088                 return err;
2089
2090         /* update rss indir_tbl */
2091         for (i = 0; i < reta_size; i++) {
2092                 idx = i / RTE_RETA_GROUP_SIZE;
2093                 shift = i % RTE_RETA_GROUP_SIZE;
2094
2095                 if (reta_conf[idx].reta[shift] >= nic_dev->num_rq) {
2096                         PMD_DRV_LOG(ERR, "Invalid reta entry, indirtbl[%d]: %d "
2097                                 "exceeds the maximum rxq num: %d", i,
2098                                 reta_conf[idx].reta[shift], nic_dev->num_rq);
2099                         return -EINVAL;
2100                 }
2101
2102                 if (reta_conf[idx].mask & (1ULL << shift))
2103                         indirtbl[i] = reta_conf[idx].reta[shift];
2104         }
2105
2106         err = hinic_rss_set_indir_tbl(nic_dev->hwdev, tmpl_idx, indirtbl);
2107         if (err)
2108                 goto disable_rss;
2109
2110         nic_dev->rss_indir_flag = true;
2111
2112         return 0;
2113
2114 disable_rss:
2115         memset(prio_tc, 0, sizeof(prio_tc));
2116         (void)hinic_rss_cfg(nic_dev->hwdev, 0, tmpl_idx, 0, prio_tc);
2117
2118         return HINIC_ERROR;
2119 }
2120
2121 /**
2122  * DPDK callback to get the RSS indirection table.
2123  *
2124  * @param dev
2125  *   Pointer to Ethernet device structure.
2126  * @param reta_conf
2127  *   Pointer to RSS reta configuration data.
2128  * @param reta_size
2129  *   Size of the RETA table.
2130  *
2131  * @return
2132  *   0 on success, negative error value otherwise.
2133  */
2134 static int hinic_rss_indirtbl_query(struct rte_eth_dev *dev,
2135                              struct rte_eth_rss_reta_entry64 *reta_conf,
2136                              uint16_t reta_size)
2137 {
2138         struct hinic_nic_dev *nic_dev = HINIC_ETH_DEV_TO_PRIVATE_NIC_DEV(dev);
2139         u8 tmpl_idx = nic_dev->rss_tmpl_idx;
2140         int err = 0;
2141         u32 indirtbl[NIC_RSS_INDIR_SIZE] = {0};
2142         u16 idx, shift;
2143         u16 i = 0;
2144
2145         if (reta_size != NIC_RSS_INDIR_SIZE) {
2146                 PMD_DRV_LOG(ERR, "Invalid reta size, reta_size: %d", reta_size);
2147                 return HINIC_ERROR;
2148         }
2149
2150         err = hinic_rss_get_indir_tbl(nic_dev->hwdev, tmpl_idx, indirtbl);
2151         if (err) {
2152                 PMD_DRV_LOG(ERR, "Get rss indirect table failed, error: %d",
2153                             err);
2154                 return err;
2155         }
2156
2157         for (i = 0; i < reta_size; i++) {
2158                 idx = i / RTE_RETA_GROUP_SIZE;
2159                 shift = i % RTE_RETA_GROUP_SIZE;
2160                 if (reta_conf[idx].mask & (1ULL << shift))
2161                         reta_conf[idx].reta[shift] = (uint16_t)indirtbl[i];
2162         }
2163
2164         return HINIC_OK;
2165 }
2166
2167 /**
2168  * DPDK callback to get extended device statistics.
2169  *
2170  * @param dev
2171  *   Pointer to Ethernet device.
2172  * @param xstats
2173  *   Pointer to rte extended stats table.
2174  * @param n
2175  *   The size of the stats table.
2176  *
2177  * @return
2178  *   Number of extended stats on success and stats is filled,
2179  *   negative error value otherwise.
2180  */
2181 static int hinic_dev_xstats_get(struct rte_eth_dev *dev,
2182                          struct rte_eth_xstat *xstats,
2183                          unsigned int n)
2184 {
2185         u16 qid = 0;
2186         u32 i;
2187         int err, count;
2188         struct hinic_nic_dev *nic_dev;
2189         struct hinic_phy_port_stats port_stats;
2190         struct hinic_vport_stats vport_stats;
2191         struct hinic_rxq        *rxq = NULL;
2192         struct hinic_rxq_stats rxq_stats;
2193         struct hinic_txq        *txq = NULL;
2194         struct hinic_txq_stats txq_stats;
2195
2196         nic_dev = HINIC_ETH_DEV_TO_PRIVATE_NIC_DEV(dev);
2197         count = hinic_xstats_calc_num(nic_dev);
2198         if ((int)n < count)
2199                 return count;
2200
2201         count = 0;
2202
2203         /* Get stats from hinic_rxq_stats */
2204         for (qid = 0; qid < nic_dev->num_rq; qid++) {
2205                 rxq = nic_dev->rxqs[qid];
2206                 hinic_rxq_get_stats(rxq, &rxq_stats);
2207
2208                 for (i = 0; i < HINIC_RXQ_XSTATS_NUM; i++) {
2209                         xstats[count].value =
2210                                 *(uint64_t *)(((char *)&rxq_stats) +
2211                                 hinic_rxq_stats_strings[i].offset);
2212                         xstats[count].id = count;
2213                         count++;
2214                 }
2215         }
2216
2217         /* Get stats from hinic_txq_stats */
2218         for (qid = 0; qid < nic_dev->num_sq; qid++) {
2219                 txq = nic_dev->txqs[qid];
2220                 hinic_txq_get_stats(txq, &txq_stats);
2221
2222                 for (i = 0; i < HINIC_TXQ_XSTATS_NUM; i++) {
2223                         xstats[count].value =
2224                                 *(uint64_t *)(((char *)&txq_stats) +
2225                                 hinic_txq_stats_strings[i].offset);
2226                         xstats[count].id = count;
2227                         count++;
2228                 }
2229         }
2230
2231         /* Get stats from hinic_vport_stats */
2232         err = hinic_get_vport_stats(nic_dev->hwdev, &vport_stats);
2233         if (err)
2234                 return err;
2235
2236         for (i = 0; i < HINIC_VPORT_XSTATS_NUM; i++) {
2237                 xstats[count].value =
2238                         *(uint64_t *)(((char *)&vport_stats) +
2239                         hinic_vport_stats_strings[i].offset);
2240                 xstats[count].id = count;
2241                 count++;
2242         }
2243
2244         if (HINIC_IS_VF(nic_dev->hwdev))
2245                 return count;
2246
2247         /* Get stats from hinic_phy_port_stats */
2248         err = hinic_get_phy_port_stats(nic_dev->hwdev, &port_stats);
2249         if (err)
2250                 return err;
2251
2252         for (i = 0; i < HINIC_PHYPORT_XSTATS_NUM; i++) {
2253                 xstats[count].value = *(uint64_t *)(((char *)&port_stats) +
2254                                 hinic_phyport_stats_strings[i].offset);
2255                 xstats[count].id = count;
2256                 count++;
2257         }
2258
2259         return count;
2260 }
2261
2262 static void hinic_rxq_info_get(struct rte_eth_dev *dev, uint16_t queue_id,
2263                                 struct rte_eth_rxq_info *qinfo)
2264 {
2265         struct hinic_rxq  *rxq = dev->data->rx_queues[queue_id];
2266
2267         qinfo->mp = rxq->mb_pool;
2268         qinfo->nb_desc = rxq->q_depth;
2269 }
2270
2271 static void hinic_txq_info_get(struct rte_eth_dev *dev, uint16_t queue_id,
2272                                 struct rte_eth_txq_info *qinfo)
2273 {
2274         struct hinic_txq  *txq = dev->data->tx_queues[queue_id];
2275
2276         qinfo->nb_desc = txq->q_depth;
2277 }
2278
2279 /**
2280  * DPDK callback to retrieve names of extended device statistics
2281  *
2282  * @param dev
2283  *   Pointer to Ethernet device structure.
2284  * @param xstats_names
2285  *   Buffer to insert names into.
2286  *
2287  * @return
2288  *   Number of xstats names.
2289  */
2290 static int hinic_dev_xstats_get_names(struct rte_eth_dev *dev,
2291                                struct rte_eth_xstat_name *xstats_names,
2292                                __rte_unused unsigned int limit)
2293 {
2294         struct hinic_nic_dev *nic_dev = HINIC_ETH_DEV_TO_PRIVATE_NIC_DEV(dev);
2295         int count = 0;
2296         u16 i = 0, q_num;
2297
2298         if (xstats_names == NULL)
2299                 return hinic_xstats_calc_num(nic_dev);
2300
2301         /* get pmd rxq stats */
2302         for (q_num = 0; q_num < nic_dev->num_rq; q_num++) {
2303                 for (i = 0; i < HINIC_RXQ_XSTATS_NUM; i++) {
2304                         snprintf(xstats_names[count].name,
2305                                  sizeof(xstats_names[count].name),
2306                                  "rxq%d_%s_pmd",
2307                                  q_num, hinic_rxq_stats_strings[i].name);
2308                         count++;
2309                 }
2310         }
2311
2312         /* get pmd txq stats */
2313         for (q_num = 0; q_num < nic_dev->num_sq; q_num++) {
2314                 for (i = 0; i < HINIC_TXQ_XSTATS_NUM; i++) {
2315                         snprintf(xstats_names[count].name,
2316                                  sizeof(xstats_names[count].name),
2317                                  "txq%d_%s_pmd",
2318                                  q_num, hinic_txq_stats_strings[i].name);
2319                         count++;
2320                 }
2321         }
2322
2323         /* get vport stats */
2324         for (i = 0; i < HINIC_VPORT_XSTATS_NUM; i++) {
2325                 snprintf(xstats_names[count].name,
2326                          sizeof(xstats_names[count].name),
2327                          "%s", hinic_vport_stats_strings[i].name);
2328                 count++;
2329         }
2330
2331         if (HINIC_IS_VF(nic_dev->hwdev))
2332                 return count;
2333
2334         /* get phy port stats */
2335         for (i = 0; i < HINIC_PHYPORT_XSTATS_NUM; i++) {
2336                 snprintf(xstats_names[count].name,
2337                          sizeof(xstats_names[count].name),
2338                          "%s", hinic_phyport_stats_strings[i].name);
2339                 count++;
2340         }
2341
2342         return count;
2343 }
2344
2345 /**
2346  *  DPDK callback to set mac address
2347  *
2348  * @param dev
2349  *   Pointer to Ethernet device structure.
2350  * @param addr
2351  *   Pointer to mac address
2352  * @return
2353  *   0 on success, negative error value otherwise.
2354  */
2355 static int hinic_set_mac_addr(struct rte_eth_dev *dev,
2356                               struct rte_ether_addr *addr)
2357 {
2358         struct hinic_nic_dev *nic_dev = HINIC_ETH_DEV_TO_PRIVATE_NIC_DEV(dev);
2359         u16 func_id;
2360         int err;
2361
2362         func_id = hinic_global_func_id(nic_dev->hwdev);
2363         err = hinic_update_mac(nic_dev->hwdev, nic_dev->default_addr.addr_bytes,
2364                                addr->addr_bytes, 0, func_id);
2365         if (err)
2366                 return err;
2367
2368         rte_ether_addr_copy(addr, &nic_dev->default_addr);
2369
2370         PMD_DRV_LOG(INFO, "Set new mac address %02x:%02x:%02x:%02x:%02x:%02x",
2371                     addr->addr_bytes[0], addr->addr_bytes[1],
2372                     addr->addr_bytes[2], addr->addr_bytes[3],
2373                     addr->addr_bytes[4], addr->addr_bytes[5]);
2374
2375         return 0;
2376 }
2377
2378 /**
2379  * DPDK callback to remove a MAC address.
2380  *
2381  * @param dev
2382  *   Pointer to Ethernet device structure.
2383  * @param index
2384  *   MAC address index, should less than 128.
2385  */
2386 static void hinic_mac_addr_remove(struct rte_eth_dev *dev, uint32_t index)
2387 {
2388         struct hinic_nic_dev *nic_dev = HINIC_ETH_DEV_TO_PRIVATE_NIC_DEV(dev);
2389         u16 func_id;
2390         int ret;
2391
2392         if (index >= HINIC_MAX_UC_MAC_ADDRS) {
2393                 PMD_DRV_LOG(INFO, "Remove mac index(%u) is out of range",
2394                             index);
2395                 return;
2396         }
2397
2398         func_id = hinic_global_func_id(nic_dev->hwdev);
2399         ret = hinic_del_mac(nic_dev->hwdev,
2400                             dev->data->mac_addrs[index].addr_bytes, 0, func_id);
2401         if (ret)
2402                 return;
2403
2404         memset(&dev->data->mac_addrs[index], 0, sizeof(struct rte_ether_addr));
2405 }
2406
2407 /**
2408  * DPDK callback to add a MAC address.
2409  *
2410  * @param dev
2411  *   Pointer to Ethernet device structure.
2412  * @param mac_addr
2413  *   Pointer to MAC address
2414  * @param index
2415  *   MAC address index, should less than 128.
2416  * @param vmdq
2417  *   VMDq pool index(not used).
2418  *
2419  * @return
2420  *   0 on success, negative error value otherwise.
2421  */
2422 static int hinic_mac_addr_add(struct rte_eth_dev *dev,
2423                               struct rte_ether_addr *mac_addr, uint32_t index,
2424                               __rte_unused uint32_t vmdq)
2425 {
2426         struct hinic_nic_dev  *nic_dev = HINIC_ETH_DEV_TO_PRIVATE_NIC_DEV(dev);
2427         unsigned int i;
2428         u16 func_id;
2429         int ret;
2430
2431         if (index >= HINIC_MAX_UC_MAC_ADDRS) {
2432                 PMD_DRV_LOG(INFO, "Add mac index(%u) is out of range", index);
2433                 return -EINVAL;
2434         }
2435
2436         /* First, make sure this address isn't already configured. */
2437         for (i = 0; (i != HINIC_MAX_UC_MAC_ADDRS); ++i) {
2438                 /* Skip this index, it's going to be reconfigured. */
2439                 if (i == index)
2440                         continue;
2441
2442                 if (memcmp(&dev->data->mac_addrs[i],
2443                         mac_addr, sizeof(*mac_addr)))
2444                         continue;
2445
2446                 PMD_DRV_LOG(INFO, "MAC address already configured");
2447                 return -EADDRINUSE;
2448         }
2449
2450         func_id = hinic_global_func_id(nic_dev->hwdev);
2451         ret = hinic_set_mac(nic_dev->hwdev, mac_addr->addr_bytes, 0, func_id);
2452         if (ret)
2453                 return ret;
2454
2455         dev->data->mac_addrs[index] = *mac_addr;
2456         return 0;
2457 }
2458
2459 /**
2460  *  DPDK callback to set multicast mac address
2461  *
2462  * @param dev
2463  *   Pointer to Ethernet device structure.
2464  * @param mc_addr_set
2465  *   Pointer to multicast mac address
2466  * @param nb_mc_addr
2467  *   mc addr count
2468  * @return
2469  *   0 on success, negative error value otherwise.
2470  */
2471 static int hinic_set_mc_addr_list(struct rte_eth_dev *dev,
2472                                   struct rte_ether_addr *mc_addr_set,
2473                                   uint32_t nb_mc_addr)
2474 {
2475         struct hinic_nic_dev *nic_dev = HINIC_ETH_DEV_TO_PRIVATE_NIC_DEV(dev);
2476         u16 func_id;
2477         int ret;
2478         u32 i;
2479
2480         func_id = hinic_global_func_id(nic_dev->hwdev);
2481
2482         /* delete old multi_cast addrs firstly */
2483         hinic_delete_mc_addr_list(nic_dev);
2484
2485         if (nb_mc_addr > HINIC_MAX_MC_MAC_ADDRS)
2486                 goto allmulti;
2487
2488         for (i = 0; i < nb_mc_addr; i++) {
2489                 ret = hinic_set_mac(nic_dev->hwdev, mc_addr_set[i].addr_bytes,
2490                                     0, func_id);
2491                 /* if add mc addr failed, set all multi_cast */
2492                 if (ret) {
2493                         hinic_delete_mc_addr_list(nic_dev);
2494                         goto allmulti;
2495                 }
2496
2497                 rte_ether_addr_copy(&mc_addr_set[i], &nic_dev->mc_list[i]);
2498         }
2499
2500         return 0;
2501
2502 allmulti:
2503         hinic_dev_allmulticast_enable(dev);
2504
2505         return 0;
2506 }
2507
2508 /**
2509  * DPDK callback to manage filter control operations
2510  *
2511  * @param dev
2512  *   Pointer to Ethernet device structure.
2513  * @param filter_type
2514  *   Filter type, which just supports generic type.
2515  * @param filter_op
2516  *   Filter operation to perform.
2517  * @param arg
2518  *   Pointer to operation-specific structure.
2519  *
2520  * @return
2521  *   0 on success, negative error value otherwise.
2522  */
2523 static int hinic_dev_filter_ctrl(struct rte_eth_dev *dev,
2524                      enum rte_filter_type filter_type,
2525                      enum rte_filter_op filter_op,
2526                      void *arg)
2527 {
2528         struct hinic_nic_dev *nic_dev = HINIC_ETH_DEV_TO_PRIVATE_NIC_DEV(dev);
2529         int func_id = hinic_global_func_id(nic_dev->hwdev);
2530
2531         switch (filter_type) {
2532         case RTE_ETH_FILTER_GENERIC:
2533                 if (filter_op != RTE_ETH_FILTER_GET)
2534                         return -EINVAL;
2535                 *(const void **)arg = &hinic_flow_ops;
2536                 break;
2537         default:
2538                 PMD_DRV_LOG(INFO, "Filter type (%d) not supported",
2539                         filter_type);
2540                 return -EINVAL;
2541         }
2542
2543         PMD_DRV_LOG(INFO, "Set filter_ctrl succeed, func_id: 0x%x, filter_type: 0x%x,"
2544                         "filter_op: 0x%x.", func_id, filter_type, filter_op);
2545         return 0;
2546 }
2547
2548 static int hinic_set_default_pause_feature(struct hinic_nic_dev *nic_dev)
2549 {
2550         struct nic_pause_config pause_config = {0};
2551         int err;
2552
2553         pause_config.auto_neg = 0;
2554         pause_config.rx_pause = HINIC_DEFAUT_PAUSE_CONFIG;
2555         pause_config.tx_pause = HINIC_DEFAUT_PAUSE_CONFIG;
2556
2557         err = hinic_set_pause_config(nic_dev->hwdev, pause_config);
2558         if (err)
2559                 return err;
2560
2561         nic_dev->pause_set = true;
2562         nic_dev->nic_pause.auto_neg = pause_config.auto_neg;
2563         nic_dev->nic_pause.rx_pause = pause_config.rx_pause;
2564         nic_dev->nic_pause.tx_pause = pause_config.tx_pause;
2565
2566         return 0;
2567 }
2568
2569 static int hinic_set_default_dcb_feature(struct hinic_nic_dev *nic_dev)
2570 {
2571         u8 up_tc[HINIC_DCB_UP_MAX] = {0};
2572         u8 up_pgid[HINIC_DCB_UP_MAX] = {0};
2573         u8 up_bw[HINIC_DCB_UP_MAX] = {0};
2574         u8 pg_bw[HINIC_DCB_UP_MAX] = {0};
2575         u8 up_strict[HINIC_DCB_UP_MAX] = {0};
2576         int i = 0;
2577
2578         pg_bw[0] = 100;
2579         for (i = 0; i < HINIC_DCB_UP_MAX; i++)
2580                 up_bw[i] = 100;
2581
2582         return hinic_dcb_set_ets(nic_dev->hwdev, up_tc, pg_bw,
2583                                         up_pgid, up_bw, up_strict);
2584 }
2585
2586 static int hinic_pf_get_default_cos(struct hinic_hwdev *hwdev, u8 *cos_id)
2587 {
2588         u8 default_cos = 0;
2589         u8 valid_cos_bitmap;
2590         u8 i;
2591
2592         valid_cos_bitmap = hwdev->cfg_mgmt->svc_cap.valid_cos_bitmap;
2593         if (!valid_cos_bitmap) {
2594                 PMD_DRV_LOG(ERR, "PF has none cos to support\n");
2595                 return -EFAULT;
2596         }
2597
2598         for (i = 0; i < NR_MAX_COS; i++) {
2599                 if (valid_cos_bitmap & BIT(i))
2600                         default_cos = i; /* Find max cos id as default cos */
2601         }
2602
2603         *cos_id = default_cos;
2604
2605         return 0;
2606 }
2607
2608 static int hinic_init_default_cos(struct hinic_nic_dev *nic_dev)
2609 {
2610         u8 cos_id = 0;
2611         int err;
2612
2613         if (!HINIC_IS_VF(nic_dev->hwdev)) {
2614                 err = hinic_pf_get_default_cos(nic_dev->hwdev, &cos_id);
2615                 if (err) {
2616                         PMD_DRV_LOG(ERR, "Get PF default cos failed, err: %d",
2617                                     err);
2618                         return HINIC_ERROR;
2619                 }
2620         } else {
2621                 err = hinic_vf_get_default_cos(nic_dev->hwdev, &cos_id);
2622                 if (err) {
2623                         PMD_DRV_LOG(ERR, "Get VF default cos failed, err: %d",
2624                                     err);
2625                         return HINIC_ERROR;
2626                 }
2627         }
2628
2629         nic_dev->default_cos = cos_id;
2630
2631         PMD_DRV_LOG(INFO, "Default cos %d", nic_dev->default_cos);
2632
2633         return 0;
2634 }
2635
2636 static int hinic_set_default_hw_feature(struct hinic_nic_dev *nic_dev)
2637 {
2638         int err;
2639
2640         err = hinic_init_default_cos(nic_dev);
2641         if (err)
2642                 return err;
2643
2644         if (hinic_func_type(nic_dev->hwdev) == TYPE_VF)
2645                 return 0;
2646
2647         /* Restore DCB configure to default status */
2648         err = hinic_set_default_dcb_feature(nic_dev);
2649         if (err)
2650                 return err;
2651
2652         /* Set pause enable, and up will disable pfc. */
2653         err = hinic_set_default_pause_feature(nic_dev);
2654         if (err)
2655                 return err;
2656
2657         err = hinic_reset_port_link_cfg(nic_dev->hwdev);
2658         if (err)
2659                 return err;
2660
2661         err = hinic_set_link_status_follow(nic_dev->hwdev,
2662                                            HINIC_LINK_FOLLOW_PORT);
2663         if (err == HINIC_MGMT_CMD_UNSUPPORTED)
2664                 PMD_DRV_LOG(WARNING, "Don't support to set link status follow phy port status");
2665         else if (err)
2666                 return err;
2667
2668         return hinic_set_anti_attack(nic_dev->hwdev, true);
2669 }
2670
2671 static int32_t hinic_card_workmode_check(struct hinic_nic_dev *nic_dev)
2672 {
2673         struct hinic_board_info info = { 0 };
2674         int rc;
2675
2676         if (hinic_func_type(nic_dev->hwdev) == TYPE_VF)
2677                 return 0;
2678
2679         rc = hinic_get_board_info(nic_dev->hwdev, &info);
2680         if (rc)
2681                 return rc;
2682
2683         return (info.service_mode == HINIC_SERVICE_MODE_NIC ? HINIC_OK :
2684                                                 HINIC_ERROR);
2685 }
2686
2687 static int hinic_copy_mempool_init(struct hinic_nic_dev *nic_dev)
2688 {
2689         nic_dev->cpy_mpool = rte_mempool_lookup(nic_dev->proc_dev_name);
2690         if (nic_dev->cpy_mpool == NULL) {
2691                 nic_dev->cpy_mpool =
2692                 rte_pktmbuf_pool_create(nic_dev->proc_dev_name,
2693                                         HINIC_COPY_MEMPOOL_DEPTH,
2694                                         0, 0,
2695                                         HINIC_COPY_MBUF_SIZE,
2696                                         rte_socket_id());
2697                 if (!nic_dev->cpy_mpool) {
2698                         PMD_DRV_LOG(ERR, "Create copy mempool failed, errno: %d, dev_name: %s",
2699                                     rte_errno, nic_dev->proc_dev_name);
2700                         return -ENOMEM;
2701                 }
2702         }
2703
2704         return 0;
2705 }
2706
2707 static void hinic_copy_mempool_uninit(struct hinic_nic_dev *nic_dev)
2708 {
2709         if (nic_dev->cpy_mpool != NULL)
2710                 rte_mempool_free(nic_dev->cpy_mpool);
2711 }
2712
2713 static int hinic_init_sw_rxtxqs(struct hinic_nic_dev *nic_dev)
2714 {
2715         u32 txq_size;
2716         u32 rxq_size;
2717
2718         /* allocate software txq array */
2719         txq_size = nic_dev->nic_cap.max_sqs * sizeof(*nic_dev->txqs);
2720         nic_dev->txqs = kzalloc_aligned(txq_size, GFP_KERNEL);
2721         if (!nic_dev->txqs) {
2722                 PMD_DRV_LOG(ERR, "Allocate txqs failed");
2723                 return -ENOMEM;
2724         }
2725
2726         /* allocate software rxq array */
2727         rxq_size = nic_dev->nic_cap.max_rqs * sizeof(*nic_dev->rxqs);
2728         nic_dev->rxqs = kzalloc_aligned(rxq_size, GFP_KERNEL);
2729         if (!nic_dev->rxqs) {
2730                 /* free txqs */
2731                 kfree(nic_dev->txqs);
2732                 nic_dev->txqs = NULL;
2733
2734                 PMD_DRV_LOG(ERR, "Allocate rxqs failed");
2735                 return -ENOMEM;
2736         }
2737
2738         return HINIC_OK;
2739 }
2740
2741 static void hinic_deinit_sw_rxtxqs(struct hinic_nic_dev *nic_dev)
2742 {
2743         kfree(nic_dev->txqs);
2744         nic_dev->txqs = NULL;
2745
2746         kfree(nic_dev->rxqs);
2747         nic_dev->rxqs = NULL;
2748 }
2749
2750 static int hinic_nic_dev_create(struct rte_eth_dev *eth_dev)
2751 {
2752         struct hinic_nic_dev *nic_dev =
2753                                 HINIC_ETH_DEV_TO_PRIVATE_NIC_DEV(eth_dev);
2754         int rc;
2755
2756         nic_dev->hwdev = rte_zmalloc("hinic_hwdev", sizeof(*nic_dev->hwdev),
2757                                      RTE_CACHE_LINE_SIZE);
2758         if (!nic_dev->hwdev) {
2759                 PMD_DRV_LOG(ERR, "Allocate hinic hwdev memory failed, dev_name: %s",
2760                             eth_dev->data->name);
2761                 return -ENOMEM;
2762         }
2763         nic_dev->hwdev->pcidev_hdl = RTE_ETH_DEV_TO_PCI(eth_dev);
2764
2765         /* init osdep*/
2766         rc = hinic_osdep_init(nic_dev->hwdev);
2767         if (rc) {
2768                 PMD_DRV_LOG(ERR, "Initialize os_dep failed, dev_name: %s",
2769                             eth_dev->data->name);
2770                 goto init_osdep_fail;
2771         }
2772
2773         /* init_hwif */
2774         rc = hinic_hwif_res_init(nic_dev->hwdev);
2775         if (rc) {
2776                 PMD_DRV_LOG(ERR, "Initialize hwif failed, dev_name: %s",
2777                             eth_dev->data->name);
2778                 goto init_hwif_fail;
2779         }
2780
2781         /* init_cfg_mgmt */
2782         rc = init_cfg_mgmt(nic_dev->hwdev);
2783         if (rc) {
2784                 PMD_DRV_LOG(ERR, "Initialize cfg_mgmt failed, dev_name: %s",
2785                             eth_dev->data->name);
2786                 goto init_cfgmgnt_fail;
2787         }
2788
2789         /* init_aeqs */
2790         rc = hinic_comm_aeqs_init(nic_dev->hwdev);
2791         if (rc) {
2792                 PMD_DRV_LOG(ERR, "Initialize aeqs failed, dev_name: %s",
2793                             eth_dev->data->name);
2794                 goto init_aeqs_fail;
2795         }
2796
2797         /* init_pf_to_mgnt */
2798         rc = hinic_comm_pf_to_mgmt_init(nic_dev->hwdev);
2799         if (rc) {
2800                 PMD_DRV_LOG(ERR, "Initialize pf_to_mgmt failed, dev_name: %s",
2801                             eth_dev->data->name);
2802                 goto init_pf_to_mgmt_fail;
2803         }
2804
2805         /* init mailbox */
2806         rc = hinic_comm_func_to_func_init(nic_dev->hwdev);
2807         if (rc) {
2808                 PMD_DRV_LOG(ERR, "Initialize func_to_func failed, dev_name: %s",
2809                             eth_dev->data->name);
2810                 goto init_func_to_func_fail;
2811         }
2812
2813         rc = hinic_card_workmode_check(nic_dev);
2814         if (rc) {
2815                 PMD_DRV_LOG(ERR, "Check card workmode failed, dev_name: %s",
2816                             eth_dev->data->name);
2817                 goto workmode_check_fail;
2818         }
2819
2820         /* do l2nic reset to make chip clear */
2821         rc = hinic_l2nic_reset(nic_dev->hwdev);
2822         if (rc) {
2823                 PMD_DRV_LOG(ERR, "Do l2nic reset failed, dev_name: %s",
2824                             eth_dev->data->name);
2825                 goto l2nic_reset_fail;
2826         }
2827
2828         /* init dma and aeq msix attribute table */
2829         (void)hinic_init_attr_table(nic_dev->hwdev);
2830
2831         /* init_cmdqs */
2832         rc = hinic_comm_cmdqs_init(nic_dev->hwdev);
2833         if (rc) {
2834                 PMD_DRV_LOG(ERR, "Initialize cmdq failed, dev_name: %s",
2835                             eth_dev->data->name);
2836                 goto init_cmdq_fail;
2837         }
2838
2839         /* set hardware state active */
2840         rc = hinic_activate_hwdev_state(nic_dev->hwdev);
2841         if (rc) {
2842                 PMD_DRV_LOG(ERR, "Initialize resources state failed, dev_name: %s",
2843                             eth_dev->data->name);
2844                 goto init_resources_state_fail;
2845         }
2846
2847         /* init_capability */
2848         rc = hinic_init_capability(nic_dev->hwdev);
2849         if (rc) {
2850                 PMD_DRV_LOG(ERR, "Initialize capability failed, dev_name: %s",
2851                             eth_dev->data->name);
2852                 goto init_cap_fail;
2853         }
2854
2855         /* get nic capability */
2856         if (!hinic_support_nic(nic_dev->hwdev, &nic_dev->nic_cap)) {
2857                 PMD_DRV_LOG(ERR, "Hw doesn't support nic, dev_name: %s",
2858                             eth_dev->data->name);
2859                 rc = -EINVAL;
2860                 goto nic_check_fail;
2861         }
2862
2863         /* init root cla and function table */
2864         rc = hinic_init_nicio(nic_dev->hwdev);
2865         if (rc) {
2866                 PMD_DRV_LOG(ERR, "Initialize nic_io failed, dev_name: %s",
2867                             eth_dev->data->name);
2868                 goto init_nicio_fail;
2869         }
2870
2871         /* init_software_txrxq */
2872         rc = hinic_init_sw_rxtxqs(nic_dev);
2873         if (rc) {
2874                 PMD_DRV_LOG(ERR, "Initialize sw_rxtxqs failed, dev_name: %s",
2875                             eth_dev->data->name);
2876                 goto init_sw_rxtxqs_fail;
2877         }
2878
2879         rc = hinic_copy_mempool_init(nic_dev);
2880         if (rc) {
2881                 PMD_DRV_LOG(ERR, "Create copy mempool failed, dev_name: %s",
2882                          eth_dev->data->name);
2883                 goto init_mpool_fail;
2884         }
2885
2886         /* set hardware feature to default status */
2887         rc = hinic_set_default_hw_feature(nic_dev);
2888         if (rc) {
2889                 PMD_DRV_LOG(ERR, "Initialize hardware default features failed, dev_name: %s",
2890                             eth_dev->data->name);
2891                 goto set_default_hw_feature_fail;
2892         }
2893
2894         return 0;
2895
2896 set_default_hw_feature_fail:
2897         hinic_copy_mempool_uninit(nic_dev);
2898
2899 init_mpool_fail:
2900         hinic_deinit_sw_rxtxqs(nic_dev);
2901
2902 init_sw_rxtxqs_fail:
2903         hinic_deinit_nicio(nic_dev->hwdev);
2904
2905 nic_check_fail:
2906 init_nicio_fail:
2907 init_cap_fail:
2908         hinic_deactivate_hwdev_state(nic_dev->hwdev);
2909
2910 init_resources_state_fail:
2911         hinic_comm_cmdqs_free(nic_dev->hwdev);
2912
2913 init_cmdq_fail:
2914 l2nic_reset_fail:
2915 workmode_check_fail:
2916         hinic_comm_func_to_func_free(nic_dev->hwdev);
2917
2918 init_func_to_func_fail:
2919         hinic_comm_pf_to_mgmt_free(nic_dev->hwdev);
2920
2921 init_pf_to_mgmt_fail:
2922         hinic_comm_aeqs_free(nic_dev->hwdev);
2923
2924 init_aeqs_fail:
2925         free_cfg_mgmt(nic_dev->hwdev);
2926
2927 init_cfgmgnt_fail:
2928         hinic_hwif_res_free(nic_dev->hwdev);
2929
2930 init_hwif_fail:
2931         hinic_osdep_deinit(nic_dev->hwdev);
2932
2933 init_osdep_fail:
2934         rte_free(nic_dev->hwdev);
2935         nic_dev->hwdev = NULL;
2936
2937         return rc;
2938 }
2939
2940 static void hinic_nic_dev_destroy(struct rte_eth_dev *eth_dev)
2941 {
2942         struct hinic_nic_dev *nic_dev =
2943                         HINIC_ETH_DEV_TO_PRIVATE_NIC_DEV(eth_dev);
2944
2945         (void)hinic_set_link_status_follow(nic_dev->hwdev,
2946                                            HINIC_LINK_FOLLOW_DEFAULT);
2947         hinic_copy_mempool_uninit(nic_dev);
2948         hinic_deinit_sw_rxtxqs(nic_dev);
2949         hinic_deinit_nicio(nic_dev->hwdev);
2950         hinic_deactivate_hwdev_state(nic_dev->hwdev);
2951         hinic_comm_cmdqs_free(nic_dev->hwdev);
2952         hinic_comm_func_to_func_free(nic_dev->hwdev);
2953         hinic_comm_pf_to_mgmt_free(nic_dev->hwdev);
2954         hinic_comm_aeqs_free(nic_dev->hwdev);
2955         free_cfg_mgmt(nic_dev->hwdev);
2956         hinic_hwif_res_free(nic_dev->hwdev);
2957         hinic_osdep_deinit(nic_dev->hwdev);
2958         rte_free(nic_dev->hwdev);
2959         nic_dev->hwdev = NULL;
2960 }
2961
2962 /**
2963  * DPDK callback to close the device.
2964  *
2965  * @param dev
2966  *   Pointer to Ethernet device structure.
2967  */
2968 static int hinic_dev_close(struct rte_eth_dev *dev)
2969 {
2970         struct hinic_nic_dev *nic_dev = HINIC_ETH_DEV_TO_PRIVATE_NIC_DEV(dev);
2971
2972         if (rte_eal_process_type() != RTE_PROC_PRIMARY)
2973                 return 0;
2974
2975         if (rte_bit_relaxed_test_and_set32(HINIC_DEV_CLOSE,
2976                                            &nic_dev->dev_status)) {
2977                 PMD_DRV_LOG(WARNING, "Device %s already closed",
2978                             dev->data->name);
2979                 return 0;
2980         }
2981
2982         /* stop device first */
2983         hinic_dev_stop(dev);
2984
2985         /* rx_cqe, rx_info */
2986         hinic_free_all_rx_resources(dev);
2987
2988         /* tx_info */
2989         hinic_free_all_tx_resources(dev);
2990
2991         /* free wq, pi_dma_addr */
2992         hinic_free_all_rq(nic_dev);
2993
2994         /* free wq, db_addr */
2995         hinic_free_all_sq(nic_dev);
2996
2997         /* deinit mac vlan tbl */
2998         hinic_deinit_mac_addr(dev);
2999         hinic_remove_all_vlanid(dev);
3000
3001         /* disable hardware and uio interrupt */
3002         hinic_disable_interrupt(dev);
3003
3004         /* deinit nic hardware device */
3005         hinic_nic_dev_destroy(dev);
3006
3007         return 0;
3008 }
3009
3010 static const struct eth_dev_ops hinic_pmd_ops = {
3011         .dev_configure                 = hinic_dev_configure,
3012         .dev_infos_get                 = hinic_dev_infos_get,
3013         .fw_version_get                = hinic_fw_version_get,
3014         .rx_queue_setup                = hinic_rx_queue_setup,
3015         .tx_queue_setup                = hinic_tx_queue_setup,
3016         .dev_start                     = hinic_dev_start,
3017         .dev_set_link_up               = hinic_dev_set_link_up,
3018         .dev_set_link_down             = hinic_dev_set_link_down,
3019         .link_update                   = hinic_link_update,
3020         .rx_queue_release              = hinic_rx_queue_release,
3021         .tx_queue_release              = hinic_tx_queue_release,
3022         .dev_stop                      = hinic_dev_stop,
3023         .dev_close                     = hinic_dev_close,
3024         .mtu_set                       = hinic_dev_set_mtu,
3025         .vlan_filter_set               = hinic_vlan_filter_set,
3026         .vlan_offload_set              = hinic_vlan_offload_set,
3027         .allmulticast_enable           = hinic_dev_allmulticast_enable,
3028         .allmulticast_disable          = hinic_dev_allmulticast_disable,
3029         .promiscuous_enable            = hinic_dev_promiscuous_enable,
3030         .promiscuous_disable           = hinic_dev_promiscuous_disable,
3031         .flow_ctrl_get                 = hinic_flow_ctrl_get,
3032         .flow_ctrl_set                 = hinic_flow_ctrl_set,
3033         .rss_hash_update               = hinic_rss_hash_update,
3034         .rss_hash_conf_get             = hinic_rss_conf_get,
3035         .reta_update                   = hinic_rss_indirtbl_update,
3036         .reta_query                    = hinic_rss_indirtbl_query,
3037         .stats_get                     = hinic_dev_stats_get,
3038         .stats_reset                   = hinic_dev_stats_reset,
3039         .xstats_get                    = hinic_dev_xstats_get,
3040         .xstats_reset                  = hinic_dev_xstats_reset,
3041         .xstats_get_names              = hinic_dev_xstats_get_names,
3042         .rxq_info_get                  = hinic_rxq_info_get,
3043         .txq_info_get                  = hinic_txq_info_get,
3044         .mac_addr_set                  = hinic_set_mac_addr,
3045         .mac_addr_remove               = hinic_mac_addr_remove,
3046         .mac_addr_add                  = hinic_mac_addr_add,
3047         .set_mc_addr_list              = hinic_set_mc_addr_list,
3048         .filter_ctrl                   = hinic_dev_filter_ctrl,
3049 };
3050
3051 static const struct eth_dev_ops hinic_pmd_vf_ops = {
3052         .dev_configure                 = hinic_dev_configure,
3053         .dev_infos_get                 = hinic_dev_infos_get,
3054         .fw_version_get                = hinic_fw_version_get,
3055         .rx_queue_setup                = hinic_rx_queue_setup,
3056         .tx_queue_setup                = hinic_tx_queue_setup,
3057         .dev_start                     = hinic_dev_start,
3058         .link_update                   = hinic_link_update,
3059         .rx_queue_release              = hinic_rx_queue_release,
3060         .tx_queue_release              = hinic_tx_queue_release,
3061         .dev_stop                      = hinic_dev_stop,
3062         .dev_close                     = hinic_dev_close,
3063         .mtu_set                       = hinic_dev_set_mtu,
3064         .vlan_filter_set               = hinic_vlan_filter_set,
3065         .vlan_offload_set              = hinic_vlan_offload_set,
3066         .allmulticast_enable           = hinic_dev_allmulticast_enable,
3067         .allmulticast_disable          = hinic_dev_allmulticast_disable,
3068         .rss_hash_update               = hinic_rss_hash_update,
3069         .rss_hash_conf_get             = hinic_rss_conf_get,
3070         .reta_update                   = hinic_rss_indirtbl_update,
3071         .reta_query                    = hinic_rss_indirtbl_query,
3072         .stats_get                     = hinic_dev_stats_get,
3073         .stats_reset                   = hinic_dev_stats_reset,
3074         .xstats_get                    = hinic_dev_xstats_get,
3075         .xstats_reset                  = hinic_dev_xstats_reset,
3076         .xstats_get_names              = hinic_dev_xstats_get_names,
3077         .rxq_info_get                  = hinic_rxq_info_get,
3078         .txq_info_get                  = hinic_txq_info_get,
3079         .mac_addr_set                  = hinic_set_mac_addr,
3080         .mac_addr_remove               = hinic_mac_addr_remove,
3081         .mac_addr_add                  = hinic_mac_addr_add,
3082         .set_mc_addr_list              = hinic_set_mc_addr_list,
3083         .filter_ctrl                   = hinic_dev_filter_ctrl,
3084 };
3085
3086 static int hinic_func_init(struct rte_eth_dev *eth_dev)
3087 {
3088         struct rte_pci_device *pci_dev;
3089         struct rte_ether_addr *eth_addr;
3090         struct hinic_nic_dev *nic_dev;
3091         struct hinic_filter_info *filter_info;
3092         struct hinic_tcam_info *tcam_info;
3093         u32 mac_size;
3094         int rc;
3095
3096         pci_dev = RTE_ETH_DEV_TO_PCI(eth_dev);
3097
3098         /* EAL is SECONDARY and eth_dev is already created */
3099         if (rte_eal_process_type() != RTE_PROC_PRIMARY) {
3100                 PMD_DRV_LOG(INFO, "Initialize %s in secondary process",
3101                             eth_dev->data->name);
3102
3103                 return 0;
3104         }
3105
3106         nic_dev = HINIC_ETH_DEV_TO_PRIVATE_NIC_DEV(eth_dev);
3107         memset(nic_dev, 0, sizeof(*nic_dev));
3108
3109         snprintf(nic_dev->proc_dev_name,
3110                  sizeof(nic_dev->proc_dev_name),
3111                  "hinic-%.4x:%.2x:%.2x.%x",
3112                  pci_dev->addr.domain, pci_dev->addr.bus,
3113                  pci_dev->addr.devid, pci_dev->addr.function);
3114
3115         /* alloc mac_addrs */
3116         mac_size = HINIC_MAX_UC_MAC_ADDRS * sizeof(struct rte_ether_addr);
3117         eth_addr = rte_zmalloc("hinic_mac", mac_size, 0);
3118         if (!eth_addr) {
3119                 PMD_DRV_LOG(ERR, "Allocate ethernet addresses' memory failed, dev_name: %s",
3120                             eth_dev->data->name);
3121                 rc = -ENOMEM;
3122                 goto eth_addr_fail;
3123         }
3124         eth_dev->data->mac_addrs = eth_addr;
3125
3126         mac_size = HINIC_MAX_MC_MAC_ADDRS * sizeof(struct rte_ether_addr);
3127         nic_dev->mc_list = rte_zmalloc("hinic_mc", mac_size, 0);
3128         if (!nic_dev->mc_list) {
3129                 PMD_DRV_LOG(ERR, "Allocate mcast address' memory failed, dev_name: %s",
3130                             eth_dev->data->name);
3131                 rc = -ENOMEM;
3132                 goto mc_addr_fail;
3133         }
3134
3135         /* create hardware nic_device */
3136         rc = hinic_nic_dev_create(eth_dev);
3137         if (rc) {
3138                 PMD_DRV_LOG(ERR, "Create nic device failed, dev_name: %s",
3139                             eth_dev->data->name);
3140                 goto create_nic_dev_fail;
3141         }
3142
3143         if (HINIC_IS_VF(nic_dev->hwdev))
3144                 eth_dev->dev_ops = &hinic_pmd_vf_ops;
3145         else
3146                 eth_dev->dev_ops = &hinic_pmd_ops;
3147
3148         rc = hinic_init_mac_addr(eth_dev);
3149         if (rc) {
3150                 PMD_DRV_LOG(ERR, "Initialize mac table failed, dev_name: %s",
3151                             eth_dev->data->name);
3152                 goto init_mac_fail;
3153         }
3154
3155         /* register callback func to eal lib */
3156         rc = rte_intr_callback_register(&pci_dev->intr_handle,
3157                                         hinic_dev_interrupt_handler,
3158                                         (void *)eth_dev);
3159         if (rc) {
3160                 PMD_DRV_LOG(ERR, "Register rte interrupt callback failed, dev_name: %s",
3161                             eth_dev->data->name);
3162                 goto reg_intr_cb_fail;
3163         }
3164
3165         /* enable uio/vfio intr/eventfd mapping */
3166         rc = rte_intr_enable(&pci_dev->intr_handle);
3167         if (rc) {
3168                 PMD_DRV_LOG(ERR, "Enable rte interrupt failed, dev_name: %s",
3169                             eth_dev->data->name);
3170                 goto enable_intr_fail;
3171         }
3172         rte_bit_relaxed_set32(HINIC_DEV_INTR_EN, &nic_dev->dev_status);
3173
3174         hinic_mutex_init(&nic_dev->rx_mode_mutex, NULL);
3175
3176         /* initialize filter info */
3177         filter_info = &nic_dev->filter;
3178         tcam_info = &nic_dev->tcam;
3179         memset(filter_info, 0, sizeof(struct hinic_filter_info));
3180         memset(tcam_info, 0, sizeof(struct hinic_tcam_info));
3181         /* initialize 5tuple filter list */
3182         TAILQ_INIT(&filter_info->fivetuple_list);
3183         TAILQ_INIT(&tcam_info->tcam_list);
3184         TAILQ_INIT(&nic_dev->filter_ntuple_list);
3185         TAILQ_INIT(&nic_dev->filter_ethertype_list);
3186         TAILQ_INIT(&nic_dev->filter_fdir_rule_list);
3187         TAILQ_INIT(&nic_dev->hinic_flow_list);
3188
3189         rte_bit_relaxed_set32(HINIC_DEV_INIT, &nic_dev->dev_status);
3190         PMD_DRV_LOG(INFO, "Initialize %s in primary successfully",
3191                     eth_dev->data->name);
3192
3193         return 0;
3194
3195 enable_intr_fail:
3196         (void)rte_intr_callback_unregister(&pci_dev->intr_handle,
3197                                            hinic_dev_interrupt_handler,
3198                                            (void *)eth_dev);
3199
3200 reg_intr_cb_fail:
3201         hinic_deinit_mac_addr(eth_dev);
3202
3203 init_mac_fail:
3204         eth_dev->dev_ops = NULL;
3205         hinic_nic_dev_destroy(eth_dev);
3206
3207 create_nic_dev_fail:
3208         rte_free(nic_dev->mc_list);
3209         nic_dev->mc_list = NULL;
3210
3211 mc_addr_fail:
3212         rte_free(eth_addr);
3213         eth_dev->data->mac_addrs = NULL;
3214
3215 eth_addr_fail:
3216         PMD_DRV_LOG(ERR, "Initialize %s in primary failed",
3217                     eth_dev->data->name);
3218         return rc;
3219 }
3220
3221 static int hinic_dev_init(struct rte_eth_dev *eth_dev)
3222 {
3223         struct rte_pci_device *pci_dev;
3224
3225         pci_dev = RTE_ETH_DEV_TO_PCI(eth_dev);
3226
3227         PMD_DRV_LOG(INFO, "Initializing pf hinic-%.4x:%.2x:%.2x.%x in %s process",
3228                     pci_dev->addr.domain, pci_dev->addr.bus,
3229                     pci_dev->addr.devid, pci_dev->addr.function,
3230                     (rte_eal_process_type() == RTE_PROC_PRIMARY) ?
3231                     "primary" : "secondary");
3232
3233         /* rte_eth_dev rx_burst and tx_burst */
3234         eth_dev->rx_pkt_burst = hinic_recv_pkts;
3235         eth_dev->tx_pkt_burst = hinic_xmit_pkts;
3236
3237         return hinic_func_init(eth_dev);
3238 }
3239
3240 static int hinic_dev_uninit(struct rte_eth_dev *dev)
3241 {
3242         struct hinic_nic_dev *nic_dev;
3243
3244         nic_dev = HINIC_ETH_DEV_TO_PRIVATE_NIC_DEV(dev);
3245         rte_bit_relaxed_clear32(HINIC_DEV_INIT, &nic_dev->dev_status);
3246
3247         if (rte_eal_process_type() != RTE_PROC_PRIMARY)
3248                 return 0;
3249
3250         hinic_mutex_destroy(&nic_dev->rx_mode_mutex);
3251
3252         hinic_dev_close(dev);
3253
3254         dev->dev_ops = NULL;
3255         dev->rx_pkt_burst = NULL;
3256         dev->tx_pkt_burst = NULL;
3257
3258         rte_free(nic_dev->mc_list);
3259
3260         return HINIC_OK;
3261 }
3262
3263 static struct rte_pci_id pci_id_hinic_map[] = {
3264         { RTE_PCI_DEVICE(HINIC_HUAWEI_VENDOR_ID, HINIC_DEV_ID_PRD) },
3265         { RTE_PCI_DEVICE(HINIC_HUAWEI_VENDOR_ID, HINIC_DEV_ID_MEZZ_25GE) },
3266         { RTE_PCI_DEVICE(HINIC_HUAWEI_VENDOR_ID, HINIC_DEV_ID_MEZZ_100GE) },
3267         { RTE_PCI_DEVICE(HINIC_HUAWEI_VENDOR_ID, HINIC_DEV_ID_VF) },
3268         { RTE_PCI_DEVICE(HINIC_HUAWEI_VENDOR_ID, HINIC_DEV_ID_VF_HV) },
3269         { RTE_PCI_DEVICE(HINIC_HUAWEI_VENDOR_ID, HINIC_DEV_ID_1822_DUAL_25GE) },
3270         { RTE_PCI_DEVICE(HINIC_HUAWEI_VENDOR_ID, HINIC_DEV_ID_1822_100GE) },
3271         {.vendor_id = 0},
3272 };
3273
3274 static int hinic_pci_probe(struct rte_pci_driver *pci_drv __rte_unused,
3275                            struct rte_pci_device *pci_dev)
3276 {
3277         return rte_eth_dev_pci_generic_probe(pci_dev,
3278                 sizeof(struct hinic_nic_dev), hinic_dev_init);
3279 }
3280
3281 static int hinic_pci_remove(struct rte_pci_device *pci_dev)
3282 {
3283         return rte_eth_dev_pci_generic_remove(pci_dev, hinic_dev_uninit);
3284 }
3285
3286 static struct rte_pci_driver rte_hinic_pmd = {
3287         .id_table = pci_id_hinic_map,
3288         .drv_flags = RTE_PCI_DRV_NEED_MAPPING | RTE_PCI_DRV_INTR_LSC,
3289         .probe = hinic_pci_probe,
3290         .remove = hinic_pci_remove,
3291 };
3292
3293 RTE_PMD_REGISTER_PCI(net_hinic, rte_hinic_pmd);
3294 RTE_PMD_REGISTER_PCI_TABLE(net_hinic, pci_id_hinic_map);
3295 RTE_LOG_REGISTER(hinic_logtype, pmd.net.hinic, INFO);